TSTP Solution File: SYN541+1 by Refute---2015
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%------------------------------------------------------------------------------
% File : Refute---2015
% Problem : SYN541+1 : TPTP v6.4.0. Released v2.1.0.
% Transfm : none
% Format : tptp:raw
% Command : isabelle tptp_refute %d %s
% Computer : n128.star.cs.uiowa.edu
% Model : x86_64 x86_64
% CPU : Intel(R) Xeon(R) CPU E5-2609 0 2.40GHz
% Memory : 32218.75MB
% OS : Linux 3.10.0-327.10.1.el7.x86_64
% CPULimit : 300s
% DateTime : Thu Apr 14 06:42:19 EDT 2016
% Result : CounterSatisfiable 25.96s
% Output : Assurance 0s
% Verified :
% SZS Type : None (Parsing solution fails)
% Syntax : Number of formulae : 0
% Comments :
%------------------------------------------------------------------------------
%----No solution output by system
%------------------------------------------------------------------------------
%----ORIGINAL SYSTEM OUTPUT
% 0.00/0.03 % Problem : SYN541+1 : TPTP v6.4.0. Released v2.1.0.
% 0.00/0.04 % Command : isabelle tptp_refute %d %s
% 0.02/0.23 % Computer : n128.star.cs.uiowa.edu
% 0.02/0.23 % Model : x86_64 x86_64
% 0.02/0.23 % CPU : Intel(R) Xeon(R) CPU E5-2609 0 @ 2.40GHz
% 0.02/0.23 % Memory : 32218.75MB
% 0.02/0.23 % OS : Linux 3.10.0-327.10.1.el7.x86_64
% 0.02/0.23 % CPULimit : 300
% 0.02/0.23 % DateTime : Sat Apr 9 00:15:39 CDT 2016
% 0.02/0.23 % CPUTime:
% 6.33/5.82 > val it = (): unit
% 6.73/6.20 Trying to find a model that refutes: ~ (((((((((((((((((((((((((((((((((((((~ bnd_c5_0 |
% 6.73/6.20 ((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a725) & bnd_c5_1 bnd_a725) &
% 6.73/6.20 bnd_c2_1 bnd_a725) |
% 6.73/6.20 bnd_c4_0) &
% 6.73/6.20 ((bnd_c5_0 | ~ bnd_c4_0) |
% 6.73/6.20 (ALL U.
% 6.73/6.20 bnd_ndr1_0 -->
% 6.73/6.20 bnd_c2_1 U |
% 6.73/6.20 (ALL V.
% 6.73/6.20 bnd_ndr1_1 U -->
% 6.73/6.20 (~ bnd_c2_2 U V | bnd_c4_2 U V) | bnd_c1_2 U V)))) &
% 6.73/6.20 ((bnd_c5_0 | bnd_c1_0) |
% 6.73/6.20 (ALL W.
% 6.73/6.20 bnd_ndr1_0 -->
% 6.73/6.20 (ALL X. bnd_ndr1_1 W --> ~ bnd_c2_2 W X | ~ bnd_c5_2 W X) |
% 6.73/6.20 (ALL Y.
% 6.73/6.20 bnd_ndr1_1 W -->
% 6.73/6.20 (~ bnd_c5_2 W Y | ~ bnd_c1_2 W Y) | ~ bnd_c2_2 W Y)))) &
% 6.73/6.20 (((((((((bnd_ndr1_0 &
% 6.73/6.20 (ALL Z.
% 6.73/6.20 bnd_ndr1_1 bnd_a726 -->
% 6.73/6.20 ~ bnd_c5_2 bnd_a726 Z | bnd_c3_2 bnd_a726 Z)) &
% 6.73/6.20 bnd_ndr1_1 bnd_a726) &
% 6.73/6.20 bnd_c2_2 bnd_a726 bnd_a727) &
% 6.73/6.20 ~ bnd_c5_2 bnd_a726 bnd_a727) &
% 6.73/6.20 bnd_c4_2 bnd_a726 bnd_a727) &
% 6.73/6.20 bnd_ndr1_1 bnd_a726) &
% 6.73/6.20 ~ bnd_c4_2 bnd_a726 bnd_a728) &
% 6.73/6.20 bnd_c2_2 bnd_a726 bnd_a728 |
% 6.73/6.20 ~ bnd_c3_0) |
% 6.73/6.20 ((bnd_ndr1_0 &
% 6.73/6.20 (ALL X1.
% 6.73/6.20 bnd_ndr1_1 bnd_a729 -->
% 6.73/6.20 (~ bnd_c5_2 bnd_a729 X1 | bnd_c4_2 bnd_a729 X1) |
% 6.73/6.20 ~ bnd_c1_2 bnd_a729 X1)) &
% 6.73/6.20 (ALL X2.
% 6.73/6.20 bnd_ndr1_1 bnd_a729 -->
% 6.73/6.20 ~ bnd_c4_2 bnd_a729 X2 | ~ bnd_c1_2 bnd_a729 X2)) &
% 6.73/6.20 bnd_c4_1 bnd_a729)) &
% 6.73/6.20 (((ALL X3.
% 6.73/6.20 bnd_ndr1_0 -->
% 6.73/6.20 (~ bnd_c4_1 X3 |
% 6.73/6.20 (bnd_ndr1_1 X3 & ~ bnd_c2_2 X3 bnd_a730) & ~ bnd_c3_2 X3 bnd_a730) |
% 6.73/6.20 ~ bnd_c3_1 X3) |
% 6.73/6.20 ~ bnd_c3_0) |
% 6.73/6.20 ~ bnd_c5_0)) &
% 6.73/6.20 bnd_ndr1_0) &
% 6.73/6.20 bnd_c2_1 bnd_a731) &
% 6.73/6.20 bnd_c4_1 bnd_a731) &
% 6.73/6.20 ((bnd_c3_0 |
% 6.73/6.20 (((bnd_ndr1_0 & bnd_ndr1_1 bnd_a732) &
% 6.73/6.20 bnd_c4_2 bnd_a732 bnd_a733) &
% 6.73/6.20 ~ bnd_c3_2 bnd_a732 bnd_a733) &
% 6.73/6.20 ~ bnd_c2_1 bnd_a732) |
% 6.73/6.20 (ALL X4.
% 6.73/6.20 bnd_ndr1_0 -->
% 6.73/6.20 bnd_c2_1 X4 | ~ bnd_c5_1 X4))) &
% 6.73/6.20 ((bnd_ndr1_0 & ~ bnd_c5_1 bnd_a734) &
% 6.73/6.20 bnd_c4_1 bnd_a734 |
% 6.73/6.20 (ALL X5.
% 6.73/6.20 bnd_ndr1_0 -->
% 6.73/6.20 (((bnd_ndr1_1 X5 &
% 6.73/6.20 ~ bnd_c5_2 X5 bnd_a735) &
% 6.73/6.20 bnd_c1_2 X5 bnd_a735) &
% 6.73/6.20 bnd_c4_2 X5 bnd_a735 |
% 6.73/6.20 ~ bnd_c4_1 X5) |
% 6.73/6.20 bnd_c5_1 X5))) &
% 6.73/6.20 ((~ bnd_c1_0 | bnd_c2_0) |
% 6.73/6.20 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a736) &
% 6.73/6.20 bnd_c5_2 bnd_a736 bnd_a737) &
% 6.73/6.20 ~ bnd_c4_2 bnd_a736 bnd_a737) &
% 6.73/6.20 ~ bnd_c3_2 bnd_a736 bnd_a737) &
% 6.73/6.20 bnd_c4_1 bnd_a736) &
% 6.73/6.20 ~ bnd_c3_1 bnd_a736)) &
% 6.73/6.20 ((bnd_c4_0 |
% 6.73/6.20 (ALL X6.
% 6.73/6.20 bnd_ndr1_0 -->
% 6.73/6.20 (~ bnd_c1_1 X6 | bnd_c4_1 X6) |
% 6.73/6.20 bnd_c3_1 X6)) |
% 6.73/6.20 ((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a738) &
% 6.73/6.20 ~ bnd_c4_2 bnd_a738 bnd_a739) &
% 6.73/6.20 ~ bnd_c1_2 bnd_a738 bnd_a739) &
% 6.73/6.20 ~ bnd_c5_2 bnd_a738 bnd_a739) &
% 6.73/6.20 bnd_ndr1_1 bnd_a738) &
% 6.73/6.20 bnd_c1_2 bnd_a738 bnd_a740) &
% 6.73/6.20 ~ bnd_c5_2 bnd_a738 bnd_a740)) &
% 6.73/6.20 (((bnd_ndr1_0 & bnd_c2_1 bnd_a741) &
% 6.73/6.20 bnd_c3_1 bnd_a741) &
% 6.73/6.20 ~ bnd_c4_1 bnd_a741 |
% 6.73/6.20 ~ bnd_c4_0)) &
% 6.73/6.20 (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a742) &
% 6.73/6.20 ~ bnd_c4_2 bnd_a742 bnd_a743) &
% 6.73/6.20 ~ bnd_c1_2 bnd_a742 bnd_a743) &
% 6.73/6.20 bnd_c2_2 bnd_a742 bnd_a743) &
% 6.73/6.20 (ALL X7.
% 6.73/6.20 bnd_ndr1_1 bnd_a742 -->
% 6.73/6.20 (bnd_c4_2 bnd_a742 X7 |
% 6.73/6.20 bnd_c1_2 bnd_a742 X7) |
% 6.73/6.20 bnd_c3_2 bnd_a742 X7)) &
% 6.73/6.20 bnd_c3_1 bnd_a742 |
% 6.73/6.20 (((((bnd_ndr1_0 & bnd_c3_1 bnd_a744) &
% 6.73/6.20 bnd_ndr1_1 bnd_a744) &
% 6.73/6.20 bnd_c3_2 bnd_a744 bnd_a745) &
% 6.73/6.20 ~ bnd_c4_2 bnd_a744 bnd_a745) &
% 6.73/6.20 bnd_c1_2 bnd_a744 bnd_a745) &
% 6.73/6.20 ~ bnd_c5_1 bnd_a744) |
% 6.73/6.20 (ALL X8.
% 6.73/6.20 bnd_ndr1_0 -->
% 6.73/6.20 ((bnd_ndr1_1 X8 & bnd_c5_2 X8 bnd_a746) &
% 6.73/6.20 bnd_c1_2 X8 bnd_a746 |
% 6.73/6.20 (ALL X9.
% 6.73/6.20 bnd_ndr1_1 X8 -->
% 6.73/6.20 (~ bnd_c5_2 X8 X9 | ~ bnd_c3_2 X8 X9) |
% 6.73/6.20 ~ bnd_c1_2 X8 X9)) |
% 6.73/6.20 ~ bnd_c5_1 X8))) &
% 6.73/6.20 ((((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a747) &
% 6.73/6.20 ~ bnd_c4_2 bnd_a747 bnd_a748) &
% 6.73/6.20 ~ bnd_c2_2 bnd_a747 bnd_a748) &
% 6.73/6.20 ~ bnd_c3_2 bnd_a747 bnd_a748) &
% 6.73/6.20 (ALL X10.
% 6.73/6.20 bnd_ndr1_1 bnd_a747 -->
% 6.73/6.20 bnd_c1_2 bnd_a747 X10 |
% 6.73/6.20 ~ bnd_c3_2 bnd_a747 X10)) &
% 6.73/6.20 bnd_ndr1_1 bnd_a747) &
% 6.73/6.20 ~ bnd_c2_2 bnd_a747 bnd_a749) &
% 6.73/6.20 bnd_c3_2 bnd_a747 bnd_a749) &
% 6.73/6.20 ~ bnd_c4_2 bnd_a747 bnd_a749 |
% 6.73/6.20 ~ bnd_c4_0) |
% 6.73/6.20 bnd_c5_0)) &
% 6.73/6.20 (~ bnd_c4_0 | bnd_c1_0)) &
% 6.73/6.20 ((bnd_c2_0 |
% 6.73/6.20 (((((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a750) &
% 6.73/6.20 bnd_ndr1_1 bnd_a750) &
% 6.73/6.20 bnd_c4_2 bnd_a750 bnd_a751) &
% 6.73/6.20 ~ bnd_c1_2 bnd_a750 bnd_a751) &
% 6.73/6.20 bnd_c2_2 bnd_a750 bnd_a751) &
% 6.73/6.20 (ALL X11.
% 6.73/6.20 bnd_ndr1_1 bnd_a750 -->
% 6.73/6.20 ~ bnd_c2_2 bnd_a750 X11 |
% 6.73/6.20 ~ bnd_c1_2 bnd_a750 X11)) |
% 6.73/6.20 (ALL X12.
% 6.73/6.20 bnd_ndr1_0 -->
% 6.73/6.20 ((bnd_ndr1_1 X12 & bnd_c3_2 X12 bnd_a752) &
% 6.73/6.20 bnd_c5_2 X12 bnd_a752 |
% 6.73/6.20 (ALL X13.
% 6.73/6.20 bnd_ndr1_1 X12 -->
% 6.73/6.20 (~ bnd_c4_2 X12 X13 | bnd_c3_2 X12 X13) |
% 6.73/6.20 ~ bnd_c5_2 X12 X13)) |
% 6.73/6.20 (ALL X14.
% 6.73/6.20 bnd_ndr1_1 X12 -->
% 6.73/6.20 (~ bnd_c4_2 X12 X14 | ~ bnd_c1_2 X12 X14) |
% 6.73/6.20 ~ bnd_c3_2 X12 X14)))) &
% 6.73/6.20 ((~ bnd_c4_0 | bnd_c3_0) |
% 6.73/6.20 (ALL X15.
% 6.73/6.20 bnd_ndr1_0 -->
% 6.73/6.20 ((ALL X16.
% 6.73/6.20 bnd_ndr1_1 X15 -->
% 6.73/6.20 ~ bnd_c3_2 X15 X16 | ~ bnd_c2_2 X15 X16) |
% 6.73/6.20 bnd_c4_1 X15) |
% 6.73/6.20 bnd_c5_1 X15))) &
% 6.73/6.20 ((~ bnd_c4_0 |
% 6.73/6.20 (ALL X17.
% 6.73/6.20 bnd_ndr1_0 -->
% 6.73/6.20 (((bnd_ndr1_1 X17 & bnd_c2_2 X17 bnd_a753) &
% 6.73/6.20 ~ bnd_c5_2 X17 bnd_a753) &
% 6.73/6.20 ~ bnd_c1_2 X17 bnd_a753 |
% 6.73/6.20 ~ bnd_c2_1 X17) |
% 6.73/6.20 ~ bnd_c1_1 X17)) |
% 6.73/6.20 (ALL X18.
% 6.73/6.20 bnd_ndr1_0 -->
% 6.73/6.20 (~ bnd_c5_1 X18 | bnd_c3_1 X18) |
% 6.73/6.20 (ALL X19.
% 6.73/6.20 bnd_ndr1_1 X18 -->
% 6.73/6.20 (~ bnd_c3_2 X18 X19 | bnd_c2_2 X18 X19) |
% 6.73/6.20 ~ bnd_c1_2 X18 X19)))) &
% 6.73/6.20 (~ bnd_c2_0 | bnd_c3_0)) &
% 6.73/6.20 (((ALL X20.
% 6.73/6.20 bnd_ndr1_0 -->
% 6.73/6.20 (bnd_c1_1 X20 |
% 6.73/6.20 (bnd_ndr1_1 X20 & bnd_c3_2 X20 bnd_a754) &
% 6.73/6.20 ~ bnd_c5_2 X20 bnd_a754) |
% 6.73/6.20 (ALL X21.
% 6.73/6.20 bnd_ndr1_1 X20 -->
% 6.73/6.20 (~ bnd_c4_2 X20 X21 | bnd_c3_2 X20 X21) |
% 6.73/6.20 bnd_c5_2 X20 X21)) |
% 6.73/6.20 bnd_c4_0) |
% 6.73/6.20 bnd_c2_0)) &
% 6.73/6.20 (((ALL X22.
% 6.73/6.20 bnd_ndr1_0 -->
% 6.73/6.20 ((bnd_ndr1_1 X22 & bnd_c3_2 X22 bnd_a755) &
% 6.73/6.20 ~ bnd_c4_2 X22 bnd_a755 |
% 6.73/6.20 bnd_c4_1 X22) |
% 6.73/6.20 ((bnd_ndr1_1 X22 & bnd_c1_2 X22 bnd_a756) &
% 6.73/6.20 bnd_c5_2 X22 bnd_a756) &
% 6.73/6.20 ~ bnd_c4_2 X22 bnd_a756) |
% 6.73/6.20 ~ bnd_c2_0) |
% 6.73/6.20 bnd_c1_0)) &
% 6.73/6.20 (~ bnd_c2_0 |
% 6.73/6.20 (bnd_ndr1_0 & bnd_c4_1 bnd_a757) & ~ bnd_c1_1 bnd_a757)) &
% 6.73/6.20 (bnd_c4_0 | ~ bnd_c5_0)) &
% 6.73/6.20 (bnd_c1_0 |
% 6.73/6.20 (ALL X23.
% 6.73/6.20 bnd_ndr1_0 -->
% 6.73/6.20 (~ bnd_c2_1 X23 |
% 6.73/6.20 (ALL X24.
% 6.73/6.20 bnd_ndr1_1 X23 -->
% 6.73/6.20 bnd_c1_2 X23 X24 | ~ bnd_c4_2 X23 X24)) |
% 6.73/6.20 (ALL X25.
% 6.73/6.20 bnd_ndr1_1 X23 -->
% 6.73/6.20 (~ bnd_c2_2 X23 X25 | bnd_c4_2 X23 X25) |
% 6.73/6.20 bnd_c5_2 X23 X25)))) &
% 6.73/6.20 ((ALL X26.
% 6.73/6.20 bnd_ndr1_0 -->
% 6.73/6.20 ((ALL X27.
% 6.73/6.20 bnd_ndr1_1 X26 -->
% 6.73/6.20 bnd_c1_2 X26 X27 | ~ bnd_c4_2 X26 X27) |
% 6.73/6.20 (bnd_ndr1_1 X26 & bnd_c5_2 X26 bnd_a758) &
% 6.73/6.20 ~ bnd_c2_2 X26 bnd_a758) |
% 6.73/6.20 bnd_c1_1 X26) |
% 6.73/6.20 (((((bnd_ndr1_0 & bnd_c3_1 bnd_a759) & bnd_ndr1_1 bnd_a759) &
% 6.73/6.20 ~ bnd_c1_2 bnd_a759 bnd_a760) &
% 6.73/6.20 ~ bnd_c3_2 bnd_a759 bnd_a760) &
% 6.73/6.20 bnd_c4_2 bnd_a759 bnd_a760) &
% 6.73/6.20 (ALL X28.
% 6.73/6.20 bnd_ndr1_1 bnd_a759 -->
% 6.73/6.20 (~ bnd_c5_2 bnd_a759 X28 | ~ bnd_c2_2 bnd_a759 X28) |
% 6.73/6.20 bnd_c1_2 bnd_a759 X28))) &
% 6.73/6.20 (((ALL X29.
% 6.73/6.20 bnd_ndr1_0 -->
% 6.73/6.20 (~ bnd_c5_1 X29 |
% 6.73/6.20 (ALL X30.
% 6.73/6.20 bnd_ndr1_1 X29 -->
% 6.73/6.20 ~ bnd_c1_2 X29 X30 | ~ bnd_c2_2 X29 X30)) |
% 6.73/6.20 ~ bnd_c2_1 X29) |
% 6.73/6.20 ~ bnd_c3_0) |
% 6.73/6.20 (ALL X31.
% 6.73/6.20 bnd_ndr1_0 -->
% 6.73/6.20 ~ bnd_c3_1 X31 |
% 6.73/6.20 ((bnd_ndr1_1 X31 & bnd_c3_2 X31 bnd_a761) &
% 6.73/6.20 ~ bnd_c1_2 X31 bnd_a761) &
% 6.73/6.20 bnd_c5_2 X31 bnd_a761))) &
% 6.73/6.20 ((ALL X32.
% 6.73/6.20 bnd_ndr1_0 -->
% 6.73/6.20 (ALL X33.
% 6.73/6.20 bnd_ndr1_1 X32 -->
% 6.73/6.20 (~ bnd_c1_2 X32 X33 | bnd_c5_2 X32 X33) |
% 6.73/6.20 bnd_c2_2 X32 X33) |
% 6.73/6.20 bnd_c5_1 X32) |
% 6.73/6.20 (ALL X34.
% 6.73/6.20 bnd_ndr1_0 -->
% 6.73/6.20 (bnd_ndr1_1 X34 & bnd_c3_2 X34 bnd_a762) &
% 6.73/6.20 bnd_c2_2 X34 bnd_a762 |
% 6.73/6.20 ~ bnd_c2_1 X34))) &
% 6.73/6.20 (~ bnd_c4_0 |
% 6.73/6.20 (ALL X35.
% 6.73/6.20 bnd_ndr1_0 -->
% 6.73/6.20 (bnd_c2_1 X35 |
% 6.73/6.20 (ALL X36.
% 6.73/6.20 bnd_ndr1_1 X35 -->
% 6.73/6.20 (~ bnd_c1_2 X35 X36 | bnd_c3_2 X35 X36) |
% 6.73/6.20 ~ bnd_c2_2 X35 X36)) |
% 6.73/6.20 ~ bnd_c1_1 X35))) &
% 6.73/6.20 (((ALL X37.
% 6.73/6.20 bnd_ndr1_0 -->
% 6.73/6.20 (bnd_c3_1 X37 |
% 6.73/6.20 (ALL X38.
% 6.73/6.20 bnd_ndr1_1 X37 -->
% 6.73/6.20 (~ bnd_c5_2 X37 X38 | ~ bnd_c2_2 X37 X38) |
% 6.73/6.20 bnd_c4_2 X37 X38)) |
% 6.73/6.20 ~ bnd_c2_1 X37) |
% 6.73/6.20 bnd_c2_0) |
% 6.73/6.20 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a763) &
% 6.73/6.20 bnd_c1_2 bnd_a763 bnd_a764) &
% 6.73/6.20 bnd_c2_2 bnd_a763 bnd_a764) &
% 6.73/6.20 bnd_c5_2 bnd_a763 bnd_a764) &
% 6.73/6.20 (ALL X39.
% 6.73/6.20 bnd_ndr1_1 bnd_a763 -->
% 6.73/6.20 (bnd_c2_2 bnd_a763 X39 | bnd_c5_2 bnd_a763 X39) |
% 6.73/6.20 bnd_c4_2 bnd_a763 X39)) &
% 6.73/6.20 ~ bnd_c2_1 bnd_a763)) &
% 6.73/6.20 ((~ bnd_c1_0 | bnd_c4_0) |
% 6.73/6.20 (ALL X40.
% 6.73/6.20 bnd_ndr1_0 -->
% 6.73/6.20 (bnd_c4_1 X40 |
% 6.73/6.20 (ALL X41.
% 6.73/6.20 bnd_ndr1_1 X40 -->
% 6.73/6.20 (bnd_c2_2 X40 X41 | bnd_c1_2 X40 X41) |
% 6.73/6.20 ~ bnd_c3_2 X40 X41)) |
% 6.73/6.20 bnd_c3_1 X40))) &
% 6.73/6.20 ((~ bnd_c4_0 |
% 6.73/6.20 ((bnd_ndr1_0 & bnd_c5_1 bnd_a765) &
% 6.73/6.20 (ALL X42.
% 6.73/6.20 bnd_ndr1_1 bnd_a765 -->
% 6.73/6.20 (bnd_c1_2 bnd_a765 X42 | bnd_c2_2 bnd_a765 X42) |
% 6.73/6.20 ~ bnd_c3_2 bnd_a765 X42)) &
% 6.73/6.20 ~ bnd_c4_1 bnd_a765) |
% 6.73/6.20 ~ bnd_c3_0)) &
% 6.73/6.20 (((ALL X43.
% 6.73/6.20 bnd_ndr1_0 -->
% 6.73/6.20 (((bnd_ndr1_1 X43 & ~ bnd_c2_2 X43 bnd_a766) &
% 6.73/6.20 bnd_c3_2 X43 bnd_a766) &
% 6.73/6.20 ~ bnd_c1_2 X43 bnd_a766 |
% 6.73/6.20 bnd_c5_1 X43) |
% 6.73/6.20 (ALL X44.
% 6.73/6.20 bnd_ndr1_1 X43 --> bnd_c3_2 X43 X44 | ~ bnd_c5_2 X43 X44)) |
% 6.73/6.20 bnd_c1_0) |
% 6.73/6.20 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a767) &
% 6.73/6.20 ~ bnd_c5_2 bnd_a767 bnd_a768) &
% 6.73/6.20 bnd_c4_2 bnd_a767 bnd_a768) &
% 6.73/6.20 bnd_c3_2 bnd_a767 bnd_a768) &
% 6.73/6.20 ~ bnd_c4_1 bnd_a767) &
% 6.73/6.20 bnd_c5_1 bnd_a767)) &
% 6.73/6.20 (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a769) &
% 6.73/6.20 bnd_c4_2 bnd_a769 bnd_a770) &
% 6.73/6.20 bnd_c3_2 bnd_a769 bnd_a770) &
% 6.73/6.20 ~ bnd_c2_2 bnd_a769 bnd_a770) &
% 6.73/6.20 ~ bnd_c3_1 bnd_a769) &
% 6.73/6.20 (ALL X45.
% 6.73/6.20 bnd_ndr1_1 bnd_a769 -->
% 6.73/6.20 (bnd_c1_2 bnd_a769 X45 | bnd_c3_2 bnd_a769 X45) |
% 6.73/6.20 bnd_c4_2 bnd_a769 X45) |
% 6.73/6.20 ~ bnd_c1_0) |
% 6.73/6.20 ~ bnd_c3_0)) &
% 6.73/6.20 ((bnd_c4_0 | bnd_c1_0) |
% 6.73/6.20 (bnd_ndr1_0 &
% 6.73/6.20 (ALL X46.
% 6.73/6.20 bnd_ndr1_1 bnd_a771 -->
% 6.73/6.20 (~ bnd_c2_2 bnd_a771 X46 | bnd_c3_2 bnd_a771 X46) |
% 6.73/6.20 ~ bnd_c5_2 bnd_a771 X46)) &
% 6.73/6.20 bnd_c4_1 bnd_a771)) &
% 6.73/6.20 ((bnd_c1_0 |
% 6.73/6.20 (((((bnd_ndr1_0 & bnd_c2_1 bnd_a772) & bnd_c5_1 bnd_a772) &
% 6.73/6.20 bnd_ndr1_1 bnd_a772) &
% 6.73/6.20 ~ bnd_c1_2 bnd_a772 bnd_a773) &
% 6.73/6.20 ~ bnd_c4_2 bnd_a772 bnd_a773) &
% 6.73/6.20 bnd_c5_2 bnd_a772 bnd_a773) |
% 6.73/6.20 ((bnd_ndr1_0 &
% 6.73/6.20 (ALL X47.
% 6.73/6.20 bnd_ndr1_1 bnd_a774 -->
% 6.73/6.20 bnd_c1_2 bnd_a774 X47 | ~ bnd_c4_2 bnd_a774 X47)) &
% 6.73/6.20 (ALL X48.
% 6.73/6.20 bnd_ndr1_1 bnd_a774 -->
% 6.73/6.20 bnd_c2_2 bnd_a774 X48 | ~ bnd_c1_2 bnd_a774 X48)) &
% 6.73/6.20 bnd_c3_1 bnd_a774))
% 9.53/9.03 Unfolded term: ~ (((((((((((((((((((((((((((((((((((((~ bnd_c5_0 |
% 9.53/9.03 ((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a725) & bnd_c5_1 bnd_a725) &
% 9.53/9.03 bnd_c2_1 bnd_a725) |
% 9.53/9.03 bnd_c4_0) &
% 9.53/9.03 ((bnd_c5_0 | ~ bnd_c4_0) |
% 9.53/9.03 (ALL U.
% 9.53/9.03 bnd_ndr1_0 -->
% 9.53/9.03 bnd_c2_1 U |
% 9.53/9.03 (ALL V.
% 9.53/9.03 bnd_ndr1_1 U -->
% 9.53/9.03 (~ bnd_c2_2 U V | bnd_c4_2 U V) | bnd_c1_2 U V)))) &
% 9.53/9.03 ((bnd_c5_0 | bnd_c1_0) |
% 9.53/9.03 (ALL W.
% 9.53/9.03 bnd_ndr1_0 -->
% 9.53/9.03 (ALL X. bnd_ndr1_1 W --> ~ bnd_c2_2 W X | ~ bnd_c5_2 W X) |
% 9.53/9.03 (ALL Y.
% 9.53/9.03 bnd_ndr1_1 W -->
% 9.53/9.03 (~ bnd_c5_2 W Y | ~ bnd_c1_2 W Y) | ~ bnd_c2_2 W Y)))) &
% 9.53/9.03 (((((((((bnd_ndr1_0 &
% 9.53/9.03 (ALL Z.
% 9.53/9.03 bnd_ndr1_1 bnd_a726 -->
% 9.53/9.03 ~ bnd_c5_2 bnd_a726 Z | bnd_c3_2 bnd_a726 Z)) &
% 9.53/9.03 bnd_ndr1_1 bnd_a726) &
% 9.53/9.03 bnd_c2_2 bnd_a726 bnd_a727) &
% 9.53/9.03 ~ bnd_c5_2 bnd_a726 bnd_a727) &
% 9.53/9.03 bnd_c4_2 bnd_a726 bnd_a727) &
% 9.53/9.03 bnd_ndr1_1 bnd_a726) &
% 9.53/9.03 ~ bnd_c4_2 bnd_a726 bnd_a728) &
% 9.53/9.03 bnd_c2_2 bnd_a726 bnd_a728 |
% 9.53/9.03 ~ bnd_c3_0) |
% 9.53/9.03 ((bnd_ndr1_0 &
% 9.53/9.03 (ALL X1.
% 9.53/9.03 bnd_ndr1_1 bnd_a729 -->
% 9.53/9.03 (~ bnd_c5_2 bnd_a729 X1 | bnd_c4_2 bnd_a729 X1) |
% 9.53/9.03 ~ bnd_c1_2 bnd_a729 X1)) &
% 9.53/9.03 (ALL X2.
% 9.53/9.03 bnd_ndr1_1 bnd_a729 -->
% 9.53/9.03 ~ bnd_c4_2 bnd_a729 X2 | ~ bnd_c1_2 bnd_a729 X2)) &
% 9.53/9.03 bnd_c4_1 bnd_a729)) &
% 9.53/9.03 (((ALL X3.
% 9.53/9.03 bnd_ndr1_0 -->
% 9.53/9.03 (~ bnd_c4_1 X3 |
% 9.53/9.03 (bnd_ndr1_1 X3 & ~ bnd_c2_2 X3 bnd_a730) & ~ bnd_c3_2 X3 bnd_a730) |
% 9.53/9.03 ~ bnd_c3_1 X3) |
% 9.53/9.03 ~ bnd_c3_0) |
% 9.53/9.03 ~ bnd_c5_0)) &
% 9.53/9.03 bnd_ndr1_0) &
% 9.53/9.03 bnd_c2_1 bnd_a731) &
% 9.53/9.03 bnd_c4_1 bnd_a731) &
% 9.53/9.03 ((bnd_c3_0 |
% 9.53/9.03 (((bnd_ndr1_0 & bnd_ndr1_1 bnd_a732) &
% 9.53/9.03 bnd_c4_2 bnd_a732 bnd_a733) &
% 9.53/9.03 ~ bnd_c3_2 bnd_a732 bnd_a733) &
% 9.53/9.03 ~ bnd_c2_1 bnd_a732) |
% 9.53/9.03 (ALL X4.
% 9.53/9.03 bnd_ndr1_0 -->
% 9.53/9.03 bnd_c2_1 X4 | ~ bnd_c5_1 X4))) &
% 9.53/9.03 ((bnd_ndr1_0 & ~ bnd_c5_1 bnd_a734) &
% 9.53/9.03 bnd_c4_1 bnd_a734 |
% 9.53/9.03 (ALL X5.
% 9.53/9.03 bnd_ndr1_0 -->
% 9.53/9.03 (((bnd_ndr1_1 X5 &
% 9.53/9.03 ~ bnd_c5_2 X5 bnd_a735) &
% 9.53/9.03 bnd_c1_2 X5 bnd_a735) &
% 9.53/9.03 bnd_c4_2 X5 bnd_a735 |
% 9.53/9.03 ~ bnd_c4_1 X5) |
% 9.53/9.03 bnd_c5_1 X5))) &
% 9.53/9.03 ((~ bnd_c1_0 | bnd_c2_0) |
% 9.53/9.03 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a736) &
% 9.53/9.03 bnd_c5_2 bnd_a736 bnd_a737) &
% 9.53/9.03 ~ bnd_c4_2 bnd_a736 bnd_a737) &
% 9.53/9.03 ~ bnd_c3_2 bnd_a736 bnd_a737) &
% 9.53/9.03 bnd_c4_1 bnd_a736) &
% 9.53/9.03 ~ bnd_c3_1 bnd_a736)) &
% 9.53/9.03 ((bnd_c4_0 |
% 9.53/9.03 (ALL X6.
% 9.53/9.03 bnd_ndr1_0 -->
% 9.53/9.03 (~ bnd_c1_1 X6 | bnd_c4_1 X6) |
% 9.53/9.03 bnd_c3_1 X6)) |
% 9.53/9.03 ((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a738) &
% 9.53/9.03 ~ bnd_c4_2 bnd_a738 bnd_a739) &
% 9.53/9.03 ~ bnd_c1_2 bnd_a738 bnd_a739) &
% 9.53/9.03 ~ bnd_c5_2 bnd_a738 bnd_a739) &
% 9.53/9.03 bnd_ndr1_1 bnd_a738) &
% 9.53/9.03 bnd_c1_2 bnd_a738 bnd_a740) &
% 9.53/9.03 ~ bnd_c5_2 bnd_a738 bnd_a740)) &
% 9.53/9.03 (((bnd_ndr1_0 & bnd_c2_1 bnd_a741) &
% 9.53/9.03 bnd_c3_1 bnd_a741) &
% 9.53/9.03 ~ bnd_c4_1 bnd_a741 |
% 9.53/9.03 ~ bnd_c4_0)) &
% 9.53/9.03 (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a742) &
% 9.53/9.03 ~ bnd_c4_2 bnd_a742 bnd_a743) &
% 9.53/9.03 ~ bnd_c1_2 bnd_a742 bnd_a743) &
% 9.53/9.03 bnd_c2_2 bnd_a742 bnd_a743) &
% 9.53/9.03 (ALL X7.
% 9.53/9.03 bnd_ndr1_1 bnd_a742 -->
% 9.53/9.03 (bnd_c4_2 bnd_a742 X7 |
% 9.53/9.03 bnd_c1_2 bnd_a742 X7) |
% 9.53/9.03 bnd_c3_2 bnd_a742 X7)) &
% 9.53/9.03 bnd_c3_1 bnd_a742 |
% 9.53/9.03 (((((bnd_ndr1_0 & bnd_c3_1 bnd_a744) &
% 9.53/9.03 bnd_ndr1_1 bnd_a744) &
% 9.53/9.03 bnd_c3_2 bnd_a744 bnd_a745) &
% 9.53/9.03 ~ bnd_c4_2 bnd_a744 bnd_a745) &
% 9.53/9.03 bnd_c1_2 bnd_a744 bnd_a745) &
% 9.53/9.03 ~ bnd_c5_1 bnd_a744) |
% 9.53/9.03 (ALL X8.
% 9.53/9.03 bnd_ndr1_0 -->
% 9.53/9.03 ((bnd_ndr1_1 X8 & bnd_c5_2 X8 bnd_a746) &
% 9.53/9.03 bnd_c1_2 X8 bnd_a746 |
% 9.53/9.03 (ALL X9.
% 9.53/9.03 bnd_ndr1_1 X8 -->
% 9.53/9.03 (~ bnd_c5_2 X8 X9 | ~ bnd_c3_2 X8 X9) |
% 9.53/9.03 ~ bnd_c1_2 X8 X9)) |
% 9.53/9.03 ~ bnd_c5_1 X8))) &
% 9.53/9.03 ((((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a747) &
% 9.53/9.03 ~ bnd_c4_2 bnd_a747 bnd_a748) &
% 9.53/9.03 ~ bnd_c2_2 bnd_a747 bnd_a748) &
% 9.53/9.03 ~ bnd_c3_2 bnd_a747 bnd_a748) &
% 9.53/9.03 (ALL X10.
% 9.53/9.03 bnd_ndr1_1 bnd_a747 -->
% 9.53/9.03 bnd_c1_2 bnd_a747 X10 |
% 9.53/9.03 ~ bnd_c3_2 bnd_a747 X10)) &
% 9.53/9.03 bnd_ndr1_1 bnd_a747) &
% 9.53/9.03 ~ bnd_c2_2 bnd_a747 bnd_a749) &
% 9.53/9.03 bnd_c3_2 bnd_a747 bnd_a749) &
% 9.53/9.03 ~ bnd_c4_2 bnd_a747 bnd_a749 |
% 9.53/9.03 ~ bnd_c4_0) |
% 9.53/9.03 bnd_c5_0)) &
% 9.53/9.03 (~ bnd_c4_0 | bnd_c1_0)) &
% 9.53/9.03 ((bnd_c2_0 |
% 9.53/9.03 (((((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a750) &
% 9.53/9.03 bnd_ndr1_1 bnd_a750) &
% 9.53/9.03 bnd_c4_2 bnd_a750 bnd_a751) &
% 9.53/9.03 ~ bnd_c1_2 bnd_a750 bnd_a751) &
% 9.53/9.03 bnd_c2_2 bnd_a750 bnd_a751) &
% 9.53/9.03 (ALL X11.
% 9.53/9.03 bnd_ndr1_1 bnd_a750 -->
% 9.53/9.03 ~ bnd_c2_2 bnd_a750 X11 |
% 9.53/9.03 ~ bnd_c1_2 bnd_a750 X11)) |
% 9.53/9.03 (ALL X12.
% 9.53/9.03 bnd_ndr1_0 -->
% 9.53/9.03 ((bnd_ndr1_1 X12 & bnd_c3_2 X12 bnd_a752) &
% 9.53/9.03 bnd_c5_2 X12 bnd_a752 |
% 9.53/9.03 (ALL X13.
% 9.53/9.03 bnd_ndr1_1 X12 -->
% 9.53/9.03 (~ bnd_c4_2 X12 X13 | bnd_c3_2 X12 X13) |
% 9.53/9.03 ~ bnd_c5_2 X12 X13)) |
% 9.53/9.03 (ALL X14.
% 9.53/9.03 bnd_ndr1_1 X12 -->
% 9.53/9.03 (~ bnd_c4_2 X12 X14 | ~ bnd_c1_2 X12 X14) |
% 9.53/9.03 ~ bnd_c3_2 X12 X14)))) &
% 9.53/9.03 ((~ bnd_c4_0 | bnd_c3_0) |
% 9.53/9.03 (ALL X15.
% 9.53/9.03 bnd_ndr1_0 -->
% 9.53/9.03 ((ALL X16.
% 9.53/9.03 bnd_ndr1_1 X15 -->
% 9.53/9.03 ~ bnd_c3_2 X15 X16 | ~ bnd_c2_2 X15 X16) |
% 9.53/9.03 bnd_c4_1 X15) |
% 9.53/9.03 bnd_c5_1 X15))) &
% 9.53/9.03 ((~ bnd_c4_0 |
% 9.53/9.03 (ALL X17.
% 9.53/9.03 bnd_ndr1_0 -->
% 9.53/9.03 (((bnd_ndr1_1 X17 & bnd_c2_2 X17 bnd_a753) &
% 9.53/9.03 ~ bnd_c5_2 X17 bnd_a753) &
% 9.53/9.03 ~ bnd_c1_2 X17 bnd_a753 |
% 9.53/9.03 ~ bnd_c2_1 X17) |
% 9.53/9.03 ~ bnd_c1_1 X17)) |
% 9.53/9.03 (ALL X18.
% 9.53/9.03 bnd_ndr1_0 -->
% 9.53/9.03 (~ bnd_c5_1 X18 | bnd_c3_1 X18) |
% 9.53/9.03 (ALL X19.
% 9.53/9.03 bnd_ndr1_1 X18 -->
% 9.53/9.03 (~ bnd_c3_2 X18 X19 | bnd_c2_2 X18 X19) |
% 9.53/9.03 ~ bnd_c1_2 X18 X19)))) &
% 9.53/9.03 (~ bnd_c2_0 | bnd_c3_0)) &
% 9.53/9.03 (((ALL X20.
% 9.53/9.03 bnd_ndr1_0 -->
% 9.53/9.03 (bnd_c1_1 X20 |
% 9.53/9.03 (bnd_ndr1_1 X20 & bnd_c3_2 X20 bnd_a754) &
% 9.53/9.03 ~ bnd_c5_2 X20 bnd_a754) |
% 9.53/9.03 (ALL X21.
% 9.53/9.03 bnd_ndr1_1 X20 -->
% 9.53/9.03 (~ bnd_c4_2 X20 X21 | bnd_c3_2 X20 X21) |
% 9.53/9.03 bnd_c5_2 X20 X21)) |
% 9.53/9.03 bnd_c4_0) |
% 9.53/9.03 bnd_c2_0)) &
% 9.53/9.03 (((ALL X22.
% 9.53/9.03 bnd_ndr1_0 -->
% 9.53/9.03 ((bnd_ndr1_1 X22 & bnd_c3_2 X22 bnd_a755) &
% 9.53/9.03 ~ bnd_c4_2 X22 bnd_a755 |
% 9.53/9.03 bnd_c4_1 X22) |
% 9.53/9.03 ((bnd_ndr1_1 X22 & bnd_c1_2 X22 bnd_a756) &
% 9.53/9.03 bnd_c5_2 X22 bnd_a756) &
% 9.53/9.03 ~ bnd_c4_2 X22 bnd_a756) |
% 9.53/9.03 ~ bnd_c2_0) |
% 9.53/9.03 bnd_c1_0)) &
% 9.53/9.03 (~ bnd_c2_0 |
% 9.53/9.03 (bnd_ndr1_0 & bnd_c4_1 bnd_a757) & ~ bnd_c1_1 bnd_a757)) &
% 9.53/9.03 (bnd_c4_0 | ~ bnd_c5_0)) &
% 9.53/9.03 (bnd_c1_0 |
% 9.53/9.03 (ALL X23.
% 9.53/9.03 bnd_ndr1_0 -->
% 9.53/9.03 (~ bnd_c2_1 X23 |
% 9.53/9.03 (ALL X24.
% 9.53/9.03 bnd_ndr1_1 X23 -->
% 9.53/9.03 bnd_c1_2 X23 X24 | ~ bnd_c4_2 X23 X24)) |
% 9.53/9.03 (ALL X25.
% 9.53/9.03 bnd_ndr1_1 X23 -->
% 9.53/9.03 (~ bnd_c2_2 X23 X25 | bnd_c4_2 X23 X25) |
% 9.53/9.03 bnd_c5_2 X23 X25)))) &
% 9.53/9.03 ((ALL X26.
% 9.53/9.03 bnd_ndr1_0 -->
% 9.53/9.03 ((ALL X27.
% 9.53/9.03 bnd_ndr1_1 X26 -->
% 9.53/9.03 bnd_c1_2 X26 X27 | ~ bnd_c4_2 X26 X27) |
% 9.53/9.03 (bnd_ndr1_1 X26 & bnd_c5_2 X26 bnd_a758) &
% 9.53/9.03 ~ bnd_c2_2 X26 bnd_a758) |
% 9.53/9.03 bnd_c1_1 X26) |
% 9.53/9.03 (((((bnd_ndr1_0 & bnd_c3_1 bnd_a759) & bnd_ndr1_1 bnd_a759) &
% 9.53/9.03 ~ bnd_c1_2 bnd_a759 bnd_a760) &
% 9.53/9.03 ~ bnd_c3_2 bnd_a759 bnd_a760) &
% 9.53/9.03 bnd_c4_2 bnd_a759 bnd_a760) &
% 9.53/9.03 (ALL X28.
% 9.53/9.03 bnd_ndr1_1 bnd_a759 -->
% 9.53/9.03 (~ bnd_c5_2 bnd_a759 X28 | ~ bnd_c2_2 bnd_a759 X28) |
% 9.53/9.03 bnd_c1_2 bnd_a759 X28))) &
% 9.53/9.03 (((ALL X29.
% 9.53/9.03 bnd_ndr1_0 -->
% 9.53/9.03 (~ bnd_c5_1 X29 |
% 9.53/9.03 (ALL X30.
% 9.53/9.03 bnd_ndr1_1 X29 -->
% 9.53/9.03 ~ bnd_c1_2 X29 X30 | ~ bnd_c2_2 X29 X30)) |
% 9.53/9.03 ~ bnd_c2_1 X29) |
% 9.53/9.03 ~ bnd_c3_0) |
% 9.53/9.03 (ALL X31.
% 9.53/9.03 bnd_ndr1_0 -->
% 9.53/9.03 ~ bnd_c3_1 X31 |
% 9.53/9.03 ((bnd_ndr1_1 X31 & bnd_c3_2 X31 bnd_a761) &
% 9.53/9.03 ~ bnd_c1_2 X31 bnd_a761) &
% 9.53/9.03 bnd_c5_2 X31 bnd_a761))) &
% 9.53/9.03 ((ALL X32.
% 9.53/9.03 bnd_ndr1_0 -->
% 9.53/9.03 (ALL X33.
% 9.53/9.03 bnd_ndr1_1 X32 -->
% 9.53/9.03 (~ bnd_c1_2 X32 X33 | bnd_c5_2 X32 X33) |
% 9.53/9.03 bnd_c2_2 X32 X33) |
% 9.53/9.03 bnd_c5_1 X32) |
% 9.53/9.03 (ALL X34.
% 9.53/9.03 bnd_ndr1_0 -->
% 9.53/9.03 (bnd_ndr1_1 X34 & bnd_c3_2 X34 bnd_a762) &
% 9.53/9.03 bnd_c2_2 X34 bnd_a762 |
% 9.53/9.03 ~ bnd_c2_1 X34))) &
% 9.53/9.03 (~ bnd_c4_0 |
% 9.53/9.03 (ALL X35.
% 9.53/9.03 bnd_ndr1_0 -->
% 9.53/9.03 (bnd_c2_1 X35 |
% 9.53/9.03 (ALL X36.
% 9.53/9.03 bnd_ndr1_1 X35 -->
% 9.53/9.03 (~ bnd_c1_2 X35 X36 | bnd_c3_2 X35 X36) |
% 9.53/9.03 ~ bnd_c2_2 X35 X36)) |
% 9.53/9.03 ~ bnd_c1_1 X35))) &
% 9.53/9.03 (((ALL X37.
% 9.53/9.03 bnd_ndr1_0 -->
% 9.53/9.03 (bnd_c3_1 X37 |
% 9.53/9.03 (ALL X38.
% 9.53/9.03 bnd_ndr1_1 X37 -->
% 9.53/9.03 (~ bnd_c5_2 X37 X38 | ~ bnd_c2_2 X37 X38) |
% 9.53/9.03 bnd_c4_2 X37 X38)) |
% 9.53/9.03 ~ bnd_c2_1 X37) |
% 9.53/9.03 bnd_c2_0) |
% 9.53/9.03 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a763) &
% 9.53/9.03 bnd_c1_2 bnd_a763 bnd_a764) &
% 9.53/9.03 bnd_c2_2 bnd_a763 bnd_a764) &
% 9.53/9.03 bnd_c5_2 bnd_a763 bnd_a764) &
% 9.53/9.03 (ALL X39.
% 9.53/9.03 bnd_ndr1_1 bnd_a763 -->
% 9.53/9.03 (bnd_c2_2 bnd_a763 X39 | bnd_c5_2 bnd_a763 X39) |
% 9.53/9.03 bnd_c4_2 bnd_a763 X39)) &
% 9.53/9.03 ~ bnd_c2_1 bnd_a763)) &
% 9.53/9.03 ((~ bnd_c1_0 | bnd_c4_0) |
% 9.53/9.03 (ALL X40.
% 9.53/9.03 bnd_ndr1_0 -->
% 9.53/9.03 (bnd_c4_1 X40 |
% 9.53/9.03 (ALL X41.
% 9.53/9.03 bnd_ndr1_1 X40 -->
% 9.53/9.03 (bnd_c2_2 X40 X41 | bnd_c1_2 X40 X41) |
% 9.53/9.03 ~ bnd_c3_2 X40 X41)) |
% 9.53/9.03 bnd_c3_1 X40))) &
% 9.53/9.03 ((~ bnd_c4_0 |
% 9.53/9.03 ((bnd_ndr1_0 & bnd_c5_1 bnd_a765) &
% 9.53/9.03 (ALL X42.
% 9.53/9.03 bnd_ndr1_1 bnd_a765 -->
% 9.53/9.03 (bnd_c1_2 bnd_a765 X42 | bnd_c2_2 bnd_a765 X42) |
% 9.53/9.03 ~ bnd_c3_2 bnd_a765 X42)) &
% 9.53/9.03 ~ bnd_c4_1 bnd_a765) |
% 9.53/9.03 ~ bnd_c3_0)) &
% 9.53/9.03 (((ALL X43.
% 9.53/9.03 bnd_ndr1_0 -->
% 9.53/9.03 (((bnd_ndr1_1 X43 & ~ bnd_c2_2 X43 bnd_a766) &
% 9.53/9.03 bnd_c3_2 X43 bnd_a766) &
% 9.53/9.03 ~ bnd_c1_2 X43 bnd_a766 |
% 9.53/9.03 bnd_c5_1 X43) |
% 9.53/9.03 (ALL X44.
% 9.53/9.03 bnd_ndr1_1 X43 --> bnd_c3_2 X43 X44 | ~ bnd_c5_2 X43 X44)) |
% 9.53/9.03 bnd_c1_0) |
% 9.53/9.03 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a767) &
% 9.53/9.03 ~ bnd_c5_2 bnd_a767 bnd_a768) &
% 9.53/9.03 bnd_c4_2 bnd_a767 bnd_a768) &
% 9.53/9.03 bnd_c3_2 bnd_a767 bnd_a768) &
% 9.53/9.03 ~ bnd_c4_1 bnd_a767) &
% 9.53/9.03 bnd_c5_1 bnd_a767)) &
% 9.53/9.03 (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a769) &
% 9.53/9.03 bnd_c4_2 bnd_a769 bnd_a770) &
% 9.53/9.03 bnd_c3_2 bnd_a769 bnd_a770) &
% 9.53/9.03 ~ bnd_c2_2 bnd_a769 bnd_a770) &
% 9.53/9.03 ~ bnd_c3_1 bnd_a769) &
% 9.53/9.03 (ALL X45.
% 9.53/9.03 bnd_ndr1_1 bnd_a769 -->
% 9.53/9.03 (bnd_c1_2 bnd_a769 X45 | bnd_c3_2 bnd_a769 X45) |
% 9.53/9.03 bnd_c4_2 bnd_a769 X45) |
% 9.53/9.03 ~ bnd_c1_0) |
% 9.53/9.03 ~ bnd_c3_0)) &
% 9.53/9.03 ((bnd_c4_0 | bnd_c1_0) |
% 9.53/9.03 (bnd_ndr1_0 &
% 9.53/9.03 (ALL X46.
% 9.53/9.03 bnd_ndr1_1 bnd_a771 -->
% 9.53/9.03 (~ bnd_c2_2 bnd_a771 X46 | bnd_c3_2 bnd_a771 X46) |
% 9.53/9.03 ~ bnd_c5_2 bnd_a771 X46)) &
% 9.53/9.03 bnd_c4_1 bnd_a771)) &
% 9.53/9.03 ((bnd_c1_0 |
% 9.53/9.03 (((((bnd_ndr1_0 & bnd_c2_1 bnd_a772) & bnd_c5_1 bnd_a772) &
% 9.53/9.03 bnd_ndr1_1 bnd_a772) &
% 9.53/9.03 ~ bnd_c1_2 bnd_a772 bnd_a773) &
% 9.53/9.03 ~ bnd_c4_2 bnd_a772 bnd_a773) &
% 9.53/9.03 bnd_c5_2 bnd_a772 bnd_a773) |
% 9.53/9.03 ((bnd_ndr1_0 &
% 9.53/9.03 (ALL X47.
% 9.53/9.03 bnd_ndr1_1 bnd_a774 -->
% 9.53/9.03 bnd_c1_2 bnd_a774 X47 | ~ bnd_c4_2 bnd_a774 X47)) &
% 9.53/9.03 (ALL X48.
% 9.53/9.03 bnd_ndr1_1 bnd_a774 -->
% 9.53/9.03 bnd_c2_2 bnd_a774 X48 | ~ bnd_c1_2 bnd_a774 X48)) &
% 9.53/9.03 bnd_c3_1 bnd_a774))
% 9.53/9.03 Adding axioms...
% 9.53/9.05 Typedef.type_definition_def
% 18.55/18.00 ...done.
% 18.55/18.01 Ground types: ?'b, TPTP_Interpret.ind
% 18.55/18.01 Translating term (sizes: 1, 1) ...
% 25.77/25.27 Invoking SAT solver...
% 25.96/25.41 Model found:
% 25.96/25.41 Size of types: ?'b: 1, TPTP_Interpret.ind: 1
% 25.96/25.41 bnd_a774: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a773: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a772: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a771: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a770: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a769: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a768: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a767: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a766: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a765: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a764: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a763: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a762: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a761: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a760: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a759: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a758: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a757: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a756: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a755: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a754: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a753: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a752: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a751: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a750: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a749: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a748: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a747: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a746: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a745: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a744: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a743: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a742: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a741: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a740: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a739: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a738: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_c1_1: {(??.TPTP_Interpret.ind0, False)}
% 25.96/25.41 bnd_a737: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a736: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_c2_0: False
% 25.96/25.41 bnd_a735: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a734: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a733: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a732: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a731: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_c3_1: {(??.TPTP_Interpret.ind0, True)}
% 25.96/25.41 bnd_a730: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a729: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_c3_0: False
% 25.96/25.41 bnd_a728: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_a727: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_c3_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, True)})}
% 25.96/25.41 bnd_a726: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_c5_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, False)})}
% 25.96/25.41 bnd_c1_0: False
% 25.96/25.41 bnd_c1_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, False)})}
% 25.96/25.41 bnd_c4_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, False)})}
% 25.96/25.41 bnd_c2_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, False)})}
% 25.96/25.41 bnd_ndr1_1: {(??.TPTP_Interpret.ind0, True)}
% 25.96/25.41 bnd_c4_0: False
% 25.96/25.41 bnd_c2_1: {(??.TPTP_Interpret.ind0, True)}
% 25.96/25.41 bnd_c5_1: {(??.TPTP_Interpret.ind0, True)}
% 25.96/25.41 bnd_a725: ??.TPTP_Interpret.ind0
% 25.96/25.41 bnd_c4_1: {(??.TPTP_Interpret.ind0, True)}
% 25.96/25.41 bnd_ndr1_0: True
% 25.96/25.41 bnd_c5_0: False
% 25.96/25.41
% 25.96/25.41 % SZS status CounterSatisfiable
%------------------------------------------------------------------------------