TSTP Solution File: SYN538+1 by Refute---2015

View Problem - Process Solution

%------------------------------------------------------------------------------
% File     : Refute---2015
% Problem  : SYN538+1 : TPTP v6.4.0. Released v2.1.0.
% Transfm  : none
% Format   : tptp:raw
% Command  : isabelle tptp_refute %d %s

% Computer : n107.star.cs.uiowa.edu
% Model    : x86_64 x86_64
% CPU      : Intel(R) Xeon(R) CPU E5-2609 0 2.40GHz
% Memory   : 32218.75MB
% OS       : Linux 3.10.0-327.10.1.el7.x86_64
% CPULimit : 300s
% DateTime : Thu Apr 14 06:42:18 EDT 2016

% Result   : CounterSatisfiable 23.02s
% Output   : Assurance 0s
% Verified : 
% SZS Type : None (Parsing solution fails)
% Syntax   : Number of formulae    : 0

% Comments : 
%------------------------------------------------------------------------------
%----No solution output by system
%------------------------------------------------------------------------------
%----ORIGINAL SYSTEM OUTPUT
% 0.00/0.03  % Problem  : SYN538+1 : TPTP v6.4.0. Released v2.1.0.
% 0.00/0.04  % Command  : isabelle tptp_refute %d %s
% 0.03/0.22  % Computer : n107.star.cs.uiowa.edu
% 0.03/0.22  % Model    : x86_64 x86_64
% 0.03/0.22  % CPU      : Intel(R) Xeon(R) CPU E5-2609 0 @ 2.40GHz
% 0.03/0.22  % Memory   : 32218.75MB
% 0.03/0.22  % OS       : Linux 3.10.0-327.10.1.el7.x86_64
% 0.03/0.22  % CPULimit : 300
% 0.03/0.22  % DateTime : Sat Apr  9 00:15:09 CDT 2016
% 0.03/0.23  % CPUTime: 
% 6.29/5.83  > val it = (): unit
% 6.59/6.18  Trying to find a model that refutes: ~ (((((((((((((((((((((((((((((((((((((((bnd_ndr1_0 & bnd_c2_1 bnd_a546) &
% 6.59/6.18    bnd_ndr1_1 bnd_a546) &
% 6.59/6.18   bnd_c2_2 bnd_a546 bnd_a547) &
% 6.59/6.18  bnd_c5_2 bnd_a546 bnd_a547) &
% 6.59/6.18                                       ~ bnd_c4_2 bnd_a546 bnd_a547 |
% 6.59/6.18                                       (ALL U.
% 6.59/6.18     bnd_ndr1_0 -->
% 6.59/6.18     (((bnd_ndr1_1 U & ~ bnd_c1_2 U bnd_a548) & bnd_c5_2 U bnd_a548) &
% 6.59/6.18      bnd_c2_2 U bnd_a548 |
% 6.59/6.18      ((bnd_ndr1_1 U & bnd_c5_2 U bnd_a549) & bnd_c2_2 U bnd_a549) &
% 6.59/6.18      ~ bnd_c4_2 U bnd_a549) |
% 6.59/6.18     (ALL V. bnd_ndr1_1 U --> bnd_c1_2 U V | ~ bnd_c5_2 U V))) |
% 6.59/6.18                                      (ALL W.
% 6.59/6.18    bnd_ndr1_0 -->
% 6.59/6.18    (~ bnd_c1_1 W | bnd_c2_1 W) |
% 6.59/6.18    (ALL X. bnd_ndr1_1 W --> ~ bnd_c2_2 W X | ~ bnd_c3_2 W X))) &
% 6.59/6.18                                     (~ bnd_c4_0 | ~ bnd_c2_0)) &
% 6.59/6.18                                    ((bnd_c3_0 | ~ bnd_c4_0) |
% 6.59/6.18                                     bnd_ndr1_0 & ~ bnd_c5_1 bnd_a550)) &
% 6.59/6.18                                   (bnd_c1_0 | bnd_c4_0)) &
% 6.59/6.18                                  (((ALL Y.
% 6.59/6.18  bnd_ndr1_0 --> ~ bnd_c3_1 Y | ~ bnd_c4_1 Y) |
% 6.59/6.18                                    ((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a551) &
% 6.59/6.18                                     (ALL Z.
% 6.59/6.18   bnd_ndr1_1 bnd_a551 -->
% 6.59/6.18   (~ bnd_c4_2 bnd_a551 Z | bnd_c1_2 bnd_a551 Z) | ~ bnd_c3_2 bnd_a551 Z)) &
% 6.59/6.18                                    (ALL X1.
% 6.59/6.18  bnd_ndr1_1 bnd_a551 -->
% 6.59/6.18  (bnd_c5_2 bnd_a551 X1 | ~ bnd_c2_2 bnd_a551 X1) | bnd_c4_2 bnd_a551 X1)) |
% 6.59/6.18                                   ~ bnd_c4_0)) &
% 6.59/6.18                                 ((ALL X2.
% 6.59/6.18                                      bnd_ndr1_0 -->
% 6.59/6.18                                      (bnd_c4_1 X2 | ~ bnd_c3_1 X2) |
% 6.59/6.18                                      (ALL X3.
% 6.59/6.18    bnd_ndr1_1 X2 --> (bnd_c4_2 X2 X3 | bnd_c1_2 X2 X3) | ~ bnd_c3_2 X2 X3)) |
% 6.59/6.18                                  ((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a552) &
% 6.59/6.18                                       bnd_c2_2 bnd_a552 bnd_a553) &
% 6.59/6.18                                      ~ bnd_c3_2 bnd_a552 bnd_a553) &
% 6.59/6.18                                     bnd_c1_2 bnd_a552 bnd_a553) &
% 6.59/6.18                                    bnd_ndr1_1 bnd_a552) &
% 6.59/6.18                                   ~ bnd_c2_2 bnd_a552 bnd_a554) &
% 6.59/6.18                                  ~ bnd_c4_2 bnd_a552 bnd_a554)) &
% 6.59/6.18                                ((bnd_c5_0 | bnd_c1_0) |
% 6.59/6.18                                 (ALL X4.
% 6.59/6.18                                     bnd_ndr1_0 -->
% 6.59/6.18                                     (((bnd_ndr1_1 X4 &
% 6.59/6.18  ~ bnd_c5_2 X4 bnd_a555) &
% 6.59/6.18                                       ~ bnd_c1_2 X4 bnd_a555) &
% 6.59/6.18                                      ~ bnd_c4_2 X4 bnd_a555 |
% 6.59/6.18                                      bnd_c5_1 X4) |
% 6.59/6.18                                     ~ bnd_c3_1 X4))) &
% 6.59/6.18                               ((~ bnd_c3_0 | bnd_c1_0) |
% 6.59/6.18                                (ALL X5.
% 6.59/6.18                                    bnd_ndr1_0 -->
% 6.59/6.18                                    (bnd_c4_1 X5 | bnd_c1_1 X5) |
% 6.59/6.18                                    ~ bnd_c3_1 X5))) &
% 6.59/6.18                              (((ALL X6.
% 6.59/6.18                                    bnd_ndr1_0 -->
% 6.59/6.18                                    (~ bnd_c5_1 X6 |
% 6.59/6.18                                     (ALL X7.
% 6.59/6.18   bnd_ndr1_1 X6 --> (bnd_c1_2 X6 X7 | ~ bnd_c3_2 X6 X7) | bnd_c2_2 X6 X7)) |
% 6.59/6.18                                    bnd_c3_1 X6) |
% 6.59/6.18                                ~ bnd_c2_0) |
% 6.59/6.18                               bnd_c1_0)) &
% 6.59/6.18                             ((bnd_c5_0 |
% 6.59/6.18                               (bnd_ndr1_0 & ~ bnd_c4_1 bnd_a556) &
% 6.59/6.18                               bnd_c5_1 bnd_a556) |
% 6.59/6.18                              (ALL X8.
% 6.59/6.18                                  bnd_ndr1_0 -->
% 6.59/6.18                                  ((bnd_ndr1_1 X8 & bnd_c1_2 X8 bnd_a557) &
% 6.59/6.18                                   ~ bnd_c3_2 X8 bnd_a557 |
% 6.59/6.18                                   bnd_c2_1 X8) |
% 6.59/6.18                                  ((bnd_ndr1_1 X8 & ~ bnd_c5_2 X8 bnd_a558) &
% 6.59/6.18                                   ~ bnd_c3_2 X8 bnd_a558) &
% 6.59/6.18                                  bnd_c2_2 X8 bnd_a558))) &
% 6.59/6.18                            ((bnd_c2_0 |
% 6.59/6.18                              (ALL X9.
% 6.59/6.18                                  bnd_ndr1_0 -->
% 6.59/6.18                                  (((bnd_ndr1_1 X9 & ~ bnd_c1_2 X9 bnd_a559) &
% 6.59/6.18                                    bnd_c3_2 X9 bnd_a559) &
% 6.59/6.18                                   bnd_c4_2 X9 bnd_a559 |
% 6.59/6.18                                   (ALL X10.
% 6.59/6.18                                       bnd_ndr1_1 X9 -->
% 6.59/6.18                                       ~ bnd_c2_2 X9 X10 | bnd_c1_2 X9 X10)) |
% 6.59/6.18                                  (ALL X11.
% 6.59/6.18                                      bnd_ndr1_1 X9 -->
% 6.59/6.18                                      (bnd_c2_2 X9 X11 | bnd_c5_2 X9 X11) |
% 6.59/6.18                                      ~ bnd_c3_2 X9 X11))) |
% 6.59/6.18                             (ALL X12.
% 6.59/6.18                                 bnd_ndr1_0 -->
% 6.59/6.18                                 (~ bnd_c4_1 X12 |
% 6.59/6.18                                  (bnd_ndr1_1 X12 & bnd_c5_2 X12 bnd_a560) &
% 6.59/6.18                                  bnd_c3_2 X12 bnd_a560) |
% 6.59/6.18                                 ~ bnd_c3_1 X12))) &
% 6.59/6.18                           (((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a561) &
% 6.59/6.18                             (ALL X13.
% 6.59/6.18                                 bnd_ndr1_1 bnd_a561 -->
% 6.59/6.18                                 (~ bnd_c5_2 bnd_a561 X13 |
% 6.59/6.18                                  ~ bnd_c4_2 bnd_a561 X13) |
% 6.59/6.18                                 ~ bnd_c2_2 bnd_a561 X13) |
% 6.59/6.18                             (ALL X14.
% 6.59/6.18                                 bnd_ndr1_0 -->
% 6.59/6.18                                 (((bnd_ndr1_1 X14 & bnd_c2_2 X14 bnd_a562) &
% 6.59/6.18                                   bnd_c5_2 X14 bnd_a562) &
% 6.59/6.18                                  ~ bnd_c4_2 X14 bnd_a562 |
% 6.59/6.18                                  ((bnd_ndr1_1 X14 & bnd_c1_2 X14 bnd_a563) &
% 6.59/6.18                                   ~ bnd_c2_2 X14 bnd_a563) &
% 6.59/6.18                                  bnd_c4_2 X14 bnd_a563) |
% 6.59/6.18                                 bnd_c3_1 X14)) |
% 6.59/6.18                            (bnd_ndr1_0 & ~ bnd_c3_1 bnd_a564) &
% 6.59/6.18                            ~ bnd_c1_1 bnd_a564)) &
% 6.59/6.18                          ((bnd_c5_0 | bnd_c4_0) | ~ bnd_c3_0)) &
% 6.59/6.18                         (bnd_c5_0 |
% 6.59/6.18                          (ALL X15.
% 6.59/6.18                              bnd_ndr1_0 -->
% 6.59/6.18                              (~ bnd_c1_1 X15 |
% 6.59/6.18                               (ALL X16.
% 6.59/6.18                                   bnd_ndr1_1 X15 -->
% 6.59/6.18                                   (~ bnd_c5_2 X15 X16 | bnd_c1_2 X15 X16) |
% 6.59/6.18                                   ~ bnd_c4_2 X15 X16)) |
% 6.59/6.18                              bnd_c2_1 X15))) &
% 6.59/6.18                        ((ALL X17.
% 6.59/6.18                             bnd_ndr1_0 -->
% 6.59/6.18                             (bnd_c5_1 X17 | ~ bnd_c4_1 X17) |
% 6.59/6.18                             (ALL X18.
% 6.59/6.18                                 bnd_ndr1_1 X17 -->
% 6.59/6.18                                 (bnd_c3_2 X17 X18 | ~ bnd_c2_2 X17 X18) |
% 6.59/6.18                                 bnd_c1_2 X17 X18)) |
% 6.59/6.18                         ~ bnd_c3_0)) &
% 6.59/6.18                       ((~ bnd_c5_0 | ~ bnd_c3_0) |
% 6.59/6.18                        (bnd_ndr1_0 & ~ bnd_c1_1 bnd_a565) &
% 6.59/6.18                        (ALL X19.
% 6.59/6.18                            bnd_ndr1_1 bnd_a565 -->
% 6.59/6.18                            ~ bnd_c1_2 bnd_a565 X19 |
% 6.59/6.18                            ~ bnd_c2_2 bnd_a565 X19))) &
% 6.59/6.18                      ((ALL X20.
% 6.59/6.18                           bnd_ndr1_0 -->
% 6.59/6.18                           ((ALL X21.
% 6.59/6.18                                bnd_ndr1_1 X20 -->
% 6.59/6.18                                (~ bnd_c4_2 X20 X21 | ~ bnd_c2_2 X20 X21) |
% 6.59/6.18                                bnd_c3_2 X20 X21) |
% 6.59/6.18                            ((bnd_ndr1_1 X20 & ~ bnd_c2_2 X20 bnd_a566) &
% 6.59/6.18                             ~ bnd_c3_2 X20 bnd_a566) &
% 6.59/6.18                            bnd_c4_2 X20 bnd_a566) |
% 6.59/6.18                           ~ bnd_c1_1 X20) |
% 6.59/6.18                       (ALL X22.
% 6.59/6.18                           bnd_ndr1_0 --> ~ bnd_c5_1 X22 | ~ bnd_c2_1 X22))) &
% 6.59/6.18                     ((((((bnd_ndr1_0 & bnd_c1_1 bnd_a567) &
% 6.59/6.18                          bnd_ndr1_1 bnd_a567) &
% 6.59/6.18                         ~ bnd_c1_2 bnd_a567 bnd_a568) &
% 6.59/6.18                        bnd_c4_2 bnd_a567 bnd_a568) &
% 6.59/6.18                       bnd_c2_1 bnd_a567 |
% 6.59/6.18                       ((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a569) &
% 6.59/6.18                        ~ bnd_c2_1 bnd_a569) &
% 6.59/6.18                       (ALL X23.
% 6.59/6.18                           bnd_ndr1_1 bnd_a569 -->
% 6.59/6.18                           ~ bnd_c2_2 bnd_a569 X23 | bnd_c3_2 bnd_a569 X23)) |
% 6.59/6.18                      bnd_c5_0)) &
% 6.59/6.18                    (((ALL X24.
% 6.59/6.18                          bnd_ndr1_0 -->
% 6.59/6.18                          (((bnd_ndr1_1 X24 & ~ bnd_c2_2 X24 bnd_a570) &
% 6.59/6.18                            ~ bnd_c3_2 X24 bnd_a570) &
% 6.59/6.18                           ~ bnd_c4_2 X24 bnd_a570 |
% 6.59/6.18                           ~ bnd_c5_1 X24) |
% 6.59/6.18                          (ALL X25.
% 6.59/6.18                              bnd_ndr1_1 X24 -->
% 6.59/6.18                              ~ bnd_c5_2 X24 X25 | bnd_c2_2 X24 X25)) |
% 6.59/6.18                      bnd_c5_0) |
% 6.59/6.18                     ~ bnd_c2_0)) &
% 6.59/6.18                   ((((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a571) &
% 6.59/6.18                            ~ bnd_c3_2 bnd_a571 bnd_a572) &
% 6.59/6.18                           ~ bnd_c1_2 bnd_a571 bnd_a572) &
% 6.59/6.18                          bnd_c5_2 bnd_a571 bnd_a572) &
% 6.59/6.18                         bnd_ndr1_1 bnd_a571) &
% 6.59/6.18                        bnd_c3_2 bnd_a571 bnd_a573) &
% 6.59/6.18                       ~ bnd_c4_2 bnd_a571 bnd_a573) &
% 6.59/6.18                      bnd_c1_2 bnd_a571 bnd_a573) &
% 6.59/6.18                     bnd_c1_1 bnd_a571 |
% 6.59/6.18                     (ALL X26.
% 6.59/6.18                         bnd_ndr1_0 -->
% 6.59/6.18                         (~ bnd_c2_1 X26 | bnd_c1_1 X26) | ~ bnd_c4_1 X26)) |
% 6.59/6.18                    ~ bnd_c2_0)) &
% 6.59/6.18                  ((((bnd_ndr1_0 &
% 6.59/6.18                      (ALL X27.
% 6.59/6.18                          bnd_ndr1_1 bnd_a574 -->
% 6.59/6.18                          (bnd_c4_2 bnd_a574 X27 | ~ bnd_c1_2 bnd_a574 X27) |
% 6.59/6.18                          bnd_c3_2 bnd_a574 X27)) &
% 6.59/6.18                     bnd_c5_1 bnd_a574) &
% 6.59/6.18                    ~ bnd_c1_1 bnd_a574 |
% 6.59/6.18                    bnd_c5_0) |
% 6.59/6.18                   (ALL X28.
% 6.59/6.18                       bnd_ndr1_0 -->
% 6.59/6.18                       (~ bnd_c5_1 X28 |
% 6.59/6.18                        (ALL X29.
% 6.59/6.18                            bnd_ndr1_1 X28 -->
% 6.59/6.18                            (bnd_c2_2 X28 X29 | ~ bnd_c1_2 X28 X29) |
% 6.59/6.18                            ~ bnd_c3_2 X28 X29)) |
% 6.59/6.18                       bnd_c2_1 X28))) &
% 6.59/6.18                 (((ALL X30.
% 6.59/6.18                       bnd_ndr1_0 -->
% 6.59/6.18                       ((ALL X31.
% 6.59/6.18                            bnd_ndr1_1 X30 -->
% 6.59/6.18                            (bnd_c3_2 X30 X31 | ~ bnd_c4_2 X30 X31) |
% 6.59/6.18                            bnd_c1_2 X30 X31) |
% 6.59/6.18                        (ALL X32.
% 6.59/6.18                            bnd_ndr1_1 X30 -->
% 6.59/6.18                            bnd_c2_2 X30 X32 | bnd_c4_2 X30 X32)) |
% 6.59/6.18                       bnd_c5_1 X30) |
% 6.59/6.18                   bnd_c4_0) |
% 6.59/6.18                  bnd_c1_0)) &
% 6.59/6.18                ((ALL X33.
% 6.59/6.18                     bnd_ndr1_0 -->
% 6.59/6.18                     (((bnd_ndr1_1 X33 & ~ bnd_c3_2 X33 bnd_a575) &
% 6.59/6.18                       bnd_c2_2 X33 bnd_a575) &
% 6.59/6.18                      bnd_c1_2 X33 bnd_a575 |
% 6.59/6.18                      ~ bnd_c4_1 X33) |
% 6.59/6.18                     bnd_c2_1 X33) |
% 6.59/6.18                 (ALL X34. bnd_ndr1_0 --> ~ bnd_c3_1 X34 | bnd_c4_1 X34))) &
% 6.59/6.18               ((bnd_c3_0 | ~ bnd_c2_0) | bnd_c1_0)) &
% 6.59/6.18              (bnd_c2_0 | (ALL X35. bnd_ndr1_0 --> ~ bnd_c2_1 X35))) &
% 6.59/6.18             (((ALL X36.
% 6.59/6.18                   bnd_ndr1_0 -->
% 6.59/6.18                   ((bnd_ndr1_1 X36 & ~ bnd_c5_2 X36 bnd_a576) &
% 6.59/6.18                    bnd_c2_2 X36 bnd_a576 |
% 6.59/6.18                    ~ bnd_c2_1 X36) |
% 6.59/6.18                   bnd_c3_1 X36) |
% 6.59/6.18               (bnd_ndr1_0 & bnd_c1_1 bnd_a577) & bnd_c4_1 bnd_a577) |
% 6.59/6.18              bnd_c1_0)) &
% 6.59/6.18            ((~ bnd_c4_0 |
% 6.59/6.18              ((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a578) &
% 6.59/6.18               (ALL X37.
% 6.59/6.18                   bnd_ndr1_1 bnd_a578 -->
% 6.59/6.18                   bnd_c4_2 bnd_a578 X37 | ~ bnd_c5_2 bnd_a578 X37)) &
% 6.59/6.18              bnd_c5_1 bnd_a578) |
% 6.59/6.18             bnd_c3_0)) &
% 6.59/6.18           (((ALL X38.
% 6.59/6.18                 bnd_ndr1_0 -->
% 6.59/6.18                 ((ALL X39.
% 6.59/6.18                      bnd_ndr1_1 X38 -->
% 6.59/6.18                      ~ bnd_c1_2 X38 X39 | bnd_c5_2 X38 X39) |
% 6.59/6.18                  bnd_c5_1 X38) |
% 6.59/6.18                 ~ bnd_c4_1 X38) |
% 6.59/6.18             (ALL X40. bnd_ndr1_0 --> ~ bnd_c3_1 X40)) |
% 6.59/6.18            (ALL X41.
% 6.59/6.18                bnd_ndr1_0 -->
% 6.59/6.18                (~ bnd_c3_1 X41 |
% 6.59/6.18                 (bnd_ndr1_1 X41 & bnd_c3_2 X41 bnd_a579) &
% 6.59/6.18                 ~ bnd_c2_2 X41 bnd_a579) |
% 6.59/6.18                (bnd_ndr1_1 X41 & ~ bnd_c1_2 X41 bnd_a580) &
% 6.59/6.18                bnd_c2_2 X41 bnd_a580))) &
% 6.59/6.18          ((ALL X42.
% 6.59/6.18               bnd_ndr1_0 -->
% 6.59/6.18               (~ bnd_c2_1 X42 | ~ bnd_c4_1 X42) | bnd_c3_1 X42) |
% 6.59/6.18           bnd_c3_0)) &
% 6.59/6.18         (((ALL X43.
% 6.59/6.18               bnd_ndr1_0 -->
% 6.59/6.18               (bnd_c4_1 X43 | bnd_c5_1 X43) |
% 6.59/6.18               (ALL X44.
% 6.59/6.18                   bnd_ndr1_1 X43 -->
% 6.59/6.18                   (~ bnd_c1_2 X43 X44 | bnd_c4_2 X43 X44) |
% 6.59/6.18                   ~ bnd_c5_2 X43 X44)) |
% 6.59/6.18           ~ bnd_c2_0) |
% 6.59/6.18          (((((bnd_ndr1_0 & bnd_c3_1 bnd_a581) & ~ bnd_c2_1 bnd_a581) &
% 6.59/6.18             bnd_ndr1_1 bnd_a581) &
% 6.59/6.18            ~ bnd_c2_2 bnd_a581 bnd_a582) &
% 6.59/6.18           bnd_c5_2 bnd_a581 bnd_a582) &
% 6.59/6.18          bnd_c1_2 bnd_a581 bnd_a582)) &
% 6.59/6.18        ((bnd_c4_0 |
% 6.59/6.18          ((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a583) & bnd_c3_1 bnd_a583) &
% 6.59/6.18          bnd_c5_1 bnd_a583) |
% 6.59/6.18         (bnd_ndr1_0 & ~ bnd_c2_1 bnd_a584) & ~ bnd_c5_1 bnd_a584)) &
% 6.59/6.18       ((~ bnd_c4_0 |
% 6.59/6.18         ((bnd_ndr1_0 & bnd_c2_1 bnd_a585) & ~ bnd_c1_1 bnd_a585) &
% 6.59/6.18         bnd_c5_1 bnd_a585) |
% 6.59/6.18        ~ bnd_c1_0)) &
% 6.59/6.18      (~ bnd_c1_0 | bnd_c3_0)) &
% 6.59/6.18     (((ALL X45.
% 6.59/6.18           bnd_ndr1_0 --> (bnd_c4_1 X45 | bnd_c1_1 X45) | bnd_c5_1 X45) |
% 6.59/6.18       ~ bnd_c3_0) |
% 6.59/6.18      (ALL X46.
% 6.59/6.18          bnd_ndr1_0 -->
% 6.59/6.18          (((bnd_ndr1_1 X46 & ~ bnd_c4_2 X46 bnd_a586) &
% 6.59/6.18            ~ bnd_c1_2 X46 bnd_a586) &
% 6.59/6.18           bnd_c5_2 X46 bnd_a586 |
% 6.59/6.18           ~ bnd_c5_1 X46) |
% 6.59/6.18          (ALL X47.
% 6.59/6.18              bnd_ndr1_1 X46 --> bnd_c3_2 X46 X47 | ~ bnd_c5_2 X46 X47))))
% 8.99/8.56  Unfolded term: ~ (((((((((((((((((((((((((((((((((((((((bnd_ndr1_0 & bnd_c2_1 bnd_a546) &
% 8.99/8.56    bnd_ndr1_1 bnd_a546) &
% 8.99/8.56   bnd_c2_2 bnd_a546 bnd_a547) &
% 8.99/8.56  bnd_c5_2 bnd_a546 bnd_a547) &
% 8.99/8.56                                       ~ bnd_c4_2 bnd_a546 bnd_a547 |
% 8.99/8.56                                       (ALL U.
% 8.99/8.56     bnd_ndr1_0 -->
% 8.99/8.56     (((bnd_ndr1_1 U & ~ bnd_c1_2 U bnd_a548) & bnd_c5_2 U bnd_a548) &
% 8.99/8.56      bnd_c2_2 U bnd_a548 |
% 8.99/8.56      ((bnd_ndr1_1 U & bnd_c5_2 U bnd_a549) & bnd_c2_2 U bnd_a549) &
% 8.99/8.56      ~ bnd_c4_2 U bnd_a549) |
% 8.99/8.56     (ALL V. bnd_ndr1_1 U --> bnd_c1_2 U V | ~ bnd_c5_2 U V))) |
% 8.99/8.56                                      (ALL W.
% 8.99/8.56    bnd_ndr1_0 -->
% 8.99/8.56    (~ bnd_c1_1 W | bnd_c2_1 W) |
% 8.99/8.56    (ALL X. bnd_ndr1_1 W --> ~ bnd_c2_2 W X | ~ bnd_c3_2 W X))) &
% 8.99/8.56                                     (~ bnd_c4_0 | ~ bnd_c2_0)) &
% 8.99/8.56                                    ((bnd_c3_0 | ~ bnd_c4_0) |
% 8.99/8.56                                     bnd_ndr1_0 & ~ bnd_c5_1 bnd_a550)) &
% 8.99/8.56                                   (bnd_c1_0 | bnd_c4_0)) &
% 8.99/8.56                                  (((ALL Y.
% 8.99/8.56  bnd_ndr1_0 --> ~ bnd_c3_1 Y | ~ bnd_c4_1 Y) |
% 8.99/8.56                                    ((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a551) &
% 8.99/8.56                                     (ALL Z.
% 8.99/8.56   bnd_ndr1_1 bnd_a551 -->
% 8.99/8.56   (~ bnd_c4_2 bnd_a551 Z | bnd_c1_2 bnd_a551 Z) | ~ bnd_c3_2 bnd_a551 Z)) &
% 8.99/8.56                                    (ALL X1.
% 8.99/8.56  bnd_ndr1_1 bnd_a551 -->
% 8.99/8.56  (bnd_c5_2 bnd_a551 X1 | ~ bnd_c2_2 bnd_a551 X1) | bnd_c4_2 bnd_a551 X1)) |
% 8.99/8.56                                   ~ bnd_c4_0)) &
% 8.99/8.56                                 ((ALL X2.
% 8.99/8.56                                      bnd_ndr1_0 -->
% 8.99/8.56                                      (bnd_c4_1 X2 | ~ bnd_c3_1 X2) |
% 8.99/8.56                                      (ALL X3.
% 8.99/8.56    bnd_ndr1_1 X2 --> (bnd_c4_2 X2 X3 | bnd_c1_2 X2 X3) | ~ bnd_c3_2 X2 X3)) |
% 8.99/8.56                                  ((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a552) &
% 8.99/8.56                                       bnd_c2_2 bnd_a552 bnd_a553) &
% 8.99/8.56                                      ~ bnd_c3_2 bnd_a552 bnd_a553) &
% 8.99/8.56                                     bnd_c1_2 bnd_a552 bnd_a553) &
% 8.99/8.56                                    bnd_ndr1_1 bnd_a552) &
% 8.99/8.56                                   ~ bnd_c2_2 bnd_a552 bnd_a554) &
% 8.99/8.56                                  ~ bnd_c4_2 bnd_a552 bnd_a554)) &
% 8.99/8.56                                ((bnd_c5_0 | bnd_c1_0) |
% 8.99/8.56                                 (ALL X4.
% 8.99/8.56                                     bnd_ndr1_0 -->
% 8.99/8.56                                     (((bnd_ndr1_1 X4 &
% 8.99/8.56  ~ bnd_c5_2 X4 bnd_a555) &
% 8.99/8.56                                       ~ bnd_c1_2 X4 bnd_a555) &
% 8.99/8.56                                      ~ bnd_c4_2 X4 bnd_a555 |
% 8.99/8.56                                      bnd_c5_1 X4) |
% 8.99/8.56                                     ~ bnd_c3_1 X4))) &
% 8.99/8.56                               ((~ bnd_c3_0 | bnd_c1_0) |
% 8.99/8.56                                (ALL X5.
% 8.99/8.56                                    bnd_ndr1_0 -->
% 8.99/8.56                                    (bnd_c4_1 X5 | bnd_c1_1 X5) |
% 8.99/8.56                                    ~ bnd_c3_1 X5))) &
% 8.99/8.56                              (((ALL X6.
% 8.99/8.56                                    bnd_ndr1_0 -->
% 8.99/8.56                                    (~ bnd_c5_1 X6 |
% 8.99/8.56                                     (ALL X7.
% 8.99/8.56   bnd_ndr1_1 X6 --> (bnd_c1_2 X6 X7 | ~ bnd_c3_2 X6 X7) | bnd_c2_2 X6 X7)) |
% 8.99/8.56                                    bnd_c3_1 X6) |
% 8.99/8.56                                ~ bnd_c2_0) |
% 8.99/8.56                               bnd_c1_0)) &
% 8.99/8.56                             ((bnd_c5_0 |
% 8.99/8.56                               (bnd_ndr1_0 & ~ bnd_c4_1 bnd_a556) &
% 8.99/8.56                               bnd_c5_1 bnd_a556) |
% 8.99/8.56                              (ALL X8.
% 8.99/8.56                                  bnd_ndr1_0 -->
% 8.99/8.56                                  ((bnd_ndr1_1 X8 & bnd_c1_2 X8 bnd_a557) &
% 8.99/8.56                                   ~ bnd_c3_2 X8 bnd_a557 |
% 8.99/8.56                                   bnd_c2_1 X8) |
% 8.99/8.56                                  ((bnd_ndr1_1 X8 & ~ bnd_c5_2 X8 bnd_a558) &
% 8.99/8.56                                   ~ bnd_c3_2 X8 bnd_a558) &
% 8.99/8.56                                  bnd_c2_2 X8 bnd_a558))) &
% 8.99/8.56                            ((bnd_c2_0 |
% 8.99/8.56                              (ALL X9.
% 8.99/8.56                                  bnd_ndr1_0 -->
% 8.99/8.56                                  (((bnd_ndr1_1 X9 & ~ bnd_c1_2 X9 bnd_a559) &
% 8.99/8.56                                    bnd_c3_2 X9 bnd_a559) &
% 8.99/8.56                                   bnd_c4_2 X9 bnd_a559 |
% 8.99/8.56                                   (ALL X10.
% 8.99/8.56                                       bnd_ndr1_1 X9 -->
% 8.99/8.56                                       ~ bnd_c2_2 X9 X10 | bnd_c1_2 X9 X10)) |
% 8.99/8.56                                  (ALL X11.
% 8.99/8.56                                      bnd_ndr1_1 X9 -->
% 8.99/8.56                                      (bnd_c2_2 X9 X11 | bnd_c5_2 X9 X11) |
% 8.99/8.56                                      ~ bnd_c3_2 X9 X11))) |
% 8.99/8.56                             (ALL X12.
% 8.99/8.56                                 bnd_ndr1_0 -->
% 8.99/8.56                                 (~ bnd_c4_1 X12 |
% 8.99/8.56                                  (bnd_ndr1_1 X12 & bnd_c5_2 X12 bnd_a560) &
% 8.99/8.56                                  bnd_c3_2 X12 bnd_a560) |
% 8.99/8.56                                 ~ bnd_c3_1 X12))) &
% 8.99/8.56                           (((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a561) &
% 8.99/8.56                             (ALL X13.
% 8.99/8.56                                 bnd_ndr1_1 bnd_a561 -->
% 8.99/8.56                                 (~ bnd_c5_2 bnd_a561 X13 |
% 8.99/8.56                                  ~ bnd_c4_2 bnd_a561 X13) |
% 8.99/8.56                                 ~ bnd_c2_2 bnd_a561 X13) |
% 8.99/8.56                             (ALL X14.
% 8.99/8.56                                 bnd_ndr1_0 -->
% 8.99/8.56                                 (((bnd_ndr1_1 X14 & bnd_c2_2 X14 bnd_a562) &
% 8.99/8.56                                   bnd_c5_2 X14 bnd_a562) &
% 8.99/8.56                                  ~ bnd_c4_2 X14 bnd_a562 |
% 8.99/8.56                                  ((bnd_ndr1_1 X14 & bnd_c1_2 X14 bnd_a563) &
% 8.99/8.56                                   ~ bnd_c2_2 X14 bnd_a563) &
% 8.99/8.56                                  bnd_c4_2 X14 bnd_a563) |
% 8.99/8.56                                 bnd_c3_1 X14)) |
% 8.99/8.56                            (bnd_ndr1_0 & ~ bnd_c3_1 bnd_a564) &
% 8.99/8.56                            ~ bnd_c1_1 bnd_a564)) &
% 8.99/8.56                          ((bnd_c5_0 | bnd_c4_0) | ~ bnd_c3_0)) &
% 8.99/8.56                         (bnd_c5_0 |
% 8.99/8.56                          (ALL X15.
% 8.99/8.56                              bnd_ndr1_0 -->
% 8.99/8.56                              (~ bnd_c1_1 X15 |
% 8.99/8.56                               (ALL X16.
% 8.99/8.56                                   bnd_ndr1_1 X15 -->
% 8.99/8.56                                   (~ bnd_c5_2 X15 X16 | bnd_c1_2 X15 X16) |
% 8.99/8.56                                   ~ bnd_c4_2 X15 X16)) |
% 8.99/8.56                              bnd_c2_1 X15))) &
% 8.99/8.56                        ((ALL X17.
% 8.99/8.56                             bnd_ndr1_0 -->
% 8.99/8.56                             (bnd_c5_1 X17 | ~ bnd_c4_1 X17) |
% 8.99/8.56                             (ALL X18.
% 8.99/8.56                                 bnd_ndr1_1 X17 -->
% 8.99/8.56                                 (bnd_c3_2 X17 X18 | ~ bnd_c2_2 X17 X18) |
% 8.99/8.56                                 bnd_c1_2 X17 X18)) |
% 8.99/8.56                         ~ bnd_c3_0)) &
% 8.99/8.56                       ((~ bnd_c5_0 | ~ bnd_c3_0) |
% 8.99/8.56                        (bnd_ndr1_0 & ~ bnd_c1_1 bnd_a565) &
% 8.99/8.56                        (ALL X19.
% 8.99/8.56                            bnd_ndr1_1 bnd_a565 -->
% 8.99/8.56                            ~ bnd_c1_2 bnd_a565 X19 |
% 8.99/8.56                            ~ bnd_c2_2 bnd_a565 X19))) &
% 8.99/8.56                      ((ALL X20.
% 8.99/8.56                           bnd_ndr1_0 -->
% 8.99/8.56                           ((ALL X21.
% 8.99/8.56                                bnd_ndr1_1 X20 -->
% 8.99/8.56                                (~ bnd_c4_2 X20 X21 | ~ bnd_c2_2 X20 X21) |
% 8.99/8.56                                bnd_c3_2 X20 X21) |
% 8.99/8.56                            ((bnd_ndr1_1 X20 & ~ bnd_c2_2 X20 bnd_a566) &
% 8.99/8.56                             ~ bnd_c3_2 X20 bnd_a566) &
% 8.99/8.56                            bnd_c4_2 X20 bnd_a566) |
% 8.99/8.56                           ~ bnd_c1_1 X20) |
% 8.99/8.56                       (ALL X22.
% 8.99/8.56                           bnd_ndr1_0 --> ~ bnd_c5_1 X22 | ~ bnd_c2_1 X22))) &
% 8.99/8.56                     ((((((bnd_ndr1_0 & bnd_c1_1 bnd_a567) &
% 8.99/8.56                          bnd_ndr1_1 bnd_a567) &
% 8.99/8.56                         ~ bnd_c1_2 bnd_a567 bnd_a568) &
% 8.99/8.56                        bnd_c4_2 bnd_a567 bnd_a568) &
% 8.99/8.56                       bnd_c2_1 bnd_a567 |
% 8.99/8.56                       ((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a569) &
% 8.99/8.56                        ~ bnd_c2_1 bnd_a569) &
% 8.99/8.56                       (ALL X23.
% 8.99/8.56                           bnd_ndr1_1 bnd_a569 -->
% 8.99/8.56                           ~ bnd_c2_2 bnd_a569 X23 | bnd_c3_2 bnd_a569 X23)) |
% 8.99/8.56                      bnd_c5_0)) &
% 8.99/8.56                    (((ALL X24.
% 8.99/8.56                          bnd_ndr1_0 -->
% 8.99/8.56                          (((bnd_ndr1_1 X24 & ~ bnd_c2_2 X24 bnd_a570) &
% 8.99/8.56                            ~ bnd_c3_2 X24 bnd_a570) &
% 8.99/8.56                           ~ bnd_c4_2 X24 bnd_a570 |
% 8.99/8.56                           ~ bnd_c5_1 X24) |
% 8.99/8.56                          (ALL X25.
% 8.99/8.56                              bnd_ndr1_1 X24 -->
% 8.99/8.56                              ~ bnd_c5_2 X24 X25 | bnd_c2_2 X24 X25)) |
% 8.99/8.56                      bnd_c5_0) |
% 8.99/8.56                     ~ bnd_c2_0)) &
% 8.99/8.56                   ((((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a571) &
% 8.99/8.56                            ~ bnd_c3_2 bnd_a571 bnd_a572) &
% 8.99/8.56                           ~ bnd_c1_2 bnd_a571 bnd_a572) &
% 8.99/8.56                          bnd_c5_2 bnd_a571 bnd_a572) &
% 8.99/8.56                         bnd_ndr1_1 bnd_a571) &
% 8.99/8.56                        bnd_c3_2 bnd_a571 bnd_a573) &
% 8.99/8.56                       ~ bnd_c4_2 bnd_a571 bnd_a573) &
% 8.99/8.56                      bnd_c1_2 bnd_a571 bnd_a573) &
% 8.99/8.56                     bnd_c1_1 bnd_a571 |
% 8.99/8.56                     (ALL X26.
% 8.99/8.56                         bnd_ndr1_0 -->
% 8.99/8.56                         (~ bnd_c2_1 X26 | bnd_c1_1 X26) | ~ bnd_c4_1 X26)) |
% 8.99/8.56                    ~ bnd_c2_0)) &
% 8.99/8.56                  ((((bnd_ndr1_0 &
% 8.99/8.56                      (ALL X27.
% 8.99/8.56                          bnd_ndr1_1 bnd_a574 -->
% 8.99/8.56                          (bnd_c4_2 bnd_a574 X27 | ~ bnd_c1_2 bnd_a574 X27) |
% 8.99/8.56                          bnd_c3_2 bnd_a574 X27)) &
% 8.99/8.56                     bnd_c5_1 bnd_a574) &
% 8.99/8.56                    ~ bnd_c1_1 bnd_a574 |
% 8.99/8.56                    bnd_c5_0) |
% 8.99/8.56                   (ALL X28.
% 8.99/8.56                       bnd_ndr1_0 -->
% 8.99/8.56                       (~ bnd_c5_1 X28 |
% 8.99/8.56                        (ALL X29.
% 8.99/8.56                            bnd_ndr1_1 X28 -->
% 8.99/8.56                            (bnd_c2_2 X28 X29 | ~ bnd_c1_2 X28 X29) |
% 8.99/8.56                            ~ bnd_c3_2 X28 X29)) |
% 8.99/8.56                       bnd_c2_1 X28))) &
% 8.99/8.56                 (((ALL X30.
% 8.99/8.56                       bnd_ndr1_0 -->
% 8.99/8.56                       ((ALL X31.
% 8.99/8.56                            bnd_ndr1_1 X30 -->
% 8.99/8.56                            (bnd_c3_2 X30 X31 | ~ bnd_c4_2 X30 X31) |
% 8.99/8.56                            bnd_c1_2 X30 X31) |
% 8.99/8.56                        (ALL X32.
% 8.99/8.56                            bnd_ndr1_1 X30 -->
% 8.99/8.56                            bnd_c2_2 X30 X32 | bnd_c4_2 X30 X32)) |
% 8.99/8.56                       bnd_c5_1 X30) |
% 8.99/8.56                   bnd_c4_0) |
% 8.99/8.56                  bnd_c1_0)) &
% 8.99/8.56                ((ALL X33.
% 8.99/8.56                     bnd_ndr1_0 -->
% 8.99/8.56                     (((bnd_ndr1_1 X33 & ~ bnd_c3_2 X33 bnd_a575) &
% 8.99/8.56                       bnd_c2_2 X33 bnd_a575) &
% 8.99/8.56                      bnd_c1_2 X33 bnd_a575 |
% 8.99/8.56                      ~ bnd_c4_1 X33) |
% 8.99/8.56                     bnd_c2_1 X33) |
% 8.99/8.56                 (ALL X34. bnd_ndr1_0 --> ~ bnd_c3_1 X34 | bnd_c4_1 X34))) &
% 8.99/8.56               ((bnd_c3_0 | ~ bnd_c2_0) | bnd_c1_0)) &
% 8.99/8.56              (bnd_c2_0 | (ALL X35. bnd_ndr1_0 --> ~ bnd_c2_1 X35))) &
% 8.99/8.56             (((ALL X36.
% 8.99/8.56                   bnd_ndr1_0 -->
% 8.99/8.56                   ((bnd_ndr1_1 X36 & ~ bnd_c5_2 X36 bnd_a576) &
% 8.99/8.56                    bnd_c2_2 X36 bnd_a576 |
% 8.99/8.56                    ~ bnd_c2_1 X36) |
% 8.99/8.56                   bnd_c3_1 X36) |
% 8.99/8.56               (bnd_ndr1_0 & bnd_c1_1 bnd_a577) & bnd_c4_1 bnd_a577) |
% 8.99/8.56              bnd_c1_0)) &
% 8.99/8.56            ((~ bnd_c4_0 |
% 8.99/8.56              ((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a578) &
% 8.99/8.56               (ALL X37.
% 8.99/8.56                   bnd_ndr1_1 bnd_a578 -->
% 8.99/8.56                   bnd_c4_2 bnd_a578 X37 | ~ bnd_c5_2 bnd_a578 X37)) &
% 8.99/8.56              bnd_c5_1 bnd_a578) |
% 8.99/8.56             bnd_c3_0)) &
% 8.99/8.56           (((ALL X38.
% 8.99/8.56                 bnd_ndr1_0 -->
% 8.99/8.56                 ((ALL X39.
% 8.99/8.56                      bnd_ndr1_1 X38 -->
% 8.99/8.56                      ~ bnd_c1_2 X38 X39 | bnd_c5_2 X38 X39) |
% 8.99/8.56                  bnd_c5_1 X38) |
% 8.99/8.56                 ~ bnd_c4_1 X38) |
% 8.99/8.56             (ALL X40. bnd_ndr1_0 --> ~ bnd_c3_1 X40)) |
% 8.99/8.56            (ALL X41.
% 8.99/8.56                bnd_ndr1_0 -->
% 8.99/8.56                (~ bnd_c3_1 X41 |
% 8.99/8.56                 (bnd_ndr1_1 X41 & bnd_c3_2 X41 bnd_a579) &
% 8.99/8.56                 ~ bnd_c2_2 X41 bnd_a579) |
% 8.99/8.56                (bnd_ndr1_1 X41 & ~ bnd_c1_2 X41 bnd_a580) &
% 8.99/8.56                bnd_c2_2 X41 bnd_a580))) &
% 8.99/8.56          ((ALL X42.
% 8.99/8.56               bnd_ndr1_0 -->
% 8.99/8.56               (~ bnd_c2_1 X42 | ~ bnd_c4_1 X42) | bnd_c3_1 X42) |
% 8.99/8.56           bnd_c3_0)) &
% 8.99/8.56         (((ALL X43.
% 8.99/8.56               bnd_ndr1_0 -->
% 8.99/8.56               (bnd_c4_1 X43 | bnd_c5_1 X43) |
% 8.99/8.56               (ALL X44.
% 8.99/8.56                   bnd_ndr1_1 X43 -->
% 8.99/8.56                   (~ bnd_c1_2 X43 X44 | bnd_c4_2 X43 X44) |
% 8.99/8.56                   ~ bnd_c5_2 X43 X44)) |
% 8.99/8.56           ~ bnd_c2_0) |
% 8.99/8.56          (((((bnd_ndr1_0 & bnd_c3_1 bnd_a581) & ~ bnd_c2_1 bnd_a581) &
% 8.99/8.56             bnd_ndr1_1 bnd_a581) &
% 8.99/8.56            ~ bnd_c2_2 bnd_a581 bnd_a582) &
% 8.99/8.56           bnd_c5_2 bnd_a581 bnd_a582) &
% 8.99/8.56          bnd_c1_2 bnd_a581 bnd_a582)) &
% 8.99/8.56        ((bnd_c4_0 |
% 8.99/8.56          ((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a583) & bnd_c3_1 bnd_a583) &
% 8.99/8.56          bnd_c5_1 bnd_a583) |
% 8.99/8.56         (bnd_ndr1_0 & ~ bnd_c2_1 bnd_a584) & ~ bnd_c5_1 bnd_a584)) &
% 8.99/8.56       ((~ bnd_c4_0 |
% 8.99/8.56         ((bnd_ndr1_0 & bnd_c2_1 bnd_a585) & ~ bnd_c1_1 bnd_a585) &
% 8.99/8.56         bnd_c5_1 bnd_a585) |
% 8.99/8.56        ~ bnd_c1_0)) &
% 8.99/8.56      (~ bnd_c1_0 | bnd_c3_0)) &
% 8.99/8.56     (((ALL X45.
% 8.99/8.56           bnd_ndr1_0 --> (bnd_c4_1 X45 | bnd_c1_1 X45) | bnd_c5_1 X45) |
% 8.99/8.56       ~ bnd_c3_0) |
% 8.99/8.56      (ALL X46.
% 8.99/8.56          bnd_ndr1_0 -->
% 8.99/8.56          (((bnd_ndr1_1 X46 & ~ bnd_c4_2 X46 bnd_a586) &
% 8.99/8.56            ~ bnd_c1_2 X46 bnd_a586) &
% 8.99/8.56           bnd_c5_2 X46 bnd_a586 |
% 8.99/8.56           ~ bnd_c5_1 X46) |
% 8.99/8.56          (ALL X47.
% 8.99/8.56              bnd_ndr1_1 X46 --> bnd_c3_2 X46 X47 | ~ bnd_c5_2 X46 X47))))
% 8.99/8.56  Adding axioms...
% 8.99/8.59  Typedef.type_definition_def
% 16.50/16.03   ...done.
% 16.50/16.04  Ground types: ?'b, TPTP_Interpret.ind
% 16.50/16.04  Translating term (sizes: 1, 1) ...
% 22.92/22.45  Invoking SAT solver...
% 23.02/22.56  Model found:
% 23.02/22.56  Size of types: ?'b: 1, TPTP_Interpret.ind: 1
% 23.02/22.56  bnd_a586: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a585: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a584: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a583: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a582: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a581: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a580: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a579: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a578: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a577: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a576: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a575: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a574: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a573: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a572: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a571: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a570: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a569: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a568: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a567: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a566: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a565: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a564: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a563: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a562: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a561: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a560: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a559: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a558: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a557: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a556: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a555: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_c5_0: True
% 23.02/22.56  bnd_a554: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a553: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a552: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a551: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_c4_1: {(??.TPTP_Interpret.ind0, False)}
% 23.02/22.56  bnd_c3_1: {(??.TPTP_Interpret.ind0, True)}
% 23.02/22.56  bnd_c1_0: True
% 23.02/22.56  bnd_a550: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_c5_1: {(??.TPTP_Interpret.ind0, True)}
% 23.02/22.56  bnd_c3_0: True
% 23.02/22.56  bnd_c2_0: False
% 23.02/22.56  bnd_c4_0: False
% 23.02/22.56  bnd_c3_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, False)})}
% 23.02/22.56  bnd_c1_1: {(??.TPTP_Interpret.ind0, False)}
% 23.02/22.56  bnd_a549: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_a548: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_c1_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, True)})}
% 23.02/22.56  bnd_c4_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, False)})}
% 23.02/22.56  bnd_c5_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, True)})}
% 23.02/22.56  bnd_a547: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_c2_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, False)})}
% 23.02/22.56  bnd_ndr1_1: {(??.TPTP_Interpret.ind0, True)}
% 23.02/22.56  bnd_a546: ??.TPTP_Interpret.ind0
% 23.02/22.56  bnd_c2_1: {(??.TPTP_Interpret.ind0, False)}
% 23.02/22.56  bnd_ndr1_0: True
% 23.02/22.56  
% 23.02/22.56  % SZS status CounterSatisfiable
%------------------------------------------------------------------------------