TSTP Solution File: SYN525+1 by Refute---2015
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%------------------------------------------------------------------------------
% File : Refute---2015
% Problem : SYN525+1 : TPTP v6.4.0. Released v2.1.0.
% Transfm : none
% Format : tptp:raw
% Command : isabelle tptp_refute %d %s
% Computer : n090.star.cs.uiowa.edu
% Model : x86_64 x86_64
% CPU : Intel(R) Xeon(R) CPU E5-2609 0 2.40GHz
% Memory : 32218.75MB
% OS : Linux 3.10.0-327.10.1.el7.x86_64
% CPULimit : 300s
% DateTime : Thu Apr 14 06:42:14 EDT 2016
% Result : CounterSatisfiable 17.50s
% Output : Assurance 0s
% Verified :
% SZS Type : None (Parsing solution fails)
% Syntax : Number of formulae : 0
% Comments :
%------------------------------------------------------------------------------
%----No solution output by system
%------------------------------------------------------------------------------
%----ORIGINAL SYSTEM OUTPUT
% 0.00/0.03 % Problem : SYN525+1 : TPTP v6.4.0. Released v2.1.0.
% 0.02/0.04 % Command : isabelle tptp_refute %d %s
% 0.02/0.22 % Computer : n090.star.cs.uiowa.edu
% 0.02/0.22 % Model : x86_64 x86_64
% 0.02/0.22 % CPU : Intel(R) Xeon(R) CPU E5-2609 0 @ 2.40GHz
% 0.02/0.22 % Memory : 32218.75MB
% 0.02/0.22 % OS : Linux 3.10.0-327.10.1.el7.x86_64
% 0.02/0.22 % CPULimit : 300
% 0.02/0.22 % DateTime : Sat Apr 9 00:13:24 CDT 2016
% 0.02/0.22 % CPUTime:
% 6.29/5.83 > val it = (): unit
% 6.59/6.13 Trying to find a model that refutes: ~ ((((((((((((((((((((((bnd_ndr1_0 & bnd_c3_1 bnd_a188) &
% 6.59/6.13 bnd_ndr1_1 bnd_a188) &
% 6.59/6.13 ~ bnd_c4_2 bnd_a188 bnd_a189) &
% 6.59/6.13 bnd_c3_2 bnd_a188 bnd_a189) &
% 6.59/6.13 bnd_c5_2 bnd_a188 bnd_a189) &
% 6.59/6.13 (ALL U.
% 6.59/6.13 bnd_ndr1_1 bnd_a188 -->
% 6.59/6.13 (~ bnd_c3_2 bnd_a188 U | bnd_c1_2 bnd_a188 U) |
% 6.59/6.13 ~ bnd_c4_2 bnd_a188 U) |
% 6.59/6.13 ~ bnd_c4_0) |
% 6.59/6.13 ((bnd_ndr1_0 &
% 6.59/6.13 (ALL V.
% 6.59/6.13 bnd_ndr1_1 bnd_a190 -->
% 6.59/6.13 bnd_c3_2 bnd_a190 V | bnd_c5_2 bnd_a190 V)) &
% 6.59/6.13 bnd_c4_1 bnd_a190) &
% 6.59/6.13 ~ bnd_c2_1 bnd_a190) &
% 6.59/6.13 ((((bnd_ndr1_0 & ~ bnd_c3_1 bnd_a191) &
% 6.59/6.13 bnd_c5_1 bnd_a191) &
% 6.59/6.13 bnd_c2_1 bnd_a191 |
% 6.59/6.13 (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a192) &
% 6.59/6.13 ~ bnd_c1_2 bnd_a192 bnd_a193) &
% 6.59/6.13 ~ bnd_c4_2 bnd_a192 bnd_a193) &
% 6.59/6.13 bnd_c5_2 bnd_a192 bnd_a193) &
% 6.59/6.13 ~ bnd_c5_1 bnd_a192) &
% 6.59/6.13 bnd_ndr1_1 bnd_a192) &
% 6.59/6.13 bnd_c3_2 bnd_a192 bnd_a194) &
% 6.59/6.13 bnd_c5_2 bnd_a192 bnd_a194) |
% 6.59/6.13 bnd_c1_0)) &
% 6.59/6.13 (((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a195) &
% 6.59/6.13 ~ bnd_c1_1 bnd_a195) &
% 6.59/6.13 (ALL W.
% 6.59/6.13 bnd_ndr1_1 bnd_a195 -->
% 6.59/6.13 (bnd_c2_2 bnd_a195 W | bnd_c3_2 bnd_a195 W) |
% 6.59/6.13 bnd_c1_2 bnd_a195 W) |
% 6.59/6.13 ((bnd_ndr1_0 &
% 6.59/6.13 (ALL X.
% 6.59/6.13 bnd_ndr1_1 bnd_a196 -->
% 6.59/6.13 (~ bnd_c4_2 bnd_a196 X | ~ bnd_c1_2 bnd_a196 X) |
% 6.59/6.13 ~ bnd_c3_2 bnd_a196 X)) &
% 6.59/6.13 (ALL Y.
% 6.59/6.13 bnd_ndr1_1 bnd_a196 -->
% 6.59/6.13 bnd_c5_2 bnd_a196 Y | bnd_c1_2 bnd_a196 Y)) &
% 6.59/6.13 bnd_c4_1 bnd_a196)) &
% 6.59/6.13 (((ALL Z.
% 6.59/6.13 bnd_ndr1_0 -->
% 6.59/6.13 ((bnd_ndr1_1 Z & bnd_c1_2 Z bnd_a197) &
% 6.59/6.13 bnd_c4_2 Z bnd_a197 |
% 6.59/6.13 bnd_c3_1 Z) |
% 6.59/6.13 ((bnd_ndr1_1 Z & ~ bnd_c2_2 Z bnd_a198) &
% 6.59/6.13 ~ bnd_c4_2 Z bnd_a198) &
% 6.59/6.13 ~ bnd_c3_2 Z bnd_a198) |
% 6.59/6.13 ~ bnd_c4_0) |
% 6.59/6.13 (ALL X1. bnd_ndr1_0 --> ~ bnd_c1_1 X1 | ~ bnd_c5_1 X1))) &
% 6.59/6.13 ((((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a199) & ~ bnd_c5_1 bnd_a199) &
% 6.59/6.13 bnd_c3_1 bnd_a199 |
% 6.59/6.13 ~ bnd_c2_0) |
% 6.59/6.13 ~ bnd_c5_0)) &
% 6.59/6.13 ((bnd_c4_0 |
% 6.59/6.13 ((bnd_ndr1_0 &
% 6.59/6.13 (ALL X2.
% 6.59/6.13 bnd_ndr1_1 bnd_a200 -->
% 6.59/6.13 (~ bnd_c2_2 bnd_a200 X2 | bnd_c1_2 bnd_a200 X2) |
% 6.59/6.13 bnd_c4_2 bnd_a200 X2)) &
% 6.59/6.13 bnd_c3_1 bnd_a200) &
% 6.59/6.13 (ALL X3.
% 6.59/6.13 bnd_ndr1_1 bnd_a200 -->
% 6.59/6.13 (bnd_c3_2 bnd_a200 X3 | bnd_c5_2 bnd_a200 X3) |
% 6.59/6.13 ~ bnd_c1_2 bnd_a200 X3)) |
% 6.59/6.13 ((bnd_ndr1_0 &
% 6.59/6.13 (ALL X4.
% 6.59/6.13 bnd_ndr1_1 bnd_a201 -->
% 6.59/6.13 (~ bnd_c2_2 bnd_a201 X4 | ~ bnd_c1_2 bnd_a201 X4) |
% 6.59/6.13 bnd_c5_2 bnd_a201 X4)) &
% 6.59/6.13 ~ bnd_c5_1 bnd_a201) &
% 6.59/6.13 bnd_c2_1 bnd_a201)) &
% 6.59/6.13 ((bnd_c4_0 |
% 6.59/6.13 (bnd_ndr1_0 & ~ bnd_c2_1 bnd_a202) & ~ bnd_c3_1 bnd_a202) |
% 6.59/6.13 (((((bnd_ndr1_0 & bnd_c2_1 bnd_a203) &
% 6.59/6.13 (ALL X5. bnd_ndr1_1 bnd_a203 --> ~ bnd_c4_2 bnd_a203 X5)) &
% 6.59/6.13 bnd_ndr1_1 bnd_a203) &
% 6.59/6.13 bnd_c2_2 bnd_a203 bnd_a204) &
% 6.59/6.13 bnd_c5_2 bnd_a203 bnd_a204) &
% 6.59/6.13 ~ bnd_c3_2 bnd_a203 bnd_a204)) &
% 6.59/6.13 (((ALL X6.
% 6.59/6.13 bnd_ndr1_0 -->
% 6.59/6.13 (bnd_c2_1 X6 | ~ bnd_c4_1 X6) |
% 6.59/6.13 ((bnd_ndr1_1 X6 & bnd_c4_2 X6 bnd_a205) &
% 6.59/6.13 ~ bnd_c5_2 X6 bnd_a205) &
% 6.59/6.13 ~ bnd_c2_2 X6 bnd_a205) |
% 6.59/6.13 bnd_c3_0) |
% 6.59/6.13 (ALL X7.
% 6.59/6.13 bnd_ndr1_0 -->
% 6.59/6.13 (bnd_c2_1 X7 | ~ bnd_c1_1 X7) | ~ bnd_c3_1 X7))) &
% 6.59/6.13 ((bnd_c2_0 |
% 6.59/6.13 (((((((bnd_ndr1_0 & bnd_c1_1 bnd_a206) & bnd_ndr1_1 bnd_a206) &
% 6.59/6.13 bnd_c2_2 bnd_a206 bnd_a207) &
% 6.59/6.13 ~ bnd_c4_2 bnd_a206 bnd_a207) &
% 6.59/6.13 bnd_ndr1_1 bnd_a206) &
% 6.59/6.13 bnd_c3_2 bnd_a206 bnd_a208) &
% 6.59/6.13 ~ bnd_c2_2 bnd_a206 bnd_a208) &
% 6.59/6.13 ~ bnd_c1_2 bnd_a206 bnd_a208) |
% 6.59/6.13 ~ bnd_c5_0)) &
% 6.59/6.13 (~ bnd_c2_0 |
% 6.59/6.13 (ALL X8.
% 6.59/6.13 bnd_ndr1_0 -->
% 6.59/6.13 (((bnd_ndr1_1 X8 & ~ bnd_c4_2 X8 bnd_a209) &
% 6.59/6.13 ~ bnd_c5_2 X8 bnd_a209) &
% 6.59/6.13 ~ bnd_c3_2 X8 bnd_a209 |
% 6.59/6.13 ~ bnd_c3_1 X8) |
% 6.59/6.13 (ALL X9.
% 6.59/6.13 bnd_ndr1_1 X8 -->
% 6.59/6.13 (bnd_c3_2 X8 X9 | bnd_c2_2 X8 X9) | bnd_c4_2 X8 X9)))) &
% 6.59/6.13 (((((((bnd_ndr1_0 &
% 6.59/6.13 (ALL X10.
% 6.59/6.13 bnd_ndr1_1 bnd_a210 -->
% 6.59/6.13 (bnd_c3_2 bnd_a210 X10 | bnd_c4_2 bnd_a210 X10) |
% 6.59/6.13 bnd_c2_2 bnd_a210 X10)) &
% 6.59/6.13 bnd_c1_1 bnd_a210) &
% 6.59/6.13 bnd_ndr1_1 bnd_a210) &
% 6.59/6.13 ~ bnd_c3_2 bnd_a210 bnd_a211) &
% 6.59/6.13 bnd_c4_2 bnd_a210 bnd_a211) &
% 6.59/6.13 ~ bnd_c5_2 bnd_a210 bnd_a211 |
% 6.59/6.13 bnd_c5_0) |
% 6.59/6.13 ((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a212) &
% 6.59/6.13 bnd_c4_2 bnd_a212 bnd_a213) &
% 6.59/6.13 ~ bnd_c1_2 bnd_a212 bnd_a213) &
% 6.59/6.13 bnd_c3_2 bnd_a212 bnd_a213) &
% 6.59/6.13 ~ bnd_c2_1 bnd_a212) &
% 6.59/6.13 bnd_ndr1_1 bnd_a212) &
% 6.59/6.13 ~ bnd_c4_2 bnd_a212 bnd_a214) &
% 6.59/6.13 bnd_c1_2 bnd_a212 bnd_a214) &
% 6.59/6.13 bnd_c5_2 bnd_a212 bnd_a214)) &
% 6.59/6.13 (((ALL X11.
% 6.59/6.13 bnd_ndr1_0 -->
% 6.59/6.13 (~ bnd_c3_1 X11 | ~ bnd_c4_1 X11) | bnd_c1_1 X11) |
% 6.59/6.13 ~ bnd_c2_0) |
% 6.59/6.13 bnd_c4_0)) &
% 6.59/6.13 (((bnd_ndr1_0 & ~ bnd_c5_1 bnd_a215) & ~ bnd_c3_1 bnd_a215 |
% 6.59/6.13 bnd_c3_0) |
% 6.59/6.13 ((bnd_ndr1_0 & bnd_c1_1 bnd_a216) & bnd_c2_1 bnd_a216) &
% 6.59/6.13 ~ bnd_c4_1 bnd_a216)) &
% 6.59/6.13 ((~ bnd_c4_0 |
% 6.59/6.13 (ALL X12. bnd_ndr1_0 --> ~ bnd_c3_1 X12 | bnd_c1_1 X12)) |
% 6.59/6.13 (ALL X13.
% 6.59/6.13 bnd_ndr1_0 -->
% 6.59/6.13 (bnd_c3_1 X13 | bnd_c2_1 X13) |
% 6.59/6.13 (ALL X14.
% 6.59/6.13 bnd_ndr1_1 X13 --> bnd_c4_2 X13 X14 | ~ bnd_c3_2 X13 X14)))) &
% 6.59/6.13 ((ALL X15.
% 6.59/6.13 bnd_ndr1_0 -->
% 6.59/6.13 ((ALL X16.
% 6.59/6.13 bnd_ndr1_1 X15 -->
% 6.59/6.13 (~ bnd_c5_2 X15 X16 | bnd_c1_2 X15 X16) | bnd_c2_2 X15 X16) |
% 6.59/6.13 ((bnd_ndr1_1 X15 & ~ bnd_c4_2 X15 bnd_a217) &
% 6.59/6.13 bnd_c5_2 X15 bnd_a217) &
% 6.59/6.13 bnd_c1_2 X15 bnd_a217) |
% 6.59/6.13 bnd_c4_1 X15) |
% 6.59/6.13 (ALL X17.
% 6.59/6.13 bnd_ndr1_0 -->
% 6.59/6.13 (ALL X18.
% 6.59/6.13 bnd_ndr1_1 X17 -->
% 6.59/6.13 (bnd_c1_2 X17 X18 | bnd_c5_2 X17 X18) | bnd_c4_2 X17 X18) |
% 6.59/6.13 bnd_c1_1 X17))) &
% 6.59/6.13 ((~ bnd_c2_0 |
% 6.59/6.13 (ALL X19. bnd_ndr1_0 --> ~ bnd_c2_1 X19 | ~ bnd_c5_1 X19)) |
% 6.59/6.13 bnd_c5_0))
% 8.29/7.83 Unfolded term: ~ ((((((((((((((((((((((bnd_ndr1_0 & bnd_c3_1 bnd_a188) &
% 8.29/7.83 bnd_ndr1_1 bnd_a188) &
% 8.29/7.83 ~ bnd_c4_2 bnd_a188 bnd_a189) &
% 8.29/7.83 bnd_c3_2 bnd_a188 bnd_a189) &
% 8.29/7.83 bnd_c5_2 bnd_a188 bnd_a189) &
% 8.29/7.83 (ALL U.
% 8.29/7.83 bnd_ndr1_1 bnd_a188 -->
% 8.29/7.83 (~ bnd_c3_2 bnd_a188 U | bnd_c1_2 bnd_a188 U) |
% 8.29/7.83 ~ bnd_c4_2 bnd_a188 U) |
% 8.29/7.83 ~ bnd_c4_0) |
% 8.29/7.83 ((bnd_ndr1_0 &
% 8.29/7.83 (ALL V.
% 8.29/7.83 bnd_ndr1_1 bnd_a190 -->
% 8.29/7.83 bnd_c3_2 bnd_a190 V | bnd_c5_2 bnd_a190 V)) &
% 8.29/7.83 bnd_c4_1 bnd_a190) &
% 8.29/7.83 ~ bnd_c2_1 bnd_a190) &
% 8.29/7.83 ((((bnd_ndr1_0 & ~ bnd_c3_1 bnd_a191) &
% 8.29/7.83 bnd_c5_1 bnd_a191) &
% 8.29/7.83 bnd_c2_1 bnd_a191 |
% 8.29/7.83 (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a192) &
% 8.29/7.83 ~ bnd_c1_2 bnd_a192 bnd_a193) &
% 8.29/7.83 ~ bnd_c4_2 bnd_a192 bnd_a193) &
% 8.29/7.83 bnd_c5_2 bnd_a192 bnd_a193) &
% 8.29/7.83 ~ bnd_c5_1 bnd_a192) &
% 8.29/7.83 bnd_ndr1_1 bnd_a192) &
% 8.29/7.83 bnd_c3_2 bnd_a192 bnd_a194) &
% 8.29/7.83 bnd_c5_2 bnd_a192 bnd_a194) |
% 8.29/7.83 bnd_c1_0)) &
% 8.29/7.83 (((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a195) &
% 8.29/7.83 ~ bnd_c1_1 bnd_a195) &
% 8.29/7.83 (ALL W.
% 8.29/7.83 bnd_ndr1_1 bnd_a195 -->
% 8.29/7.83 (bnd_c2_2 bnd_a195 W | bnd_c3_2 bnd_a195 W) |
% 8.29/7.83 bnd_c1_2 bnd_a195 W) |
% 8.29/7.83 ((bnd_ndr1_0 &
% 8.29/7.83 (ALL X.
% 8.29/7.83 bnd_ndr1_1 bnd_a196 -->
% 8.29/7.83 (~ bnd_c4_2 bnd_a196 X | ~ bnd_c1_2 bnd_a196 X) |
% 8.29/7.83 ~ bnd_c3_2 bnd_a196 X)) &
% 8.29/7.83 (ALL Y.
% 8.29/7.83 bnd_ndr1_1 bnd_a196 -->
% 8.29/7.83 bnd_c5_2 bnd_a196 Y | bnd_c1_2 bnd_a196 Y)) &
% 8.29/7.83 bnd_c4_1 bnd_a196)) &
% 8.29/7.83 (((ALL Z.
% 8.29/7.83 bnd_ndr1_0 -->
% 8.29/7.83 ((bnd_ndr1_1 Z & bnd_c1_2 Z bnd_a197) &
% 8.29/7.83 bnd_c4_2 Z bnd_a197 |
% 8.29/7.83 bnd_c3_1 Z) |
% 8.29/7.83 ((bnd_ndr1_1 Z & ~ bnd_c2_2 Z bnd_a198) &
% 8.29/7.83 ~ bnd_c4_2 Z bnd_a198) &
% 8.29/7.83 ~ bnd_c3_2 Z bnd_a198) |
% 8.29/7.83 ~ bnd_c4_0) |
% 8.29/7.83 (ALL X1. bnd_ndr1_0 --> ~ bnd_c1_1 X1 | ~ bnd_c5_1 X1))) &
% 8.29/7.83 ((((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a199) & ~ bnd_c5_1 bnd_a199) &
% 8.29/7.83 bnd_c3_1 bnd_a199 |
% 8.29/7.83 ~ bnd_c2_0) |
% 8.29/7.83 ~ bnd_c5_0)) &
% 8.29/7.83 ((bnd_c4_0 |
% 8.29/7.83 ((bnd_ndr1_0 &
% 8.29/7.83 (ALL X2.
% 8.29/7.83 bnd_ndr1_1 bnd_a200 -->
% 8.29/7.83 (~ bnd_c2_2 bnd_a200 X2 | bnd_c1_2 bnd_a200 X2) |
% 8.29/7.83 bnd_c4_2 bnd_a200 X2)) &
% 8.29/7.83 bnd_c3_1 bnd_a200) &
% 8.29/7.83 (ALL X3.
% 8.29/7.83 bnd_ndr1_1 bnd_a200 -->
% 8.29/7.83 (bnd_c3_2 bnd_a200 X3 | bnd_c5_2 bnd_a200 X3) |
% 8.29/7.83 ~ bnd_c1_2 bnd_a200 X3)) |
% 8.29/7.83 ((bnd_ndr1_0 &
% 8.29/7.83 (ALL X4.
% 8.29/7.83 bnd_ndr1_1 bnd_a201 -->
% 8.29/7.83 (~ bnd_c2_2 bnd_a201 X4 | ~ bnd_c1_2 bnd_a201 X4) |
% 8.29/7.83 bnd_c5_2 bnd_a201 X4)) &
% 8.29/7.83 ~ bnd_c5_1 bnd_a201) &
% 8.29/7.83 bnd_c2_1 bnd_a201)) &
% 8.29/7.83 ((bnd_c4_0 |
% 8.29/7.83 (bnd_ndr1_0 & ~ bnd_c2_1 bnd_a202) & ~ bnd_c3_1 bnd_a202) |
% 8.29/7.83 (((((bnd_ndr1_0 & bnd_c2_1 bnd_a203) &
% 8.29/7.83 (ALL X5. bnd_ndr1_1 bnd_a203 --> ~ bnd_c4_2 bnd_a203 X5)) &
% 8.29/7.83 bnd_ndr1_1 bnd_a203) &
% 8.29/7.83 bnd_c2_2 bnd_a203 bnd_a204) &
% 8.29/7.83 bnd_c5_2 bnd_a203 bnd_a204) &
% 8.29/7.83 ~ bnd_c3_2 bnd_a203 bnd_a204)) &
% 8.29/7.83 (((ALL X6.
% 8.29/7.83 bnd_ndr1_0 -->
% 8.29/7.83 (bnd_c2_1 X6 | ~ bnd_c4_1 X6) |
% 8.29/7.83 ((bnd_ndr1_1 X6 & bnd_c4_2 X6 bnd_a205) &
% 8.29/7.83 ~ bnd_c5_2 X6 bnd_a205) &
% 8.29/7.83 ~ bnd_c2_2 X6 bnd_a205) |
% 8.29/7.83 bnd_c3_0) |
% 8.29/7.83 (ALL X7.
% 8.29/7.83 bnd_ndr1_0 -->
% 8.29/7.83 (bnd_c2_1 X7 | ~ bnd_c1_1 X7) | ~ bnd_c3_1 X7))) &
% 8.29/7.83 ((bnd_c2_0 |
% 8.29/7.83 (((((((bnd_ndr1_0 & bnd_c1_1 bnd_a206) & bnd_ndr1_1 bnd_a206) &
% 8.29/7.83 bnd_c2_2 bnd_a206 bnd_a207) &
% 8.29/7.83 ~ bnd_c4_2 bnd_a206 bnd_a207) &
% 8.29/7.83 bnd_ndr1_1 bnd_a206) &
% 8.29/7.83 bnd_c3_2 bnd_a206 bnd_a208) &
% 8.29/7.83 ~ bnd_c2_2 bnd_a206 bnd_a208) &
% 8.29/7.83 ~ bnd_c1_2 bnd_a206 bnd_a208) |
% 8.29/7.83 ~ bnd_c5_0)) &
% 8.29/7.83 (~ bnd_c2_0 |
% 8.29/7.83 (ALL X8.
% 8.29/7.83 bnd_ndr1_0 -->
% 8.29/7.83 (((bnd_ndr1_1 X8 & ~ bnd_c4_2 X8 bnd_a209) &
% 8.29/7.83 ~ bnd_c5_2 X8 bnd_a209) &
% 8.29/7.83 ~ bnd_c3_2 X8 bnd_a209 |
% 8.29/7.83 ~ bnd_c3_1 X8) |
% 8.29/7.83 (ALL X9.
% 8.29/7.83 bnd_ndr1_1 X8 -->
% 8.29/7.83 (bnd_c3_2 X8 X9 | bnd_c2_2 X8 X9) | bnd_c4_2 X8 X9)))) &
% 8.29/7.83 (((((((bnd_ndr1_0 &
% 8.29/7.83 (ALL X10.
% 8.29/7.83 bnd_ndr1_1 bnd_a210 -->
% 8.29/7.83 (bnd_c3_2 bnd_a210 X10 | bnd_c4_2 bnd_a210 X10) |
% 8.29/7.83 bnd_c2_2 bnd_a210 X10)) &
% 8.29/7.83 bnd_c1_1 bnd_a210) &
% 8.29/7.83 bnd_ndr1_1 bnd_a210) &
% 8.29/7.83 ~ bnd_c3_2 bnd_a210 bnd_a211) &
% 8.29/7.83 bnd_c4_2 bnd_a210 bnd_a211) &
% 8.29/7.83 ~ bnd_c5_2 bnd_a210 bnd_a211 |
% 8.29/7.83 bnd_c5_0) |
% 8.29/7.83 ((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a212) &
% 8.29/7.83 bnd_c4_2 bnd_a212 bnd_a213) &
% 8.29/7.83 ~ bnd_c1_2 bnd_a212 bnd_a213) &
% 8.29/7.83 bnd_c3_2 bnd_a212 bnd_a213) &
% 8.29/7.83 ~ bnd_c2_1 bnd_a212) &
% 8.29/7.83 bnd_ndr1_1 bnd_a212) &
% 8.29/7.83 ~ bnd_c4_2 bnd_a212 bnd_a214) &
% 8.29/7.83 bnd_c1_2 bnd_a212 bnd_a214) &
% 8.29/7.83 bnd_c5_2 bnd_a212 bnd_a214)) &
% 8.29/7.83 (((ALL X11.
% 8.29/7.83 bnd_ndr1_0 -->
% 8.29/7.83 (~ bnd_c3_1 X11 | ~ bnd_c4_1 X11) | bnd_c1_1 X11) |
% 8.29/7.83 ~ bnd_c2_0) |
% 8.29/7.83 bnd_c4_0)) &
% 8.29/7.83 (((bnd_ndr1_0 & ~ bnd_c5_1 bnd_a215) & ~ bnd_c3_1 bnd_a215 |
% 8.29/7.83 bnd_c3_0) |
% 8.29/7.83 ((bnd_ndr1_0 & bnd_c1_1 bnd_a216) & bnd_c2_1 bnd_a216) &
% 8.29/7.83 ~ bnd_c4_1 bnd_a216)) &
% 8.29/7.83 ((~ bnd_c4_0 |
% 8.29/7.83 (ALL X12. bnd_ndr1_0 --> ~ bnd_c3_1 X12 | bnd_c1_1 X12)) |
% 8.29/7.83 (ALL X13.
% 8.29/7.83 bnd_ndr1_0 -->
% 8.29/7.83 (bnd_c3_1 X13 | bnd_c2_1 X13) |
% 8.29/7.83 (ALL X14.
% 8.29/7.83 bnd_ndr1_1 X13 --> bnd_c4_2 X13 X14 | ~ bnd_c3_2 X13 X14)))) &
% 8.29/7.83 ((ALL X15.
% 8.29/7.83 bnd_ndr1_0 -->
% 8.29/7.83 ((ALL X16.
% 8.29/7.83 bnd_ndr1_1 X15 -->
% 8.29/7.83 (~ bnd_c5_2 X15 X16 | bnd_c1_2 X15 X16) | bnd_c2_2 X15 X16) |
% 8.29/7.83 ((bnd_ndr1_1 X15 & ~ bnd_c4_2 X15 bnd_a217) &
% 8.29/7.83 bnd_c5_2 X15 bnd_a217) &
% 8.29/7.83 bnd_c1_2 X15 bnd_a217) |
% 8.29/7.83 bnd_c4_1 X15) |
% 8.29/7.83 (ALL X17.
% 8.29/7.83 bnd_ndr1_0 -->
% 8.29/7.83 (ALL X18.
% 8.29/7.83 bnd_ndr1_1 X17 -->
% 8.29/7.83 (bnd_c1_2 X17 X18 | bnd_c5_2 X17 X18) | bnd_c4_2 X17 X18) |
% 8.29/7.83 bnd_c1_1 X17))) &
% 8.29/7.83 ((~ bnd_c2_0 |
% 8.29/7.83 (ALL X19. bnd_ndr1_0 --> ~ bnd_c2_1 X19 | ~ bnd_c5_1 X19)) |
% 8.29/7.83 bnd_c5_0))
% 8.29/7.83 Adding axioms...
% 8.29/7.85 Typedef.type_definition_def
% 13.40/12.97 ...done.
% 13.40/12.97 Ground types: ?'b, TPTP_Interpret.ind
% 13.40/12.97 Translating term (sizes: 1, 1) ...
% 17.40/17.00 Invoking SAT solver...
% 17.50/17.09 Model found:
% 17.50/17.09 Size of types: ?'b: 1, TPTP_Interpret.ind: 1
% 17.50/17.09 bnd_a217: ??.TPTP_Interpret.ind0
% 17.50/17.09 bnd_a216: ??.TPTP_Interpret.ind0
% 17.50/17.09 bnd_a215: ??.TPTP_Interpret.ind0
% 17.50/17.09 bnd_a214: ??.TPTP_Interpret.ind0
% 17.50/17.09 bnd_a213: ??.TPTP_Interpret.ind0
% 17.50/17.09 bnd_a212: ??.TPTP_Interpret.ind0
% 17.50/17.09 bnd_a211: ??.TPTP_Interpret.ind0
% 17.50/17.09 bnd_a210: ??.TPTP_Interpret.ind0
% 17.50/17.09 bnd_a209: ??.TPTP_Interpret.ind0
% 17.50/17.09 bnd_a208: ??.TPTP_Interpret.ind0
% 17.50/17.09 bnd_a207: ??.TPTP_Interpret.ind0
% 17.50/17.09 bnd_a206: ??.TPTP_Interpret.ind0
% 17.50/17.09 bnd_c3_0: True
% 17.50/17.09 bnd_a205: ??.TPTP_Interpret.ind0
% 17.50/17.09 bnd_a204: ??.TPTP_Interpret.ind0
% 17.50/17.09 bnd_a203: ??.TPTP_Interpret.ind0
% 17.50/17.09 bnd_a202: ??.TPTP_Interpret.ind0
% 17.50/17.09 bnd_a201: ??.TPTP_Interpret.ind0
% 17.50/17.09 bnd_a200: ??.TPTP_Interpret.ind0
% 17.50/17.09 bnd_c5_0: True
% 17.50/17.09 bnd_c2_0: True
% 17.50/17.09 bnd_a199: ??.TPTP_Interpret.ind0
% 17.50/17.09 bnd_a198: ??.TPTP_Interpret.ind0
% 17.50/17.09 bnd_a197: ??.TPTP_Interpret.ind0
% 17.50/17.09 bnd_a196: ??.TPTP_Interpret.ind0
% 17.50/17.09 bnd_c2_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, True)})}
% 17.50/17.09 bnd_c1_1: {(??.TPTP_Interpret.ind0, True)}
% 17.50/17.09 bnd_a195: ??.TPTP_Interpret.ind0
% 17.50/17.09 bnd_c1_0: True
% 17.50/17.09 bnd_a194: ??.TPTP_Interpret.ind0
% 17.50/17.09 bnd_a193: ??.TPTP_Interpret.ind0
% 17.50/17.09 bnd_a192: ??.TPTP_Interpret.ind0
% 17.50/17.09 bnd_c5_1: {(??.TPTP_Interpret.ind0, False)}
% 17.50/17.09 bnd_a191: ??.TPTP_Interpret.ind0
% 17.50/17.09 bnd_c2_1: {(??.TPTP_Interpret.ind0, False)}
% 17.50/17.09 bnd_c4_1: {(??.TPTP_Interpret.ind0, True)}
% 17.50/17.09 bnd_a190: ??.TPTP_Interpret.ind0
% 17.50/17.09 bnd_c4_0: True
% 17.50/17.09 bnd_c1_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, False)})}
% 17.50/17.09 bnd_c5_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, True)})}
% 17.50/17.09 bnd_c3_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, True)})}
% 17.50/17.09 bnd_a189: ??.TPTP_Interpret.ind0
% 17.50/17.09 bnd_c4_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, False)})}
% 17.50/17.09 bnd_ndr1_1: {(??.TPTP_Interpret.ind0, True)}
% 17.50/17.09 bnd_a188: ??.TPTP_Interpret.ind0
% 17.50/17.09 bnd_c3_1: {(??.TPTP_Interpret.ind0, True)}
% 17.50/17.09 bnd_ndr1_0: True
% 17.50/17.09
% 17.50/17.09 % SZS status CounterSatisfiable
%------------------------------------------------------------------------------