TSTP Solution File: SYN518+1 by Refute---2015
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%------------------------------------------------------------------------------
% File : Refute---2015
% Problem : SYN518+1 : TPTP v6.4.0. Released v2.1.0.
% Transfm : none
% Format : tptp:raw
% Command : isabelle tptp_refute %d %s
% Computer : n066.star.cs.uiowa.edu
% Model : x86_64 x86_64
% CPU : Intel(R) Xeon(R) CPU E5-2609 0 2.40GHz
% Memory : 32218.75MB
% OS : Linux 3.10.0-327.10.1.el7.x86_64
% CPULimit : 300s
% DateTime : Thu Apr 14 06:42:12 EDT 2016
% Result : Timeout 300.05s
% Output : None
% Verified :
% SZS Type : None (Parsing solution fails)
% Syntax : Number of formulae : 0
% Comments :
%------------------------------------------------------------------------------
%----No solution output by system
%------------------------------------------------------------------------------
%----ORIGINAL SYSTEM OUTPUT
% 0.00/0.03 % Problem : SYN518+1 : TPTP v6.4.0. Released v2.1.0.
% 0.00/0.04 % Command : isabelle tptp_refute %d %s
% 0.03/0.22 % Computer : n066.star.cs.uiowa.edu
% 0.03/0.22 % Model : x86_64 x86_64
% 0.03/0.22 % CPU : Intel(R) Xeon(R) CPU E5-2609 0 @ 2.40GHz
% 0.03/0.22 % Memory : 32218.75MB
% 0.03/0.22 % OS : Linux 3.10.0-327.10.1.el7.x86_64
% 0.03/0.22 % CPULimit : 300
% 0.03/0.22 % DateTime : Sat Apr 9 00:11:54 CDT 2016
% 0.03/0.22 % CPUTime:
% 6.31/5.83 > val it = (): unit
% 7.13/6.62 Trying to find a model that refutes: ~ ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((ALL U.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (((bnd_ndr1_1 U & ~ bnd_c2_2 U bnd_a999) & bnd_c3_2 U bnd_a999) &
% 7.13/6.62 bnd_c1_2 U bnd_a999 |
% 7.13/6.62 ~ bnd_c1_1 U) |
% 7.13/6.62 (ALL V.
% 7.13/6.62 bnd_ndr1_1 U --> (bnd_c3_2 U V | bnd_c2_2 U V) | bnd_c5_2 U V)) |
% 7.13/6.62 bnd_c3_0) |
% 7.13/6.62 (ALL W.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 ((ALL X. bnd_ndr1_1 W --> bnd_c1_2 W X | ~ bnd_c4_2 W X) |
% 7.13/6.62 (ALL Y.
% 7.13/6.62 bnd_ndr1_1 W --> (bnd_c1_2 W Y | bnd_c2_2 W Y) | bnd_c5_2 W Y)) |
% 7.13/6.62 bnd_c3_1 W)) &
% 7.13/6.62 ((bnd_c2_0 | ~ bnd_c4_0) | bnd_c3_0)) &
% 7.13/6.62 (bnd_c5_0 |
% 7.13/6.62 (((((bnd_ndr1_0 &
% 7.13/6.62 ~ bnd_c2_1 bnd_a1000) &
% 7.13/6.62 (ALL Z.
% 7.13/6.62 bnd_ndr1_1 bnd_a1000 -->
% 7.13/6.62 (bnd_c5_2 bnd_a1000 Z | ~ bnd_c1_2 bnd_a1000 Z) |
% 7.13/6.62 bnd_c2_2 bnd_a1000 Z)) &
% 7.13/6.62 bnd_ndr1_1 bnd_a1000) &
% 7.13/6.62 bnd_c3_2 bnd_a1000 bnd_a1001) &
% 7.13/6.62 ~ bnd_c4_2 bnd_a1000 bnd_a1001) &
% 7.13/6.62 ~ bnd_c5_2 bnd_a1000 bnd_a1001)) &
% 7.13/6.62 ((~ bnd_c3_0 |
% 7.13/6.62 (ALL X1.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (bnd_c3_1 X1 | bnd_c5_1 X1) |
% 7.13/6.62 (ALL X2.
% 7.13/6.62 bnd_ndr1_1 X1 -->
% 7.13/6.62 (~ bnd_c2_2 X1 X2 | bnd_c5_2 X1 X2) | bnd_c3_2 X1 X2))) |
% 7.13/6.62 (ALL X3.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (ALL X4.
% 7.13/6.62 bnd_ndr1_1 X3 -->
% 7.13/6.62 (~ bnd_c3_2 X3 X4 | ~ bnd_c5_2 X3 X4) | bnd_c4_2 X3 X4) |
% 7.13/6.62 ((bnd_ndr1_1 X3 & bnd_c4_2 X3 bnd_a1002) & bnd_c2_2 X3 bnd_a1002) &
% 7.13/6.62 ~ bnd_c1_2 X3 bnd_a1002))) &
% 7.13/6.62 ((bnd_c2_0 | ~ bnd_c3_0) | bnd_c5_0)) &
% 7.13/6.62 (((ALL X5.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (~ bnd_c2_1 X5 |
% 7.13/6.62 ((bnd_ndr1_1 X5 & bnd_c3_2 X5 bnd_a1003) & ~ bnd_c1_2 X5 bnd_a1003) &
% 7.13/6.62 bnd_c5_2 X5 bnd_a1003) |
% 7.13/6.62 ((bnd_ndr1_1 X5 & bnd_c4_2 X5 bnd_a1004) & bnd_c3_2 X5 bnd_a1004) &
% 7.13/6.62 ~ bnd_c5_2 X5 bnd_a1004) |
% 7.13/6.62 ((bnd_ndr1_0 &
% 7.13/6.62 (ALL X6.
% 7.13/6.62 bnd_ndr1_1 bnd_a1005 -->
% 7.13/6.62 bnd_c5_2 bnd_a1005 X6 | ~ bnd_c4_2 bnd_a1005 X6)) &
% 7.13/6.62 ~ bnd_c3_1 bnd_a1005) &
% 7.13/6.62 bnd_c4_1 bnd_a1005) |
% 7.13/6.62 (ALL X7.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (bnd_c5_1 X7 | ~ bnd_c1_1 X7) |
% 7.13/6.62 (bnd_ndr1_1 X7 & ~ bnd_c3_2 X7 bnd_a1006) & ~ bnd_c4_2 X7 bnd_a1006))) &
% 7.13/6.62 ((~ bnd_c1_0 | ~ bnd_c5_0) |
% 7.13/6.62 ((((bnd_ndr1_0 &
% 7.13/6.62 (ALL X8.
% 7.13/6.62 bnd_ndr1_1 bnd_a1007 -->
% 7.13/6.62 bnd_c1_2 bnd_a1007 X8 | ~ bnd_c4_2 bnd_a1007 X8)) &
% 7.13/6.62 ~ bnd_c5_1 bnd_a1007) &
% 7.13/6.62 bnd_ndr1_1 bnd_a1007) &
% 7.13/6.62 bnd_c1_2 bnd_a1007 bnd_a1008) &
% 7.13/6.62 bnd_c2_2 bnd_a1007 bnd_a1008)) &
% 7.13/6.62 ((bnd_c2_0 |
% 7.13/6.62 (bnd_ndr1_0 &
% 7.13/6.62 (ALL X9.
% 7.13/6.62 bnd_ndr1_1 bnd_a1009 --> ~ bnd_c5_2 bnd_a1009 X9 | bnd_c2_2 bnd_a1009 X9)) &
% 7.13/6.62 bnd_c2_1 bnd_a1009) |
% 7.13/6.62 ((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1010) &
% 7.13/6.62 ~ bnd_c5_2 bnd_a1010 bnd_a1011) &
% 7.13/6.62 bnd_c2_2 bnd_a1010 bnd_a1011) &
% 7.13/6.62 ~ bnd_c3_2 bnd_a1010 bnd_a1011) &
% 7.13/6.62 bnd_ndr1_1 bnd_a1010) &
% 7.13/6.62 ~ bnd_c5_2 bnd_a1010 bnd_a1012) &
% 7.13/6.62 bnd_c2_2 bnd_a1010 bnd_a1012) &
% 7.13/6.62 ~ bnd_c1_2 bnd_a1010 bnd_a1012) &
% 7.13/6.62 (ALL X10.
% 7.13/6.62 bnd_ndr1_1 bnd_a1010 -->
% 7.13/6.62 (bnd_c3_2 bnd_a1010 X10 |
% 7.13/6.62 ~ bnd_c2_2 bnd_a1010 X10) |
% 7.13/6.62 ~ bnd_c1_2 bnd_a1010 X10))) &
% 7.13/6.62 ((~ bnd_c2_0 | bnd_c1_0) |
% 7.13/6.62 ((bnd_ndr1_0 & bnd_c3_1 bnd_a1013) &
% 7.13/6.62 (ALL X11.
% 7.13/6.62 bnd_ndr1_1 bnd_a1013 -->
% 7.13/6.62 (bnd_c1_2 bnd_a1013 X11 |
% 7.13/6.62 ~ bnd_c5_2 bnd_a1013 X11) |
% 7.13/6.62 bnd_c4_2 bnd_a1013 X11)) &
% 7.13/6.62 ~ bnd_c2_1 bnd_a1013)) &
% 7.13/6.62 (~ bnd_c5_0 |
% 7.13/6.62 ((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1014) &
% 7.13/6.62 ~ bnd_c3_2 bnd_a1014 bnd_a1015) &
% 7.13/6.62 ~ bnd_c2_2 bnd_a1014 bnd_a1015) &
% 7.13/6.62 bnd_c1_2 bnd_a1014 bnd_a1015) &
% 7.13/6.62 ~ bnd_c2_1 bnd_a1014)) &
% 7.13/6.62 (((ALL X12.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 ~ bnd_c3_1 X12 |
% 7.13/6.62 (ALL X13.
% 7.13/6.62 bnd_ndr1_1 X12 --> ~ bnd_c2_2 X12 X13 | ~ bnd_c3_2 X12 X13)) |
% 7.13/6.62 bnd_c2_0) |
% 7.13/6.62 bnd_c1_0)) &
% 7.13/6.62 ((~ bnd_c1_0 | ~ bnd_c2_0) | ~ bnd_c3_0)) &
% 7.13/6.62 ((bnd_c5_0 | ~ bnd_c2_0) | bnd_c4_0)) &
% 7.13/6.62 ((~ bnd_c3_0 | ~ bnd_c4_0) |
% 7.13/6.62 (((((bnd_ndr1_0 & bnd_c1_1 bnd_a1016) &
% 7.13/6.62 ~ bnd_c4_1 bnd_a1016) &
% 7.13/6.62 bnd_ndr1_1 bnd_a1016) &
% 7.13/6.62 bnd_c2_2 bnd_a1016 bnd_a1017) &
% 7.13/6.62 bnd_c5_2 bnd_a1016 bnd_a1017) &
% 7.13/6.62 ~ bnd_c1_2 bnd_a1016 bnd_a1017)) &
% 7.13/6.62 ((~ bnd_c2_0 |
% 7.13/6.62 (((((bnd_ndr1_0 & ~ bnd_c5_1 bnd_a1018) &
% 7.13/6.62 bnd_ndr1_1 bnd_a1018) &
% 7.13/6.62 bnd_c5_2 bnd_a1018 bnd_a1019) &
% 7.13/6.62 ~ bnd_c3_2 bnd_a1018 bnd_a1019) &
% 7.13/6.62 ~ bnd_c4_2 bnd_a1018 bnd_a1019) &
% 7.13/6.62 (ALL X14.
% 7.13/6.62 bnd_ndr1_1 bnd_a1018 -->
% 7.13/6.62 (bnd_c1_2 bnd_a1018 X14 |
% 7.13/6.62 bnd_c5_2 bnd_a1018 X14) |
% 7.13/6.62 ~ bnd_c4_2 bnd_a1018 X14)) |
% 7.13/6.62 ~ bnd_c5_0)) &
% 7.13/6.62 ((ALL X15.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 ((bnd_ndr1_1 X15 & bnd_c4_2 X15 bnd_a1020) &
% 7.13/6.62 ~ bnd_c5_2 X15 bnd_a1020) &
% 7.13/6.62 bnd_c1_2 X15 bnd_a1020 |
% 7.13/6.62 bnd_c4_1 X15) |
% 7.13/6.62 ~ bnd_c5_0)) &
% 7.13/6.62 ((~ bnd_c4_0 |
% 7.13/6.62 ((bnd_ndr1_0 &
% 7.13/6.62 (ALL X16.
% 7.13/6.62 bnd_ndr1_1 bnd_a1021 -->
% 7.13/6.62 bnd_c3_2 bnd_a1021 X16 |
% 7.13/6.62 bnd_c2_2 bnd_a1021 X16)) &
% 7.13/6.62 (ALL X17.
% 7.13/6.62 bnd_ndr1_1 bnd_a1021 -->
% 7.13/6.62 (~ bnd_c5_2 bnd_a1021 X17 |
% 7.13/6.62 bnd_c4_2 bnd_a1021 X17) |
% 7.13/6.62 ~ bnd_c1_2 bnd_a1021 X17)) &
% 7.13/6.62 ~ bnd_c3_1 bnd_a1021) |
% 7.13/6.62 ~ bnd_c1_0)) &
% 7.13/6.62 ((~ bnd_c2_0 |
% 7.13/6.62 (ALL X18.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 ((bnd_ndr1_1 X18 & bnd_c3_2 X18 bnd_a1022) &
% 7.13/6.62 ~ bnd_c5_2 X18 bnd_a1022 |
% 7.13/6.62 ~ bnd_c3_1 X18) |
% 7.13/6.62 (ALL X19.
% 7.13/6.62 bnd_ndr1_1 X18 -->
% 7.13/6.62 bnd_c5_2 X18 X19 | bnd_c4_2 X18 X19))) |
% 7.13/6.62 (ALL X20.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (~ bnd_c2_1 X20 | ~ bnd_c4_1 X20) |
% 7.13/6.62 (ALL X21.
% 7.13/6.62 bnd_ndr1_1 X20 -->
% 7.13/6.62 ~ bnd_c4_2 X20 X21 | bnd_c2_2 X20 X21)))) &
% 7.13/6.62 ((bnd_c4_0 |
% 7.13/6.62 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1023) &
% 7.13/6.62 ~ bnd_c2_2 bnd_a1023 bnd_a1024) &
% 7.13/6.62 bnd_c1_2 bnd_a1023 bnd_a1024) &
% 7.13/6.62 bnd_c3_2 bnd_a1023 bnd_a1024) &
% 7.13/6.62 bnd_c1_1 bnd_a1023) &
% 7.13/6.62 ~ bnd_c2_1 bnd_a1023) |
% 7.13/6.62 (bnd_ndr1_0 &
% 7.13/6.62 (ALL X22.
% 7.13/6.62 bnd_ndr1_1 bnd_a1025 -->
% 7.13/6.62 (~ bnd_c4_2 bnd_a1025 X22 |
% 7.13/6.62 bnd_c5_2 bnd_a1025 X22) |
% 7.13/6.62 ~ bnd_c1_2 bnd_a1025 X22)) &
% 7.13/6.62 (ALL X23.
% 7.13/6.62 bnd_ndr1_1 bnd_a1025 -->
% 7.13/6.62 (~ bnd_c3_2 bnd_a1025 X23 |
% 7.13/6.62 bnd_c5_2 bnd_a1025 X23) |
% 7.13/6.62 ~ bnd_c1_2 bnd_a1025 X23))) &
% 7.13/6.62 (((bnd_ndr1_0 &
% 7.13/6.62 (ALL X24.
% 7.13/6.62 bnd_ndr1_1 bnd_a1026 -->
% 7.13/6.62 (~ bnd_c5_2 bnd_a1026 X24 |
% 7.13/6.62 bnd_c2_2 bnd_a1026 X24) |
% 7.13/6.62 ~ bnd_c4_2 bnd_a1026 X24)) &
% 7.13/6.62 ~ bnd_c3_1 bnd_a1026 |
% 7.13/6.62 ~ bnd_c3_0) |
% 7.13/6.62 ((bnd_ndr1_0 & bnd_c4_1 bnd_a1027) &
% 7.13/6.62 bnd_c5_1 bnd_a1027) &
% 7.13/6.62 (ALL X25.
% 7.13/6.62 bnd_ndr1_1 bnd_a1027 -->
% 7.13/6.62 bnd_c1_2 bnd_a1027 X25 |
% 7.13/6.62 ~ bnd_c4_2 bnd_a1027 X25))) &
% 7.13/6.62 (~ bnd_c5_0 | bnd_c4_0)) &
% 7.13/6.62 (((bnd_ndr1_0 &
% 7.13/6.62 (ALL X26.
% 7.13/6.62 bnd_ndr1_1 bnd_a1028 -->
% 7.13/6.62 (bnd_c5_2 bnd_a1028 X26 |
% 7.13/6.62 ~ bnd_c3_2 bnd_a1028 X26) |
% 7.13/6.62 ~ bnd_c2_2 bnd_a1028 X26)) &
% 7.13/6.62 bnd_c3_1 bnd_a1028 |
% 7.13/6.62 bnd_c1_0) |
% 7.13/6.62 (ALL X27.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 ((ALL X28.
% 7.13/6.62 bnd_ndr1_1 X27 -->
% 7.13/6.62 (bnd_c2_2 X27 X28 | ~ bnd_c3_2 X27 X28) |
% 7.13/6.62 bnd_c1_2 X27 X28) |
% 7.13/6.62 ((bnd_ndr1_1 X27 & ~ bnd_c4_2 X27 bnd_a1029) &
% 7.13/6.62 bnd_c2_2 X27 bnd_a1029) &
% 7.13/6.62 bnd_c3_2 X27 bnd_a1029) |
% 7.13/6.62 (bnd_ndr1_1 X27 & ~ bnd_c5_2 X27 bnd_a1030) &
% 7.13/6.62 ~ bnd_c4_2 X27 bnd_a1030))) &
% 7.13/6.62 ((((((bnd_ndr1_0 & bnd_c2_1 bnd_a1031) &
% 7.13/6.62 bnd_ndr1_1 bnd_a1031) &
% 7.13/6.62 ~ bnd_c2_2 bnd_a1031 bnd_a1032) &
% 7.13/6.62 bnd_c5_2 bnd_a1031 bnd_a1032) &
% 7.13/6.62 bnd_c4_1 bnd_a1031 |
% 7.13/6.62 ((bnd_ndr1_0 &
% 7.13/6.62 (ALL X29.
% 7.13/6.62 bnd_ndr1_1 bnd_a1033 -->
% 7.13/6.62 (bnd_c5_2 bnd_a1033 X29 |
% 7.13/6.62 ~ bnd_c3_2 bnd_a1033 X29) |
% 7.13/6.62 bnd_c4_2 bnd_a1033 X29)) &
% 7.13/6.62 ~ bnd_c5_1 bnd_a1033) &
% 7.13/6.62 bnd_c3_1 bnd_a1033) |
% 7.13/6.62 ~ bnd_c1_0)) &
% 7.13/6.62 (((ALL X30.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (bnd_c5_1 X30 | bnd_c3_1 X30) | bnd_c2_1 X30) |
% 7.13/6.62 ~ bnd_c5_0) |
% 7.13/6.62 ~ bnd_c1_0)) &
% 7.13/6.62 ((ALL X31.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 ((bnd_ndr1_1 X31 & ~ bnd_c5_2 X31 bnd_a1034) &
% 7.13/6.62 bnd_c1_2 X31 bnd_a1034) &
% 7.13/6.62 ~ bnd_c4_2 X31 bnd_a1034 |
% 7.13/6.62 (ALL X32.
% 7.13/6.62 bnd_ndr1_1 X31 -->
% 7.13/6.62 (~ bnd_c4_2 X31 X32 | ~ bnd_c3_2 X31 X32) |
% 7.13/6.62 bnd_c2_2 X31 X32)) |
% 7.13/6.62 bnd_c2_0)) &
% 7.13/6.62 ((ALL X33.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (((bnd_ndr1_1 X33 & ~ bnd_c2_2 X33 bnd_a1035) &
% 7.13/6.62 bnd_c4_2 X33 bnd_a1035) &
% 7.13/6.62 bnd_c5_2 X33 bnd_a1035 |
% 7.13/6.62 bnd_c3_1 X33) |
% 7.13/6.62 ~ bnd_c2_1 X33) |
% 7.13/6.62 ~ bnd_c2_0)) &
% 7.13/6.62 (((bnd_ndr1_0 &
% 7.13/6.62 (ALL X34.
% 7.13/6.62 bnd_ndr1_1 bnd_a1036 -->
% 7.13/6.62 (bnd_c1_2 bnd_a1036 X34 | ~ bnd_c3_2 bnd_a1036 X34) |
% 7.13/6.62 bnd_c4_2 bnd_a1036 X34)) &
% 7.13/6.62 ~ bnd_c4_1 bnd_a1036 |
% 7.13/6.62 bnd_c1_0) |
% 7.13/6.62 (ALL X35. bnd_ndr1_0 --> bnd_c4_1 X35 | bnd_c2_1 X35))) &
% 7.13/6.62 ((bnd_c5_0 |
% 7.13/6.62 (ALL X36.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 bnd_c5_1 X36 |
% 7.13/6.62 (ALL X37.
% 7.13/6.62 bnd_ndr1_1 X36 -->
% 7.13/6.62 (~ bnd_c3_2 X36 X37 | ~ bnd_c2_2 X36 X37) |
% 7.13/6.62 bnd_c1_2 X36 X37))) |
% 7.13/6.62 bnd_c4_0)) &
% 7.13/6.62 (((ALL X38.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (~ bnd_c2_1 X38 |
% 7.13/6.62 ((bnd_ndr1_1 X38 & ~ bnd_c1_2 X38 bnd_a1037) &
% 7.13/6.62 bnd_c3_2 X38 bnd_a1037) &
% 7.13/6.62 bnd_c5_2 X38 bnd_a1037) |
% 7.13/6.62 bnd_c4_1 X38) |
% 7.13/6.62 ~ bnd_c1_0) |
% 7.13/6.62 (ALL X39.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (~ bnd_c1_1 X39 |
% 7.13/6.62 ((bnd_ndr1_1 X39 & ~ bnd_c4_2 X39 bnd_a1038) &
% 7.13/6.62 ~ bnd_c2_2 X39 bnd_a1038) &
% 7.13/6.62 ~ bnd_c3_2 X39 bnd_a1038) |
% 7.13/6.62 (ALL X40.
% 7.13/6.62 bnd_ndr1_1 X39 -->
% 7.13/6.62 (~ bnd_c3_2 X39 X40 | bnd_c2_2 X39 X40) |
% 7.13/6.62 ~ bnd_c5_2 X39 X40)))) &
% 7.13/6.62 ((bnd_c4_0 |
% 7.13/6.62 ((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1039) &
% 7.13/6.62 ~ bnd_c5_2 bnd_a1039 bnd_a1040) &
% 7.13/6.62 bnd_c2_2 bnd_a1039 bnd_a1040) &
% 7.13/6.62 ~ bnd_c3_2 bnd_a1039 bnd_a1040) &
% 7.13/6.62 (ALL X41.
% 7.13/6.62 bnd_ndr1_1 bnd_a1039 -->
% 7.13/6.62 (bnd_c3_2 bnd_a1039 X41 | bnd_c2_2 bnd_a1039 X41) |
% 7.13/6.62 bnd_c4_2 bnd_a1039 X41)) &
% 7.13/6.62 bnd_ndr1_1 bnd_a1039) &
% 7.13/6.62 bnd_c4_2 bnd_a1039 bnd_a1041) &
% 7.13/6.62 bnd_c2_2 bnd_a1039 bnd_a1041) &
% 7.13/6.62 bnd_c3_2 bnd_a1039 bnd_a1041) |
% 7.13/6.62 (ALL X42.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 ((ALL X43.
% 7.13/6.62 bnd_ndr1_1 X42 -->
% 7.13/6.62 ~ bnd_c1_2 X42 X43 | ~ bnd_c2_2 X42 X43) |
% 7.13/6.62 bnd_c5_1 X42) |
% 7.13/6.62 ~ bnd_c1_1 X42))) &
% 7.13/6.62 ((bnd_c4_0 |
% 7.13/6.62 (((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1042) &
% 7.13/6.62 ~ bnd_c3_2 bnd_a1042 bnd_a1043) &
% 7.13/6.62 bnd_c5_2 bnd_a1042 bnd_a1043) &
% 7.13/6.62 ~ bnd_c2_2 bnd_a1042 bnd_a1043) &
% 7.13/6.62 bnd_ndr1_1 bnd_a1042) &
% 7.13/6.62 ~ bnd_c2_2 bnd_a1042 bnd_a1044) &
% 7.13/6.62 ~ bnd_c5_2 bnd_a1042 bnd_a1044) &
% 7.13/6.62 bnd_ndr1_1 bnd_a1042) &
% 7.13/6.62 bnd_c1_2 bnd_a1042 bnd_a1045) &
% 7.13/6.62 ~ bnd_c3_2 bnd_a1042 bnd_a1045) |
% 7.13/6.62 ((bnd_ndr1_0 & bnd_c2_1 bnd_a1046) & ~ bnd_c5_1 bnd_a1046) &
% 7.13/6.62 ~ bnd_c4_1 bnd_a1046)) &
% 7.13/6.62 (((ALL X44.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (~ bnd_c3_1 X44 |
% 7.13/6.62 (ALL X45.
% 7.13/6.62 bnd_ndr1_1 X44 -->
% 7.13/6.62 (bnd_c2_2 X44 X45 | bnd_c1_2 X44 X45) |
% 7.13/6.62 ~ bnd_c4_2 X44 X45)) |
% 7.13/6.62 ~ bnd_c1_1 X44) |
% 7.13/6.62 ~ bnd_c4_0) |
% 7.13/6.62 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1047) &
% 7.13/6.62 bnd_c5_2 bnd_a1047 bnd_a1048) &
% 7.13/6.62 ~ bnd_c3_2 bnd_a1047 bnd_a1048) &
% 7.13/6.62 bnd_c4_2 bnd_a1047 bnd_a1048) &
% 7.13/6.62 (ALL X46.
% 7.13/6.62 bnd_ndr1_1 bnd_a1047 -->
% 7.13/6.62 (bnd_c2_2 bnd_a1047 X46 | bnd_c5_2 bnd_a1047 X46) |
% 7.13/6.62 ~ bnd_c4_2 bnd_a1047 X46)) &
% 7.13/6.62 (ALL X47.
% 7.13/6.62 bnd_ndr1_1 bnd_a1047 -->
% 7.13/6.62 (bnd_c2_2 bnd_a1047 X47 | ~ bnd_c4_2 bnd_a1047 X47) |
% 7.13/6.62 bnd_c3_2 bnd_a1047 X47))) &
% 7.13/6.62 (~ bnd_c1_0 |
% 7.13/6.62 ((bnd_ndr1_0 & bnd_c5_1 bnd_a1049) &
% 7.13/6.62 (ALL X48.
% 7.13/6.62 bnd_ndr1_1 bnd_a1049 -->
% 7.13/6.62 (~ bnd_c2_2 bnd_a1049 X48 | bnd_c1_2 bnd_a1049 X48) |
% 7.13/6.62 ~ bnd_c3_2 bnd_a1049 X48)) &
% 7.13/6.62 ~ bnd_c3_1 bnd_a1049)) &
% 7.13/6.62 ((~ bnd_c1_0 |
% 7.13/6.62 (bnd_ndr1_0 &
% 7.13/6.62 (ALL X49.
% 7.13/6.62 bnd_ndr1_1 bnd_a1050 -->
% 7.13/6.62 (bnd_c4_2 bnd_a1050 X49 | ~ bnd_c2_2 bnd_a1050 X49) |
% 7.13/6.62 bnd_c3_2 bnd_a1050 X49)) &
% 7.13/6.62 ~ bnd_c2_1 bnd_a1050) |
% 7.13/6.62 bnd_c3_0)) &
% 7.13/6.62 (~ bnd_c2_0 | bnd_c4_0)) &
% 7.13/6.62 (((ALL X50. bnd_ndr1_0 --> bnd_c1_1 X50 | ~ bnd_c3_1 X50) | bnd_c5_0) |
% 7.13/6.62 (((((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a1051) &
% 7.13/6.62 (ALL X51.
% 7.13/6.62 bnd_ndr1_1 bnd_a1051 -->
% 7.13/6.62 (~ bnd_c2_2 bnd_a1051 X51 | bnd_c4_2 bnd_a1051 X51) |
% 7.13/6.62 ~ bnd_c5_2 bnd_a1051 X51)) &
% 7.13/6.62 bnd_ndr1_1 bnd_a1051) &
% 7.13/6.62 ~ bnd_c4_2 bnd_a1051 bnd_a1052) &
% 7.13/6.62 bnd_c5_2 bnd_a1051 bnd_a1052) &
% 7.13/6.62 bnd_c1_2 bnd_a1051 bnd_a1052)) &
% 7.13/6.62 ((bnd_c4_0 |
% 7.13/6.62 ((bnd_ndr1_0 & bnd_c1_1 bnd_a1053) & bnd_c4_1 bnd_a1053) &
% 7.13/6.62 (ALL X52.
% 7.13/6.62 bnd_ndr1_1 bnd_a1053 -->
% 7.13/6.62 (bnd_c4_2 bnd_a1053 X52 | bnd_c2_2 bnd_a1053 X52) |
% 7.13/6.62 ~ bnd_c1_2 bnd_a1053 X52)) |
% 7.13/6.62 (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1054) &
% 7.13/6.62 ~ bnd_c4_2 bnd_a1054 bnd_a1055) &
% 7.13/6.62 ~ bnd_c2_2 bnd_a1054 bnd_a1055) &
% 7.13/6.62 bnd_ndr1_1 bnd_a1054) &
% 7.13/6.62 bnd_c3_2 bnd_a1054 bnd_a1056) &
% 7.13/6.62 bnd_c5_2 bnd_a1054 bnd_a1056) &
% 7.13/6.62 bnd_c4_2 bnd_a1054 bnd_a1056) &
% 7.13/6.62 bnd_c2_1 bnd_a1054)) &
% 7.13/6.62 (~ bnd_c5_0 | ~ bnd_c1_0)) &
% 7.13/6.62 ((~ bnd_c2_0 | bnd_c1_0) |
% 7.13/6.62 (ALL X53.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (~ bnd_c5_1 X53 | bnd_c2_1 X53) |
% 7.13/6.62 (ALL X54. bnd_ndr1_1 X53 --> bnd_c5_2 X53 X54 | bnd_c4_2 X53 X54)))) &
% 7.13/6.62 ((((((bnd_ndr1_0 &
% 7.13/6.62 ~ bnd_c2_1 bnd_a1057) &
% 7.13/6.62 ~ bnd_c5_1 bnd_a1057) &
% 7.13/6.62 bnd_ndr1_1 bnd_a1057) &
% 7.13/6.62 ~ bnd_c4_2 bnd_a1057 bnd_a1058) &
% 7.13/6.62 bnd_c3_2 bnd_a1057 bnd_a1058 |
% 7.13/6.62 (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1059) & bnd_c5_2 bnd_a1059 bnd_a1060) &
% 7.13/6.62 bnd_c2_2 bnd_a1059 bnd_a1060) &
% 7.13/6.62 ~ bnd_c1_2 bnd_a1059 bnd_a1060) &
% 7.13/6.62 (ALL X55.
% 7.13/6.62 bnd_ndr1_1 bnd_a1059 -->
% 7.13/6.62 (bnd_c3_2 bnd_a1059 X55 | ~ bnd_c5_2 bnd_a1059 X55) |
% 7.13/6.62 bnd_c1_2 bnd_a1059 X55)) &
% 7.13/6.62 bnd_ndr1_1 bnd_a1059) &
% 7.13/6.62 bnd_c3_2 bnd_a1059 bnd_a1061) &
% 7.13/6.62 bnd_c1_2 bnd_a1059 bnd_a1061) |
% 7.13/6.62 ((bnd_ndr1_0 &
% 7.13/6.62 (ALL X56.
% 7.13/6.62 bnd_ndr1_1 bnd_a1062 -->
% 7.13/6.62 (~ bnd_c1_2 bnd_a1062 X56 | bnd_c5_2 bnd_a1062 X56) |
% 7.13/6.62 bnd_c2_2 bnd_a1062 X56)) &
% 7.13/6.62 ~ bnd_c5_1 bnd_a1062) &
% 7.13/6.62 bnd_c4_1 bnd_a1062)) &
% 7.13/6.62 ((bnd_c5_0 | bnd_c2_0) |
% 7.13/6.62 (bnd_ndr1_0 &
% 7.13/6.62 (ALL X57.
% 7.13/6.62 bnd_ndr1_1 bnd_a1063 -->
% 7.13/6.62 ~ bnd_c5_2 bnd_a1063 X57 | ~ bnd_c3_2 bnd_a1063 X57)) &
% 7.13/6.62 ~ bnd_c1_1 bnd_a1063)) &
% 7.13/6.62 (~ bnd_c1_0 | ~ bnd_c4_0)) &
% 7.13/6.62 ((bnd_c2_0 |
% 7.13/6.62 (ALL X58.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (~ bnd_c4_1 X58 |
% 7.13/6.62 (ALL X59.
% 7.13/6.62 bnd_ndr1_1 X58 -->
% 7.13/6.62 (bnd_c2_2 X58 X59 | ~ bnd_c5_2 X58 X59) | ~ bnd_c4_2 X58 X59)) |
% 7.13/6.62 ~ bnd_c5_1 X58)) |
% 7.13/6.62 (ALL X60.
% 7.13/6.62 bnd_ndr1_0 --> bnd_c2_1 X60 | bnd_c1_1 X60))) &
% 7.13/6.62 ((~ bnd_c2_0 |
% 7.13/6.62 (ALL X61.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (bnd_c3_1 X61 |
% 7.13/6.62 (ALL X62.
% 7.13/6.62 bnd_ndr1_1 X61 -->
% 7.13/6.62 (~ bnd_c5_2 X61 X62 | ~ bnd_c2_2 X61 X62) | ~ bnd_c4_2 X61 X62)) |
% 7.13/6.62 (ALL X63. bnd_ndr1_1 X61 --> bnd_c4_2 X61 X63 | bnd_c5_2 X61 X63))) |
% 7.13/6.62 (((((((bnd_ndr1_0 &
% 7.13/6.62 bnd_ndr1_1 bnd_a1064) &
% 7.13/6.62 ~ bnd_c2_2 bnd_a1064 bnd_a1065) &
% 7.13/6.62 bnd_c4_2 bnd_a1064 bnd_a1065) &
% 7.13/6.62 ~ bnd_c1_2 bnd_a1064 bnd_a1065) &
% 7.13/6.62 bnd_c2_1 bnd_a1064) &
% 7.13/6.62 bnd_ndr1_1 bnd_a1064) &
% 7.13/6.62 ~ bnd_c5_2 bnd_a1064 bnd_a1066) &
% 7.13/6.62 ~ bnd_c1_2 bnd_a1064 bnd_a1066)) &
% 7.13/6.62 (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1067) &
% 7.13/6.62 ~ bnd_c1_2 bnd_a1067 bnd_a1068) &
% 7.13/6.62 bnd_c2_2 bnd_a1067 bnd_a1068) &
% 7.13/6.62 bnd_c3_2 bnd_a1067 bnd_a1068) &
% 7.13/6.62 ~ bnd_c3_1 bnd_a1067) &
% 7.13/6.62 ~ bnd_c4_1 bnd_a1067 |
% 7.13/6.62 bnd_c5_0) |
% 7.13/6.62 bnd_c2_0)) &
% 7.13/6.62 ((((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a1069) &
% 7.13/6.62 bnd_c1_1 bnd_a1069) &
% 7.13/6.62 ~ bnd_c2_1 bnd_a1069 |
% 7.13/6.62 ~ bnd_c2_0) |
% 7.13/6.62 (ALL X64.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 ~ bnd_c4_1 X64 | bnd_c2_1 X64))) &
% 7.13/6.62 (((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a1070) &
% 7.13/6.62 (ALL X65.
% 7.13/6.62 bnd_ndr1_1 bnd_a1070 -->
% 7.13/6.62 (~ bnd_c3_2 bnd_a1070 X65 |
% 7.13/6.62 bnd_c4_2 bnd_a1070 X65) |
% 7.13/6.62 ~ bnd_c2_2 bnd_a1070 X65)) &
% 7.13/6.62 (ALL X66.
% 7.13/6.62 bnd_ndr1_1 bnd_a1070 -->
% 7.13/6.62 (~ bnd_c4_2 bnd_a1070 X66 |
% 7.13/6.62 bnd_c3_2 bnd_a1070 X66) |
% 7.13/6.62 ~ bnd_c2_2 bnd_a1070 X66) |
% 7.13/6.62 (ALL X67.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 ((ALL X68.
% 7.13/6.62 bnd_ndr1_1 X67 --> bnd_c4_2 X67 X68 | ~ bnd_c5_2 X67 X68) |
% 7.13/6.62 ~ bnd_c5_1 X67) |
% 7.13/6.62 bnd_c4_1 X67))) &
% 7.13/6.62 ((bnd_c3_0 | ~ bnd_c1_0) | ~ bnd_c4_0)) &
% 7.13/6.62 (((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a1071) &
% 7.13/6.62 ~ bnd_c2_1 bnd_a1071) &
% 7.13/6.62 (ALL X69.
% 7.13/6.62 bnd_ndr1_1 bnd_a1071 -->
% 7.13/6.62 (bnd_c5_2 bnd_a1071 X69 |
% 7.13/6.62 bnd_c4_2 bnd_a1071 X69) |
% 7.13/6.62 bnd_c1_2 bnd_a1071 X69) |
% 7.13/6.62 bnd_c1_0)) &
% 7.13/6.62 ((~ bnd_c4_0 |
% 7.13/6.62 (ALL X70.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (bnd_c5_1 X70 | bnd_c3_1 X70) |
% 7.13/6.62 ~ bnd_c4_1 X70)) |
% 7.13/6.62 bnd_c1_0)) &
% 7.13/6.62 (((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1072) &
% 7.13/6.62 bnd_c2_2 bnd_a1072 bnd_a1073) &
% 7.13/6.62 ~ bnd_c3_2 bnd_a1072 bnd_a1073) &
% 7.13/6.62 bnd_c4_2 bnd_a1072 bnd_a1073) &
% 7.13/6.62 bnd_c1_1 bnd_a1072) &
% 7.13/6.62 bnd_ndr1_1 bnd_a1072) &
% 7.13/6.62 ~ bnd_c3_2 bnd_a1072 bnd_a1074) &
% 7.13/6.62 ~ bnd_c4_2 bnd_a1072 bnd_a1074 |
% 7.13/6.62 bnd_c2_0) |
% 7.13/6.62 ((((bnd_ndr1_0 &
% 7.13/6.62 (ALL X71.
% 7.13/6.62 bnd_ndr1_1 bnd_a1075 -->
% 7.13/6.62 (bnd_c5_2 bnd_a1075 X71 |
% 7.13/6.62 bnd_c1_2 bnd_a1075 X71) |
% 7.13/6.62 bnd_c4_2 bnd_a1075 X71)) &
% 7.13/6.62 bnd_ndr1_1 bnd_a1075) &
% 7.13/6.62 ~ bnd_c2_2 bnd_a1075 bnd_a1076) &
% 7.13/6.62 ~ bnd_c4_2 bnd_a1075 bnd_a1076) &
% 7.13/6.62 ~ bnd_c1_2 bnd_a1075 bnd_a1076)) &
% 7.13/6.62 ((bnd_c4_0 |
% 7.13/6.62 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1077) &
% 7.13/6.62 ~ bnd_c2_2 bnd_a1077 bnd_a1078) &
% 7.13/6.62 bnd_c5_2 bnd_a1077 bnd_a1078) &
% 7.13/6.62 ~ bnd_c4_2 bnd_a1077 bnd_a1078) &
% 7.13/6.62 bnd_c5_1 bnd_a1077) &
% 7.13/6.62 bnd_c4_1 bnd_a1077) |
% 7.13/6.62 (bnd_ndr1_0 & ~ bnd_c1_1 bnd_a1079) &
% 7.13/6.62 ~ bnd_c2_1 bnd_a1079)) &
% 7.13/6.62 (((ALL X72.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (bnd_c3_1 X72 | bnd_c1_1 X72) |
% 7.13/6.62 ~ bnd_c2_1 X72) |
% 7.13/6.62 ~ bnd_c5_0) |
% 7.13/6.62 ~ bnd_c2_0)) &
% 7.13/6.62 (~ bnd_c3_0 | bnd_c1_0)) &
% 7.13/6.62 ((((((bnd_ndr1_0 & bnd_c1_1 bnd_a1080) &
% 7.13/6.62 bnd_ndr1_1 bnd_a1080) &
% 7.13/6.62 ~ bnd_c5_2 bnd_a1080 bnd_a1081) &
% 7.13/6.62 ~ bnd_c4_2 bnd_a1080 bnd_a1081) &
% 7.13/6.62 bnd_c4_1 bnd_a1080 |
% 7.13/6.62 bnd_c3_0) |
% 7.13/6.62 (ALL X73.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (~ bnd_c2_1 X73 |
% 7.13/6.62 (ALL X74.
% 7.13/6.62 bnd_ndr1_1 X73 -->
% 7.13/6.62 (~ bnd_c1_2 X73 X74 | ~ bnd_c4_2 X73 X74) |
% 7.13/6.62 ~ bnd_c5_2 X73 X74)) |
% 7.13/6.62 bnd_c1_1 X73))) &
% 7.13/6.62 ((~ bnd_c1_0 | ~ bnd_c5_0) | bnd_c2_0)) &
% 7.13/6.62 ((bnd_c1_0 | ~ bnd_c2_0) |
% 7.13/6.62 ((bnd_ndr1_0 &
% 7.13/6.62 (ALL X75.
% 7.13/6.62 bnd_ndr1_1 bnd_a1082 -->
% 7.13/6.62 (~ bnd_c5_2 bnd_a1082 X75 |
% 7.13/6.62 bnd_c4_2 bnd_a1082 X75) |
% 7.13/6.62 bnd_c2_2 bnd_a1082 X75)) &
% 7.13/6.62 ~ bnd_c1_1 bnd_a1082) &
% 7.13/6.62 (ALL X76.
% 7.13/6.62 bnd_ndr1_1 bnd_a1082 -->
% 7.13/6.62 (bnd_c3_2 bnd_a1082 X76 |
% 7.13/6.62 ~ bnd_c2_2 bnd_a1082 X76) |
% 7.13/6.62 bnd_c5_2 bnd_a1082 X76))) &
% 7.13/6.62 ((((bnd_ndr1_0 &
% 7.13/6.62 (ALL X77.
% 7.13/6.62 bnd_ndr1_1 bnd_a1083 -->
% 7.13/6.62 bnd_c1_2 bnd_a1083 X77 |
% 7.13/6.62 bnd_c5_2 bnd_a1083 X77)) &
% 7.13/6.62 ~ bnd_c1_1 bnd_a1083) &
% 7.13/6.62 bnd_c2_1 bnd_a1083 |
% 7.13/6.62 (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1084) &
% 7.13/6.62 bnd_c1_2 bnd_a1084 bnd_a1085) &
% 7.13/6.62 bnd_c2_2 bnd_a1084 bnd_a1085) &
% 7.13/6.62 bnd_c3_2 bnd_a1084 bnd_a1085) &
% 7.13/6.62 bnd_ndr1_1 bnd_a1084) &
% 7.13/6.62 bnd_c3_2 bnd_a1084 bnd_a1086) &
% 7.13/6.62 ~ bnd_c2_2 bnd_a1084 bnd_a1086) &
% 7.13/6.62 ~ bnd_c4_2 bnd_a1084 bnd_a1086) |
% 7.13/6.62 bnd_c4_0)) &
% 7.13/6.62 (((ALL X78.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (((bnd_ndr1_1 X78 & bnd_c1_2 X78 bnd_a1087) &
% 7.13/6.62 bnd_c5_2 X78 bnd_a1087) &
% 7.13/6.62 bnd_c3_2 X78 bnd_a1087 |
% 7.13/6.62 bnd_ndr1_1 X78 & ~ bnd_c5_2 X78 bnd_a1088) |
% 7.13/6.62 ~ bnd_c2_1 X78) |
% 7.13/6.62 ~ bnd_c4_0) |
% 7.13/6.62 ((bnd_ndr1_0 &
% 7.13/6.62 (ALL X79.
% 7.13/6.62 bnd_ndr1_1 bnd_a1089 -->
% 7.13/6.62 (bnd_c2_2 bnd_a1089 X79 | bnd_c3_2 bnd_a1089 X79) |
% 7.13/6.62 bnd_c1_2 bnd_a1089 X79)) &
% 7.13/6.62 ~ bnd_c1_1 bnd_a1089) &
% 7.13/6.62 (ALL X80.
% 7.13/6.62 bnd_ndr1_1 bnd_a1089 -->
% 7.13/6.62 (~ bnd_c2_2 bnd_a1089 X80 |
% 7.13/6.62 ~ bnd_c3_2 bnd_a1089 X80) |
% 7.13/6.62 bnd_c1_2 bnd_a1089 X80))) &
% 7.13/6.62 (((ALL X81.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (((bnd_ndr1_1 X81 & bnd_c2_2 X81 bnd_a1090) &
% 7.13/6.62 ~ bnd_c1_2 X81 bnd_a1090) &
% 7.13/6.62 bnd_c5_2 X81 bnd_a1090 |
% 7.13/6.62 ((bnd_ndr1_1 X81 & ~ bnd_c2_2 X81 bnd_a1091) &
% 7.13/6.62 bnd_c5_2 X81 bnd_a1091) &
% 7.13/6.62 bnd_c4_2 X81 bnd_a1091) |
% 7.13/6.62 (ALL X82.
% 7.13/6.62 bnd_ndr1_1 X81 -->
% 7.13/6.62 ~ bnd_c5_2 X81 X82 | ~ bnd_c4_2 X81 X82)) |
% 7.13/6.62 (ALL X83.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (((bnd_ndr1_1 X83 & ~ bnd_c1_2 X83 bnd_a1092) &
% 7.13/6.62 bnd_c2_2 X83 bnd_a1092) &
% 7.13/6.62 bnd_c4_2 X83 bnd_a1092 |
% 7.13/6.62 (ALL X84.
% 7.13/6.62 bnd_ndr1_1 X83 -->
% 7.13/6.62 (~ bnd_c5_2 X83 X84 | bnd_c2_2 X83 X84) |
% 7.13/6.62 ~ bnd_c1_2 X83 X84)) |
% 7.13/6.62 ((bnd_ndr1_1 X83 & bnd_c1_2 X83 bnd_a1093) &
% 7.13/6.62 ~ bnd_c4_2 X83 bnd_a1093) &
% 7.13/6.62 bnd_c2_2 X83 bnd_a1093)) |
% 7.13/6.62 ((((bnd_ndr1_0 &
% 7.13/6.62 (ALL X85.
% 7.13/6.62 bnd_ndr1_1 bnd_a1094 -->
% 7.13/6.62 (bnd_c2_2 bnd_a1094 X85 |
% 7.13/6.62 ~ bnd_c4_2 bnd_a1094 X85) |
% 7.13/6.62 ~ bnd_c5_2 bnd_a1094 X85)) &
% 7.13/6.62 ~ bnd_c2_1 bnd_a1094) &
% 7.13/6.62 bnd_ndr1_1 bnd_a1094) &
% 7.13/6.62 ~ bnd_c4_2 bnd_a1094 bnd_a1095) &
% 7.13/6.62 bnd_c2_2 bnd_a1094 bnd_a1095)) &
% 7.13/6.62 (((ALL X86.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (bnd_c1_1 X86 |
% 7.13/6.62 (bnd_ndr1_1 X86 & bnd_c4_2 X86 bnd_a1096) &
% 7.13/6.62 ~ bnd_c2_2 X86 bnd_a1096) |
% 7.13/6.62 (ALL X87.
% 7.13/6.62 bnd_ndr1_1 X86 -->
% 7.13/6.62 (~ bnd_c2_2 X86 X87 | ~ bnd_c3_2 X86 X87) |
% 7.13/6.62 ~ bnd_c1_2 X86 X87)) |
% 7.13/6.62 ~ bnd_c2_0) |
% 7.13/6.62 bnd_c5_0)) &
% 7.13/6.62 (~ bnd_c1_0 |
% 7.13/6.62 (((((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a1097) &
% 7.13/6.62 ~ bnd_c5_1 bnd_a1097) &
% 7.13/6.62 bnd_ndr1_1 bnd_a1097) &
% 7.13/6.62 bnd_c1_2 bnd_a1097 bnd_a1098) &
% 7.13/6.62 bnd_c5_2 bnd_a1097 bnd_a1098) &
% 7.13/6.62 bnd_c3_2 bnd_a1097 bnd_a1098)) &
% 7.13/6.62 (((ALL X88. bnd_ndr1_0 --> ~ bnd_c3_1 X88 | bnd_c2_1 X88) |
% 7.13/6.62 ~ bnd_c2_0) |
% 7.13/6.62 ~ bnd_c5_0)) &
% 7.13/6.62 ((((bnd_ndr1_0 & bnd_c5_1 bnd_a1099) & ~ bnd_c2_1 bnd_a1099) &
% 7.13/6.62 ~ bnd_c3_1 bnd_a1099 |
% 7.13/6.62 ~ bnd_c3_0) |
% 7.13/6.62 ~ bnd_c2_0)) &
% 7.13/6.62 ((~ bnd_c3_0 | ~ bnd_c1_0) | ~ bnd_c4_0)) &
% 7.13/6.62 (((ALL X89.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (bnd_c2_1 X89 |
% 7.13/6.62 (ALL X90.
% 7.13/6.62 bnd_ndr1_1 X89 -->
% 7.13/6.62 bnd_c3_2 X89 X90 | ~ bnd_c5_2 X89 X90)) |
% 7.13/6.62 (bnd_ndr1_1 X89 & ~ bnd_c3_2 X89 bnd_a1100) &
% 7.13/6.62 bnd_c1_2 X89 bnd_a1100) |
% 7.13/6.62 bnd_c4_0) |
% 7.13/6.62 ~ bnd_c3_0)) &
% 7.13/6.62 ((bnd_c2_0 |
% 7.13/6.62 (ALL X91.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 ((ALL X92.
% 7.13/6.62 bnd_ndr1_1 X91 -->
% 7.13/6.62 (~ bnd_c3_2 X91 X92 | bnd_c4_2 X91 X92) |
% 7.13/6.62 ~ bnd_c2_2 X91 X92) |
% 7.13/6.62 ((bnd_ndr1_1 X91 & ~ bnd_c5_2 X91 bnd_a1101) &
% 7.13/6.62 ~ bnd_c1_2 X91 bnd_a1101) &
% 7.13/6.62 ~ bnd_c3_2 X91 bnd_a1101) |
% 7.13/6.62 bnd_c3_1 X91)) |
% 7.13/6.62 bnd_c3_0)) &
% 7.13/6.62 (((bnd_ndr1_0 &
% 7.13/6.62 (ALL X93.
% 7.13/6.62 bnd_ndr1_1 bnd_a1102 -->
% 7.13/6.62 (bnd_c2_2 bnd_a1102 X93 | bnd_c3_2 bnd_a1102 X93) |
% 7.13/6.62 bnd_c5_2 bnd_a1102 X93)) &
% 7.13/6.62 (ALL X94.
% 7.13/6.62 bnd_ndr1_1 bnd_a1102 -->
% 7.13/6.62 (bnd_c3_2 bnd_a1102 X94 | bnd_c1_2 bnd_a1102 X94) |
% 7.13/6.62 bnd_c2_2 bnd_a1102 X94) |
% 7.13/6.62 bnd_c1_0) |
% 7.13/6.62 ~ bnd_c4_0)) &
% 7.13/6.62 ((~ bnd_c2_0 |
% 7.13/6.62 (ALL X95.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (bnd_c2_1 X95 |
% 7.13/6.62 (ALL X96.
% 7.13/6.62 bnd_ndr1_1 X95 -->
% 7.13/6.62 (bnd_c2_2 X95 X96 | bnd_c1_2 X95 X96) |
% 7.13/6.62 bnd_c3_2 X95 X96)) |
% 7.13/6.62 (ALL X97.
% 7.13/6.62 bnd_ndr1_1 X95 -->
% 7.13/6.62 (~ bnd_c1_2 X95 X97 | ~ bnd_c3_2 X95 X97) |
% 7.13/6.62 ~ bnd_c5_2 X95 X97))) |
% 7.13/6.62 (ALL X98.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (bnd_c5_1 X98 | ~ bnd_c4_1 X98) |
% 7.13/6.62 (ALL X99.
% 7.13/6.62 bnd_ndr1_1 X98 -->
% 7.13/6.62 bnd_c4_2 X98 X99 | bnd_c5_2 X98 X99)))) &
% 7.13/6.62 ((bnd_c3_0 |
% 7.13/6.62 (ALL X100.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (~ bnd_c1_1 X100 |
% 7.13/6.62 (ALL X101.
% 7.13/6.62 bnd_ndr1_1 X100 -->
% 7.13/6.62 (bnd_c1_2 X100 X101 | ~ bnd_c2_2 X100 X101) |
% 7.13/6.62 ~ bnd_c5_2 X100 X101)) |
% 7.13/6.62 (ALL X102.
% 7.13/6.62 bnd_ndr1_1 X100 -->
% 7.13/6.62 (bnd_c5_2 X100 X102 | ~ bnd_c3_2 X100 X102) |
% 7.13/6.62 bnd_c1_2 X100 X102))) |
% 7.13/6.62 ~ bnd_c2_0)) &
% 7.13/6.62 (bnd_c1_0 | bnd_c3_0)) &
% 7.13/6.62 (((bnd_ndr1_0 &
% 7.13/6.62 (ALL X103.
% 7.13/6.62 bnd_ndr1_1 bnd_a1103 -->
% 7.13/6.62 (bnd_c5_2 bnd_a1103 X103 | bnd_c1_2 bnd_a1103 X103) |
% 7.13/6.62 bnd_c3_2 bnd_a1103 X103)) &
% 7.13/6.62 (ALL X104.
% 7.13/6.62 bnd_ndr1_1 bnd_a1103 -->
% 7.13/6.62 (~ bnd_c3_2 bnd_a1103 X104 | ~ bnd_c1_2 bnd_a1103 X104) |
% 7.13/6.62 bnd_c5_2 bnd_a1103 X104)) &
% 7.13/6.62 bnd_c5_1 bnd_a1103 |
% 7.13/6.62 ~ bnd_c1_0)) &
% 7.13/6.62 (((ALL X105.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (~ bnd_c3_1 X105 | bnd_c1_1 X105) |
% 7.13/6.62 (ALL X106.
% 7.13/6.62 bnd_ndr1_1 X105 -->
% 7.13/6.62 (bnd_c3_2 X105 X106 | ~ bnd_c5_2 X105 X106) |
% 7.13/6.62 bnd_c1_2 X105 X106)) |
% 7.13/6.62 bnd_c2_0) |
% 7.13/6.62 bnd_c4_0)) &
% 7.13/6.62 ((bnd_c5_0 |
% 7.13/6.62 (((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a1104) & bnd_ndr1_1 bnd_a1104) &
% 7.13/6.62 bnd_c3_2 bnd_a1104 bnd_a1105) &
% 7.13/6.62 ~ bnd_c5_2 bnd_a1104 bnd_a1105) |
% 7.13/6.62 ~ bnd_c1_0)) &
% 7.13/6.62 (bnd_c5_0 | ~ bnd_c4_0)) &
% 7.13/6.62 (((ALL X107.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 ((ALL X108.
% 7.13/6.62 bnd_ndr1_1 X107 -->
% 7.13/6.62 (~ bnd_c1_2 X107 X108 | ~ bnd_c2_2 X107 X108) |
% 7.13/6.62 bnd_c5_2 X107 X108) |
% 7.13/6.62 bnd_c3_1 X107) |
% 7.13/6.62 ((bnd_ndr1_1 X107 & bnd_c5_2 X107 bnd_a1106) &
% 7.13/6.62 ~ bnd_c3_2 X107 bnd_a1106) &
% 7.13/6.62 bnd_c4_2 X107 bnd_a1106) |
% 7.13/6.62 bnd_c2_0) |
% 7.13/6.62 (ALL X109.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (((bnd_ndr1_1 X109 & ~ bnd_c4_2 X109 bnd_a1107) &
% 7.13/6.62 bnd_c1_2 X109 bnd_a1107) &
% 7.13/6.62 ~ bnd_c5_2 X109 bnd_a1107 |
% 7.13/6.62 (ALL X110.
% 7.13/6.62 bnd_ndr1_1 X109 -->
% 7.13/6.62 (~ bnd_c5_2 X109 X110 | ~ bnd_c1_2 X109 X110) |
% 7.13/6.62 bnd_c2_2 X109 X110)) |
% 7.13/6.62 (bnd_ndr1_1 X109 & ~ bnd_c5_2 X109 bnd_a1108) &
% 7.13/6.62 bnd_c4_2 X109 bnd_a1108))) &
% 7.13/6.62 ((~ bnd_c5_0 | bnd_c1_0) |
% 7.13/6.62 (ALL X111.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (bnd_ndr1_1 X111 & bnd_c5_2 X111 bnd_a1109) &
% 7.13/6.62 ~ bnd_c3_2 X111 bnd_a1109 |
% 7.13/6.62 bnd_c1_1 X111))) &
% 7.13/6.62 ((bnd_c2_0 |
% 7.13/6.62 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1110) & ~ bnd_c4_2 bnd_a1110 bnd_a1111) &
% 7.13/6.62 bnd_c1_2 bnd_a1110 bnd_a1111) &
% 7.13/6.62 bnd_c5_2 bnd_a1110 bnd_a1111) &
% 7.13/6.62 bnd_c4_1 bnd_a1110) &
% 7.13/6.62 bnd_c2_1 bnd_a1110) |
% 7.13/6.62 ((bnd_ndr1_0 &
% 7.13/6.62 (ALL X112.
% 7.13/6.62 bnd_ndr1_1 bnd_a1112 -->
% 7.13/6.62 (~ bnd_c5_2 bnd_a1112 X112 | bnd_c1_2 bnd_a1112 X112) |
% 7.13/6.62 ~ bnd_c2_2 bnd_a1112 X112)) &
% 7.13/6.62 (ALL X113.
% 7.13/6.62 bnd_ndr1_1 bnd_a1112 -->
% 7.13/6.62 (~ bnd_c4_2 bnd_a1112 X113 | ~ bnd_c3_2 bnd_a1112 X113) |
% 7.13/6.62 ~ bnd_c2_2 bnd_a1112 X113)) &
% 7.13/6.62 bnd_c2_1 bnd_a1112)) &
% 7.13/6.62 (bnd_c4_0 |
% 7.13/6.62 ((bnd_ndr1_0 & bnd_c1_1 bnd_a1113) &
% 7.13/6.62 bnd_c2_1 bnd_a1113) &
% 7.13/6.62 (ALL X114.
% 7.13/6.62 bnd_ndr1_1 bnd_a1113 -->
% 7.13/6.62 bnd_c2_2 bnd_a1113 X114 | ~ bnd_c4_2 bnd_a1113 X114))) &
% 7.13/6.62 ((bnd_c1_0 |
% 7.13/6.62 (((((bnd_ndr1_0 &
% 7.13/6.62 (ALL X115.
% 7.13/6.62 bnd_ndr1_1 bnd_a1114 -->
% 7.13/6.62 (bnd_c3_2 bnd_a1114 X115 | ~ bnd_c2_2 bnd_a1114 X115) |
% 7.13/6.62 ~ bnd_c4_2 bnd_a1114 X115)) &
% 7.13/6.62 bnd_ndr1_1 bnd_a1114) &
% 7.13/6.62 ~ bnd_c5_2 bnd_a1114 bnd_a1115) &
% 7.13/6.62 ~ bnd_c4_2 bnd_a1114 bnd_a1115) &
% 7.13/6.62 bnd_c3_2 bnd_a1114 bnd_a1115) &
% 7.13/6.62 (ALL X116.
% 7.13/6.62 bnd_ndr1_1 bnd_a1114 -->
% 7.13/6.62 bnd_c3_2 bnd_a1114 X116 | ~ bnd_c5_2 bnd_a1114 X116)) |
% 7.13/6.62 ~ bnd_c5_0)) &
% 7.13/6.62 (((((((bnd_ndr1_0 &
% 7.13/6.62 ~ bnd_c4_1 bnd_a1116) &
% 7.13/6.62 bnd_ndr1_1 bnd_a1116) &
% 7.13/6.62 ~ bnd_c5_2 bnd_a1116 bnd_a1117) &
% 7.13/6.62 ~ bnd_c3_2 bnd_a1116 bnd_a1117) &
% 7.13/6.62 bnd_c4_2 bnd_a1116 bnd_a1117) &
% 7.13/6.62 (ALL X117.
% 7.13/6.62 bnd_ndr1_1 bnd_a1116 -->
% 7.13/6.62 (bnd_c4_2 bnd_a1116 X117 | bnd_c2_2 bnd_a1116 X117) |
% 7.13/6.62 bnd_c3_2 bnd_a1116 X117) |
% 7.13/6.62 ~ bnd_c2_0) |
% 7.13/6.62 ((((bnd_ndr1_0 &
% 7.13/6.62 (ALL X118.
% 7.13/6.62 bnd_ndr1_1 bnd_a1118 -->
% 7.13/6.62 (~ bnd_c1_2 bnd_a1118 X118 | bnd_c4_2 bnd_a1118 X118) |
% 7.13/6.62 ~ bnd_c3_2 bnd_a1118 X118)) &
% 7.13/6.62 bnd_ndr1_1 bnd_a1118) &
% 7.13/6.62 bnd_c4_2 bnd_a1118 bnd_a1119) &
% 7.13/6.62 bnd_c5_2 bnd_a1118 bnd_a1119) &
% 7.13/6.62 bnd_c2_2 bnd_a1118 bnd_a1119)) &
% 7.13/6.62 (~ bnd_c1_0 |
% 7.13/6.62 (ALL X119.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (((bnd_ndr1_1 X119 & bnd_c5_2 X119 bnd_a1120) & bnd_c4_2 X119 bnd_a1120) &
% 7.13/6.62 ~ bnd_c3_2 X119 bnd_a1120 |
% 7.13/6.62 bnd_c3_1 X119) |
% 7.13/6.62 ~ bnd_c4_1 X119))) &
% 7.13/6.62 (((bnd_ndr1_0 & bnd_c3_1 bnd_a1121) &
% 7.13/6.62 ~ bnd_c1_1 bnd_a1121) &
% 7.13/6.62 ~ bnd_c4_1 bnd_a1121 |
% 7.13/6.62 bnd_c4_0)) &
% 7.13/6.62 (~ bnd_c4_0 | bnd_c5_0)) &
% 7.13/6.62 (~ bnd_c3_0 | bnd_c5_0)) &
% 7.13/6.62 (((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1122) &
% 7.13/6.62 bnd_c2_2 bnd_a1122 bnd_a1123) &
% 7.13/6.62 ~ bnd_c1_2 bnd_a1122 bnd_a1123) &
% 7.13/6.62 bnd_ndr1_1 bnd_a1122) &
% 7.13/6.62 bnd_c5_2 bnd_a1122 bnd_a1124) &
% 7.13/6.62 bnd_c2_2 bnd_a1122 bnd_a1124) &
% 7.13/6.62 ~ bnd_c3_2 bnd_a1122 bnd_a1124) &
% 7.13/6.62 (ALL X120.
% 7.13/6.62 bnd_ndr1_1 bnd_a1122 -->
% 7.13/6.62 (~ bnd_c4_2 bnd_a1122 X120 |
% 7.13/6.62 bnd_c1_2 bnd_a1122 X120) |
% 7.13/6.62 bnd_c2_2 bnd_a1122 X120) |
% 7.13/6.62 (ALL X121.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (~ bnd_c4_1 X121 |
% 7.13/6.62 (ALL X122.
% 7.13/6.62 bnd_ndr1_1 X121 --> ~ bnd_c2_2 X121 X122 | ~ bnd_c1_2 X121 X122)) |
% 7.13/6.62 (ALL X123.
% 7.13/6.62 bnd_ndr1_1 X121 --> bnd_c1_2 X121 X123 | ~ bnd_c2_2 X121 X123))) |
% 7.13/6.62 ~ bnd_c1_0)) &
% 7.13/6.62 ((~ bnd_c3_0 | bnd_c2_0) | bnd_c5_0)) &
% 7.13/6.62 (bnd_c5_0 | ~ bnd_c2_0)) &
% 7.13/6.62 ((~ bnd_c2_0 |
% 7.13/6.62 (ALL X124.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (bnd_c4_1 X124 |
% 7.13/6.62 (bnd_ndr1_1 X124 &
% 7.13/6.62 bnd_c4_2 X124 bnd_a1125) &
% 7.13/6.62 bnd_c1_2 X124 bnd_a1125) |
% 7.13/6.62 ~ bnd_c3_1 X124)) |
% 7.13/6.62 (bnd_ndr1_0 &
% 7.13/6.62 (ALL X125.
% 7.13/6.62 bnd_ndr1_1 bnd_a1126 -->
% 7.13/6.62 (bnd_c3_2 bnd_a1126 X125 |
% 7.13/6.62 bnd_c1_2 bnd_a1126 X125) |
% 7.13/6.62 bnd_c2_2 bnd_a1126 X125)) &
% 7.13/6.62 (ALL X126.
% 7.13/6.62 bnd_ndr1_1 bnd_a1126 -->
% 7.13/6.62 bnd_c1_2 bnd_a1126 X126 |
% 7.13/6.62 ~ bnd_c4_2 bnd_a1126 X126))) &
% 7.13/6.62 (((ALL X127.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (((bnd_ndr1_1 X127 &
% 7.13/6.62 ~ bnd_c4_2 X127 bnd_a1127) &
% 7.13/6.62 bnd_c1_2 X127 bnd_a1127) &
% 7.13/6.62 ~ bnd_c5_2 X127 bnd_a1127 |
% 7.13/6.62 ((bnd_ndr1_1 X127 &
% 7.13/6.62 ~ bnd_c4_2 X127 bnd_a1128) &
% 7.13/6.62 ~ bnd_c5_2 X127 bnd_a1128) &
% 7.13/6.62 bnd_c2_2 X127 bnd_a1128) |
% 7.13/6.62 bnd_c3_1 X127) |
% 7.13/6.62 bnd_c5_0) |
% 7.13/6.62 ((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a1129) &
% 7.13/6.62 bnd_c4_1 bnd_a1129) &
% 7.13/6.62 (ALL X128.
% 7.13/6.62 bnd_ndr1_1 bnd_a1129 -->
% 7.13/6.62 (bnd_c3_2 bnd_a1129 X128 |
% 7.13/6.62 bnd_c4_2 bnd_a1129 X128) |
% 7.13/6.62 ~ bnd_c5_2 bnd_a1129 X128))) &
% 7.13/6.62 (((ALL X129.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 ((ALL X130.
% 7.13/6.62 bnd_ndr1_1 X129 -->
% 7.13/6.62 ~ bnd_c1_2 X129 X130 |
% 7.13/6.62 bnd_c2_2 X129 X130) |
% 7.13/6.62 (ALL X131.
% 7.13/6.62 bnd_ndr1_1 X129 -->
% 7.13/6.62 (bnd_c1_2 X129 X131 |
% 7.13/6.62 bnd_c2_2 X129 X131) |
% 7.13/6.62 ~ bnd_c4_2 X129 X131)) |
% 7.13/6.62 ((bnd_ndr1_1 X129 &
% 7.13/6.62 ~ bnd_c4_2 X129 bnd_a1130) &
% 7.13/6.62 bnd_c3_2 X129 bnd_a1130) &
% 7.13/6.62 ~ bnd_c1_2 X129 bnd_a1130) |
% 7.13/6.62 bnd_c3_0) |
% 7.13/6.62 (ALL X132.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (~ bnd_c4_1 X132 | ~ bnd_c1_1 X132) |
% 7.13/6.62 bnd_c5_1 X132))) &
% 7.13/6.62 ((~ bnd_c2_0 | bnd_c5_0) | bnd_c1_0)) &
% 7.13/6.62 (((((((bnd_ndr1_0 & bnd_c1_1 bnd_a1131) &
% 7.13/6.62 bnd_ndr1_1 bnd_a1131) &
% 7.13/6.62 bnd_c3_2 bnd_a1131 bnd_a1132) &
% 7.13/6.62 bnd_c2_2 bnd_a1131 bnd_a1132) &
% 7.13/6.62 bnd_c1_2 bnd_a1131 bnd_a1132) &
% 7.13/6.62 ~ bnd_c4_1 bnd_a1131 |
% 7.13/6.62 ~ bnd_c2_0) |
% 7.13/6.62 bnd_c5_0)) &
% 7.13/6.62 (bnd_c1_0 |
% 7.13/6.62 (ALL X133.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (~ bnd_c5_1 X133 | bnd_c3_1 X133) |
% 7.13/6.62 bnd_c4_1 X133))) &
% 7.13/6.62 ((~ bnd_c3_0 | ~ bnd_c1_0) |
% 7.13/6.62 (ALL X134.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 bnd_c1_1 X134 |
% 7.13/6.62 (ALL X135.
% 7.13/6.62 bnd_ndr1_1 X134 -->
% 7.13/6.62 (bnd_c2_2 X134 X135 | ~ bnd_c3_2 X134 X135) |
% 7.13/6.62 bnd_c4_2 X134 X135)))) &
% 7.13/6.62 ((bnd_c1_0 |
% 7.13/6.62 (ALL X136.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (bnd_c1_1 X136 |
% 7.13/6.62 (ALL X137.
% 7.13/6.62 bnd_ndr1_1 X136 -->
% 7.13/6.62 (bnd_c1_2 X136 X137 | bnd_c2_2 X136 X137) |
% 7.13/6.62 ~ bnd_c3_2 X136 X137)) |
% 7.13/6.62 (bnd_ndr1_1 X136 & bnd_c4_2 X136 bnd_a1133) &
% 7.13/6.62 ~ bnd_c1_2 X136 bnd_a1133)) |
% 7.13/6.62 bnd_c3_0)) &
% 7.13/6.62 ((bnd_c5_0 |
% 7.13/6.62 (ALL X138.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (ALL X139.
% 7.13/6.62 bnd_ndr1_1 X138 -->
% 7.13/6.62 (bnd_c1_2 X138 X139 | ~ bnd_c5_2 X138 X139) |
% 7.13/6.62 ~ bnd_c3_2 X138 X139))) |
% 7.13/6.62 (ALL X140.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 ((bnd_ndr1_1 X140 & ~ bnd_c5_2 X140 bnd_a1134) &
% 7.13/6.62 bnd_c4_2 X140 bnd_a1134 |
% 7.13/6.62 bnd_c1_1 X140) |
% 7.13/6.62 (ALL X141.
% 7.13/6.62 bnd_ndr1_1 X140 -->
% 7.13/6.62 bnd_c5_2 X140 X141 | bnd_c1_2 X140 X141)))) &
% 7.13/6.62 (((ALL X142.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (bnd_c2_1 X142 | ~ bnd_c5_1 X142) |
% 7.13/6.62 ~ bnd_c1_1 X142) |
% 7.13/6.62 (ALL X143.
% 7.13/6.62 bnd_ndr1_0 --> bnd_c5_1 X143 | bnd_c4_1 X143)) |
% 7.13/6.62 ~ bnd_c2_0)) &
% 7.13/6.62 ((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1135) &
% 7.13/6.62 bnd_c4_2 bnd_a1135 bnd_a1136) &
% 7.13/6.62 bnd_c1_2 bnd_a1135 bnd_a1136) &
% 7.13/6.62 bnd_c2_2 bnd_a1135 bnd_a1136) &
% 7.13/6.62 (ALL X144.
% 7.13/6.62 bnd_ndr1_1 bnd_a1135 -->
% 7.13/6.62 (~ bnd_c5_2 bnd_a1135 X144 |
% 7.13/6.62 ~ bnd_c1_2 bnd_a1135 X144) |
% 7.13/6.62 ~ bnd_c3_2 bnd_a1135 X144)) &
% 7.13/6.62 bnd_c4_1 bnd_a1135 |
% 7.13/6.62 ~ bnd_c4_0)) &
% 7.13/6.62 (((ALL X145.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 ((ALL X146.
% 7.13/6.62 bnd_ndr1_1 X145 -->
% 7.13/6.62 (bnd_c4_2 X145 X146 | bnd_c1_2 X145 X146) |
% 7.13/6.62 ~ bnd_c5_2 X145 X146) |
% 7.13/6.62 (ALL X147.
% 7.13/6.62 bnd_ndr1_1 X145 -->
% 7.13/6.62 ~ bnd_c5_2 X145 X147 | bnd_c4_2 X145 X147)) |
% 7.13/6.62 (bnd_ndr1_1 X145 & bnd_c1_2 X145 bnd_a1137) &
% 7.13/6.62 ~ bnd_c2_2 X145 bnd_a1137) |
% 7.13/6.62 (ALL X148.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (~ bnd_c3_1 X148 |
% 7.13/6.62 (bnd_ndr1_1 X148 & ~ bnd_c3_2 X148 bnd_a1138) &
% 7.13/6.62 bnd_c2_2 X148 bnd_a1138) |
% 7.13/6.62 (ALL X149.
% 7.13/6.62 bnd_ndr1_1 X148 -->
% 7.13/6.62 (~ bnd_c3_2 X148 X149 | bnd_c5_2 X148 X149) |
% 7.13/6.62 bnd_c4_2 X148 X149))) |
% 7.13/6.62 bnd_c2_0)) &
% 7.13/6.62 ((~ bnd_c5_0 | ~ bnd_c3_0) |
% 7.13/6.62 (ALL X150.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (bnd_c2_1 X150 |
% 7.13/6.62 (ALL X151.
% 7.13/6.62 bnd_ndr1_1 X150 -->
% 7.13/6.62 (bnd_c4_2 X150 X151 | ~ bnd_c5_2 X150 X151) |
% 7.13/6.62 bnd_c2_2 X150 X151)) |
% 7.13/6.62 ((bnd_ndr1_1 X150 & ~ bnd_c2_2 X150 bnd_a1139) &
% 7.13/6.62 ~ bnd_c3_2 X150 bnd_a1139) &
% 7.13/6.62 ~ bnd_c1_2 X150 bnd_a1139))) &
% 7.13/6.62 (~ bnd_c3_0 | ~ bnd_c5_0)) &
% 7.13/6.62 (~ bnd_c2_0 |
% 7.13/6.62 (ALL X152.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 bnd_c1_1 X152 |
% 7.13/6.62 (bnd_ndr1_1 X152 & bnd_c2_2 X152 bnd_a1140) &
% 7.13/6.62 ~ bnd_c5_2 X152 bnd_a1140))) &
% 7.13/6.62 ((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1141) &
% 7.13/6.62 bnd_c1_2 bnd_a1141 bnd_a1142) &
% 7.13/6.62 ~ bnd_c2_2 bnd_a1141 bnd_a1142) &
% 7.13/6.62 bnd_ndr1_1 bnd_a1141) &
% 7.13/6.62 bnd_c4_2 bnd_a1141 bnd_a1143) &
% 7.13/6.62 ~ bnd_c3_2 bnd_a1141 bnd_a1143) &
% 7.13/6.62 bnd_c1_2 bnd_a1141 bnd_a1143) &
% 7.13/6.62 ~ bnd_c5_1 bnd_a1141 |
% 7.13/6.62 bnd_c4_0)) &
% 7.13/6.62 ((~ bnd_c4_0 | ~ bnd_c1_0) |
% 7.13/6.62 (ALL X153. bnd_ndr1_0 --> bnd_c3_1 X153 | ~ bnd_c5_1 X153))) &
% 7.13/6.62 (bnd_c4_0 | ~ bnd_c2_0)) &
% 7.13/6.62 ((((bnd_ndr1_0 & bnd_c4_1 bnd_a1144) &
% 7.13/6.62 (ALL X154.
% 7.13/6.62 bnd_ndr1_1 bnd_a1144 -->
% 7.13/6.62 bnd_c3_2 bnd_a1144 X154 | bnd_c5_2 bnd_a1144 X154)) &
% 7.13/6.62 (ALL X155.
% 7.13/6.62 bnd_ndr1_1 bnd_a1144 -->
% 7.13/6.62 (~ bnd_c2_2 bnd_a1144 X155 | bnd_c4_2 bnd_a1144 X155) |
% 7.13/6.62 ~ bnd_c1_2 bnd_a1144 X155) |
% 7.13/6.62 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1145) &
% 7.13/6.62 ~ bnd_c2_2 bnd_a1145 bnd_a1146) &
% 7.13/6.62 bnd_c1_2 bnd_a1145 bnd_a1146) &
% 7.13/6.62 ~ bnd_c3_2 bnd_a1145 bnd_a1146) &
% 7.13/6.62 ~ bnd_c2_1 bnd_a1145) &
% 7.13/6.62 ~ bnd_c4_1 bnd_a1145) |
% 7.13/6.62 ~ bnd_c5_0)) &
% 7.13/6.62 ((bnd_c2_0 | ~ bnd_c1_0) | ~ bnd_c5_0)) &
% 7.13/6.62 (((((((bnd_ndr1_0 &
% 7.13/6.62 (ALL X156.
% 7.13/6.62 bnd_ndr1_1 bnd_a1147 -->
% 7.13/6.62 (~ bnd_c5_2 bnd_a1147 X156 | ~ bnd_c2_2 bnd_a1147 X156) |
% 7.13/6.62 bnd_c3_2 bnd_a1147 X156)) &
% 7.13/6.62 bnd_ndr1_1 bnd_a1147) &
% 7.13/6.62 bnd_c5_2 bnd_a1147 bnd_a1148) &
% 7.13/6.62 bnd_c4_2 bnd_a1147 bnd_a1148) &
% 7.13/6.62 bnd_c2_2 bnd_a1147 bnd_a1148) &
% 7.13/6.62 (ALL X157.
% 7.13/6.62 bnd_ndr1_1 bnd_a1147 -->
% 7.13/6.62 (bnd_c1_2 bnd_a1147 X157 | ~ bnd_c2_2 bnd_a1147 X157) |
% 7.13/6.62 bnd_c3_2 bnd_a1147 X157) |
% 7.13/6.62 ((((bnd_ndr1_0 & ~ bnd_c3_1 bnd_a1149) & bnd_ndr1_1 bnd_a1149) &
% 7.13/6.62 bnd_c4_2 bnd_a1149 bnd_a1150) &
% 7.13/6.62 bnd_c3_2 bnd_a1149 bnd_a1150) &
% 7.13/6.62 bnd_c5_1 bnd_a1149) |
% 7.13/6.62 ~ bnd_c1_0)) &
% 7.13/6.62 (((((bnd_ndr1_0 &
% 7.13/6.62 (ALL X158.
% 7.13/6.62 bnd_ndr1_1 bnd_a1151 -->
% 7.13/6.62 (bnd_c5_2 bnd_a1151 X158 | ~ bnd_c1_2 bnd_a1151 X158) |
% 7.13/6.62 ~ bnd_c2_2 bnd_a1151 X158)) &
% 7.13/6.62 bnd_c5_1 bnd_a1151) &
% 7.13/6.62 bnd_ndr1_1 bnd_a1151) &
% 7.13/6.62 ~ bnd_c1_2 bnd_a1151 bnd_a1152 |
% 7.13/6.62 (((((bnd_ndr1_0 & bnd_c2_1 bnd_a1153) & bnd_ndr1_1 bnd_a1153) &
% 7.13/6.62 bnd_c4_2 bnd_a1153 bnd_a1154) &
% 7.13/6.62 ~ bnd_c2_2 bnd_a1153 bnd_a1154) &
% 7.13/6.62 bnd_c5_2 bnd_a1153 bnd_a1154) &
% 7.13/6.62 ~ bnd_c4_1 bnd_a1153) |
% 7.13/6.62 ~ bnd_c1_0)) &
% 7.13/6.62 (((bnd_ndr1_0 & ~ bnd_c3_1 bnd_a1155) & bnd_c5_1 bnd_a1155 |
% 7.13/6.62 (ALL X159.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 (~ bnd_c1_1 X159 |
% 7.13/6.62 ((bnd_ndr1_1 X159 & ~ bnd_c1_2 X159 bnd_a1156) &
% 7.13/6.62 bnd_c3_2 X159 bnd_a1156) &
% 7.13/6.62 ~ bnd_c2_2 X159 bnd_a1156) |
% 7.13/6.62 (ALL X160.
% 7.13/6.62 bnd_ndr1_1 X159 -->
% 7.13/6.62 ~ bnd_c2_2 X159 X160 | ~ bnd_c5_2 X159 X160))) |
% 7.13/6.62 bnd_c1_0)) &
% 7.13/6.62 (((ALL X161.
% 7.13/6.62 bnd_ndr1_0 -->
% 7.13/6.62 ((ALL X162.
% 7.13/6.62 bnd_ndr1_1 X161 -->
% 7.13/6.62 bnd_c4_2 X161 X162 | ~ bnd_c2_2 X161 X162) |
% 7.13/6.62 ~ bnd_c1_1 X161) |
% 7.13/6.62 ~ bnd_c3_1 X161) |
% 7.13/6.62 bnd_c3_0) |
% 7.13/6.62 (bnd_ndr1_0 & bnd_c5_1 bnd_a1157) &
% 7.13/6.62 (ALL X163.
% 7.13/6.62 bnd_ndr1_1 bnd_a1157 -->
% 7.13/6.62 (bnd_c2_2 bnd_a1157 X163 | ~ bnd_c4_2 bnd_a1157 X163) |
% 7.13/6.62 bnd_c1_2 bnd_a1157 X163)))
% 16.23/15.73 Unfolded term: ~ ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((ALL U.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (((bnd_ndr1_1 U & ~ bnd_c2_2 U bnd_a999) & bnd_c3_2 U bnd_a999) &
% 16.23/15.73 bnd_c1_2 U bnd_a999 |
% 16.23/15.73 ~ bnd_c1_1 U) |
% 16.23/15.73 (ALL V.
% 16.23/15.73 bnd_ndr1_1 U --> (bnd_c3_2 U V | bnd_c2_2 U V) | bnd_c5_2 U V)) |
% 16.23/15.73 bnd_c3_0) |
% 16.23/15.73 (ALL W.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 ((ALL X. bnd_ndr1_1 W --> bnd_c1_2 W X | ~ bnd_c4_2 W X) |
% 16.23/15.73 (ALL Y.
% 16.23/15.73 bnd_ndr1_1 W --> (bnd_c1_2 W Y | bnd_c2_2 W Y) | bnd_c5_2 W Y)) |
% 16.23/15.73 bnd_c3_1 W)) &
% 16.23/15.73 ((bnd_c2_0 | ~ bnd_c4_0) | bnd_c3_0)) &
% 16.23/15.73 (bnd_c5_0 |
% 16.23/15.73 (((((bnd_ndr1_0 &
% 16.23/15.73 ~ bnd_c2_1 bnd_a1000) &
% 16.23/15.73 (ALL Z.
% 16.23/15.73 bnd_ndr1_1 bnd_a1000 -->
% 16.23/15.73 (bnd_c5_2 bnd_a1000 Z | ~ bnd_c1_2 bnd_a1000 Z) |
% 16.23/15.73 bnd_c2_2 bnd_a1000 Z)) &
% 16.23/15.73 bnd_ndr1_1 bnd_a1000) &
% 16.23/15.73 bnd_c3_2 bnd_a1000 bnd_a1001) &
% 16.23/15.73 ~ bnd_c4_2 bnd_a1000 bnd_a1001) &
% 16.23/15.73 ~ bnd_c5_2 bnd_a1000 bnd_a1001)) &
% 16.23/15.73 ((~ bnd_c3_0 |
% 16.23/15.73 (ALL X1.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (bnd_c3_1 X1 | bnd_c5_1 X1) |
% 16.23/15.73 (ALL X2.
% 16.23/15.73 bnd_ndr1_1 X1 -->
% 16.23/15.73 (~ bnd_c2_2 X1 X2 | bnd_c5_2 X1 X2) | bnd_c3_2 X1 X2))) |
% 16.23/15.73 (ALL X3.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (ALL X4.
% 16.23/15.73 bnd_ndr1_1 X3 -->
% 16.23/15.73 (~ bnd_c3_2 X3 X4 | ~ bnd_c5_2 X3 X4) | bnd_c4_2 X3 X4) |
% 16.23/15.73 ((bnd_ndr1_1 X3 & bnd_c4_2 X3 bnd_a1002) & bnd_c2_2 X3 bnd_a1002) &
% 16.23/15.73 ~ bnd_c1_2 X3 bnd_a1002))) &
% 16.23/15.73 ((bnd_c2_0 | ~ bnd_c3_0) | bnd_c5_0)) &
% 16.23/15.73 (((ALL X5.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (~ bnd_c2_1 X5 |
% 16.23/15.73 ((bnd_ndr1_1 X5 & bnd_c3_2 X5 bnd_a1003) & ~ bnd_c1_2 X5 bnd_a1003) &
% 16.23/15.73 bnd_c5_2 X5 bnd_a1003) |
% 16.23/15.73 ((bnd_ndr1_1 X5 & bnd_c4_2 X5 bnd_a1004) & bnd_c3_2 X5 bnd_a1004) &
% 16.23/15.73 ~ bnd_c5_2 X5 bnd_a1004) |
% 16.23/15.73 ((bnd_ndr1_0 &
% 16.23/15.73 (ALL X6.
% 16.23/15.73 bnd_ndr1_1 bnd_a1005 -->
% 16.23/15.73 bnd_c5_2 bnd_a1005 X6 | ~ bnd_c4_2 bnd_a1005 X6)) &
% 16.23/15.73 ~ bnd_c3_1 bnd_a1005) &
% 16.23/15.73 bnd_c4_1 bnd_a1005) |
% 16.23/15.73 (ALL X7.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (bnd_c5_1 X7 | ~ bnd_c1_1 X7) |
% 16.23/15.73 (bnd_ndr1_1 X7 & ~ bnd_c3_2 X7 bnd_a1006) & ~ bnd_c4_2 X7 bnd_a1006))) &
% 16.23/15.73 ((~ bnd_c1_0 | ~ bnd_c5_0) |
% 16.23/15.73 ((((bnd_ndr1_0 &
% 16.23/15.73 (ALL X8.
% 16.23/15.73 bnd_ndr1_1 bnd_a1007 -->
% 16.23/15.73 bnd_c1_2 bnd_a1007 X8 | ~ bnd_c4_2 bnd_a1007 X8)) &
% 16.23/15.73 ~ bnd_c5_1 bnd_a1007) &
% 16.23/15.73 bnd_ndr1_1 bnd_a1007) &
% 16.23/15.73 bnd_c1_2 bnd_a1007 bnd_a1008) &
% 16.23/15.73 bnd_c2_2 bnd_a1007 bnd_a1008)) &
% 16.23/15.73 ((bnd_c2_0 |
% 16.23/15.73 (bnd_ndr1_0 &
% 16.23/15.73 (ALL X9.
% 16.23/15.73 bnd_ndr1_1 bnd_a1009 --> ~ bnd_c5_2 bnd_a1009 X9 | bnd_c2_2 bnd_a1009 X9)) &
% 16.23/15.73 bnd_c2_1 bnd_a1009) |
% 16.23/15.73 ((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1010) &
% 16.23/15.73 ~ bnd_c5_2 bnd_a1010 bnd_a1011) &
% 16.23/15.73 bnd_c2_2 bnd_a1010 bnd_a1011) &
% 16.23/15.73 ~ bnd_c3_2 bnd_a1010 bnd_a1011) &
% 16.23/15.73 bnd_ndr1_1 bnd_a1010) &
% 16.23/15.73 ~ bnd_c5_2 bnd_a1010 bnd_a1012) &
% 16.23/15.73 bnd_c2_2 bnd_a1010 bnd_a1012) &
% 16.23/15.73 ~ bnd_c1_2 bnd_a1010 bnd_a1012) &
% 16.23/15.73 (ALL X10.
% 16.23/15.73 bnd_ndr1_1 bnd_a1010 -->
% 16.23/15.73 (bnd_c3_2 bnd_a1010 X10 |
% 16.23/15.73 ~ bnd_c2_2 bnd_a1010 X10) |
% 16.23/15.73 ~ bnd_c1_2 bnd_a1010 X10))) &
% 16.23/15.73 ((~ bnd_c2_0 | bnd_c1_0) |
% 16.23/15.73 ((bnd_ndr1_0 & bnd_c3_1 bnd_a1013) &
% 16.23/15.73 (ALL X11.
% 16.23/15.73 bnd_ndr1_1 bnd_a1013 -->
% 16.23/15.73 (bnd_c1_2 bnd_a1013 X11 |
% 16.23/15.73 ~ bnd_c5_2 bnd_a1013 X11) |
% 16.23/15.73 bnd_c4_2 bnd_a1013 X11)) &
% 16.23/15.73 ~ bnd_c2_1 bnd_a1013)) &
% 16.23/15.73 (~ bnd_c5_0 |
% 16.23/15.73 ((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1014) &
% 16.23/15.73 ~ bnd_c3_2 bnd_a1014 bnd_a1015) &
% 16.23/15.73 ~ bnd_c2_2 bnd_a1014 bnd_a1015) &
% 16.23/15.73 bnd_c1_2 bnd_a1014 bnd_a1015) &
% 16.23/15.73 ~ bnd_c2_1 bnd_a1014)) &
% 16.23/15.73 (((ALL X12.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 ~ bnd_c3_1 X12 |
% 16.23/15.73 (ALL X13.
% 16.23/15.73 bnd_ndr1_1 X12 --> ~ bnd_c2_2 X12 X13 | ~ bnd_c3_2 X12 X13)) |
% 16.23/15.73 bnd_c2_0) |
% 16.23/15.73 bnd_c1_0)) &
% 16.23/15.73 ((~ bnd_c1_0 | ~ bnd_c2_0) | ~ bnd_c3_0)) &
% 16.23/15.73 ((bnd_c5_0 | ~ bnd_c2_0) | bnd_c4_0)) &
% 16.23/15.73 ((~ bnd_c3_0 | ~ bnd_c4_0) |
% 16.23/15.73 (((((bnd_ndr1_0 & bnd_c1_1 bnd_a1016) &
% 16.23/15.73 ~ bnd_c4_1 bnd_a1016) &
% 16.23/15.73 bnd_ndr1_1 bnd_a1016) &
% 16.23/15.73 bnd_c2_2 bnd_a1016 bnd_a1017) &
% 16.23/15.73 bnd_c5_2 bnd_a1016 bnd_a1017) &
% 16.23/15.73 ~ bnd_c1_2 bnd_a1016 bnd_a1017)) &
% 16.23/15.73 ((~ bnd_c2_0 |
% 16.23/15.73 (((((bnd_ndr1_0 & ~ bnd_c5_1 bnd_a1018) &
% 16.23/15.73 bnd_ndr1_1 bnd_a1018) &
% 16.23/15.73 bnd_c5_2 bnd_a1018 bnd_a1019) &
% 16.23/15.73 ~ bnd_c3_2 bnd_a1018 bnd_a1019) &
% 16.23/15.73 ~ bnd_c4_2 bnd_a1018 bnd_a1019) &
% 16.23/15.73 (ALL X14.
% 16.23/15.73 bnd_ndr1_1 bnd_a1018 -->
% 16.23/15.73 (bnd_c1_2 bnd_a1018 X14 |
% 16.23/15.73 bnd_c5_2 bnd_a1018 X14) |
% 16.23/15.73 ~ bnd_c4_2 bnd_a1018 X14)) |
% 16.23/15.73 ~ bnd_c5_0)) &
% 16.23/15.73 ((ALL X15.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 ((bnd_ndr1_1 X15 & bnd_c4_2 X15 bnd_a1020) &
% 16.23/15.73 ~ bnd_c5_2 X15 bnd_a1020) &
% 16.23/15.73 bnd_c1_2 X15 bnd_a1020 |
% 16.23/15.73 bnd_c4_1 X15) |
% 16.23/15.73 ~ bnd_c5_0)) &
% 16.23/15.73 ((~ bnd_c4_0 |
% 16.23/15.73 ((bnd_ndr1_0 &
% 16.23/15.73 (ALL X16.
% 16.23/15.73 bnd_ndr1_1 bnd_a1021 -->
% 16.23/15.73 bnd_c3_2 bnd_a1021 X16 |
% 16.23/15.73 bnd_c2_2 bnd_a1021 X16)) &
% 16.23/15.73 (ALL X17.
% 16.23/15.73 bnd_ndr1_1 bnd_a1021 -->
% 16.23/15.73 (~ bnd_c5_2 bnd_a1021 X17 |
% 16.23/15.73 bnd_c4_2 bnd_a1021 X17) |
% 16.23/15.73 ~ bnd_c1_2 bnd_a1021 X17)) &
% 16.23/15.73 ~ bnd_c3_1 bnd_a1021) |
% 16.23/15.73 ~ bnd_c1_0)) &
% 16.23/15.73 ((~ bnd_c2_0 |
% 16.23/15.73 (ALL X18.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 ((bnd_ndr1_1 X18 & bnd_c3_2 X18 bnd_a1022) &
% 16.23/15.73 ~ bnd_c5_2 X18 bnd_a1022 |
% 16.23/15.73 ~ bnd_c3_1 X18) |
% 16.23/15.73 (ALL X19.
% 16.23/15.73 bnd_ndr1_1 X18 -->
% 16.23/15.73 bnd_c5_2 X18 X19 | bnd_c4_2 X18 X19))) |
% 16.23/15.73 (ALL X20.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (~ bnd_c2_1 X20 | ~ bnd_c4_1 X20) |
% 16.23/15.73 (ALL X21.
% 16.23/15.73 bnd_ndr1_1 X20 -->
% 16.23/15.73 ~ bnd_c4_2 X20 X21 | bnd_c2_2 X20 X21)))) &
% 16.23/15.73 ((bnd_c4_0 |
% 16.23/15.73 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1023) &
% 16.23/15.73 ~ bnd_c2_2 bnd_a1023 bnd_a1024) &
% 16.23/15.73 bnd_c1_2 bnd_a1023 bnd_a1024) &
% 16.23/15.73 bnd_c3_2 bnd_a1023 bnd_a1024) &
% 16.23/15.73 bnd_c1_1 bnd_a1023) &
% 16.23/15.73 ~ bnd_c2_1 bnd_a1023) |
% 16.23/15.73 (bnd_ndr1_0 &
% 16.23/15.73 (ALL X22.
% 16.23/15.73 bnd_ndr1_1 bnd_a1025 -->
% 16.23/15.73 (~ bnd_c4_2 bnd_a1025 X22 |
% 16.23/15.73 bnd_c5_2 bnd_a1025 X22) |
% 16.23/15.73 ~ bnd_c1_2 bnd_a1025 X22)) &
% 16.23/15.73 (ALL X23.
% 16.23/15.73 bnd_ndr1_1 bnd_a1025 -->
% 16.23/15.73 (~ bnd_c3_2 bnd_a1025 X23 |
% 16.23/15.73 bnd_c5_2 bnd_a1025 X23) |
% 16.23/15.73 ~ bnd_c1_2 bnd_a1025 X23))) &
% 16.23/15.73 (((bnd_ndr1_0 &
% 16.23/15.73 (ALL X24.
% 16.23/15.73 bnd_ndr1_1 bnd_a1026 -->
% 16.23/15.73 (~ bnd_c5_2 bnd_a1026 X24 |
% 16.23/15.73 bnd_c2_2 bnd_a1026 X24) |
% 16.23/15.73 ~ bnd_c4_2 bnd_a1026 X24)) &
% 16.23/15.73 ~ bnd_c3_1 bnd_a1026 |
% 16.23/15.73 ~ bnd_c3_0) |
% 16.23/15.73 ((bnd_ndr1_0 & bnd_c4_1 bnd_a1027) &
% 16.23/15.73 bnd_c5_1 bnd_a1027) &
% 16.23/15.73 (ALL X25.
% 16.23/15.73 bnd_ndr1_1 bnd_a1027 -->
% 16.23/15.73 bnd_c1_2 bnd_a1027 X25 |
% 16.23/15.73 ~ bnd_c4_2 bnd_a1027 X25))) &
% 16.23/15.73 (~ bnd_c5_0 | bnd_c4_0)) &
% 16.23/15.73 (((bnd_ndr1_0 &
% 16.23/15.73 (ALL X26.
% 16.23/15.73 bnd_ndr1_1 bnd_a1028 -->
% 16.23/15.73 (bnd_c5_2 bnd_a1028 X26 |
% 16.23/15.73 ~ bnd_c3_2 bnd_a1028 X26) |
% 16.23/15.73 ~ bnd_c2_2 bnd_a1028 X26)) &
% 16.23/15.73 bnd_c3_1 bnd_a1028 |
% 16.23/15.73 bnd_c1_0) |
% 16.23/15.73 (ALL X27.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 ((ALL X28.
% 16.23/15.73 bnd_ndr1_1 X27 -->
% 16.23/15.73 (bnd_c2_2 X27 X28 | ~ bnd_c3_2 X27 X28) |
% 16.23/15.73 bnd_c1_2 X27 X28) |
% 16.23/15.73 ((bnd_ndr1_1 X27 & ~ bnd_c4_2 X27 bnd_a1029) &
% 16.23/15.73 bnd_c2_2 X27 bnd_a1029) &
% 16.23/15.73 bnd_c3_2 X27 bnd_a1029) |
% 16.23/15.73 (bnd_ndr1_1 X27 & ~ bnd_c5_2 X27 bnd_a1030) &
% 16.23/15.73 ~ bnd_c4_2 X27 bnd_a1030))) &
% 16.23/15.73 ((((((bnd_ndr1_0 & bnd_c2_1 bnd_a1031) &
% 16.23/15.73 bnd_ndr1_1 bnd_a1031) &
% 16.23/15.73 ~ bnd_c2_2 bnd_a1031 bnd_a1032) &
% 16.23/15.73 bnd_c5_2 bnd_a1031 bnd_a1032) &
% 16.23/15.73 bnd_c4_1 bnd_a1031 |
% 16.23/15.73 ((bnd_ndr1_0 &
% 16.23/15.73 (ALL X29.
% 16.23/15.73 bnd_ndr1_1 bnd_a1033 -->
% 16.23/15.73 (bnd_c5_2 bnd_a1033 X29 |
% 16.23/15.73 ~ bnd_c3_2 bnd_a1033 X29) |
% 16.23/15.73 bnd_c4_2 bnd_a1033 X29)) &
% 16.23/15.73 ~ bnd_c5_1 bnd_a1033) &
% 16.23/15.73 bnd_c3_1 bnd_a1033) |
% 16.23/15.73 ~ bnd_c1_0)) &
% 16.23/15.73 (((ALL X30.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (bnd_c5_1 X30 | bnd_c3_1 X30) | bnd_c2_1 X30) |
% 16.23/15.73 ~ bnd_c5_0) |
% 16.23/15.73 ~ bnd_c1_0)) &
% 16.23/15.73 ((ALL X31.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 ((bnd_ndr1_1 X31 & ~ bnd_c5_2 X31 bnd_a1034) &
% 16.23/15.73 bnd_c1_2 X31 bnd_a1034) &
% 16.23/15.73 ~ bnd_c4_2 X31 bnd_a1034 |
% 16.23/15.73 (ALL X32.
% 16.23/15.73 bnd_ndr1_1 X31 -->
% 16.23/15.73 (~ bnd_c4_2 X31 X32 | ~ bnd_c3_2 X31 X32) |
% 16.23/15.73 bnd_c2_2 X31 X32)) |
% 16.23/15.73 bnd_c2_0)) &
% 16.23/15.73 ((ALL X33.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (((bnd_ndr1_1 X33 & ~ bnd_c2_2 X33 bnd_a1035) &
% 16.23/15.73 bnd_c4_2 X33 bnd_a1035) &
% 16.23/15.73 bnd_c5_2 X33 bnd_a1035 |
% 16.23/15.73 bnd_c3_1 X33) |
% 16.23/15.73 ~ bnd_c2_1 X33) |
% 16.23/15.73 ~ bnd_c2_0)) &
% 16.23/15.73 (((bnd_ndr1_0 &
% 16.23/15.73 (ALL X34.
% 16.23/15.73 bnd_ndr1_1 bnd_a1036 -->
% 16.23/15.73 (bnd_c1_2 bnd_a1036 X34 | ~ bnd_c3_2 bnd_a1036 X34) |
% 16.23/15.73 bnd_c4_2 bnd_a1036 X34)) &
% 16.23/15.73 ~ bnd_c4_1 bnd_a1036 |
% 16.23/15.73 bnd_c1_0) |
% 16.23/15.73 (ALL X35. bnd_ndr1_0 --> bnd_c4_1 X35 | bnd_c2_1 X35))) &
% 16.23/15.73 ((bnd_c5_0 |
% 16.23/15.73 (ALL X36.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 bnd_c5_1 X36 |
% 16.23/15.73 (ALL X37.
% 16.23/15.73 bnd_ndr1_1 X36 -->
% 16.23/15.73 (~ bnd_c3_2 X36 X37 | ~ bnd_c2_2 X36 X37) |
% 16.23/15.73 bnd_c1_2 X36 X37))) |
% 16.23/15.73 bnd_c4_0)) &
% 16.23/15.73 (((ALL X38.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (~ bnd_c2_1 X38 |
% 16.23/15.73 ((bnd_ndr1_1 X38 & ~ bnd_c1_2 X38 bnd_a1037) &
% 16.23/15.73 bnd_c3_2 X38 bnd_a1037) &
% 16.23/15.73 bnd_c5_2 X38 bnd_a1037) |
% 16.23/15.73 bnd_c4_1 X38) |
% 16.23/15.73 ~ bnd_c1_0) |
% 16.23/15.73 (ALL X39.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (~ bnd_c1_1 X39 |
% 16.23/15.73 ((bnd_ndr1_1 X39 & ~ bnd_c4_2 X39 bnd_a1038) &
% 16.23/15.73 ~ bnd_c2_2 X39 bnd_a1038) &
% 16.23/15.73 ~ bnd_c3_2 X39 bnd_a1038) |
% 16.23/15.73 (ALL X40.
% 16.23/15.73 bnd_ndr1_1 X39 -->
% 16.23/15.73 (~ bnd_c3_2 X39 X40 | bnd_c2_2 X39 X40) |
% 16.23/15.73 ~ bnd_c5_2 X39 X40)))) &
% 16.23/15.73 ((bnd_c4_0 |
% 16.23/15.73 ((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1039) &
% 16.23/15.73 ~ bnd_c5_2 bnd_a1039 bnd_a1040) &
% 16.23/15.73 bnd_c2_2 bnd_a1039 bnd_a1040) &
% 16.23/15.73 ~ bnd_c3_2 bnd_a1039 bnd_a1040) &
% 16.23/15.73 (ALL X41.
% 16.23/15.73 bnd_ndr1_1 bnd_a1039 -->
% 16.23/15.73 (bnd_c3_2 bnd_a1039 X41 | bnd_c2_2 bnd_a1039 X41) |
% 16.23/15.73 bnd_c4_2 bnd_a1039 X41)) &
% 16.23/15.73 bnd_ndr1_1 bnd_a1039) &
% 16.23/15.73 bnd_c4_2 bnd_a1039 bnd_a1041) &
% 16.23/15.73 bnd_c2_2 bnd_a1039 bnd_a1041) &
% 16.23/15.73 bnd_c3_2 bnd_a1039 bnd_a1041) |
% 16.23/15.73 (ALL X42.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 ((ALL X43.
% 16.23/15.73 bnd_ndr1_1 X42 -->
% 16.23/15.73 ~ bnd_c1_2 X42 X43 | ~ bnd_c2_2 X42 X43) |
% 16.23/15.73 bnd_c5_1 X42) |
% 16.23/15.73 ~ bnd_c1_1 X42))) &
% 16.23/15.73 ((bnd_c4_0 |
% 16.23/15.73 (((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1042) &
% 16.23/15.73 ~ bnd_c3_2 bnd_a1042 bnd_a1043) &
% 16.23/15.73 bnd_c5_2 bnd_a1042 bnd_a1043) &
% 16.23/15.73 ~ bnd_c2_2 bnd_a1042 bnd_a1043) &
% 16.23/15.73 bnd_ndr1_1 bnd_a1042) &
% 16.23/15.73 ~ bnd_c2_2 bnd_a1042 bnd_a1044) &
% 16.23/15.73 ~ bnd_c5_2 bnd_a1042 bnd_a1044) &
% 16.23/15.73 bnd_ndr1_1 bnd_a1042) &
% 16.23/15.73 bnd_c1_2 bnd_a1042 bnd_a1045) &
% 16.23/15.73 ~ bnd_c3_2 bnd_a1042 bnd_a1045) |
% 16.23/15.73 ((bnd_ndr1_0 & bnd_c2_1 bnd_a1046) & ~ bnd_c5_1 bnd_a1046) &
% 16.23/15.73 ~ bnd_c4_1 bnd_a1046)) &
% 16.23/15.73 (((ALL X44.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (~ bnd_c3_1 X44 |
% 16.23/15.73 (ALL X45.
% 16.23/15.73 bnd_ndr1_1 X44 -->
% 16.23/15.73 (bnd_c2_2 X44 X45 | bnd_c1_2 X44 X45) |
% 16.23/15.73 ~ bnd_c4_2 X44 X45)) |
% 16.23/15.73 ~ bnd_c1_1 X44) |
% 16.23/15.73 ~ bnd_c4_0) |
% 16.23/15.73 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1047) &
% 16.23/15.73 bnd_c5_2 bnd_a1047 bnd_a1048) &
% 16.23/15.73 ~ bnd_c3_2 bnd_a1047 bnd_a1048) &
% 16.23/15.73 bnd_c4_2 bnd_a1047 bnd_a1048) &
% 16.23/15.73 (ALL X46.
% 16.23/15.73 bnd_ndr1_1 bnd_a1047 -->
% 16.23/15.73 (bnd_c2_2 bnd_a1047 X46 | bnd_c5_2 bnd_a1047 X46) |
% 16.23/15.73 ~ bnd_c4_2 bnd_a1047 X46)) &
% 16.23/15.73 (ALL X47.
% 16.23/15.73 bnd_ndr1_1 bnd_a1047 -->
% 16.23/15.73 (bnd_c2_2 bnd_a1047 X47 | ~ bnd_c4_2 bnd_a1047 X47) |
% 16.23/15.73 bnd_c3_2 bnd_a1047 X47))) &
% 16.23/15.73 (~ bnd_c1_0 |
% 16.23/15.73 ((bnd_ndr1_0 & bnd_c5_1 bnd_a1049) &
% 16.23/15.73 (ALL X48.
% 16.23/15.73 bnd_ndr1_1 bnd_a1049 -->
% 16.23/15.73 (~ bnd_c2_2 bnd_a1049 X48 | bnd_c1_2 bnd_a1049 X48) |
% 16.23/15.73 ~ bnd_c3_2 bnd_a1049 X48)) &
% 16.23/15.73 ~ bnd_c3_1 bnd_a1049)) &
% 16.23/15.73 ((~ bnd_c1_0 |
% 16.23/15.73 (bnd_ndr1_0 &
% 16.23/15.73 (ALL X49.
% 16.23/15.73 bnd_ndr1_1 bnd_a1050 -->
% 16.23/15.73 (bnd_c4_2 bnd_a1050 X49 | ~ bnd_c2_2 bnd_a1050 X49) |
% 16.23/15.73 bnd_c3_2 bnd_a1050 X49)) &
% 16.23/15.73 ~ bnd_c2_1 bnd_a1050) |
% 16.23/15.73 bnd_c3_0)) &
% 16.23/15.73 (~ bnd_c2_0 | bnd_c4_0)) &
% 16.23/15.73 (((ALL X50. bnd_ndr1_0 --> bnd_c1_1 X50 | ~ bnd_c3_1 X50) | bnd_c5_0) |
% 16.23/15.73 (((((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a1051) &
% 16.23/15.73 (ALL X51.
% 16.23/15.73 bnd_ndr1_1 bnd_a1051 -->
% 16.23/15.73 (~ bnd_c2_2 bnd_a1051 X51 | bnd_c4_2 bnd_a1051 X51) |
% 16.23/15.73 ~ bnd_c5_2 bnd_a1051 X51)) &
% 16.23/15.73 bnd_ndr1_1 bnd_a1051) &
% 16.23/15.73 ~ bnd_c4_2 bnd_a1051 bnd_a1052) &
% 16.23/15.73 bnd_c5_2 bnd_a1051 bnd_a1052) &
% 16.23/15.73 bnd_c1_2 bnd_a1051 bnd_a1052)) &
% 16.23/15.73 ((bnd_c4_0 |
% 16.23/15.73 ((bnd_ndr1_0 & bnd_c1_1 bnd_a1053) & bnd_c4_1 bnd_a1053) &
% 16.23/15.73 (ALL X52.
% 16.23/15.73 bnd_ndr1_1 bnd_a1053 -->
% 16.23/15.73 (bnd_c4_2 bnd_a1053 X52 | bnd_c2_2 bnd_a1053 X52) |
% 16.23/15.73 ~ bnd_c1_2 bnd_a1053 X52)) |
% 16.23/15.73 (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1054) &
% 16.23/15.73 ~ bnd_c4_2 bnd_a1054 bnd_a1055) &
% 16.23/15.73 ~ bnd_c2_2 bnd_a1054 bnd_a1055) &
% 16.23/15.73 bnd_ndr1_1 bnd_a1054) &
% 16.23/15.73 bnd_c3_2 bnd_a1054 bnd_a1056) &
% 16.23/15.73 bnd_c5_2 bnd_a1054 bnd_a1056) &
% 16.23/15.73 bnd_c4_2 bnd_a1054 bnd_a1056) &
% 16.23/15.73 bnd_c2_1 bnd_a1054)) &
% 16.23/15.73 (~ bnd_c5_0 | ~ bnd_c1_0)) &
% 16.23/15.73 ((~ bnd_c2_0 | bnd_c1_0) |
% 16.23/15.73 (ALL X53.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (~ bnd_c5_1 X53 | bnd_c2_1 X53) |
% 16.23/15.73 (ALL X54. bnd_ndr1_1 X53 --> bnd_c5_2 X53 X54 | bnd_c4_2 X53 X54)))) &
% 16.23/15.73 ((((((bnd_ndr1_0 &
% 16.23/15.73 ~ bnd_c2_1 bnd_a1057) &
% 16.23/15.73 ~ bnd_c5_1 bnd_a1057) &
% 16.23/15.73 bnd_ndr1_1 bnd_a1057) &
% 16.23/15.73 ~ bnd_c4_2 bnd_a1057 bnd_a1058) &
% 16.23/15.73 bnd_c3_2 bnd_a1057 bnd_a1058 |
% 16.23/15.73 (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1059) & bnd_c5_2 bnd_a1059 bnd_a1060) &
% 16.23/15.73 bnd_c2_2 bnd_a1059 bnd_a1060) &
% 16.23/15.73 ~ bnd_c1_2 bnd_a1059 bnd_a1060) &
% 16.23/15.73 (ALL X55.
% 16.23/15.73 bnd_ndr1_1 bnd_a1059 -->
% 16.23/15.73 (bnd_c3_2 bnd_a1059 X55 | ~ bnd_c5_2 bnd_a1059 X55) |
% 16.23/15.73 bnd_c1_2 bnd_a1059 X55)) &
% 16.23/15.73 bnd_ndr1_1 bnd_a1059) &
% 16.23/15.73 bnd_c3_2 bnd_a1059 bnd_a1061) &
% 16.23/15.73 bnd_c1_2 bnd_a1059 bnd_a1061) |
% 16.23/15.73 ((bnd_ndr1_0 &
% 16.23/15.73 (ALL X56.
% 16.23/15.73 bnd_ndr1_1 bnd_a1062 -->
% 16.23/15.73 (~ bnd_c1_2 bnd_a1062 X56 | bnd_c5_2 bnd_a1062 X56) |
% 16.23/15.73 bnd_c2_2 bnd_a1062 X56)) &
% 16.23/15.73 ~ bnd_c5_1 bnd_a1062) &
% 16.23/15.73 bnd_c4_1 bnd_a1062)) &
% 16.23/15.73 ((bnd_c5_0 | bnd_c2_0) |
% 16.23/15.73 (bnd_ndr1_0 &
% 16.23/15.73 (ALL X57.
% 16.23/15.73 bnd_ndr1_1 bnd_a1063 -->
% 16.23/15.73 ~ bnd_c5_2 bnd_a1063 X57 | ~ bnd_c3_2 bnd_a1063 X57)) &
% 16.23/15.73 ~ bnd_c1_1 bnd_a1063)) &
% 16.23/15.73 (~ bnd_c1_0 | ~ bnd_c4_0)) &
% 16.23/15.73 ((bnd_c2_0 |
% 16.23/15.73 (ALL X58.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (~ bnd_c4_1 X58 |
% 16.23/15.73 (ALL X59.
% 16.23/15.73 bnd_ndr1_1 X58 -->
% 16.23/15.73 (bnd_c2_2 X58 X59 | ~ bnd_c5_2 X58 X59) | ~ bnd_c4_2 X58 X59)) |
% 16.23/15.73 ~ bnd_c5_1 X58)) |
% 16.23/15.73 (ALL X60.
% 16.23/15.73 bnd_ndr1_0 --> bnd_c2_1 X60 | bnd_c1_1 X60))) &
% 16.23/15.73 ((~ bnd_c2_0 |
% 16.23/15.73 (ALL X61.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (bnd_c3_1 X61 |
% 16.23/15.73 (ALL X62.
% 16.23/15.73 bnd_ndr1_1 X61 -->
% 16.23/15.73 (~ bnd_c5_2 X61 X62 | ~ bnd_c2_2 X61 X62) | ~ bnd_c4_2 X61 X62)) |
% 16.23/15.73 (ALL X63. bnd_ndr1_1 X61 --> bnd_c4_2 X61 X63 | bnd_c5_2 X61 X63))) |
% 16.23/15.73 (((((((bnd_ndr1_0 &
% 16.23/15.73 bnd_ndr1_1 bnd_a1064) &
% 16.23/15.73 ~ bnd_c2_2 bnd_a1064 bnd_a1065) &
% 16.23/15.73 bnd_c4_2 bnd_a1064 bnd_a1065) &
% 16.23/15.73 ~ bnd_c1_2 bnd_a1064 bnd_a1065) &
% 16.23/15.73 bnd_c2_1 bnd_a1064) &
% 16.23/15.73 bnd_ndr1_1 bnd_a1064) &
% 16.23/15.73 ~ bnd_c5_2 bnd_a1064 bnd_a1066) &
% 16.23/15.73 ~ bnd_c1_2 bnd_a1064 bnd_a1066)) &
% 16.23/15.73 (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1067) &
% 16.23/15.73 ~ bnd_c1_2 bnd_a1067 bnd_a1068) &
% 16.23/15.73 bnd_c2_2 bnd_a1067 bnd_a1068) &
% 16.23/15.73 bnd_c3_2 bnd_a1067 bnd_a1068) &
% 16.23/15.73 ~ bnd_c3_1 bnd_a1067) &
% 16.23/15.73 ~ bnd_c4_1 bnd_a1067 |
% 16.23/15.73 bnd_c5_0) |
% 16.23/15.73 bnd_c2_0)) &
% 16.23/15.73 ((((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a1069) &
% 16.23/15.73 bnd_c1_1 bnd_a1069) &
% 16.23/15.73 ~ bnd_c2_1 bnd_a1069 |
% 16.23/15.73 ~ bnd_c2_0) |
% 16.23/15.73 (ALL X64.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 ~ bnd_c4_1 X64 | bnd_c2_1 X64))) &
% 16.23/15.73 (((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a1070) &
% 16.23/15.73 (ALL X65.
% 16.23/15.73 bnd_ndr1_1 bnd_a1070 -->
% 16.23/15.73 (~ bnd_c3_2 bnd_a1070 X65 |
% 16.23/15.73 bnd_c4_2 bnd_a1070 X65) |
% 16.23/15.73 ~ bnd_c2_2 bnd_a1070 X65)) &
% 16.23/15.73 (ALL X66.
% 16.23/15.73 bnd_ndr1_1 bnd_a1070 -->
% 16.23/15.73 (~ bnd_c4_2 bnd_a1070 X66 |
% 16.23/15.73 bnd_c3_2 bnd_a1070 X66) |
% 16.23/15.73 ~ bnd_c2_2 bnd_a1070 X66) |
% 16.23/15.73 (ALL X67.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 ((ALL X68.
% 16.23/15.73 bnd_ndr1_1 X67 --> bnd_c4_2 X67 X68 | ~ bnd_c5_2 X67 X68) |
% 16.23/15.73 ~ bnd_c5_1 X67) |
% 16.23/15.73 bnd_c4_1 X67))) &
% 16.23/15.73 ((bnd_c3_0 | ~ bnd_c1_0) | ~ bnd_c4_0)) &
% 16.23/15.73 (((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a1071) &
% 16.23/15.73 ~ bnd_c2_1 bnd_a1071) &
% 16.23/15.73 (ALL X69.
% 16.23/15.73 bnd_ndr1_1 bnd_a1071 -->
% 16.23/15.73 (bnd_c5_2 bnd_a1071 X69 |
% 16.23/15.73 bnd_c4_2 bnd_a1071 X69) |
% 16.23/15.73 bnd_c1_2 bnd_a1071 X69) |
% 16.23/15.73 bnd_c1_0)) &
% 16.23/15.73 ((~ bnd_c4_0 |
% 16.23/15.73 (ALL X70.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (bnd_c5_1 X70 | bnd_c3_1 X70) |
% 16.23/15.73 ~ bnd_c4_1 X70)) |
% 16.23/15.73 bnd_c1_0)) &
% 16.23/15.73 (((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1072) &
% 16.23/15.73 bnd_c2_2 bnd_a1072 bnd_a1073) &
% 16.23/15.73 ~ bnd_c3_2 bnd_a1072 bnd_a1073) &
% 16.23/15.73 bnd_c4_2 bnd_a1072 bnd_a1073) &
% 16.23/15.73 bnd_c1_1 bnd_a1072) &
% 16.23/15.73 bnd_ndr1_1 bnd_a1072) &
% 16.23/15.73 ~ bnd_c3_2 bnd_a1072 bnd_a1074) &
% 16.23/15.73 ~ bnd_c4_2 bnd_a1072 bnd_a1074 |
% 16.23/15.73 bnd_c2_0) |
% 16.23/15.73 ((((bnd_ndr1_0 &
% 16.23/15.73 (ALL X71.
% 16.23/15.73 bnd_ndr1_1 bnd_a1075 -->
% 16.23/15.73 (bnd_c5_2 bnd_a1075 X71 |
% 16.23/15.73 bnd_c1_2 bnd_a1075 X71) |
% 16.23/15.73 bnd_c4_2 bnd_a1075 X71)) &
% 16.23/15.73 bnd_ndr1_1 bnd_a1075) &
% 16.23/15.73 ~ bnd_c2_2 bnd_a1075 bnd_a1076) &
% 16.23/15.73 ~ bnd_c4_2 bnd_a1075 bnd_a1076) &
% 16.23/15.73 ~ bnd_c1_2 bnd_a1075 bnd_a1076)) &
% 16.23/15.73 ((bnd_c4_0 |
% 16.23/15.73 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1077) &
% 16.23/15.73 ~ bnd_c2_2 bnd_a1077 bnd_a1078) &
% 16.23/15.73 bnd_c5_2 bnd_a1077 bnd_a1078) &
% 16.23/15.73 ~ bnd_c4_2 bnd_a1077 bnd_a1078) &
% 16.23/15.73 bnd_c5_1 bnd_a1077) &
% 16.23/15.73 bnd_c4_1 bnd_a1077) |
% 16.23/15.73 (bnd_ndr1_0 & ~ bnd_c1_1 bnd_a1079) &
% 16.23/15.73 ~ bnd_c2_1 bnd_a1079)) &
% 16.23/15.73 (((ALL X72.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (bnd_c3_1 X72 | bnd_c1_1 X72) |
% 16.23/15.73 ~ bnd_c2_1 X72) |
% 16.23/15.73 ~ bnd_c5_0) |
% 16.23/15.73 ~ bnd_c2_0)) &
% 16.23/15.73 (~ bnd_c3_0 | bnd_c1_0)) &
% 16.23/15.73 ((((((bnd_ndr1_0 & bnd_c1_1 bnd_a1080) &
% 16.23/15.73 bnd_ndr1_1 bnd_a1080) &
% 16.23/15.73 ~ bnd_c5_2 bnd_a1080 bnd_a1081) &
% 16.23/15.73 ~ bnd_c4_2 bnd_a1080 bnd_a1081) &
% 16.23/15.73 bnd_c4_1 bnd_a1080 |
% 16.23/15.73 bnd_c3_0) |
% 16.23/15.73 (ALL X73.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (~ bnd_c2_1 X73 |
% 16.23/15.73 (ALL X74.
% 16.23/15.73 bnd_ndr1_1 X73 -->
% 16.23/15.73 (~ bnd_c1_2 X73 X74 | ~ bnd_c4_2 X73 X74) |
% 16.23/15.73 ~ bnd_c5_2 X73 X74)) |
% 16.23/15.73 bnd_c1_1 X73))) &
% 16.23/15.73 ((~ bnd_c1_0 | ~ bnd_c5_0) | bnd_c2_0)) &
% 16.23/15.73 ((bnd_c1_0 | ~ bnd_c2_0) |
% 16.23/15.73 ((bnd_ndr1_0 &
% 16.23/15.73 (ALL X75.
% 16.23/15.73 bnd_ndr1_1 bnd_a1082 -->
% 16.23/15.73 (~ bnd_c5_2 bnd_a1082 X75 |
% 16.23/15.73 bnd_c4_2 bnd_a1082 X75) |
% 16.23/15.73 bnd_c2_2 bnd_a1082 X75)) &
% 16.23/15.73 ~ bnd_c1_1 bnd_a1082) &
% 16.23/15.73 (ALL X76.
% 16.23/15.73 bnd_ndr1_1 bnd_a1082 -->
% 16.23/15.73 (bnd_c3_2 bnd_a1082 X76 |
% 16.23/15.73 ~ bnd_c2_2 bnd_a1082 X76) |
% 16.23/15.73 bnd_c5_2 bnd_a1082 X76))) &
% 16.23/15.73 ((((bnd_ndr1_0 &
% 16.23/15.73 (ALL X77.
% 16.23/15.73 bnd_ndr1_1 bnd_a1083 -->
% 16.23/15.73 bnd_c1_2 bnd_a1083 X77 |
% 16.23/15.73 bnd_c5_2 bnd_a1083 X77)) &
% 16.23/15.73 ~ bnd_c1_1 bnd_a1083) &
% 16.23/15.73 bnd_c2_1 bnd_a1083 |
% 16.23/15.73 (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1084) &
% 16.23/15.73 bnd_c1_2 bnd_a1084 bnd_a1085) &
% 16.23/15.73 bnd_c2_2 bnd_a1084 bnd_a1085) &
% 16.23/15.73 bnd_c3_2 bnd_a1084 bnd_a1085) &
% 16.23/15.73 bnd_ndr1_1 bnd_a1084) &
% 16.23/15.73 bnd_c3_2 bnd_a1084 bnd_a1086) &
% 16.23/15.73 ~ bnd_c2_2 bnd_a1084 bnd_a1086) &
% 16.23/15.73 ~ bnd_c4_2 bnd_a1084 bnd_a1086) |
% 16.23/15.73 bnd_c4_0)) &
% 16.23/15.73 (((ALL X78.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (((bnd_ndr1_1 X78 & bnd_c1_2 X78 bnd_a1087) &
% 16.23/15.73 bnd_c5_2 X78 bnd_a1087) &
% 16.23/15.73 bnd_c3_2 X78 bnd_a1087 |
% 16.23/15.73 bnd_ndr1_1 X78 & ~ bnd_c5_2 X78 bnd_a1088) |
% 16.23/15.73 ~ bnd_c2_1 X78) |
% 16.23/15.73 ~ bnd_c4_0) |
% 16.23/15.73 ((bnd_ndr1_0 &
% 16.23/15.73 (ALL X79.
% 16.23/15.73 bnd_ndr1_1 bnd_a1089 -->
% 16.23/15.73 (bnd_c2_2 bnd_a1089 X79 | bnd_c3_2 bnd_a1089 X79) |
% 16.23/15.73 bnd_c1_2 bnd_a1089 X79)) &
% 16.23/15.73 ~ bnd_c1_1 bnd_a1089) &
% 16.23/15.73 (ALL X80.
% 16.23/15.73 bnd_ndr1_1 bnd_a1089 -->
% 16.23/15.73 (~ bnd_c2_2 bnd_a1089 X80 |
% 16.23/15.73 ~ bnd_c3_2 bnd_a1089 X80) |
% 16.23/15.73 bnd_c1_2 bnd_a1089 X80))) &
% 16.23/15.73 (((ALL X81.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (((bnd_ndr1_1 X81 & bnd_c2_2 X81 bnd_a1090) &
% 16.23/15.73 ~ bnd_c1_2 X81 bnd_a1090) &
% 16.23/15.73 bnd_c5_2 X81 bnd_a1090 |
% 16.23/15.73 ((bnd_ndr1_1 X81 & ~ bnd_c2_2 X81 bnd_a1091) &
% 16.23/15.73 bnd_c5_2 X81 bnd_a1091) &
% 16.23/15.73 bnd_c4_2 X81 bnd_a1091) |
% 16.23/15.73 (ALL X82.
% 16.23/15.73 bnd_ndr1_1 X81 -->
% 16.23/15.73 ~ bnd_c5_2 X81 X82 | ~ bnd_c4_2 X81 X82)) |
% 16.23/15.73 (ALL X83.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (((bnd_ndr1_1 X83 & ~ bnd_c1_2 X83 bnd_a1092) &
% 16.23/15.73 bnd_c2_2 X83 bnd_a1092) &
% 16.23/15.73 bnd_c4_2 X83 bnd_a1092 |
% 16.23/15.73 (ALL X84.
% 16.23/15.73 bnd_ndr1_1 X83 -->
% 16.23/15.73 (~ bnd_c5_2 X83 X84 | bnd_c2_2 X83 X84) |
% 16.23/15.73 ~ bnd_c1_2 X83 X84)) |
% 16.23/15.73 ((bnd_ndr1_1 X83 & bnd_c1_2 X83 bnd_a1093) &
% 16.23/15.73 ~ bnd_c4_2 X83 bnd_a1093) &
% 16.23/15.73 bnd_c2_2 X83 bnd_a1093)) |
% 16.23/15.73 ((((bnd_ndr1_0 &
% 16.23/15.73 (ALL X85.
% 16.23/15.73 bnd_ndr1_1 bnd_a1094 -->
% 16.23/15.73 (bnd_c2_2 bnd_a1094 X85 |
% 16.23/15.73 ~ bnd_c4_2 bnd_a1094 X85) |
% 16.23/15.73 ~ bnd_c5_2 bnd_a1094 X85)) &
% 16.23/15.73 ~ bnd_c2_1 bnd_a1094) &
% 16.23/15.73 bnd_ndr1_1 bnd_a1094) &
% 16.23/15.73 ~ bnd_c4_2 bnd_a1094 bnd_a1095) &
% 16.23/15.73 bnd_c2_2 bnd_a1094 bnd_a1095)) &
% 16.23/15.73 (((ALL X86.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (bnd_c1_1 X86 |
% 16.23/15.73 (bnd_ndr1_1 X86 & bnd_c4_2 X86 bnd_a1096) &
% 16.23/15.73 ~ bnd_c2_2 X86 bnd_a1096) |
% 16.23/15.73 (ALL X87.
% 16.23/15.73 bnd_ndr1_1 X86 -->
% 16.23/15.73 (~ bnd_c2_2 X86 X87 | ~ bnd_c3_2 X86 X87) |
% 16.23/15.73 ~ bnd_c1_2 X86 X87)) |
% 16.23/15.73 ~ bnd_c2_0) |
% 16.23/15.73 bnd_c5_0)) &
% 16.23/15.73 (~ bnd_c1_0 |
% 16.23/15.73 (((((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a1097) &
% 16.23/15.73 ~ bnd_c5_1 bnd_a1097) &
% 16.23/15.73 bnd_ndr1_1 bnd_a1097) &
% 16.23/15.73 bnd_c1_2 bnd_a1097 bnd_a1098) &
% 16.23/15.73 bnd_c5_2 bnd_a1097 bnd_a1098) &
% 16.23/15.73 bnd_c3_2 bnd_a1097 bnd_a1098)) &
% 16.23/15.73 (((ALL X88. bnd_ndr1_0 --> ~ bnd_c3_1 X88 | bnd_c2_1 X88) |
% 16.23/15.73 ~ bnd_c2_0) |
% 16.23/15.73 ~ bnd_c5_0)) &
% 16.23/15.73 ((((bnd_ndr1_0 & bnd_c5_1 bnd_a1099) & ~ bnd_c2_1 bnd_a1099) &
% 16.23/15.73 ~ bnd_c3_1 bnd_a1099 |
% 16.23/15.73 ~ bnd_c3_0) |
% 16.23/15.73 ~ bnd_c2_0)) &
% 16.23/15.73 ((~ bnd_c3_0 | ~ bnd_c1_0) | ~ bnd_c4_0)) &
% 16.23/15.73 (((ALL X89.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (bnd_c2_1 X89 |
% 16.23/15.73 (ALL X90.
% 16.23/15.73 bnd_ndr1_1 X89 -->
% 16.23/15.73 bnd_c3_2 X89 X90 | ~ bnd_c5_2 X89 X90)) |
% 16.23/15.73 (bnd_ndr1_1 X89 & ~ bnd_c3_2 X89 bnd_a1100) &
% 16.23/15.73 bnd_c1_2 X89 bnd_a1100) |
% 16.23/15.73 bnd_c4_0) |
% 16.23/15.73 ~ bnd_c3_0)) &
% 16.23/15.73 ((bnd_c2_0 |
% 16.23/15.73 (ALL X91.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 ((ALL X92.
% 16.23/15.73 bnd_ndr1_1 X91 -->
% 16.23/15.73 (~ bnd_c3_2 X91 X92 | bnd_c4_2 X91 X92) |
% 16.23/15.73 ~ bnd_c2_2 X91 X92) |
% 16.23/15.73 ((bnd_ndr1_1 X91 & ~ bnd_c5_2 X91 bnd_a1101) &
% 16.23/15.73 ~ bnd_c1_2 X91 bnd_a1101) &
% 16.23/15.73 ~ bnd_c3_2 X91 bnd_a1101) |
% 16.23/15.73 bnd_c3_1 X91)) |
% 16.23/15.73 bnd_c3_0)) &
% 16.23/15.73 (((bnd_ndr1_0 &
% 16.23/15.73 (ALL X93.
% 16.23/15.73 bnd_ndr1_1 bnd_a1102 -->
% 16.23/15.73 (bnd_c2_2 bnd_a1102 X93 | bnd_c3_2 bnd_a1102 X93) |
% 16.23/15.73 bnd_c5_2 bnd_a1102 X93)) &
% 16.23/15.73 (ALL X94.
% 16.23/15.73 bnd_ndr1_1 bnd_a1102 -->
% 16.23/15.73 (bnd_c3_2 bnd_a1102 X94 | bnd_c1_2 bnd_a1102 X94) |
% 16.23/15.73 bnd_c2_2 bnd_a1102 X94) |
% 16.23/15.73 bnd_c1_0) |
% 16.23/15.73 ~ bnd_c4_0)) &
% 16.23/15.73 ((~ bnd_c2_0 |
% 16.23/15.73 (ALL X95.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (bnd_c2_1 X95 |
% 16.23/15.73 (ALL X96.
% 16.23/15.73 bnd_ndr1_1 X95 -->
% 16.23/15.73 (bnd_c2_2 X95 X96 | bnd_c1_2 X95 X96) |
% 16.23/15.73 bnd_c3_2 X95 X96)) |
% 16.23/15.73 (ALL X97.
% 16.23/15.73 bnd_ndr1_1 X95 -->
% 16.23/15.73 (~ bnd_c1_2 X95 X97 | ~ bnd_c3_2 X95 X97) |
% 16.23/15.73 ~ bnd_c5_2 X95 X97))) |
% 16.23/15.73 (ALL X98.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (bnd_c5_1 X98 | ~ bnd_c4_1 X98) |
% 16.23/15.73 (ALL X99.
% 16.23/15.73 bnd_ndr1_1 X98 -->
% 16.23/15.73 bnd_c4_2 X98 X99 | bnd_c5_2 X98 X99)))) &
% 16.23/15.73 ((bnd_c3_0 |
% 16.23/15.73 (ALL X100.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (~ bnd_c1_1 X100 |
% 16.23/15.73 (ALL X101.
% 16.23/15.73 bnd_ndr1_1 X100 -->
% 16.23/15.73 (bnd_c1_2 X100 X101 | ~ bnd_c2_2 X100 X101) |
% 16.23/15.73 ~ bnd_c5_2 X100 X101)) |
% 16.23/15.73 (ALL X102.
% 16.23/15.73 bnd_ndr1_1 X100 -->
% 16.23/15.73 (bnd_c5_2 X100 X102 | ~ bnd_c3_2 X100 X102) |
% 16.23/15.73 bnd_c1_2 X100 X102))) |
% 16.23/15.73 ~ bnd_c2_0)) &
% 16.23/15.73 (bnd_c1_0 | bnd_c3_0)) &
% 16.23/15.73 (((bnd_ndr1_0 &
% 16.23/15.73 (ALL X103.
% 16.23/15.73 bnd_ndr1_1 bnd_a1103 -->
% 16.23/15.73 (bnd_c5_2 bnd_a1103 X103 | bnd_c1_2 bnd_a1103 X103) |
% 16.23/15.73 bnd_c3_2 bnd_a1103 X103)) &
% 16.23/15.73 (ALL X104.
% 16.23/15.73 bnd_ndr1_1 bnd_a1103 -->
% 16.23/15.73 (~ bnd_c3_2 bnd_a1103 X104 | ~ bnd_c1_2 bnd_a1103 X104) |
% 16.23/15.73 bnd_c5_2 bnd_a1103 X104)) &
% 16.23/15.73 bnd_c5_1 bnd_a1103 |
% 16.23/15.73 ~ bnd_c1_0)) &
% 16.23/15.73 (((ALL X105.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (~ bnd_c3_1 X105 | bnd_c1_1 X105) |
% 16.23/15.73 (ALL X106.
% 16.23/15.73 bnd_ndr1_1 X105 -->
% 16.23/15.73 (bnd_c3_2 X105 X106 | ~ bnd_c5_2 X105 X106) |
% 16.23/15.73 bnd_c1_2 X105 X106)) |
% 16.23/15.73 bnd_c2_0) |
% 16.23/15.73 bnd_c4_0)) &
% 16.23/15.73 ((bnd_c5_0 |
% 16.23/15.73 (((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a1104) & bnd_ndr1_1 bnd_a1104) &
% 16.23/15.73 bnd_c3_2 bnd_a1104 bnd_a1105) &
% 16.23/15.73 ~ bnd_c5_2 bnd_a1104 bnd_a1105) |
% 16.23/15.73 ~ bnd_c1_0)) &
% 16.23/15.73 (bnd_c5_0 | ~ bnd_c4_0)) &
% 16.23/15.73 (((ALL X107.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 ((ALL X108.
% 16.23/15.73 bnd_ndr1_1 X107 -->
% 16.23/15.73 (~ bnd_c1_2 X107 X108 | ~ bnd_c2_2 X107 X108) |
% 16.23/15.73 bnd_c5_2 X107 X108) |
% 16.23/15.73 bnd_c3_1 X107) |
% 16.23/15.73 ((bnd_ndr1_1 X107 & bnd_c5_2 X107 bnd_a1106) &
% 16.23/15.73 ~ bnd_c3_2 X107 bnd_a1106) &
% 16.23/15.73 bnd_c4_2 X107 bnd_a1106) |
% 16.23/15.73 bnd_c2_0) |
% 16.23/15.73 (ALL X109.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (((bnd_ndr1_1 X109 & ~ bnd_c4_2 X109 bnd_a1107) &
% 16.23/15.73 bnd_c1_2 X109 bnd_a1107) &
% 16.23/15.73 ~ bnd_c5_2 X109 bnd_a1107 |
% 16.23/15.73 (ALL X110.
% 16.23/15.73 bnd_ndr1_1 X109 -->
% 16.23/15.73 (~ bnd_c5_2 X109 X110 | ~ bnd_c1_2 X109 X110) |
% 16.23/15.73 bnd_c2_2 X109 X110)) |
% 16.23/15.73 (bnd_ndr1_1 X109 & ~ bnd_c5_2 X109 bnd_a1108) &
% 16.23/15.73 bnd_c4_2 X109 bnd_a1108))) &
% 16.23/15.73 ((~ bnd_c5_0 | bnd_c1_0) |
% 16.23/15.73 (ALL X111.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (bnd_ndr1_1 X111 & bnd_c5_2 X111 bnd_a1109) &
% 16.23/15.73 ~ bnd_c3_2 X111 bnd_a1109 |
% 16.23/15.73 bnd_c1_1 X111))) &
% 16.23/15.73 ((bnd_c2_0 |
% 16.23/15.73 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1110) & ~ bnd_c4_2 bnd_a1110 bnd_a1111) &
% 16.23/15.73 bnd_c1_2 bnd_a1110 bnd_a1111) &
% 16.23/15.73 bnd_c5_2 bnd_a1110 bnd_a1111) &
% 16.23/15.73 bnd_c4_1 bnd_a1110) &
% 16.23/15.73 bnd_c2_1 bnd_a1110) |
% 16.23/15.73 ((bnd_ndr1_0 &
% 16.23/15.73 (ALL X112.
% 16.23/15.73 bnd_ndr1_1 bnd_a1112 -->
% 16.23/15.73 (~ bnd_c5_2 bnd_a1112 X112 | bnd_c1_2 bnd_a1112 X112) |
% 16.23/15.73 ~ bnd_c2_2 bnd_a1112 X112)) &
% 16.23/15.73 (ALL X113.
% 16.23/15.73 bnd_ndr1_1 bnd_a1112 -->
% 16.23/15.73 (~ bnd_c4_2 bnd_a1112 X113 | ~ bnd_c3_2 bnd_a1112 X113) |
% 16.23/15.73 ~ bnd_c2_2 bnd_a1112 X113)) &
% 16.23/15.73 bnd_c2_1 bnd_a1112)) &
% 16.23/15.73 (bnd_c4_0 |
% 16.23/15.73 ((bnd_ndr1_0 & bnd_c1_1 bnd_a1113) &
% 16.23/15.73 bnd_c2_1 bnd_a1113) &
% 16.23/15.73 (ALL X114.
% 16.23/15.73 bnd_ndr1_1 bnd_a1113 -->
% 16.23/15.73 bnd_c2_2 bnd_a1113 X114 | ~ bnd_c4_2 bnd_a1113 X114))) &
% 16.23/15.73 ((bnd_c1_0 |
% 16.23/15.73 (((((bnd_ndr1_0 &
% 16.23/15.73 (ALL X115.
% 16.23/15.73 bnd_ndr1_1 bnd_a1114 -->
% 16.23/15.73 (bnd_c3_2 bnd_a1114 X115 | ~ bnd_c2_2 bnd_a1114 X115) |
% 16.23/15.73 ~ bnd_c4_2 bnd_a1114 X115)) &
% 16.23/15.73 bnd_ndr1_1 bnd_a1114) &
% 16.23/15.73 ~ bnd_c5_2 bnd_a1114 bnd_a1115) &
% 16.23/15.73 ~ bnd_c4_2 bnd_a1114 bnd_a1115) &
% 16.23/15.73 bnd_c3_2 bnd_a1114 bnd_a1115) &
% 16.23/15.73 (ALL X116.
% 16.23/15.73 bnd_ndr1_1 bnd_a1114 -->
% 16.23/15.73 bnd_c3_2 bnd_a1114 X116 | ~ bnd_c5_2 bnd_a1114 X116)) |
% 16.23/15.73 ~ bnd_c5_0)) &
% 16.23/15.73 (((((((bnd_ndr1_0 &
% 16.23/15.73 ~ bnd_c4_1 bnd_a1116) &
% 16.23/15.73 bnd_ndr1_1 bnd_a1116) &
% 16.23/15.73 ~ bnd_c5_2 bnd_a1116 bnd_a1117) &
% 16.23/15.73 ~ bnd_c3_2 bnd_a1116 bnd_a1117) &
% 16.23/15.73 bnd_c4_2 bnd_a1116 bnd_a1117) &
% 16.23/15.73 (ALL X117.
% 16.23/15.73 bnd_ndr1_1 bnd_a1116 -->
% 16.23/15.73 (bnd_c4_2 bnd_a1116 X117 | bnd_c2_2 bnd_a1116 X117) |
% 16.23/15.73 bnd_c3_2 bnd_a1116 X117) |
% 16.23/15.73 ~ bnd_c2_0) |
% 16.23/15.73 ((((bnd_ndr1_0 &
% 16.23/15.73 (ALL X118.
% 16.23/15.73 bnd_ndr1_1 bnd_a1118 -->
% 16.23/15.73 (~ bnd_c1_2 bnd_a1118 X118 | bnd_c4_2 bnd_a1118 X118) |
% 16.23/15.73 ~ bnd_c3_2 bnd_a1118 X118)) &
% 16.23/15.73 bnd_ndr1_1 bnd_a1118) &
% 16.23/15.73 bnd_c4_2 bnd_a1118 bnd_a1119) &
% 16.23/15.73 bnd_c5_2 bnd_a1118 bnd_a1119) &
% 16.23/15.73 bnd_c2_2 bnd_a1118 bnd_a1119)) &
% 16.23/15.73 (~ bnd_c1_0 |
% 16.23/15.73 (ALL X119.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (((bnd_ndr1_1 X119 & bnd_c5_2 X119 bnd_a1120) & bnd_c4_2 X119 bnd_a1120) &
% 16.23/15.73 ~ bnd_c3_2 X119 bnd_a1120 |
% 16.23/15.73 bnd_c3_1 X119) |
% 16.23/15.73 ~ bnd_c4_1 X119))) &
% 16.23/15.73 (((bnd_ndr1_0 & bnd_c3_1 bnd_a1121) &
% 16.23/15.73 ~ bnd_c1_1 bnd_a1121) &
% 16.23/15.73 ~ bnd_c4_1 bnd_a1121 |
% 16.23/15.73 bnd_c4_0)) &
% 16.23/15.73 (~ bnd_c4_0 | bnd_c5_0)) &
% 16.23/15.73 (~ bnd_c3_0 | bnd_c5_0)) &
% 16.23/15.73 (((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1122) &
% 16.23/15.73 bnd_c2_2 bnd_a1122 bnd_a1123) &
% 16.23/15.73 ~ bnd_c1_2 bnd_a1122 bnd_a1123) &
% 16.23/15.73 bnd_ndr1_1 bnd_a1122) &
% 16.23/15.73 bnd_c5_2 bnd_a1122 bnd_a1124) &
% 16.23/15.73 bnd_c2_2 bnd_a1122 bnd_a1124) &
% 16.23/15.73 ~ bnd_c3_2 bnd_a1122 bnd_a1124) &
% 16.23/15.73 (ALL X120.
% 16.23/15.73 bnd_ndr1_1 bnd_a1122 -->
% 16.23/15.73 (~ bnd_c4_2 bnd_a1122 X120 |
% 16.23/15.73 bnd_c1_2 bnd_a1122 X120) |
% 16.23/15.73 bnd_c2_2 bnd_a1122 X120) |
% 16.23/15.73 (ALL X121.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (~ bnd_c4_1 X121 |
% 16.23/15.73 (ALL X122.
% 16.23/15.73 bnd_ndr1_1 X121 --> ~ bnd_c2_2 X121 X122 | ~ bnd_c1_2 X121 X122)) |
% 16.23/15.73 (ALL X123.
% 16.23/15.73 bnd_ndr1_1 X121 --> bnd_c1_2 X121 X123 | ~ bnd_c2_2 X121 X123))) |
% 16.23/15.73 ~ bnd_c1_0)) &
% 16.23/15.73 ((~ bnd_c3_0 | bnd_c2_0) | bnd_c5_0)) &
% 16.23/15.73 (bnd_c5_0 | ~ bnd_c2_0)) &
% 16.23/15.73 ((~ bnd_c2_0 |
% 16.23/15.73 (ALL X124.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (bnd_c4_1 X124 |
% 16.23/15.73 (bnd_ndr1_1 X124 &
% 16.23/15.73 bnd_c4_2 X124 bnd_a1125) &
% 16.23/15.73 bnd_c1_2 X124 bnd_a1125) |
% 16.23/15.73 ~ bnd_c3_1 X124)) |
% 16.23/15.73 (bnd_ndr1_0 &
% 16.23/15.73 (ALL X125.
% 16.23/15.73 bnd_ndr1_1 bnd_a1126 -->
% 16.23/15.73 (bnd_c3_2 bnd_a1126 X125 |
% 16.23/15.73 bnd_c1_2 bnd_a1126 X125) |
% 16.23/15.73 bnd_c2_2 bnd_a1126 X125)) &
% 16.23/15.73 (ALL X126.
% 16.23/15.73 bnd_ndr1_1 bnd_a1126 -->
% 16.23/15.73 bnd_c1_2 bnd_a1126 X126 |
% 16.23/15.73 ~ bnd_c4_2 bnd_a1126 X126))) &
% 16.23/15.73 (((ALL X127.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (((bnd_ndr1_1 X127 &
% 16.23/15.73 ~ bnd_c4_2 X127 bnd_a1127) &
% 16.23/15.73 bnd_c1_2 X127 bnd_a1127) &
% 16.23/15.73 ~ bnd_c5_2 X127 bnd_a1127 |
% 16.23/15.73 ((bnd_ndr1_1 X127 &
% 16.23/15.73 ~ bnd_c4_2 X127 bnd_a1128) &
% 16.23/15.73 ~ bnd_c5_2 X127 bnd_a1128) &
% 16.23/15.73 bnd_c2_2 X127 bnd_a1128) |
% 16.23/15.73 bnd_c3_1 X127) |
% 16.23/15.73 bnd_c5_0) |
% 16.23/15.73 ((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a1129) &
% 16.23/15.73 bnd_c4_1 bnd_a1129) &
% 16.23/15.73 (ALL X128.
% 16.23/15.73 bnd_ndr1_1 bnd_a1129 -->
% 16.23/15.73 (bnd_c3_2 bnd_a1129 X128 |
% 16.23/15.73 bnd_c4_2 bnd_a1129 X128) |
% 16.23/15.73 ~ bnd_c5_2 bnd_a1129 X128))) &
% 16.23/15.73 (((ALL X129.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 ((ALL X130.
% 16.23/15.73 bnd_ndr1_1 X129 -->
% 16.23/15.73 ~ bnd_c1_2 X129 X130 |
% 16.23/15.73 bnd_c2_2 X129 X130) |
% 16.23/15.73 (ALL X131.
% 16.23/15.73 bnd_ndr1_1 X129 -->
% 16.23/15.73 (bnd_c1_2 X129 X131 |
% 16.23/15.73 bnd_c2_2 X129 X131) |
% 16.23/15.73 ~ bnd_c4_2 X129 X131)) |
% 16.23/15.73 ((bnd_ndr1_1 X129 &
% 16.23/15.73 ~ bnd_c4_2 X129 bnd_a1130) &
% 16.23/15.73 bnd_c3_2 X129 bnd_a1130) &
% 16.23/15.73 ~ bnd_c1_2 X129 bnd_a1130) |
% 16.23/15.73 bnd_c3_0) |
% 16.23/15.73 (ALL X132.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (~ bnd_c4_1 X132 | ~ bnd_c1_1 X132) |
% 16.23/15.73 bnd_c5_1 X132))) &
% 16.23/15.73 ((~ bnd_c2_0 | bnd_c5_0) | bnd_c1_0)) &
% 16.23/15.73 (((((((bnd_ndr1_0 & bnd_c1_1 bnd_a1131) &
% 16.23/15.73 bnd_ndr1_1 bnd_a1131) &
% 16.23/15.73 bnd_c3_2 bnd_a1131 bnd_a1132) &
% 16.23/15.73 bnd_c2_2 bnd_a1131 bnd_a1132) &
% 16.23/15.73 bnd_c1_2 bnd_a1131 bnd_a1132) &
% 16.23/15.73 ~ bnd_c4_1 bnd_a1131 |
% 16.23/15.73 ~ bnd_c2_0) |
% 16.23/15.73 bnd_c5_0)) &
% 16.23/15.73 (bnd_c1_0 |
% 16.23/15.73 (ALL X133.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (~ bnd_c5_1 X133 | bnd_c3_1 X133) |
% 16.23/15.73 bnd_c4_1 X133))) &
% 16.23/15.73 ((~ bnd_c3_0 | ~ bnd_c1_0) |
% 16.23/15.73 (ALL X134.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 bnd_c1_1 X134 |
% 16.23/15.73 (ALL X135.
% 16.23/15.73 bnd_ndr1_1 X134 -->
% 16.23/15.73 (bnd_c2_2 X134 X135 | ~ bnd_c3_2 X134 X135) |
% 16.23/15.73 bnd_c4_2 X134 X135)))) &
% 16.23/15.73 ((bnd_c1_0 |
% 16.23/15.73 (ALL X136.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (bnd_c1_1 X136 |
% 16.23/15.73 (ALL X137.
% 16.23/15.73 bnd_ndr1_1 X136 -->
% 16.23/15.73 (bnd_c1_2 X136 X137 | bnd_c2_2 X136 X137) |
% 16.23/15.73 ~ bnd_c3_2 X136 X137)) |
% 16.23/15.73 (bnd_ndr1_1 X136 & bnd_c4_2 X136 bnd_a1133) &
% 16.23/15.73 ~ bnd_c1_2 X136 bnd_a1133)) |
% 16.23/15.73 bnd_c3_0)) &
% 16.23/15.73 ((bnd_c5_0 |
% 16.23/15.73 (ALL X138.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (ALL X139.
% 16.23/15.73 bnd_ndr1_1 X138 -->
% 16.23/15.73 (bnd_c1_2 X138 X139 | ~ bnd_c5_2 X138 X139) |
% 16.23/15.73 ~ bnd_c3_2 X138 X139))) |
% 16.23/15.73 (ALL X140.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 ((bnd_ndr1_1 X140 & ~ bnd_c5_2 X140 bnd_a1134) &
% 16.23/15.73 bnd_c4_2 X140 bnd_a1134 |
% 16.23/15.73 bnd_c1_1 X140) |
% 16.23/15.73 (ALL X141.
% 16.23/15.73 bnd_ndr1_1 X140 -->
% 16.23/15.73 bnd_c5_2 X140 X141 | bnd_c1_2 X140 X141)))) &
% 16.23/15.73 (((ALL X142.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (bnd_c2_1 X142 | ~ bnd_c5_1 X142) |
% 16.23/15.73 ~ bnd_c1_1 X142) |
% 16.23/15.73 (ALL X143.
% 16.23/15.73 bnd_ndr1_0 --> bnd_c5_1 X143 | bnd_c4_1 X143)) |
% 16.23/15.73 ~ bnd_c2_0)) &
% 16.23/15.73 ((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1135) &
% 16.23/15.73 bnd_c4_2 bnd_a1135 bnd_a1136) &
% 16.23/15.73 bnd_c1_2 bnd_a1135 bnd_a1136) &
% 16.23/15.73 bnd_c2_2 bnd_a1135 bnd_a1136) &
% 16.23/15.73 (ALL X144.
% 16.23/15.73 bnd_ndr1_1 bnd_a1135 -->
% 16.23/15.73 (~ bnd_c5_2 bnd_a1135 X144 |
% 16.23/15.73 ~ bnd_c1_2 bnd_a1135 X144) |
% 16.23/15.73 ~ bnd_c3_2 bnd_a1135 X144)) &
% 16.23/15.73 bnd_c4_1 bnd_a1135 |
% 16.23/15.73 ~ bnd_c4_0)) &
% 16.23/15.73 (((ALL X145.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 ((ALL X146.
% 16.23/15.73 bnd_ndr1_1 X145 -->
% 16.23/15.73 (bnd_c4_2 X145 X146 | bnd_c1_2 X145 X146) |
% 16.23/15.73 ~ bnd_c5_2 X145 X146) |
% 16.23/15.73 (ALL X147.
% 16.23/15.73 bnd_ndr1_1 X145 -->
% 16.23/15.73 ~ bnd_c5_2 X145 X147 | bnd_c4_2 X145 X147)) |
% 16.23/15.73 (bnd_ndr1_1 X145 & bnd_c1_2 X145 bnd_a1137) &
% 16.23/15.73 ~ bnd_c2_2 X145 bnd_a1137) |
% 16.23/15.73 (ALL X148.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (~ bnd_c3_1 X148 |
% 16.23/15.73 (bnd_ndr1_1 X148 & ~ bnd_c3_2 X148 bnd_a1138) &
% 16.23/15.73 bnd_c2_2 X148 bnd_a1138) |
% 16.23/15.73 (ALL X149.
% 16.23/15.73 bnd_ndr1_1 X148 -->
% 16.23/15.73 (~ bnd_c3_2 X148 X149 | bnd_c5_2 X148 X149) |
% 16.23/15.73 bnd_c4_2 X148 X149))) |
% 16.23/15.73 bnd_c2_0)) &
% 16.23/15.73 ((~ bnd_c5_0 | ~ bnd_c3_0) |
% 16.23/15.73 (ALL X150.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (bnd_c2_1 X150 |
% 16.23/15.73 (ALL X151.
% 16.23/15.73 bnd_ndr1_1 X150 -->
% 16.23/15.73 (bnd_c4_2 X150 X151 | ~ bnd_c5_2 X150 X151) |
% 16.23/15.73 bnd_c2_2 X150 X151)) |
% 16.23/15.73 ((bnd_ndr1_1 X150 & ~ bnd_c2_2 X150 bnd_a1139) &
% 16.23/15.73 ~ bnd_c3_2 X150 bnd_a1139) &
% 16.23/15.73 ~ bnd_c1_2 X150 bnd_a1139))) &
% 16.23/15.73 (~ bnd_c3_0 | ~ bnd_c5_0)) &
% 16.23/15.73 (~ bnd_c2_0 |
% 16.23/15.73 (ALL X152.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 bnd_c1_1 X152 |
% 16.23/15.73 (bnd_ndr1_1 X152 & bnd_c2_2 X152 bnd_a1140) &
% 16.23/15.73 ~ bnd_c5_2 X152 bnd_a1140))) &
% 16.23/15.73 ((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1141) &
% 16.23/15.73 bnd_c1_2 bnd_a1141 bnd_a1142) &
% 16.23/15.73 ~ bnd_c2_2 bnd_a1141 bnd_a1142) &
% 16.23/15.73 bnd_ndr1_1 bnd_a1141) &
% 16.23/15.73 bnd_c4_2 bnd_a1141 bnd_a1143) &
% 16.23/15.73 ~ bnd_c3_2 bnd_a1141 bnd_a1143) &
% 16.23/15.73 bnd_c1_2 bnd_a1141 bnd_a1143) &
% 16.23/15.73 ~ bnd_c5_1 bnd_a1141 |
% 16.23/15.73 bnd_c4_0)) &
% 16.23/15.73 ((~ bnd_c4_0 | ~ bnd_c1_0) |
% 16.23/15.73 (ALL X153. bnd_ndr1_0 --> bnd_c3_1 X153 | ~ bnd_c5_1 X153))) &
% 16.23/15.73 (bnd_c4_0 | ~ bnd_c2_0)) &
% 16.23/15.73 ((((bnd_ndr1_0 & bnd_c4_1 bnd_a1144) &
% 16.23/15.73 (ALL X154.
% 16.23/15.73 bnd_ndr1_1 bnd_a1144 -->
% 16.23/15.73 bnd_c3_2 bnd_a1144 X154 | bnd_c5_2 bnd_a1144 X154)) &
% 16.23/15.73 (ALL X155.
% 16.23/15.73 bnd_ndr1_1 bnd_a1144 -->
% 16.23/15.73 (~ bnd_c2_2 bnd_a1144 X155 | bnd_c4_2 bnd_a1144 X155) |
% 16.23/15.73 ~ bnd_c1_2 bnd_a1144 X155) |
% 16.23/15.73 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1145) &
% 16.23/15.73 ~ bnd_c2_2 bnd_a1145 bnd_a1146) &
% 16.23/15.73 bnd_c1_2 bnd_a1145 bnd_a1146) &
% 16.23/15.73 ~ bnd_c3_2 bnd_a1145 bnd_a1146) &
% 16.23/15.73 ~ bnd_c2_1 bnd_a1145) &
% 16.23/15.73 ~ bnd_c4_1 bnd_a1145) |
% 16.23/15.73 ~ bnd_c5_0)) &
% 16.23/15.73 ((bnd_c2_0 | ~ bnd_c1_0) | ~ bnd_c5_0)) &
% 16.23/15.73 (((((((bnd_ndr1_0 &
% 16.23/15.73 (ALL X156.
% 16.23/15.73 bnd_ndr1_1 bnd_a1147 -->
% 16.23/15.73 (~ bnd_c5_2 bnd_a1147 X156 | ~ bnd_c2_2 bnd_a1147 X156) |
% 16.23/15.73 bnd_c3_2 bnd_a1147 X156)) &
% 16.23/15.73 bnd_ndr1_1 bnd_a1147) &
% 16.23/15.73 bnd_c5_2 bnd_a1147 bnd_a1148) &
% 16.23/15.73 bnd_c4_2 bnd_a1147 bnd_a1148) &
% 16.23/15.73 bnd_c2_2 bnd_a1147 bnd_a1148) &
% 16.23/15.73 (ALL X157.
% 16.23/15.73 bnd_ndr1_1 bnd_a1147 -->
% 16.23/15.73 (bnd_c1_2 bnd_a1147 X157 | ~ bnd_c2_2 bnd_a1147 X157) |
% 16.23/15.73 bnd_c3_2 bnd_a1147 X157) |
% 16.23/15.73 ((((bnd_ndr1_0 & ~ bnd_c3_1 bnd_a1149) & bnd_ndr1_1 bnd_a1149) &
% 16.23/15.73 bnd_c4_2 bnd_a1149 bnd_a1150) &
% 16.23/15.73 bnd_c3_2 bnd_a1149 bnd_a1150) &
% 16.23/15.73 bnd_c5_1 bnd_a1149) |
% 16.23/15.73 ~ bnd_c1_0)) &
% 16.23/15.73 (((((bnd_ndr1_0 &
% 16.23/15.73 (ALL X158.
% 16.23/15.73 bnd_ndr1_1 bnd_a1151 -->
% 16.23/15.73 (bnd_c5_2 bnd_a1151 X158 | ~ bnd_c1_2 bnd_a1151 X158) |
% 16.23/15.73 ~ bnd_c2_2 bnd_a1151 X158)) &
% 16.23/15.73 bnd_c5_1 bnd_a1151) &
% 16.23/15.73 bnd_ndr1_1 bnd_a1151) &
% 16.23/15.73 ~ bnd_c1_2 bnd_a1151 bnd_a1152 |
% 16.23/15.73 (((((bnd_ndr1_0 & bnd_c2_1 bnd_a1153) & bnd_ndr1_1 bnd_a1153) &
% 16.23/15.73 bnd_c4_2 bnd_a1153 bnd_a1154) &
% 16.23/15.73 ~ bnd_c2_2 bnd_a1153 bnd_a1154) &
% 16.23/15.73 bnd_c5_2 bnd_a1153 bnd_a1154) &
% 16.23/15.73 ~ bnd_c4_1 bnd_a1153) |
% 16.23/15.73 ~ bnd_c1_0)) &
% 16.23/15.73 (((bnd_ndr1_0 & ~ bnd_c3_1 bnd_a1155) & bnd_c5_1 bnd_a1155 |
% 16.23/15.73 (ALL X159.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 (~ bnd_c1_1 X159 |
% 16.23/15.73 ((bnd_ndr1_1 X159 & ~ bnd_c1_2 X159 bnd_a1156) &
% 16.23/15.73 bnd_c3_2 X159 bnd_a1156) &
% 16.23/15.73 ~ bnd_c2_2 X159 bnd_a1156) |
% 16.23/15.73 (ALL X160.
% 16.23/15.73 bnd_ndr1_1 X159 -->
% 16.23/15.73 ~ bnd_c2_2 X159 X160 | ~ bnd_c5_2 X159 X160))) |
% 16.23/15.73 bnd_c1_0)) &
% 16.23/15.73 (((ALL X161.
% 16.23/15.73 bnd_ndr1_0 -->
% 16.23/15.73 ((ALL X162.
% 16.23/15.73 bnd_ndr1_1 X161 -->
% 16.23/15.73 bnd_c4_2 X161 X162 | ~ bnd_c2_2 X161 X162) |
% 16.23/15.73 ~ bnd_c1_1 X161) |
% 16.23/15.73 ~ bnd_c3_1 X161) |
% 16.23/15.73 bnd_c3_0) |
% 16.23/15.73 (bnd_ndr1_0 & bnd_c5_1 bnd_a1157) &
% 16.23/15.73 (ALL X163.
% 16.23/15.73 bnd_ndr1_1 bnd_a1157 -->
% 16.23/15.73 (bnd_c2_2 bnd_a1157 X163 | ~ bnd_c4_2 bnd_a1157 X163) |
% 16.23/15.73 bnd_c1_2 bnd_a1157 X163)))
% 16.23/15.73 Adding axioms...
% 16.23/15.73 Typedef.type_definition_def
% 44.48/43.92 ...done.
% 44.48/43.95 Ground types: ?'b, TPTP_Interpret.ind
% 44.48/43.95 Translating term (sizes: 1, 1) ...
% 67.43/66.85 Invoking SAT solver...
% 67.43/66.86 No model exists.
% 67.43/66.86 Translating term (sizes: 2, 1) ...
% 91.29/90.60 Invoking SAT solver...
% 91.29/90.60 No model exists.
% 91.29/90.60 Translating term (sizes: 1, 2) ...
% 133.12/132.34 Invoking SAT solver...
% 133.23/132.41 No model exists.
% 133.23/132.41 Translating term (sizes: 3, 1) ...
% 159.54/158.64 Invoking SAT solver...
% 159.54/158.64 No model exists.
% 159.54/158.64 Translating term (sizes: 2, 2) ...
% 209.38/208.22 Invoking SAT solver...
% 209.38/208.28 No model exists.
% 209.38/208.28 Translating term (sizes: 1, 3) ...
% 276.21/274.64 Invoking SAT solver...
% 300.05/298.32 /export/starexec/sandbox/solver/lib/scripts/run-polyml-5.5.2: line 82: 31778 CPU time limit exceeded (core dumped) "$ISABELLE_HOME/lib/scripts/feeder" -p -h "$MLTEXT" -t "$MLEXIT" $FEEDER_OPTS
% 300.05/298.32 31779 (core dumped) | { read FPID; "$POLY" -q -i $ML_OPTIONS; RC="$?"; kill -TERM "$FPID"; exit "$RC"; }
% 300.05/298.33 /export/starexec/sandbox/solver/src/HOL/TPTP/lib/Tools/tptp_refute: line 26: 31724 Exit 152 "$ISABELLE_PROCESS" -q -e "use_thy \"/tmp/$SCRATCH\"; exit 1;" HOL-TPTP
% 300.05/298.33 31725 CPU time limit exceeded (core dumped) | grep --line-buffered -v "^###\|^PROOF FAILED for depth\|^Failure node\|inferences so far. Searching to depth\|^val \|^Loading theory\|^Warning-The type of\|^ monotype.$"
%------------------------------------------------------------------------------