TSTP Solution File: SYN517+1 by Refute---2015
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%------------------------------------------------------------------------------
% File : Refute---2015
% Problem : SYN517+1 : TPTP v6.4.0. Released v2.1.0.
% Transfm : none
% Format : tptp:raw
% Command : isabelle tptp_refute %d %s
% Computer : n131.star.cs.uiowa.edu
% Model : x86_64 x86_64
% CPU : Intel(R) Xeon(R) CPU E5-2609 0 2.40GHz
% Memory : 32218.75MB
% OS : Linux 3.10.0-327.10.1.el7.x86_64
% CPULimit : 300s
% DateTime : Thu Apr 14 06:42:12 EDT 2016
% Result : CounterSatisfiable 14.30s
% Output : Assurance 0s
% Verified :
% SZS Type : None (Parsing solution fails)
% Syntax : Number of formulae : 0
% Comments :
%------------------------------------------------------------------------------
%----No solution output by system
%------------------------------------------------------------------------------
%----ORIGINAL SYSTEM OUTPUT
% 0.00/0.03 % Problem : SYN517+1 : TPTP v6.4.0. Released v2.1.0.
% 0.00/0.04 % Command : isabelle tptp_refute %d %s
% 0.02/0.22 % Computer : n131.star.cs.uiowa.edu
% 0.02/0.22 % Model : x86_64 x86_64
% 0.02/0.22 % CPU : Intel(R) Xeon(R) CPU E5-2609 0 @ 2.40GHz
% 0.02/0.22 % Memory : 32218.75MB
% 0.02/0.22 % OS : Linux 3.10.0-327.10.1.el7.x86_64
% 0.02/0.22 % CPULimit : 300
% 0.02/0.22 % DateTime : Sat Apr 9 00:11:54 CDT 2016
% 0.02/0.23 % CPUTime:
% 6.31/5.83 > val it = (): unit
% 6.60/6.10 Trying to find a model that refutes: ~ (((((((((((((bnd_c1_0 |
% 6.60/6.10 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a50) &
% 6.60/6.10 ~ bnd_c1_2 bnd_a50 bnd_a51) &
% 6.60/6.10 ~ bnd_c4_2 bnd_a50 bnd_a51) &
% 6.60/6.10 bnd_c3_2 bnd_a50 bnd_a51) &
% 6.60/6.10 (ALL U.
% 6.60/6.10 bnd_ndr1_1 bnd_a50 -->
% 6.60/6.10 (~ bnd_c2_2 bnd_a50 U | bnd_c4_2 bnd_a50 U) |
% 6.60/6.10 bnd_c3_2 bnd_a50 U)) &
% 6.60/6.10 bnd_c3_1 bnd_a50) |
% 6.60/6.10 (ALL V.
% 6.60/6.10 bnd_ndr1_0 -->
% 6.60/6.10 (bnd_c5_1 V | bnd_c3_1 V) |
% 6.60/6.10 (ALL W.
% 6.60/6.10 bnd_ndr1_1 V --> ~ bnd_c3_2 V W | bnd_c4_2 V W))) &
% 6.60/6.10 (((ALL X.
% 6.60/6.10 bnd_ndr1_0 -->
% 6.60/6.10 ((ALL Y.
% 6.60/6.10 bnd_ndr1_1 X -->
% 6.60/6.10 (bnd_c3_2 X Y | ~ bnd_c4_2 X Y) | ~ bnd_c2_2 X Y) |
% 6.60/6.10 bnd_c4_1 X) |
% 6.60/6.10 ((bnd_ndr1_1 X & ~ bnd_c3_2 X bnd_a52) &
% 6.60/6.10 ~ bnd_c2_2 X bnd_a52) &
% 6.60/6.10 bnd_c1_2 X bnd_a52) |
% 6.60/6.10 ~ bnd_c5_0) |
% 6.60/6.10 ~ bnd_c1_0)) &
% 6.60/6.10 (bnd_c4_0 | bnd_c5_0)) &
% 6.60/6.10 ((~ bnd_c2_0 | ~ bnd_c3_0) | bnd_c5_0)) &
% 6.60/6.10 ((bnd_c1_0 |
% 6.60/6.10 (((((bnd_ndr1_0 & bnd_c5_1 bnd_a53) & bnd_ndr1_1 bnd_a53) &
% 6.60/6.10 ~ bnd_c1_2 bnd_a53 bnd_a54) &
% 6.60/6.10 bnd_c3_2 bnd_a53 bnd_a54) &
% 6.60/6.10 bnd_c2_2 bnd_a53 bnd_a54) &
% 6.60/6.10 bnd_c1_1 bnd_a53) |
% 6.60/6.10 bnd_c2_0)) &
% 6.60/6.10 ((~ bnd_c2_0 |
% 6.60/6.10 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a55) &
% 6.60/6.10 bnd_c4_2 bnd_a55 bnd_a56) &
% 6.60/6.10 ~ bnd_c3_2 bnd_a55 bnd_a56) &
% 6.60/6.10 bnd_c1_2 bnd_a55 bnd_a56) &
% 6.60/6.10 bnd_c5_1 bnd_a55) &
% 6.60/6.10 (ALL Z.
% 6.60/6.10 bnd_ndr1_1 bnd_a55 -->
% 6.60/6.10 (bnd_c3_2 bnd_a55 Z | bnd_c5_2 bnd_a55 Z) |
% 6.60/6.10 bnd_c1_2 bnd_a55 Z)) |
% 6.60/6.10 ~ bnd_c4_0)) &
% 6.60/6.10 ((bnd_c3_0 |
% 6.60/6.10 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a57) &
% 6.60/6.10 bnd_c4_2 bnd_a57 bnd_a58) &
% 6.60/6.10 ~ bnd_c1_2 bnd_a57 bnd_a58) &
% 6.60/6.10 bnd_c2_2 bnd_a57 bnd_a58) &
% 6.60/6.10 (ALL X1.
% 6.60/6.10 bnd_ndr1_1 bnd_a57 -->
% 6.60/6.10 (~ bnd_c3_2 bnd_a57 X1 | bnd_c5_2 bnd_a57 X1) |
% 6.60/6.10 bnd_c2_2 bnd_a57 X1)) &
% 6.60/6.10 ~ bnd_c5_1 bnd_a57) |
% 6.60/6.10 ((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a59) & bnd_c2_1 bnd_a59) &
% 6.60/6.10 bnd_c5_1 bnd_a59)) &
% 6.60/6.10 ((~ bnd_c5_0 | ~ bnd_c3_0) |
% 6.60/6.10 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a60) &
% 6.60/6.10 ~ bnd_c4_2 bnd_a60 bnd_a61) &
% 6.60/6.10 ~ bnd_c1_2 bnd_a60 bnd_a61) &
% 6.60/6.10 ~ bnd_c5_2 bnd_a60 bnd_a61) &
% 6.60/6.10 bnd_c5_1 bnd_a60) &
% 6.60/6.10 (ALL X2.
% 6.60/6.10 bnd_ndr1_1 bnd_a60 -->
% 6.60/6.10 bnd_c5_2 bnd_a60 X2 | bnd_c4_2 bnd_a60 X2))) &
% 6.60/6.10 (((((((bnd_ndr1_0 & bnd_c1_1 bnd_a62) &
% 6.60/6.10 (ALL X3.
% 6.60/6.10 bnd_ndr1_1 bnd_a62 -->
% 6.60/6.10 (bnd_c2_2 bnd_a62 X3 | ~ bnd_c5_2 bnd_a62 X3) |
% 6.60/6.10 bnd_c1_2 bnd_a62 X3)) &
% 6.60/6.10 bnd_ndr1_1 bnd_a62) &
% 6.60/6.10 bnd_c3_2 bnd_a62 bnd_a63) &
% 6.60/6.10 ~ bnd_c5_2 bnd_a62 bnd_a63) &
% 6.60/6.10 ~ bnd_c2_2 bnd_a62 bnd_a63 |
% 6.60/6.10 (bnd_ndr1_0 & ~ bnd_c5_1 bnd_a64) & bnd_c2_1 bnd_a64) |
% 6.60/6.10 ~ bnd_c5_0)) &
% 6.60/6.10 (((((bnd_ndr1_0 &
% 6.60/6.10 (ALL X4.
% 6.60/6.10 bnd_ndr1_1 bnd_a65 -->
% 6.60/6.10 ~ bnd_c1_2 bnd_a65 X4 | ~ bnd_c3_2 bnd_a65 X4)) &
% 6.60/6.10 bnd_ndr1_1 bnd_a65) &
% 6.60/6.10 ~ bnd_c3_2 bnd_a65 bnd_a66) &
% 6.60/6.10 bnd_c5_2 bnd_a65 bnd_a66) &
% 6.60/6.10 bnd_c4_2 bnd_a65 bnd_a66 |
% 6.60/6.10 bnd_c2_0)) &
% 6.60/6.10 ((bnd_c3_0 |
% 6.60/6.10 (bnd_ndr1_0 &
% 6.60/6.10 (ALL X5.
% 6.60/6.10 bnd_ndr1_1 bnd_a67 -->
% 6.60/6.10 (~ bnd_c2_2 bnd_a67 X5 | bnd_c1_2 bnd_a67 X5) |
% 6.60/6.10 ~ bnd_c3_2 bnd_a67 X5)) &
% 6.60/6.10 ~ bnd_c1_1 bnd_a67) |
% 6.60/6.10 (bnd_ndr1_0 &
% 6.60/6.10 (ALL X6.
% 6.60/6.10 bnd_ndr1_1 bnd_a68 -->
% 6.60/6.10 (~ bnd_c4_2 bnd_a68 X6 | ~ bnd_c5_2 bnd_a68 X6) |
% 6.60/6.10 bnd_c3_2 bnd_a68 X6)) &
% 6.60/6.10 ~ bnd_c3_1 bnd_a68)) &
% 6.60/6.10 (((ALL X7.
% 6.60/6.10 bnd_ndr1_0 -->
% 6.60/6.10 (((bnd_ndr1_1 X7 & bnd_c5_2 X7 bnd_a69) & ~ bnd_c1_2 X7 bnd_a69) &
% 6.60/6.10 bnd_c4_2 X7 bnd_a69 |
% 6.60/6.10 bnd_c4_1 X7) |
% 6.60/6.10 bnd_c3_1 X7) |
% 6.60/6.10 (ALL X8.
% 6.60/6.10 bnd_ndr1_0 -->
% 6.60/6.10 (~ bnd_c5_1 X8 | bnd_c3_1 X8) |
% 6.60/6.10 (ALL X9.
% 6.60/6.10 bnd_ndr1_1 X8 -->
% 6.60/6.10 (bnd_c2_2 X8 X9 | bnd_c4_2 X8 X9) | bnd_c3_2 X8 X9))) |
% 6.60/6.10 bnd_c4_0))
% 7.80/7.35 Unfolded term: ~ (((((((((((((bnd_c1_0 |
% 7.80/7.35 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a50) &
% 7.80/7.35 ~ bnd_c1_2 bnd_a50 bnd_a51) &
% 7.80/7.35 ~ bnd_c4_2 bnd_a50 bnd_a51) &
% 7.80/7.35 bnd_c3_2 bnd_a50 bnd_a51) &
% 7.80/7.35 (ALL U.
% 7.80/7.35 bnd_ndr1_1 bnd_a50 -->
% 7.80/7.35 (~ bnd_c2_2 bnd_a50 U | bnd_c4_2 bnd_a50 U) |
% 7.80/7.35 bnd_c3_2 bnd_a50 U)) &
% 7.80/7.35 bnd_c3_1 bnd_a50) |
% 7.80/7.35 (ALL V.
% 7.80/7.35 bnd_ndr1_0 -->
% 7.80/7.35 (bnd_c5_1 V | bnd_c3_1 V) |
% 7.80/7.35 (ALL W.
% 7.80/7.35 bnd_ndr1_1 V --> ~ bnd_c3_2 V W | bnd_c4_2 V W))) &
% 7.80/7.35 (((ALL X.
% 7.80/7.35 bnd_ndr1_0 -->
% 7.80/7.35 ((ALL Y.
% 7.80/7.35 bnd_ndr1_1 X -->
% 7.80/7.35 (bnd_c3_2 X Y | ~ bnd_c4_2 X Y) | ~ bnd_c2_2 X Y) |
% 7.80/7.35 bnd_c4_1 X) |
% 7.80/7.35 ((bnd_ndr1_1 X & ~ bnd_c3_2 X bnd_a52) &
% 7.80/7.35 ~ bnd_c2_2 X bnd_a52) &
% 7.80/7.35 bnd_c1_2 X bnd_a52) |
% 7.80/7.35 ~ bnd_c5_0) |
% 7.80/7.35 ~ bnd_c1_0)) &
% 7.80/7.35 (bnd_c4_0 | bnd_c5_0)) &
% 7.80/7.35 ((~ bnd_c2_0 | ~ bnd_c3_0) | bnd_c5_0)) &
% 7.80/7.35 ((bnd_c1_0 |
% 7.80/7.35 (((((bnd_ndr1_0 & bnd_c5_1 bnd_a53) & bnd_ndr1_1 bnd_a53) &
% 7.80/7.35 ~ bnd_c1_2 bnd_a53 bnd_a54) &
% 7.80/7.35 bnd_c3_2 bnd_a53 bnd_a54) &
% 7.80/7.35 bnd_c2_2 bnd_a53 bnd_a54) &
% 7.80/7.35 bnd_c1_1 bnd_a53) |
% 7.80/7.35 bnd_c2_0)) &
% 7.80/7.35 ((~ bnd_c2_0 |
% 7.80/7.35 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a55) &
% 7.80/7.35 bnd_c4_2 bnd_a55 bnd_a56) &
% 7.80/7.35 ~ bnd_c3_2 bnd_a55 bnd_a56) &
% 7.80/7.35 bnd_c1_2 bnd_a55 bnd_a56) &
% 7.80/7.35 bnd_c5_1 bnd_a55) &
% 7.80/7.35 (ALL Z.
% 7.80/7.35 bnd_ndr1_1 bnd_a55 -->
% 7.80/7.35 (bnd_c3_2 bnd_a55 Z | bnd_c5_2 bnd_a55 Z) |
% 7.80/7.35 bnd_c1_2 bnd_a55 Z)) |
% 7.80/7.35 ~ bnd_c4_0)) &
% 7.80/7.35 ((bnd_c3_0 |
% 7.80/7.35 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a57) &
% 7.80/7.35 bnd_c4_2 bnd_a57 bnd_a58) &
% 7.80/7.35 ~ bnd_c1_2 bnd_a57 bnd_a58) &
% 7.80/7.35 bnd_c2_2 bnd_a57 bnd_a58) &
% 7.80/7.35 (ALL X1.
% 7.80/7.35 bnd_ndr1_1 bnd_a57 -->
% 7.80/7.35 (~ bnd_c3_2 bnd_a57 X1 | bnd_c5_2 bnd_a57 X1) |
% 7.80/7.35 bnd_c2_2 bnd_a57 X1)) &
% 7.80/7.35 ~ bnd_c5_1 bnd_a57) |
% 7.80/7.35 ((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a59) & bnd_c2_1 bnd_a59) &
% 7.80/7.35 bnd_c5_1 bnd_a59)) &
% 7.80/7.35 ((~ bnd_c5_0 | ~ bnd_c3_0) |
% 7.80/7.35 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a60) &
% 7.80/7.35 ~ bnd_c4_2 bnd_a60 bnd_a61) &
% 7.80/7.35 ~ bnd_c1_2 bnd_a60 bnd_a61) &
% 7.80/7.35 ~ bnd_c5_2 bnd_a60 bnd_a61) &
% 7.80/7.35 bnd_c5_1 bnd_a60) &
% 7.80/7.35 (ALL X2.
% 7.80/7.35 bnd_ndr1_1 bnd_a60 -->
% 7.80/7.35 bnd_c5_2 bnd_a60 X2 | bnd_c4_2 bnd_a60 X2))) &
% 7.80/7.35 (((((((bnd_ndr1_0 & bnd_c1_1 bnd_a62) &
% 7.80/7.35 (ALL X3.
% 7.80/7.35 bnd_ndr1_1 bnd_a62 -->
% 7.80/7.35 (bnd_c2_2 bnd_a62 X3 | ~ bnd_c5_2 bnd_a62 X3) |
% 7.80/7.35 bnd_c1_2 bnd_a62 X3)) &
% 7.80/7.35 bnd_ndr1_1 bnd_a62) &
% 7.80/7.35 bnd_c3_2 bnd_a62 bnd_a63) &
% 7.80/7.35 ~ bnd_c5_2 bnd_a62 bnd_a63) &
% 7.80/7.35 ~ bnd_c2_2 bnd_a62 bnd_a63 |
% 7.80/7.35 (bnd_ndr1_0 & ~ bnd_c5_1 bnd_a64) & bnd_c2_1 bnd_a64) |
% 7.80/7.35 ~ bnd_c5_0)) &
% 7.80/7.35 (((((bnd_ndr1_0 &
% 7.80/7.35 (ALL X4.
% 7.80/7.35 bnd_ndr1_1 bnd_a65 -->
% 7.80/7.35 ~ bnd_c1_2 bnd_a65 X4 | ~ bnd_c3_2 bnd_a65 X4)) &
% 7.80/7.35 bnd_ndr1_1 bnd_a65) &
% 7.80/7.35 ~ bnd_c3_2 bnd_a65 bnd_a66) &
% 7.80/7.35 bnd_c5_2 bnd_a65 bnd_a66) &
% 7.80/7.35 bnd_c4_2 bnd_a65 bnd_a66 |
% 7.80/7.35 bnd_c2_0)) &
% 7.80/7.35 ((bnd_c3_0 |
% 7.80/7.35 (bnd_ndr1_0 &
% 7.80/7.35 (ALL X5.
% 7.80/7.35 bnd_ndr1_1 bnd_a67 -->
% 7.80/7.35 (~ bnd_c2_2 bnd_a67 X5 | bnd_c1_2 bnd_a67 X5) |
% 7.80/7.35 ~ bnd_c3_2 bnd_a67 X5)) &
% 7.80/7.35 ~ bnd_c1_1 bnd_a67) |
% 7.80/7.35 (bnd_ndr1_0 &
% 7.80/7.35 (ALL X6.
% 7.80/7.35 bnd_ndr1_1 bnd_a68 -->
% 7.80/7.35 (~ bnd_c4_2 bnd_a68 X6 | ~ bnd_c5_2 bnd_a68 X6) |
% 7.80/7.35 bnd_c3_2 bnd_a68 X6)) &
% 7.80/7.35 ~ bnd_c3_1 bnd_a68)) &
% 7.80/7.35 (((ALL X7.
% 7.80/7.35 bnd_ndr1_0 -->
% 7.80/7.35 (((bnd_ndr1_1 X7 & bnd_c5_2 X7 bnd_a69) & ~ bnd_c1_2 X7 bnd_a69) &
% 7.80/7.35 bnd_c4_2 X7 bnd_a69 |
% 7.80/7.35 bnd_c4_1 X7) |
% 7.80/7.35 bnd_c3_1 X7) |
% 7.80/7.35 (ALL X8.
% 7.80/7.35 bnd_ndr1_0 -->
% 7.80/7.35 (~ bnd_c5_1 X8 | bnd_c3_1 X8) |
% 7.80/7.35 (ALL X9.
% 7.80/7.35 bnd_ndr1_1 X8 -->
% 7.80/7.35 (bnd_c2_2 X8 X9 | bnd_c4_2 X8 X9) | bnd_c3_2 X8 X9))) |
% 7.80/7.35 bnd_c4_0))
% 7.80/7.35 Adding axioms...
% 7.80/7.38 Typedef.type_definition_def
% 11.42/10.91 ...done.
% 11.42/10.91 Ground types: ?'b, TPTP_Interpret.ind
% 11.42/10.91 Translating term (sizes: 1, 1) ...
% 14.20/13.76 Invoking SAT solver...
% 14.30/13.87 Model found:
% 14.30/13.87 Size of types: ?'b: 1, TPTP_Interpret.ind: 1
% 14.30/13.87 bnd_a69: ??.TPTP_Interpret.ind0
% 14.30/13.87 bnd_a68: ??.TPTP_Interpret.ind0
% 14.30/13.87 bnd_a67: ??.TPTP_Interpret.ind0
% 14.30/13.87 bnd_a66: ??.TPTP_Interpret.ind0
% 14.30/13.87 bnd_a65: ??.TPTP_Interpret.ind0
% 14.30/13.87 bnd_a64: ??.TPTP_Interpret.ind0
% 14.30/13.87 bnd_a63: ??.TPTP_Interpret.ind0
% 14.30/13.87 bnd_a62: ??.TPTP_Interpret.ind0
% 14.30/13.87 bnd_a61: ??.TPTP_Interpret.ind0
% 14.30/13.87 bnd_a60: ??.TPTP_Interpret.ind0
% 14.30/13.87 bnd_c2_1: {(??.TPTP_Interpret.ind0, True)}
% 14.30/13.87 bnd_a59: ??.TPTP_Interpret.ind0
% 14.30/13.87 bnd_a58: ??.TPTP_Interpret.ind0
% 14.30/13.87 bnd_a57: ??.TPTP_Interpret.ind0
% 14.30/13.87 bnd_c5_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, True)})}
% 14.30/13.87 bnd_a56: ??.TPTP_Interpret.ind0
% 14.30/13.87 bnd_a55: ??.TPTP_Interpret.ind0
% 14.30/13.87 bnd_c1_1: {(??.TPTP_Interpret.ind0, False)}
% 14.30/13.87 bnd_a54: ??.TPTP_Interpret.ind0
% 14.30/13.87 bnd_a53: ??.TPTP_Interpret.ind0
% 14.30/13.87 bnd_c3_0: False
% 14.30/13.87 bnd_c2_0: True
% 14.30/13.87 bnd_c4_0: True
% 14.30/13.87 bnd_c5_0: False
% 14.30/13.87 bnd_a52: ??.TPTP_Interpret.ind0
% 14.30/13.87 bnd_c4_1: {(??.TPTP_Interpret.ind0, False)}
% 14.30/13.87 bnd_c5_1: {(??.TPTP_Interpret.ind0, True)}
% 14.30/13.87 bnd_c3_1: {(??.TPTP_Interpret.ind0, True)}
% 14.30/13.87 bnd_c2_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, False)})}
% 14.30/13.87 bnd_c3_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, False)})}
% 14.30/13.87 bnd_c4_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, True)})}
% 14.30/13.87 bnd_a51: ??.TPTP_Interpret.ind0
% 14.30/13.87 bnd_c1_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, True)})}
% 14.30/13.87 bnd_a50: ??.TPTP_Interpret.ind0
% 14.30/13.87 bnd_ndr1_1: {(??.TPTP_Interpret.ind0, True)}
% 14.30/13.87 bnd_ndr1_0: True
% 14.30/13.87 bnd_c1_0: True
% 14.30/13.87
% 14.30/13.87 % SZS status CounterSatisfiable
%------------------------------------------------------------------------------