TSTP Solution File: SYN427+1 by Refute---2015

View Problem - Process Solution

%------------------------------------------------------------------------------
% File     : Refute---2015
% Problem  : SYN427+1 : TPTP v6.4.0. Released v2.1.0.
% Transfm  : none
% Format   : tptp:raw
% Command  : isabelle tptp_refute %d %s

% Computer : n130.star.cs.uiowa.edu
% Model    : x86_64 x86_64
% CPU      : Intel(R) Xeon(R) CPU E5-2609 0 2.40GHz
% Memory   : 32218.75MB
% OS       : Linux 3.10.0-327.10.1.el7.x86_64
% CPULimit : 300s
% DateTime : Thu Apr 14 06:41:44 EDT 2016

% Result   : CounterSatisfiable 221.73s
% Output   : Assurance 0s
% Verified : 
% SZS Type : None (Parsing solution fails)
% Syntax   : Number of formulae    : 0

% Comments : 
%------------------------------------------------------------------------------
%----No solution output by system
%------------------------------------------------------------------------------
%----ORIGINAL SYSTEM OUTPUT
% 0.00/0.03  % Problem  : SYN427+1 : TPTP v6.4.0. Released v2.1.0.
% 0.00/0.04  % Command  : isabelle tptp_refute %d %s
% 0.02/0.23  % Computer : n130.star.cs.uiowa.edu
% 0.02/0.23  % Model    : x86_64 x86_64
% 0.02/0.23  % CPU      : Intel(R) Xeon(R) CPU E5-2609 0 @ 2.40GHz
% 0.02/0.23  % Memory   : 32218.75MB
% 0.02/0.23  % OS       : Linux 3.10.0-327.10.1.el7.x86_64
% 0.02/0.23  % CPULimit : 300
% 0.02/0.23  % DateTime : Fri Apr  8 23:50:39 CDT 2016
% 0.02/0.23  % CPUTime: 
% 6.31/5.83  > val it = (): unit
% 7.42/6.97  Trying to find a model that refutes: ~ (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((~ bnd_c1_0 |
% 7.42/6.97                         (ALL U.
% 7.42/6.97                             bnd_ndr1_0 -->
% 7.42/6.97                             (~ bnd_c1_1 U |
% 7.42/6.97                              (ALL V.
% 7.42/6.97                                  bnd_ndr1_1 U -->
% 7.42/6.97                                  (~ bnd_c1_2 U V | bnd_c5_2 U V) |
% 7.42/6.97                                  bnd_c7_2 U V)) |
% 7.42/6.97                             bnd_c10_1 U)) |
% 7.42/6.97                        ((bnd_ndr1_0 &
% 7.42/6.97                          (ALL W.
% 7.42/6.97                              bnd_ndr1_1 bnd_a1581 -->
% 7.42/6.97                              (~ bnd_c5_2 bnd_a1581 W |
% 7.42/6.97                               bnd_c10_2 bnd_a1581 W) |
% 7.42/6.97                              ~ bnd_c6_2 bnd_a1581 W)) &
% 7.42/6.97                         bnd_c8_1 bnd_a1581) &
% 7.42/6.97                        ~ bnd_c7_1 bnd_a1581) &
% 7.42/6.97                       ((~ bnd_c10_0 | ~ bnd_c6_0) |
% 7.42/6.97                        (ALL X.
% 7.42/6.97                            bnd_ndr1_0 -->
% 7.42/6.97                            ((ALL Y.
% 7.42/6.97                                 bnd_ndr1_1 X -->
% 7.42/6.97                                 (bnd_c7_2 X Y | bnd_c6_2 X Y) |
% 7.42/6.97                                 ~ bnd_c2_2 X Y) |
% 7.42/6.97                             ~ bnd_c6_1 X) |
% 7.42/6.97                            ~ bnd_c4_1 X))) &
% 7.42/6.97                      ((~ bnd_c8_0 |
% 7.42/6.97                        (((((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a1582) &
% 7.42/6.97                            bnd_ndr1_1 bnd_a1582) &
% 7.42/6.97                           ~ bnd_c10_2 bnd_a1582 bnd_a1583) &
% 7.42/6.97                          bnd_c3_2 bnd_a1582 bnd_a1583) &
% 7.42/6.97                         ~ bnd_c4_2 bnd_a1582 bnd_a1583) &
% 7.42/6.97                        bnd_c1_1 bnd_a1582) |
% 7.42/6.97                       ((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1584) &
% 7.42/6.97                          bnd_c8_2 bnd_a1584 bnd_a1585) &
% 7.42/6.97                         bnd_c2_2 bnd_a1584 bnd_a1585) &
% 7.42/6.97                        ~ bnd_c1_2 bnd_a1584 bnd_a1585) &
% 7.42/6.97                       ~ bnd_c7_1 bnd_a1584)) &
% 7.42/6.97                     (((ALL Z.
% 7.42/6.97                           bnd_ndr1_0 -->
% 7.42/6.97                           (((bnd_ndr1_1 Z & bnd_c9_2 Z bnd_a1586) &
% 7.42/6.97                             bnd_c8_2 Z bnd_a1586) &
% 7.42/6.97                            bnd_c10_2 Z bnd_a1586 |
% 7.42/6.97                            ~ bnd_c10_1 Z) |
% 7.42/6.97                           bnd_c8_1 Z) |
% 7.42/6.97                       ((bnd_ndr1_0 & bnd_c2_1 bnd_a1587) &
% 7.42/6.97                        (ALL X1.
% 7.42/6.97                            bnd_ndr1_1 bnd_a1587 -->
% 7.42/6.97                            bnd_c8_2 bnd_a1587 X1 |
% 7.42/6.97                            ~ bnd_c2_2 bnd_a1587 X1)) &
% 7.42/6.97                       ~ bnd_c3_1 bnd_a1587) |
% 7.42/6.97                      ((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1588) &
% 7.42/6.97                             bnd_c6_2 bnd_a1588 bnd_a1589) &
% 7.42/6.97                            ~ bnd_c9_2 bnd_a1588 bnd_a1589) &
% 7.42/6.97                           ~ bnd_c10_2 bnd_a1588 bnd_a1589) &
% 7.42/6.97                          bnd_c5_1 bnd_a1588) &
% 7.42/6.97                         bnd_ndr1_1 bnd_a1588) &
% 7.42/6.97                        ~ bnd_c9_2 bnd_a1588 bnd_a1590) &
% 7.42/6.97                       bnd_c4_2 bnd_a1588 bnd_a1590) &
% 7.42/6.97                      ~ bnd_c6_2 bnd_a1588 bnd_a1590)) &
% 7.42/6.97                    ((bnd_c7_0 | ~ bnd_c4_0) |
% 7.42/6.97                     (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1591) &
% 7.42/6.97                         bnd_c4_2 bnd_a1591 bnd_a1592) &
% 7.42/6.97                        bnd_c8_2 bnd_a1591 bnd_a1592) &
% 7.42/6.97                       bnd_c6_2 bnd_a1591 bnd_a1592) &
% 7.42/6.97                      ~ bnd_c10_1 bnd_a1591) &
% 7.42/6.97                     ~ bnd_c4_1 bnd_a1591)) &
% 7.42/6.97                   (((((((bnd_ndr1_0 & bnd_c9_1 bnd_a1593) &
% 7.42/6.97                         bnd_ndr1_1 bnd_a1593) &
% 7.42/6.97                        ~ bnd_c10_2 bnd_a1593 bnd_a1594) &
% 7.42/6.97                       ~ bnd_c8_2 bnd_a1593 bnd_a1594) &
% 7.42/6.97                      ~ bnd_c3_2 bnd_a1593 bnd_a1594) &
% 7.42/6.97                     ~ bnd_c6_1 bnd_a1593 |
% 7.42/6.97                     (ALL X2.
% 7.42/6.97                         bnd_ndr1_0 -->
% 7.42/6.97                         (((bnd_ndr1_1 X2 & bnd_c3_2 X2 bnd_a1595) &
% 7.42/6.97                           bnd_c4_2 X2 bnd_a1595) &
% 7.42/6.97                          bnd_c6_2 X2 bnd_a1595 |
% 7.42/6.97                          (bnd_ndr1_1 X2 & bnd_c5_2 X2 bnd_a1596) &
% 7.42/6.97                          bnd_c3_2 X2 bnd_a1596) |
% 7.42/6.97                         bnd_c7_1 X2)) |
% 7.42/6.97                    ~ bnd_c10_0)) &
% 7.42/6.97                  (~ bnd_c5_0 | bnd_c7_0)) &
% 7.42/6.97                 ((bnd_c8_0 | bnd_c9_0) |
% 7.42/6.97                  (((((bnd_ndr1_0 & bnd_c5_1 bnd_a1597) &
% 7.42/6.97                      bnd_ndr1_1 bnd_a1597) &
% 7.42/6.97                     ~ bnd_c8_2 bnd_a1597 bnd_a1598) &
% 7.42/6.97                    bnd_c2_2 bnd_a1597 bnd_a1598) &
% 7.42/6.97                   ~ bnd_c1_2 bnd_a1597 bnd_a1598) &
% 7.42/6.97                  bnd_c1_1 bnd_a1597)) &
% 7.42/6.97                (((ALL X3.
% 7.42/6.97                      bnd_ndr1_0 -->
% 7.42/6.97                      (bnd_c1_1 X3 |
% 7.42/6.97                       ((bnd_ndr1_1 X3 & ~ bnd_c1_2 X3 bnd_a1599) &
% 7.42/6.97                        ~ bnd_c10_2 X3 bnd_a1599) &
% 7.42/6.97                       bnd_c9_2 X3 bnd_a1599) |
% 7.42/6.97                      bnd_c3_1 X3) |
% 7.42/6.97                  (ALL X4.
% 7.42/6.97                      bnd_ndr1_0 -->
% 7.42/6.97                      (ALL X5.
% 7.42/6.97                          bnd_ndr1_1 X4 -->
% 7.42/6.97                          (bnd_c5_2 X4 X5 | ~ bnd_c7_2 X4 X5) |
% 7.42/6.97                          ~ bnd_c8_2 X4 X5) |
% 7.42/6.97                      ((bnd_ndr1_1 X4 & ~ bnd_c8_2 X4 bnd_a1600) &
% 7.42/6.97                       ~ bnd_c6_2 X4 bnd_a1600) &
% 7.42/6.97                      bnd_c9_2 X4 bnd_a1600)) |
% 7.42/6.97                 (bnd_ndr1_0 & bnd_c1_1 bnd_a1601) & bnd_c9_1 bnd_a1601)) &
% 7.42/6.97               (((ALL X6.
% 7.42/6.97                     bnd_ndr1_0 -->
% 7.42/6.97                     (~ bnd_c8_1 X6 |
% 7.42/6.97                      (bnd_ndr1_1 X6 & ~ bnd_c4_2 X6 bnd_a1602) &
% 7.42/6.97                      bnd_c2_2 X6 bnd_a1602) |
% 7.42/6.97                     (ALL X7.
% 7.42/6.97                         bnd_ndr1_1 X6 -->
% 7.42/6.97                         (bnd_c3_2 X6 X7 | ~ bnd_c8_2 X6 X7) |
% 7.42/6.97                         ~ bnd_c7_2 X6 X7)) |
% 7.42/6.97                 ((((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1603) &
% 7.42/6.97                          bnd_c8_2 bnd_a1603 bnd_a1604) &
% 7.42/6.97                         ~ bnd_c2_2 bnd_a1603 bnd_a1604) &
% 7.42/6.97                        ~ bnd_c5_2 bnd_a1603 bnd_a1604) &
% 7.42/6.97                       bnd_ndr1_1 bnd_a1603) &
% 7.42/6.97                      ~ bnd_c6_2 bnd_a1603 bnd_a1605) &
% 7.42/6.97                     bnd_c8_2 bnd_a1603 bnd_a1605) &
% 7.42/6.97                    bnd_ndr1_1 bnd_a1603) &
% 7.42/6.97                   bnd_c1_2 bnd_a1603 bnd_a1606) &
% 7.42/6.97                  ~ bnd_c9_2 bnd_a1603 bnd_a1606) &
% 7.42/6.97                 ~ bnd_c5_2 bnd_a1603 bnd_a1606) |
% 7.42/6.97                (ALL X8.
% 7.42/6.97                    bnd_ndr1_0 -->
% 7.42/6.97                    (bnd_c10_1 X8 |
% 7.42/6.97                     (ALL X9.
% 7.42/6.97                         bnd_ndr1_1 X8 -->
% 7.42/6.97                         ~ bnd_c6_2 X8 X9 | bnd_c3_2 X8 X9)) |
% 7.42/6.97                    bnd_c9_1 X8))) &
% 7.42/6.97              (((ALL X10.
% 7.42/6.97                    bnd_ndr1_0 -->
% 7.42/6.97                    (((bnd_ndr1_1 X10 & bnd_c9_2 X10 bnd_a1607) &
% 7.42/6.97                      ~ bnd_c6_2 X10 bnd_a1607) &
% 7.42/6.97                     ~ bnd_c8_2 X10 bnd_a1607 |
% 7.42/6.97                     ~ bnd_c5_1 X10) |
% 7.42/6.97                    bnd_c6_1 X10) |
% 7.42/6.97                (ALL X11.
% 7.42/6.97                    bnd_ndr1_0 -->
% 7.42/6.97                    ((ALL X12.
% 7.42/6.97                         bnd_ndr1_1 X11 -->
% 7.42/6.97                         (~ bnd_c7_2 X11 X12 | ~ bnd_c8_2 X11 X12) |
% 7.42/6.97                         bnd_c5_2 X11 X12) |
% 7.42/6.97                     ((bnd_ndr1_1 X11 & ~ bnd_c10_2 X11 bnd_a1608) &
% 7.42/6.97                      bnd_c7_2 X11 bnd_a1608) &
% 7.42/6.97                     bnd_c5_2 X11 bnd_a1608) |
% 7.42/6.97                    (ALL X13.
% 7.42/6.97                        bnd_ndr1_1 X11 -->
% 7.42/6.97                        (bnd_c6_2 X11 X13 | bnd_c3_2 X11 X13) |
% 7.42/6.97                        ~ bnd_c10_2 X11 X13))) |
% 7.42/6.97               ((bnd_ndr1_0 & bnd_c10_1 bnd_a1609) & ~ bnd_c2_1 bnd_a1609) &
% 7.42/6.97               bnd_c3_1 bnd_a1609)) &
% 7.42/6.97             ((~ bnd_c3_0 |
% 7.42/6.97               (bnd_ndr1_0 & bnd_c7_1 bnd_a1610) &
% 7.42/6.97               (ALL X14.
% 7.42/6.97                   bnd_ndr1_1 bnd_a1610 -->
% 7.42/6.97                   (bnd_c3_2 bnd_a1610 X14 | bnd_c1_2 bnd_a1610 X14) |
% 7.42/6.97                   ~ bnd_c10_2 bnd_a1610 X14)) |
% 7.42/6.97              (((((bnd_ndr1_0 & bnd_c10_1 bnd_a1611) & ~ bnd_c5_1 bnd_a1611) &
% 7.42/6.97                 bnd_ndr1_1 bnd_a1611) &
% 7.42/6.97                ~ bnd_c4_2 bnd_a1611 bnd_a1612) &
% 7.42/6.97               ~ bnd_c8_2 bnd_a1611 bnd_a1612) &
% 7.42/6.97              bnd_c9_2 bnd_a1611 bnd_a1612)) &
% 7.42/6.97            ((ALL X15.
% 7.42/6.97                 bnd_ndr1_0 -->
% 7.42/6.97                 (~ bnd_c3_1 X15 | bnd_c8_1 X15) | bnd_c10_1 X15) |
% 7.42/6.97             (ALL X16.
% 7.42/6.97                 bnd_ndr1_0 -->
% 7.42/6.97                 (bnd_c3_1 X16 |
% 7.42/6.97                  ((bnd_ndr1_1 X16 & ~ bnd_c1_2 X16 bnd_a1613) &
% 7.42/6.97                   bnd_c5_2 X16 bnd_a1613) &
% 7.42/6.97                  ~ bnd_c9_2 X16 bnd_a1613) |
% 7.42/6.97                 ((bnd_ndr1_1 X16 & bnd_c4_2 X16 bnd_a1614) &
% 7.42/6.97                  ~ bnd_c3_2 X16 bnd_a1614) &
% 7.42/6.97                 ~ bnd_c9_2 X16 bnd_a1614))) &
% 7.42/6.97           ((bnd_c2_0 |
% 7.42/6.97             (ALL X17.
% 7.42/6.97                 bnd_ndr1_0 -->
% 7.42/6.97                 (((bnd_ndr1_1 X17 & bnd_c8_2 X17 bnd_a1615) &
% 7.42/6.97                   ~ bnd_c9_2 X17 bnd_a1615) &
% 7.42/6.97                  bnd_c3_2 X17 bnd_a1615 |
% 7.42/6.97                  bnd_c2_1 X17) |
% 7.42/6.97                 bnd_c10_1 X17)) |
% 7.42/6.97            ~ bnd_c10_0)) &
% 7.42/6.97          (((((((bnd_ndr1_0 & ~ bnd_c3_1 bnd_a1616) & bnd_ndr1_1 bnd_a1616) &
% 7.42/6.97               ~ bnd_c4_2 bnd_a1616 bnd_a1617) &
% 7.42/6.97              ~ bnd_c10_2 bnd_a1616 bnd_a1617) &
% 7.42/6.97             bnd_c8_2 bnd_a1616 bnd_a1617) &
% 7.42/6.97            ~ bnd_c9_1 bnd_a1616 |
% 7.42/6.97            ~ bnd_c10_0) |
% 7.42/6.97           bnd_c9_0)) &
% 7.42/6.97         (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1618) &
% 7.42/6.97               ~ bnd_c6_2 bnd_a1618 bnd_a1619) &
% 7.42/6.97              bnd_c8_2 bnd_a1618 bnd_a1619) &
% 7.42/6.97             bnd_c9_2 bnd_a1618 bnd_a1619) &
% 7.42/6.97            bnd_c5_1 bnd_a1618) &
% 7.42/6.97           (ALL X18.
% 7.42/6.97               bnd_ndr1_1 bnd_a1618 -->
% 7.42/6.97               (~ bnd_c8_2 bnd_a1618 X18 | bnd_c3_2 bnd_a1618 X18) |
% 7.42/6.97               ~ bnd_c9_2 bnd_a1618 X18) |
% 7.42/6.97           ~ bnd_c9_0) |
% 7.42/6.97          (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1620) &
% 7.42/6.97              ~ bnd_c8_2 bnd_a1620 bnd_a1621) &
% 7.42/6.97             bnd_c7_2 bnd_a1620 bnd_a1621) &
% 7.42/6.97            ~ bnd_c4_2 bnd_a1620 bnd_a1621) &
% 7.42/6.97           bnd_c3_1 bnd_a1620) &
% 7.42/6.97          (ALL X19.
% 7.42/6.97              bnd_ndr1_1 bnd_a1620 -->
% 7.42/6.97              (~ bnd_c9_2 bnd_a1620 X19 | bnd_c4_2 bnd_a1620 X19) |
% 7.42/6.97              bnd_c10_2 bnd_a1620 X19))) &
% 7.42/6.97        (((ALL X20.
% 7.42/6.97              bnd_ndr1_0 -->
% 7.42/6.97              (bnd_c4_1 X20 |
% 7.42/6.97               (ALL X21.
% 7.42/6.97                   bnd_ndr1_1 X20 -->
% 7.42/6.97                   (~ bnd_c7_2 X20 X21 | bnd_c6_2 X20 X21) |
% 7.42/6.97                   ~ bnd_c10_2 X20 X21)) |
% 7.42/6.97              (ALL X22.
% 7.42/6.97                  bnd_ndr1_1 X20 -->
% 7.42/6.97                  (bnd_c1_2 X20 X22 | ~ bnd_c2_2 X20 X22) |
% 7.42/6.97                  bnd_c7_2 X20 X22)) |
% 7.42/6.97          (ALL X23.
% 7.42/6.97              bnd_ndr1_0 -->
% 7.42/6.97              (bnd_c6_1 X23 |
% 7.42/6.97               ((bnd_ndr1_1 X23 & ~ bnd_c5_2 X23 bnd_a1622) &
% 7.42/6.97                bnd_c9_2 X23 bnd_a1622) &
% 7.42/6.97               bnd_c3_2 X23 bnd_a1622) |
% 7.42/6.97              (ALL X24.
% 7.42/6.97                  bnd_ndr1_1 X23 -->
% 7.42/6.97                  (bnd_c2_2 X23 X24 | ~ bnd_c4_2 X23 X24) |
% 7.42/6.97                  bnd_c5_2 X23 X24))) |
% 7.42/6.97         bnd_c1_0)) &
% 7.42/6.97       (((ALL X25.
% 7.42/6.97             bnd_ndr1_0 -->
% 7.42/6.97             (((bnd_ndr1_1 X25 & ~ bnd_c2_2 X25 bnd_a1623) &
% 7.42/6.97               ~ bnd_c6_2 X25 bnd_a1623) &
% 7.42/6.97              ~ bnd_c10_2 X25 bnd_a1623 |
% 7.42/6.97              (bnd_ndr1_1 X25 & bnd_c4_2 X25 bnd_a1624) &
% 7.42/6.97              bnd_c1_2 X25 bnd_a1624) |
% 7.42/6.97             ~ bnd_c9_1 X25) |
% 7.42/6.97         (ALL X26.
% 7.42/6.97             bnd_ndr1_0 -->
% 7.42/6.97             ((ALL X27.
% 7.42/6.97                  bnd_ndr1_1 X26 -->
% 7.42/6.97                  (bnd_c10_2 X26 X27 | bnd_c3_2 X26 X27) |
% 7.42/6.97                  ~ bnd_c6_2 X26 X27) |
% 7.42/6.97              bnd_c9_1 X26) |
% 7.42/6.97             ((bnd_ndr1_1 X26 & bnd_c9_2 X26 bnd_a1625) &
% 7.42/6.97              ~ bnd_c5_2 X26 bnd_a1625) &
% 7.42/6.97             bnd_c6_2 X26 bnd_a1625)) |
% 7.42/6.97        ((bnd_ndr1_0 & bnd_c5_1 bnd_a1626) & bnd_c3_1 bnd_a1626) &
% 7.42/6.97        bnd_c9_1 bnd_a1626)) &
% 7.42/6.97      (~ bnd_c8_0 |
% 7.42/6.97       (ALL X28.
% 7.42/6.97           bnd_ndr1_0 -->
% 7.42/6.97           (((bnd_ndr1_1 X28 & ~ bnd_c7_2 X28 bnd_a1627) &
% 7.42/6.97             ~ bnd_c10_2 X28 bnd_a1627) &
% 7.42/6.97            ~ bnd_c1_2 X28 bnd_a1627 |
% 7.42/6.97            ((bnd_ndr1_1 X28 & ~ bnd_c3_2 X28 bnd_a1628) &
% 7.42/6.97             bnd_c9_2 X28 bnd_a1628) &
% 7.42/6.97            bnd_c10_2 X28 bnd_a1628) |
% 7.42/6.97           ~ bnd_c9_1 X28))) &
% 7.42/6.97     ((~ bnd_c10_0 |
% 7.42/6.97       (ALL X29.
% 7.42/6.97           bnd_ndr1_0 --> (bnd_c4_1 X29 | ~ bnd_c6_1 X29) | bnd_c2_1 X29)) |
% 7.42/6.97      (((((bnd_ndr1_0 &
% 7.42/6.97           (ALL X30.
% 7.42/6.97               bnd_ndr1_1 bnd_a1629 -->
% 7.42/6.97               (~ bnd_c4_2 bnd_a1629 X30 | ~ bnd_c9_2 bnd_a1629 X30) |
% 7.42/6.97               bnd_c2_2 bnd_a1629 X30)) &
% 7.42/6.97          bnd_ndr1_1 bnd_a1629) &
% 7.42/6.97         ~ bnd_c6_2 bnd_a1629 bnd_a1630) &
% 7.42/6.97        bnd_c7_2 bnd_a1629 bnd_a1630) &
% 7.42/6.97       ~ bnd_c4_2 bnd_a1629 bnd_a1630) &
% 7.42/6.97      bnd_c1_1 bnd_a1629)) &
% 7.42/6.97    ((((((((((bnd_ndr1_0 & bnd_c5_1 bnd_a1631) & bnd_ndr1_1 bnd_a1631) &
% 7.42/6.97            bnd_c9_2 bnd_a1631 bnd_a1632) &
% 7.42/6.97           ~ bnd_c1_2 bnd_a1631 bnd_a1632) &
% 7.42/6.97          ~ bnd_c5_2 bnd_a1631 bnd_a1632) &
% 7.42/6.97         bnd_ndr1_1 bnd_a1631) &
% 7.42/6.97        bnd_c4_2 bnd_a1631 bnd_a1633) &
% 7.42/6.97       ~ bnd_c3_2 bnd_a1631 bnd_a1633) &
% 7.42/6.97      bnd_c9_2 bnd_a1631 bnd_a1633 |
% 7.42/6.97      (ALL X31.
% 7.42/6.97          bnd_ndr1_0 -->
% 7.42/6.97          (bnd_c2_1 X31 |
% 7.42/6.97           (bnd_ndr1_1 X31 & bnd_c3_2 X31 bnd_a1634) &
% 7.42/6.97           bnd_c6_2 X31 bnd_a1634) |
% 7.42/6.97          bnd_c5_1 X31)) |
% 7.42/6.97     (ALL X32.
% 7.42/6.97         bnd_ndr1_0 --> (bnd_c9_1 X32 | ~ bnd_c5_1 X32) | bnd_c6_1 X32))) &
% 7.42/6.97   ((((((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1635) &
% 7.42/6.97              bnd_c8_2 bnd_a1635 bnd_a1636) &
% 7.42/6.97             bnd_c9_2 bnd_a1635 bnd_a1636) &
% 7.42/6.97            bnd_c2_2 bnd_a1635 bnd_a1636) &
% 7.42/6.97           bnd_ndr1_1 bnd_a1635) &
% 7.42/6.97          bnd_c3_2 bnd_a1635 bnd_a1637) &
% 7.42/6.97         ~ bnd_c2_2 bnd_a1635 bnd_a1637) &
% 7.42/6.97        bnd_ndr1_1 bnd_a1635) &
% 7.42/6.97       bnd_c1_2 bnd_a1635 bnd_a1638) &
% 7.42/6.97      ~ bnd_c5_2 bnd_a1635 bnd_a1638) &
% 7.42/6.97     ~ bnd_c8_2 bnd_a1635 bnd_a1638 |
% 7.42/6.97     bnd_c9_0) |
% 7.42/6.97    ((((((((bnd_ndr1_0 & ~ bnd_c9_1 bnd_a1639) & bnd_ndr1_1 bnd_a1639) &
% 7.42/6.97          ~ bnd_c4_2 bnd_a1639 bnd_a1640) &
% 7.42/6.97         ~ bnd_c5_2 bnd_a1639 bnd_a1640) &
% 7.42/6.97        bnd_c6_2 bnd_a1639 bnd_a1640) &
% 7.42/6.97       bnd_ndr1_1 bnd_a1639) &
% 7.42/6.97      ~ bnd_c10_2 bnd_a1639 bnd_a1641) &
% 7.42/6.97     bnd_c9_2 bnd_a1639 bnd_a1641) &
% 7.42/6.97    bnd_c1_2 bnd_a1639 bnd_a1641)) &
% 7.42/6.97  (((ALL X33.
% 7.42/6.97        bnd_ndr1_0 --> (~ bnd_c6_1 X33 | ~ bnd_c1_1 X33) | ~ bnd_c3_1 X33) |
% 7.42/6.97    (ALL X34.
% 7.42/6.97        bnd_ndr1_0 -->
% 7.42/6.97        ((ALL X35. bnd_ndr1_1 X34 --> bnd_c1_2 X34 X35 | ~ bnd_c6_2 X34 X35) |
% 7.42/6.97         bnd_c1_1 X34) |
% 7.42/6.97        (ALL X36.
% 7.42/6.97            bnd_ndr1_1 X34 -->
% 7.42/6.97            (~ bnd_c4_2 X34 X36 | ~ bnd_c10_2 X34 X36) |
% 7.42/6.97            ~ bnd_c1_2 X34 X36))) |
% 7.42/6.97   (ALL X37.
% 7.42/6.97       bnd_ndr1_0 -->
% 7.42/6.97       (bnd_c6_1 X37 | bnd_c2_1 X37) |
% 7.42/6.97       ((bnd_ndr1_1 X37 & ~ bnd_c9_2 X37 bnd_a1642) &
% 7.42/6.97        ~ bnd_c7_2 X37 bnd_a1642) &
% 7.42/6.97       ~ bnd_c1_2 X37 bnd_a1642))) &
% 7.42/6.97                                       (((ALL X38.
% 7.42/6.97       bnd_ndr1_0 -->
% 7.42/6.97       (~ bnd_c6_1 X38 | bnd_c3_1 X38) |
% 7.42/6.97       (bnd_ndr1_1 X38 & bnd_c3_2 X38 bnd_a1643) & ~ bnd_c9_2 X38 bnd_a1643) |
% 7.42/6.97   ((bnd_ndr1_0 &
% 7.42/6.97     (ALL X39.
% 7.42/6.97         bnd_ndr1_1 bnd_a1644 -->
% 7.42/6.97         (~ bnd_c8_2 bnd_a1644 X39 | bnd_c4_2 bnd_a1644 X39) |
% 7.42/6.97         bnd_c9_2 bnd_a1644 X39)) &
% 7.42/6.97    ~ bnd_c6_1 bnd_a1644) &
% 7.42/6.97   ~ bnd_c9_1 bnd_a1644) |
% 7.42/6.97  (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1645) & bnd_c2_2 bnd_a1645 bnd_a1646) &
% 7.42/6.97     ~ bnd_c1_2 bnd_a1645 bnd_a1646) &
% 7.42/6.97    ~ bnd_c5_2 bnd_a1645 bnd_a1646) &
% 7.42/6.97   ~ bnd_c6_1 bnd_a1645) &
% 7.42/6.97  bnd_c9_1 bnd_a1645)) &
% 7.42/6.97                                      ((((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a1647) &
% 7.42/6.97   ~ bnd_c4_1 bnd_a1647) &
% 7.42/6.97  (ALL X40.
% 7.42/6.97      bnd_ndr1_1 bnd_a1647 -->
% 7.42/6.97      bnd_c9_2 bnd_a1647 X40 | bnd_c4_2 bnd_a1647 X40) |
% 7.42/6.97  (ALL X41.
% 7.42/6.97      bnd_ndr1_0 -->
% 7.42/6.97      ((bnd_ndr1_1 X41 & bnd_c10_2 X41 bnd_a1648) & bnd_c3_2 X41 bnd_a1648) &
% 7.42/6.97      bnd_c2_2 X41 bnd_a1648 |
% 7.42/6.97      ((bnd_ndr1_1 X41 & ~ bnd_c1_2 X41 bnd_a1649) & bnd_c8_2 X41 bnd_a1649) &
% 7.42/6.97      bnd_c7_2 X41 bnd_a1649)) |
% 7.42/6.97                                       ((bnd_ndr1_0 & ~ bnd_c9_1 bnd_a1650) &
% 7.42/6.97  ~ bnd_c6_1 bnd_a1650) &
% 7.42/6.97                                       bnd_c2_1 bnd_a1650)) &
% 7.42/6.97                                     ((bnd_c3_0 |
% 7.42/6.97                                       ((((bnd_ndr1_0 &
% 7.42/6.97     bnd_ndr1_1 bnd_a1651) &
% 7.42/6.97    ~ bnd_c8_2 bnd_a1651 bnd_a1652) &
% 7.42/6.97   bnd_c2_2 bnd_a1651 bnd_a1652) &
% 7.42/6.97  ~ bnd_c10_1 bnd_a1651) &
% 7.42/6.97                                       bnd_c2_1 bnd_a1651) |
% 7.42/6.97                                      ~ bnd_c9_0)) &
% 7.42/6.97                                    ((~ bnd_c5_0 | ~ bnd_c9_0) |
% 7.42/6.97                                     (ALL X42.
% 7.42/6.97   bnd_ndr1_0 -->
% 7.42/6.97   (~ bnd_c2_1 X42 | ~ bnd_c3_1 X42) |
% 7.42/6.97   (bnd_ndr1_1 X42 & ~ bnd_c4_2 X42 bnd_a1653) & bnd_c6_2 X42 bnd_a1653))) &
% 7.42/6.97                                   ((~ bnd_c2_0 |
% 7.42/6.97                                     (ALL X43.
% 7.42/6.97   bnd_ndr1_0 -->
% 7.42/6.97   (bnd_c5_1 X43 | bnd_c10_1 X43) |
% 7.42/6.97   (ALL X44.
% 7.42/6.97       bnd_ndr1_1 X43 -->
% 7.42/6.97       (~ bnd_c1_2 X43 X44 | ~ bnd_c3_2 X43 X44) | ~ bnd_c9_2 X43 X44))) |
% 7.42/6.97                                    ((bnd_ndr1_0 & ~ bnd_c3_1 bnd_a1654) &
% 7.42/6.97                                     bnd_c1_1 bnd_a1654) &
% 7.42/6.97                                    ~ bnd_c6_1 bnd_a1654)) &
% 7.42/6.97                                  ((bnd_c10_0 | bnd_c4_0) |
% 7.42/6.97                                   ((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1655) &
% 7.42/6.97                                      ~ bnd_c7_2 bnd_a1655 bnd_a1656) &
% 7.42/6.97                                     bnd_c2_2 bnd_a1655 bnd_a1656) &
% 7.42/6.97                                    bnd_c6_1 bnd_a1655) &
% 7.42/6.97                                   (ALL X45.
% 7.42/6.97                                       bnd_ndr1_1 bnd_a1655 -->
% 7.42/6.97                                       (bnd_c1_2 bnd_a1655 X45 |
% 7.42/6.97  ~ bnd_c7_2 bnd_a1655 X45) |
% 7.42/6.97                                       ~ bnd_c10_2 bnd_a1655 X45))) &
% 7.42/6.97                                 (((ALL X46.
% 7.42/6.97                                       bnd_ndr1_0 -->
% 7.42/6.97                                       (((bnd_ndr1_1 X46 &
% 7.42/6.97    ~ bnd_c3_2 X46 bnd_a1657) &
% 7.42/6.97   ~ bnd_c2_2 X46 bnd_a1657) &
% 7.42/6.97  bnd_c7_2 X46 bnd_a1657 |
% 7.42/6.97  ~ bnd_c9_1 X46) |
% 7.42/6.97                                       (ALL X47.
% 7.42/6.97     bnd_ndr1_1 X46 -->
% 7.42/6.97     (bnd_c3_2 X46 X47 | ~ bnd_c8_2 X46 X47) | bnd_c6_2 X46 X47)) |
% 7.42/6.97                                   (ALL X48.
% 7.42/6.97                                       bnd_ndr1_0 -->
% 7.42/6.97                                       ((ALL X49.
% 7.42/6.97      bnd_ndr1_1 X48 -->
% 7.42/6.97      (~ bnd_c9_2 X48 X49 | bnd_c3_2 X48 X49) | ~ bnd_c7_2 X48 X49) |
% 7.42/6.97  bnd_c3_1 X48) |
% 7.42/6.97                                       ~ bnd_c8_1 X48)) |
% 7.42/6.97                                  (ALL X50.
% 7.42/6.97                                      bnd_ndr1_0 -->
% 7.42/6.97                                      ~ bnd_c1_1 X50 | bnd_c6_1 X50))) &
% 7.42/6.97                                ((ALL X51.
% 7.42/6.97                                     bnd_ndr1_0 -->
% 7.42/6.97                                     ((ALL X52.
% 7.42/6.97    bnd_ndr1_1 X51 --> bnd_c9_2 X51 X52 | bnd_c8_2 X51 X52) |
% 7.42/6.97                                      ((bnd_ndr1_1 X51 &
% 7.42/6.97  ~ bnd_c9_2 X51 bnd_a1658) &
% 7.42/6.97                                       bnd_c3_2 X51 bnd_a1658) &
% 7.42/6.97                                      ~ bnd_c7_2 X51 bnd_a1658) |
% 7.42/6.97                                     bnd_c9_1 X51) |
% 7.42/6.97                                 ((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1659) &
% 7.42/6.97  bnd_c4_2 bnd_a1659 bnd_a1660) &
% 7.42/6.97                                       bnd_c5_2 bnd_a1659 bnd_a1660) &
% 7.42/6.97                                      bnd_c3_2 bnd_a1659 bnd_a1660) &
% 7.42/6.97                                     bnd_ndr1_1 bnd_a1659) &
% 7.42/6.97                                    bnd_c4_2 bnd_a1659 bnd_a1661) &
% 7.42/6.97                                   ~ bnd_c1_2 bnd_a1659 bnd_a1661) &
% 7.42/6.97                                  bnd_c9_2 bnd_a1659 bnd_a1661) &
% 7.42/6.97                                 ~ bnd_c5_1 bnd_a1659)) &
% 7.42/6.97                               ((((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1662) &
% 7.42/6.97  bnd_c7_2 bnd_a1662 bnd_a1663) &
% 7.42/6.97                                       ~ bnd_c1_2 bnd_a1662 bnd_a1663) &
% 7.42/6.97                                      bnd_c5_2 bnd_a1662 bnd_a1663) &
% 7.42/6.97                                     bnd_c2_1 bnd_a1662) &
% 7.42/6.97                                    bnd_ndr1_1 bnd_a1662) &
% 7.42/6.97                                   ~ bnd_c10_2 bnd_a1662 bnd_a1664) &
% 7.42/6.97                                  bnd_c3_2 bnd_a1662 bnd_a1664) &
% 7.42/6.97                                 ~ bnd_c1_2 bnd_a1662 bnd_a1664 |
% 7.42/6.97                                 (ALL X53.
% 7.42/6.97                                     bnd_ndr1_0 -->
% 7.42/6.97                                     (bnd_c8_1 X53 |
% 7.42/6.97                                      ((bnd_ndr1_1 X53 &
% 7.42/6.97  ~ bnd_c9_2 X53 bnd_a1665) &
% 7.42/6.97                                       ~ bnd_c7_2 X53 bnd_a1665) &
% 7.42/6.97                                      ~ bnd_c8_2 X53 bnd_a1665) |
% 7.42/6.97                                     bnd_c3_1 X53)) |
% 7.42/6.97                                bnd_c4_0)) &
% 7.42/6.97                              (bnd_c9_0 | bnd_c6_0)) &
% 7.42/6.97                             (((ALL X54.
% 7.42/6.97                                   bnd_ndr1_0 -->
% 7.42/6.97                                   ((bnd_ndr1_1 X54 &
% 7.42/6.97                                     bnd_c3_2 X54 bnd_a1666) &
% 7.42/6.97                                    ~ bnd_c10_2 X54 bnd_a1666 |
% 7.42/6.97                                    ~ bnd_c8_1 X54) |
% 7.42/6.97                                   bnd_c6_1 X54) |
% 7.42/6.97                               ~ bnd_c9_0) |
% 7.42/6.97                              ((bnd_ndr1_0 & ~ bnd_c9_1 bnd_a1667) &
% 7.42/6.97                               bnd_c4_1 bnd_a1667) &
% 7.42/6.97                              (ALL X55.
% 7.42/6.97                                  bnd_ndr1_1 bnd_a1667 -->
% 7.42/6.97                                  (~ bnd_c1_2 bnd_a1667 X55 |
% 7.42/6.97                                   ~ bnd_c9_2 bnd_a1667 X55) |
% 7.42/6.97                                  bnd_c3_2 bnd_a1667 X55))) &
% 7.42/6.97                            ((bnd_ndr1_0 & ~ bnd_c6_1 bnd_a1668) &
% 7.42/6.97                             (ALL X56.
% 7.42/6.97                                 bnd_ndr1_1 bnd_a1668 -->
% 7.42/6.97                                 (~ bnd_c9_2 bnd_a1668 X56 |
% 7.42/6.97                                  ~ bnd_c3_2 bnd_a1668 X56) |
% 7.42/6.97                                 bnd_c8_2 bnd_a1668 X56) |
% 7.42/6.97                             bnd_c6_0)) &
% 7.42/6.97                           ((bnd_c3_0 | ~ bnd_c8_0) |
% 7.42/6.97                            ((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1669) &
% 7.42/6.97                                   bnd_c10_2 bnd_a1669 bnd_a1670) &
% 7.42/6.97                                  ~ bnd_c8_2 bnd_a1669 bnd_a1670) &
% 7.42/6.97                                 ~ bnd_c2_2 bnd_a1669 bnd_a1670) &
% 7.42/6.97                                bnd_ndr1_1 bnd_a1669) &
% 7.42/6.97                               bnd_c9_2 bnd_a1669 bnd_a1671) &
% 7.42/6.97                              bnd_c2_2 bnd_a1669 bnd_a1671) &
% 7.42/6.97                             ~ bnd_c4_2 bnd_a1669 bnd_a1671) &
% 7.42/6.97                            (ALL X57.
% 7.42/6.97                                bnd_ndr1_1 bnd_a1669 -->
% 7.42/6.97                                (~ bnd_c3_2 bnd_a1669 X57 |
% 7.42/6.97                                 ~ bnd_c2_2 bnd_a1669 X57) |
% 7.42/6.97                                bnd_c1_2 bnd_a1669 X57))) &
% 7.42/6.97                          ((~ bnd_c4_0 | ~ bnd_c1_0) | ~ bnd_c6_0)) &
% 7.42/6.97                         ((bnd_c7_0 | ~ bnd_c8_0) |
% 7.42/6.97                          (ALL X58.
% 7.42/6.97                              bnd_ndr1_0 -->
% 7.42/6.97                              (~ bnd_c7_1 X58 |
% 7.42/6.97                               (ALL X59.
% 7.42/6.97                                   bnd_ndr1_1 X58 -->
% 7.42/6.97                                   (~ bnd_c8_2 X58 X59 | bnd_c3_2 X58 X59) |
% 7.42/6.97                                   bnd_c1_2 X58 X59)) |
% 7.42/6.97                              bnd_c1_1 X58))) &
% 7.42/6.97                        (((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1672) &
% 7.42/6.97                                bnd_c10_2 bnd_a1672 bnd_a1673) &
% 7.42/6.97                               ~ bnd_c4_2 bnd_a1672 bnd_a1673) &
% 7.42/6.97                              ~ bnd_c6_2 bnd_a1672 bnd_a1673) &
% 7.42/6.97                             bnd_ndr1_1 bnd_a1672) &
% 7.42/6.97                            ~ bnd_c1_2 bnd_a1672 bnd_a1674) &
% 7.42/6.97                           bnd_c8_2 bnd_a1672 bnd_a1674) &
% 7.42/6.97                          bnd_c9_2 bnd_a1672 bnd_a1674 |
% 7.42/6.97                          (ALL X60.
% 7.42/6.97                              bnd_ndr1_0 -->
% 7.42/6.97                              ((bnd_ndr1_1 X60 & ~ bnd_c9_2 X60 bnd_a1675) &
% 7.42/6.97                               bnd_c4_2 X60 bnd_a1675) &
% 7.42/6.97                              ~ bnd_c5_2 X60 bnd_a1675 |
% 7.42/6.97                              ~ bnd_c9_1 X60)) |
% 7.42/6.97                         bnd_c9_0)) &
% 7.42/6.97                       (((ALL X61.
% 7.42/6.97                             bnd_ndr1_0 -->
% 7.42/6.97                             (~ bnd_c9_1 X61 |
% 7.42/6.97                              (bnd_ndr1_1 X61 & bnd_c8_2 X61 bnd_a1676) &
% 7.42/6.97                              bnd_c10_2 X61 bnd_a1676) |
% 7.42/6.97                             bnd_c2_1 X61) |
% 7.42/6.97                         ~ bnd_c1_0) |
% 7.42/6.97                        ((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1677) &
% 7.42/6.97                           bnd_c9_2 bnd_a1677 bnd_a1678) &
% 7.42/6.97                          ~ bnd_c3_2 bnd_a1677 bnd_a1678) &
% 7.42/6.97                         bnd_c10_1 bnd_a1677) &
% 7.42/6.97                        bnd_c3_1 bnd_a1677)) &
% 7.42/6.97                      ((~ bnd_c6_0 | ~ bnd_c9_0) |
% 7.42/6.97                       (((((bnd_ndr1_0 & ~ bnd_c9_1 bnd_a1679) &
% 7.42/6.97                           bnd_ndr1_1 bnd_a1679) &
% 7.42/6.97                          bnd_c8_2 bnd_a1679 bnd_a1680) &
% 7.42/6.97                         ~ bnd_c4_2 bnd_a1679 bnd_a1680) &
% 7.42/6.97                        bnd_c7_2 bnd_a1679 bnd_a1680) &
% 7.42/6.97                       (ALL X62.
% 7.42/6.97                           bnd_ndr1_1 bnd_a1679 -->
% 7.42/6.97                           (bnd_c5_2 bnd_a1679 X62 | bnd_c7_2 bnd_a1679 X62) |
% 7.42/6.97                           bnd_c2_2 bnd_a1679 X62))) &
% 7.42/6.97                     ((~ bnd_c5_0 |
% 7.42/6.97                       ((bnd_ndr1_0 &
% 7.42/6.97                         (ALL X63.
% 7.42/6.97                             bnd_ndr1_1 bnd_a1681 -->
% 7.42/6.97                             (~ bnd_c10_2 bnd_a1681 X63 |
% 7.42/6.97                              ~ bnd_c6_2 bnd_a1681 X63) |
% 7.42/6.97                             ~ bnd_c8_2 bnd_a1681 X63)) &
% 7.42/6.97                        bnd_c8_1 bnd_a1681) &
% 7.42/6.97                       bnd_c3_1 bnd_a1681) |
% 7.42/6.97                      ~ bnd_c3_0)) &
% 7.42/6.97                    ((~ bnd_c5_0 |
% 7.42/6.97                      (ALL X64.
% 7.42/6.97                          bnd_ndr1_0 -->
% 7.42/6.97                          (ALL X65.
% 7.42/6.97                              bnd_ndr1_1 X64 -->
% 7.42/6.97                              ~ bnd_c5_2 X64 X65 | bnd_c1_2 X64 X65) |
% 7.42/6.97                          bnd_c7_1 X64)) |
% 7.42/6.97                     (ALL X66.
% 7.42/6.97                         bnd_ndr1_0 -->
% 7.42/6.97                         (((bnd_ndr1_1 X66 & ~ bnd_c1_2 X66 bnd_a1682) &
% 7.42/6.97                           ~ bnd_c8_2 X66 bnd_a1682) &
% 7.42/6.97                          bnd_c9_2 X66 bnd_a1682 |
% 7.42/6.97                          (ALL X67.
% 7.42/6.97                              bnd_ndr1_1 X66 -->
% 7.42/6.97                              (bnd_c1_2 X66 X67 | bnd_c4_2 X66 X67) |
% 7.42/6.97                              bnd_c3_2 X66 X67)) |
% 7.42/6.97                         ~ bnd_c7_1 X66))) &
% 7.42/6.97                   (((((((bnd_ndr1_0 & bnd_c8_1 bnd_a1683) &
% 7.42/6.97                         bnd_ndr1_1 bnd_a1683) &
% 7.42/6.97                        ~ bnd_c6_2 bnd_a1683 bnd_a1684) &
% 7.42/6.97                       bnd_c5_2 bnd_a1683 bnd_a1684) &
% 7.42/6.97                      ~ bnd_c8_2 bnd_a1683 bnd_a1684) &
% 7.42/6.97                     ~ bnd_c2_1 bnd_a1683 |
% 7.42/6.97                     ~ bnd_c2_0) |
% 7.42/6.97                    ~ bnd_c5_0)) &
% 7.42/6.97                  (bnd_c3_0 |
% 7.42/6.97                   (((((bnd_ndr1_0 &
% 7.42/6.97                        (ALL X68.
% 7.42/6.97                            bnd_ndr1_1 bnd_a1685 -->
% 7.42/6.97                            (bnd_c8_2 bnd_a1685 X68 |
% 7.42/6.97                             bnd_c2_2 bnd_a1685 X68) |
% 7.42/6.97                            bnd_c1_2 bnd_a1685 X68)) &
% 7.42/6.97                       ~ bnd_c9_1 bnd_a1685) &
% 7.42/6.97                      bnd_ndr1_1 bnd_a1685) &
% 7.42/6.97                     ~ bnd_c6_2 bnd_a1685 bnd_a1686) &
% 7.42/6.97                    bnd_c9_2 bnd_a1685 bnd_a1686) &
% 7.42/6.97                   bnd_c8_2 bnd_a1685 bnd_a1686)) &
% 7.42/6.97                 (bnd_c1_0 |
% 7.42/6.97                  (ALL X69.
% 7.42/6.97                      bnd_ndr1_0 -->
% 7.42/6.97                      ((ALL X70.
% 7.42/6.97                           bnd_ndr1_1 X69 -->
% 7.42/6.97                           (~ bnd_c1_2 X69 X70 | ~ bnd_c6_2 X69 X70) |
% 7.42/6.97                           bnd_c2_2 X69 X70) |
% 7.42/6.97                       bnd_c7_1 X69) |
% 7.42/6.97                      ~ bnd_c5_1 X69))) &
% 7.42/6.97                ((~ bnd_c7_0 | bnd_c10_0) | bnd_c2_0)) &
% 7.42/6.97               ((~ bnd_c4_0 | ~ bnd_c2_0) | bnd_c6_0)) &
% 7.42/6.97              ((bnd_c10_0 | bnd_c2_0) |
% 7.42/6.97               (ALL X71.
% 7.42/6.97                   bnd_ndr1_0 -->
% 7.42/6.97                   (~ bnd_c8_1 X71 |
% 7.42/6.97                    (ALL X72.
% 7.42/6.97                        bnd_ndr1_1 X71 -->
% 7.42/6.97                        (~ bnd_c4_2 X71 X72 | ~ bnd_c10_2 X71 X72) |
% 7.42/6.97                        ~ bnd_c6_2 X71 X72)) |
% 7.42/6.97                   ~ bnd_c2_1 X71))) &
% 7.42/6.97             ((bnd_c3_0 |
% 7.42/6.97               ((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a1687) &
% 7.42/6.97                (ALL X73.
% 7.42/6.97                    bnd_ndr1_1 bnd_a1687 -->
% 7.42/6.97                    (bnd_c1_2 bnd_a1687 X73 | bnd_c2_2 bnd_a1687 X73) |
% 7.42/6.97                    bnd_c8_2 bnd_a1687 X73)) &
% 7.42/6.97               (ALL X74.
% 7.42/6.97                   bnd_ndr1_1 bnd_a1687 -->
% 7.42/6.97                   (bnd_c10_2 bnd_a1687 X74 | bnd_c9_2 bnd_a1687 X74) |
% 7.42/6.97                   ~ bnd_c6_2 bnd_a1687 X74)) |
% 7.42/6.97              bnd_c7_0)) &
% 7.42/6.97            ((~ bnd_c3_0 |
% 7.42/6.97              ((bnd_ndr1_0 & ~ bnd_c6_1 bnd_a1688) & bnd_c8_1 bnd_a1688) &
% 7.42/6.97              (ALL X75.
% 7.42/6.97                  bnd_ndr1_1 bnd_a1688 -->
% 7.42/6.97                  (~ bnd_c5_2 bnd_a1688 X75 | ~ bnd_c2_2 bnd_a1688 X75) |
% 7.42/6.97                  ~ bnd_c7_2 bnd_a1688 X75)) |
% 7.42/6.97             ~ bnd_c8_0)) &
% 7.42/6.97           ((bnd_c4_0 |
% 7.42/6.97             (ALL X76.
% 7.42/6.97                 bnd_ndr1_0 -->
% 7.42/6.97                 ((ALL X77.
% 7.42/6.97                      bnd_ndr1_1 X76 -->
% 7.42/6.97                      (bnd_c10_2 X76 X77 | ~ bnd_c5_2 X76 X77) |
% 7.42/6.97                      bnd_c2_2 X76 X77) |
% 7.42/6.97                  ~ bnd_c1_1 X76) |
% 7.42/6.97                 (ALL X78.
% 7.42/6.97                     bnd_ndr1_1 X76 -->
% 7.42/6.97                     bnd_c5_2 X76 X78 | ~ bnd_c8_2 X76 X78))) |
% 7.42/6.97            (ALL X79.
% 7.42/6.97                bnd_ndr1_0 -->
% 7.42/6.97                (bnd_c1_1 X79 | ~ bnd_c5_1 X79) |
% 7.42/6.97                (ALL X80.
% 7.42/6.97                    bnd_ndr1_1 X79 -->
% 7.42/6.97                    (~ bnd_c3_2 X79 X80 | ~ bnd_c7_2 X79 X80) |
% 7.42/6.97                    ~ bnd_c9_2 X79 X80)))) &
% 7.42/6.97          (((ALL X81.
% 7.42/6.97                bnd_ndr1_0 -->
% 7.42/6.97                ((bnd_ndr1_1 X81 & ~ bnd_c3_2 X81 bnd_a1689) &
% 7.42/6.97                 ~ bnd_c9_2 X81 bnd_a1689) &
% 7.42/6.97                bnd_c1_2 X81 bnd_a1689 |
% 7.42/6.97                ((bnd_ndr1_1 X81 & ~ bnd_c2_2 X81 bnd_a1690) &
% 7.42/6.97                 bnd_c7_2 X81 bnd_a1690) &
% 7.42/6.97                bnd_c6_2 X81 bnd_a1690) |
% 7.42/6.97            bnd_c8_0) |
% 7.42/6.97           bnd_c10_0)) &
% 7.42/6.97         (~ bnd_c3_0 | bnd_c2_0)) &
% 7.42/6.97        (((ALL X82.
% 7.42/6.97              bnd_ndr1_0 -->
% 7.42/6.97              (bnd_c8_1 X82 | bnd_c10_1 X82) | ~ bnd_c9_1 X82) |
% 7.42/6.97          bnd_c4_0) |
% 7.42/6.97         bnd_c7_0)) &
% 7.42/6.97       ((bnd_c6_0 |
% 7.42/6.97         (ALL X83.
% 7.42/6.97             bnd_ndr1_0 -->
% 7.42/6.97             ~ bnd_c5_1 X83 |
% 7.42/6.97             (ALL X84.
% 7.42/6.97                 bnd_ndr1_1 X83 -->
% 7.42/6.97                 (bnd_c1_2 X83 X84 | bnd_c2_2 X83 X84) |
% 7.42/6.97                 ~ bnd_c10_2 X83 X84))) |
% 7.42/6.97        ~ bnd_c5_0)) &
% 7.42/6.97      ((bnd_c4_0 |
% 7.42/6.97        (ALL X85.
% 7.42/6.97            bnd_ndr1_0 -->
% 7.42/6.97            (ALL X86.
% 7.42/6.97                bnd_ndr1_1 X85 -->
% 7.42/6.97                (bnd_c7_2 X85 X86 | ~ bnd_c4_2 X85 X86) |
% 7.42/6.97                ~ bnd_c8_2 X85 X86) |
% 7.42/6.97            bnd_c8_1 X85)) |
% 7.42/6.97       ((bnd_ndr1_0 &
% 7.42/6.97         (ALL X87.
% 7.42/6.97             bnd_ndr1_1 bnd_a1691 -->
% 7.42/6.97             (~ bnd_c7_2 bnd_a1691 X87 | ~ bnd_c9_2 bnd_a1691 X87) |
% 7.42/6.97             ~ bnd_c5_2 bnd_a1691 X87)) &
% 7.42/6.97        ~ bnd_c6_1 bnd_a1691) &
% 7.42/6.97       ~ bnd_c1_1 bnd_a1691)) &
% 7.42/6.97     (((((((bnd_ndr1_0 &
% 7.42/6.97            (ALL X88.
% 7.42/6.97                bnd_ndr1_1 bnd_a1692 -->
% 7.42/6.97                (bnd_c3_2 bnd_a1692 X88 | bnd_c9_2 bnd_a1692 X88) |
% 7.42/6.97                ~ bnd_c6_2 bnd_a1692 X88)) &
% 7.42/6.97           ~ bnd_c8_1 bnd_a1692) &
% 7.42/6.97          bnd_ndr1_1 bnd_a1692) &
% 7.42/6.97         bnd_c4_2 bnd_a1692 bnd_a1693) &
% 7.42/6.97        ~ bnd_c9_2 bnd_a1692 bnd_a1693) &
% 7.42/6.97       bnd_c10_2 bnd_a1692 bnd_a1693 |
% 7.42/6.97       ((bnd_ndr1_0 & bnd_c9_1 bnd_a1694) & ~ bnd_c6_1 bnd_a1694) &
% 7.42/6.97       (ALL X89.
% 7.42/6.97           bnd_ndr1_1 bnd_a1694 -->
% 7.42/6.97           (bnd_c6_2 bnd_a1694 X89 | ~ bnd_c8_2 bnd_a1694 X89) |
% 7.42/6.97           ~ bnd_c4_2 bnd_a1694 X89)) |
% 7.42/6.97      ((((((((bnd_ndr1_0 & ~ bnd_c9_1 bnd_a1695) & bnd_ndr1_1 bnd_a1695) &
% 7.42/6.97            bnd_c8_2 bnd_a1695 bnd_a1696) &
% 7.42/6.97           ~ bnd_c1_2 bnd_a1695 bnd_a1696) &
% 7.42/6.97          ~ bnd_c9_2 bnd_a1695 bnd_a1696) &
% 7.42/6.97         bnd_ndr1_1 bnd_a1695) &
% 7.42/6.97        ~ bnd_c2_2 bnd_a1695 bnd_a1697) &
% 7.42/6.97       bnd_c8_2 bnd_a1695 bnd_a1697) &
% 7.42/6.97      ~ bnd_c10_2 bnd_a1695 bnd_a1697)) &
% 7.42/6.97    ((bnd_c2_0 |
% 7.42/6.97      (ALL X90.
% 7.42/6.97          bnd_ndr1_0 --> (bnd_c10_1 X90 | ~ bnd_c3_1 X90) | bnd_c8_1 X90)) |
% 7.42/6.97     bnd_c3_0)) &
% 7.42/6.97   (((ALL X91.
% 7.42/6.97         bnd_ndr1_0 -->
% 7.42/6.97         (bnd_c7_1 X91 | bnd_c9_1 X91) |
% 7.42/6.97         (ALL X92.
% 7.42/6.97             bnd_ndr1_1 X91 -->
% 7.42/6.97             (bnd_c7_2 X91 X92 | bnd_c10_2 X91 X92) | bnd_c3_2 X91 X92)) |
% 7.42/6.97     (bnd_ndr1_0 & ~ bnd_c6_1 bnd_a1698) & ~ bnd_c3_1 bnd_a1698) |
% 7.42/6.97    (ALL X93.
% 7.42/6.97        bnd_ndr1_0 -->
% 7.42/6.97        (((bnd_ndr1_1 X93 & ~ bnd_c9_2 X93 bnd_a1699) &
% 7.42/6.97          ~ bnd_c8_2 X93 bnd_a1699) &
% 7.42/6.97         ~ bnd_c4_2 X93 bnd_a1699 |
% 7.42/6.97         ~ bnd_c8_1 X93) |
% 7.42/6.97        ~ bnd_c10_1 X93))) &
% 7.42/6.97  ((bnd_c1_0 |
% 7.42/6.97    (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1700) & bnd_c4_2 bnd_a1700 bnd_a1701) &
% 7.42/6.97       bnd_c9_2 bnd_a1700 bnd_a1701) &
% 7.42/6.97      ~ bnd_c7_2 bnd_a1700 bnd_a1701) &
% 7.42/6.97     (ALL X94.
% 7.42/6.97         bnd_ndr1_1 bnd_a1700 -->
% 7.42/6.97         (~ bnd_c3_2 bnd_a1700 X94 | ~ bnd_c10_2 bnd_a1700 X94) |
% 7.42/6.97         bnd_c6_2 bnd_a1700 X94)) &
% 7.42/6.97    ~ bnd_c7_1 bnd_a1700) |
% 7.42/6.97   ~ bnd_c10_0)) &
% 7.42/6.97                                       (((((((bnd_ndr1_0 &
% 7.42/6.97        (ALL X95.
% 7.42/6.97            bnd_ndr1_1 bnd_a1702 -->
% 7.42/6.97            (~ bnd_c8_2 bnd_a1702 X95 | bnd_c6_2 bnd_a1702 X95) |
% 7.42/6.97            bnd_c5_2 bnd_a1702 X95)) &
% 7.42/6.97       bnd_ndr1_1 bnd_a1702) &
% 7.42/6.97      bnd_c10_2 bnd_a1702 bnd_a1703) &
% 7.42/6.97     ~ bnd_c5_2 bnd_a1702 bnd_a1703) &
% 7.42/6.97    ~ bnd_c9_2 bnd_a1702 bnd_a1703) &
% 7.42/6.97   (ALL X96.
% 7.42/6.97       bnd_ndr1_1 bnd_a1702 -->
% 7.42/6.97       (~ bnd_c4_2 bnd_a1702 X96 | ~ bnd_c1_2 bnd_a1702 X96) |
% 7.42/6.97       bnd_c2_2 bnd_a1702 X96) |
% 7.42/6.97   ~ bnd_c7_0) |
% 7.42/6.97  ~ bnd_c6_0)) &
% 7.42/6.97                                      ((~ bnd_c9_0 | bnd_c3_0) | bnd_c2_0)) &
% 7.42/6.97                                     (((bnd_ndr1_0 &
% 7.42/6.97  (ALL X97.
% 7.42/6.97      bnd_ndr1_1 bnd_a1704 -->
% 7.42/6.97      (~ bnd_c5_2 bnd_a1704 X97 | ~ bnd_c6_2 bnd_a1704 X97) |
% 7.42/6.97      bnd_c3_2 bnd_a1704 X97)) &
% 7.42/6.97                                       bnd_c1_1 bnd_a1704 |
% 7.42/6.97                                       bnd_c1_0) |
% 7.42/6.97                                      bnd_c10_0)) &
% 7.42/6.97                                    (bnd_c5_0 | ~ bnd_c10_0)) &
% 7.42/6.97                                   ((~ bnd_c3_0 | ~ bnd_c5_0) |
% 7.42/6.97                                    ((bnd_ndr1_0 & ~ bnd_c3_1 bnd_a1705) &
% 7.42/6.97                                     ~ bnd_c9_1 bnd_a1705) &
% 7.42/6.97                                    ~ bnd_c1_1 bnd_a1705)) &
% 7.42/6.97                                  (((((((bnd_ndr1_0 & bnd_c4_1 bnd_a1706) &
% 7.42/6.97  (ALL X98.
% 7.42/6.97      bnd_ndr1_1 bnd_a1706 -->
% 7.42/6.97      (~ bnd_c2_2 bnd_a1706 X98 | ~ bnd_c5_2 bnd_a1706 X98) |
% 7.42/6.97      ~ bnd_c9_2 bnd_a1706 X98)) &
% 7.42/6.97                                       bnd_ndr1_1 bnd_a1706) &
% 7.42/6.97                                      bnd_c6_2 bnd_a1706 bnd_a1707) &
% 7.42/6.97                                     ~ bnd_c7_2 bnd_a1706 bnd_a1707) &
% 7.42/6.97                                    ~ bnd_c8_2 bnd_a1706 bnd_a1707 |
% 7.42/6.97                                    ((bnd_ndr1_0 &
% 7.42/6.97                                      (ALL X99.
% 7.42/6.97    bnd_ndr1_1 bnd_a1708 -->
% 7.42/6.97    (bnd_c6_2 bnd_a1708 X99 | ~ bnd_c4_2 bnd_a1708 X99) |
% 7.42/6.97    ~ bnd_c2_2 bnd_a1708 X99)) &
% 7.42/6.97                                     (ALL X100.
% 7.42/6.97   bnd_ndr1_1 bnd_a1708 -->
% 7.42/6.97   (bnd_c10_2 bnd_a1708 X100 | bnd_c4_2 bnd_a1708 X100) |
% 7.42/6.97   bnd_c1_2 bnd_a1708 X100)) &
% 7.42/6.97                                    (ALL X101.
% 7.42/6.97  bnd_ndr1_1 bnd_a1708 -->
% 7.42/6.97  (bnd_c9_2 bnd_a1708 X101 | bnd_c5_2 bnd_a1708 X101) |
% 7.42/6.97  bnd_c6_2 bnd_a1708 X101)) |
% 7.42/6.97                                   bnd_c1_0)) &
% 7.42/6.97                                 ((bnd_c2_0 | bnd_c3_0) |
% 7.42/6.97                                  (ALL X102.
% 7.42/6.97                                      bnd_ndr1_0 -->
% 7.42/6.97                                      (bnd_c7_1 X102 | bnd_c4_1 X102) |
% 7.42/6.97                                      bnd_c2_1 X102))) &
% 7.42/6.97                                (bnd_c9_0 | ~ bnd_c4_0)) &
% 7.42/6.97                               (((ALL X103.
% 7.42/6.97                                     bnd_ndr1_0 -->
% 7.42/6.97                                     (((bnd_ndr1_1 X103 &
% 7.42/6.97  ~ bnd_c5_2 X103 bnd_a1709) &
% 7.42/6.97                                       ~ bnd_c2_2 X103 bnd_a1709) &
% 7.42/6.97                                      bnd_c6_2 X103 bnd_a1709 |
% 7.42/6.97                                      bnd_c8_1 X103) |
% 7.42/6.97                                     bnd_c2_1 X103) |
% 7.42/6.97                                 (ALL X104.
% 7.42/6.97                                     bnd_ndr1_0 -->
% 7.42/6.97                                     (bnd_c8_1 X104 |
% 7.42/6.97                                      (bnd_ndr1_1 X104 &
% 7.42/6.97                                       bnd_c1_2 X104 bnd_a1710) &
% 7.42/6.97                                      bnd_c3_2 X104 bnd_a1710) |
% 7.42/6.97                                     bnd_c2_1 X104)) |
% 7.42/6.97                                ((bnd_ndr1_0 & bnd_c1_1 bnd_a1711) &
% 7.42/6.97                                 bnd_c9_1 bnd_a1711) &
% 7.42/6.97                                (ALL X105.
% 7.42/6.97                                    bnd_ndr1_1 bnd_a1711 -->
% 7.42/6.97                                    (~ bnd_c10_2 bnd_a1711 X105 |
% 7.42/6.97                                     ~ bnd_c3_2 bnd_a1711 X105) |
% 7.42/6.97                                    ~ bnd_c6_2 bnd_a1711 X105))) &
% 7.42/6.97                              ((bnd_c2_0 |
% 7.42/6.97                                (ALL X106.
% 7.42/6.97                                    bnd_ndr1_0 -->
% 7.42/6.97                                    ((ALL X107.
% 7.42/6.97   bnd_ndr1_1 X106 --> ~ bnd_c10_2 X106 X107 | bnd_c2_2 X106 X107) |
% 7.42/6.97                                     ~ bnd_c1_1 X106) |
% 7.42/6.97                                    ~ bnd_c2_1 X106)) |
% 7.42/6.97                               (ALL X108.
% 7.42/6.97                                   bnd_ndr1_0 -->
% 7.42/6.97                                   (~ bnd_c3_1 X108 |
% 7.42/6.97                                    (ALL X109.
% 7.42/6.97  bnd_ndr1_1 X108 --> bnd_c1_2 X108 X109 | ~ bnd_c2_2 X108 X109)) |
% 7.42/6.97                                   ~ bnd_c2_1 X108))) &
% 7.42/6.97                             (((((((bnd_ndr1_0 & bnd_c2_1 bnd_a1712) &
% 7.42/6.97                                   (ALL X110.
% 7.42/6.97                                       bnd_ndr1_1 bnd_a1712 -->
% 7.42/6.97                                       (~ bnd_c4_2 bnd_a1712 X110 |
% 7.42/6.97  ~ bnd_c1_2 bnd_a1712 X110) |
% 7.42/6.97                                       ~ bnd_c5_2 bnd_a1712 X110)) &
% 7.42/6.97                                  bnd_ndr1_1 bnd_a1712) &
% 7.42/6.97                                 ~ bnd_c7_2 bnd_a1712 bnd_a1713) &
% 7.42/6.97                                ~ bnd_c10_2 bnd_a1712 bnd_a1713) &
% 7.42/6.97                               bnd_c4_2 bnd_a1712 bnd_a1713 |
% 7.42/6.97                               bnd_c10_0) |
% 7.42/6.97                              (ALL X111.
% 7.42/6.97                                  bnd_ndr1_0 -->
% 7.42/6.97                                  (~ bnd_c10_1 X111 |
% 7.42/6.97                                   ((bnd_ndr1_1 X111 &
% 7.42/6.97                                     bnd_c4_2 X111 bnd_a1714) &
% 7.42/6.97                                    bnd_c3_2 X111 bnd_a1714) &
% 7.42/6.97                                   bnd_c2_2 X111 bnd_a1714) |
% 7.42/6.97                                  ~ bnd_c5_1 X111))) &
% 7.42/6.97                            ((bnd_c3_0 |
% 7.42/6.97                              (ALL X112.
% 7.42/6.97                                  bnd_ndr1_0 -->
% 7.42/6.97                                  ~ bnd_c10_1 X112 | ~ bnd_c9_1 X112)) |
% 7.42/6.97                             (ALL X113.
% 7.42/6.97                                 bnd_ndr1_0 -->
% 7.42/6.97                                 (((bnd_ndr1_1 X113 &
% 7.42/6.97                                    ~ bnd_c10_2 X113 bnd_a1715) &
% 7.42/6.97                                   bnd_c3_2 X113 bnd_a1715) &
% 7.42/6.97                                  ~ bnd_c8_2 X113 bnd_a1715 |
% 7.42/6.97                                  (ALL X114.
% 7.42/6.97                                      bnd_ndr1_1 X113 -->
% 7.42/6.97                                      (~ bnd_c1_2 X113 X114 |
% 7.42/6.97                                       ~ bnd_c4_2 X113 X114) |
% 7.42/6.97                                      ~ bnd_c3_2 X113 X114)) |
% 7.42/6.97                                 bnd_c9_1 X113))) &
% 7.42/6.97                           (((ALL X115.
% 7.42/6.97                                 bnd_ndr1_0 -->
% 7.42/6.97                                 ((ALL X116.
% 7.42/6.97                                      bnd_ndr1_1 X115 -->
% 7.42/6.97                                      ~ bnd_c3_2 X115 X116 |
% 7.42/6.97                                      bnd_c1_2 X115 X116) |
% 7.42/6.97                                  ((bnd_ndr1_1 X115 &
% 7.42/6.97                                    bnd_c7_2 X115 bnd_a1716) &
% 7.42/6.97                                   bnd_c10_2 X115 bnd_a1716) &
% 7.42/6.97                                  bnd_c8_2 X115 bnd_a1716) |
% 7.42/6.97                                 ~ bnd_c7_1 X115) |
% 7.42/6.97                             ~ bnd_c2_0) |
% 7.42/6.97                            (ALL X117.
% 7.42/6.97                                bnd_ndr1_0 -->
% 7.42/6.97                                (~ bnd_c8_1 X117 |
% 7.42/6.97                                 (bnd_ndr1_1 X117 &
% 7.42/6.97                                  ~ bnd_c9_2 X117 bnd_a1717) &
% 7.42/6.97                                 ~ bnd_c10_2 X117 bnd_a1717) |
% 7.42/6.97                                (ALL X118.
% 7.42/6.97                                    bnd_ndr1_1 X117 -->
% 7.42/6.97                                    (bnd_c6_2 X117 X118 |
% 7.42/6.97                                     ~ bnd_c10_2 X117 X118) |
% 7.42/6.97                                    bnd_c3_2 X117 X118)))) &
% 7.42/6.97                          ((~ bnd_c4_0 | bnd_c1_0) |
% 7.42/6.97                           (((((bnd_ndr1_0 & bnd_c2_1 bnd_a1718) &
% 7.42/6.97                               bnd_c6_1 bnd_a1718) &
% 7.42/6.97                              bnd_ndr1_1 bnd_a1718) &
% 7.42/6.97                             bnd_c7_2 bnd_a1718 bnd_a1719) &
% 7.42/6.97                            ~ bnd_c5_2 bnd_a1718 bnd_a1719) &
% 7.42/6.97                           bnd_c6_2 bnd_a1718 bnd_a1719)) &
% 7.42/6.97                         ((~ bnd_c4_0 | bnd_c3_0) | ~ bnd_c10_0)) &
% 7.42/6.97                        (((ALL X119.
% 7.42/6.97                              bnd_ndr1_0 -->
% 7.42/6.97                              (bnd_c9_1 X119 |
% 7.42/6.97                               (bnd_ndr1_1 X119 & bnd_c3_2 X119 bnd_a1720) &
% 7.42/6.97                               bnd_c2_2 X119 bnd_a1720) |
% 7.42/6.97                              (ALL X120.
% 7.42/6.97                                  bnd_ndr1_1 X119 -->
% 7.42/6.97                                  (bnd_c8_2 X119 X120 | bnd_c4_2 X119 X120) |
% 7.42/6.97                                  bnd_c10_2 X119 X120)) |
% 7.42/6.97                          (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1721) &
% 7.42/6.97                              ~ bnd_c8_2 bnd_a1721 bnd_a1722) &
% 7.42/6.97                             ~ bnd_c4_2 bnd_a1721 bnd_a1722) &
% 7.42/6.97                            ~ bnd_c2_2 bnd_a1721 bnd_a1722) &
% 7.42/6.97                           ~ bnd_c3_1 bnd_a1721) &
% 7.42/6.97                          (ALL X121.
% 7.42/6.97                              bnd_ndr1_1 bnd_a1721 -->
% 7.42/6.97                              (~ bnd_c9_2 bnd_a1721 X121 |
% 7.42/6.97                               ~ bnd_c5_2 bnd_a1721 X121) |
% 7.42/6.97                              bnd_c4_2 bnd_a1721 X121)) |
% 7.42/6.97                         (((((bnd_ndr1_0 & ~ bnd_c5_1 bnd_a1723) &
% 7.42/6.97                             (ALL X122.
% 7.42/6.97                                 bnd_ndr1_1 bnd_a1723 -->
% 7.42/6.97                                 (bnd_c6_2 bnd_a1723 X122 |
% 7.42/6.97                                  ~ bnd_c3_2 bnd_a1723 X122) |
% 7.42/6.97                                 bnd_c9_2 bnd_a1723 X122)) &
% 7.42/6.97                            bnd_ndr1_1 bnd_a1723) &
% 7.42/6.97                           bnd_c9_2 bnd_a1723 bnd_a1724) &
% 7.42/6.97                          bnd_c5_2 bnd_a1723 bnd_a1724) &
% 7.42/6.97                         bnd_c7_2 bnd_a1723 bnd_a1724)) &
% 7.42/6.97                       (((bnd_ndr1_0 & ~ bnd_c8_1 bnd_a1725) &
% 7.42/6.97                         ~ bnd_c3_1 bnd_a1725) &
% 7.42/6.97                        bnd_c9_1 bnd_a1725 |
% 7.42/6.97                        (ALL X123.
% 7.42/6.97                            bnd_ndr1_0 -->
% 7.42/6.97                            (bnd_c3_1 X123 | ~ bnd_c10_1 X123) |
% 7.42/6.97                            ~ bnd_c9_1 X123))) &
% 7.42/6.97                      ((ALL X124.
% 7.42/6.97                           bnd_ndr1_0 -->
% 7.42/6.97                           (~ bnd_c6_1 X124 | bnd_c9_1 X124) |
% 7.42/6.97                           ~ bnd_c5_1 X124) |
% 7.42/6.97                       (((((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a1726) &
% 7.42/6.97                           bnd_ndr1_1 bnd_a1726) &
% 7.42/6.97                          bnd_c4_2 bnd_a1726 bnd_a1727) &
% 7.42/6.97                         ~ bnd_c7_2 bnd_a1726 bnd_a1727) &
% 7.42/6.97                        bnd_c3_2 bnd_a1726 bnd_a1727) &
% 7.42/6.97                       (ALL X125.
% 7.42/6.97                           bnd_ndr1_1 bnd_a1726 -->
% 7.42/6.97                           (~ bnd_c2_2 bnd_a1726 X125 |
% 7.42/6.97                            ~ bnd_c4_2 bnd_a1726 X125) |
% 7.42/6.97                           ~ bnd_c8_2 bnd_a1726 X125))) &
% 7.42/6.97                     ((bnd_c5_0 | ~ bnd_c7_0) | ~ bnd_c3_0)) &
% 7.42/6.97                    (((ALL X126.
% 7.42/6.97                          bnd_ndr1_0 -->
% 7.42/6.97                          (((bnd_ndr1_1 X126 & ~ bnd_c3_2 X126 bnd_a1728) &
% 7.42/6.97                            ~ bnd_c9_2 X126 bnd_a1728) &
% 7.42/6.97                           bnd_c5_2 X126 bnd_a1728 |
% 7.42/6.97                           bnd_c1_1 X126) |
% 7.42/6.97                          (ALL X127.
% 7.42/6.97                              bnd_ndr1_1 X126 -->
% 7.42/6.97                              (bnd_c2_2 X126 X127 | ~ bnd_c7_2 X126 X127) |
% 7.42/6.97                              bnd_c1_2 X126 X127)) |
% 7.42/6.97                      ((bnd_ndr1_0 & bnd_c5_1 bnd_a1729) &
% 7.42/6.97                       bnd_c3_1 bnd_a1729) &
% 7.42/6.97                      ~ bnd_c9_1 bnd_a1729) |
% 7.42/6.97                     (((((bnd_ndr1_0 & ~ bnd_c6_1 bnd_a1730) &
% 7.42/6.97                         bnd_ndr1_1 bnd_a1730) &
% 7.42/6.97                        bnd_c9_2 bnd_a1730 bnd_a1731) &
% 7.42/6.97                       bnd_c5_2 bnd_a1730 bnd_a1731) &
% 7.42/6.97                      bnd_c4_2 bnd_a1730 bnd_a1731) &
% 7.42/6.97                     (ALL X128.
% 7.42/6.97                         bnd_ndr1_1 bnd_a1730 -->
% 7.42/6.97                         (~ bnd_c2_2 bnd_a1730 X128 |
% 7.42/6.97                          bnd_c4_2 bnd_a1730 X128) |
% 7.42/6.97                         bnd_c1_2 bnd_a1730 X128))) &
% 7.42/6.97                   ((bnd_c2_0 | bnd_c10_0) |
% 7.42/6.97                    (ALL X129.
% 7.42/6.97                        bnd_ndr1_0 -->
% 7.42/6.97                        ((ALL X130.
% 7.42/6.97                             bnd_ndr1_1 X129 -->
% 7.42/6.97                             (~ bnd_c10_2 X129 X130 | bnd_c3_2 X129 X130) |
% 7.42/6.97                             ~ bnd_c6_2 X129 X130) |
% 7.42/6.97                         ~ bnd_c10_1 X129) |
% 7.42/6.97                        ((bnd_ndr1_1 X129 & bnd_c9_2 X129 bnd_a1732) &
% 7.42/6.97                         ~ bnd_c8_2 X129 bnd_a1732) &
% 7.42/6.97                        bnd_c4_2 X129 bnd_a1732))) &
% 7.42/6.97                  ((((((((((bnd_ndr1_0 & ~ bnd_c7_1 bnd_a1733) &
% 7.42/6.97                           bnd_ndr1_1 bnd_a1733) &
% 7.42/6.97                          bnd_c7_2 bnd_a1733 bnd_a1734) &
% 7.42/6.97                         ~ bnd_c6_2 bnd_a1733 bnd_a1734) &
% 7.42/6.97                        bnd_c8_2 bnd_a1733 bnd_a1734) &
% 7.42/6.97                       bnd_ndr1_1 bnd_a1733) &
% 7.42/6.97                      bnd_c5_2 bnd_a1733 bnd_a1735) &
% 7.42/6.97                     bnd_c1_2 bnd_a1733 bnd_a1735) &
% 7.42/6.97                    bnd_c9_2 bnd_a1733 bnd_a1735 |
% 7.42/6.97                    ((bnd_ndr1_0 & bnd_c6_1 bnd_a1736) &
% 7.42/6.97                     ~ bnd_c1_1 bnd_a1736) &
% 7.42/6.97                    ~ bnd_c8_1 bnd_a1736) |
% 7.42/6.97                   (ALL X131.
% 7.42/6.97                       bnd_ndr1_0 -->
% 7.42/6.97                       (~ bnd_c10_1 X131 |
% 7.42/6.97                        (bnd_ndr1_1 X131 & ~ bnd_c10_2 X131 bnd_a1737) &
% 7.42/6.97                        bnd_c8_2 X131 bnd_a1737) |
% 7.42/6.97                       ((bnd_ndr1_1 X131 & bnd_c9_2 X131 bnd_a1738) &
% 7.42/6.97                        ~ bnd_c4_2 X131 bnd_a1738) &
% 7.42/6.97                       ~ bnd_c2_2 X131 bnd_a1738))) &
% 7.42/6.97                 ((~ bnd_c9_0 | bnd_c3_0) |
% 7.42/6.97                  ((bnd_ndr1_0 & bnd_c7_1 bnd_a1739) & bnd_c2_1 bnd_a1739) &
% 7.42/6.97                  bnd_c6_1 bnd_a1739)) &
% 7.42/6.97                ((bnd_c4_0 | ~ bnd_c7_0) |
% 7.42/6.97                 (ALL X132.
% 7.42/6.97                     bnd_ndr1_0 -->
% 7.42/6.97                     (~ bnd_c8_1 X132 | ~ bnd_c2_1 X132) |
% 7.42/6.97                     (ALL X133.
% 7.42/6.97                         bnd_ndr1_1 X132 -->
% 7.42/6.97                         (~ bnd_c6_2 X132 X133 | bnd_c7_2 X132 X133) |
% 7.42/6.97                         bnd_c10_2 X132 X133)))) &
% 7.42/6.97               (~ bnd_c8_0 | bnd_c3_0)) &
% 7.42/6.97              (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1740) &
% 7.42/6.97                    ~ bnd_c4_2 bnd_a1740 bnd_a1741) &
% 7.42/6.97                   bnd_c10_2 bnd_a1740 bnd_a1741) &
% 7.42/6.97                  bnd_c7_2 bnd_a1740 bnd_a1741) &
% 7.42/6.97                 ~ bnd_c1_1 bnd_a1740) &
% 7.42/6.97                bnd_c2_1 bnd_a1740 |
% 7.42/6.97                ~ bnd_c10_0) |
% 7.42/6.97               (ALL X134.
% 7.42/6.97                   bnd_ndr1_0 -->
% 7.42/6.97                   (((bnd_ndr1_1 X134 & bnd_c7_2 X134 bnd_a1742) &
% 7.42/6.97                     bnd_c2_2 X134 bnd_a1742) &
% 7.42/6.97                    bnd_c8_2 X134 bnd_a1742 |
% 7.42/6.97                    ~ bnd_c10_1 X134) |
% 7.42/6.97                   ~ bnd_c4_1 X134))) &
% 7.42/6.97             (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1743) &
% 7.42/6.97                   ~ bnd_c1_2 bnd_a1743 bnd_a1744) &
% 7.42/6.97                  bnd_c2_2 bnd_a1743 bnd_a1744) &
% 7.42/6.97                 bnd_c8_2 bnd_a1743 bnd_a1744) &
% 7.42/6.97                (ALL X135.
% 7.42/6.97                    bnd_ndr1_1 bnd_a1743 -->
% 7.42/6.97                    (~ bnd_c1_2 bnd_a1743 X135 | bnd_c8_2 bnd_a1743 X135) |
% 7.42/6.97                    ~ bnd_c5_2 bnd_a1743 X135)) &
% 7.42/6.97               (ALL X136.
% 7.42/6.97                   bnd_ndr1_1 bnd_a1743 -->
% 7.42/6.97                   (~ bnd_c3_2 bnd_a1743 X136 | bnd_c4_2 bnd_a1743 X136) |
% 7.42/6.97                   bnd_c2_2 bnd_a1743 X136) |
% 7.42/6.97               (((((bnd_ndr1_0 &
% 7.42/6.97                    (ALL X137.
% 7.42/6.97                        bnd_ndr1_1 bnd_a1745 -->
% 7.42/6.97                        (~ bnd_c8_2 bnd_a1745 X137 |
% 7.42/6.97                         bnd_c4_2 bnd_a1745 X137) |
% 7.42/6.97                        ~ bnd_c6_2 bnd_a1745 X137)) &
% 7.42/6.97                   bnd_ndr1_1 bnd_a1745) &
% 7.42/6.97                  bnd_c1_2 bnd_a1745 bnd_a1746) &
% 7.42/6.97                 ~ bnd_c6_2 bnd_a1745 bnd_a1746) &
% 7.42/6.97                ~ bnd_c4_2 bnd_a1745 bnd_a1746) &
% 7.42/6.97               ~ bnd_c8_1 bnd_a1745) |
% 7.42/6.97              ~ bnd_c10_0)) &
% 7.42/6.97            ((~ bnd_c6_0 |
% 7.42/6.97              (ALL X138.
% 7.42/6.97                  bnd_ndr1_0 -->
% 7.42/6.97                  (bnd_ndr1_1 X138 & ~ bnd_c1_2 X138 bnd_a1747 |
% 7.42/6.97                   bnd_c5_1 X138) |
% 7.42/6.97                  ~ bnd_c2_1 X138)) |
% 7.42/6.97             ((bnd_ndr1_0 &
% 7.42/6.97               (ALL X139.
% 7.42/6.97                   bnd_ndr1_1 bnd_a1748 -->
% 7.42/6.97                   ~ bnd_c1_2 bnd_a1748 X139 | bnd_c2_2 bnd_a1748 X139)) &
% 7.42/6.97              bnd_c4_1 bnd_a1748) &
% 7.42/6.97             bnd_c8_1 bnd_a1748)) &
% 7.42/6.97           (((ALL X140.
% 7.42/6.97                 bnd_ndr1_0 -->
% 7.42/6.97                 (((bnd_ndr1_1 X140 & bnd_c8_2 X140 bnd_a1749) &
% 7.42/6.97                   ~ bnd_c7_2 X140 bnd_a1749) &
% 7.42/6.97                  bnd_c5_2 X140 bnd_a1749 |
% 7.42/6.97                  bnd_c2_1 X140) |
% 7.42/6.97                 (ALL X141.
% 7.42/6.97                     bnd_ndr1_1 X140 -->
% 7.42/6.97                     ~ bnd_c1_2 X140 X141 | ~ bnd_c8_2 X140 X141)) |
% 7.42/6.97             ((bnd_ndr1_0 & bnd_c6_1 bnd_a1750) &
% 7.42/6.97              (ALL X142.
% 7.42/6.97                  bnd_ndr1_1 bnd_a1750 -->
% 7.42/6.97                  (bnd_c2_2 bnd_a1750 X142 | ~ bnd_c10_2 bnd_a1750 X142) |
% 7.42/6.97                  ~ bnd_c8_2 bnd_a1750 X142)) &
% 7.42/6.97             (ALL X143.
% 7.42/6.97                 bnd_ndr1_1 bnd_a1750 -->
% 7.42/6.97                 (~ bnd_c9_2 bnd_a1750 X143 | ~ bnd_c3_2 bnd_a1750 X143) |
% 7.42/6.97                 ~ bnd_c7_2 bnd_a1750 X143)) |
% 7.42/6.97            ~ bnd_c10_0)) &
% 7.42/6.97          ((~ bnd_c10_0 | ~ bnd_c1_0) |
% 7.42/6.97           (ALL X144.
% 7.42/6.97               bnd_ndr1_0 -->
% 7.42/6.97               (~ bnd_c3_1 X144 |
% 7.42/6.97                (ALL X145.
% 7.42/6.97                    bnd_ndr1_1 X144 -->
% 7.42/6.97                    (bnd_c4_2 X144 X145 | bnd_c2_2 X144 X145) |
% 7.42/6.97                    bnd_c5_2 X144 X145)) |
% 7.42/6.97               ((bnd_ndr1_1 X144 & ~ bnd_c1_2 X144 bnd_a1751) &
% 7.42/6.97                bnd_c7_2 X144 bnd_a1751) &
% 7.42/6.97               ~ bnd_c10_2 X144 bnd_a1751))) &
% 7.42/6.97         ((bnd_c1_0 | ~ bnd_c3_0) |
% 7.42/6.97          ((bnd_ndr1_0 &
% 7.42/6.97            (ALL X146.
% 7.42/6.97                bnd_ndr1_1 bnd_a1752 -->
% 7.42/6.97                (~ bnd_c6_2 bnd_a1752 X146 | bnd_c2_2 bnd_a1752 X146) |
% 7.42/6.97                ~ bnd_c1_2 bnd_a1752 X146)) &
% 7.42/6.97           ~ bnd_c8_1 bnd_a1752) &
% 7.42/6.97          ~ bnd_c9_1 bnd_a1752)) &
% 7.42/6.97        (((ALL X147.
% 7.42/6.97              bnd_ndr1_0 -->
% 7.42/6.97              (bnd_c9_1 X147 |
% 7.42/6.97               ((bnd_ndr1_1 X147 & bnd_c8_2 X147 bnd_a1753) &
% 7.42/6.97                ~ bnd_c4_2 X147 bnd_a1753) &
% 7.42/6.97               bnd_c6_2 X147 bnd_a1753) |
% 7.42/6.97              (ALL X148.
% 7.42/6.97                  bnd_ndr1_1 X147 -->
% 7.42/6.97                  (~ bnd_c7_2 X147 X148 | ~ bnd_c3_2 X147 X148) |
% 7.42/6.97                  ~ bnd_c6_2 X147 X148)) |
% 7.42/6.97          (ALL X149.
% 7.42/6.97              bnd_ndr1_0 -->
% 7.42/6.97              (~ bnd_c7_1 X149 |
% 7.42/6.97               ((bnd_ndr1_1 X149 & bnd_c4_2 X149 bnd_a1754) &
% 7.42/6.97                bnd_c8_2 X149 bnd_a1754) &
% 7.42/6.97               bnd_c2_2 X149 bnd_a1754) |
% 7.42/6.97              ((bnd_ndr1_1 X149 & bnd_c2_2 X149 bnd_a1755) &
% 7.42/6.97               bnd_c10_2 X149 bnd_a1755) &
% 7.42/6.97              bnd_c1_2 X149 bnd_a1755)) |
% 7.42/6.97         (ALL X150.
% 7.42/6.97             bnd_ndr1_0 -->
% 7.42/6.97             (~ bnd_c10_1 X150 | ~ bnd_c1_1 X150) | ~ bnd_c9_1 X150))) &
% 7.42/6.97       ((bnd_c1_0 | ~ bnd_c2_0) | bnd_c9_0)) &
% 7.42/6.97      ((bnd_c9_0 |
% 7.42/6.97        (((((bnd_ndr1_0 & bnd_c4_1 bnd_a1756) & bnd_ndr1_1 bnd_a1756) &
% 7.42/6.97           ~ bnd_c2_2 bnd_a1756 bnd_a1757) &
% 7.42/6.97          bnd_c7_2 bnd_a1756 bnd_a1757) &
% 7.42/6.97         ~ bnd_c6_2 bnd_a1756 bnd_a1757) &
% 7.42/6.97        bnd_c2_1 bnd_a1756) |
% 7.42/6.97       (((((bnd_ndr1_0 & ~ bnd_c3_1 bnd_a1758) &
% 7.42/6.97           (ALL X151.
% 7.42/6.97               bnd_ndr1_1 bnd_a1758 -->
% 7.42/6.97               (~ bnd_c4_2 bnd_a1758 X151 | bnd_c6_2 bnd_a1758 X151) |
% 7.42/6.97               ~ bnd_c7_2 bnd_a1758 X151)) &
% 7.42/6.97          bnd_ndr1_1 bnd_a1758) &
% 7.42/6.97         bnd_c3_2 bnd_a1758 bnd_a1759) &
% 7.42/6.97        ~ bnd_c2_2 bnd_a1758 bnd_a1759) &
% 7.42/6.97       ~ bnd_c10_2 bnd_a1758 bnd_a1759)) &
% 7.42/6.97     ((bnd_c9_0 | ~ bnd_c5_0) |
% 7.42/6.97      (ALL X152.
% 7.42/6.97          bnd_ndr1_0 -->
% 7.42/6.97          (~ bnd_c1_1 X152 | ~ bnd_c9_1 X152) |
% 7.42/6.97          ((bnd_ndr1_1 X152 & ~ bnd_c10_2 X152 bnd_a1760) &
% 7.42/6.97           ~ bnd_c4_2 X152 bnd_a1760) &
% 7.42/6.97          ~ bnd_c8_2 X152 bnd_a1760))) &
% 7.42/6.97    (((ALL X153.
% 7.42/6.97          bnd_ndr1_0 -->
% 7.42/6.97          ((ALL X154.
% 7.42/6.97               bnd_ndr1_1 X153 -->
% 7.42/6.97               (~ bnd_c6_2 X153 X154 | bnd_c9_2 X153 X154) |
% 7.42/6.97               bnd_c4_2 X153 X154) |
% 7.42/6.97           ((bnd_ndr1_1 X153 & ~ bnd_c3_2 X153 bnd_a1761) &
% 7.42/6.97            bnd_c5_2 X153 bnd_a1761) &
% 7.42/6.97           ~ bnd_c8_2 X153 bnd_a1761) |
% 7.42/6.97          (ALL X155.
% 7.42/6.97              bnd_ndr1_1 X153 -->
% 7.42/6.97              bnd_c10_2 X153 X155 | ~ bnd_c3_2 X153 X155)) |
% 7.42/6.97      (ALL X156.
% 7.42/6.97          bnd_ndr1_0 -->
% 7.42/6.97          (((bnd_ndr1_1 X156 & ~ bnd_c2_2 X156 bnd_a1762) &
% 7.42/6.97            bnd_c3_2 X156 bnd_a1762) &
% 7.42/6.97           ~ bnd_c10_2 X156 bnd_a1762 |
% 7.42/6.97           ~ bnd_c10_1 X156) |
% 7.42/6.97          ((bnd_ndr1_1 X156 & ~ bnd_c4_2 X156 bnd_a1763) &
% 7.42/6.97           ~ bnd_c7_2 X156 bnd_a1763) &
% 7.42/6.97          bnd_c6_2 X156 bnd_a1763)) |
% 7.42/6.97     (ALL X157.
% 7.42/6.97         bnd_ndr1_0 --> (bnd_c7_1 X157 | bnd_c4_1 X157) | ~ bnd_c1_1 X157))) &
% 7.42/6.97   ((~ bnd_c3_0 | ~ bnd_c5_0) |
% 7.42/6.97    (ALL X158.
% 7.42/6.97        bnd_ndr1_0 -->
% 7.42/6.97        ((ALL X159.
% 7.42/6.97             bnd_ndr1_1 X158 -->
% 7.42/6.97             (~ bnd_c6_2 X158 X159 | ~ bnd_c3_2 X158 X159) |
% 7.42/6.97             bnd_c1_2 X158 X159) |
% 7.42/6.97         ((bnd_ndr1_1 X158 & bnd_c4_2 X158 bnd_a1764) &
% 7.42/6.97          bnd_c2_2 X158 bnd_a1764) &
% 7.42/6.97         bnd_c9_2 X158 bnd_a1764) |
% 7.42/6.97        ((bnd_ndr1_1 X158 & ~ bnd_c3_2 X158 bnd_a1765) &
% 7.42/6.97         ~ bnd_c4_2 X158 bnd_a1765) &
% 7.42/6.97        ~ bnd_c9_2 X158 bnd_a1765))) &
% 7.42/6.97  (((ALL X160.
% 7.42/6.97        bnd_ndr1_0 -->
% 7.42/6.97        ((bnd_ndr1_1 X160 & ~ bnd_c4_2 X160 bnd_a1766) &
% 7.42/6.97         ~ bnd_c7_2 X160 bnd_a1766) &
% 7.42/6.97        bnd_c9_2 X160 bnd_a1766 |
% 7.42/6.97        bnd_c3_1 X160) |
% 7.42/6.97    bnd_c7_0) |
% 7.42/6.97   (ALL X161.
% 7.42/6.97       bnd_ndr1_0 -->
% 7.42/6.97       ((ALL X162.
% 7.42/6.97            bnd_ndr1_1 X161 -->
% 7.42/6.97            (~ bnd_c5_2 X161 X162 | ~ bnd_c9_2 X161 X162) |
% 7.42/6.97            ~ bnd_c10_2 X161 X162) |
% 7.42/6.97        (ALL X163.
% 7.42/6.97            bnd_ndr1_1 X161 --> ~ bnd_c3_2 X161 X163 | bnd_c9_2 X161 X163)) |
% 7.42/6.97       (ALL X164.
% 7.42/6.97           bnd_ndr1_1 X161 -->
% 7.42/6.97           (~ bnd_c9_2 X161 X164 | ~ bnd_c6_2 X161 X164) |
% 7.42/6.97           bnd_c4_2 X161 X164)))) &
% 7.42/6.97                                       bnd_ndr1_0) &
% 7.42/6.97                                      ~ bnd_c7_1 bnd_a1767) &
% 7.42/6.97                                     ~ bnd_c5_1 bnd_a1767) &
% 7.42/6.97                                    (((ALL X165.
% 7.42/6.97    bnd_ndr1_0 --> (~ bnd_c1_1 X165 | ~ bnd_c7_1 X165) | bnd_c4_1 X165) |
% 7.42/6.97                                      ~ bnd_c3_0) |
% 7.42/6.97                                     (ALL X166.
% 7.42/6.97   bnd_ndr1_0 --> (bnd_c8_1 X166 | ~ bnd_c5_1 X166) | ~ bnd_c9_1 X166))) &
% 7.42/6.97                                   (((ALL X167.
% 7.42/6.97   bnd_ndr1_0 -->
% 7.42/6.97   (bnd_c8_1 X167 |
% 7.42/6.97    ((bnd_ndr1_1 X167 & ~ bnd_c5_2 X167 bnd_a1768) &
% 7.42/6.97     bnd_c3_2 X167 bnd_a1768) &
% 7.42/6.97    ~ bnd_c2_2 X167 bnd_a1768) |
% 7.42/6.97   bnd_c4_1 X167) |
% 7.42/6.97                                     ~ bnd_c10_0) |
% 7.42/6.97                                    (ALL X168.
% 7.42/6.97  bnd_ndr1_0 --> (bnd_c7_1 X168 | bnd_c10_1 X168) | bnd_c3_1 X168))) &
% 7.42/6.97                                  ((ALL X169.
% 7.42/6.97                                       bnd_ndr1_0 -->
% 7.42/6.97                                       (bnd_c7_1 X169 |
% 7.42/6.97  ((bnd_ndr1_1 X169 & bnd_c8_2 X169 bnd_a1769) & bnd_c10_2 X169 bnd_a1769) &
% 7.42/6.97  ~ bnd_c7_2 X169 bnd_a1769) |
% 7.42/6.97                                       bnd_c9_1 X169) |
% 7.42/6.97                                   bnd_c5_0)) &
% 7.42/6.97                                 bnd_c7_0) &
% 7.42/6.97                                (bnd_c2_0 |
% 7.42/6.97                                 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1770) &
% 7.42/6.97                                     ~ bnd_c2_2 bnd_a1770 bnd_a1771) &
% 7.42/6.97                                    ~ bnd_c6_2 bnd_a1770 bnd_a1771) &
% 7.42/6.97                                   bnd_c9_2 bnd_a1770 bnd_a1771) &
% 7.42/6.97                                  ~ bnd_c5_1 bnd_a1770) &
% 7.42/6.97                                 (ALL X170.
% 7.42/6.97                                     bnd_ndr1_1 bnd_a1770 -->
% 7.42/6.97                                     (bnd_c6_2 bnd_a1770 X170 |
% 7.42/6.97                                      ~ bnd_c9_2 bnd_a1770 X170) |
% 7.42/6.97                                     ~ bnd_c1_2 bnd_a1770 X170))) &
% 7.42/6.97                               (((ALL X171.
% 7.42/6.97                                     bnd_ndr1_0 -->
% 7.42/6.97                                     ((ALL X172.
% 7.42/6.97    bnd_ndr1_1 X171 -->
% 7.42/6.97    (bnd_c10_2 X171 X172 | ~ bnd_c2_2 X171 X172) | bnd_c9_2 X171 X172) |
% 7.42/6.97                                      ((bnd_ndr1_1 X171 &
% 7.42/6.97  bnd_c3_2 X171 bnd_a1772) &
% 7.42/6.97                                       ~ bnd_c2_2 X171 bnd_a1772) &
% 7.42/6.97                                      ~ bnd_c6_2 X171 bnd_a1772) |
% 7.42/6.97                                     (ALL X173.
% 7.42/6.97   bnd_ndr1_1 X171 --> ~ bnd_c1_2 X171 X173 | ~ bnd_c8_2 X171 X173)) |
% 7.42/6.97                                 (ALL X174.
% 7.42/6.97                                     bnd_ndr1_0 -->
% 7.42/6.97                                     (((bnd_ndr1_1 X174 &
% 7.42/6.97  bnd_c5_2 X174 bnd_a1773) &
% 7.42/6.97                                       ~ bnd_c4_2 X174 bnd_a1773) &
% 7.42/6.97                                      bnd_c2_2 X174 bnd_a1773 |
% 7.42/6.97                                      ((bnd_ndr1_1 X174 &
% 7.42/6.97  bnd_c2_2 X174 bnd_a1774) &
% 7.42/6.97                                       ~ bnd_c3_2 X174 bnd_a1774) &
% 7.42/6.97                                      bnd_c7_2 X174 bnd_a1774) |
% 7.42/6.97                                     (ALL X175.
% 7.42/6.97   bnd_ndr1_1 X174 -->
% 7.42/6.97   (~ bnd_c3_2 X174 X175 | bnd_c6_2 X174 X175) | bnd_c5_2 X174 X175))) |
% 7.42/6.97                                (ALL X176.
% 7.42/6.97                                    bnd_ndr1_0 -->
% 7.42/6.97                                    (((bnd_ndr1_1 X176 &
% 7.42/6.97                                       ~ bnd_c7_2 X176 bnd_a1775) &
% 7.42/6.97                                      ~ bnd_c9_2 X176 bnd_a1775) &
% 7.42/6.97                                     ~ bnd_c8_2 X176 bnd_a1775 |
% 7.42/6.97                                     ~ bnd_c6_1 X176) |
% 7.42/6.97                                    ((bnd_ndr1_1 X176 &
% 7.42/6.97                                      bnd_c5_2 X176 bnd_a1776) &
% 7.42/6.97                                     ~ bnd_c9_2 X176 bnd_a1776) &
% 7.42/6.97                                    ~ bnd_c3_2 X176 bnd_a1776))) &
% 7.42/6.97                              (((ALL X177.
% 7.42/6.97                                    bnd_ndr1_0 -->
% 7.42/6.97                                    (((bnd_ndr1_1 X177 &
% 7.42/6.97                                       bnd_c3_2 X177 bnd_a1777) &
% 7.42/6.97                                      ~ bnd_c2_2 X177 bnd_a1777) &
% 7.42/6.97                                     ~ bnd_c8_2 X177 bnd_a1777 |
% 7.42/6.97                                     bnd_c2_1 X177) |
% 7.42/6.97                                    ((bnd_ndr1_1 X177 &
% 7.42/6.97                                      ~ bnd_c3_2 X177 bnd_a1778) &
% 7.42/6.97                                     ~ bnd_c7_2 X177 bnd_a1778) &
% 7.42/6.97                                    ~ bnd_c5_2 X177 bnd_a1778) |
% 7.42/6.97                                ~ bnd_c4_0) |
% 7.42/6.97                               (ALL X178.
% 7.42/6.97                                   bnd_ndr1_0 -->
% 7.42/6.97                                   (~ bnd_c6_1 X178 | bnd_c7_1 X178) |
% 7.42/6.97                                   (ALL X179.
% 7.42/6.97                                       bnd_ndr1_1 X178 -->
% 7.42/6.97                                       (~ bnd_c4_2 X178 X179 |
% 7.42/6.97  ~ bnd_c8_2 X178 X179) |
% 7.42/6.97                                       bnd_c1_2 X178 X179)))) &
% 7.42/6.97                             ((~ bnd_c2_0 |
% 7.42/6.97                               ((bnd_ndr1_0 & ~ bnd_c8_1 bnd_a1779) &
% 7.42/6.97                                ~ bnd_c2_1 bnd_a1779) &
% 7.42/6.97                               ~ bnd_c7_1 bnd_a1779) |
% 7.42/6.97                              bnd_c9_0)) &
% 7.42/6.97                            ((ALL X180.
% 7.42/6.97                                 bnd_ndr1_0 -->
% 7.42/6.97                                 ((ALL X181.
% 7.42/6.97                                      bnd_ndr1_1 X180 -->
% 7.42/6.97                                      (~ bnd_c2_2 X180 X181 |
% 7.42/6.97                                       ~ bnd_c3_2 X180 X181) |
% 7.42/6.97                                      bnd_c9_2 X180 X181) |
% 7.42/6.97                                  ((bnd_ndr1_1 X180 &
% 7.42/6.97                                    bnd_c6_2 X180 bnd_a1780) &
% 7.42/6.97                                   bnd_c7_2 X180 bnd_a1780) &
% 7.42/6.97                                  bnd_c3_2 X180 bnd_a1780) |
% 7.42/6.97                                 ~ bnd_c4_1 X180) |
% 7.42/6.97                             ~ bnd_c10_0)) &
% 7.42/6.97                           (((ALL X182.
% 7.42/6.97                                 bnd_ndr1_0 -->
% 7.42/6.97                                 bnd_c2_1 X182 |
% 7.42/6.97                                 (ALL X183.
% 7.42/6.97                                     bnd_ndr1_1 X182 -->
% 7.42/6.97                                     (~ bnd_c7_2 X182 X183 |
% 7.42/6.97                                      ~ bnd_c6_2 X182 X183) |
% 7.42/6.97                                     bnd_c1_2 X182 X183)) |
% 7.42/6.97                             (((((bnd_ndr1_0 &
% 7.42/6.97                                  (ALL X184.
% 7.42/6.97                                      bnd_ndr1_1 bnd_a1781 -->
% 7.42/6.97                                      bnd_c5_2 bnd_a1781 X184 |
% 7.42/6.97                                      bnd_c3_2 bnd_a1781 X184)) &
% 7.42/6.97                                 bnd_c2_1 bnd_a1781) &
% 7.42/6.97                                bnd_ndr1_1 bnd_a1781) &
% 7.42/6.97                               bnd_c2_2 bnd_a1781 bnd_a1782) &
% 7.42/6.97                              ~ bnd_c9_2 bnd_a1781 bnd_a1782) &
% 7.42/6.97                             bnd_c7_2 bnd_a1781 bnd_a1782) |
% 7.42/6.97                            (ALL X185.
% 7.42/6.97                                bnd_ndr1_0 -->
% 7.42/6.97                                (~ bnd_c6_1 X185 | bnd_c7_1 X185) |
% 7.42/6.97                                (ALL X186.
% 7.42/6.97                                    bnd_ndr1_1 X185 -->
% 7.42/6.97                                    (bnd_c10_2 X185 X186 |
% 7.42/6.97                                     bnd_c2_2 X185 X186) |
% 7.42/6.97                                    bnd_c1_2 X185 X186)))) &
% 7.42/6.97                          ((((bnd_ndr1_0 &
% 7.42/6.97                              (ALL X187.
% 7.42/6.97                                  bnd_ndr1_1 bnd_a1783 -->
% 7.42/6.97                                  (bnd_c4_2 bnd_a1783 X187 |
% 7.42/6.97                                   bnd_c2_2 bnd_a1783 X187) |
% 7.42/6.97                                  ~ bnd_c8_2 bnd_a1783 X187)) &
% 7.42/6.97                             (ALL X188.
% 7.42/6.97                                 bnd_ndr1_1 bnd_a1783 -->
% 7.42/6.97                                 (~ bnd_c2_2 bnd_a1783 X188 |
% 7.42/6.97                                  bnd_c10_2 bnd_a1783 X188) |
% 7.42/6.97                                 bnd_c7_2 bnd_a1783 X188)) &
% 7.42/6.97                            (ALL X189.
% 7.42/6.97                                bnd_ndr1_1 bnd_a1783 -->
% 7.42/6.97                                ~ bnd_c7_2 bnd_a1783 X189 |
% 7.42/6.97                                bnd_c1_2 bnd_a1783 X189) |
% 7.42/6.97                            bnd_c2_0) |
% 7.42/6.97                           bnd_c9_0)) &
% 7.42/6.97                         ((((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a1784) &
% 7.42/6.97                            (ALL X190.
% 7.42/6.97                                bnd_ndr1_1 bnd_a1784 -->
% 7.42/6.97                                (bnd_c9_2 bnd_a1784 X190 |
% 7.42/6.97                                 bnd_c1_2 bnd_a1784 X190) |
% 7.42/6.97                                ~ bnd_c7_2 bnd_a1784 X190)) &
% 7.42/6.97                           ~ bnd_c10_1 bnd_a1784 |
% 7.42/6.97                           (((((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a1785) &
% 7.42/6.97                               bnd_ndr1_1 bnd_a1785) &
% 7.42/6.97                              bnd_c1_2 bnd_a1785 bnd_a1786) &
% 7.42/6.97                             ~ bnd_c4_2 bnd_a1785 bnd_a1786) &
% 7.42/6.97                            bnd_c10_2 bnd_a1785 bnd_a1786) &
% 7.42/6.97                           (ALL X191.
% 7.42/6.97                               bnd_ndr1_1 bnd_a1785 -->
% 7.42/6.97                               (bnd_c2_2 bnd_a1785 X191 |
% 7.42/6.97                                bnd_c4_2 bnd_a1785 X191) |
% 7.42/6.97                               ~ bnd_c5_2 bnd_a1785 X191)) |
% 7.42/6.97                          ((((((((bnd_ndr1_0 & ~ bnd_c5_1 bnd_a1787) &
% 7.42/6.97                                 bnd_ndr1_1 bnd_a1787) &
% 7.42/6.97                                ~ bnd_c3_2 bnd_a1787 bnd_a1788) &
% 7.42/6.97                               ~ bnd_c8_2 bnd_a1787 bnd_a1788) &
% 7.42/6.97                              bnd_c1_2 bnd_a1787 bnd_a1788) &
% 7.42/6.97                             bnd_ndr1_1 bnd_a1787) &
% 7.42/6.97                            ~ bnd_c9_2 bnd_a1787 bnd_a1789) &
% 7.42/6.97                           bnd_c7_2 bnd_a1787 bnd_a1789) &
% 7.42/6.97                          bnd_c6_2 bnd_a1787 bnd_a1789)) &
% 7.42/6.97                        (((((((bnd_ndr1_0 & bnd_c5_1 bnd_a1790) &
% 7.42/6.97                              bnd_ndr1_1 bnd_a1790) &
% 7.42/6.97                             bnd_c2_2 bnd_a1790 bnd_a1791) &
% 7.42/6.97                            bnd_c10_2 bnd_a1790 bnd_a1791) &
% 7.42/6.97                           bnd_c9_2 bnd_a1790 bnd_a1791) &
% 7.42/6.97                          (ALL X192.
% 7.42/6.97                              bnd_ndr1_1 bnd_a1790 -->
% 7.42/6.97                              (~ bnd_c1_2 bnd_a1790 X192 |
% 7.42/6.97                               ~ bnd_c6_2 bnd_a1790 X192) |
% 7.42/6.97                              ~ bnd_c2_2 bnd_a1790 X192) |
% 7.42/6.97                          ~ bnd_c9_0) |
% 7.42/6.97                         (ALL X193.
% 7.42/6.97                             bnd_ndr1_0 -->
% 7.42/6.97                             ((ALL X194.
% 7.42/6.97                                  bnd_ndr1_1 X193 -->
% 7.42/6.97                                  (~ bnd_c3_2 X193 X194 |
% 7.42/6.97                                   ~ bnd_c2_2 X193 X194) |
% 7.42/6.97                                  bnd_c5_2 X193 X194) |
% 7.42/6.97                              ~ bnd_c8_1 X193) |
% 7.42/6.97                             (ALL X195.
% 7.42/6.97                                 bnd_ndr1_1 X193 -->
% 7.42/6.97                                 (bnd_c5_2 X193 X195 | ~ bnd_c8_2 X193 X195) |
% 7.42/6.97                                 ~ bnd_c4_2 X193 X195)))) &
% 7.42/6.97                       (((ALL X196.
% 7.42/6.97                             bnd_ndr1_0 -->
% 7.42/6.97                             ((bnd_ndr1_1 X196 & bnd_c5_2 X196 bnd_a1792) &
% 7.42/6.97                              ~ bnd_c1_2 X196 bnd_a1792) &
% 7.42/6.97                             bnd_c4_2 X196 bnd_a1792 |
% 7.42/6.97                             (ALL X197.
% 7.42/6.97                                 bnd_ndr1_1 X196 -->
% 7.42/6.97                                 (~ bnd_c4_2 X196 X197 |
% 7.42/6.97                                  ~ bnd_c8_2 X196 X197) |
% 7.42/6.97                                 ~ bnd_c7_2 X196 X197)) |
% 7.42/6.97                         ~ bnd_c9_0) |
% 7.42/6.97                        (ALL X198.
% 7.42/6.97                            bnd_ndr1_0 -->
% 7.42/6.97                            (((bnd_ndr1_1 X198 & ~ bnd_c8_2 X198 bnd_a1793) &
% 7.42/6.97                              bnd_c2_2 X198 bnd_a1793) &
% 7.42/6.97                             ~ bnd_c5_2 X198 bnd_a1793 |
% 7.42/6.97                             bnd_c6_1 X198) |
% 7.42/6.97                            ((bnd_ndr1_1 X198 & bnd_c5_2 X198 bnd_a1794) &
% 7.42/6.97                             ~ bnd_c10_2 X198 bnd_a1794) &
% 7.42/6.97                            ~ bnd_c4_2 X198 bnd_a1794))) &
% 7.42/6.97                      ((~ bnd_c3_0 |
% 7.42/6.97                        ((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1795) &
% 7.42/6.97                               ~ bnd_c10_2 bnd_a1795 bnd_a1796) &
% 7.42/6.97                              ~ bnd_c5_2 bnd_a1795 bnd_a1796) &
% 7.42/6.97                             bnd_c6_2 bnd_a1795 bnd_a1796) &
% 7.42/6.97                            bnd_ndr1_1 bnd_a1795) &
% 7.42/6.97                           ~ bnd_c8_2 bnd_a1795 bnd_a1797) &
% 7.42/6.97                          bnd_c10_2 bnd_a1795 bnd_a1797) &
% 7.42/6.97                         ~ bnd_c2_2 bnd_a1795 bnd_a1797) &
% 7.42/6.97                        ~ bnd_c2_1 bnd_a1795) |
% 7.42/6.97                       (((((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a1798) &
% 7.42/6.97                           bnd_ndr1_1 bnd_a1798) &
% 7.42/6.97                          bnd_c5_2 bnd_a1798 bnd_a1799) &
% 7.42/6.97                         bnd_c10_2 bnd_a1798 bnd_a1799) &
% 7.42/6.97                        ~ bnd_c9_2 bnd_a1798 bnd_a1799) &
% 7.42/6.97                       ~ bnd_c6_1 bnd_a1798)) &
% 7.42/6.97                     (~ bnd_c6_0 | bnd_c9_0)) &
% 7.42/6.97                    (((ALL X199.
% 7.42/6.97                          bnd_ndr1_0 -->
% 7.42/6.97                          ((bnd_ndr1_1 X199 & ~ bnd_c10_2 X199 bnd_a1800) &
% 7.42/6.97                           bnd_c2_2 X199 bnd_a1800 |
% 7.42/6.97                           bnd_c5_1 X199) |
% 7.42/6.97                          ((bnd_ndr1_1 X199 & bnd_c6_2 X199 bnd_a1801) &
% 7.42/6.97                           ~ bnd_c4_2 X199 bnd_a1801) &
% 7.42/6.97                          ~ bnd_c10_2 X199 bnd_a1801) |
% 7.42/6.97                      bnd_c8_0) |
% 7.42/6.97                     ((((((((bnd_ndr1_0 & bnd_c7_1 bnd_a1802) &
% 7.42/6.97                            bnd_ndr1_1 bnd_a1802) &
% 7.42/6.97                           bnd_c9_2 bnd_a1802 bnd_a1803) &
% 7.42/6.97                          bnd_c4_2 bnd_a1802 bnd_a1803) &
% 7.42/6.98                         bnd_c7_2 bnd_a1802 bnd_a1803) &
% 7.42/6.98                        bnd_ndr1_1 bnd_a1802) &
% 7.42/6.98                       bnd_c5_2 bnd_a1802 bnd_a1804) &
% 7.42/6.98                      bnd_c6_2 bnd_a1802 bnd_a1804) &
% 7.42/6.98                     ~ bnd_c7_2 bnd_a1802 bnd_a1804)) &
% 7.42/6.98                   (~ bnd_c4_0 | bnd_c9_0)) &
% 7.42/6.98                  ((bnd_c8_0 |
% 7.42/6.98                    (ALL X200.
% 7.42/6.98                        bnd_ndr1_0 -->
% 7.42/6.98                        ((ALL X201.
% 7.42/6.98                             bnd_ndr1_1 X200 -->
% 7.42/6.98                             (bnd_c10_2 X200 X201 | ~ bnd_c7_2 X200 X201) |
% 7.42/6.98                             bnd_c5_2 X200 X201) |
% 7.42/6.98                         (ALL X202.
% 7.42/6.98                             bnd_ndr1_1 X200 -->
% 7.42/6.98                             bnd_c2_2 X200 X202 | ~ bnd_c9_2 X200 X202)) |
% 7.42/6.98                        ~ bnd_c5_1 X200)) |
% 7.42/6.98                   ~ bnd_c9_0)) &
% 7.42/6.98                 ((bnd_c10_0 |
% 7.42/6.98                   (((((bnd_ndr1_0 & ~ bnd_c7_1 bnd_a1805) &
% 7.42/6.98                       bnd_ndr1_1 bnd_a1805) &
% 7.42/6.98                      ~ bnd_c5_2 bnd_a1805 bnd_a1806) &
% 7.42/6.98                     ~ bnd_c4_2 bnd_a1805 bnd_a1806) &
% 7.42/6.98                    ~ bnd_c6_2 bnd_a1805 bnd_a1806) &
% 7.42/6.98                   (ALL X203.
% 7.42/6.98                       bnd_ndr1_1 bnd_a1805 -->
% 7.42/6.98                       (bnd_c10_2 bnd_a1805 X203 | bnd_c2_2 bnd_a1805 X203) |
% 7.42/6.98                       ~ bnd_c4_2 bnd_a1805 X203)) |
% 7.42/6.98                  ~ bnd_c1_0)) &
% 7.42/6.98                (((((((bnd_ndr1_0 & bnd_c8_1 bnd_a1807) &
% 7.42/6.98                      bnd_c9_1 bnd_a1807) &
% 7.42/6.98                     bnd_ndr1_1 bnd_a1807) &
% 7.42/6.98                    ~ bnd_c9_2 bnd_a1807 bnd_a1808) &
% 7.42/6.98                   ~ bnd_c6_2 bnd_a1807 bnd_a1808) &
% 7.42/6.98                  bnd_c5_2 bnd_a1807 bnd_a1808 |
% 7.42/6.98                  ((bnd_ndr1_0 & bnd_c1_1 bnd_a1809) & bnd_c4_1 bnd_a1809) &
% 7.42/6.98                  ~ bnd_c8_1 bnd_a1809) |
% 7.42/6.98                 ~ bnd_c8_0)) &
% 7.42/6.98               (((ALL X204.
% 7.42/6.98                     bnd_ndr1_0 -->
% 7.42/6.98                     (~ bnd_c8_1 X204 | ~ bnd_c1_1 X204) |
% 7.42/6.98                     (bnd_ndr1_1 X204 & ~ bnd_c7_2 X204 bnd_a1810) &
% 7.42/6.98                     bnd_c2_2 X204 bnd_a1810) |
% 7.42/6.98                 ((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1811) &
% 7.42/6.98                    bnd_c6_2 bnd_a1811 bnd_a1812) &
% 7.42/6.98                   ~ bnd_c10_2 bnd_a1811 bnd_a1812) &
% 7.42/6.98                  bnd_c3_1 bnd_a1811) &
% 7.42/6.98                 (ALL X205.
% 7.42/6.98                     bnd_ndr1_1 bnd_a1811 -->
% 7.42/6.98                     (bnd_c2_2 bnd_a1811 X205 | ~ bnd_c5_2 bnd_a1811 X205) |
% 7.42/6.98                     ~ bnd_c3_2 bnd_a1811 X205)) |
% 7.42/6.98                ((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a1813) &
% 7.42/6.98                 (ALL X206.
% 7.42/6.98                     bnd_ndr1_1 bnd_a1813 -->
% 7.42/6.98                     (bnd_c10_2 bnd_a1813 X206 | ~ bnd_c8_2 bnd_a1813 X206) |
% 7.42/6.98                     bnd_c9_2 bnd_a1813 X206)) &
% 7.42/6.98                ~ bnd_c5_1 bnd_a1813)) &
% 7.42/6.98              ((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1814) &
% 7.42/6.98                   bnd_c3_2 bnd_a1814 bnd_a1815) &
% 7.42/6.98                  ~ bnd_c2_2 bnd_a1814 bnd_a1815) &
% 7.42/6.98                 ~ bnd_c10_2 bnd_a1814 bnd_a1815) &
% 7.42/6.98                ~ bnd_c6_1 bnd_a1814 |
% 7.42/6.98                bnd_c2_0) |
% 7.42/6.98               ~ bnd_c9_0)) &
% 7.42/6.98             (bnd_c4_0 | ~ bnd_c8_0)) &
% 7.42/6.98            ((~ bnd_c6_0 |
% 7.42/6.98              (ALL X207.
% 7.42/6.98                  bnd_ndr1_0 -->
% 7.42/6.98                  (bnd_c9_1 X207 |
% 7.42/6.98                   ((bnd_ndr1_1 X207 & bnd_c1_2 X207 bnd_a1816) &
% 7.42/6.98                    ~ bnd_c6_2 X207 bnd_a1816) &
% 7.42/6.98                   ~ bnd_c5_2 X207 bnd_a1816) |
% 7.42/6.98                  ~ bnd_c3_1 X207)) |
% 7.42/6.98             bnd_c9_0)) &
% 7.42/6.98           (bnd_c8_0 | bnd_c2_0)) &
% 7.42/6.98          ((((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1817) &
% 7.42/6.98                   bnd_c4_2 bnd_a1817 bnd_a1818) &
% 7.42/6.98                  ~ bnd_c2_2 bnd_a1817 bnd_a1818) &
% 7.42/6.98                 bnd_c8_2 bnd_a1817 bnd_a1818) &
% 7.42/6.98                bnd_c10_1 bnd_a1817) &
% 7.42/6.98               bnd_ndr1_1 bnd_a1817) &
% 7.42/6.98              ~ bnd_c8_2 bnd_a1817 bnd_a1819) &
% 7.42/6.98             ~ bnd_c4_2 bnd_a1817 bnd_a1819) &
% 7.42/6.98            bnd_c9_2 bnd_a1817 bnd_a1819 |
% 7.42/6.98            (((((bnd_ndr1_0 &
% 7.42/6.98                 (ALL X208.
% 7.42/6.98                     bnd_ndr1_1 bnd_a1820 -->
% 7.42/6.98                     (bnd_c9_2 bnd_a1820 X208 | ~ bnd_c10_2 bnd_a1820 X208) |
% 7.42/6.98                     bnd_c5_2 bnd_a1820 X208)) &
% 7.42/6.98                ~ bnd_c7_1 bnd_a1820) &
% 7.42/6.98               bnd_ndr1_1 bnd_a1820) &
% 7.42/6.98              ~ bnd_c1_2 bnd_a1820 bnd_a1821) &
% 7.42/6.98             ~ bnd_c9_2 bnd_a1820 bnd_a1821) &
% 7.42/6.98            bnd_c8_2 bnd_a1820 bnd_a1821) |
% 7.42/6.98           (((((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a1822) & bnd_c10_1 bnd_a1822) &
% 7.42/6.98              bnd_ndr1_1 bnd_a1822) &
% 7.42/6.98             ~ bnd_c9_2 bnd_a1822 bnd_a1823) &
% 7.42/6.98            ~ bnd_c7_2 bnd_a1822 bnd_a1823) &
% 7.42/6.98           bnd_c5_2 bnd_a1822 bnd_a1823)) &
% 7.42/6.98         (((((((bnd_ndr1_0 & bnd_c8_1 bnd_a1824) & bnd_ndr1_1 bnd_a1824) &
% 7.42/6.98              ~ bnd_c9_2 bnd_a1824 bnd_a1825) &
% 7.42/6.98             bnd_c8_2 bnd_a1824 bnd_a1825) &
% 7.42/6.98            bnd_c5_2 bnd_a1824 bnd_a1825) &
% 7.42/6.98           ~ bnd_c4_1 bnd_a1824 |
% 7.42/6.98           bnd_c10_0) |
% 7.42/6.98          (((((bnd_ndr1_0 & bnd_c2_1 bnd_a1826) & bnd_c10_1 bnd_a1826) &
% 7.42/6.98             bnd_ndr1_1 bnd_a1826) &
% 7.42/6.98            bnd_c6_2 bnd_a1826 bnd_a1827) &
% 7.42/6.98           ~ bnd_c4_2 bnd_a1826 bnd_a1827) &
% 7.42/6.98          bnd_c9_2 bnd_a1826 bnd_a1827)) &
% 7.42/6.98        ((~ bnd_c3_0 | bnd_c2_0) | ~ bnd_c10_0)) &
% 7.42/6.98       ((~ bnd_c3_0 | bnd_c2_0) |
% 7.42/6.98        ((bnd_ndr1_0 &
% 7.42/6.98          (ALL X209.
% 7.42/6.98              bnd_ndr1_1 bnd_a1828 -->
% 7.42/6.98              (~ bnd_c2_2 bnd_a1828 X209 | bnd_c4_2 bnd_a1828 X209) |
% 7.42/6.98              ~ bnd_c7_2 bnd_a1828 X209)) &
% 7.42/6.98         (ALL X210.
% 7.42/6.98             bnd_ndr1_1 bnd_a1828 -->
% 7.42/6.98             (bnd_c8_2 bnd_a1828 X210 | ~ bnd_c5_2 bnd_a1828 X210) |
% 7.42/6.98             ~ bnd_c10_2 bnd_a1828 X210)) &
% 7.42/6.98        bnd_c4_1 bnd_a1828)) &
% 7.42/6.98      (((ALL X211.
% 7.42/6.98            bnd_ndr1_0 -->
% 7.42/6.98            (((bnd_ndr1_1 X211 & ~ bnd_c2_2 X211 bnd_a1829) &
% 7.42/6.98              bnd_c5_2 X211 bnd_a1829) &
% 7.42/6.98             bnd_c4_2 X211 bnd_a1829 |
% 7.42/6.98             (bnd_ndr1_1 X211 & ~ bnd_c7_2 X211 bnd_a1830) &
% 7.42/6.98             ~ bnd_c1_2 X211 bnd_a1830) |
% 7.42/6.98            (ALL X212.
% 7.42/6.98                bnd_ndr1_1 X211 -->
% 7.42/6.98                ~ bnd_c9_2 X211 X212 | bnd_c5_2 X211 X212)) |
% 7.42/6.98        bnd_c2_0) |
% 7.42/6.98       (ALL X213.
% 7.42/6.98           bnd_ndr1_0 -->
% 7.42/6.98           (((bnd_ndr1_1 X213 & bnd_c4_2 X213 bnd_a1831) &
% 7.42/6.98             ~ bnd_c5_2 X213 bnd_a1831) &
% 7.42/6.98            ~ bnd_c8_2 X213 bnd_a1831 |
% 7.42/6.98            (ALL X214.
% 7.42/6.98                bnd_ndr1_1 X213 -->
% 7.42/6.98                (bnd_c4_2 X213 X214 | bnd_c1_2 X213 X214) |
% 7.42/6.98                ~ bnd_c7_2 X213 X214)) |
% 7.42/6.98           ~ bnd_c10_1 X213))) &
% 7.42/6.98     (((ALL X215.
% 7.42/6.98           bnd_ndr1_0 -->
% 7.42/6.98           (((bnd_ndr1_1 X215 & ~ bnd_c4_2 X215 bnd_a1832) &
% 7.42/6.98             bnd_c7_2 X215 bnd_a1832) &
% 7.42/6.98            bnd_c1_2 X215 bnd_a1832 |
% 7.42/6.98            ((bnd_ndr1_1 X215 & bnd_c9_2 X215 bnd_a1833) &
% 7.42/6.98             bnd_c2_2 X215 bnd_a1833) &
% 7.42/6.98            bnd_c6_2 X215 bnd_a1833) |
% 7.42/6.98           bnd_c6_1 X215) |
% 7.42/6.98       bnd_c9_0) |
% 7.42/6.98      (ALL X216.
% 7.42/6.98          bnd_ndr1_0 -->
% 7.42/6.98          ((ALL X217.
% 7.42/6.98               bnd_ndr1_1 X216 -->
% 7.42/6.98               (~ bnd_c5_2 X216 X217 | bnd_c8_2 X216 X217) |
% 7.42/6.98               bnd_c2_2 X216 X217) |
% 7.42/6.98           bnd_c7_1 X216) |
% 7.42/6.98          ~ bnd_c4_1 X216)))
% 20.94/20.42  Unfolded term: ~ (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((~ bnd_c1_0 |
% 20.94/20.42                         (ALL U.
% 20.94/20.42                             bnd_ndr1_0 -->
% 20.94/20.42                             (~ bnd_c1_1 U |
% 20.94/20.42                              (ALL V.
% 20.94/20.42                                  bnd_ndr1_1 U -->
% 20.94/20.42                                  (~ bnd_c1_2 U V | bnd_c5_2 U V) |
% 20.94/20.42                                  bnd_c7_2 U V)) |
% 20.94/20.42                             bnd_c10_1 U)) |
% 20.94/20.42                        ((bnd_ndr1_0 &
% 20.94/20.42                          (ALL W.
% 20.94/20.42                              bnd_ndr1_1 bnd_a1581 -->
% 20.94/20.42                              (~ bnd_c5_2 bnd_a1581 W |
% 20.94/20.42                               bnd_c10_2 bnd_a1581 W) |
% 20.94/20.42                              ~ bnd_c6_2 bnd_a1581 W)) &
% 20.94/20.42                         bnd_c8_1 bnd_a1581) &
% 20.94/20.42                        ~ bnd_c7_1 bnd_a1581) &
% 20.94/20.42                       ((~ bnd_c10_0 | ~ bnd_c6_0) |
% 20.94/20.42                        (ALL X.
% 20.94/20.42                            bnd_ndr1_0 -->
% 20.94/20.42                            ((ALL Y.
% 20.94/20.42                                 bnd_ndr1_1 X -->
% 20.94/20.42                                 (bnd_c7_2 X Y | bnd_c6_2 X Y) |
% 20.94/20.42                                 ~ bnd_c2_2 X Y) |
% 20.94/20.42                             ~ bnd_c6_1 X) |
% 20.94/20.42                            ~ bnd_c4_1 X))) &
% 20.94/20.42                      ((~ bnd_c8_0 |
% 20.94/20.42                        (((((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a1582) &
% 20.94/20.42                            bnd_ndr1_1 bnd_a1582) &
% 20.94/20.42                           ~ bnd_c10_2 bnd_a1582 bnd_a1583) &
% 20.94/20.42                          bnd_c3_2 bnd_a1582 bnd_a1583) &
% 20.94/20.42                         ~ bnd_c4_2 bnd_a1582 bnd_a1583) &
% 20.94/20.42                        bnd_c1_1 bnd_a1582) |
% 20.94/20.42                       ((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1584) &
% 20.94/20.42                          bnd_c8_2 bnd_a1584 bnd_a1585) &
% 20.94/20.42                         bnd_c2_2 bnd_a1584 bnd_a1585) &
% 20.94/20.42                        ~ bnd_c1_2 bnd_a1584 bnd_a1585) &
% 20.94/20.42                       ~ bnd_c7_1 bnd_a1584)) &
% 20.94/20.42                     (((ALL Z.
% 20.94/20.42                           bnd_ndr1_0 -->
% 20.94/20.42                           (((bnd_ndr1_1 Z & bnd_c9_2 Z bnd_a1586) &
% 20.94/20.42                             bnd_c8_2 Z bnd_a1586) &
% 20.94/20.42                            bnd_c10_2 Z bnd_a1586 |
% 20.94/20.42                            ~ bnd_c10_1 Z) |
% 20.94/20.42                           bnd_c8_1 Z) |
% 20.94/20.42                       ((bnd_ndr1_0 & bnd_c2_1 bnd_a1587) &
% 20.94/20.42                        (ALL X1.
% 20.94/20.42                            bnd_ndr1_1 bnd_a1587 -->
% 20.94/20.42                            bnd_c8_2 bnd_a1587 X1 |
% 20.94/20.42                            ~ bnd_c2_2 bnd_a1587 X1)) &
% 20.94/20.42                       ~ bnd_c3_1 bnd_a1587) |
% 20.94/20.42                      ((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1588) &
% 20.94/20.42                             bnd_c6_2 bnd_a1588 bnd_a1589) &
% 20.94/20.42                            ~ bnd_c9_2 bnd_a1588 bnd_a1589) &
% 20.94/20.42                           ~ bnd_c10_2 bnd_a1588 bnd_a1589) &
% 20.94/20.42                          bnd_c5_1 bnd_a1588) &
% 20.94/20.42                         bnd_ndr1_1 bnd_a1588) &
% 20.94/20.42                        ~ bnd_c9_2 bnd_a1588 bnd_a1590) &
% 20.94/20.42                       bnd_c4_2 bnd_a1588 bnd_a1590) &
% 20.94/20.42                      ~ bnd_c6_2 bnd_a1588 bnd_a1590)) &
% 20.94/20.42                    ((bnd_c7_0 | ~ bnd_c4_0) |
% 20.94/20.42                     (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1591) &
% 20.94/20.42                         bnd_c4_2 bnd_a1591 bnd_a1592) &
% 20.94/20.42                        bnd_c8_2 bnd_a1591 bnd_a1592) &
% 20.94/20.42                       bnd_c6_2 bnd_a1591 bnd_a1592) &
% 20.94/20.42                      ~ bnd_c10_1 bnd_a1591) &
% 20.94/20.42                     ~ bnd_c4_1 bnd_a1591)) &
% 20.94/20.42                   (((((((bnd_ndr1_0 & bnd_c9_1 bnd_a1593) &
% 20.94/20.42                         bnd_ndr1_1 bnd_a1593) &
% 20.94/20.42                        ~ bnd_c10_2 bnd_a1593 bnd_a1594) &
% 20.94/20.42                       ~ bnd_c8_2 bnd_a1593 bnd_a1594) &
% 20.94/20.42                      ~ bnd_c3_2 bnd_a1593 bnd_a1594) &
% 20.94/20.42                     ~ bnd_c6_1 bnd_a1593 |
% 20.94/20.42                     (ALL X2.
% 20.94/20.42                         bnd_ndr1_0 -->
% 20.94/20.42                         (((bnd_ndr1_1 X2 & bnd_c3_2 X2 bnd_a1595) &
% 20.94/20.42                           bnd_c4_2 X2 bnd_a1595) &
% 20.94/20.42                          bnd_c6_2 X2 bnd_a1595 |
% 20.94/20.42                          (bnd_ndr1_1 X2 & bnd_c5_2 X2 bnd_a1596) &
% 20.94/20.42                          bnd_c3_2 X2 bnd_a1596) |
% 20.94/20.42                         bnd_c7_1 X2)) |
% 20.94/20.42                    ~ bnd_c10_0)) &
% 20.94/20.42                  (~ bnd_c5_0 | bnd_c7_0)) &
% 20.94/20.42                 ((bnd_c8_0 | bnd_c9_0) |
% 20.94/20.42                  (((((bnd_ndr1_0 & bnd_c5_1 bnd_a1597) &
% 20.94/20.42                      bnd_ndr1_1 bnd_a1597) &
% 20.94/20.42                     ~ bnd_c8_2 bnd_a1597 bnd_a1598) &
% 20.94/20.42                    bnd_c2_2 bnd_a1597 bnd_a1598) &
% 20.94/20.42                   ~ bnd_c1_2 bnd_a1597 bnd_a1598) &
% 20.94/20.42                  bnd_c1_1 bnd_a1597)) &
% 20.94/20.42                (((ALL X3.
% 20.94/20.42                      bnd_ndr1_0 -->
% 20.94/20.42                      (bnd_c1_1 X3 |
% 20.94/20.42                       ((bnd_ndr1_1 X3 & ~ bnd_c1_2 X3 bnd_a1599) &
% 20.94/20.42                        ~ bnd_c10_2 X3 bnd_a1599) &
% 20.94/20.42                       bnd_c9_2 X3 bnd_a1599) |
% 20.94/20.42                      bnd_c3_1 X3) |
% 20.94/20.42                  (ALL X4.
% 20.94/20.42                      bnd_ndr1_0 -->
% 20.94/20.42                      (ALL X5.
% 20.94/20.42                          bnd_ndr1_1 X4 -->
% 20.94/20.42                          (bnd_c5_2 X4 X5 | ~ bnd_c7_2 X4 X5) |
% 20.94/20.42                          ~ bnd_c8_2 X4 X5) |
% 20.94/20.42                      ((bnd_ndr1_1 X4 & ~ bnd_c8_2 X4 bnd_a1600) &
% 20.94/20.42                       ~ bnd_c6_2 X4 bnd_a1600) &
% 20.94/20.42                      bnd_c9_2 X4 bnd_a1600)) |
% 20.94/20.42                 (bnd_ndr1_0 & bnd_c1_1 bnd_a1601) & bnd_c9_1 bnd_a1601)) &
% 20.94/20.42               (((ALL X6.
% 20.94/20.42                     bnd_ndr1_0 -->
% 20.94/20.42                     (~ bnd_c8_1 X6 |
% 20.94/20.42                      (bnd_ndr1_1 X6 & ~ bnd_c4_2 X6 bnd_a1602) &
% 20.94/20.42                      bnd_c2_2 X6 bnd_a1602) |
% 20.94/20.42                     (ALL X7.
% 20.94/20.42                         bnd_ndr1_1 X6 -->
% 20.94/20.42                         (bnd_c3_2 X6 X7 | ~ bnd_c8_2 X6 X7) |
% 20.94/20.42                         ~ bnd_c7_2 X6 X7)) |
% 20.94/20.42                 ((((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1603) &
% 20.94/20.42                          bnd_c8_2 bnd_a1603 bnd_a1604) &
% 20.94/20.42                         ~ bnd_c2_2 bnd_a1603 bnd_a1604) &
% 20.94/20.42                        ~ bnd_c5_2 bnd_a1603 bnd_a1604) &
% 20.94/20.42                       bnd_ndr1_1 bnd_a1603) &
% 20.94/20.42                      ~ bnd_c6_2 bnd_a1603 bnd_a1605) &
% 20.94/20.42                     bnd_c8_2 bnd_a1603 bnd_a1605) &
% 20.94/20.42                    bnd_ndr1_1 bnd_a1603) &
% 20.94/20.42                   bnd_c1_2 bnd_a1603 bnd_a1606) &
% 20.94/20.42                  ~ bnd_c9_2 bnd_a1603 bnd_a1606) &
% 20.94/20.42                 ~ bnd_c5_2 bnd_a1603 bnd_a1606) |
% 20.94/20.42                (ALL X8.
% 20.94/20.42                    bnd_ndr1_0 -->
% 20.94/20.42                    (bnd_c10_1 X8 |
% 20.94/20.42                     (ALL X9.
% 20.94/20.42                         bnd_ndr1_1 X8 -->
% 20.94/20.42                         ~ bnd_c6_2 X8 X9 | bnd_c3_2 X8 X9)) |
% 20.94/20.42                    bnd_c9_1 X8))) &
% 20.94/20.42              (((ALL X10.
% 20.94/20.42                    bnd_ndr1_0 -->
% 20.94/20.42                    (((bnd_ndr1_1 X10 & bnd_c9_2 X10 bnd_a1607) &
% 20.94/20.42                      ~ bnd_c6_2 X10 bnd_a1607) &
% 20.94/20.42                     ~ bnd_c8_2 X10 bnd_a1607 |
% 20.94/20.42                     ~ bnd_c5_1 X10) |
% 20.94/20.42                    bnd_c6_1 X10) |
% 20.94/20.42                (ALL X11.
% 20.94/20.42                    bnd_ndr1_0 -->
% 20.94/20.42                    ((ALL X12.
% 20.94/20.42                         bnd_ndr1_1 X11 -->
% 20.94/20.42                         (~ bnd_c7_2 X11 X12 | ~ bnd_c8_2 X11 X12) |
% 20.94/20.42                         bnd_c5_2 X11 X12) |
% 20.94/20.42                     ((bnd_ndr1_1 X11 & ~ bnd_c10_2 X11 bnd_a1608) &
% 20.94/20.42                      bnd_c7_2 X11 bnd_a1608) &
% 20.94/20.42                     bnd_c5_2 X11 bnd_a1608) |
% 20.94/20.42                    (ALL X13.
% 20.94/20.42                        bnd_ndr1_1 X11 -->
% 20.94/20.42                        (bnd_c6_2 X11 X13 | bnd_c3_2 X11 X13) |
% 20.94/20.42                        ~ bnd_c10_2 X11 X13))) |
% 20.94/20.42               ((bnd_ndr1_0 & bnd_c10_1 bnd_a1609) & ~ bnd_c2_1 bnd_a1609) &
% 20.94/20.42               bnd_c3_1 bnd_a1609)) &
% 20.94/20.42             ((~ bnd_c3_0 |
% 20.94/20.42               (bnd_ndr1_0 & bnd_c7_1 bnd_a1610) &
% 20.94/20.42               (ALL X14.
% 20.94/20.42                   bnd_ndr1_1 bnd_a1610 -->
% 20.94/20.42                   (bnd_c3_2 bnd_a1610 X14 | bnd_c1_2 bnd_a1610 X14) |
% 20.94/20.42                   ~ bnd_c10_2 bnd_a1610 X14)) |
% 20.94/20.42              (((((bnd_ndr1_0 & bnd_c10_1 bnd_a1611) & ~ bnd_c5_1 bnd_a1611) &
% 20.94/20.42                 bnd_ndr1_1 bnd_a1611) &
% 20.94/20.42                ~ bnd_c4_2 bnd_a1611 bnd_a1612) &
% 20.94/20.42               ~ bnd_c8_2 bnd_a1611 bnd_a1612) &
% 20.94/20.42              bnd_c9_2 bnd_a1611 bnd_a1612)) &
% 20.94/20.42            ((ALL X15.
% 20.94/20.42                 bnd_ndr1_0 -->
% 20.94/20.42                 (~ bnd_c3_1 X15 | bnd_c8_1 X15) | bnd_c10_1 X15) |
% 20.94/20.42             (ALL X16.
% 20.94/20.42                 bnd_ndr1_0 -->
% 20.94/20.42                 (bnd_c3_1 X16 |
% 20.94/20.42                  ((bnd_ndr1_1 X16 & ~ bnd_c1_2 X16 bnd_a1613) &
% 20.94/20.42                   bnd_c5_2 X16 bnd_a1613) &
% 20.94/20.42                  ~ bnd_c9_2 X16 bnd_a1613) |
% 20.94/20.42                 ((bnd_ndr1_1 X16 & bnd_c4_2 X16 bnd_a1614) &
% 20.94/20.42                  ~ bnd_c3_2 X16 bnd_a1614) &
% 20.94/20.42                 ~ bnd_c9_2 X16 bnd_a1614))) &
% 20.94/20.42           ((bnd_c2_0 |
% 20.94/20.42             (ALL X17.
% 20.94/20.42                 bnd_ndr1_0 -->
% 20.94/20.42                 (((bnd_ndr1_1 X17 & bnd_c8_2 X17 bnd_a1615) &
% 20.94/20.42                   ~ bnd_c9_2 X17 bnd_a1615) &
% 20.94/20.42                  bnd_c3_2 X17 bnd_a1615 |
% 20.94/20.42                  bnd_c2_1 X17) |
% 20.94/20.42                 bnd_c10_1 X17)) |
% 20.94/20.42            ~ bnd_c10_0)) &
% 20.94/20.42          (((((((bnd_ndr1_0 & ~ bnd_c3_1 bnd_a1616) & bnd_ndr1_1 bnd_a1616) &
% 20.94/20.42               ~ bnd_c4_2 bnd_a1616 bnd_a1617) &
% 20.94/20.42              ~ bnd_c10_2 bnd_a1616 bnd_a1617) &
% 20.94/20.42             bnd_c8_2 bnd_a1616 bnd_a1617) &
% 20.94/20.42            ~ bnd_c9_1 bnd_a1616 |
% 20.94/20.42            ~ bnd_c10_0) |
% 20.94/20.42           bnd_c9_0)) &
% 20.94/20.42         (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1618) &
% 20.94/20.42               ~ bnd_c6_2 bnd_a1618 bnd_a1619) &
% 20.94/20.42              bnd_c8_2 bnd_a1618 bnd_a1619) &
% 20.94/20.42             bnd_c9_2 bnd_a1618 bnd_a1619) &
% 20.94/20.42            bnd_c5_1 bnd_a1618) &
% 20.94/20.42           (ALL X18.
% 20.94/20.42               bnd_ndr1_1 bnd_a1618 -->
% 20.94/20.42               (~ bnd_c8_2 bnd_a1618 X18 | bnd_c3_2 bnd_a1618 X18) |
% 20.94/20.42               ~ bnd_c9_2 bnd_a1618 X18) |
% 20.94/20.42           ~ bnd_c9_0) |
% 20.94/20.42          (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1620) &
% 20.94/20.42              ~ bnd_c8_2 bnd_a1620 bnd_a1621) &
% 20.94/20.42             bnd_c7_2 bnd_a1620 bnd_a1621) &
% 20.94/20.42            ~ bnd_c4_2 bnd_a1620 bnd_a1621) &
% 20.94/20.42           bnd_c3_1 bnd_a1620) &
% 20.94/20.42          (ALL X19.
% 20.94/20.42              bnd_ndr1_1 bnd_a1620 -->
% 20.94/20.42              (~ bnd_c9_2 bnd_a1620 X19 | bnd_c4_2 bnd_a1620 X19) |
% 20.94/20.42              bnd_c10_2 bnd_a1620 X19))) &
% 20.94/20.42        (((ALL X20.
% 20.94/20.42              bnd_ndr1_0 -->
% 20.94/20.42              (bnd_c4_1 X20 |
% 20.94/20.42               (ALL X21.
% 20.94/20.42                   bnd_ndr1_1 X20 -->
% 20.94/20.42                   (~ bnd_c7_2 X20 X21 | bnd_c6_2 X20 X21) |
% 20.94/20.42                   ~ bnd_c10_2 X20 X21)) |
% 20.94/20.42              (ALL X22.
% 20.94/20.42                  bnd_ndr1_1 X20 -->
% 20.94/20.42                  (bnd_c1_2 X20 X22 | ~ bnd_c2_2 X20 X22) |
% 20.94/20.42                  bnd_c7_2 X20 X22)) |
% 20.94/20.42          (ALL X23.
% 20.94/20.42              bnd_ndr1_0 -->
% 20.94/20.42              (bnd_c6_1 X23 |
% 20.94/20.42               ((bnd_ndr1_1 X23 & ~ bnd_c5_2 X23 bnd_a1622) &
% 20.94/20.42                bnd_c9_2 X23 bnd_a1622) &
% 20.94/20.42               bnd_c3_2 X23 bnd_a1622) |
% 20.94/20.42              (ALL X24.
% 20.94/20.42                  bnd_ndr1_1 X23 -->
% 20.94/20.42                  (bnd_c2_2 X23 X24 | ~ bnd_c4_2 X23 X24) |
% 20.94/20.42                  bnd_c5_2 X23 X24))) |
% 20.94/20.42         bnd_c1_0)) &
% 20.94/20.42       (((ALL X25.
% 20.94/20.42             bnd_ndr1_0 -->
% 20.94/20.42             (((bnd_ndr1_1 X25 & ~ bnd_c2_2 X25 bnd_a1623) &
% 20.94/20.42               ~ bnd_c6_2 X25 bnd_a1623) &
% 20.94/20.42              ~ bnd_c10_2 X25 bnd_a1623 |
% 20.94/20.42              (bnd_ndr1_1 X25 & bnd_c4_2 X25 bnd_a1624) &
% 20.94/20.42              bnd_c1_2 X25 bnd_a1624) |
% 20.94/20.42             ~ bnd_c9_1 X25) |
% 20.94/20.42         (ALL X26.
% 20.94/20.42             bnd_ndr1_0 -->
% 20.94/20.42             ((ALL X27.
% 20.94/20.42                  bnd_ndr1_1 X26 -->
% 20.94/20.42                  (bnd_c10_2 X26 X27 | bnd_c3_2 X26 X27) |
% 20.94/20.42                  ~ bnd_c6_2 X26 X27) |
% 20.94/20.42              bnd_c9_1 X26) |
% 20.94/20.42             ((bnd_ndr1_1 X26 & bnd_c9_2 X26 bnd_a1625) &
% 20.94/20.42              ~ bnd_c5_2 X26 bnd_a1625) &
% 20.94/20.42             bnd_c6_2 X26 bnd_a1625)) |
% 20.94/20.42        ((bnd_ndr1_0 & bnd_c5_1 bnd_a1626) & bnd_c3_1 bnd_a1626) &
% 20.94/20.42        bnd_c9_1 bnd_a1626)) &
% 20.94/20.42      (~ bnd_c8_0 |
% 20.94/20.42       (ALL X28.
% 20.94/20.42           bnd_ndr1_0 -->
% 20.94/20.42           (((bnd_ndr1_1 X28 & ~ bnd_c7_2 X28 bnd_a1627) &
% 20.94/20.42             ~ bnd_c10_2 X28 bnd_a1627) &
% 20.94/20.42            ~ bnd_c1_2 X28 bnd_a1627 |
% 20.94/20.42            ((bnd_ndr1_1 X28 & ~ bnd_c3_2 X28 bnd_a1628) &
% 20.94/20.42             bnd_c9_2 X28 bnd_a1628) &
% 20.94/20.42            bnd_c10_2 X28 bnd_a1628) |
% 20.94/20.42           ~ bnd_c9_1 X28))) &
% 20.94/20.42     ((~ bnd_c10_0 |
% 20.94/20.42       (ALL X29.
% 20.94/20.42           bnd_ndr1_0 --> (bnd_c4_1 X29 | ~ bnd_c6_1 X29) | bnd_c2_1 X29)) |
% 20.94/20.42      (((((bnd_ndr1_0 &
% 20.94/20.42           (ALL X30.
% 20.94/20.42               bnd_ndr1_1 bnd_a1629 -->
% 20.94/20.42               (~ bnd_c4_2 bnd_a1629 X30 | ~ bnd_c9_2 bnd_a1629 X30) |
% 20.94/20.42               bnd_c2_2 bnd_a1629 X30)) &
% 20.94/20.42          bnd_ndr1_1 bnd_a1629) &
% 20.94/20.42         ~ bnd_c6_2 bnd_a1629 bnd_a1630) &
% 20.94/20.42        bnd_c7_2 bnd_a1629 bnd_a1630) &
% 20.94/20.42       ~ bnd_c4_2 bnd_a1629 bnd_a1630) &
% 20.94/20.42      bnd_c1_1 bnd_a1629)) &
% 20.94/20.42    ((((((((((bnd_ndr1_0 & bnd_c5_1 bnd_a1631) & bnd_ndr1_1 bnd_a1631) &
% 20.94/20.42            bnd_c9_2 bnd_a1631 bnd_a1632) &
% 20.94/20.42           ~ bnd_c1_2 bnd_a1631 bnd_a1632) &
% 20.94/20.42          ~ bnd_c5_2 bnd_a1631 bnd_a1632) &
% 20.94/20.42         bnd_ndr1_1 bnd_a1631) &
% 20.94/20.42        bnd_c4_2 bnd_a1631 bnd_a1633) &
% 20.94/20.42       ~ bnd_c3_2 bnd_a1631 bnd_a1633) &
% 20.94/20.42      bnd_c9_2 bnd_a1631 bnd_a1633 |
% 20.94/20.42      (ALL X31.
% 20.94/20.42          bnd_ndr1_0 -->
% 20.94/20.42          (bnd_c2_1 X31 |
% 20.94/20.42           (bnd_ndr1_1 X31 & bnd_c3_2 X31 bnd_a1634) &
% 20.94/20.42           bnd_c6_2 X31 bnd_a1634) |
% 20.94/20.42          bnd_c5_1 X31)) |
% 20.94/20.42     (ALL X32.
% 20.94/20.42         bnd_ndr1_0 --> (bnd_c9_1 X32 | ~ bnd_c5_1 X32) | bnd_c6_1 X32))) &
% 20.94/20.42   ((((((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1635) &
% 20.94/20.42              bnd_c8_2 bnd_a1635 bnd_a1636) &
% 20.94/20.42             bnd_c9_2 bnd_a1635 bnd_a1636) &
% 20.94/20.42            bnd_c2_2 bnd_a1635 bnd_a1636) &
% 20.94/20.42           bnd_ndr1_1 bnd_a1635) &
% 20.94/20.42          bnd_c3_2 bnd_a1635 bnd_a1637) &
% 20.94/20.42         ~ bnd_c2_2 bnd_a1635 bnd_a1637) &
% 20.94/20.42        bnd_ndr1_1 bnd_a1635) &
% 20.94/20.42       bnd_c1_2 bnd_a1635 bnd_a1638) &
% 20.94/20.42      ~ bnd_c5_2 bnd_a1635 bnd_a1638) &
% 20.94/20.42     ~ bnd_c8_2 bnd_a1635 bnd_a1638 |
% 20.94/20.42     bnd_c9_0) |
% 20.94/20.42    ((((((((bnd_ndr1_0 & ~ bnd_c9_1 bnd_a1639) & bnd_ndr1_1 bnd_a1639) &
% 20.94/20.42          ~ bnd_c4_2 bnd_a1639 bnd_a1640) &
% 20.94/20.42         ~ bnd_c5_2 bnd_a1639 bnd_a1640) &
% 20.94/20.42        bnd_c6_2 bnd_a1639 bnd_a1640) &
% 20.94/20.42       bnd_ndr1_1 bnd_a1639) &
% 20.94/20.42      ~ bnd_c10_2 bnd_a1639 bnd_a1641) &
% 20.94/20.42     bnd_c9_2 bnd_a1639 bnd_a1641) &
% 20.94/20.42    bnd_c1_2 bnd_a1639 bnd_a1641)) &
% 20.94/20.42  (((ALL X33.
% 20.94/20.42        bnd_ndr1_0 --> (~ bnd_c6_1 X33 | ~ bnd_c1_1 X33) | ~ bnd_c3_1 X33) |
% 20.94/20.42    (ALL X34.
% 20.94/20.42        bnd_ndr1_0 -->
% 20.94/20.42        ((ALL X35. bnd_ndr1_1 X34 --> bnd_c1_2 X34 X35 | ~ bnd_c6_2 X34 X35) |
% 20.94/20.42         bnd_c1_1 X34) |
% 20.94/20.42        (ALL X36.
% 20.94/20.42            bnd_ndr1_1 X34 -->
% 20.94/20.42            (~ bnd_c4_2 X34 X36 | ~ bnd_c10_2 X34 X36) |
% 20.94/20.42            ~ bnd_c1_2 X34 X36))) |
% 20.94/20.42   (ALL X37.
% 20.94/20.42       bnd_ndr1_0 -->
% 20.94/20.42       (bnd_c6_1 X37 | bnd_c2_1 X37) |
% 20.94/20.42       ((bnd_ndr1_1 X37 & ~ bnd_c9_2 X37 bnd_a1642) &
% 20.94/20.42        ~ bnd_c7_2 X37 bnd_a1642) &
% 20.94/20.42       ~ bnd_c1_2 X37 bnd_a1642))) &
% 20.94/20.42                                       (((ALL X38.
% 20.94/20.42       bnd_ndr1_0 -->
% 20.94/20.42       (~ bnd_c6_1 X38 | bnd_c3_1 X38) |
% 20.94/20.42       (bnd_ndr1_1 X38 & bnd_c3_2 X38 bnd_a1643) & ~ bnd_c9_2 X38 bnd_a1643) |
% 20.94/20.42   ((bnd_ndr1_0 &
% 20.94/20.42     (ALL X39.
% 20.94/20.42         bnd_ndr1_1 bnd_a1644 -->
% 20.94/20.42         (~ bnd_c8_2 bnd_a1644 X39 | bnd_c4_2 bnd_a1644 X39) |
% 20.94/20.42         bnd_c9_2 bnd_a1644 X39)) &
% 20.94/20.42    ~ bnd_c6_1 bnd_a1644) &
% 20.94/20.42   ~ bnd_c9_1 bnd_a1644) |
% 20.94/20.42  (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1645) & bnd_c2_2 bnd_a1645 bnd_a1646) &
% 20.94/20.42     ~ bnd_c1_2 bnd_a1645 bnd_a1646) &
% 20.94/20.42    ~ bnd_c5_2 bnd_a1645 bnd_a1646) &
% 20.94/20.42   ~ bnd_c6_1 bnd_a1645) &
% 20.94/20.42  bnd_c9_1 bnd_a1645)) &
% 20.94/20.42                                      ((((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a1647) &
% 20.94/20.42   ~ bnd_c4_1 bnd_a1647) &
% 20.94/20.42  (ALL X40.
% 20.94/20.42      bnd_ndr1_1 bnd_a1647 -->
% 20.94/20.42      bnd_c9_2 bnd_a1647 X40 | bnd_c4_2 bnd_a1647 X40) |
% 20.94/20.42  (ALL X41.
% 20.94/20.42      bnd_ndr1_0 -->
% 20.94/20.42      ((bnd_ndr1_1 X41 & bnd_c10_2 X41 bnd_a1648) & bnd_c3_2 X41 bnd_a1648) &
% 20.94/20.42      bnd_c2_2 X41 bnd_a1648 |
% 20.94/20.42      ((bnd_ndr1_1 X41 & ~ bnd_c1_2 X41 bnd_a1649) & bnd_c8_2 X41 bnd_a1649) &
% 20.94/20.42      bnd_c7_2 X41 bnd_a1649)) |
% 20.94/20.42                                       ((bnd_ndr1_0 & ~ bnd_c9_1 bnd_a1650) &
% 20.94/20.42  ~ bnd_c6_1 bnd_a1650) &
% 20.94/20.42                                       bnd_c2_1 bnd_a1650)) &
% 20.94/20.42                                     ((bnd_c3_0 |
% 20.94/20.42                                       ((((bnd_ndr1_0 &
% 20.94/20.42     bnd_ndr1_1 bnd_a1651) &
% 20.94/20.42    ~ bnd_c8_2 bnd_a1651 bnd_a1652) &
% 20.94/20.42   bnd_c2_2 bnd_a1651 bnd_a1652) &
% 20.94/20.42  ~ bnd_c10_1 bnd_a1651) &
% 20.94/20.42                                       bnd_c2_1 bnd_a1651) |
% 20.94/20.42                                      ~ bnd_c9_0)) &
% 20.94/20.42                                    ((~ bnd_c5_0 | ~ bnd_c9_0) |
% 20.94/20.42                                     (ALL X42.
% 20.94/20.42   bnd_ndr1_0 -->
% 20.94/20.42   (~ bnd_c2_1 X42 | ~ bnd_c3_1 X42) |
% 20.94/20.42   (bnd_ndr1_1 X42 & ~ bnd_c4_2 X42 bnd_a1653) & bnd_c6_2 X42 bnd_a1653))) &
% 20.94/20.42                                   ((~ bnd_c2_0 |
% 20.94/20.42                                     (ALL X43.
% 20.94/20.42   bnd_ndr1_0 -->
% 20.94/20.42   (bnd_c5_1 X43 | bnd_c10_1 X43) |
% 20.94/20.42   (ALL X44.
% 20.94/20.42       bnd_ndr1_1 X43 -->
% 20.94/20.42       (~ bnd_c1_2 X43 X44 | ~ bnd_c3_2 X43 X44) | ~ bnd_c9_2 X43 X44))) |
% 20.94/20.42                                    ((bnd_ndr1_0 & ~ bnd_c3_1 bnd_a1654) &
% 20.94/20.42                                     bnd_c1_1 bnd_a1654) &
% 20.94/20.42                                    ~ bnd_c6_1 bnd_a1654)) &
% 20.94/20.42                                  ((bnd_c10_0 | bnd_c4_0) |
% 20.94/20.42                                   ((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1655) &
% 20.94/20.43                                      ~ bnd_c7_2 bnd_a1655 bnd_a1656) &
% 20.94/20.43                                     bnd_c2_2 bnd_a1655 bnd_a1656) &
% 20.94/20.43                                    bnd_c6_1 bnd_a1655) &
% 20.94/20.43                                   (ALL X45.
% 20.94/20.43                                       bnd_ndr1_1 bnd_a1655 -->
% 20.94/20.43                                       (bnd_c1_2 bnd_a1655 X45 |
% 20.94/20.43  ~ bnd_c7_2 bnd_a1655 X45) |
% 20.94/20.43                                       ~ bnd_c10_2 bnd_a1655 X45))) &
% 20.94/20.43                                 (((ALL X46.
% 20.94/20.43                                       bnd_ndr1_0 -->
% 20.94/20.43                                       (((bnd_ndr1_1 X46 &
% 20.94/20.43    ~ bnd_c3_2 X46 bnd_a1657) &
% 20.94/20.43   ~ bnd_c2_2 X46 bnd_a1657) &
% 20.94/20.43  bnd_c7_2 X46 bnd_a1657 |
% 20.94/20.43  ~ bnd_c9_1 X46) |
% 20.94/20.43                                       (ALL X47.
% 20.94/20.43     bnd_ndr1_1 X46 -->
% 20.94/20.43     (bnd_c3_2 X46 X47 | ~ bnd_c8_2 X46 X47) | bnd_c6_2 X46 X47)) |
% 20.94/20.43                                   (ALL X48.
% 20.94/20.43                                       bnd_ndr1_0 -->
% 20.94/20.43                                       ((ALL X49.
% 20.94/20.43      bnd_ndr1_1 X48 -->
% 20.94/20.43      (~ bnd_c9_2 X48 X49 | bnd_c3_2 X48 X49) | ~ bnd_c7_2 X48 X49) |
% 20.94/20.43  bnd_c3_1 X48) |
% 20.94/20.43                                       ~ bnd_c8_1 X48)) |
% 20.94/20.43                                  (ALL X50.
% 20.94/20.43                                      bnd_ndr1_0 -->
% 20.94/20.43                                      ~ bnd_c1_1 X50 | bnd_c6_1 X50))) &
% 20.94/20.43                                ((ALL X51.
% 20.94/20.43                                     bnd_ndr1_0 -->
% 20.94/20.43                                     ((ALL X52.
% 20.94/20.43    bnd_ndr1_1 X51 --> bnd_c9_2 X51 X52 | bnd_c8_2 X51 X52) |
% 20.94/20.43                                      ((bnd_ndr1_1 X51 &
% 20.94/20.43  ~ bnd_c9_2 X51 bnd_a1658) &
% 20.94/20.43                                       bnd_c3_2 X51 bnd_a1658) &
% 20.94/20.43                                      ~ bnd_c7_2 X51 bnd_a1658) |
% 20.94/20.43                                     bnd_c9_1 X51) |
% 20.94/20.43                                 ((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1659) &
% 20.94/20.43  bnd_c4_2 bnd_a1659 bnd_a1660) &
% 20.94/20.43                                       bnd_c5_2 bnd_a1659 bnd_a1660) &
% 20.94/20.43                                      bnd_c3_2 bnd_a1659 bnd_a1660) &
% 20.94/20.43                                     bnd_ndr1_1 bnd_a1659) &
% 20.94/20.43                                    bnd_c4_2 bnd_a1659 bnd_a1661) &
% 20.94/20.43                                   ~ bnd_c1_2 bnd_a1659 bnd_a1661) &
% 20.94/20.43                                  bnd_c9_2 bnd_a1659 bnd_a1661) &
% 20.94/20.43                                 ~ bnd_c5_1 bnd_a1659)) &
% 20.94/20.43                               ((((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1662) &
% 20.94/20.43  bnd_c7_2 bnd_a1662 bnd_a1663) &
% 20.94/20.43                                       ~ bnd_c1_2 bnd_a1662 bnd_a1663) &
% 20.94/20.43                                      bnd_c5_2 bnd_a1662 bnd_a1663) &
% 20.94/20.43                                     bnd_c2_1 bnd_a1662) &
% 20.94/20.43                                    bnd_ndr1_1 bnd_a1662) &
% 20.94/20.43                                   ~ bnd_c10_2 bnd_a1662 bnd_a1664) &
% 20.94/20.43                                  bnd_c3_2 bnd_a1662 bnd_a1664) &
% 20.94/20.43                                 ~ bnd_c1_2 bnd_a1662 bnd_a1664 |
% 20.94/20.43                                 (ALL X53.
% 20.94/20.43                                     bnd_ndr1_0 -->
% 20.94/20.43                                     (bnd_c8_1 X53 |
% 20.94/20.43                                      ((bnd_ndr1_1 X53 &
% 20.94/20.43  ~ bnd_c9_2 X53 bnd_a1665) &
% 20.94/20.43                                       ~ bnd_c7_2 X53 bnd_a1665) &
% 20.94/20.43                                      ~ bnd_c8_2 X53 bnd_a1665) |
% 20.94/20.43                                     bnd_c3_1 X53)) |
% 20.94/20.43                                bnd_c4_0)) &
% 20.94/20.43                              (bnd_c9_0 | bnd_c6_0)) &
% 20.94/20.43                             (((ALL X54.
% 20.94/20.43                                   bnd_ndr1_0 -->
% 20.94/20.43                                   ((bnd_ndr1_1 X54 &
% 20.94/20.43                                     bnd_c3_2 X54 bnd_a1666) &
% 20.94/20.43                                    ~ bnd_c10_2 X54 bnd_a1666 |
% 20.94/20.43                                    ~ bnd_c8_1 X54) |
% 20.94/20.43                                   bnd_c6_1 X54) |
% 20.94/20.43                               ~ bnd_c9_0) |
% 20.94/20.43                              ((bnd_ndr1_0 & ~ bnd_c9_1 bnd_a1667) &
% 20.94/20.43                               bnd_c4_1 bnd_a1667) &
% 20.94/20.43                              (ALL X55.
% 20.94/20.43                                  bnd_ndr1_1 bnd_a1667 -->
% 20.94/20.43                                  (~ bnd_c1_2 bnd_a1667 X55 |
% 20.94/20.43                                   ~ bnd_c9_2 bnd_a1667 X55) |
% 20.94/20.43                                  bnd_c3_2 bnd_a1667 X55))) &
% 20.94/20.43                            ((bnd_ndr1_0 & ~ bnd_c6_1 bnd_a1668) &
% 20.94/20.43                             (ALL X56.
% 20.94/20.43                                 bnd_ndr1_1 bnd_a1668 -->
% 20.94/20.43                                 (~ bnd_c9_2 bnd_a1668 X56 |
% 20.94/20.43                                  ~ bnd_c3_2 bnd_a1668 X56) |
% 20.94/20.43                                 bnd_c8_2 bnd_a1668 X56) |
% 20.94/20.43                             bnd_c6_0)) &
% 20.94/20.43                           ((bnd_c3_0 | ~ bnd_c8_0) |
% 20.94/20.43                            ((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1669) &
% 20.94/20.43                                   bnd_c10_2 bnd_a1669 bnd_a1670) &
% 20.94/20.43                                  ~ bnd_c8_2 bnd_a1669 bnd_a1670) &
% 20.94/20.43                                 ~ bnd_c2_2 bnd_a1669 bnd_a1670) &
% 20.94/20.43                                bnd_ndr1_1 bnd_a1669) &
% 20.94/20.43                               bnd_c9_2 bnd_a1669 bnd_a1671) &
% 20.94/20.43                              bnd_c2_2 bnd_a1669 bnd_a1671) &
% 20.94/20.43                             ~ bnd_c4_2 bnd_a1669 bnd_a1671) &
% 20.94/20.43                            (ALL X57.
% 20.94/20.43                                bnd_ndr1_1 bnd_a1669 -->
% 20.94/20.43                                (~ bnd_c3_2 bnd_a1669 X57 |
% 20.94/20.43                                 ~ bnd_c2_2 bnd_a1669 X57) |
% 20.94/20.43                                bnd_c1_2 bnd_a1669 X57))) &
% 20.94/20.43                          ((~ bnd_c4_0 | ~ bnd_c1_0) | ~ bnd_c6_0)) &
% 20.94/20.43                         ((bnd_c7_0 | ~ bnd_c8_0) |
% 20.94/20.43                          (ALL X58.
% 20.94/20.43                              bnd_ndr1_0 -->
% 20.94/20.43                              (~ bnd_c7_1 X58 |
% 20.94/20.43                               (ALL X59.
% 20.94/20.43                                   bnd_ndr1_1 X58 -->
% 20.94/20.43                                   (~ bnd_c8_2 X58 X59 | bnd_c3_2 X58 X59) |
% 20.94/20.43                                   bnd_c1_2 X58 X59)) |
% 20.94/20.43                              bnd_c1_1 X58))) &
% 20.94/20.43                        (((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1672) &
% 20.94/20.43                                bnd_c10_2 bnd_a1672 bnd_a1673) &
% 20.94/20.43                               ~ bnd_c4_2 bnd_a1672 bnd_a1673) &
% 20.94/20.43                              ~ bnd_c6_2 bnd_a1672 bnd_a1673) &
% 20.94/20.43                             bnd_ndr1_1 bnd_a1672) &
% 20.94/20.43                            ~ bnd_c1_2 bnd_a1672 bnd_a1674) &
% 20.94/20.43                           bnd_c8_2 bnd_a1672 bnd_a1674) &
% 20.94/20.43                          bnd_c9_2 bnd_a1672 bnd_a1674 |
% 20.94/20.43                          (ALL X60.
% 20.94/20.43                              bnd_ndr1_0 -->
% 20.94/20.43                              ((bnd_ndr1_1 X60 & ~ bnd_c9_2 X60 bnd_a1675) &
% 20.94/20.43                               bnd_c4_2 X60 bnd_a1675) &
% 20.94/20.43                              ~ bnd_c5_2 X60 bnd_a1675 |
% 20.94/20.43                              ~ bnd_c9_1 X60)) |
% 20.94/20.43                         bnd_c9_0)) &
% 20.94/20.43                       (((ALL X61.
% 20.94/20.43                             bnd_ndr1_0 -->
% 20.94/20.43                             (~ bnd_c9_1 X61 |
% 20.94/20.43                              (bnd_ndr1_1 X61 & bnd_c8_2 X61 bnd_a1676) &
% 20.94/20.43                              bnd_c10_2 X61 bnd_a1676) |
% 20.94/20.43                             bnd_c2_1 X61) |
% 20.94/20.43                         ~ bnd_c1_0) |
% 20.94/20.43                        ((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1677) &
% 20.94/20.43                           bnd_c9_2 bnd_a1677 bnd_a1678) &
% 20.94/20.43                          ~ bnd_c3_2 bnd_a1677 bnd_a1678) &
% 20.94/20.43                         bnd_c10_1 bnd_a1677) &
% 20.94/20.43                        bnd_c3_1 bnd_a1677)) &
% 20.94/20.43                      ((~ bnd_c6_0 | ~ bnd_c9_0) |
% 20.94/20.43                       (((((bnd_ndr1_0 & ~ bnd_c9_1 bnd_a1679) &
% 20.94/20.43                           bnd_ndr1_1 bnd_a1679) &
% 20.94/20.43                          bnd_c8_2 bnd_a1679 bnd_a1680) &
% 20.94/20.43                         ~ bnd_c4_2 bnd_a1679 bnd_a1680) &
% 20.94/20.43                        bnd_c7_2 bnd_a1679 bnd_a1680) &
% 20.94/20.43                       (ALL X62.
% 20.94/20.43                           bnd_ndr1_1 bnd_a1679 -->
% 20.94/20.43                           (bnd_c5_2 bnd_a1679 X62 | bnd_c7_2 bnd_a1679 X62) |
% 20.94/20.43                           bnd_c2_2 bnd_a1679 X62))) &
% 20.94/20.43                     ((~ bnd_c5_0 |
% 20.94/20.43                       ((bnd_ndr1_0 &
% 20.94/20.43                         (ALL X63.
% 20.94/20.43                             bnd_ndr1_1 bnd_a1681 -->
% 20.94/20.43                             (~ bnd_c10_2 bnd_a1681 X63 |
% 20.94/20.43                              ~ bnd_c6_2 bnd_a1681 X63) |
% 20.94/20.43                             ~ bnd_c8_2 bnd_a1681 X63)) &
% 20.94/20.43                        bnd_c8_1 bnd_a1681) &
% 20.94/20.43                       bnd_c3_1 bnd_a1681) |
% 20.94/20.43                      ~ bnd_c3_0)) &
% 20.94/20.43                    ((~ bnd_c5_0 |
% 20.94/20.43                      (ALL X64.
% 20.94/20.43                          bnd_ndr1_0 -->
% 20.94/20.43                          (ALL X65.
% 20.94/20.43                              bnd_ndr1_1 X64 -->
% 20.94/20.43                              ~ bnd_c5_2 X64 X65 | bnd_c1_2 X64 X65) |
% 20.94/20.43                          bnd_c7_1 X64)) |
% 20.94/20.43                     (ALL X66.
% 20.94/20.43                         bnd_ndr1_0 -->
% 20.94/20.43                         (((bnd_ndr1_1 X66 & ~ bnd_c1_2 X66 bnd_a1682) &
% 20.94/20.43                           ~ bnd_c8_2 X66 bnd_a1682) &
% 20.94/20.43                          bnd_c9_2 X66 bnd_a1682 |
% 20.94/20.43                          (ALL X67.
% 20.94/20.43                              bnd_ndr1_1 X66 -->
% 20.94/20.43                              (bnd_c1_2 X66 X67 | bnd_c4_2 X66 X67) |
% 20.94/20.43                              bnd_c3_2 X66 X67)) |
% 20.94/20.43                         ~ bnd_c7_1 X66))) &
% 20.94/20.43                   (((((((bnd_ndr1_0 & bnd_c8_1 bnd_a1683) &
% 20.94/20.43                         bnd_ndr1_1 bnd_a1683) &
% 20.94/20.43                        ~ bnd_c6_2 bnd_a1683 bnd_a1684) &
% 20.94/20.43                       bnd_c5_2 bnd_a1683 bnd_a1684) &
% 20.94/20.43                      ~ bnd_c8_2 bnd_a1683 bnd_a1684) &
% 20.94/20.43                     ~ bnd_c2_1 bnd_a1683 |
% 20.94/20.43                     ~ bnd_c2_0) |
% 20.94/20.43                    ~ bnd_c5_0)) &
% 20.94/20.43                  (bnd_c3_0 |
% 20.94/20.43                   (((((bnd_ndr1_0 &
% 20.94/20.43                        (ALL X68.
% 20.94/20.43                            bnd_ndr1_1 bnd_a1685 -->
% 20.94/20.43                            (bnd_c8_2 bnd_a1685 X68 |
% 20.94/20.43                             bnd_c2_2 bnd_a1685 X68) |
% 20.94/20.43                            bnd_c1_2 bnd_a1685 X68)) &
% 20.94/20.43                       ~ bnd_c9_1 bnd_a1685) &
% 20.94/20.43                      bnd_ndr1_1 bnd_a1685) &
% 20.94/20.43                     ~ bnd_c6_2 bnd_a1685 bnd_a1686) &
% 20.94/20.43                    bnd_c9_2 bnd_a1685 bnd_a1686) &
% 20.94/20.43                   bnd_c8_2 bnd_a1685 bnd_a1686)) &
% 20.94/20.43                 (bnd_c1_0 |
% 20.94/20.43                  (ALL X69.
% 20.94/20.43                      bnd_ndr1_0 -->
% 20.94/20.43                      ((ALL X70.
% 20.94/20.43                           bnd_ndr1_1 X69 -->
% 20.94/20.43                           (~ bnd_c1_2 X69 X70 | ~ bnd_c6_2 X69 X70) |
% 20.94/20.43                           bnd_c2_2 X69 X70) |
% 20.94/20.43                       bnd_c7_1 X69) |
% 20.94/20.43                      ~ bnd_c5_1 X69))) &
% 20.94/20.43                ((~ bnd_c7_0 | bnd_c10_0) | bnd_c2_0)) &
% 20.94/20.43               ((~ bnd_c4_0 | ~ bnd_c2_0) | bnd_c6_0)) &
% 20.94/20.43              ((bnd_c10_0 | bnd_c2_0) |
% 20.94/20.43               (ALL X71.
% 20.94/20.43                   bnd_ndr1_0 -->
% 20.94/20.43                   (~ bnd_c8_1 X71 |
% 20.94/20.43                    (ALL X72.
% 20.94/20.43                        bnd_ndr1_1 X71 -->
% 20.94/20.43                        (~ bnd_c4_2 X71 X72 | ~ bnd_c10_2 X71 X72) |
% 20.94/20.43                        ~ bnd_c6_2 X71 X72)) |
% 20.94/20.43                   ~ bnd_c2_1 X71))) &
% 20.94/20.43             ((bnd_c3_0 |
% 20.94/20.43               ((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a1687) &
% 20.94/20.43                (ALL X73.
% 20.94/20.43                    bnd_ndr1_1 bnd_a1687 -->
% 20.94/20.43                    (bnd_c1_2 bnd_a1687 X73 | bnd_c2_2 bnd_a1687 X73) |
% 20.94/20.43                    bnd_c8_2 bnd_a1687 X73)) &
% 20.94/20.43               (ALL X74.
% 20.94/20.43                   bnd_ndr1_1 bnd_a1687 -->
% 20.94/20.43                   (bnd_c10_2 bnd_a1687 X74 | bnd_c9_2 bnd_a1687 X74) |
% 20.94/20.43                   ~ bnd_c6_2 bnd_a1687 X74)) |
% 20.94/20.43              bnd_c7_0)) &
% 20.94/20.43            ((~ bnd_c3_0 |
% 20.94/20.43              ((bnd_ndr1_0 & ~ bnd_c6_1 bnd_a1688) & bnd_c8_1 bnd_a1688) &
% 20.94/20.43              (ALL X75.
% 20.94/20.43                  bnd_ndr1_1 bnd_a1688 -->
% 20.94/20.43                  (~ bnd_c5_2 bnd_a1688 X75 | ~ bnd_c2_2 bnd_a1688 X75) |
% 20.94/20.43                  ~ bnd_c7_2 bnd_a1688 X75)) |
% 20.94/20.43             ~ bnd_c8_0)) &
% 20.94/20.43           ((bnd_c4_0 |
% 20.94/20.43             (ALL X76.
% 20.94/20.43                 bnd_ndr1_0 -->
% 20.94/20.43                 ((ALL X77.
% 20.94/20.43                      bnd_ndr1_1 X76 -->
% 20.94/20.43                      (bnd_c10_2 X76 X77 | ~ bnd_c5_2 X76 X77) |
% 20.94/20.43                      bnd_c2_2 X76 X77) |
% 20.94/20.43                  ~ bnd_c1_1 X76) |
% 20.94/20.43                 (ALL X78.
% 20.94/20.43                     bnd_ndr1_1 X76 -->
% 20.94/20.43                     bnd_c5_2 X76 X78 | ~ bnd_c8_2 X76 X78))) |
% 20.94/20.43            (ALL X79.
% 20.94/20.43                bnd_ndr1_0 -->
% 20.94/20.43                (bnd_c1_1 X79 | ~ bnd_c5_1 X79) |
% 20.94/20.43                (ALL X80.
% 20.94/20.43                    bnd_ndr1_1 X79 -->
% 20.94/20.43                    (~ bnd_c3_2 X79 X80 | ~ bnd_c7_2 X79 X80) |
% 20.94/20.43                    ~ bnd_c9_2 X79 X80)))) &
% 20.94/20.43          (((ALL X81.
% 20.94/20.43                bnd_ndr1_0 -->
% 20.94/20.43                ((bnd_ndr1_1 X81 & ~ bnd_c3_2 X81 bnd_a1689) &
% 20.94/20.43                 ~ bnd_c9_2 X81 bnd_a1689) &
% 20.94/20.43                bnd_c1_2 X81 bnd_a1689 |
% 20.94/20.43                ((bnd_ndr1_1 X81 & ~ bnd_c2_2 X81 bnd_a1690) &
% 20.94/20.43                 bnd_c7_2 X81 bnd_a1690) &
% 20.94/20.43                bnd_c6_2 X81 bnd_a1690) |
% 20.94/20.43            bnd_c8_0) |
% 20.94/20.43           bnd_c10_0)) &
% 20.94/20.43         (~ bnd_c3_0 | bnd_c2_0)) &
% 20.94/20.43        (((ALL X82.
% 20.94/20.43              bnd_ndr1_0 -->
% 20.94/20.43              (bnd_c8_1 X82 | bnd_c10_1 X82) | ~ bnd_c9_1 X82) |
% 20.94/20.43          bnd_c4_0) |
% 20.94/20.43         bnd_c7_0)) &
% 20.94/20.43       ((bnd_c6_0 |
% 20.94/20.43         (ALL X83.
% 20.94/20.43             bnd_ndr1_0 -->
% 20.94/20.43             ~ bnd_c5_1 X83 |
% 20.94/20.43             (ALL X84.
% 20.94/20.43                 bnd_ndr1_1 X83 -->
% 20.94/20.43                 (bnd_c1_2 X83 X84 | bnd_c2_2 X83 X84) |
% 20.94/20.43                 ~ bnd_c10_2 X83 X84))) |
% 20.94/20.43        ~ bnd_c5_0)) &
% 20.94/20.43      ((bnd_c4_0 |
% 20.94/20.43        (ALL X85.
% 20.94/20.43            bnd_ndr1_0 -->
% 20.94/20.43            (ALL X86.
% 20.94/20.43                bnd_ndr1_1 X85 -->
% 20.94/20.43                (bnd_c7_2 X85 X86 | ~ bnd_c4_2 X85 X86) |
% 20.94/20.43                ~ bnd_c8_2 X85 X86) |
% 20.94/20.43            bnd_c8_1 X85)) |
% 20.94/20.43       ((bnd_ndr1_0 &
% 20.94/20.43         (ALL X87.
% 20.94/20.43             bnd_ndr1_1 bnd_a1691 -->
% 20.94/20.43             (~ bnd_c7_2 bnd_a1691 X87 | ~ bnd_c9_2 bnd_a1691 X87) |
% 20.94/20.43             ~ bnd_c5_2 bnd_a1691 X87)) &
% 20.94/20.43        ~ bnd_c6_1 bnd_a1691) &
% 20.94/20.43       ~ bnd_c1_1 bnd_a1691)) &
% 20.94/20.43     (((((((bnd_ndr1_0 &
% 20.94/20.43            (ALL X88.
% 20.94/20.43                bnd_ndr1_1 bnd_a1692 -->
% 20.94/20.43                (bnd_c3_2 bnd_a1692 X88 | bnd_c9_2 bnd_a1692 X88) |
% 20.94/20.43                ~ bnd_c6_2 bnd_a1692 X88)) &
% 20.94/20.43           ~ bnd_c8_1 bnd_a1692) &
% 20.94/20.43          bnd_ndr1_1 bnd_a1692) &
% 20.94/20.43         bnd_c4_2 bnd_a1692 bnd_a1693) &
% 20.94/20.43        ~ bnd_c9_2 bnd_a1692 bnd_a1693) &
% 20.94/20.43       bnd_c10_2 bnd_a1692 bnd_a1693 |
% 20.94/20.43       ((bnd_ndr1_0 & bnd_c9_1 bnd_a1694) & ~ bnd_c6_1 bnd_a1694) &
% 20.94/20.43       (ALL X89.
% 20.94/20.43           bnd_ndr1_1 bnd_a1694 -->
% 20.94/20.43           (bnd_c6_2 bnd_a1694 X89 | ~ bnd_c8_2 bnd_a1694 X89) |
% 20.94/20.43           ~ bnd_c4_2 bnd_a1694 X89)) |
% 20.94/20.43      ((((((((bnd_ndr1_0 & ~ bnd_c9_1 bnd_a1695) & bnd_ndr1_1 bnd_a1695) &
% 20.94/20.43            bnd_c8_2 bnd_a1695 bnd_a1696) &
% 20.94/20.43           ~ bnd_c1_2 bnd_a1695 bnd_a1696) &
% 20.94/20.43          ~ bnd_c9_2 bnd_a1695 bnd_a1696) &
% 20.94/20.43         bnd_ndr1_1 bnd_a1695) &
% 20.94/20.43        ~ bnd_c2_2 bnd_a1695 bnd_a1697) &
% 20.94/20.43       bnd_c8_2 bnd_a1695 bnd_a1697) &
% 20.94/20.43      ~ bnd_c10_2 bnd_a1695 bnd_a1697)) &
% 20.94/20.43    ((bnd_c2_0 |
% 20.94/20.43      (ALL X90.
% 20.94/20.43          bnd_ndr1_0 --> (bnd_c10_1 X90 | ~ bnd_c3_1 X90) | bnd_c8_1 X90)) |
% 20.94/20.43     bnd_c3_0)) &
% 20.94/20.43   (((ALL X91.
% 20.94/20.43         bnd_ndr1_0 -->
% 20.94/20.43         (bnd_c7_1 X91 | bnd_c9_1 X91) |
% 20.94/20.43         (ALL X92.
% 20.94/20.43             bnd_ndr1_1 X91 -->
% 20.94/20.43             (bnd_c7_2 X91 X92 | bnd_c10_2 X91 X92) | bnd_c3_2 X91 X92)) |
% 20.94/20.43     (bnd_ndr1_0 & ~ bnd_c6_1 bnd_a1698) & ~ bnd_c3_1 bnd_a1698) |
% 20.94/20.43    (ALL X93.
% 20.94/20.43        bnd_ndr1_0 -->
% 20.94/20.43        (((bnd_ndr1_1 X93 & ~ bnd_c9_2 X93 bnd_a1699) &
% 20.94/20.43          ~ bnd_c8_2 X93 bnd_a1699) &
% 20.94/20.43         ~ bnd_c4_2 X93 bnd_a1699 |
% 20.94/20.43         ~ bnd_c8_1 X93) |
% 20.94/20.43        ~ bnd_c10_1 X93))) &
% 20.94/20.43  ((bnd_c1_0 |
% 20.94/20.43    (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1700) & bnd_c4_2 bnd_a1700 bnd_a1701) &
% 20.94/20.43       bnd_c9_2 bnd_a1700 bnd_a1701) &
% 20.94/20.43      ~ bnd_c7_2 bnd_a1700 bnd_a1701) &
% 20.94/20.43     (ALL X94.
% 20.94/20.43         bnd_ndr1_1 bnd_a1700 -->
% 20.94/20.43         (~ bnd_c3_2 bnd_a1700 X94 | ~ bnd_c10_2 bnd_a1700 X94) |
% 20.94/20.43         bnd_c6_2 bnd_a1700 X94)) &
% 20.94/20.43    ~ bnd_c7_1 bnd_a1700) |
% 20.94/20.43   ~ bnd_c10_0)) &
% 20.94/20.43                                       (((((((bnd_ndr1_0 &
% 20.94/20.43        (ALL X95.
% 20.94/20.43            bnd_ndr1_1 bnd_a1702 -->
% 20.94/20.43            (~ bnd_c8_2 bnd_a1702 X95 | bnd_c6_2 bnd_a1702 X95) |
% 20.94/20.43            bnd_c5_2 bnd_a1702 X95)) &
% 20.94/20.43       bnd_ndr1_1 bnd_a1702) &
% 20.94/20.43      bnd_c10_2 bnd_a1702 bnd_a1703) &
% 20.94/20.43     ~ bnd_c5_2 bnd_a1702 bnd_a1703) &
% 20.94/20.43    ~ bnd_c9_2 bnd_a1702 bnd_a1703) &
% 20.94/20.43   (ALL X96.
% 20.94/20.43       bnd_ndr1_1 bnd_a1702 -->
% 20.94/20.43       (~ bnd_c4_2 bnd_a1702 X96 | ~ bnd_c1_2 bnd_a1702 X96) |
% 20.94/20.43       bnd_c2_2 bnd_a1702 X96) |
% 20.94/20.43   ~ bnd_c7_0) |
% 20.94/20.43  ~ bnd_c6_0)) &
% 20.94/20.43                                      ((~ bnd_c9_0 | bnd_c3_0) | bnd_c2_0)) &
% 20.94/20.43                                     (((bnd_ndr1_0 &
% 20.94/20.43  (ALL X97.
% 20.94/20.43      bnd_ndr1_1 bnd_a1704 -->
% 20.94/20.43      (~ bnd_c5_2 bnd_a1704 X97 | ~ bnd_c6_2 bnd_a1704 X97) |
% 20.94/20.43      bnd_c3_2 bnd_a1704 X97)) &
% 20.94/20.43                                       bnd_c1_1 bnd_a1704 |
% 20.94/20.43                                       bnd_c1_0) |
% 20.94/20.43                                      bnd_c10_0)) &
% 20.94/20.43                                    (bnd_c5_0 | ~ bnd_c10_0)) &
% 20.94/20.43                                   ((~ bnd_c3_0 | ~ bnd_c5_0) |
% 20.94/20.43                                    ((bnd_ndr1_0 & ~ bnd_c3_1 bnd_a1705) &
% 20.94/20.43                                     ~ bnd_c9_1 bnd_a1705) &
% 20.94/20.43                                    ~ bnd_c1_1 bnd_a1705)) &
% 20.94/20.43                                  (((((((bnd_ndr1_0 & bnd_c4_1 bnd_a1706) &
% 20.94/20.43  (ALL X98.
% 20.94/20.43      bnd_ndr1_1 bnd_a1706 -->
% 20.94/20.43      (~ bnd_c2_2 bnd_a1706 X98 | ~ bnd_c5_2 bnd_a1706 X98) |
% 20.94/20.43      ~ bnd_c9_2 bnd_a1706 X98)) &
% 20.94/20.43                                       bnd_ndr1_1 bnd_a1706) &
% 20.94/20.43                                      bnd_c6_2 bnd_a1706 bnd_a1707) &
% 20.94/20.43                                     ~ bnd_c7_2 bnd_a1706 bnd_a1707) &
% 20.94/20.43                                    ~ bnd_c8_2 bnd_a1706 bnd_a1707 |
% 20.94/20.43                                    ((bnd_ndr1_0 &
% 20.94/20.43                                      (ALL X99.
% 20.94/20.43    bnd_ndr1_1 bnd_a1708 -->
% 20.94/20.43    (bnd_c6_2 bnd_a1708 X99 | ~ bnd_c4_2 bnd_a1708 X99) |
% 20.94/20.43    ~ bnd_c2_2 bnd_a1708 X99)) &
% 20.94/20.43                                     (ALL X100.
% 20.94/20.43   bnd_ndr1_1 bnd_a1708 -->
% 20.94/20.43   (bnd_c10_2 bnd_a1708 X100 | bnd_c4_2 bnd_a1708 X100) |
% 20.94/20.43   bnd_c1_2 bnd_a1708 X100)) &
% 20.94/20.43                                    (ALL X101.
% 20.94/20.43  bnd_ndr1_1 bnd_a1708 -->
% 20.94/20.43  (bnd_c9_2 bnd_a1708 X101 | bnd_c5_2 bnd_a1708 X101) |
% 20.94/20.43  bnd_c6_2 bnd_a1708 X101)) |
% 20.94/20.43                                   bnd_c1_0)) &
% 20.94/20.43                                 ((bnd_c2_0 | bnd_c3_0) |
% 20.94/20.43                                  (ALL X102.
% 20.94/20.43                                      bnd_ndr1_0 -->
% 20.94/20.43                                      (bnd_c7_1 X102 | bnd_c4_1 X102) |
% 20.94/20.43                                      bnd_c2_1 X102))) &
% 20.94/20.43                                (bnd_c9_0 | ~ bnd_c4_0)) &
% 20.94/20.43                               (((ALL X103.
% 20.94/20.43                                     bnd_ndr1_0 -->
% 20.94/20.43                                     (((bnd_ndr1_1 X103 &
% 20.94/20.43  ~ bnd_c5_2 X103 bnd_a1709) &
% 20.94/20.43                                       ~ bnd_c2_2 X103 bnd_a1709) &
% 20.94/20.43                                      bnd_c6_2 X103 bnd_a1709 |
% 20.94/20.43                                      bnd_c8_1 X103) |
% 20.94/20.43                                     bnd_c2_1 X103) |
% 20.94/20.43                                 (ALL X104.
% 20.94/20.43                                     bnd_ndr1_0 -->
% 20.94/20.43                                     (bnd_c8_1 X104 |
% 20.94/20.43                                      (bnd_ndr1_1 X104 &
% 20.94/20.43                                       bnd_c1_2 X104 bnd_a1710) &
% 20.94/20.43                                      bnd_c3_2 X104 bnd_a1710) |
% 20.94/20.43                                     bnd_c2_1 X104)) |
% 20.94/20.43                                ((bnd_ndr1_0 & bnd_c1_1 bnd_a1711) &
% 20.94/20.43                                 bnd_c9_1 bnd_a1711) &
% 20.94/20.43                                (ALL X105.
% 20.94/20.43                                    bnd_ndr1_1 bnd_a1711 -->
% 20.94/20.43                                    (~ bnd_c10_2 bnd_a1711 X105 |
% 20.94/20.43                                     ~ bnd_c3_2 bnd_a1711 X105) |
% 20.94/20.43                                    ~ bnd_c6_2 bnd_a1711 X105))) &
% 20.94/20.43                              ((bnd_c2_0 |
% 20.94/20.43                                (ALL X106.
% 20.94/20.43                                    bnd_ndr1_0 -->
% 20.94/20.43                                    ((ALL X107.
% 20.94/20.43   bnd_ndr1_1 X106 --> ~ bnd_c10_2 X106 X107 | bnd_c2_2 X106 X107) |
% 20.94/20.43                                     ~ bnd_c1_1 X106) |
% 20.94/20.43                                    ~ bnd_c2_1 X106)) |
% 20.94/20.43                               (ALL X108.
% 20.94/20.43                                   bnd_ndr1_0 -->
% 20.94/20.43                                   (~ bnd_c3_1 X108 |
% 20.94/20.43                                    (ALL X109.
% 20.94/20.43  bnd_ndr1_1 X108 --> bnd_c1_2 X108 X109 | ~ bnd_c2_2 X108 X109)) |
% 20.94/20.43                                   ~ bnd_c2_1 X108))) &
% 20.94/20.43                             (((((((bnd_ndr1_0 & bnd_c2_1 bnd_a1712) &
% 20.94/20.43                                   (ALL X110.
% 20.94/20.43                                       bnd_ndr1_1 bnd_a1712 -->
% 20.94/20.43                                       (~ bnd_c4_2 bnd_a1712 X110 |
% 20.94/20.43  ~ bnd_c1_2 bnd_a1712 X110) |
% 20.94/20.43                                       ~ bnd_c5_2 bnd_a1712 X110)) &
% 20.94/20.43                                  bnd_ndr1_1 bnd_a1712) &
% 20.94/20.43                                 ~ bnd_c7_2 bnd_a1712 bnd_a1713) &
% 20.94/20.43                                ~ bnd_c10_2 bnd_a1712 bnd_a1713) &
% 20.94/20.43                               bnd_c4_2 bnd_a1712 bnd_a1713 |
% 20.94/20.43                               bnd_c10_0) |
% 20.94/20.43                              (ALL X111.
% 20.94/20.43                                  bnd_ndr1_0 -->
% 20.94/20.43                                  (~ bnd_c10_1 X111 |
% 20.94/20.43                                   ((bnd_ndr1_1 X111 &
% 20.94/20.43                                     bnd_c4_2 X111 bnd_a1714) &
% 20.94/20.43                                    bnd_c3_2 X111 bnd_a1714) &
% 20.94/20.43                                   bnd_c2_2 X111 bnd_a1714) |
% 20.94/20.43                                  ~ bnd_c5_1 X111))) &
% 20.94/20.43                            ((bnd_c3_0 |
% 20.94/20.43                              (ALL X112.
% 20.94/20.43                                  bnd_ndr1_0 -->
% 20.94/20.43                                  ~ bnd_c10_1 X112 | ~ bnd_c9_1 X112)) |
% 20.94/20.43                             (ALL X113.
% 20.94/20.43                                 bnd_ndr1_0 -->
% 20.94/20.43                                 (((bnd_ndr1_1 X113 &
% 20.94/20.43                                    ~ bnd_c10_2 X113 bnd_a1715) &
% 20.94/20.43                                   bnd_c3_2 X113 bnd_a1715) &
% 20.94/20.43                                  ~ bnd_c8_2 X113 bnd_a1715 |
% 20.94/20.43                                  (ALL X114.
% 20.94/20.43                                      bnd_ndr1_1 X113 -->
% 20.94/20.43                                      (~ bnd_c1_2 X113 X114 |
% 20.94/20.43                                       ~ bnd_c4_2 X113 X114) |
% 20.94/20.43                                      ~ bnd_c3_2 X113 X114)) |
% 20.94/20.43                                 bnd_c9_1 X113))) &
% 20.94/20.43                           (((ALL X115.
% 20.94/20.43                                 bnd_ndr1_0 -->
% 20.94/20.43                                 ((ALL X116.
% 20.94/20.43                                      bnd_ndr1_1 X115 -->
% 20.94/20.43                                      ~ bnd_c3_2 X115 X116 |
% 20.94/20.43                                      bnd_c1_2 X115 X116) |
% 20.94/20.43                                  ((bnd_ndr1_1 X115 &
% 20.94/20.43                                    bnd_c7_2 X115 bnd_a1716) &
% 20.94/20.43                                   bnd_c10_2 X115 bnd_a1716) &
% 20.94/20.43                                  bnd_c8_2 X115 bnd_a1716) |
% 20.94/20.43                                 ~ bnd_c7_1 X115) |
% 20.94/20.43                             ~ bnd_c2_0) |
% 20.94/20.43                            (ALL X117.
% 20.94/20.43                                bnd_ndr1_0 -->
% 20.94/20.43                                (~ bnd_c8_1 X117 |
% 20.94/20.43                                 (bnd_ndr1_1 X117 &
% 20.94/20.43                                  ~ bnd_c9_2 X117 bnd_a1717) &
% 20.94/20.43                                 ~ bnd_c10_2 X117 bnd_a1717) |
% 20.94/20.43                                (ALL X118.
% 20.94/20.43                                    bnd_ndr1_1 X117 -->
% 20.94/20.43                                    (bnd_c6_2 X117 X118 |
% 20.94/20.43                                     ~ bnd_c10_2 X117 X118) |
% 20.94/20.43                                    bnd_c3_2 X117 X118)))) &
% 20.94/20.43                          ((~ bnd_c4_0 | bnd_c1_0) |
% 20.94/20.43                           (((((bnd_ndr1_0 & bnd_c2_1 bnd_a1718) &
% 20.94/20.43                               bnd_c6_1 bnd_a1718) &
% 20.94/20.43                              bnd_ndr1_1 bnd_a1718) &
% 20.94/20.43                             bnd_c7_2 bnd_a1718 bnd_a1719) &
% 20.94/20.43                            ~ bnd_c5_2 bnd_a1718 bnd_a1719) &
% 20.94/20.43                           bnd_c6_2 bnd_a1718 bnd_a1719)) &
% 20.94/20.43                         ((~ bnd_c4_0 | bnd_c3_0) | ~ bnd_c10_0)) &
% 20.94/20.43                        (((ALL X119.
% 20.94/20.43                              bnd_ndr1_0 -->
% 20.94/20.43                              (bnd_c9_1 X119 |
% 20.94/20.43                               (bnd_ndr1_1 X119 & bnd_c3_2 X119 bnd_a1720) &
% 20.94/20.43                               bnd_c2_2 X119 bnd_a1720) |
% 20.94/20.43                              (ALL X120.
% 20.94/20.43                                  bnd_ndr1_1 X119 -->
% 20.94/20.43                                  (bnd_c8_2 X119 X120 | bnd_c4_2 X119 X120) |
% 20.94/20.43                                  bnd_c10_2 X119 X120)) |
% 20.94/20.43                          (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1721) &
% 20.94/20.43                              ~ bnd_c8_2 bnd_a1721 bnd_a1722) &
% 20.94/20.43                             ~ bnd_c4_2 bnd_a1721 bnd_a1722) &
% 20.94/20.43                            ~ bnd_c2_2 bnd_a1721 bnd_a1722) &
% 20.94/20.43                           ~ bnd_c3_1 bnd_a1721) &
% 20.94/20.43                          (ALL X121.
% 20.94/20.43                              bnd_ndr1_1 bnd_a1721 -->
% 20.94/20.43                              (~ bnd_c9_2 bnd_a1721 X121 |
% 20.94/20.43                               ~ bnd_c5_2 bnd_a1721 X121) |
% 20.94/20.43                              bnd_c4_2 bnd_a1721 X121)) |
% 20.94/20.43                         (((((bnd_ndr1_0 & ~ bnd_c5_1 bnd_a1723) &
% 20.94/20.43                             (ALL X122.
% 20.94/20.43                                 bnd_ndr1_1 bnd_a1723 -->
% 20.94/20.43                                 (bnd_c6_2 bnd_a1723 X122 |
% 20.94/20.43                                  ~ bnd_c3_2 bnd_a1723 X122) |
% 20.94/20.43                                 bnd_c9_2 bnd_a1723 X122)) &
% 20.94/20.43                            bnd_ndr1_1 bnd_a1723) &
% 20.94/20.43                           bnd_c9_2 bnd_a1723 bnd_a1724) &
% 20.94/20.43                          bnd_c5_2 bnd_a1723 bnd_a1724) &
% 20.94/20.43                         bnd_c7_2 bnd_a1723 bnd_a1724)) &
% 20.94/20.43                       (((bnd_ndr1_0 & ~ bnd_c8_1 bnd_a1725) &
% 20.94/20.43                         ~ bnd_c3_1 bnd_a1725) &
% 20.94/20.43                        bnd_c9_1 bnd_a1725 |
% 20.94/20.43                        (ALL X123.
% 20.94/20.43                            bnd_ndr1_0 -->
% 20.94/20.43                            (bnd_c3_1 X123 | ~ bnd_c10_1 X123) |
% 20.94/20.43                            ~ bnd_c9_1 X123))) &
% 20.94/20.43                      ((ALL X124.
% 20.94/20.43                           bnd_ndr1_0 -->
% 20.94/20.43                           (~ bnd_c6_1 X124 | bnd_c9_1 X124) |
% 20.94/20.43                           ~ bnd_c5_1 X124) |
% 20.94/20.43                       (((((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a1726) &
% 20.94/20.43                           bnd_ndr1_1 bnd_a1726) &
% 20.94/20.43                          bnd_c4_2 bnd_a1726 bnd_a1727) &
% 20.94/20.43                         ~ bnd_c7_2 bnd_a1726 bnd_a1727) &
% 20.94/20.43                        bnd_c3_2 bnd_a1726 bnd_a1727) &
% 20.94/20.43                       (ALL X125.
% 20.94/20.43                           bnd_ndr1_1 bnd_a1726 -->
% 20.94/20.43                           (~ bnd_c2_2 bnd_a1726 X125 |
% 20.94/20.43                            ~ bnd_c4_2 bnd_a1726 X125) |
% 20.94/20.43                           ~ bnd_c8_2 bnd_a1726 X125))) &
% 20.94/20.43                     ((bnd_c5_0 | ~ bnd_c7_0) | ~ bnd_c3_0)) &
% 20.94/20.43                    (((ALL X126.
% 20.94/20.43                          bnd_ndr1_0 -->
% 20.94/20.43                          (((bnd_ndr1_1 X126 & ~ bnd_c3_2 X126 bnd_a1728) &
% 20.94/20.43                            ~ bnd_c9_2 X126 bnd_a1728) &
% 20.94/20.43                           bnd_c5_2 X126 bnd_a1728 |
% 20.94/20.43                           bnd_c1_1 X126) |
% 20.94/20.43                          (ALL X127.
% 20.94/20.43                              bnd_ndr1_1 X126 -->
% 20.94/20.43                              (bnd_c2_2 X126 X127 | ~ bnd_c7_2 X126 X127) |
% 20.94/20.43                              bnd_c1_2 X126 X127)) |
% 20.94/20.43                      ((bnd_ndr1_0 & bnd_c5_1 bnd_a1729) &
% 20.94/20.43                       bnd_c3_1 bnd_a1729) &
% 20.94/20.43                      ~ bnd_c9_1 bnd_a1729) |
% 20.94/20.43                     (((((bnd_ndr1_0 & ~ bnd_c6_1 bnd_a1730) &
% 20.94/20.43                         bnd_ndr1_1 bnd_a1730) &
% 20.94/20.43                        bnd_c9_2 bnd_a1730 bnd_a1731) &
% 20.94/20.43                       bnd_c5_2 bnd_a1730 bnd_a1731) &
% 20.94/20.43                      bnd_c4_2 bnd_a1730 bnd_a1731) &
% 20.94/20.43                     (ALL X128.
% 20.94/20.43                         bnd_ndr1_1 bnd_a1730 -->
% 20.94/20.43                         (~ bnd_c2_2 bnd_a1730 X128 |
% 20.94/20.43                          bnd_c4_2 bnd_a1730 X128) |
% 20.94/20.43                         bnd_c1_2 bnd_a1730 X128))) &
% 20.94/20.43                   ((bnd_c2_0 | bnd_c10_0) |
% 20.94/20.43                    (ALL X129.
% 20.94/20.43                        bnd_ndr1_0 -->
% 20.94/20.43                        ((ALL X130.
% 20.94/20.43                             bnd_ndr1_1 X129 -->
% 20.94/20.43                             (~ bnd_c10_2 X129 X130 | bnd_c3_2 X129 X130) |
% 20.94/20.43                             ~ bnd_c6_2 X129 X130) |
% 20.94/20.43                         ~ bnd_c10_1 X129) |
% 20.94/20.43                        ((bnd_ndr1_1 X129 & bnd_c9_2 X129 bnd_a1732) &
% 20.94/20.43                         ~ bnd_c8_2 X129 bnd_a1732) &
% 20.94/20.43                        bnd_c4_2 X129 bnd_a1732))) &
% 20.94/20.43                  ((((((((((bnd_ndr1_0 & ~ bnd_c7_1 bnd_a1733) &
% 20.94/20.43                           bnd_ndr1_1 bnd_a1733) &
% 20.94/20.43                          bnd_c7_2 bnd_a1733 bnd_a1734) &
% 20.94/20.43                         ~ bnd_c6_2 bnd_a1733 bnd_a1734) &
% 20.94/20.43                        bnd_c8_2 bnd_a1733 bnd_a1734) &
% 20.94/20.43                       bnd_ndr1_1 bnd_a1733) &
% 20.94/20.43                      bnd_c5_2 bnd_a1733 bnd_a1735) &
% 20.94/20.43                     bnd_c1_2 bnd_a1733 bnd_a1735) &
% 20.94/20.43                    bnd_c9_2 bnd_a1733 bnd_a1735 |
% 20.94/20.43                    ((bnd_ndr1_0 & bnd_c6_1 bnd_a1736) &
% 20.94/20.43                     ~ bnd_c1_1 bnd_a1736) &
% 20.94/20.43                    ~ bnd_c8_1 bnd_a1736) |
% 20.94/20.43                   (ALL X131.
% 20.94/20.43                       bnd_ndr1_0 -->
% 20.94/20.43                       (~ bnd_c10_1 X131 |
% 20.94/20.43                        (bnd_ndr1_1 X131 & ~ bnd_c10_2 X131 bnd_a1737) &
% 20.94/20.43                        bnd_c8_2 X131 bnd_a1737) |
% 20.94/20.43                       ((bnd_ndr1_1 X131 & bnd_c9_2 X131 bnd_a1738) &
% 20.94/20.43                        ~ bnd_c4_2 X131 bnd_a1738) &
% 20.94/20.43                       ~ bnd_c2_2 X131 bnd_a1738))) &
% 20.94/20.43                 ((~ bnd_c9_0 | bnd_c3_0) |
% 20.94/20.43                  ((bnd_ndr1_0 & bnd_c7_1 bnd_a1739) & bnd_c2_1 bnd_a1739) &
% 20.94/20.43                  bnd_c6_1 bnd_a1739)) &
% 20.94/20.43                ((bnd_c4_0 | ~ bnd_c7_0) |
% 20.94/20.43                 (ALL X132.
% 20.94/20.43                     bnd_ndr1_0 -->
% 20.94/20.43                     (~ bnd_c8_1 X132 | ~ bnd_c2_1 X132) |
% 20.94/20.43                     (ALL X133.
% 20.94/20.43                         bnd_ndr1_1 X132 -->
% 20.94/20.43                         (~ bnd_c6_2 X132 X133 | bnd_c7_2 X132 X133) |
% 20.94/20.43                         bnd_c10_2 X132 X133)))) &
% 20.94/20.43               (~ bnd_c8_0 | bnd_c3_0)) &
% 20.94/20.43              (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1740) &
% 20.94/20.43                    ~ bnd_c4_2 bnd_a1740 bnd_a1741) &
% 20.94/20.43                   bnd_c10_2 bnd_a1740 bnd_a1741) &
% 20.94/20.43                  bnd_c7_2 bnd_a1740 bnd_a1741) &
% 20.94/20.43                 ~ bnd_c1_1 bnd_a1740) &
% 20.94/20.43                bnd_c2_1 bnd_a1740 |
% 20.94/20.43                ~ bnd_c10_0) |
% 20.94/20.43               (ALL X134.
% 20.94/20.43                   bnd_ndr1_0 -->
% 20.94/20.43                   (((bnd_ndr1_1 X134 & bnd_c7_2 X134 bnd_a1742) &
% 20.94/20.43                     bnd_c2_2 X134 bnd_a1742) &
% 20.94/20.43                    bnd_c8_2 X134 bnd_a1742 |
% 20.94/20.43                    ~ bnd_c10_1 X134) |
% 20.94/20.43                   ~ bnd_c4_1 X134))) &
% 20.94/20.43             (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1743) &
% 20.94/20.43                   ~ bnd_c1_2 bnd_a1743 bnd_a1744) &
% 20.94/20.43                  bnd_c2_2 bnd_a1743 bnd_a1744) &
% 20.94/20.43                 bnd_c8_2 bnd_a1743 bnd_a1744) &
% 20.94/20.43                (ALL X135.
% 20.94/20.43                    bnd_ndr1_1 bnd_a1743 -->
% 20.94/20.43                    (~ bnd_c1_2 bnd_a1743 X135 | bnd_c8_2 bnd_a1743 X135) |
% 20.94/20.43                    ~ bnd_c5_2 bnd_a1743 X135)) &
% 20.94/20.43               (ALL X136.
% 20.94/20.43                   bnd_ndr1_1 bnd_a1743 -->
% 20.94/20.43                   (~ bnd_c3_2 bnd_a1743 X136 | bnd_c4_2 bnd_a1743 X136) |
% 20.94/20.43                   bnd_c2_2 bnd_a1743 X136) |
% 20.94/20.43               (((((bnd_ndr1_0 &
% 20.94/20.43                    (ALL X137.
% 20.94/20.43                        bnd_ndr1_1 bnd_a1745 -->
% 20.94/20.43                        (~ bnd_c8_2 bnd_a1745 X137 |
% 20.94/20.43                         bnd_c4_2 bnd_a1745 X137) |
% 20.94/20.43                        ~ bnd_c6_2 bnd_a1745 X137)) &
% 20.94/20.43                   bnd_ndr1_1 bnd_a1745) &
% 20.94/20.43                  bnd_c1_2 bnd_a1745 bnd_a1746) &
% 20.94/20.43                 ~ bnd_c6_2 bnd_a1745 bnd_a1746) &
% 20.94/20.43                ~ bnd_c4_2 bnd_a1745 bnd_a1746) &
% 20.94/20.43               ~ bnd_c8_1 bnd_a1745) |
% 20.94/20.43              ~ bnd_c10_0)) &
% 20.94/20.43            ((~ bnd_c6_0 |
% 20.94/20.43              (ALL X138.
% 20.94/20.43                  bnd_ndr1_0 -->
% 20.94/20.43                  (bnd_ndr1_1 X138 & ~ bnd_c1_2 X138 bnd_a1747 |
% 20.94/20.43                   bnd_c5_1 X138) |
% 20.94/20.43                  ~ bnd_c2_1 X138)) |
% 20.94/20.43             ((bnd_ndr1_0 &
% 20.94/20.43               (ALL X139.
% 20.94/20.43                   bnd_ndr1_1 bnd_a1748 -->
% 20.94/20.43                   ~ bnd_c1_2 bnd_a1748 X139 | bnd_c2_2 bnd_a1748 X139)) &
% 20.94/20.43              bnd_c4_1 bnd_a1748) &
% 20.94/20.43             bnd_c8_1 bnd_a1748)) &
% 20.94/20.43           (((ALL X140.
% 20.94/20.43                 bnd_ndr1_0 -->
% 20.94/20.43                 (((bnd_ndr1_1 X140 & bnd_c8_2 X140 bnd_a1749) &
% 20.94/20.43                   ~ bnd_c7_2 X140 bnd_a1749) &
% 20.94/20.43                  bnd_c5_2 X140 bnd_a1749 |
% 20.94/20.43                  bnd_c2_1 X140) |
% 20.94/20.43                 (ALL X141.
% 20.94/20.43                     bnd_ndr1_1 X140 -->
% 20.94/20.43                     ~ bnd_c1_2 X140 X141 | ~ bnd_c8_2 X140 X141)) |
% 20.94/20.43             ((bnd_ndr1_0 & bnd_c6_1 bnd_a1750) &
% 20.94/20.43              (ALL X142.
% 20.94/20.43                  bnd_ndr1_1 bnd_a1750 -->
% 20.94/20.43                  (bnd_c2_2 bnd_a1750 X142 | ~ bnd_c10_2 bnd_a1750 X142) |
% 20.94/20.43                  ~ bnd_c8_2 bnd_a1750 X142)) &
% 20.94/20.43             (ALL X143.
% 20.94/20.43                 bnd_ndr1_1 bnd_a1750 -->
% 20.94/20.43                 (~ bnd_c9_2 bnd_a1750 X143 | ~ bnd_c3_2 bnd_a1750 X143) |
% 20.94/20.43                 ~ bnd_c7_2 bnd_a1750 X143)) |
% 20.94/20.43            ~ bnd_c10_0)) &
% 20.94/20.43          ((~ bnd_c10_0 | ~ bnd_c1_0) |
% 20.94/20.43           (ALL X144.
% 20.94/20.43               bnd_ndr1_0 -->
% 20.94/20.43               (~ bnd_c3_1 X144 |
% 20.94/20.43                (ALL X145.
% 20.94/20.43                    bnd_ndr1_1 X144 -->
% 20.94/20.43                    (bnd_c4_2 X144 X145 | bnd_c2_2 X144 X145) |
% 20.94/20.43                    bnd_c5_2 X144 X145)) |
% 20.94/20.43               ((bnd_ndr1_1 X144 & ~ bnd_c1_2 X144 bnd_a1751) &
% 20.94/20.43                bnd_c7_2 X144 bnd_a1751) &
% 20.94/20.43               ~ bnd_c10_2 X144 bnd_a1751))) &
% 20.94/20.43         ((bnd_c1_0 | ~ bnd_c3_0) |
% 20.94/20.43          ((bnd_ndr1_0 &
% 20.94/20.43            (ALL X146.
% 20.94/20.43                bnd_ndr1_1 bnd_a1752 -->
% 20.94/20.43                (~ bnd_c6_2 bnd_a1752 X146 | bnd_c2_2 bnd_a1752 X146) |
% 20.94/20.43                ~ bnd_c1_2 bnd_a1752 X146)) &
% 20.94/20.43           ~ bnd_c8_1 bnd_a1752) &
% 20.94/20.43          ~ bnd_c9_1 bnd_a1752)) &
% 20.94/20.43        (((ALL X147.
% 20.94/20.43              bnd_ndr1_0 -->
% 20.94/20.43              (bnd_c9_1 X147 |
% 20.94/20.43               ((bnd_ndr1_1 X147 & bnd_c8_2 X147 bnd_a1753) &
% 20.94/20.43                ~ bnd_c4_2 X147 bnd_a1753) &
% 20.94/20.43               bnd_c6_2 X147 bnd_a1753) |
% 20.94/20.43              (ALL X148.
% 20.94/20.43                  bnd_ndr1_1 X147 -->
% 20.94/20.43                  (~ bnd_c7_2 X147 X148 | ~ bnd_c3_2 X147 X148) |
% 20.94/20.43                  ~ bnd_c6_2 X147 X148)) |
% 20.94/20.43          (ALL X149.
% 20.94/20.43              bnd_ndr1_0 -->
% 20.94/20.43              (~ bnd_c7_1 X149 |
% 20.94/20.43               ((bnd_ndr1_1 X149 & bnd_c4_2 X149 bnd_a1754) &
% 20.94/20.43                bnd_c8_2 X149 bnd_a1754) &
% 20.94/20.43               bnd_c2_2 X149 bnd_a1754) |
% 20.94/20.43              ((bnd_ndr1_1 X149 & bnd_c2_2 X149 bnd_a1755) &
% 20.94/20.43               bnd_c10_2 X149 bnd_a1755) &
% 20.94/20.43              bnd_c1_2 X149 bnd_a1755)) |
% 20.94/20.43         (ALL X150.
% 20.94/20.43             bnd_ndr1_0 -->
% 20.94/20.43             (~ bnd_c10_1 X150 | ~ bnd_c1_1 X150) | ~ bnd_c9_1 X150))) &
% 20.94/20.43       ((bnd_c1_0 | ~ bnd_c2_0) | bnd_c9_0)) &
% 20.94/20.43      ((bnd_c9_0 |
% 20.94/20.43        (((((bnd_ndr1_0 & bnd_c4_1 bnd_a1756) & bnd_ndr1_1 bnd_a1756) &
% 20.94/20.43           ~ bnd_c2_2 bnd_a1756 bnd_a1757) &
% 20.94/20.43          bnd_c7_2 bnd_a1756 bnd_a1757) &
% 20.94/20.43         ~ bnd_c6_2 bnd_a1756 bnd_a1757) &
% 20.94/20.43        bnd_c2_1 bnd_a1756) |
% 20.94/20.43       (((((bnd_ndr1_0 & ~ bnd_c3_1 bnd_a1758) &
% 20.94/20.43           (ALL X151.
% 20.94/20.43               bnd_ndr1_1 bnd_a1758 -->
% 20.94/20.43               (~ bnd_c4_2 bnd_a1758 X151 | bnd_c6_2 bnd_a1758 X151) |
% 20.94/20.43               ~ bnd_c7_2 bnd_a1758 X151)) &
% 20.94/20.43          bnd_ndr1_1 bnd_a1758) &
% 20.94/20.43         bnd_c3_2 bnd_a1758 bnd_a1759) &
% 20.94/20.43        ~ bnd_c2_2 bnd_a1758 bnd_a1759) &
% 20.94/20.43       ~ bnd_c10_2 bnd_a1758 bnd_a1759)) &
% 20.94/20.43     ((bnd_c9_0 | ~ bnd_c5_0) |
% 20.94/20.43      (ALL X152.
% 20.94/20.43          bnd_ndr1_0 -->
% 20.94/20.43          (~ bnd_c1_1 X152 | ~ bnd_c9_1 X152) |
% 20.94/20.43          ((bnd_ndr1_1 X152 & ~ bnd_c10_2 X152 bnd_a1760) &
% 20.94/20.43           ~ bnd_c4_2 X152 bnd_a1760) &
% 20.94/20.43          ~ bnd_c8_2 X152 bnd_a1760))) &
% 20.94/20.43    (((ALL X153.
% 20.94/20.43          bnd_ndr1_0 -->
% 20.94/20.43          ((ALL X154.
% 20.94/20.43               bnd_ndr1_1 X153 -->
% 20.94/20.43               (~ bnd_c6_2 X153 X154 | bnd_c9_2 X153 X154) |
% 20.94/20.43               bnd_c4_2 X153 X154) |
% 20.94/20.43           ((bnd_ndr1_1 X153 & ~ bnd_c3_2 X153 bnd_a1761) &
% 20.94/20.43            bnd_c5_2 X153 bnd_a1761) &
% 20.94/20.43           ~ bnd_c8_2 X153 bnd_a1761) |
% 20.94/20.43          (ALL X155.
% 20.94/20.43              bnd_ndr1_1 X153 -->
% 20.94/20.43              bnd_c10_2 X153 X155 | ~ bnd_c3_2 X153 X155)) |
% 20.94/20.43      (ALL X156.
% 20.94/20.43          bnd_ndr1_0 -->
% 20.94/20.43          (((bnd_ndr1_1 X156 & ~ bnd_c2_2 X156 bnd_a1762) &
% 20.94/20.43            bnd_c3_2 X156 bnd_a1762) &
% 20.94/20.43           ~ bnd_c10_2 X156 bnd_a1762 |
% 20.94/20.43           ~ bnd_c10_1 X156) |
% 20.94/20.43          ((bnd_ndr1_1 X156 & ~ bnd_c4_2 X156 bnd_a1763) &
% 20.94/20.43           ~ bnd_c7_2 X156 bnd_a1763) &
% 20.94/20.43          bnd_c6_2 X156 bnd_a1763)) |
% 20.94/20.43     (ALL X157.
% 20.94/20.43         bnd_ndr1_0 --> (bnd_c7_1 X157 | bnd_c4_1 X157) | ~ bnd_c1_1 X157))) &
% 20.94/20.43   ((~ bnd_c3_0 | ~ bnd_c5_0) |
% 20.94/20.43    (ALL X158.
% 20.94/20.43        bnd_ndr1_0 -->
% 20.94/20.43        ((ALL X159.
% 20.94/20.43             bnd_ndr1_1 X158 -->
% 20.94/20.43             (~ bnd_c6_2 X158 X159 | ~ bnd_c3_2 X158 X159) |
% 20.94/20.43             bnd_c1_2 X158 X159) |
% 20.94/20.43         ((bnd_ndr1_1 X158 & bnd_c4_2 X158 bnd_a1764) &
% 20.94/20.43          bnd_c2_2 X158 bnd_a1764) &
% 20.94/20.43         bnd_c9_2 X158 bnd_a1764) |
% 20.94/20.43        ((bnd_ndr1_1 X158 & ~ bnd_c3_2 X158 bnd_a1765) &
% 20.94/20.43         ~ bnd_c4_2 X158 bnd_a1765) &
% 20.94/20.43        ~ bnd_c9_2 X158 bnd_a1765))) &
% 20.94/20.43  (((ALL X160.
% 20.94/20.43        bnd_ndr1_0 -->
% 20.94/20.43        ((bnd_ndr1_1 X160 & ~ bnd_c4_2 X160 bnd_a1766) &
% 20.94/20.43         ~ bnd_c7_2 X160 bnd_a1766) &
% 20.94/20.43        bnd_c9_2 X160 bnd_a1766 |
% 20.94/20.43        bnd_c3_1 X160) |
% 20.94/20.43    bnd_c7_0) |
% 20.94/20.43   (ALL X161.
% 20.94/20.43       bnd_ndr1_0 -->
% 20.94/20.43       ((ALL X162.
% 20.94/20.43            bnd_ndr1_1 X161 -->
% 20.94/20.43            (~ bnd_c5_2 X161 X162 | ~ bnd_c9_2 X161 X162) |
% 20.94/20.43            ~ bnd_c10_2 X161 X162) |
% 20.94/20.43        (ALL X163.
% 20.94/20.43            bnd_ndr1_1 X161 --> ~ bnd_c3_2 X161 X163 | bnd_c9_2 X161 X163)) |
% 20.94/20.43       (ALL X164.
% 20.94/20.43           bnd_ndr1_1 X161 -->
% 20.94/20.43           (~ bnd_c9_2 X161 X164 | ~ bnd_c6_2 X161 X164) |
% 20.94/20.43           bnd_c4_2 X161 X164)))) &
% 20.94/20.43                                       bnd_ndr1_0) &
% 20.94/20.43                                      ~ bnd_c7_1 bnd_a1767) &
% 20.94/20.43                                     ~ bnd_c5_1 bnd_a1767) &
% 20.94/20.43                                    (((ALL X165.
% 20.94/20.43    bnd_ndr1_0 --> (~ bnd_c1_1 X165 | ~ bnd_c7_1 X165) | bnd_c4_1 X165) |
% 20.94/20.43                                      ~ bnd_c3_0) |
% 20.94/20.43                                     (ALL X166.
% 20.94/20.43   bnd_ndr1_0 --> (bnd_c8_1 X166 | ~ bnd_c5_1 X166) | ~ bnd_c9_1 X166))) &
% 20.94/20.43                                   (((ALL X167.
% 20.94/20.43   bnd_ndr1_0 -->
% 20.94/20.43   (bnd_c8_1 X167 |
% 20.94/20.43    ((bnd_ndr1_1 X167 & ~ bnd_c5_2 X167 bnd_a1768) &
% 20.94/20.43     bnd_c3_2 X167 bnd_a1768) &
% 20.94/20.43    ~ bnd_c2_2 X167 bnd_a1768) |
% 20.94/20.43   bnd_c4_1 X167) |
% 20.94/20.43                                     ~ bnd_c10_0) |
% 20.94/20.43                                    (ALL X168.
% 20.94/20.43  bnd_ndr1_0 --> (bnd_c7_1 X168 | bnd_c10_1 X168) | bnd_c3_1 X168))) &
% 20.94/20.43                                  ((ALL X169.
% 20.94/20.43                                       bnd_ndr1_0 -->
% 20.94/20.43                                       (bnd_c7_1 X169 |
% 20.94/20.43  ((bnd_ndr1_1 X169 & bnd_c8_2 X169 bnd_a1769) & bnd_c10_2 X169 bnd_a1769) &
% 20.94/20.43  ~ bnd_c7_2 X169 bnd_a1769) |
% 20.94/20.43                                       bnd_c9_1 X169) |
% 20.94/20.43                                   bnd_c5_0)) &
% 20.94/20.43                                 bnd_c7_0) &
% 20.94/20.43                                (bnd_c2_0 |
% 20.94/20.43                                 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1770) &
% 20.94/20.43                                     ~ bnd_c2_2 bnd_a1770 bnd_a1771) &
% 20.94/20.43                                    ~ bnd_c6_2 bnd_a1770 bnd_a1771) &
% 20.94/20.43                                   bnd_c9_2 bnd_a1770 bnd_a1771) &
% 20.94/20.43                                  ~ bnd_c5_1 bnd_a1770) &
% 20.94/20.43                                 (ALL X170.
% 20.94/20.43                                     bnd_ndr1_1 bnd_a1770 -->
% 20.94/20.43                                     (bnd_c6_2 bnd_a1770 X170 |
% 20.94/20.43                                      ~ bnd_c9_2 bnd_a1770 X170) |
% 20.94/20.43                                     ~ bnd_c1_2 bnd_a1770 X170))) &
% 20.94/20.43                               (((ALL X171.
% 20.94/20.43                                     bnd_ndr1_0 -->
% 20.94/20.43                                     ((ALL X172.
% 20.94/20.43    bnd_ndr1_1 X171 -->
% 20.94/20.43    (bnd_c10_2 X171 X172 | ~ bnd_c2_2 X171 X172) | bnd_c9_2 X171 X172) |
% 20.94/20.43                                      ((bnd_ndr1_1 X171 &
% 20.94/20.43  bnd_c3_2 X171 bnd_a1772) &
% 20.94/20.43                                       ~ bnd_c2_2 X171 bnd_a1772) &
% 20.94/20.43                                      ~ bnd_c6_2 X171 bnd_a1772) |
% 20.94/20.43                                     (ALL X173.
% 20.94/20.43   bnd_ndr1_1 X171 --> ~ bnd_c1_2 X171 X173 | ~ bnd_c8_2 X171 X173)) |
% 20.94/20.43                                 (ALL X174.
% 20.94/20.43                                     bnd_ndr1_0 -->
% 20.94/20.43                                     (((bnd_ndr1_1 X174 &
% 20.94/20.43  bnd_c5_2 X174 bnd_a1773) &
% 20.94/20.43                                       ~ bnd_c4_2 X174 bnd_a1773) &
% 20.94/20.43                                      bnd_c2_2 X174 bnd_a1773 |
% 20.94/20.43                                      ((bnd_ndr1_1 X174 &
% 20.94/20.43  bnd_c2_2 X174 bnd_a1774) &
% 20.94/20.43                                       ~ bnd_c3_2 X174 bnd_a1774) &
% 20.94/20.43                                      bnd_c7_2 X174 bnd_a1774) |
% 20.94/20.43                                     (ALL X175.
% 20.94/20.43   bnd_ndr1_1 X174 -->
% 20.94/20.43   (~ bnd_c3_2 X174 X175 | bnd_c6_2 X174 X175) | bnd_c5_2 X174 X175))) |
% 20.94/20.43                                (ALL X176.
% 20.94/20.43                                    bnd_ndr1_0 -->
% 20.94/20.43                                    (((bnd_ndr1_1 X176 &
% 20.94/20.43                                       ~ bnd_c7_2 X176 bnd_a1775) &
% 20.94/20.43                                      ~ bnd_c9_2 X176 bnd_a1775) &
% 20.94/20.43                                     ~ bnd_c8_2 X176 bnd_a1775 |
% 20.94/20.43                                     ~ bnd_c6_1 X176) |
% 20.94/20.43                                    ((bnd_ndr1_1 X176 &
% 20.94/20.43                                      bnd_c5_2 X176 bnd_a1776) &
% 20.94/20.43                                     ~ bnd_c9_2 X176 bnd_a1776) &
% 20.94/20.43                                    ~ bnd_c3_2 X176 bnd_a1776))) &
% 20.94/20.43                              (((ALL X177.
% 20.94/20.43                                    bnd_ndr1_0 -->
% 20.94/20.43                                    (((bnd_ndr1_1 X177 &
% 20.94/20.43                                       bnd_c3_2 X177 bnd_a1777) &
% 20.94/20.43                                      ~ bnd_c2_2 X177 bnd_a1777) &
% 20.94/20.43                                     ~ bnd_c8_2 X177 bnd_a1777 |
% 20.94/20.43                                     bnd_c2_1 X177) |
% 20.94/20.43                                    ((bnd_ndr1_1 X177 &
% 20.94/20.43                                      ~ bnd_c3_2 X177 bnd_a1778) &
% 20.94/20.43                                     ~ bnd_c7_2 X177 bnd_a1778) &
% 20.94/20.43                                    ~ bnd_c5_2 X177 bnd_a1778) |
% 20.94/20.43                                ~ bnd_c4_0) |
% 20.94/20.43                               (ALL X178.
% 20.94/20.43                                   bnd_ndr1_0 -->
% 20.94/20.43                                   (~ bnd_c6_1 X178 | bnd_c7_1 X178) |
% 20.94/20.43                                   (ALL X179.
% 20.94/20.43                                       bnd_ndr1_1 X178 -->
% 20.94/20.43                                       (~ bnd_c4_2 X178 X179 |
% 20.94/20.43  ~ bnd_c8_2 X178 X179) |
% 20.94/20.43                                       bnd_c1_2 X178 X179)))) &
% 20.94/20.43                             ((~ bnd_c2_0 |
% 20.94/20.43                               ((bnd_ndr1_0 & ~ bnd_c8_1 bnd_a1779) &
% 20.94/20.43                                ~ bnd_c2_1 bnd_a1779) &
% 20.94/20.43                               ~ bnd_c7_1 bnd_a1779) |
% 20.94/20.43                              bnd_c9_0)) &
% 20.94/20.43                            ((ALL X180.
% 20.94/20.43                                 bnd_ndr1_0 -->
% 20.94/20.43                                 ((ALL X181.
% 20.94/20.43                                      bnd_ndr1_1 X180 -->
% 20.94/20.43                                      (~ bnd_c2_2 X180 X181 |
% 20.94/20.43                                       ~ bnd_c3_2 X180 X181) |
% 20.94/20.43                                      bnd_c9_2 X180 X181) |
% 20.94/20.43                                  ((bnd_ndr1_1 X180 &
% 20.94/20.43                                    bnd_c6_2 X180 bnd_a1780) &
% 20.94/20.43                                   bnd_c7_2 X180 bnd_a1780) &
% 20.94/20.43                                  bnd_c3_2 X180 bnd_a1780) |
% 20.94/20.43                                 ~ bnd_c4_1 X180) |
% 20.94/20.43                             ~ bnd_c10_0)) &
% 20.94/20.43                           (((ALL X182.
% 20.94/20.43                                 bnd_ndr1_0 -->
% 20.94/20.43                                 bnd_c2_1 X182 |
% 20.94/20.43                                 (ALL X183.
% 20.94/20.43                                     bnd_ndr1_1 X182 -->
% 20.94/20.43                                     (~ bnd_c7_2 X182 X183 |
% 20.94/20.43                                      ~ bnd_c6_2 X182 X183) |
% 20.94/20.43                                     bnd_c1_2 X182 X183)) |
% 20.94/20.43                             (((((bnd_ndr1_0 &
% 20.94/20.43                                  (ALL X184.
% 20.94/20.43                                      bnd_ndr1_1 bnd_a1781 -->
% 20.94/20.43                                      bnd_c5_2 bnd_a1781 X184 |
% 20.94/20.43                                      bnd_c3_2 bnd_a1781 X184)) &
% 20.94/20.43                                 bnd_c2_1 bnd_a1781) &
% 20.94/20.43                                bnd_ndr1_1 bnd_a1781) &
% 20.94/20.43                               bnd_c2_2 bnd_a1781 bnd_a1782) &
% 20.94/20.43                              ~ bnd_c9_2 bnd_a1781 bnd_a1782) &
% 20.94/20.43                             bnd_c7_2 bnd_a1781 bnd_a1782) |
% 20.94/20.43                            (ALL X185.
% 20.94/20.43                                bnd_ndr1_0 -->
% 20.94/20.43                                (~ bnd_c6_1 X185 | bnd_c7_1 X185) |
% 20.94/20.43                                (ALL X186.
% 20.94/20.43                                    bnd_ndr1_1 X185 -->
% 20.94/20.43                                    (bnd_c10_2 X185 X186 |
% 20.94/20.43                                     bnd_c2_2 X185 X186) |
% 20.94/20.43                                    bnd_c1_2 X185 X186)))) &
% 20.94/20.43                          ((((bnd_ndr1_0 &
% 20.94/20.43                              (ALL X187.
% 20.94/20.43                                  bnd_ndr1_1 bnd_a1783 -->
% 20.94/20.43                                  (bnd_c4_2 bnd_a1783 X187 |
% 20.94/20.43                                   bnd_c2_2 bnd_a1783 X187) |
% 20.94/20.43                                  ~ bnd_c8_2 bnd_a1783 X187)) &
% 20.94/20.43                             (ALL X188.
% 20.94/20.43                                 bnd_ndr1_1 bnd_a1783 -->
% 20.94/20.43                                 (~ bnd_c2_2 bnd_a1783 X188 |
% 20.94/20.43                                  bnd_c10_2 bnd_a1783 X188) |
% 20.94/20.43                                 bnd_c7_2 bnd_a1783 X188)) &
% 20.94/20.43                            (ALL X189.
% 20.94/20.43                                bnd_ndr1_1 bnd_a1783 -->
% 20.94/20.43                                ~ bnd_c7_2 bnd_a1783 X189 |
% 20.94/20.43                                bnd_c1_2 bnd_a1783 X189) |
% 20.94/20.43                            bnd_c2_0) |
% 20.94/20.43                           bnd_c9_0)) &
% 20.94/20.43                         ((((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a1784) &
% 20.94/20.43                            (ALL X190.
% 20.94/20.43                                bnd_ndr1_1 bnd_a1784 -->
% 20.94/20.43                                (bnd_c9_2 bnd_a1784 X190 |
% 20.94/20.43                                 bnd_c1_2 bnd_a1784 X190) |
% 20.94/20.43                                ~ bnd_c7_2 bnd_a1784 X190)) &
% 20.94/20.43                           ~ bnd_c10_1 bnd_a1784 |
% 20.94/20.43                           (((((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a1785) &
% 20.94/20.43                               bnd_ndr1_1 bnd_a1785) &
% 20.94/20.43                              bnd_c1_2 bnd_a1785 bnd_a1786) &
% 20.94/20.43                             ~ bnd_c4_2 bnd_a1785 bnd_a1786) &
% 20.94/20.43                            bnd_c10_2 bnd_a1785 bnd_a1786) &
% 20.94/20.43                           (ALL X191.
% 20.94/20.43                               bnd_ndr1_1 bnd_a1785 -->
% 20.94/20.43                               (bnd_c2_2 bnd_a1785 X191 |
% 20.94/20.43                                bnd_c4_2 bnd_a1785 X191) |
% 20.94/20.43                               ~ bnd_c5_2 bnd_a1785 X191)) |
% 20.94/20.43                          ((((((((bnd_ndr1_0 & ~ bnd_c5_1 bnd_a1787) &
% 20.94/20.43                                 bnd_ndr1_1 bnd_a1787) &
% 20.94/20.43                                ~ bnd_c3_2 bnd_a1787 bnd_a1788) &
% 20.94/20.43                               ~ bnd_c8_2 bnd_a1787 bnd_a1788) &
% 20.94/20.43                              bnd_c1_2 bnd_a1787 bnd_a1788) &
% 20.94/20.43                             bnd_ndr1_1 bnd_a1787) &
% 20.94/20.43                            ~ bnd_c9_2 bnd_a1787 bnd_a1789) &
% 20.94/20.43                           bnd_c7_2 bnd_a1787 bnd_a1789) &
% 20.94/20.43                          bnd_c6_2 bnd_a1787 bnd_a1789)) &
% 20.94/20.43                        (((((((bnd_ndr1_0 & bnd_c5_1 bnd_a1790) &
% 20.94/20.43                              bnd_ndr1_1 bnd_a1790) &
% 20.94/20.43                             bnd_c2_2 bnd_a1790 bnd_a1791) &
% 20.94/20.43                            bnd_c10_2 bnd_a1790 bnd_a1791) &
% 20.94/20.43                           bnd_c9_2 bnd_a1790 bnd_a1791) &
% 20.94/20.43                          (ALL X192.
% 20.94/20.43                              bnd_ndr1_1 bnd_a1790 -->
% 20.94/20.43                              (~ bnd_c1_2 bnd_a1790 X192 |
% 20.94/20.43                               ~ bnd_c6_2 bnd_a1790 X192) |
% 20.94/20.43                              ~ bnd_c2_2 bnd_a1790 X192) |
% 20.94/20.43                          ~ bnd_c9_0) |
% 20.94/20.43                         (ALL X193.
% 20.94/20.43                             bnd_ndr1_0 -->
% 20.94/20.43                             ((ALL X194.
% 20.94/20.43                                  bnd_ndr1_1 X193 -->
% 20.94/20.43                                  (~ bnd_c3_2 X193 X194 |
% 20.94/20.43                                   ~ bnd_c2_2 X193 X194) |
% 20.94/20.43                                  bnd_c5_2 X193 X194) |
% 20.94/20.43                              ~ bnd_c8_1 X193) |
% 20.94/20.43                             (ALL X195.
% 20.94/20.43                                 bnd_ndr1_1 X193 -->
% 20.94/20.43                                 (bnd_c5_2 X193 X195 | ~ bnd_c8_2 X193 X195) |
% 20.94/20.43                                 ~ bnd_c4_2 X193 X195)))) &
% 20.94/20.43                       (((ALL X196.
% 20.94/20.43                             bnd_ndr1_0 -->
% 20.94/20.43                             ((bnd_ndr1_1 X196 & bnd_c5_2 X196 bnd_a1792) &
% 20.94/20.43                              ~ bnd_c1_2 X196 bnd_a1792) &
% 20.94/20.43                             bnd_c4_2 X196 bnd_a1792 |
% 20.94/20.43                             (ALL X197.
% 20.94/20.43                                 bnd_ndr1_1 X196 -->
% 20.94/20.43                                 (~ bnd_c4_2 X196 X197 |
% 20.94/20.43                                  ~ bnd_c8_2 X196 X197) |
% 20.94/20.43                                 ~ bnd_c7_2 X196 X197)) |
% 20.94/20.43                         ~ bnd_c9_0) |
% 20.94/20.43                        (ALL X198.
% 20.94/20.43                            bnd_ndr1_0 -->
% 20.94/20.43                            (((bnd_ndr1_1 X198 & ~ bnd_c8_2 X198 bnd_a1793) &
% 20.94/20.43                              bnd_c2_2 X198 bnd_a1793) &
% 20.94/20.43                             ~ bnd_c5_2 X198 bnd_a1793 |
% 20.94/20.43                             bnd_c6_1 X198) |
% 20.94/20.43                            ((bnd_ndr1_1 X198 & bnd_c5_2 X198 bnd_a1794) &
% 20.94/20.43                             ~ bnd_c10_2 X198 bnd_a1794) &
% 20.94/20.43                            ~ bnd_c4_2 X198 bnd_a1794))) &
% 20.94/20.43                      ((~ bnd_c3_0 |
% 20.94/20.43                        ((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1795) &
% 20.94/20.43                               ~ bnd_c10_2 bnd_a1795 bnd_a1796) &
% 20.94/20.43                              ~ bnd_c5_2 bnd_a1795 bnd_a1796) &
% 20.94/20.43                             bnd_c6_2 bnd_a1795 bnd_a1796) &
% 20.94/20.43                            bnd_ndr1_1 bnd_a1795) &
% 20.94/20.43                           ~ bnd_c8_2 bnd_a1795 bnd_a1797) &
% 20.94/20.43                          bnd_c10_2 bnd_a1795 bnd_a1797) &
% 20.94/20.43                         ~ bnd_c2_2 bnd_a1795 bnd_a1797) &
% 20.94/20.43                        ~ bnd_c2_1 bnd_a1795) |
% 20.94/20.43                       (((((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a1798) &
% 20.94/20.43                           bnd_ndr1_1 bnd_a1798) &
% 20.94/20.43                          bnd_c5_2 bnd_a1798 bnd_a1799) &
% 20.94/20.43                         bnd_c10_2 bnd_a1798 bnd_a1799) &
% 20.94/20.43                        ~ bnd_c9_2 bnd_a1798 bnd_a1799) &
% 20.94/20.43                       ~ bnd_c6_1 bnd_a1798)) &
% 20.94/20.43                     (~ bnd_c6_0 | bnd_c9_0)) &
% 20.94/20.43                    (((ALL X199.
% 20.94/20.43                          bnd_ndr1_0 -->
% 20.94/20.43                          ((bnd_ndr1_1 X199 & ~ bnd_c10_2 X199 bnd_a1800) &
% 20.94/20.43                           bnd_c2_2 X199 bnd_a1800 |
% 20.94/20.43                           bnd_c5_1 X199) |
% 20.94/20.43                          ((bnd_ndr1_1 X199 & bnd_c6_2 X199 bnd_a1801) &
% 20.94/20.43                           ~ bnd_c4_2 X199 bnd_a1801) &
% 20.94/20.43                          ~ bnd_c10_2 X199 bnd_a1801) |
% 20.94/20.43                      bnd_c8_0) |
% 20.94/20.43                     ((((((((bnd_ndr1_0 & bnd_c7_1 bnd_a1802) &
% 20.94/20.43                            bnd_ndr1_1 bnd_a1802) &
% 20.94/20.43                           bnd_c9_2 bnd_a1802 bnd_a1803) &
% 20.94/20.43                          bnd_c4_2 bnd_a1802 bnd_a1803) &
% 20.94/20.43                         bnd_c7_2 bnd_a1802 bnd_a1803) &
% 20.94/20.43                        bnd_ndr1_1 bnd_a1802) &
% 20.94/20.43                       bnd_c5_2 bnd_a1802 bnd_a1804) &
% 20.94/20.43                      bnd_c6_2 bnd_a1802 bnd_a1804) &
% 20.94/20.43                     ~ bnd_c7_2 bnd_a1802 bnd_a1804)) &
% 20.94/20.43                   (~ bnd_c4_0 | bnd_c9_0)) &
% 20.94/20.43                  ((bnd_c8_0 |
% 20.94/20.43                    (ALL X200.
% 20.94/20.43                        bnd_ndr1_0 -->
% 20.94/20.43                        ((ALL X201.
% 20.94/20.43                             bnd_ndr1_1 X200 -->
% 20.94/20.43                             (bnd_c10_2 X200 X201 | ~ bnd_c7_2 X200 X201) |
% 20.94/20.43                             bnd_c5_2 X200 X201) |
% 20.94/20.43                         (ALL X202.
% 20.94/20.43                             bnd_ndr1_1 X200 -->
% 20.94/20.43                             bnd_c2_2 X200 X202 | ~ bnd_c9_2 X200 X202)) |
% 20.94/20.43                        ~ bnd_c5_1 X200)) |
% 20.94/20.43                   ~ bnd_c9_0)) &
% 20.94/20.43                 ((bnd_c10_0 |
% 20.94/20.43                   (((((bnd_ndr1_0 & ~ bnd_c7_1 bnd_a1805) &
% 20.94/20.43                       bnd_ndr1_1 bnd_a1805) &
% 20.94/20.43                      ~ bnd_c5_2 bnd_a1805 bnd_a1806) &
% 20.94/20.43                     ~ bnd_c4_2 bnd_a1805 bnd_a1806) &
% 20.94/20.43                    ~ bnd_c6_2 bnd_a1805 bnd_a1806) &
% 20.94/20.43                   (ALL X203.
% 20.94/20.43                       bnd_ndr1_1 bnd_a1805 -->
% 20.94/20.43                       (bnd_c10_2 bnd_a1805 X203 | bnd_c2_2 bnd_a1805 X203) |
% 20.94/20.43                       ~ bnd_c4_2 bnd_a1805 X203)) |
% 20.94/20.43                  ~ bnd_c1_0)) &
% 20.94/20.43                (((((((bnd_ndr1_0 & bnd_c8_1 bnd_a1807) &
% 20.94/20.43                      bnd_c9_1 bnd_a1807) &
% 20.94/20.43                     bnd_ndr1_1 bnd_a1807) &
% 20.94/20.43                    ~ bnd_c9_2 bnd_a1807 bnd_a1808) &
% 20.94/20.43                   ~ bnd_c6_2 bnd_a1807 bnd_a1808) &
% 20.94/20.43                  bnd_c5_2 bnd_a1807 bnd_a1808 |
% 20.94/20.43                  ((bnd_ndr1_0 & bnd_c1_1 bnd_a1809) & bnd_c4_1 bnd_a1809) &
% 20.94/20.43                  ~ bnd_c8_1 bnd_a1809) |
% 20.94/20.43                 ~ bnd_c8_0)) &
% 20.94/20.43               (((ALL X204.
% 20.94/20.43                     bnd_ndr1_0 -->
% 20.94/20.43                     (~ bnd_c8_1 X204 | ~ bnd_c1_1 X204) |
% 20.94/20.43                     (bnd_ndr1_1 X204 & ~ bnd_c7_2 X204 bnd_a1810) &
% 20.94/20.43                     bnd_c2_2 X204 bnd_a1810) |
% 20.94/20.43                 ((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1811) &
% 20.94/20.43                    bnd_c6_2 bnd_a1811 bnd_a1812) &
% 20.94/20.43                   ~ bnd_c10_2 bnd_a1811 bnd_a1812) &
% 20.94/20.43                  bnd_c3_1 bnd_a1811) &
% 20.94/20.43                 (ALL X205.
% 20.94/20.43                     bnd_ndr1_1 bnd_a1811 -->
% 20.94/20.43                     (bnd_c2_2 bnd_a1811 X205 | ~ bnd_c5_2 bnd_a1811 X205) |
% 20.94/20.43                     ~ bnd_c3_2 bnd_a1811 X205)) |
% 20.94/20.43                ((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a1813) &
% 20.94/20.43                 (ALL X206.
% 20.94/20.43                     bnd_ndr1_1 bnd_a1813 -->
% 20.94/20.43                     (bnd_c10_2 bnd_a1813 X206 | ~ bnd_c8_2 bnd_a1813 X206) |
% 20.94/20.43                     bnd_c9_2 bnd_a1813 X206)) &
% 20.94/20.43                ~ bnd_c5_1 bnd_a1813)) &
% 20.94/20.43              ((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1814) &
% 20.94/20.43                   bnd_c3_2 bnd_a1814 bnd_a1815) &
% 20.94/20.43                  ~ bnd_c2_2 bnd_a1814 bnd_a1815) &
% 20.94/20.43                 ~ bnd_c10_2 bnd_a1814 bnd_a1815) &
% 20.94/20.43                ~ bnd_c6_1 bnd_a1814 |
% 20.94/20.43                bnd_c2_0) |
% 20.94/20.43               ~ bnd_c9_0)) &
% 20.94/20.43             (bnd_c4_0 | ~ bnd_c8_0)) &
% 20.94/20.43            ((~ bnd_c6_0 |
% 20.94/20.43              (ALL X207.
% 20.94/20.43                  bnd_ndr1_0 -->
% 20.94/20.43                  (bnd_c9_1 X207 |
% 20.94/20.43                   ((bnd_ndr1_1 X207 & bnd_c1_2 X207 bnd_a1816) &
% 20.94/20.43                    ~ bnd_c6_2 X207 bnd_a1816) &
% 20.94/20.43                   ~ bnd_c5_2 X207 bnd_a1816) |
% 20.94/20.43                  ~ bnd_c3_1 X207)) |
% 20.94/20.43             bnd_c9_0)) &
% 20.94/20.43           (bnd_c8_0 | bnd_c2_0)) &
% 20.94/20.43          ((((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1817) &
% 20.94/20.43                   bnd_c4_2 bnd_a1817 bnd_a1818) &
% 20.94/20.43                  ~ bnd_c2_2 bnd_a1817 bnd_a1818) &
% 20.94/20.43                 bnd_c8_2 bnd_a1817 bnd_a1818) &
% 20.94/20.43                bnd_c10_1 bnd_a1817) &
% 20.94/20.43               bnd_ndr1_1 bnd_a1817) &
% 20.94/20.43              ~ bnd_c8_2 bnd_a1817 bnd_a1819) &
% 20.94/20.43             ~ bnd_c4_2 bnd_a1817 bnd_a1819) &
% 20.94/20.43            bnd_c9_2 bnd_a1817 bnd_a1819 |
% 20.94/20.43            (((((bnd_ndr1_0 &
% 20.94/20.43                 (ALL X208.
% 20.94/20.43                     bnd_ndr1_1 bnd_a1820 -->
% 20.94/20.43                     (bnd_c9_2 bnd_a1820 X208 | ~ bnd_c10_2 bnd_a1820 X208) |
% 20.94/20.43                     bnd_c5_2 bnd_a1820 X208)) &
% 20.94/20.43                ~ bnd_c7_1 bnd_a1820) &
% 20.94/20.43               bnd_ndr1_1 bnd_a1820) &
% 20.94/20.43              ~ bnd_c1_2 bnd_a1820 bnd_a1821) &
% 20.94/20.43             ~ bnd_c9_2 bnd_a1820 bnd_a1821) &
% 20.94/20.43            bnd_c8_2 bnd_a1820 bnd_a1821) |
% 20.94/20.43           (((((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a1822) & bnd_c10_1 bnd_a1822) &
% 20.94/20.43              bnd_ndr1_1 bnd_a1822) &
% 20.94/20.43             ~ bnd_c9_2 bnd_a1822 bnd_a1823) &
% 20.94/20.43            ~ bnd_c7_2 bnd_a1822 bnd_a1823) &
% 20.94/20.43           bnd_c5_2 bnd_a1822 bnd_a1823)) &
% 20.94/20.43         (((((((bnd_ndr1_0 & bnd_c8_1 bnd_a1824) & bnd_ndr1_1 bnd_a1824) &
% 20.94/20.43              ~ bnd_c9_2 bnd_a1824 bnd_a1825) &
% 20.94/20.43             bnd_c8_2 bnd_a1824 bnd_a1825) &
% 20.94/20.43            bnd_c5_2 bnd_a1824 bnd_a1825) &
% 20.94/20.43           ~ bnd_c4_1 bnd_a1824 |
% 20.94/20.43           bnd_c10_0) |
% 20.94/20.43          (((((bnd_ndr1_0 & bnd_c2_1 bnd_a1826) & bnd_c10_1 bnd_a1826) &
% 20.94/20.43             bnd_ndr1_1 bnd_a1826) &
% 20.94/20.43            bnd_c6_2 bnd_a1826 bnd_a1827) &
% 20.94/20.43           ~ bnd_c4_2 bnd_a1826 bnd_a1827) &
% 20.94/20.43          bnd_c9_2 bnd_a1826 bnd_a1827)) &
% 20.94/20.43        ((~ bnd_c3_0 | bnd_c2_0) | ~ bnd_c10_0)) &
% 20.94/20.43       ((~ bnd_c3_0 | bnd_c2_0) |
% 20.94/20.43        ((bnd_ndr1_0 &
% 20.94/20.43          (ALL X209.
% 20.94/20.43              bnd_ndr1_1 bnd_a1828 -->
% 20.94/20.43              (~ bnd_c2_2 bnd_a1828 X209 | bnd_c4_2 bnd_a1828 X209) |
% 20.94/20.43              ~ bnd_c7_2 bnd_a1828 X209)) &
% 20.94/20.43         (ALL X210.
% 20.94/20.43             bnd_ndr1_1 bnd_a1828 -->
% 20.94/20.43             (bnd_c8_2 bnd_a1828 X210 | ~ bnd_c5_2 bnd_a1828 X210) |
% 20.94/20.43             ~ bnd_c10_2 bnd_a1828 X210)) &
% 20.94/20.43        bnd_c4_1 bnd_a1828)) &
% 20.94/20.43      (((ALL X211.
% 20.94/20.43            bnd_ndr1_0 -->
% 20.94/20.43            (((bnd_ndr1_1 X211 & ~ bnd_c2_2 X211 bnd_a1829) &
% 20.94/20.43              bnd_c5_2 X211 bnd_a1829) &
% 20.94/20.43             bnd_c4_2 X211 bnd_a1829 |
% 20.94/20.43             (bnd_ndr1_1 X211 & ~ bnd_c7_2 X211 bnd_a1830) &
% 20.94/20.43             ~ bnd_c1_2 X211 bnd_a1830) |
% 20.94/20.43            (ALL X212.
% 20.94/20.43                bnd_ndr1_1 X211 -->
% 20.94/20.43                ~ bnd_c9_2 X211 X212 | bnd_c5_2 X211 X212)) |
% 20.94/20.43        bnd_c2_0) |
% 20.94/20.43       (ALL X213.
% 20.94/20.43           bnd_ndr1_0 -->
% 20.94/20.43           (((bnd_ndr1_1 X213 & bnd_c4_2 X213 bnd_a1831) &
% 20.94/20.43             ~ bnd_c5_2 X213 bnd_a1831) &
% 20.94/20.43            ~ bnd_c8_2 X213 bnd_a1831 |
% 20.94/20.43            (ALL X214.
% 20.94/20.43                bnd_ndr1_1 X213 -->
% 20.94/20.43                (bnd_c4_2 X213 X214 | bnd_c1_2 X213 X214) |
% 20.94/20.43                ~ bnd_c7_2 X213 X214)) |
% 20.94/20.43           ~ bnd_c10_1 X213))) &
% 20.94/20.43     (((ALL X215.
% 20.94/20.43           bnd_ndr1_0 -->
% 20.94/20.43           (((bnd_ndr1_1 X215 & ~ bnd_c4_2 X215 bnd_a1832) &
% 20.94/20.43             bnd_c7_2 X215 bnd_a1832) &
% 20.94/20.43            bnd_c1_2 X215 bnd_a1832 |
% 20.94/20.43            ((bnd_ndr1_1 X215 & bnd_c9_2 X215 bnd_a1833) &
% 20.94/20.43             bnd_c2_2 X215 bnd_a1833) &
% 20.94/20.43            bnd_c6_2 X215 bnd_a1833) |
% 20.94/20.43           bnd_c6_1 X215) |
% 20.94/20.43       bnd_c9_0) |
% 20.94/20.43      (ALL X216.
% 20.94/20.43          bnd_ndr1_0 -->
% 20.94/20.43          ((ALL X217.
% 20.94/20.43               bnd_ndr1_1 X216 -->
% 20.94/20.43               (~ bnd_c5_2 X216 X217 | bnd_c8_2 X216 X217) |
% 20.94/20.43               bnd_c2_2 X216 X217) |
% 20.94/20.43           bnd_c7_1 X216) |
% 20.94/20.43          ~ bnd_c4_1 X216)))
% 20.94/20.43  Adding axioms...
% 20.94/20.44  Typedef.type_definition_def
% 62.81/62.24   ...done.
% 62.81/62.29  Ground types: ?'b, TPTP_Interpret.ind
% 62.81/62.29  Translating term (sizes: 1, 1) ...
% 96.92/96.24  Invoking SAT solver...
% 96.92/96.25  No model exists.
% 96.92/96.25  Translating term (sizes: 2, 1) ...
% 131.78/130.94  Invoking SAT solver...
% 131.78/130.95  No model exists.
% 131.78/130.95  Translating term (sizes: 1, 2) ...
% 193.18/192.07  Invoking SAT solver...
% 221.73/220.43  Model found:
% 221.73/220.43  Size of types: ?'b: 1, TPTP_Interpret.ind: 2
% 221.73/220.43  bnd_a1833: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1832: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1831: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1830: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1829: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1828: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1827: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1826: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1825: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1824: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1823: ??.TPTP_Interpret.ind1
% 221.73/220.43  bnd_a1822: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1821: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1820: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1819: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1818: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1817: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1816: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1815: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1814: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1813: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1812: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1811: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1810: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1809: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1808: ??.TPTP_Interpret.ind1
% 221.73/220.43  bnd_a1807: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1806: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1805: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1804: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1803: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1802: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1801: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1800: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1799: ??.TPTP_Interpret.ind1
% 221.73/220.43  bnd_a1798: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1797: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1796: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1795: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1794: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1793: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1792: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1791: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1790: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1789: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1788: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1787: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1786: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1785: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1784: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1783: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1782: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1781: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1780: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1779: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1778: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1777: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1776: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1775: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1774: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1773: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1772: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1771: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1770: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1769: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1768: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1767: ??.TPTP_Interpret.ind1
% 221.73/220.43  bnd_a1766: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1765: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1764: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1763: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1762: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1761: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1760: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1759: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1758: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1757: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1756: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1755: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1754: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1753: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1752: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1751: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1750: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1749: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1748: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1747: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1746: ??.TPTP_Interpret.ind1
% 221.73/220.43  bnd_a1745: ??.TPTP_Interpret.ind1
% 221.73/220.43  bnd_a1744: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1743: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1742: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1741: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1740: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1739: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1738: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1737: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1736: ??.TPTP_Interpret.ind1
% 221.73/220.43  bnd_a1735: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1734: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1733: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1732: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1731: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1730: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1729: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1728: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1727: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1726: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1725: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1724: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1723: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1722: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1721: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1720: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1719: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1718: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1717: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1716: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1715: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1714: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1713: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1712: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1711: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1710: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1709: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1708: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1707: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1706: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1705: ??.TPTP_Interpret.ind1
% 221.73/220.43  bnd_a1704: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1703: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1702: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1701: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1700: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1699: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1698: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1697: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1696: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1695: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1694: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1693: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1692: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1691: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1690: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1689: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1688: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1687: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1686: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1685: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1684: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1683: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1682: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1681: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1680: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1679: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1678: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1677: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1676: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1675: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1674: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1673: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1672: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1671: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1670: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1669: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1668: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1667: ??.TPTP_Interpret.ind1
% 221.73/220.43  bnd_a1666: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1665: ??.TPTP_Interpret.ind1
% 221.73/220.43  bnd_a1664: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1663: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1662: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1661: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1660: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1659: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1658: ??.TPTP_Interpret.ind1
% 221.73/220.43  bnd_a1657: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1656: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1655: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1654: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1653: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1652: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1651: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1650: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1649: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1648: ??.TPTP_Interpret.ind1
% 221.73/220.43  bnd_a1647: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1646: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1645: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1644: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1643: ??.TPTP_Interpret.ind1
% 221.73/220.43  bnd_a1642: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1641: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1640: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1639: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1638: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1637: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1636: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1635: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1634: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1633: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1632: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1631: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1630: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1629: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1628: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1627: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1626: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1625: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1624: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1623: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1622: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1621: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1620: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1619: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1618: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1617: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1616: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1615: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_c2_0: True
% 221.73/220.43  bnd_a1614: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1613: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1612: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1611: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1610: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_c3_0: True
% 221.73/220.43  bnd_a1609: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1608: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1607: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1606: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1605: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1604: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1603: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1602: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1601: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1600: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1599: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1598: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1597: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_c9_0: True
% 221.73/220.43  bnd_c5_0: True
% 221.73/220.43  bnd_a1596: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1595: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1594: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1593: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_c9_1: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)}
% 221.73/220.43  bnd_a1592: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1591: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_c4_0: False
% 221.73/220.43  bnd_c7_0: True
% 221.73/220.43  bnd_a1590: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_c5_1: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)}
% 221.73/220.43  bnd_a1589: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1588: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_c3_1: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)}
% 221.73/220.43  bnd_a1587: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_a1586: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_c9_2: {(??.TPTP_Interpret.ind0,
% 221.73/220.43    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)}),
% 221.73/220.43   (??.TPTP_Interpret.ind1,
% 221.73/220.43    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)})}
% 221.73/220.43  bnd_a1585: ??.TPTP_Interpret.ind0
% 221.73/220.43  bnd_c8_2: {(??.TPTP_Interpret.ind0,
% 221.73/220.43    {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)}),
% 221.73/220.43   (??.TPTP_Interpret.ind1,
% 221.73/220.43    {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)})}
% 221.73/220.44  bnd_a1584: ??.TPTP_Interpret.ind0
% 221.73/220.44  bnd_c4_2: {(??.TPTP_Interpret.ind0,
% 221.73/220.44    {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)}),
% 221.73/220.44   (??.TPTP_Interpret.ind1,
% 221.73/220.44    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)})}
% 221.73/220.44  bnd_c3_2: {(??.TPTP_Interpret.ind0,
% 221.73/220.44    {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, True)}),
% 221.73/220.44   (??.TPTP_Interpret.ind1,
% 221.73/220.44    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)})}
% 221.73/220.44  bnd_a1583: ??.TPTP_Interpret.ind0
% 221.73/220.44  bnd_a1582: ??.TPTP_Interpret.ind0
% 221.73/220.44  bnd_c2_1: {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, True)}
% 221.73/220.44  bnd_c8_0: False
% 221.73/220.44  bnd_c4_1: {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, True)}
% 221.73/220.44  bnd_c6_1: {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, True)}
% 221.73/220.44  bnd_c2_2: {(??.TPTP_Interpret.ind0,
% 221.73/220.44    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}),
% 221.73/220.44   (??.TPTP_Interpret.ind1,
% 221.73/220.44    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)})}
% 221.73/220.44  bnd_c6_0: False
% 221.73/220.44  bnd_c10_0: True
% 221.73/220.44  bnd_c7_1: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)}
% 221.73/220.44  bnd_c8_1: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)}
% 221.73/220.44  bnd_c6_2: {(??.TPTP_Interpret.ind0,
% 221.73/220.44    {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)}),
% 221.73/220.44   (??.TPTP_Interpret.ind1,
% 221.73/220.44    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)})}
% 221.73/220.44  bnd_c10_2: {(??.TPTP_Interpret.ind0,
% 221.73/220.44    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}),
% 221.73/220.44   (??.TPTP_Interpret.ind1,
% 221.73/220.44    {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, True)})}
% 221.73/220.44  bnd_a1581: ??.TPTP_Interpret.ind0
% 221.73/220.44  bnd_c10_1: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)}
% 221.73/220.44  bnd_c7_2: {(??.TPTP_Interpret.ind0,
% 221.73/220.44    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)}),
% 221.73/220.44   (??.TPTP_Interpret.ind1,
% 221.73/220.44    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)})}
% 221.73/220.44  bnd_c5_2: {(??.TPTP_Interpret.ind0,
% 221.73/220.44    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}),
% 221.73/220.44   (??.TPTP_Interpret.ind1,
% 221.73/220.44    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)})}
% 221.73/220.44  bnd_c1_2: {(??.TPTP_Interpret.ind0,
% 221.73/220.44    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}),
% 221.73/220.44   (??.TPTP_Interpret.ind1,
% 221.73/220.44    {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, True)})}
% 221.73/220.44  bnd_ndr1_1: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}
% 221.73/220.44  bnd_c1_1: {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)}
% 221.73/220.44  bnd_ndr1_0: True
% 221.73/220.44  bnd_c1_0: True
% 221.73/220.44  
% 221.73/220.44  % SZS status CounterSatisfiable
%------------------------------------------------------------------------------