TSTP Solution File: SYN425+1 by Refute---2015
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%------------------------------------------------------------------------------
% File : Refute---2015
% Problem : SYN425+1 : TPTP v6.4.0. Released v2.1.0.
% Transfm : none
% Format : tptp:raw
% Command : isabelle tptp_refute %d %s
% Computer : n106.star.cs.uiowa.edu
% Model : x86_64 x86_64
% CPU : Intel(R) Xeon(R) CPU E5-2609 0 2.40GHz
% Memory : 32218.75MB
% OS : Linux 3.10.0-327.10.1.el7.x86_64
% CPULimit : 300s
% DateTime : Thu Apr 14 06:41:44 EDT 2016
% Result : CounterSatisfiable 156.76s
% Output : Assurance 0s
% Verified :
% SZS Type : None (Parsing solution fails)
% Syntax : Number of formulae : 0
% Comments :
%------------------------------------------------------------------------------
%----No solution output by system
%------------------------------------------------------------------------------
%----ORIGINAL SYSTEM OUTPUT
% 0.00/0.03 % Problem : SYN425+1 : TPTP v6.4.0. Released v2.1.0.
% 0.00/0.04 % Command : isabelle tptp_refute %d %s
% 0.03/0.23 % Computer : n106.star.cs.uiowa.edu
% 0.03/0.23 % Model : x86_64 x86_64
% 0.03/0.23 % CPU : Intel(R) Xeon(R) CPU E5-2609 0 @ 2.40GHz
% 0.03/0.23 % Memory : 32218.75MB
% 0.03/0.23 % OS : Linux 3.10.0-327.10.1.el7.x86_64
% 0.03/0.23 % CPULimit : 300
% 0.03/0.23 % DateTime : Fri Apr 8 23:50:24 CDT 2016
% 0.03/0.23 % CPUTime:
% 6.30/5.84 > val it = (): unit
% 7.19/6.74 Trying to find a model that refutes: ~ ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((~ bnd_c7_0 |
% 7.19/6.74 (ALL U.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (~ bnd_c5_1 U | ~ bnd_c7_1 U) |
% 7.19/6.74 (ALL V.
% 7.19/6.74 bnd_ndr1_1 U -->
% 7.19/6.74 (bnd_c4_2 U V | bnd_c2_2 U V) | bnd_c8_2 U V))) |
% 7.19/6.74 bnd_c2_0) &
% 7.19/6.74 ((((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a1190) & ~ bnd_c4_1 bnd_a1190) &
% 7.19/6.74 (ALL W.
% 7.19/6.74 bnd_ndr1_1 bnd_a1190 -->
% 7.19/6.74 (bnd_c6_2 bnd_a1190 W | bnd_c5_2 bnd_a1190 W) |
% 7.19/6.74 bnd_c4_2 bnd_a1190 W) |
% 7.19/6.74 (((((bnd_ndr1_0 &
% 7.19/6.74 (ALL X.
% 7.19/6.74 bnd_ndr1_1 bnd_a1191 -->
% 7.19/6.74 (bnd_c3_2 bnd_a1191 X | ~ bnd_c8_2 bnd_a1191 X) |
% 7.19/6.74 ~ bnd_c1_2 bnd_a1191 X)) &
% 7.19/6.74 ~ bnd_c2_1 bnd_a1191) &
% 7.19/6.74 bnd_ndr1_1 bnd_a1191) &
% 7.19/6.74 bnd_c7_2 bnd_a1191 bnd_a1192) &
% 7.19/6.74 ~ bnd_c10_2 bnd_a1191 bnd_a1192) &
% 7.19/6.74 ~ bnd_c6_2 bnd_a1191 bnd_a1192) |
% 7.19/6.74 ~ bnd_c7_0)) &
% 7.19/6.74 (((((((bnd_ndr1_0 &
% 7.19/6.74 (ALL Y.
% 7.19/6.74 bnd_ndr1_1 bnd_a1193 -->
% 7.19/6.74 (~ bnd_c8_2 bnd_a1193 Y | bnd_c7_2 bnd_a1193 Y) |
% 7.19/6.74 bnd_c2_2 bnd_a1193 Y)) &
% 7.19/6.74 bnd_ndr1_1 bnd_a1193) &
% 7.19/6.74 bnd_c4_2 bnd_a1193 bnd_a1194) &
% 7.19/6.74 bnd_c5_2 bnd_a1193 bnd_a1194) &
% 7.19/6.74 bnd_c9_2 bnd_a1193 bnd_a1194) &
% 7.19/6.74 (ALL Z.
% 7.19/6.74 bnd_ndr1_1 bnd_a1193 -->
% 7.19/6.74 (~ bnd_c10_2 bnd_a1193 Z | ~ bnd_c9_2 bnd_a1193 Z) |
% 7.19/6.74 ~ bnd_c8_2 bnd_a1193 Z) |
% 7.19/6.74 (ALL X1.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (((bnd_ndr1_1 X1 & bnd_c10_2 X1 bnd_a1195) &
% 7.19/6.74 ~ bnd_c3_2 X1 bnd_a1195) &
% 7.19/6.74 ~ bnd_c4_2 X1 bnd_a1195 |
% 7.19/6.74 bnd_c8_1 X1) |
% 7.19/6.74 ~ bnd_c9_1 X1)) |
% 7.19/6.74 (ALL X2.
% 7.19/6.74 bnd_ndr1_0 --> (bnd_c6_1 X2 | bnd_c10_1 X2) | ~ bnd_c1_1 X2))) &
% 7.19/6.74 (bnd_c1_0 | ~ bnd_c5_0)) &
% 7.19/6.74 (((ALL X3.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (((bnd_ndr1_1 X3 & bnd_c8_2 X3 bnd_a1196) &
% 7.19/6.74 bnd_c4_2 X3 bnd_a1196) &
% 7.19/6.74 ~ bnd_c6_2 X3 bnd_a1196 |
% 7.19/6.74 (ALL X4.
% 7.19/6.74 bnd_ndr1_1 X3 -->
% 7.19/6.74 (bnd_c5_2 X3 X4 | ~ bnd_c9_2 X3 X4) | bnd_c7_2 X3 X4)) |
% 7.19/6.74 ((bnd_ndr1_1 X3 & bnd_c6_2 X3 bnd_a1197) &
% 7.19/6.74 ~ bnd_c10_2 X3 bnd_a1197) &
% 7.19/6.74 ~ bnd_c4_2 X3 bnd_a1197) |
% 7.19/6.74 bnd_c4_0) |
% 7.19/6.74 bnd_c3_0)) &
% 7.19/6.74 ((((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a1198) &
% 7.19/6.74 (ALL X5.
% 7.19/6.74 bnd_ndr1_1 bnd_a1198 -->
% 7.19/6.74 bnd_c9_2 bnd_a1198 X5 | ~ bnd_c1_2 bnd_a1198 X5)) &
% 7.19/6.74 ~ bnd_c8_1 bnd_a1198 |
% 7.19/6.74 (ALL X6.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 ((ALL X7.
% 7.19/6.74 bnd_ndr1_1 X6 -->
% 7.19/6.74 (bnd_c2_2 X6 X7 | ~ bnd_c9_2 X6 X7) | bnd_c7_2 X6 X7) |
% 7.19/6.74 bnd_c8_1 X6) |
% 7.19/6.74 bnd_c5_1 X6)) |
% 7.19/6.74 bnd_c4_0)) &
% 7.19/6.74 ((~ bnd_c10_0 |
% 7.19/6.74 (ALL X8.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 ((ALL X9.
% 7.19/6.74 bnd_ndr1_1 X8 -->
% 7.19/6.74 (~ bnd_c1_2 X8 X9 | bnd_c9_2 X8 X9) | bnd_c4_2 X8 X9) |
% 7.19/6.74 ~ bnd_c8_1 X8) |
% 7.19/6.74 bnd_c3_1 X8)) |
% 7.19/6.74 bnd_c7_0)) &
% 7.19/6.74 ((bnd_c2_0 | ~ bnd_c4_0) | ~ bnd_c6_0)) &
% 7.19/6.74 ((~ bnd_c6_0 |
% 7.19/6.74 (ALL X10.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (~ bnd_c9_1 X10 | ~ bnd_c1_1 X10) |
% 7.19/6.74 ((bnd_ndr1_1 X10 & bnd_c6_2 X10 bnd_a1199) & bnd_c8_2 X10 bnd_a1199) &
% 7.19/6.74 bnd_c4_2 X10 bnd_a1199)) |
% 7.19/6.74 bnd_c8_0)) &
% 7.19/6.74 ((~ bnd_c2_0 |
% 7.19/6.74 (bnd_ndr1_0 & ~ bnd_c6_1 bnd_a1200) &
% 7.19/6.74 (ALL X11.
% 7.19/6.74 bnd_ndr1_1 bnd_a1200 -->
% 7.19/6.74 bnd_c2_2 bnd_a1200 X11 | bnd_c4_2 bnd_a1200 X11)) |
% 7.19/6.74 bnd_c8_0)) &
% 7.19/6.74 ((~ bnd_c6_0 |
% 7.19/6.74 ((((((((bnd_ndr1_0 &
% 7.19/6.74 bnd_ndr1_1 bnd_a1201) &
% 7.19/6.74 bnd_c4_2 bnd_a1201 bnd_a1202) &
% 7.19/6.74 ~ bnd_c6_2 bnd_a1201 bnd_a1202) &
% 7.19/6.74 bnd_c2_2 bnd_a1201 bnd_a1202) &
% 7.19/6.74 bnd_ndr1_1 bnd_a1201) &
% 7.19/6.74 bnd_c7_2 bnd_a1201 bnd_a1203) &
% 7.19/6.74 bnd_c9_2 bnd_a1201 bnd_a1203) &
% 7.19/6.74 bnd_c5_2 bnd_a1201 bnd_a1203) &
% 7.19/6.74 ~ bnd_c4_1 bnd_a1201) |
% 7.19/6.74 (ALL X12.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (bnd_c9_1 X12 | bnd_c1_1 X12) |
% 7.19/6.74 (ALL X13.
% 7.19/6.74 bnd_ndr1_1 X12 -->
% 7.19/6.74 (bnd_c6_2 X12 X13 | ~ bnd_c2_2 X12 X13) | bnd_c4_2 X12 X13)))) &
% 7.19/6.74 (((ALL X14.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (bnd_c3_1 X14 |
% 7.19/6.74 ((bnd_ndr1_1 X14 & ~ bnd_c10_2 X14 bnd_a1204) & bnd_c1_2 X14 bnd_a1204) &
% 7.19/6.74 ~ bnd_c8_2 X14 bnd_a1204) |
% 7.19/6.74 ~ bnd_c1_1 X14) |
% 7.19/6.74 (ALL X15.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (bnd_c4_1 X15 |
% 7.19/6.74 ((bnd_ndr1_1 X15 & ~ bnd_c3_2 X15 bnd_a1205) &
% 7.19/6.74 ~ bnd_c2_2 X15 bnd_a1205) &
% 7.19/6.74 bnd_c5_2 X15 bnd_a1205) |
% 7.19/6.74 bnd_c5_1 X15)) |
% 7.19/6.74 ~ bnd_c5_0)) &
% 7.19/6.74 ((bnd_c9_0 | ~ bnd_c3_0) | ~ bnd_c6_0)) &
% 7.19/6.74 ((bnd_c9_0 | bnd_c8_0) |
% 7.19/6.74 ((bnd_ndr1_0 & bnd_c2_1 bnd_a1206) &
% 7.19/6.74 (ALL X16.
% 7.19/6.74 bnd_ndr1_1 bnd_a1206 -->
% 7.19/6.74 (~ bnd_c4_2 bnd_a1206 X16 | ~ bnd_c9_2 bnd_a1206 X16) |
% 7.19/6.74 ~ bnd_c8_2 bnd_a1206 X16)) &
% 7.19/6.74 bnd_c1_1 bnd_a1206)) &
% 7.19/6.74 ((((bnd_ndr1_0 & ~ bnd_c8_1 bnd_a1207) &
% 7.19/6.74 (ALL X17.
% 7.19/6.74 bnd_ndr1_1 bnd_a1207 -->
% 7.19/6.74 (~ bnd_c6_2 bnd_a1207 X17 | bnd_c8_2 bnd_a1207 X17) |
% 7.19/6.74 ~ bnd_c4_2 bnd_a1207 X17)) &
% 7.19/6.74 bnd_c9_1 bnd_a1207 |
% 7.19/6.74 ~ bnd_c2_0) |
% 7.19/6.74 ((bnd_ndr1_0 &
% 7.19/6.74 (ALL X18.
% 7.19/6.74 bnd_ndr1_1 bnd_a1208 -->
% 7.19/6.74 ~ bnd_c10_2 bnd_a1208 X18 | ~ bnd_c4_2 bnd_a1208 X18)) &
% 7.19/6.74 bnd_c10_1 bnd_a1208) &
% 7.19/6.74 bnd_c9_1 bnd_a1208)) &
% 7.19/6.74 ((ALL X19.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (bnd_c7_1 X19 |
% 7.19/6.74 (ALL X20.
% 7.19/6.74 bnd_ndr1_1 X19 -->
% 7.19/6.74 (bnd_c6_2 X19 X20 | bnd_c10_2 X19 X20) | ~ bnd_c9_2 X19 X20)) |
% 7.19/6.74 (ALL X21.
% 7.19/6.74 bnd_ndr1_1 X19 -->
% 7.19/6.74 (bnd_c3_2 X19 X21 | ~ bnd_c7_2 X19 X21) | ~ bnd_c10_2 X19 X21)) |
% 7.19/6.74 ~ bnd_c2_0)) &
% 7.19/6.74 (~ bnd_c10_0 | bnd_c9_0)) &
% 7.19/6.74 ((bnd_c9_0 |
% 7.19/6.74 (ALL X22.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (((bnd_ndr1_1 X22 &
% 7.19/6.74 ~ bnd_c10_2 X22 bnd_a1209) &
% 7.19/6.74 ~ bnd_c8_2 X22 bnd_a1209) &
% 7.19/6.74 bnd_c9_2 X22 bnd_a1209 |
% 7.19/6.74 (ALL X23.
% 7.19/6.74 bnd_ndr1_1 X22 -->
% 7.19/6.74 (bnd_c7_2 X22 X23 | ~ bnd_c1_2 X22 X23) | bnd_c9_2 X22 X23)) |
% 7.19/6.74 bnd_c5_1 X22)) |
% 7.19/6.74 ~ bnd_c6_0)) &
% 7.19/6.74 ((~ bnd_c4_0 |
% 7.19/6.74 ((bnd_ndr1_0 & bnd_c10_1 bnd_a1210) &
% 7.19/6.74 ~ bnd_c9_1 bnd_a1210) &
% 7.19/6.74 (ALL X24.
% 7.19/6.74 bnd_ndr1_1 bnd_a1210 -->
% 7.19/6.74 (bnd_c2_2 bnd_a1210 X24 |
% 7.19/6.74 bnd_c5_2 bnd_a1210 X24) |
% 7.19/6.74 ~ bnd_c1_2 bnd_a1210 X24)) |
% 7.19/6.74 bnd_c2_0)) &
% 7.19/6.74 ((bnd_c8_0 |
% 7.19/6.74 (((((bnd_ndr1_0 &
% 7.19/6.74 (ALL X25.
% 7.19/6.74 bnd_ndr1_1 bnd_a1211 -->
% 7.19/6.74 (bnd_c1_2 bnd_a1211 X25 |
% 7.19/6.74 bnd_c2_2 bnd_a1211 X25) |
% 7.19/6.74 ~ bnd_c7_2 bnd_a1211 X25)) &
% 7.19/6.74 ~ bnd_c10_1 bnd_a1211) &
% 7.19/6.74 bnd_ndr1_1 bnd_a1211) &
% 7.19/6.74 bnd_c10_2 bnd_a1211 bnd_a1212) &
% 7.19/6.74 ~ bnd_c8_2 bnd_a1211 bnd_a1212) &
% 7.19/6.74 ~ bnd_c2_2 bnd_a1211 bnd_a1212) |
% 7.19/6.74 bnd_c3_0)) &
% 7.19/6.74 ((((bnd_ndr1_0 & bnd_c7_1 bnd_a1213) &
% 7.19/6.74 (ALL X26.
% 7.19/6.74 bnd_ndr1_1 bnd_a1213 -->
% 7.19/6.74 (~ bnd_c2_2 bnd_a1213 X26 |
% 7.19/6.74 bnd_c1_2 bnd_a1213 X26) |
% 7.19/6.74 bnd_c4_2 bnd_a1213 X26)) &
% 7.19/6.74 bnd_c2_1 bnd_a1213 |
% 7.19/6.74 bnd_c4_0) |
% 7.19/6.74 bnd_c6_0)) &
% 7.19/6.74 ((bnd_c3_0 | ~ bnd_c9_0) |
% 7.19/6.74 ((bnd_ndr1_0 & bnd_c1_1 bnd_a1214) &
% 7.19/6.74 (ALL X27.
% 7.19/6.74 bnd_ndr1_1 bnd_a1214 -->
% 7.19/6.74 bnd_c7_2 bnd_a1214 X27 |
% 7.19/6.74 ~ bnd_c5_2 bnd_a1214 X27)) &
% 7.19/6.74 bnd_c3_1 bnd_a1214)) &
% 7.19/6.74 (((ALL X28.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (~ bnd_c2_1 X28 | bnd_c4_1 X28) |
% 7.19/6.74 bnd_c5_1 X28) |
% 7.19/6.74 bnd_c7_0) |
% 7.19/6.74 (((((bnd_ndr1_0 &
% 7.19/6.74 (ALL X29.
% 7.19/6.74 bnd_ndr1_1 bnd_a1215 -->
% 7.19/6.74 (bnd_c5_2 bnd_a1215 X29 |
% 7.19/6.74 ~ bnd_c6_2 bnd_a1215 X29) |
% 7.19/6.74 bnd_c1_2 bnd_a1215 X29)) &
% 7.19/6.74 bnd_ndr1_1 bnd_a1215) &
% 7.19/6.74 ~ bnd_c6_2 bnd_a1215 bnd_a1216) &
% 7.19/6.74 ~ bnd_c3_2 bnd_a1215 bnd_a1216) &
% 7.19/6.74 bnd_c2_2 bnd_a1215 bnd_a1216) &
% 7.19/6.74 bnd_c6_1 bnd_a1215)) &
% 7.19/6.74 ((bnd_c2_0 |
% 7.19/6.74 (ALL X30.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (bnd_c4_1 X30 |
% 7.19/6.74 (ALL X31.
% 7.19/6.74 bnd_ndr1_1 X30 -->
% 7.19/6.74 (bnd_c9_2 X30 X31 | ~ bnd_c1_2 X30 X31) |
% 7.19/6.74 bnd_c4_2 X30 X31)) |
% 7.19/6.74 (ALL X32.
% 7.19/6.74 bnd_ndr1_1 X30 -->
% 7.19/6.74 (~ bnd_c7_2 X30 X32 | bnd_c2_2 X30 X32) |
% 7.19/6.74 ~ bnd_c4_2 X30 X32))) |
% 7.19/6.74 (ALL X33.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 ((ALL X34.
% 7.19/6.74 bnd_ndr1_1 X33 -->
% 7.19/6.74 (bnd_c5_2 X33 X34 | ~ bnd_c4_2 X33 X34) |
% 7.19/6.74 ~ bnd_c10_2 X33 X34) |
% 7.19/6.74 ~ bnd_c6_1 X33) |
% 7.19/6.74 ~ bnd_c10_1 X33))) &
% 7.19/6.74 ((bnd_c4_0 |
% 7.19/6.74 (ALL X35.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (bnd_c1_1 X35 |
% 7.19/6.74 ((bnd_ndr1_1 X35 & ~ bnd_c7_2 X35 bnd_a1217) &
% 7.19/6.74 bnd_c3_2 X35 bnd_a1217) &
% 7.19/6.74 bnd_c2_2 X35 bnd_a1217) |
% 7.19/6.74 (ALL X36.
% 7.19/6.74 bnd_ndr1_1 X35 -->
% 7.19/6.74 ~ bnd_c6_2 X35 X36 | bnd_c4_2 X35 X36))) |
% 7.19/6.74 bnd_c9_0)) &
% 7.19/6.74 ((~ bnd_c2_0 |
% 7.19/6.74 (((((bnd_ndr1_0 &
% 7.19/6.74 (ALL X37.
% 7.19/6.74 bnd_ndr1_1 bnd_a1218 -->
% 7.19/6.74 (~ bnd_c6_2 bnd_a1218 X37 |
% 7.19/6.74 bnd_c10_2 bnd_a1218 X37) |
% 7.19/6.74 ~ bnd_c9_2 bnd_a1218 X37)) &
% 7.19/6.74 bnd_ndr1_1 bnd_a1218) &
% 7.19/6.74 ~ bnd_c6_2 bnd_a1218 bnd_a1219) &
% 7.19/6.74 ~ bnd_c10_2 bnd_a1218 bnd_a1219) &
% 7.19/6.74 ~ bnd_c4_2 bnd_a1218 bnd_a1219) &
% 7.19/6.74 bnd_c2_1 bnd_a1218) |
% 7.19/6.74 ((bnd_ndr1_0 & bnd_c2_1 bnd_a1220) &
% 7.19/6.74 ~ bnd_c6_1 bnd_a1220) &
% 7.19/6.74 bnd_c10_1 bnd_a1220)) &
% 7.19/6.74 (((ALL X38.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (((bnd_ndr1_1 X38 & bnd_c10_2 X38 bnd_a1221) &
% 7.19/6.74 bnd_c4_2 X38 bnd_a1221) &
% 7.19/6.74 ~ bnd_c8_2 X38 bnd_a1221 |
% 7.19/6.74 ((bnd_ndr1_1 X38 & bnd_c2_2 X38 bnd_a1222) &
% 7.19/6.74 bnd_c5_2 X38 bnd_a1222) &
% 7.19/6.74 ~ bnd_c4_2 X38 bnd_a1222) |
% 7.19/6.74 bnd_c6_1 X38) |
% 7.19/6.74 ((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a1223) &
% 7.19/6.74 (ALL X39.
% 7.19/6.74 bnd_ndr1_1 bnd_a1223 -->
% 7.19/6.74 (~ bnd_c3_2 bnd_a1223 X39 |
% 7.19/6.74 bnd_c8_2 bnd_a1223 X39) |
% 7.19/6.74 ~ bnd_c7_2 bnd_a1223 X39)) &
% 7.19/6.74 bnd_c2_1 bnd_a1223) |
% 7.19/6.74 bnd_c6_0)) &
% 7.19/6.74 (((ALL X40.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (((bnd_ndr1_1 X40 & ~ bnd_c1_2 X40 bnd_a1224) &
% 7.19/6.74 bnd_c10_2 X40 bnd_a1224) &
% 7.19/6.74 ~ bnd_c8_2 X40 bnd_a1224 |
% 7.19/6.74 bnd_c7_1 X40) |
% 7.19/6.74 ~ bnd_c1_1 X40) |
% 7.19/6.74 bnd_c5_0) |
% 7.19/6.74 ~ bnd_c10_0)) &
% 7.19/6.74 (~ bnd_c8_0 | bnd_c3_0)) &
% 7.19/6.74 ((bnd_c9_0 |
% 7.19/6.74 ((bnd_ndr1_0 &
% 7.19/6.74 (ALL X41.
% 7.19/6.74 bnd_ndr1_1 bnd_a1225 -->
% 7.19/6.74 (bnd_c4_2 bnd_a1225 X41 | bnd_c1_2 bnd_a1225 X41) |
% 7.19/6.74 bnd_c7_2 bnd_a1225 X41)) &
% 7.19/6.74 (ALL X42.
% 7.19/6.74 bnd_ndr1_1 bnd_a1225 -->
% 7.19/6.74 (bnd_c8_2 bnd_a1225 X42 | bnd_c3_2 bnd_a1225 X42) |
% 7.19/6.74 ~ bnd_c4_2 bnd_a1225 X42)) &
% 7.19/6.74 (ALL X43.
% 7.19/6.74 bnd_ndr1_1 bnd_a1225 -->
% 7.19/6.74 (bnd_c7_2 bnd_a1225 X43 | ~ bnd_c5_2 bnd_a1225 X43) |
% 7.19/6.74 bnd_c8_2 bnd_a1225 X43)) |
% 7.19/6.74 ~ bnd_c6_0)) &
% 7.19/6.74 ((bnd_c5_0 |
% 7.19/6.74 (((((bnd_ndr1_0 & ~ bnd_c9_1 bnd_a1226) &
% 7.19/6.74 bnd_c7_1 bnd_a1226) &
% 7.19/6.74 bnd_ndr1_1 bnd_a1226) &
% 7.19/6.74 ~ bnd_c8_2 bnd_a1226 bnd_a1227) &
% 7.19/6.74 ~ bnd_c5_2 bnd_a1226 bnd_a1227) &
% 7.19/6.74 ~ bnd_c6_2 bnd_a1226 bnd_a1227) |
% 7.19/6.74 ~ bnd_c9_0)) &
% 7.19/6.74 ((bnd_c9_0 | bnd_c10_0) |
% 7.19/6.74 (ALL X44.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (~ bnd_c9_1 X44 | ~ bnd_c10_1 X44) | bnd_c5_1 X44))) &
% 7.19/6.74 (((bnd_ndr1_0 & bnd_c1_1 bnd_a1228) &
% 7.19/6.74 (ALL X45.
% 7.19/6.74 bnd_ndr1_1 bnd_a1228 -->
% 7.19/6.74 (~ bnd_c10_2 bnd_a1228 X45 | ~ bnd_c2_2 bnd_a1228 X45) |
% 7.19/6.74 bnd_c5_2 bnd_a1228 X45)) &
% 7.19/6.74 ~ bnd_c7_1 bnd_a1228 |
% 7.19/6.74 bnd_c4_0)) &
% 7.19/6.74 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1229) &
% 7.19/6.74 bnd_c4_2 bnd_a1229 bnd_a1230) &
% 7.19/6.74 bnd_c7_2 bnd_a1229 bnd_a1230) &
% 7.19/6.74 bnd_c10_2 bnd_a1229 bnd_a1230) &
% 7.19/6.74 (ALL X46.
% 7.19/6.74 bnd_ndr1_1 bnd_a1229 -->
% 7.19/6.74 (~ bnd_c4_2 bnd_a1229 X46 | bnd_c1_2 bnd_a1229 X46) |
% 7.19/6.74 bnd_c6_2 bnd_a1229 X46) |
% 7.19/6.74 (ALL X47.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (((bnd_ndr1_1 X47 & bnd_c9_2 X47 bnd_a1231) &
% 7.19/6.74 bnd_c6_2 X47 bnd_a1231) &
% 7.19/6.74 ~ bnd_c7_2 X47 bnd_a1231 |
% 7.19/6.74 ~ bnd_c5_1 X47) |
% 7.19/6.74 (ALL X48.
% 7.19/6.74 bnd_ndr1_1 X47 -->
% 7.19/6.74 (~ bnd_c3_2 X47 X48 | ~ bnd_c5_2 X47 X48) |
% 7.19/6.74 bnd_c9_2 X47 X48)))) &
% 7.19/6.74 ((~ bnd_c7_0 |
% 7.19/6.74 (ALL X49.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 bnd_c9_1 X49 |
% 7.19/6.74 (ALL X50.
% 7.19/6.74 bnd_ndr1_1 X49 -->
% 7.19/6.74 (bnd_c10_2 X49 X50 | ~ bnd_c8_2 X49 X50) |
% 7.19/6.74 bnd_c4_2 X49 X50))) |
% 7.19/6.74 (ALL X51.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (bnd_c3_1 X51 |
% 7.19/6.74 ((bnd_ndr1_1 X51 & bnd_c1_2 X51 bnd_a1232) &
% 7.19/6.74 ~ bnd_c10_2 X51 bnd_a1232) &
% 7.19/6.74 bnd_c8_2 X51 bnd_a1232) |
% 7.19/6.74 bnd_c7_1 X51))) &
% 7.19/6.74 (((ALL X52.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (((bnd_ndr1_1 X52 & ~ bnd_c3_2 X52 bnd_a1233) &
% 7.19/6.74 bnd_c9_2 X52 bnd_a1233) &
% 7.19/6.74 bnd_c10_2 X52 bnd_a1233 |
% 7.19/6.74 ~ bnd_c5_1 X52) |
% 7.19/6.74 ((bnd_ndr1_1 X52 & bnd_c7_2 X52 bnd_a1234) &
% 7.19/6.74 bnd_c4_2 X52 bnd_a1234) &
% 7.19/6.74 ~ bnd_c10_2 X52 bnd_a1234) |
% 7.19/6.74 (((((bnd_ndr1_0 & bnd_c4_1 bnd_a1235) &
% 7.19/6.74 (ALL X53.
% 7.19/6.74 bnd_ndr1_1 bnd_a1235 -->
% 7.19/6.74 (bnd_c2_2 bnd_a1235 X53 | ~ bnd_c9_2 bnd_a1235 X53) |
% 7.19/6.74 ~ bnd_c4_2 bnd_a1235 X53)) &
% 7.19/6.74 bnd_ndr1_1 bnd_a1235) &
% 7.19/6.74 ~ bnd_c8_2 bnd_a1235 bnd_a1236) &
% 7.19/6.74 ~ bnd_c3_2 bnd_a1235 bnd_a1236) &
% 7.19/6.74 bnd_c4_2 bnd_a1235 bnd_a1236) |
% 7.19/6.74 bnd_c1_0)) &
% 7.19/6.74 ((((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1237) &
% 7.19/6.74 bnd_c5_2 bnd_a1237 bnd_a1238) &
% 7.19/6.74 bnd_c7_2 bnd_a1237 bnd_a1238) &
% 7.19/6.74 bnd_c4_2 bnd_a1237 bnd_a1238) &
% 7.19/6.74 bnd_ndr1_1 bnd_a1237) &
% 7.19/6.74 bnd_c5_2 bnd_a1237 bnd_a1239) &
% 7.19/6.74 ~ bnd_c6_2 bnd_a1237 bnd_a1239) &
% 7.19/6.74 ~ bnd_c2_2 bnd_a1237 bnd_a1239) &
% 7.19/6.74 ~ bnd_c8_1 bnd_a1237 |
% 7.19/6.74 (ALL X54. bnd_ndr1_0 --> ~ bnd_c3_1 X54 | bnd_c8_1 X54)) |
% 7.19/6.74 bnd_c8_0)) &
% 7.19/6.74 bnd_c9_0) &
% 7.19/6.74 ((~ bnd_c3_0 |
% 7.19/6.74 ((bnd_ndr1_0 &
% 7.19/6.74 (ALL X55.
% 7.19/6.74 bnd_ndr1_1 bnd_a1240 -->
% 7.19/6.74 (bnd_c6_2 bnd_a1240 X55 | bnd_c4_2 bnd_a1240 X55) |
% 7.19/6.74 bnd_c5_2 bnd_a1240 X55)) &
% 7.19/6.74 (ALL X56.
% 7.19/6.74 bnd_ndr1_1 bnd_a1240 -->
% 7.19/6.74 (~ bnd_c5_2 bnd_a1240 X56 | bnd_c3_2 bnd_a1240 X56) |
% 7.19/6.74 bnd_c4_2 bnd_a1240 X56)) &
% 7.19/6.74 ~ bnd_c7_1 bnd_a1240) |
% 7.19/6.74 ((bnd_ndr1_0 &
% 7.19/6.74 (ALL X57.
% 7.19/6.74 bnd_ndr1_1 bnd_a1241 -->
% 7.19/6.74 (bnd_c6_2 bnd_a1241 X57 | ~ bnd_c8_2 bnd_a1241 X57) |
% 7.19/6.74 bnd_c7_2 bnd_a1241 X57)) &
% 7.19/6.74 (ALL X58.
% 7.19/6.74 bnd_ndr1_1 bnd_a1241 -->
% 7.19/6.74 ~ bnd_c9_2 bnd_a1241 X58 | ~ bnd_c10_2 bnd_a1241 X58)) &
% 7.19/6.74 ~ bnd_c3_1 bnd_a1241)) &
% 7.19/6.74 ((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1242) &
% 7.19/6.74 bnd_c8_2 bnd_a1242 bnd_a1243) &
% 7.19/6.74 bnd_c10_2 bnd_a1242 bnd_a1243) &
% 7.19/6.74 bnd_c2_2 bnd_a1242 bnd_a1243) &
% 7.19/6.74 bnd_c9_1 bnd_a1242 |
% 7.19/6.74 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1244) &
% 7.19/6.74 bnd_c6_2 bnd_a1244 bnd_a1245) &
% 7.19/6.74 bnd_c4_2 bnd_a1244 bnd_a1245) &
% 7.19/6.74 bnd_c7_2 bnd_a1244 bnd_a1245) &
% 7.19/6.74 bnd_c2_1 bnd_a1244) &
% 7.19/6.74 ~ bnd_c10_1 bnd_a1244) |
% 7.19/6.74 (ALL X59.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 bnd_c7_1 X59 |
% 7.19/6.74 ((bnd_ndr1_1 X59 & ~ bnd_c1_2 X59 bnd_a1246) &
% 7.19/6.74 bnd_c5_2 X59 bnd_a1246) &
% 7.19/6.74 ~ bnd_c9_2 X59 bnd_a1246))) &
% 7.19/6.74 ((((bnd_ndr1_0 & bnd_c6_1 bnd_a1247) & bnd_c9_1 bnd_a1247) &
% 7.19/6.74 (ALL X60.
% 7.19/6.74 bnd_ndr1_1 bnd_a1247 -->
% 7.19/6.74 (bnd_c5_2 bnd_a1247 X60 | ~ bnd_c10_2 bnd_a1247 X60) |
% 7.19/6.74 ~ bnd_c2_2 bnd_a1247 X60) |
% 7.19/6.74 bnd_c5_0) |
% 7.19/6.74 ~ bnd_c10_0)) &
% 7.19/6.74 ((~ bnd_c7_0 |
% 7.19/6.74 (ALL X61.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 ((ALL X62.
% 7.19/6.74 bnd_ndr1_1 X61 -->
% 7.19/6.74 (bnd_c2_2 X61 X62 | bnd_c5_2 X61 X62) | ~ bnd_c7_2 X61 X62) |
% 7.19/6.74 (ALL X63.
% 7.19/6.74 bnd_ndr1_1 X61 -->
% 7.19/6.74 (bnd_c5_2 X61 X63 | bnd_c2_2 X61 X63) |
% 7.19/6.74 ~ bnd_c1_2 X61 X63)) |
% 7.19/6.74 ~ bnd_c7_1 X61)) |
% 7.19/6.74 bnd_c4_0)) &
% 7.19/6.74 ((~ bnd_c8_0 | ~ bnd_c5_0) |
% 7.19/6.74 ((bnd_ndr1_0 &
% 7.19/6.74 (ALL X64.
% 7.19/6.74 bnd_ndr1_1 bnd_a1248 -->
% 7.19/6.74 ~ bnd_c4_2 bnd_a1248 X64 | ~ bnd_c1_2 bnd_a1248 X64)) &
% 7.19/6.74 ~ bnd_c4_1 bnd_a1248) &
% 7.19/6.74 ~ bnd_c5_1 bnd_a1248)) &
% 7.19/6.74 (((ALL X65.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (ALL X66.
% 7.19/6.74 bnd_ndr1_1 X65 -->
% 7.19/6.74 (~ bnd_c9_2 X65 X66 | ~ bnd_c5_2 X65 X66) |
% 7.19/6.74 ~ bnd_c6_2 X65 X66) |
% 7.19/6.74 bnd_c9_1 X65) |
% 7.19/6.74 (ALL X67.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (bnd_c2_1 X67 |
% 7.19/6.74 (ALL X68.
% 7.19/6.74 bnd_ndr1_1 X67 -->
% 7.19/6.74 (~ bnd_c2_2 X67 X68 | ~ bnd_c4_2 X67 X68) |
% 7.19/6.74 ~ bnd_c7_2 X67 X68)) |
% 7.19/6.74 ~ bnd_c10_1 X67)) |
% 7.19/6.74 ~ bnd_c1_0)) &
% 7.19/6.74 ~ bnd_c5_0) &
% 7.19/6.74 ((((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a1249) &
% 7.19/6.74 (ALL X69.
% 7.19/6.74 bnd_ndr1_1 bnd_a1249 -->
% 7.19/6.74 (bnd_c3_2 bnd_a1249 X69 | bnd_c6_2 bnd_a1249 X69) |
% 7.19/6.74 bnd_c5_2 bnd_a1249 X69)) &
% 7.19/6.74 bnd_c4_1 bnd_a1249 |
% 7.19/6.74 (bnd_ndr1_0 & bnd_c2_1 bnd_a1250) &
% 7.19/6.74 (ALL X70.
% 7.19/6.74 bnd_ndr1_1 bnd_a1250 -->
% 7.19/6.74 (bnd_c8_2 bnd_a1250 X70 | ~ bnd_c7_2 bnd_a1250 X70) |
% 7.19/6.74 bnd_c5_2 bnd_a1250 X70)) |
% 7.19/6.74 (ALL X71.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 ((ALL X72.
% 7.19/6.74 bnd_ndr1_1 X71 -->
% 7.19/6.74 (bnd_c3_2 X71 X72 | bnd_c5_2 X71 X72) | bnd_c7_2 X71 X72) |
% 7.19/6.74 (ALL X73.
% 7.19/6.74 bnd_ndr1_1 X71 -->
% 7.19/6.74 (bnd_c10_2 X71 X73 | ~ bnd_c3_2 X71 X73) | bnd_c7_2 X71 X73)) |
% 7.19/6.74 ~ bnd_c2_1 X71))) &
% 7.19/6.74 (((ALL X74.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (bnd_c10_1 X74 | bnd_c3_1 X74) |
% 7.19/6.74 ((bnd_ndr1_1 X74 & ~ bnd_c3_2 X74 bnd_a1251) &
% 7.19/6.74 ~ bnd_c5_2 X74 bnd_a1251) &
% 7.19/6.74 bnd_c8_2 X74 bnd_a1251) |
% 7.19/6.74 ~ bnd_c10_0) |
% 7.19/6.74 ~ bnd_c3_0)) &
% 7.19/6.74 ((((((((((bnd_ndr1_0 &
% 7.19/6.74 (ALL X75.
% 7.19/6.74 bnd_ndr1_1 bnd_a1252 -->
% 7.19/6.74 (~ bnd_c4_2 bnd_a1252 X75 | ~ bnd_c3_2 bnd_a1252 X75) |
% 7.19/6.74 bnd_c8_2 bnd_a1252 X75)) &
% 7.19/6.74 bnd_ndr1_1 bnd_a1252) &
% 7.19/6.74 ~ bnd_c2_2 bnd_a1252 bnd_a1253) &
% 7.19/6.74 bnd_c5_2 bnd_a1252 bnd_a1253) &
% 7.19/6.74 ~ bnd_c6_2 bnd_a1252 bnd_a1253) &
% 7.19/6.74 bnd_ndr1_1 bnd_a1252) &
% 7.19/6.74 ~ bnd_c10_2 bnd_a1252 bnd_a1254) &
% 7.19/6.74 bnd_c2_2 bnd_a1252 bnd_a1254) &
% 7.19/6.74 bnd_c5_2 bnd_a1252 bnd_a1254 |
% 7.19/6.74 bnd_c6_0) |
% 7.19/6.74 bnd_c3_0)) &
% 7.19/6.74 ((~ bnd_c6_0 |
% 7.19/6.74 (ALL X76.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 ((ALL X77.
% 7.19/6.74 bnd_ndr1_1 X76 -->
% 7.19/6.74 (bnd_c10_2 X76 X77 | ~ bnd_c9_2 X76 X77) | ~ bnd_c2_2 X76 X77) |
% 7.19/6.74 bnd_c7_1 X76) |
% 7.19/6.74 ~ bnd_c2_1 X76)) |
% 7.19/6.74 (ALL X78.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (~ bnd_c3_1 X78 |
% 7.19/6.74 (ALL X79.
% 7.19/6.74 bnd_ndr1_1 X78 -->
% 7.19/6.74 (bnd_c7_2 X78 X79 | ~ bnd_c9_2 X78 X79) | ~ bnd_c6_2 X78 X79)) |
% 7.19/6.74 bnd_c4_1 X78))) &
% 7.19/6.74 (((ALL X80.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 ((ALL X81.
% 7.19/6.74 bnd_ndr1_1 X80 -->
% 7.19/6.74 (~ bnd_c5_2 X80 X81 | bnd_c3_2 X80 X81) | bnd_c4_2 X80 X81) |
% 7.19/6.74 (ALL X82.
% 7.19/6.74 bnd_ndr1_1 X80 -->
% 7.19/6.74 (~ bnd_c4_2 X80 X82 | bnd_c8_2 X80 X82) | ~ bnd_c1_2 X80 X82)) |
% 7.19/6.74 (ALL X83.
% 7.19/6.74 bnd_ndr1_1 X80 -->
% 7.19/6.74 (~ bnd_c4_2 X80 X83 | bnd_c8_2 X80 X83) | bnd_c2_2 X80 X83)) |
% 7.19/6.74 bnd_c7_0) |
% 7.19/6.74 (((((bnd_ndr1_0 & bnd_c9_1 bnd_a1255) &
% 7.19/6.74 bnd_c1_1 bnd_a1255) &
% 7.19/6.74 bnd_ndr1_1 bnd_a1255) &
% 7.19/6.74 ~ bnd_c9_2 bnd_a1255 bnd_a1256) &
% 7.19/6.74 ~ bnd_c7_2 bnd_a1255 bnd_a1256) &
% 7.19/6.74 bnd_c10_2 bnd_a1255 bnd_a1256)) &
% 7.19/6.74 ((~ bnd_c10_0 | ~ bnd_c8_0) |
% 7.19/6.74 ~ bnd_c2_0)) &
% 7.19/6.74 (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1257) &
% 7.19/6.74 ~ bnd_c4_2 bnd_a1257 bnd_a1258) &
% 7.19/6.74 bnd_c3_2 bnd_a1257 bnd_a1258) &
% 7.19/6.74 bnd_c7_2 bnd_a1257 bnd_a1258) &
% 7.19/6.74 bnd_c8_1 bnd_a1257) &
% 7.19/6.74 ~ bnd_c9_1 bnd_a1257 |
% 7.19/6.74 (bnd_ndr1_0 & ~ bnd_c6_1 bnd_a1259) &
% 7.19/6.74 bnd_c5_1 bnd_a1259) |
% 7.19/6.74 bnd_c4_0)) &
% 7.19/6.74 ((~ bnd_c6_0 | bnd_c4_0) | bnd_c8_0)) &
% 7.19/6.74 ((~ bnd_c4_0 |
% 7.19/6.74 (ALL X84.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (bnd_c7_1 X84 | ~ bnd_c9_1 X84) |
% 7.19/6.74 (ALL X85.
% 7.19/6.74 bnd_ndr1_1 X84 -->
% 7.19/6.74 (bnd_c3_2 X84 X85 | ~ bnd_c6_2 X84 X85) | ~ bnd_c8_2 X84 X85))) |
% 7.19/6.74 (ALL X86.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (((bnd_ndr1_1 X86 &
% 7.19/6.74 bnd_c9_2 X86 bnd_a1260) &
% 7.19/6.74 ~ bnd_c4_2 X86 bnd_a1260) &
% 7.19/6.74 ~ bnd_c1_2 X86 bnd_a1260 |
% 7.19/6.74 ~ bnd_c7_1 X86) |
% 7.19/6.74 bnd_c9_1 X86))) &
% 7.19/6.74 (((ALL X87.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (~ bnd_c7_1 X87 | bnd_c10_1 X87) |
% 7.19/6.74 ~ bnd_c3_1 X87) |
% 7.19/6.74 bnd_c1_0) |
% 7.19/6.74 ((bnd_ndr1_0 &
% 7.19/6.74 (ALL X88.
% 7.19/6.74 bnd_ndr1_1 bnd_a1261 -->
% 7.19/6.74 (bnd_c1_2 bnd_a1261 X88 |
% 7.19/6.74 bnd_c3_2 bnd_a1261 X88) |
% 7.19/6.74 ~ bnd_c4_2 bnd_a1261 X88)) &
% 7.19/6.74 bnd_c10_1 bnd_a1261) &
% 7.19/6.74 (ALL X89.
% 7.19/6.74 bnd_ndr1_1 bnd_a1261 -->
% 7.19/6.74 ~ bnd_c7_2 bnd_a1261 X89 |
% 7.19/6.74 bnd_c1_2 bnd_a1261 X89))) &
% 7.19/6.74 ((~ bnd_c6_0 |
% 7.19/6.74 ((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1262) &
% 7.19/6.74 ~ bnd_c9_2 bnd_a1262 bnd_a1263) &
% 7.19/6.74 bnd_c1_2 bnd_a1262 bnd_a1263) &
% 7.19/6.74 bnd_c7_2 bnd_a1262 bnd_a1263) &
% 7.19/6.74 (ALL X90.
% 7.19/6.74 bnd_ndr1_1 bnd_a1262 -->
% 7.19/6.74 (~ bnd_c8_2 bnd_a1262 X90 | ~ bnd_c10_2 bnd_a1262 X90) |
% 7.19/6.74 bnd_c2_2 bnd_a1262 X90)) &
% 7.19/6.74 bnd_ndr1_1 bnd_a1262) &
% 7.19/6.74 bnd_c9_2 bnd_a1262 bnd_a1264) &
% 7.19/6.74 bnd_c10_2 bnd_a1262 bnd_a1264) &
% 7.19/6.74 bnd_c5_2 bnd_a1262 bnd_a1264) |
% 7.19/6.74 bnd_c10_0)) &
% 7.19/6.74 (((bnd_ndr1_0 & bnd_c10_1 bnd_a1265) &
% 7.19/6.74 bnd_c8_1 bnd_a1265 |
% 7.19/6.74 bnd_c4_0) |
% 7.19/6.74 (ALL X91.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (bnd_c10_1 X91 |
% 7.19/6.74 ((bnd_ndr1_1 X91 &
% 7.19/6.74 ~ bnd_c3_2 X91 bnd_a1266) &
% 7.19/6.74 bnd_c5_2 X91 bnd_a1266) &
% 7.19/6.74 bnd_c8_2 X91 bnd_a1266) |
% 7.19/6.74 ((bnd_ndr1_1 X91 & bnd_c5_2 X91 bnd_a1267) &
% 7.19/6.74 ~ bnd_c2_2 X91 bnd_a1267) &
% 7.19/6.74 bnd_c3_2 X91 bnd_a1267))) &
% 7.19/6.74 (((ALL X92.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (((bnd_ndr1_1 X92 &
% 7.19/6.74 bnd_c7_2 X92 bnd_a1268) &
% 7.19/6.74 ~ bnd_c8_2 X92 bnd_a1268) &
% 7.19/6.74 ~ bnd_c9_2 X92 bnd_a1268 |
% 7.19/6.74 ~ bnd_c9_1 X92) |
% 7.19/6.74 bnd_c8_1 X92) |
% 7.19/6.74 ~ bnd_c2_0) |
% 7.19/6.74 (bnd_ndr1_0 & bnd_c7_1 bnd_a1269) &
% 7.19/6.74 ~ bnd_c4_1 bnd_a1269)) &
% 7.19/6.74 (~ bnd_c3_0 |
% 7.19/6.74 (((((bnd_ndr1_0 & ~ bnd_c10_1 bnd_a1270) &
% 7.19/6.74 bnd_c9_1 bnd_a1270) &
% 7.19/6.74 bnd_ndr1_1 bnd_a1270) &
% 7.19/6.74 bnd_c8_2 bnd_a1270 bnd_a1271) &
% 7.19/6.74 bnd_c4_2 bnd_a1270 bnd_a1271) &
% 7.19/6.74 ~ bnd_c7_2 bnd_a1270 bnd_a1271)) &
% 7.19/6.74 ((~ bnd_c6_0 |
% 7.19/6.74 (ALL X93.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 ((ALL X94.
% 7.19/6.74 bnd_ndr1_1 X93 -->
% 7.19/6.74 (~ bnd_c1_2 X93 X94 |
% 7.19/6.74 bnd_c10_2 X93 X94) |
% 7.19/6.74 bnd_c7_2 X93 X94) |
% 7.19/6.74 bnd_c6_1 X93) |
% 7.19/6.74 bnd_c10_1 X93)) |
% 7.19/6.74 (((((bnd_ndr1_0 & ~ bnd_c3_1 bnd_a1272) &
% 7.19/6.74 ~ bnd_c8_1 bnd_a1272) &
% 7.19/6.74 bnd_ndr1_1 bnd_a1272) &
% 7.19/6.74 bnd_c7_2 bnd_a1272 bnd_a1273) &
% 7.19/6.74 bnd_c2_2 bnd_a1272 bnd_a1273) &
% 7.19/6.74 bnd_c8_2 bnd_a1272 bnd_a1273)) &
% 7.19/6.74 ((bnd_c10_0 |
% 7.19/6.74 (((((bnd_ndr1_0 & ~ bnd_c10_1 bnd_a1274) &
% 7.19/6.74 bnd_ndr1_1 bnd_a1274) &
% 7.19/6.74 ~ bnd_c9_2 bnd_a1274 bnd_a1275) &
% 7.19/6.74 ~ bnd_c8_2 bnd_a1274 bnd_a1275) &
% 7.19/6.74 ~ bnd_c6_2 bnd_a1274 bnd_a1275) &
% 7.19/6.74 (ALL X95.
% 7.19/6.74 bnd_ndr1_1 bnd_a1274 -->
% 7.19/6.74 (bnd_c6_2 bnd_a1274 X95 |
% 7.19/6.74 bnd_c5_2 bnd_a1274 X95) |
% 7.19/6.74 ~ bnd_c3_2 bnd_a1274 X95)) |
% 7.19/6.74 ~ bnd_c6_0)) &
% 7.19/6.74 ((~ bnd_c8_0 |
% 7.19/6.74 (ALL X96.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 ((ALL X97.
% 7.19/6.74 bnd_ndr1_1 X96 -->
% 7.19/6.74 (~ bnd_c8_2 X96 X97 | bnd_c5_2 X96 X97) |
% 7.19/6.74 ~ bnd_c6_2 X96 X97) |
% 7.19/6.74 (ALL X98.
% 7.19/6.74 bnd_ndr1_1 X96 -->
% 7.19/6.74 (~ bnd_c4_2 X96 X98 | ~ bnd_c9_2 X96 X98) |
% 7.19/6.74 bnd_c10_2 X96 X98)) |
% 7.19/6.74 ~ bnd_c4_1 X96)) |
% 7.19/6.74 ((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1276) &
% 7.19/6.74 ~ bnd_c10_2 bnd_a1276 bnd_a1277) &
% 7.19/6.74 bnd_c6_2 bnd_a1276 bnd_a1277) &
% 7.19/6.74 bnd_c8_2 bnd_a1276 bnd_a1277) &
% 7.19/6.74 ~ bnd_c8_1 bnd_a1276)) &
% 7.19/6.74 ((bnd_c3_0 |
% 7.19/6.74 (ALL X99.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (~ bnd_c2_1 X99 | bnd_c6_1 X99) |
% 7.19/6.74 ~ bnd_c4_1 X99)) |
% 7.19/6.74 bnd_c6_0)) &
% 7.19/6.74 ((((bnd_ndr1_0 &
% 7.19/6.74 (ALL X100.
% 7.19/6.74 bnd_ndr1_1 bnd_a1278 -->
% 7.19/6.74 (~ bnd_c3_2 bnd_a1278 X100 |
% 7.19/6.74 ~ bnd_c8_2 bnd_a1278 X100) |
% 7.19/6.74 bnd_c1_2 bnd_a1278 X100)) &
% 7.19/6.74 bnd_c7_1 bnd_a1278) &
% 7.19/6.74 (ALL X101.
% 7.19/6.74 bnd_ndr1_1 bnd_a1278 -->
% 7.19/6.74 (bnd_c3_2 bnd_a1278 X101 |
% 7.19/6.74 ~ bnd_c8_2 bnd_a1278 X101) |
% 7.19/6.74 ~ bnd_c10_2 bnd_a1278 X101) |
% 7.19/6.74 (ALL X102.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (((bnd_ndr1_1 X102 & ~ bnd_c5_2 X102 bnd_a1279) &
% 7.19/6.74 ~ bnd_c2_2 X102 bnd_a1279) &
% 7.19/6.74 ~ bnd_c7_2 X102 bnd_a1279 |
% 7.19/6.74 (bnd_ndr1_1 X102 & bnd_c4_2 X102 bnd_a1280) &
% 7.19/6.74 ~ bnd_c5_2 X102 bnd_a1280) |
% 7.19/6.74 bnd_c1_1 X102)) |
% 7.19/6.74 ((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1281) &
% 7.19/6.74 ~ bnd_c3_2 bnd_a1281 bnd_a1282) &
% 7.19/6.74 bnd_c8_2 bnd_a1281 bnd_a1282) &
% 7.19/6.74 bnd_c5_2 bnd_a1281 bnd_a1282) &
% 7.19/6.74 bnd_ndr1_1 bnd_a1281) &
% 7.19/6.74 bnd_c7_2 bnd_a1281 bnd_a1283) &
% 7.19/6.74 bnd_c4_2 bnd_a1281 bnd_a1283) &
% 7.19/6.74 bnd_c9_2 bnd_a1281 bnd_a1283) &
% 7.19/6.74 ~ bnd_c10_1 bnd_a1281)) &
% 7.19/6.74 (((bnd_ndr1_0 & bnd_c2_1 bnd_a1284) &
% 7.19/6.74 bnd_c1_1 bnd_a1284 |
% 7.19/6.74 ((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1285) &
% 7.19/6.74 ~ bnd_c5_2 bnd_a1285 bnd_a1286) &
% 7.19/6.74 bnd_c2_2 bnd_a1285 bnd_a1286) &
% 7.19/6.74 bnd_c1_2 bnd_a1285 bnd_a1286) &
% 7.19/6.74 ~ bnd_c9_1 bnd_a1285) |
% 7.19/6.74 bnd_c1_0)) &
% 7.19/6.74 ((((bnd_ndr1_0 &
% 7.19/6.74 (ALL X103.
% 7.19/6.74 bnd_ndr1_1 bnd_a1287 -->
% 7.19/6.74 ~ bnd_c4_2 bnd_a1287 X103 |
% 7.19/6.74 bnd_c1_2 bnd_a1287 X103)) &
% 7.19/6.74 (ALL X104.
% 7.19/6.74 bnd_ndr1_1 bnd_a1287 -->
% 7.19/6.74 (~ bnd_c7_2 bnd_a1287 X104 |
% 7.19/6.74 ~ bnd_c6_2 bnd_a1287 X104) |
% 7.19/6.74 ~ bnd_c1_2 bnd_a1287 X104)) &
% 7.19/6.74 bnd_c3_1 bnd_a1287 |
% 7.19/6.74 ((bnd_ndr1_0 &
% 7.19/6.74 (ALL X105.
% 7.19/6.74 bnd_ndr1_1 bnd_a1288 -->
% 7.19/6.74 (bnd_c3_2 bnd_a1288 X105 |
% 7.19/6.74 ~ bnd_c1_2 bnd_a1288 X105) |
% 7.19/6.74 bnd_c8_2 bnd_a1288 X105)) &
% 7.19/6.74 (ALL X106.
% 7.19/6.74 bnd_ndr1_1 bnd_a1288 -->
% 7.19/6.74 (~ bnd_c8_2 bnd_a1288 X106 |
% 7.19/6.74 bnd_c4_2 bnd_a1288 X106) |
% 7.19/6.74 bnd_c5_2 bnd_a1288 X106)) &
% 7.19/6.74 (ALL X107.
% 7.19/6.74 bnd_ndr1_1 bnd_a1288 -->
% 7.19/6.74 (bnd_c1_2 bnd_a1288 X107 |
% 7.19/6.74 bnd_c3_2 bnd_a1288 X107) |
% 7.19/6.74 ~ bnd_c2_2 bnd_a1288 X107)) |
% 7.19/6.74 bnd_c10_0)) &
% 7.19/6.74 ((~ bnd_c8_0 | bnd_c2_0) |
% 7.19/6.74 (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1289) &
% 7.19/6.74 bnd_c2_2 bnd_a1289 bnd_a1290) &
% 7.19/6.74 ~ bnd_c6_2 bnd_a1289 bnd_a1290) &
% 7.19/6.74 bnd_ndr1_1 bnd_a1289) &
% 7.19/6.74 bnd_c2_2 bnd_a1289 bnd_a1291) &
% 7.19/6.74 ~ bnd_c4_2 bnd_a1289 bnd_a1291) &
% 7.19/6.74 bnd_c8_2 bnd_a1289 bnd_a1291) &
% 7.19/6.74 ~ bnd_c8_1 bnd_a1289)) &
% 7.19/6.74 (~ bnd_c6_0 | ~ bnd_c3_0)) &
% 7.19/6.74 ((ALL X108.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 ((ALL X109.
% 7.19/6.74 bnd_ndr1_1 X108 -->
% 7.19/6.74 (~ bnd_c7_2 X108 X109 | bnd_c6_2 X108 X109) |
% 7.19/6.74 ~ bnd_c10_2 X108 X109) |
% 7.19/6.74 ((bnd_ndr1_1 X108 & ~ bnd_c6_2 X108 bnd_a1292) &
% 7.19/6.74 bnd_c8_2 X108 bnd_a1292) &
% 7.19/6.74 ~ bnd_c10_2 X108 bnd_a1292) |
% 7.19/6.74 (ALL X110.
% 7.19/6.74 bnd_ndr1_1 X108 -->
% 7.19/6.74 (bnd_c9_2 X108 X110 | bnd_c1_2 X108 X110) |
% 7.19/6.74 bnd_c3_2 X108 X110)) |
% 7.19/6.74 ((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1293) &
% 7.19/6.74 bnd_c10_2 bnd_a1293 bnd_a1294) &
% 7.19/6.74 bnd_c5_2 bnd_a1293 bnd_a1294) &
% 7.19/6.74 (ALL X111.
% 7.19/6.74 bnd_ndr1_1 bnd_a1293 -->
% 7.19/6.74 (~ bnd_c9_2 bnd_a1293 X111 |
% 7.19/6.74 ~ bnd_c6_2 bnd_a1293 X111) |
% 7.19/6.74 ~ bnd_c8_2 bnd_a1293 X111)) &
% 7.19/6.74 (ALL X112.
% 7.19/6.74 bnd_ndr1_1 bnd_a1293 -->
% 7.19/6.74 (~ bnd_c4_2 bnd_a1293 X112 | bnd_c5_2 bnd_a1293 X112) |
% 7.19/6.74 bnd_c7_2 bnd_a1293 X112))) &
% 7.19/6.74 (((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1295) &
% 7.19/6.74 bnd_c4_2 bnd_a1295 bnd_a1296) &
% 7.19/6.74 bnd_c10_2 bnd_a1295 bnd_a1296) &
% 7.19/6.74 ~ bnd_c7_2 bnd_a1295 bnd_a1296) &
% 7.19/6.74 bnd_ndr1_1 bnd_a1295) &
% 7.19/6.74 ~ bnd_c7_2 bnd_a1295 bnd_a1297) &
% 7.19/6.74 bnd_c1_2 bnd_a1295 bnd_a1297) &
% 7.19/6.74 (ALL X113.
% 7.19/6.74 bnd_ndr1_1 bnd_a1295 -->
% 7.19/6.74 (~ bnd_c5_2 bnd_a1295 X113 | bnd_c6_2 bnd_a1295 X113) |
% 7.19/6.74 ~ bnd_c9_2 bnd_a1295 X113) |
% 7.19/6.74 ~ bnd_c7_0) |
% 7.19/6.74 ~ bnd_c3_0)) &
% 7.19/6.74 ((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1298) &
% 7.19/6.74 bnd_c3_2 bnd_a1298 bnd_a1299) &
% 7.19/6.74 bnd_c4_2 bnd_a1298 bnd_a1299) &
% 7.19/6.74 bnd_c5_2 bnd_a1298 bnd_a1299) &
% 7.19/6.74 ~ bnd_c4_1 bnd_a1298) &
% 7.19/6.74 ~ bnd_c5_1 bnd_a1298 |
% 7.19/6.74 (ALL X114.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (~ bnd_c10_1 X114 | ~ bnd_c2_1 X114) |
% 7.19/6.74 ((bnd_ndr1_1 X114 & bnd_c5_2 X114 bnd_a1300) &
% 7.19/6.74 bnd_c1_2 X114 bnd_a1300) &
% 7.19/6.74 ~ bnd_c3_2 X114 bnd_a1300))) &
% 7.19/6.74 ((ALL X115.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (ALL X116.
% 7.19/6.74 bnd_ndr1_1 X115 -->
% 7.19/6.74 (~ bnd_c8_2 X115 X116 | ~ bnd_c1_2 X115 X116) |
% 7.19/6.74 ~ bnd_c9_2 X115 X116) |
% 7.19/6.74 ((bnd_ndr1_1 X115 & bnd_c8_2 X115 bnd_a1301) &
% 7.19/6.74 ~ bnd_c10_2 X115 bnd_a1301) &
% 7.19/6.74 ~ bnd_c6_2 X115 bnd_a1301) |
% 7.19/6.74 (ALL X117.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (bnd_c1_1 X117 | ~ bnd_c4_1 X117) |
% 7.19/6.74 (bnd_ndr1_1 X117 & ~ bnd_c1_2 X117 bnd_a1302) &
% 7.19/6.74 ~ bnd_c9_2 X117 bnd_a1302))) &
% 7.19/6.74 (((((((bnd_ndr1_0 & bnd_c1_1 bnd_a1303) & bnd_ndr1_1 bnd_a1303) &
% 7.19/6.74 ~ bnd_c6_2 bnd_a1303 bnd_a1304) &
% 7.19/6.74 bnd_c10_2 bnd_a1303 bnd_a1304) &
% 7.19/6.74 bnd_c5_2 bnd_a1303 bnd_a1304) &
% 7.19/6.74 (ALL X118.
% 7.19/6.74 bnd_ndr1_1 bnd_a1303 -->
% 7.19/6.74 (bnd_c1_2 bnd_a1303 X118 | bnd_c2_2 bnd_a1303 X118) |
% 7.19/6.74 ~ bnd_c5_2 bnd_a1303 X118) |
% 7.19/6.74 (ALL X119.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (~ bnd_c7_1 X119 | ~ bnd_c8_1 X119) | ~ bnd_c10_1 X119)) |
% 7.19/6.74 bnd_c6_0)) &
% 7.19/6.74 ((bnd_c3_0 |
% 7.19/6.74 (ALL X120.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (bnd_c6_1 X120 | ~ bnd_c9_1 X120) | bnd_c8_1 X120)) |
% 7.19/6.74 ~ bnd_c7_0)) &
% 7.19/6.74 (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1305) &
% 7.19/6.74 bnd_c1_2 bnd_a1305 bnd_a1306) &
% 7.19/6.74 ~ bnd_c10_2 bnd_a1305 bnd_a1306) &
% 7.19/6.74 ~ bnd_c4_2 bnd_a1305 bnd_a1306) &
% 7.19/6.74 ~ bnd_c5_1 bnd_a1305) &
% 7.19/6.74 bnd_c1_1 bnd_a1305 |
% 7.19/6.74 bnd_c7_0) |
% 7.19/6.74 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1307) &
% 7.19/6.74 ~ bnd_c4_2 bnd_a1307 bnd_a1308) &
% 7.19/6.74 bnd_c5_2 bnd_a1307 bnd_a1308) &
% 7.19/6.74 bnd_c7_2 bnd_a1307 bnd_a1308) &
% 7.19/6.74 (ALL X121.
% 7.19/6.74 bnd_ndr1_1 bnd_a1307 -->
% 7.19/6.74 (~ bnd_c6_2 bnd_a1307 X121 | ~ bnd_c4_2 bnd_a1307 X121) |
% 7.19/6.74 ~ bnd_c5_2 bnd_a1307 X121)) &
% 7.19/6.74 (ALL X122.
% 7.19/6.74 bnd_ndr1_1 bnd_a1307 -->
% 7.19/6.74 (bnd_c5_2 bnd_a1307 X122 | ~ bnd_c9_2 bnd_a1307 X122) |
% 7.19/6.74 ~ bnd_c3_2 bnd_a1307 X122))) &
% 7.19/6.74 (bnd_c2_0 | bnd_c10_0)) &
% 7.19/6.74 ((bnd_c7_0 |
% 7.19/6.74 (ALL X123.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (~ bnd_c10_1 X123 |
% 7.19/6.74 (ALL X124.
% 7.19/6.74 bnd_ndr1_1 X123 -->
% 7.19/6.74 (bnd_c7_2 X123 X124 | ~ bnd_c5_2 X123 X124) |
% 7.19/6.74 bnd_c3_2 X123 X124)) |
% 7.19/6.74 bnd_c6_1 X123)) |
% 7.19/6.74 (ALL X125.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 ((bnd_ndr1_1 X125 & ~ bnd_c4_2 X125 bnd_a1309) &
% 7.19/6.74 bnd_c7_2 X125 bnd_a1309 |
% 7.19/6.74 ~ bnd_c2_1 X125) |
% 7.19/6.74 (ALL X126.
% 7.19/6.74 bnd_ndr1_1 X125 -->
% 7.19/6.74 (bnd_c10_2 X125 X126 | bnd_c3_2 X125 X126) |
% 7.19/6.74 ~ bnd_c6_2 X125 X126)))) &
% 7.19/6.74 (~ bnd_c8_0 | bnd_c2_0)) &
% 7.19/6.74 (((ALL X127.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (~ bnd_c3_1 X127 |
% 7.19/6.74 ((bnd_ndr1_1 X127 & bnd_c1_2 X127 bnd_a1310) &
% 7.19/6.74 ~ bnd_c3_2 X127 bnd_a1310) &
% 7.19/6.74 ~ bnd_c2_2 X127 bnd_a1310) |
% 7.19/6.74 bnd_c8_1 X127) |
% 7.19/6.74 bnd_c2_0) |
% 7.19/6.74 ((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a1311) &
% 7.19/6.74 (ALL X128.
% 7.19/6.74 bnd_ndr1_1 bnd_a1311 -->
% 7.19/6.74 bnd_c8_2 bnd_a1311 X128 | bnd_c9_2 bnd_a1311 X128)) &
% 7.19/6.74 ~ bnd_c5_1 bnd_a1311)) &
% 7.19/6.74 ((~ bnd_c8_0 |
% 7.19/6.74 (ALL X129.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (~ bnd_c3_1 X129 | ~ bnd_c8_1 X129) | bnd_c6_1 X129)) |
% 7.19/6.74 bnd_c10_0)) &
% 7.19/6.74 ((bnd_c10_0 |
% 7.19/6.74 (ALL X130.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (~ bnd_c4_1 X130 | ~ bnd_c3_1 X130) |
% 7.19/6.74 (ALL X131.
% 7.19/6.74 bnd_ndr1_1 X130 -->
% 7.19/6.74 (~ bnd_c6_2 X130 X131 | ~ bnd_c8_2 X130 X131) |
% 7.19/6.74 bnd_c1_2 X130 X131))) |
% 7.19/6.74 bnd_c3_0)) &
% 7.19/6.74 ((~ bnd_c2_0 | (ALL X132. bnd_ndr1_0 --> bnd_c1_1 X132 | bnd_c6_1 X132)) |
% 7.19/6.74 ~ bnd_c8_0)) &
% 7.19/6.74 (~ bnd_c6_0 | bnd_c4_0)) &
% 7.19/6.74 ((~ bnd_c8_0 | bnd_c1_0) | ~ bnd_c2_0)) &
% 7.19/6.74 ((ALL X133.
% 7.19/6.74 bnd_ndr1_0 --> (bnd_c6_1 X133 | bnd_c7_1 X133) | bnd_c9_1 X133) |
% 7.19/6.74 bnd_c7_0)) &
% 7.19/6.74 (((ALL X134.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 ((ALL X135.
% 7.19/6.74 bnd_ndr1_1 X134 -->
% 7.19/6.74 (~ bnd_c9_2 X134 X135 | ~ bnd_c8_2 X134 X135) |
% 7.19/6.74 bnd_c6_2 X134 X135) |
% 7.19/6.74 (ALL X136.
% 7.19/6.74 bnd_ndr1_1 X134 -->
% 7.19/6.74 (bnd_c4_2 X134 X136 | ~ bnd_c9_2 X134 X136) |
% 7.19/6.74 ~ bnd_c7_2 X134 X136)) |
% 7.19/6.74 bnd_c4_1 X134) |
% 7.19/6.74 ~ bnd_c6_0) |
% 7.19/6.74 bnd_c2_0)) &
% 7.19/6.74 bnd_c4_0) &
% 7.19/6.74 (((ALL X137.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 ((ALL X138.
% 7.19/6.74 bnd_ndr1_1 X137 -->
% 7.19/6.74 (bnd_c9_2 X137 X138 | ~ bnd_c1_2 X137 X138) |
% 7.19/6.74 ~ bnd_c10_2 X137 X138) |
% 7.19/6.74 ~ bnd_c4_1 X137) |
% 7.19/6.74 ((bnd_ndr1_1 X137 & ~ bnd_c3_2 X137 bnd_a1312) &
% 7.19/6.74 bnd_c6_2 X137 bnd_a1312) &
% 7.19/6.74 ~ bnd_c4_2 X137 bnd_a1312) |
% 7.19/6.74 bnd_c8_0) |
% 7.19/6.74 ~ bnd_c2_0)) &
% 7.19/6.74 ((~ bnd_c10_0 |
% 7.19/6.74 (ALL X139.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (((bnd_ndr1_1 X139 & ~ bnd_c2_2 X139 bnd_a1313) &
% 7.19/6.74 bnd_c1_2 X139 bnd_a1313) &
% 7.19/6.74 ~ bnd_c3_2 X139 bnd_a1313 |
% 7.19/6.74 ~ bnd_c7_1 X139) |
% 7.19/6.74 ((bnd_ndr1_1 X139 & ~ bnd_c5_2 X139 bnd_a1314) & bnd_c4_2 X139 bnd_a1314) &
% 7.19/6.74 bnd_c10_2 X139 bnd_a1314)) |
% 7.19/6.74 bnd_c6_0)) &
% 7.19/6.74 ((((bnd_ndr1_0 & bnd_c10_1 bnd_a1315) &
% 7.19/6.74 (ALL X140.
% 7.19/6.74 bnd_ndr1_1 bnd_a1315 -->
% 7.19/6.74 ~ bnd_c8_2 bnd_a1315 X140 | ~ bnd_c2_2 bnd_a1315 X140)) &
% 7.19/6.74 (ALL X141.
% 7.19/6.74 bnd_ndr1_1 bnd_a1315 -->
% 7.19/6.74 (~ bnd_c5_2 bnd_a1315 X141 | ~ bnd_c6_2 bnd_a1315 X141) |
% 7.19/6.74 ~ bnd_c9_2 bnd_a1315 X141) |
% 7.19/6.74 ~ bnd_c2_0) |
% 7.19/6.74 (bnd_ndr1_0 & ~ bnd_c8_1 bnd_a1316) &
% 7.19/6.74 ~ bnd_c5_1 bnd_a1316)) &
% 7.19/6.74 (((ALL X142.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (~ bnd_c2_1 X142 |
% 7.19/6.74 (bnd_ndr1_1 X142 & ~ bnd_c6_2 X142 bnd_a1317) & ~ bnd_c2_2 X142 bnd_a1317) |
% 7.19/6.74 ~ bnd_c10_1 X142) |
% 7.19/6.74 (ALL X143.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (((bnd_ndr1_1 X143 &
% 7.19/6.74 ~ bnd_c8_2 X143 bnd_a1318) &
% 7.19/6.74 bnd_c7_2 X143 bnd_a1318) &
% 7.19/6.74 bnd_c3_2 X143 bnd_a1318 |
% 7.19/6.74 (ALL X144.
% 7.19/6.74 bnd_ndr1_1 X143 -->
% 7.19/6.74 (bnd_c9_2 X143 X144 | bnd_c3_2 X143 X144) | ~ bnd_c1_2 X143 X144)) |
% 7.19/6.74 ((bnd_ndr1_1 X143 &
% 7.19/6.74 ~ bnd_c6_2 X143 bnd_a1319) &
% 7.19/6.74 bnd_c1_2 X143 bnd_a1319) &
% 7.19/6.74 bnd_c8_2 X143 bnd_a1319)) |
% 7.19/6.74 (ALL X145.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (bnd_c3_1 X145 | ~ bnd_c2_1 X145) |
% 7.19/6.74 bnd_c7_1 X145))) &
% 7.19/6.74 ((~ bnd_c7_0 |
% 7.19/6.74 (((((((bnd_ndr1_0 &
% 7.19/6.74 (ALL X146.
% 7.19/6.74 bnd_ndr1_1 bnd_a1320 -->
% 7.19/6.74 (bnd_c3_2 bnd_a1320 X146 | bnd_c2_2 bnd_a1320 X146) |
% 7.19/6.74 bnd_c5_2 bnd_a1320 X146)) &
% 7.19/6.74 bnd_ndr1_1 bnd_a1320) &
% 7.19/6.74 ~ bnd_c5_2 bnd_a1320 bnd_a1321) &
% 7.19/6.74 ~ bnd_c10_2 bnd_a1320 bnd_a1321) &
% 7.19/6.74 bnd_c6_2 bnd_a1320 bnd_a1321) &
% 7.19/6.74 bnd_ndr1_1 bnd_a1320) &
% 7.19/6.74 ~ bnd_c8_2 bnd_a1320 bnd_a1322) &
% 7.19/6.74 bnd_c1_2 bnd_a1320 bnd_a1322) |
% 7.19/6.74 ~ bnd_c8_0)) &
% 7.19/6.74 (((ALL X147.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (~ bnd_c2_1 X147 | bnd_c7_1 X147) |
% 7.19/6.74 (ALL X148.
% 7.19/6.74 bnd_ndr1_1 X147 -->
% 7.19/6.74 (bnd_c3_2 X147 X148 | bnd_c6_2 X147 X148) | bnd_c8_2 X147 X148)) |
% 7.19/6.74 (((((bnd_ndr1_0 & bnd_c4_1 bnd_a1323) &
% 7.19/6.74 bnd_c6_1 bnd_a1323) &
% 7.19/6.74 bnd_ndr1_1 bnd_a1323) &
% 7.19/6.74 bnd_c9_2 bnd_a1323 bnd_a1324) &
% 7.19/6.74 ~ bnd_c8_2 bnd_a1323 bnd_a1324) &
% 7.19/6.74 ~ bnd_c1_2 bnd_a1323 bnd_a1324) |
% 7.19/6.74 (ALL X149.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (((bnd_ndr1_1 X149 &
% 7.19/6.74 ~ bnd_c1_2 X149 bnd_a1325) &
% 7.19/6.74 ~ bnd_c10_2 X149 bnd_a1325) &
% 7.19/6.74 ~ bnd_c8_2 X149 bnd_a1325 |
% 7.19/6.74 ~ bnd_c2_1 X149) |
% 7.19/6.74 ((bnd_ndr1_1 X149 &
% 7.19/6.74 ~ bnd_c1_2 X149 bnd_a1326) &
% 7.19/6.74 bnd_c2_2 X149 bnd_a1326) &
% 7.19/6.74 ~ bnd_c9_2 X149 bnd_a1326))) &
% 7.19/6.74 ((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1327) &
% 7.19/6.74 bnd_c8_2 bnd_a1327 bnd_a1328) &
% 7.19/6.74 ~ bnd_c3_2 bnd_a1327 bnd_a1328) &
% 7.19/6.74 (ALL X150.
% 7.19/6.74 bnd_ndr1_1 bnd_a1327 -->
% 7.19/6.74 (~ bnd_c10_2 bnd_a1327 X150 |
% 7.19/6.74 ~ bnd_c2_2 bnd_a1327 X150) |
% 7.19/6.74 ~ bnd_c3_2 bnd_a1327 X150)) &
% 7.19/6.74 bnd_c10_1 bnd_a1327 |
% 7.19/6.74 bnd_c3_0) |
% 7.19/6.74 ~ bnd_c2_0)) &
% 7.19/6.74 (((ALL X151.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (bnd_c4_1 X151 |
% 7.19/6.74 ((bnd_ndr1_1 X151 &
% 7.19/6.74 bnd_c8_2 X151 bnd_a1329) &
% 7.19/6.74 bnd_c5_2 X151 bnd_a1329) &
% 7.19/6.74 bnd_c7_2 X151 bnd_a1329) |
% 7.19/6.74 bnd_c1_1 X151) |
% 7.19/6.74 ~ bnd_c7_0) |
% 7.19/6.74 bnd_c2_0)) &
% 7.19/6.74 ((~ bnd_c1_0 |
% 7.19/6.74 (ALL X152.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (~ bnd_c10_1 X152 |
% 7.19/6.74 (ALL X153.
% 7.19/6.74 bnd_ndr1_1 X152 -->
% 7.19/6.74 (bnd_c10_2 X152 X153 |
% 7.19/6.74 bnd_c2_2 X152 X153) |
% 7.19/6.74 bnd_c7_2 X152 X153)) |
% 7.19/6.74 (ALL X154.
% 7.19/6.74 bnd_ndr1_1 X152 -->
% 7.19/6.74 (~ bnd_c5_2 X152 X154 |
% 7.19/6.74 bnd_c3_2 X152 X154) |
% 7.19/6.74 bnd_c1_2 X152 X154))) |
% 7.19/6.74 (ALL X155.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 ((ALL X156.
% 7.19/6.74 bnd_ndr1_1 X155 -->
% 7.19/6.74 (bnd_c2_2 X155 X156 |
% 7.19/6.74 ~ bnd_c8_2 X155 X156) |
% 7.19/6.74 bnd_c5_2 X155 X156) |
% 7.19/6.74 ~ bnd_c2_1 X155) |
% 7.19/6.74 ((bnd_ndr1_1 X155 &
% 7.19/6.74 ~ bnd_c8_2 X155 bnd_a1330) &
% 7.19/6.74 bnd_c9_2 X155 bnd_a1330) &
% 7.19/6.74 ~ bnd_c2_2 X155 bnd_a1330))) &
% 7.19/6.74 (~ bnd_c6_0 |
% 7.19/6.74 (((((bnd_ndr1_0 & bnd_c3_1 bnd_a1331) &
% 7.19/6.74 bnd_ndr1_1 bnd_a1331) &
% 7.19/6.74 bnd_c7_2 bnd_a1331 bnd_a1332) &
% 7.19/6.74 ~ bnd_c9_2 bnd_a1331 bnd_a1332) &
% 7.19/6.74 ~ bnd_c10_2 bnd_a1331 bnd_a1332) &
% 7.19/6.74 (ALL X157.
% 7.19/6.74 bnd_ndr1_1 bnd_a1331 -->
% 7.19/6.74 (bnd_c9_2 bnd_a1331 X157 |
% 7.19/6.74 ~ bnd_c6_2 bnd_a1331 X157) |
% 7.19/6.74 ~ bnd_c5_2 bnd_a1331 X157))) &
% 7.19/6.74 ((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1333) &
% 7.19/6.74 bnd_c6_2 bnd_a1333 bnd_a1334) &
% 7.19/6.74 ~ bnd_c3_2 bnd_a1333 bnd_a1334) &
% 7.19/6.74 ~ bnd_c9_2 bnd_a1333 bnd_a1334) &
% 7.19/6.74 bnd_c3_1 bnd_a1333) &
% 7.19/6.74 (ALL X158.
% 7.19/6.74 bnd_ndr1_1 bnd_a1333 -->
% 7.19/6.74 (~ bnd_c9_2 bnd_a1333 X158 |
% 7.19/6.74 ~ bnd_c10_2 bnd_a1333 X158) |
% 7.19/6.74 ~ bnd_c4_2 bnd_a1333 X158) |
% 7.19/6.74 (((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1335) &
% 7.19/6.74 ~ bnd_c2_2 bnd_a1335 bnd_a1336) &
% 7.19/6.74 bnd_c8_2 bnd_a1335 bnd_a1336) &
% 7.19/6.74 ~ bnd_c3_1 bnd_a1335)) &
% 7.19/6.74 ((ALL X159.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 ((ALL X160.
% 7.19/6.74 bnd_ndr1_1 X159 -->
% 7.19/6.74 (bnd_c7_2 X159 X160 |
% 7.19/6.74 ~ bnd_c6_2 X159 X160) |
% 7.19/6.74 bnd_c1_2 X159 X160) |
% 7.19/6.74 ((bnd_ndr1_1 X159 & bnd_c4_2 X159 bnd_a1337) &
% 7.19/6.74 bnd_c3_2 X159 bnd_a1337) &
% 7.19/6.74 ~ bnd_c8_2 X159 bnd_a1337) |
% 7.19/6.74 (ALL X161.
% 7.19/6.74 bnd_ndr1_1 X159 -->
% 7.19/6.74 bnd_c6_2 X159 X161 | bnd_c5_2 X159 X161)) |
% 7.19/6.74 ~ bnd_c7_0)) &
% 7.19/6.74 (((((((bnd_ndr1_0 & ~ bnd_c8_1 bnd_a1338) &
% 7.19/6.74 (ALL X162.
% 7.19/6.74 bnd_ndr1_1 bnd_a1338 -->
% 7.19/6.74 (bnd_c6_2 bnd_a1338 X162 |
% 7.19/6.74 bnd_c3_2 bnd_a1338 X162) |
% 7.19/6.74 ~ bnd_c9_2 bnd_a1338 X162)) &
% 7.19/6.74 bnd_ndr1_1 bnd_a1338) &
% 7.19/6.74 bnd_c8_2 bnd_a1338 bnd_a1339) &
% 7.19/6.74 bnd_c5_2 bnd_a1338 bnd_a1339) &
% 7.19/6.74 bnd_c4_2 bnd_a1338 bnd_a1339 |
% 7.19/6.74 bnd_c1_0) |
% 7.19/6.74 bnd_c3_0)) &
% 7.19/6.74 ((~ bnd_c2_0 | bnd_c3_0) |
% 7.19/6.74 (ALL X163.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 ((ALL X164.
% 7.19/6.74 bnd_ndr1_1 X163 -->
% 7.19/6.74 (~ bnd_c1_2 X163 X164 |
% 7.19/6.74 ~ bnd_c2_2 X163 X164) |
% 7.19/6.74 ~ bnd_c7_2 X163 X164) |
% 7.19/6.74 ((bnd_ndr1_1 X163 & ~ bnd_c2_2 X163 bnd_a1340) &
% 7.19/6.74 bnd_c6_2 X163 bnd_a1340) &
% 7.19/6.74 ~ bnd_c9_2 X163 bnd_a1340) |
% 7.19/6.74 bnd_c6_1 X163))) &
% 7.19/6.74 (bnd_c8_0 | ~ bnd_c3_0)) &
% 7.19/6.74 (bnd_c3_0 |
% 7.19/6.74 (ALL X165.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (~ bnd_c5_1 X165 | bnd_c4_1 X165) |
% 7.19/6.74 ~ bnd_c1_1 X165))) &
% 7.19/6.74 ((~ bnd_c8_0 | ~ bnd_c7_0) | ~ bnd_c3_0)) &
% 7.19/6.74 ((bnd_c1_0 |
% 7.19/6.74 (ALL X166.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 ((ALL X167.
% 7.19/6.74 bnd_ndr1_1 X166 -->
% 7.19/6.74 (bnd_c9_2 X166 X167 | bnd_c5_2 X166 X167) |
% 7.19/6.74 ~ bnd_c3_2 X166 X167) |
% 7.19/6.74 ~ bnd_c10_1 X166) |
% 7.19/6.74 bnd_c9_1 X166)) |
% 7.19/6.74 ~ bnd_c2_0)) &
% 7.19/6.74 (((((bnd_ndr1_0 & bnd_c2_1 bnd_a1341) &
% 7.19/6.74 bnd_ndr1_1 bnd_a1341) &
% 7.19/6.74 bnd_c7_2 bnd_a1341 bnd_a1342) &
% 7.19/6.74 ~ bnd_c3_2 bnd_a1341 bnd_a1342 |
% 7.19/6.74 ((bnd_ndr1_0 & bnd_c3_1 bnd_a1343) &
% 7.19/6.74 ~ bnd_c1_1 bnd_a1343) &
% 7.19/6.74 (ALL X168.
% 7.19/6.74 bnd_ndr1_1 bnd_a1343 -->
% 7.19/6.74 (bnd_c3_2 bnd_a1343 X168 |
% 7.19/6.74 ~ bnd_c5_2 bnd_a1343 X168) |
% 7.19/6.74 ~ bnd_c2_2 bnd_a1343 X168)) |
% 7.19/6.74 (ALL X169.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (((bnd_ndr1_1 X169 & bnd_c1_2 X169 bnd_a1344) &
% 7.19/6.74 bnd_c9_2 X169 bnd_a1344) &
% 7.19/6.74 bnd_c4_2 X169 bnd_a1344 |
% 7.19/6.74 (bnd_ndr1_1 X169 & bnd_c5_2 X169 bnd_a1345) &
% 7.19/6.74 ~ bnd_c4_2 X169 bnd_a1345) |
% 7.19/6.74 bnd_c3_1 X169))) &
% 7.19/6.74 (~ bnd_c1_0 |
% 7.19/6.74 (((((bnd_ndr1_0 &
% 7.19/6.74 (ALL X170.
% 7.19/6.74 bnd_ndr1_1 bnd_a1346 -->
% 7.19/6.74 (~ bnd_c6_2 bnd_a1346 X170 |
% 7.19/6.74 ~ bnd_c10_2 bnd_a1346 X170) |
% 7.19/6.74 bnd_c8_2 bnd_a1346 X170)) &
% 7.19/6.74 (ALL X171.
% 7.19/6.74 bnd_ndr1_1 bnd_a1346 -->
% 7.19/6.74 (~ bnd_c10_2 bnd_a1346 X171 |
% 7.19/6.74 ~ bnd_c5_2 bnd_a1346 X171) |
% 7.19/6.74 bnd_c9_2 bnd_a1346 X171)) &
% 7.19/6.74 bnd_ndr1_1 bnd_a1346) &
% 7.19/6.74 bnd_c6_2 bnd_a1346 bnd_a1347) &
% 7.19/6.74 ~ bnd_c4_2 bnd_a1346 bnd_a1347) &
% 7.19/6.74 ~ bnd_c2_2 bnd_a1346 bnd_a1347)) &
% 7.19/6.74 (((ALL X172.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 ((ALL X173.
% 7.19/6.74 bnd_ndr1_1 X172 -->
% 7.19/6.74 (~ bnd_c1_2 X172 X173 | bnd_c4_2 X172 X173) |
% 7.19/6.74 bnd_c3_2 X172 X173) |
% 7.19/6.74 bnd_c5_1 X172) |
% 7.19/6.74 ((bnd_ndr1_1 X172 & bnd_c4_2 X172 bnd_a1348) &
% 7.19/6.74 bnd_c5_2 X172 bnd_a1348) &
% 7.19/6.74 ~ bnd_c8_2 X172 bnd_a1348) |
% 7.19/6.74 ((bnd_ndr1_0 &
% 7.19/6.74 (ALL X174.
% 7.19/6.74 bnd_ndr1_1 bnd_a1349 -->
% 7.19/6.74 (~ bnd_c7_2 bnd_a1349 X174 |
% 7.19/6.74 ~ bnd_c3_2 bnd_a1349 X174) |
% 7.19/6.74 ~ bnd_c5_2 bnd_a1349 X174)) &
% 7.19/6.74 bnd_c6_1 bnd_a1349) &
% 7.19/6.74 bnd_c3_1 bnd_a1349) |
% 7.19/6.74 (bnd_ndr1_0 & ~ bnd_c10_1 bnd_a1350) &
% 7.19/6.74 (ALL X175.
% 7.19/6.74 bnd_ndr1_1 bnd_a1350 -->
% 7.19/6.74 (bnd_c1_2 bnd_a1350 X175 | bnd_c7_2 bnd_a1350 X175) |
% 7.19/6.74 bnd_c6_2 bnd_a1350 X175))) &
% 7.19/6.74 (ALL X176.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (((bnd_ndr1_1 X176 & bnd_c10_2 X176 bnd_a1351) &
% 7.19/6.74 bnd_c8_2 X176 bnd_a1351) &
% 7.19/6.74 bnd_c3_2 X176 bnd_a1351 |
% 7.19/6.74 bnd_c2_1 X176) |
% 7.19/6.74 ((bnd_ndr1_1 X176 & ~ bnd_c8_2 X176 bnd_a1352) &
% 7.19/6.74 bnd_c10_2 X176 bnd_a1352) &
% 7.19/6.74 ~ bnd_c2_2 X176 bnd_a1352)) &
% 7.19/6.74 (((bnd_ndr1_0 &
% 7.19/6.74 (ALL X177.
% 7.19/6.74 bnd_ndr1_1 bnd_a1353 -->
% 7.19/6.74 (bnd_c5_2 bnd_a1353 X177 | bnd_c3_2 bnd_a1353 X177) |
% 7.19/6.74 bnd_c2_2 bnd_a1353 X177)) &
% 7.19/6.74 ~ bnd_c5_1 bnd_a1353) &
% 7.19/6.74 ~ bnd_c3_1 bnd_a1353 |
% 7.19/6.74 (bnd_ndr1_0 & bnd_c4_1 bnd_a1354) & ~ bnd_c7_1 bnd_a1354)) &
% 7.19/6.74 ((bnd_c8_0 |
% 7.19/6.74 (ALL X178.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (bnd_c8_1 X178 |
% 7.19/6.74 ((bnd_ndr1_1 X178 & bnd_c9_2 X178 bnd_a1355) &
% 7.19/6.74 bnd_c6_2 X178 bnd_a1355) &
% 7.19/6.74 ~ bnd_c4_2 X178 bnd_a1355) |
% 7.19/6.74 ((bnd_ndr1_1 X178 & ~ bnd_c5_2 X178 bnd_a1356) &
% 7.19/6.74 ~ bnd_c4_2 X178 bnd_a1356) &
% 7.19/6.74 bnd_c1_2 X178 bnd_a1356)) |
% 7.19/6.74 (((((bnd_ndr1_0 &
% 7.19/6.74 (ALL X179.
% 7.19/6.74 bnd_ndr1_1 bnd_a1357 -->
% 7.19/6.74 (~ bnd_c10_2 bnd_a1357 X179 |
% 7.19/6.74 bnd_c1_2 bnd_a1357 X179) |
% 7.19/6.74 ~ bnd_c9_2 bnd_a1357 X179)) &
% 7.19/6.74 bnd_ndr1_1 bnd_a1357) &
% 7.19/6.74 bnd_c6_2 bnd_a1357 bnd_a1358) &
% 7.19/6.74 bnd_c9_2 bnd_a1357 bnd_a1358) &
% 7.19/6.74 bnd_c1_2 bnd_a1357 bnd_a1358) &
% 7.19/6.74 ~ bnd_c6_1 bnd_a1357)) &
% 7.19/6.74 (((ALL X180.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (((bnd_ndr1_1 X180 & ~ bnd_c4_2 X180 bnd_a1359) &
% 7.19/6.74 bnd_c1_2 X180 bnd_a1359) &
% 7.19/6.74 bnd_c7_2 X180 bnd_a1359 |
% 7.19/6.74 ((bnd_ndr1_1 X180 & bnd_c6_2 X180 bnd_a1360) &
% 7.19/6.74 bnd_c9_2 X180 bnd_a1360) &
% 7.19/6.74 ~ bnd_c10_2 X180 bnd_a1360) |
% 7.19/6.74 bnd_c8_1 X180) |
% 7.19/6.74 ((bnd_ndr1_0 &
% 7.19/6.74 (ALL X181.
% 7.19/6.74 bnd_ndr1_1 bnd_a1361 -->
% 7.19/6.74 (~ bnd_c5_2 bnd_a1361 X181 | bnd_c9_2 bnd_a1361 X181) |
% 7.19/6.74 ~ bnd_c7_2 bnd_a1361 X181)) &
% 7.19/6.74 bnd_c8_1 bnd_a1361) &
% 7.19/6.74 ~ bnd_c2_1 bnd_a1361) |
% 7.19/6.74 ~ bnd_c10_0)) &
% 7.19/6.74 (((ALL X182.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (~ bnd_c8_1 X182 |
% 7.19/6.74 ((bnd_ndr1_1 X182 & bnd_c4_2 X182 bnd_a1362) &
% 7.19/6.74 ~ bnd_c3_2 X182 bnd_a1362) &
% 7.19/6.74 bnd_c10_2 X182 bnd_a1362) |
% 7.19/6.74 (ALL X183.
% 7.19/6.74 bnd_ndr1_1 X182 -->
% 7.19/6.74 (bnd_c9_2 X182 X183 | bnd_c5_2 X182 X183) |
% 7.19/6.74 ~ bnd_c4_2 X182 X183)) |
% 7.19/6.74 bnd_c10_0) |
% 7.19/6.74 ~ bnd_c8_0)) &
% 7.19/6.74 ((bnd_c2_0 | bnd_c10_0) | ~ bnd_c6_0)) &
% 7.19/6.74 (~ bnd_c7_0 |
% 7.19/6.74 (ALL X184.
% 7.19/6.74 bnd_ndr1_0 -->
% 7.19/6.74 (~ bnd_c8_1 X184 | bnd_c4_1 X184) |
% 7.19/6.74 (ALL X185.
% 7.19/6.74 bnd_ndr1_1 X184 -->
% 7.19/6.74 (~ bnd_c3_2 X184 X185 | bnd_c6_2 X184 X185) |
% 7.19/6.74 bnd_c5_2 X184 X185)))) &
% 7.19/6.74 ~ bnd_c7_0) &
% 7.19/6.74 (~ bnd_c6_0 | bnd_c1_0)) &
% 7.19/6.74 (bnd_c1_0 | bnd_c2_0)) &
% 7.19/6.74 ((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1363) &
% 7.19/6.74 ~ bnd_c7_2 bnd_a1363 bnd_a1364) &
% 7.19/6.74 ~ bnd_c1_2 bnd_a1363 bnd_a1364) &
% 7.19/6.74 bnd_c2_2 bnd_a1363 bnd_a1364) &
% 7.19/6.74 ~ bnd_c6_1 bnd_a1363) &
% 7.19/6.74 (ALL X186.
% 7.19/6.74 bnd_ndr1_1 bnd_a1363 -->
% 7.19/6.74 (~ bnd_c10_2 bnd_a1363 X186 | bnd_c1_2 bnd_a1363 X186) |
% 7.19/6.74 bnd_c3_2 bnd_a1363 X186) |
% 7.19/6.74 bnd_c10_0))
% 17.81/17.35 Unfolded term: ~ ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((~ bnd_c7_0 |
% 17.81/17.35 (ALL U.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (~ bnd_c5_1 U | ~ bnd_c7_1 U) |
% 17.81/17.35 (ALL V.
% 17.81/17.35 bnd_ndr1_1 U -->
% 17.81/17.35 (bnd_c4_2 U V | bnd_c2_2 U V) | bnd_c8_2 U V))) |
% 17.81/17.35 bnd_c2_0) &
% 17.81/17.35 ((((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a1190) & ~ bnd_c4_1 bnd_a1190) &
% 17.81/17.35 (ALL W.
% 17.81/17.35 bnd_ndr1_1 bnd_a1190 -->
% 17.81/17.35 (bnd_c6_2 bnd_a1190 W | bnd_c5_2 bnd_a1190 W) |
% 17.81/17.35 bnd_c4_2 bnd_a1190 W) |
% 17.81/17.35 (((((bnd_ndr1_0 &
% 17.81/17.35 (ALL X.
% 17.81/17.35 bnd_ndr1_1 bnd_a1191 -->
% 17.81/17.35 (bnd_c3_2 bnd_a1191 X | ~ bnd_c8_2 bnd_a1191 X) |
% 17.81/17.35 ~ bnd_c1_2 bnd_a1191 X)) &
% 17.81/17.35 ~ bnd_c2_1 bnd_a1191) &
% 17.81/17.35 bnd_ndr1_1 bnd_a1191) &
% 17.81/17.35 bnd_c7_2 bnd_a1191 bnd_a1192) &
% 17.81/17.35 ~ bnd_c10_2 bnd_a1191 bnd_a1192) &
% 17.81/17.35 ~ bnd_c6_2 bnd_a1191 bnd_a1192) |
% 17.81/17.35 ~ bnd_c7_0)) &
% 17.81/17.35 (((((((bnd_ndr1_0 &
% 17.81/17.35 (ALL Y.
% 17.81/17.35 bnd_ndr1_1 bnd_a1193 -->
% 17.81/17.35 (~ bnd_c8_2 bnd_a1193 Y | bnd_c7_2 bnd_a1193 Y) |
% 17.81/17.35 bnd_c2_2 bnd_a1193 Y)) &
% 17.81/17.35 bnd_ndr1_1 bnd_a1193) &
% 17.81/17.35 bnd_c4_2 bnd_a1193 bnd_a1194) &
% 17.81/17.35 bnd_c5_2 bnd_a1193 bnd_a1194) &
% 17.81/17.35 bnd_c9_2 bnd_a1193 bnd_a1194) &
% 17.81/17.35 (ALL Z.
% 17.81/17.35 bnd_ndr1_1 bnd_a1193 -->
% 17.81/17.35 (~ bnd_c10_2 bnd_a1193 Z | ~ bnd_c9_2 bnd_a1193 Z) |
% 17.81/17.35 ~ bnd_c8_2 bnd_a1193 Z) |
% 17.81/17.35 (ALL X1.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (((bnd_ndr1_1 X1 & bnd_c10_2 X1 bnd_a1195) &
% 17.81/17.35 ~ bnd_c3_2 X1 bnd_a1195) &
% 17.81/17.35 ~ bnd_c4_2 X1 bnd_a1195 |
% 17.81/17.35 bnd_c8_1 X1) |
% 17.81/17.35 ~ bnd_c9_1 X1)) |
% 17.81/17.35 (ALL X2.
% 17.81/17.35 bnd_ndr1_0 --> (bnd_c6_1 X2 | bnd_c10_1 X2) | ~ bnd_c1_1 X2))) &
% 17.81/17.35 (bnd_c1_0 | ~ bnd_c5_0)) &
% 17.81/17.35 (((ALL X3.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (((bnd_ndr1_1 X3 & bnd_c8_2 X3 bnd_a1196) &
% 17.81/17.35 bnd_c4_2 X3 bnd_a1196) &
% 17.81/17.35 ~ bnd_c6_2 X3 bnd_a1196 |
% 17.81/17.35 (ALL X4.
% 17.81/17.35 bnd_ndr1_1 X3 -->
% 17.81/17.35 (bnd_c5_2 X3 X4 | ~ bnd_c9_2 X3 X4) | bnd_c7_2 X3 X4)) |
% 17.81/17.35 ((bnd_ndr1_1 X3 & bnd_c6_2 X3 bnd_a1197) &
% 17.81/17.35 ~ bnd_c10_2 X3 bnd_a1197) &
% 17.81/17.35 ~ bnd_c4_2 X3 bnd_a1197) |
% 17.81/17.35 bnd_c4_0) |
% 17.81/17.35 bnd_c3_0)) &
% 17.81/17.35 ((((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a1198) &
% 17.81/17.35 (ALL X5.
% 17.81/17.35 bnd_ndr1_1 bnd_a1198 -->
% 17.81/17.35 bnd_c9_2 bnd_a1198 X5 | ~ bnd_c1_2 bnd_a1198 X5)) &
% 17.81/17.35 ~ bnd_c8_1 bnd_a1198 |
% 17.81/17.35 (ALL X6.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 ((ALL X7.
% 17.81/17.35 bnd_ndr1_1 X6 -->
% 17.81/17.35 (bnd_c2_2 X6 X7 | ~ bnd_c9_2 X6 X7) | bnd_c7_2 X6 X7) |
% 17.81/17.35 bnd_c8_1 X6) |
% 17.81/17.35 bnd_c5_1 X6)) |
% 17.81/17.35 bnd_c4_0)) &
% 17.81/17.35 ((~ bnd_c10_0 |
% 17.81/17.35 (ALL X8.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 ((ALL X9.
% 17.81/17.35 bnd_ndr1_1 X8 -->
% 17.81/17.35 (~ bnd_c1_2 X8 X9 | bnd_c9_2 X8 X9) | bnd_c4_2 X8 X9) |
% 17.81/17.35 ~ bnd_c8_1 X8) |
% 17.81/17.35 bnd_c3_1 X8)) |
% 17.81/17.35 bnd_c7_0)) &
% 17.81/17.35 ((bnd_c2_0 | ~ bnd_c4_0) | ~ bnd_c6_0)) &
% 17.81/17.35 ((~ bnd_c6_0 |
% 17.81/17.35 (ALL X10.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (~ bnd_c9_1 X10 | ~ bnd_c1_1 X10) |
% 17.81/17.35 ((bnd_ndr1_1 X10 & bnd_c6_2 X10 bnd_a1199) & bnd_c8_2 X10 bnd_a1199) &
% 17.81/17.35 bnd_c4_2 X10 bnd_a1199)) |
% 17.81/17.35 bnd_c8_0)) &
% 17.81/17.35 ((~ bnd_c2_0 |
% 17.81/17.35 (bnd_ndr1_0 & ~ bnd_c6_1 bnd_a1200) &
% 17.81/17.35 (ALL X11.
% 17.81/17.35 bnd_ndr1_1 bnd_a1200 -->
% 17.81/17.35 bnd_c2_2 bnd_a1200 X11 | bnd_c4_2 bnd_a1200 X11)) |
% 17.81/17.35 bnd_c8_0)) &
% 17.81/17.35 ((~ bnd_c6_0 |
% 17.81/17.35 ((((((((bnd_ndr1_0 &
% 17.81/17.35 bnd_ndr1_1 bnd_a1201) &
% 17.81/17.35 bnd_c4_2 bnd_a1201 bnd_a1202) &
% 17.81/17.35 ~ bnd_c6_2 bnd_a1201 bnd_a1202) &
% 17.81/17.35 bnd_c2_2 bnd_a1201 bnd_a1202) &
% 17.81/17.35 bnd_ndr1_1 bnd_a1201) &
% 17.81/17.35 bnd_c7_2 bnd_a1201 bnd_a1203) &
% 17.81/17.35 bnd_c9_2 bnd_a1201 bnd_a1203) &
% 17.81/17.35 bnd_c5_2 bnd_a1201 bnd_a1203) &
% 17.81/17.35 ~ bnd_c4_1 bnd_a1201) |
% 17.81/17.35 (ALL X12.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (bnd_c9_1 X12 | bnd_c1_1 X12) |
% 17.81/17.35 (ALL X13.
% 17.81/17.35 bnd_ndr1_1 X12 -->
% 17.81/17.35 (bnd_c6_2 X12 X13 | ~ bnd_c2_2 X12 X13) | bnd_c4_2 X12 X13)))) &
% 17.81/17.35 (((ALL X14.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (bnd_c3_1 X14 |
% 17.81/17.35 ((bnd_ndr1_1 X14 & ~ bnd_c10_2 X14 bnd_a1204) & bnd_c1_2 X14 bnd_a1204) &
% 17.81/17.35 ~ bnd_c8_2 X14 bnd_a1204) |
% 17.81/17.35 ~ bnd_c1_1 X14) |
% 17.81/17.35 (ALL X15.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (bnd_c4_1 X15 |
% 17.81/17.35 ((bnd_ndr1_1 X15 & ~ bnd_c3_2 X15 bnd_a1205) &
% 17.81/17.35 ~ bnd_c2_2 X15 bnd_a1205) &
% 17.81/17.35 bnd_c5_2 X15 bnd_a1205) |
% 17.81/17.35 bnd_c5_1 X15)) |
% 17.81/17.35 ~ bnd_c5_0)) &
% 17.81/17.35 ((bnd_c9_0 | ~ bnd_c3_0) | ~ bnd_c6_0)) &
% 17.81/17.35 ((bnd_c9_0 | bnd_c8_0) |
% 17.81/17.35 ((bnd_ndr1_0 & bnd_c2_1 bnd_a1206) &
% 17.81/17.35 (ALL X16.
% 17.81/17.35 bnd_ndr1_1 bnd_a1206 -->
% 17.81/17.35 (~ bnd_c4_2 bnd_a1206 X16 | ~ bnd_c9_2 bnd_a1206 X16) |
% 17.81/17.35 ~ bnd_c8_2 bnd_a1206 X16)) &
% 17.81/17.35 bnd_c1_1 bnd_a1206)) &
% 17.81/17.35 ((((bnd_ndr1_0 & ~ bnd_c8_1 bnd_a1207) &
% 17.81/17.35 (ALL X17.
% 17.81/17.35 bnd_ndr1_1 bnd_a1207 -->
% 17.81/17.35 (~ bnd_c6_2 bnd_a1207 X17 | bnd_c8_2 bnd_a1207 X17) |
% 17.81/17.35 ~ bnd_c4_2 bnd_a1207 X17)) &
% 17.81/17.35 bnd_c9_1 bnd_a1207 |
% 17.81/17.35 ~ bnd_c2_0) |
% 17.81/17.35 ((bnd_ndr1_0 &
% 17.81/17.35 (ALL X18.
% 17.81/17.35 bnd_ndr1_1 bnd_a1208 -->
% 17.81/17.35 ~ bnd_c10_2 bnd_a1208 X18 | ~ bnd_c4_2 bnd_a1208 X18)) &
% 17.81/17.35 bnd_c10_1 bnd_a1208) &
% 17.81/17.35 bnd_c9_1 bnd_a1208)) &
% 17.81/17.35 ((ALL X19.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (bnd_c7_1 X19 |
% 17.81/17.35 (ALL X20.
% 17.81/17.35 bnd_ndr1_1 X19 -->
% 17.81/17.35 (bnd_c6_2 X19 X20 | bnd_c10_2 X19 X20) | ~ bnd_c9_2 X19 X20)) |
% 17.81/17.35 (ALL X21.
% 17.81/17.35 bnd_ndr1_1 X19 -->
% 17.81/17.35 (bnd_c3_2 X19 X21 | ~ bnd_c7_2 X19 X21) | ~ bnd_c10_2 X19 X21)) |
% 17.81/17.35 ~ bnd_c2_0)) &
% 17.81/17.35 (~ bnd_c10_0 | bnd_c9_0)) &
% 17.81/17.35 ((bnd_c9_0 |
% 17.81/17.35 (ALL X22.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (((bnd_ndr1_1 X22 &
% 17.81/17.35 ~ bnd_c10_2 X22 bnd_a1209) &
% 17.81/17.35 ~ bnd_c8_2 X22 bnd_a1209) &
% 17.81/17.35 bnd_c9_2 X22 bnd_a1209 |
% 17.81/17.35 (ALL X23.
% 17.81/17.35 bnd_ndr1_1 X22 -->
% 17.81/17.35 (bnd_c7_2 X22 X23 | ~ bnd_c1_2 X22 X23) | bnd_c9_2 X22 X23)) |
% 17.81/17.35 bnd_c5_1 X22)) |
% 17.81/17.35 ~ bnd_c6_0)) &
% 17.81/17.35 ((~ bnd_c4_0 |
% 17.81/17.35 ((bnd_ndr1_0 & bnd_c10_1 bnd_a1210) &
% 17.81/17.35 ~ bnd_c9_1 bnd_a1210) &
% 17.81/17.35 (ALL X24.
% 17.81/17.35 bnd_ndr1_1 bnd_a1210 -->
% 17.81/17.35 (bnd_c2_2 bnd_a1210 X24 |
% 17.81/17.35 bnd_c5_2 bnd_a1210 X24) |
% 17.81/17.35 ~ bnd_c1_2 bnd_a1210 X24)) |
% 17.81/17.35 bnd_c2_0)) &
% 17.81/17.35 ((bnd_c8_0 |
% 17.81/17.35 (((((bnd_ndr1_0 &
% 17.81/17.35 (ALL X25.
% 17.81/17.35 bnd_ndr1_1 bnd_a1211 -->
% 17.81/17.35 (bnd_c1_2 bnd_a1211 X25 |
% 17.81/17.35 bnd_c2_2 bnd_a1211 X25) |
% 17.81/17.35 ~ bnd_c7_2 bnd_a1211 X25)) &
% 17.81/17.35 ~ bnd_c10_1 bnd_a1211) &
% 17.81/17.35 bnd_ndr1_1 bnd_a1211) &
% 17.81/17.35 bnd_c10_2 bnd_a1211 bnd_a1212) &
% 17.81/17.35 ~ bnd_c8_2 bnd_a1211 bnd_a1212) &
% 17.81/17.35 ~ bnd_c2_2 bnd_a1211 bnd_a1212) |
% 17.81/17.35 bnd_c3_0)) &
% 17.81/17.35 ((((bnd_ndr1_0 & bnd_c7_1 bnd_a1213) &
% 17.81/17.35 (ALL X26.
% 17.81/17.35 bnd_ndr1_1 bnd_a1213 -->
% 17.81/17.35 (~ bnd_c2_2 bnd_a1213 X26 |
% 17.81/17.35 bnd_c1_2 bnd_a1213 X26) |
% 17.81/17.35 bnd_c4_2 bnd_a1213 X26)) &
% 17.81/17.35 bnd_c2_1 bnd_a1213 |
% 17.81/17.35 bnd_c4_0) |
% 17.81/17.35 bnd_c6_0)) &
% 17.81/17.35 ((bnd_c3_0 | ~ bnd_c9_0) |
% 17.81/17.35 ((bnd_ndr1_0 & bnd_c1_1 bnd_a1214) &
% 17.81/17.35 (ALL X27.
% 17.81/17.35 bnd_ndr1_1 bnd_a1214 -->
% 17.81/17.35 bnd_c7_2 bnd_a1214 X27 |
% 17.81/17.35 ~ bnd_c5_2 bnd_a1214 X27)) &
% 17.81/17.35 bnd_c3_1 bnd_a1214)) &
% 17.81/17.35 (((ALL X28.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (~ bnd_c2_1 X28 | bnd_c4_1 X28) |
% 17.81/17.35 bnd_c5_1 X28) |
% 17.81/17.35 bnd_c7_0) |
% 17.81/17.35 (((((bnd_ndr1_0 &
% 17.81/17.35 (ALL X29.
% 17.81/17.35 bnd_ndr1_1 bnd_a1215 -->
% 17.81/17.35 (bnd_c5_2 bnd_a1215 X29 |
% 17.81/17.35 ~ bnd_c6_2 bnd_a1215 X29) |
% 17.81/17.35 bnd_c1_2 bnd_a1215 X29)) &
% 17.81/17.35 bnd_ndr1_1 bnd_a1215) &
% 17.81/17.35 ~ bnd_c6_2 bnd_a1215 bnd_a1216) &
% 17.81/17.35 ~ bnd_c3_2 bnd_a1215 bnd_a1216) &
% 17.81/17.35 bnd_c2_2 bnd_a1215 bnd_a1216) &
% 17.81/17.35 bnd_c6_1 bnd_a1215)) &
% 17.81/17.35 ((bnd_c2_0 |
% 17.81/17.35 (ALL X30.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (bnd_c4_1 X30 |
% 17.81/17.35 (ALL X31.
% 17.81/17.35 bnd_ndr1_1 X30 -->
% 17.81/17.35 (bnd_c9_2 X30 X31 | ~ bnd_c1_2 X30 X31) |
% 17.81/17.35 bnd_c4_2 X30 X31)) |
% 17.81/17.35 (ALL X32.
% 17.81/17.35 bnd_ndr1_1 X30 -->
% 17.81/17.35 (~ bnd_c7_2 X30 X32 | bnd_c2_2 X30 X32) |
% 17.81/17.35 ~ bnd_c4_2 X30 X32))) |
% 17.81/17.35 (ALL X33.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 ((ALL X34.
% 17.81/17.35 bnd_ndr1_1 X33 -->
% 17.81/17.35 (bnd_c5_2 X33 X34 | ~ bnd_c4_2 X33 X34) |
% 17.81/17.35 ~ bnd_c10_2 X33 X34) |
% 17.81/17.35 ~ bnd_c6_1 X33) |
% 17.81/17.35 ~ bnd_c10_1 X33))) &
% 17.81/17.35 ((bnd_c4_0 |
% 17.81/17.35 (ALL X35.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (bnd_c1_1 X35 |
% 17.81/17.35 ((bnd_ndr1_1 X35 & ~ bnd_c7_2 X35 bnd_a1217) &
% 17.81/17.35 bnd_c3_2 X35 bnd_a1217) &
% 17.81/17.35 bnd_c2_2 X35 bnd_a1217) |
% 17.81/17.35 (ALL X36.
% 17.81/17.35 bnd_ndr1_1 X35 -->
% 17.81/17.35 ~ bnd_c6_2 X35 X36 | bnd_c4_2 X35 X36))) |
% 17.81/17.35 bnd_c9_0)) &
% 17.81/17.35 ((~ bnd_c2_0 |
% 17.81/17.35 (((((bnd_ndr1_0 &
% 17.81/17.35 (ALL X37.
% 17.81/17.35 bnd_ndr1_1 bnd_a1218 -->
% 17.81/17.35 (~ bnd_c6_2 bnd_a1218 X37 |
% 17.81/17.35 bnd_c10_2 bnd_a1218 X37) |
% 17.81/17.35 ~ bnd_c9_2 bnd_a1218 X37)) &
% 17.81/17.35 bnd_ndr1_1 bnd_a1218) &
% 17.81/17.35 ~ bnd_c6_2 bnd_a1218 bnd_a1219) &
% 17.81/17.35 ~ bnd_c10_2 bnd_a1218 bnd_a1219) &
% 17.81/17.35 ~ bnd_c4_2 bnd_a1218 bnd_a1219) &
% 17.81/17.35 bnd_c2_1 bnd_a1218) |
% 17.81/17.35 ((bnd_ndr1_0 & bnd_c2_1 bnd_a1220) &
% 17.81/17.35 ~ bnd_c6_1 bnd_a1220) &
% 17.81/17.35 bnd_c10_1 bnd_a1220)) &
% 17.81/17.35 (((ALL X38.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (((bnd_ndr1_1 X38 & bnd_c10_2 X38 bnd_a1221) &
% 17.81/17.35 bnd_c4_2 X38 bnd_a1221) &
% 17.81/17.35 ~ bnd_c8_2 X38 bnd_a1221 |
% 17.81/17.35 ((bnd_ndr1_1 X38 & bnd_c2_2 X38 bnd_a1222) &
% 17.81/17.35 bnd_c5_2 X38 bnd_a1222) &
% 17.81/17.35 ~ bnd_c4_2 X38 bnd_a1222) |
% 17.81/17.35 bnd_c6_1 X38) |
% 17.81/17.35 ((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a1223) &
% 17.81/17.35 (ALL X39.
% 17.81/17.35 bnd_ndr1_1 bnd_a1223 -->
% 17.81/17.35 (~ bnd_c3_2 bnd_a1223 X39 |
% 17.81/17.35 bnd_c8_2 bnd_a1223 X39) |
% 17.81/17.35 ~ bnd_c7_2 bnd_a1223 X39)) &
% 17.81/17.35 bnd_c2_1 bnd_a1223) |
% 17.81/17.35 bnd_c6_0)) &
% 17.81/17.35 (((ALL X40.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (((bnd_ndr1_1 X40 & ~ bnd_c1_2 X40 bnd_a1224) &
% 17.81/17.35 bnd_c10_2 X40 bnd_a1224) &
% 17.81/17.35 ~ bnd_c8_2 X40 bnd_a1224 |
% 17.81/17.35 bnd_c7_1 X40) |
% 17.81/17.35 ~ bnd_c1_1 X40) |
% 17.81/17.35 bnd_c5_0) |
% 17.81/17.35 ~ bnd_c10_0)) &
% 17.81/17.35 (~ bnd_c8_0 | bnd_c3_0)) &
% 17.81/17.35 ((bnd_c9_0 |
% 17.81/17.35 ((bnd_ndr1_0 &
% 17.81/17.35 (ALL X41.
% 17.81/17.35 bnd_ndr1_1 bnd_a1225 -->
% 17.81/17.35 (bnd_c4_2 bnd_a1225 X41 | bnd_c1_2 bnd_a1225 X41) |
% 17.81/17.35 bnd_c7_2 bnd_a1225 X41)) &
% 17.81/17.35 (ALL X42.
% 17.81/17.35 bnd_ndr1_1 bnd_a1225 -->
% 17.81/17.35 (bnd_c8_2 bnd_a1225 X42 | bnd_c3_2 bnd_a1225 X42) |
% 17.81/17.35 ~ bnd_c4_2 bnd_a1225 X42)) &
% 17.81/17.35 (ALL X43.
% 17.81/17.35 bnd_ndr1_1 bnd_a1225 -->
% 17.81/17.35 (bnd_c7_2 bnd_a1225 X43 | ~ bnd_c5_2 bnd_a1225 X43) |
% 17.81/17.35 bnd_c8_2 bnd_a1225 X43)) |
% 17.81/17.35 ~ bnd_c6_0)) &
% 17.81/17.35 ((bnd_c5_0 |
% 17.81/17.35 (((((bnd_ndr1_0 & ~ bnd_c9_1 bnd_a1226) &
% 17.81/17.35 bnd_c7_1 bnd_a1226) &
% 17.81/17.35 bnd_ndr1_1 bnd_a1226) &
% 17.81/17.35 ~ bnd_c8_2 bnd_a1226 bnd_a1227) &
% 17.81/17.35 ~ bnd_c5_2 bnd_a1226 bnd_a1227) &
% 17.81/17.35 ~ bnd_c6_2 bnd_a1226 bnd_a1227) |
% 17.81/17.35 ~ bnd_c9_0)) &
% 17.81/17.35 ((bnd_c9_0 | bnd_c10_0) |
% 17.81/17.35 (ALL X44.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (~ bnd_c9_1 X44 | ~ bnd_c10_1 X44) | bnd_c5_1 X44))) &
% 17.81/17.35 (((bnd_ndr1_0 & bnd_c1_1 bnd_a1228) &
% 17.81/17.35 (ALL X45.
% 17.81/17.35 bnd_ndr1_1 bnd_a1228 -->
% 17.81/17.35 (~ bnd_c10_2 bnd_a1228 X45 | ~ bnd_c2_2 bnd_a1228 X45) |
% 17.81/17.35 bnd_c5_2 bnd_a1228 X45)) &
% 17.81/17.35 ~ bnd_c7_1 bnd_a1228 |
% 17.81/17.35 bnd_c4_0)) &
% 17.81/17.35 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1229) &
% 17.81/17.35 bnd_c4_2 bnd_a1229 bnd_a1230) &
% 17.81/17.35 bnd_c7_2 bnd_a1229 bnd_a1230) &
% 17.81/17.35 bnd_c10_2 bnd_a1229 bnd_a1230) &
% 17.81/17.35 (ALL X46.
% 17.81/17.35 bnd_ndr1_1 bnd_a1229 -->
% 17.81/17.35 (~ bnd_c4_2 bnd_a1229 X46 | bnd_c1_2 bnd_a1229 X46) |
% 17.81/17.35 bnd_c6_2 bnd_a1229 X46) |
% 17.81/17.35 (ALL X47.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (((bnd_ndr1_1 X47 & bnd_c9_2 X47 bnd_a1231) &
% 17.81/17.35 bnd_c6_2 X47 bnd_a1231) &
% 17.81/17.35 ~ bnd_c7_2 X47 bnd_a1231 |
% 17.81/17.35 ~ bnd_c5_1 X47) |
% 17.81/17.35 (ALL X48.
% 17.81/17.35 bnd_ndr1_1 X47 -->
% 17.81/17.35 (~ bnd_c3_2 X47 X48 | ~ bnd_c5_2 X47 X48) |
% 17.81/17.35 bnd_c9_2 X47 X48)))) &
% 17.81/17.35 ((~ bnd_c7_0 |
% 17.81/17.35 (ALL X49.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 bnd_c9_1 X49 |
% 17.81/17.35 (ALL X50.
% 17.81/17.35 bnd_ndr1_1 X49 -->
% 17.81/17.35 (bnd_c10_2 X49 X50 | ~ bnd_c8_2 X49 X50) |
% 17.81/17.35 bnd_c4_2 X49 X50))) |
% 17.81/17.35 (ALL X51.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (bnd_c3_1 X51 |
% 17.81/17.35 ((bnd_ndr1_1 X51 & bnd_c1_2 X51 bnd_a1232) &
% 17.81/17.35 ~ bnd_c10_2 X51 bnd_a1232) &
% 17.81/17.35 bnd_c8_2 X51 bnd_a1232) |
% 17.81/17.35 bnd_c7_1 X51))) &
% 17.81/17.35 (((ALL X52.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (((bnd_ndr1_1 X52 & ~ bnd_c3_2 X52 bnd_a1233) &
% 17.81/17.35 bnd_c9_2 X52 bnd_a1233) &
% 17.81/17.35 bnd_c10_2 X52 bnd_a1233 |
% 17.81/17.35 ~ bnd_c5_1 X52) |
% 17.81/17.35 ((bnd_ndr1_1 X52 & bnd_c7_2 X52 bnd_a1234) &
% 17.81/17.35 bnd_c4_2 X52 bnd_a1234) &
% 17.81/17.35 ~ bnd_c10_2 X52 bnd_a1234) |
% 17.81/17.35 (((((bnd_ndr1_0 & bnd_c4_1 bnd_a1235) &
% 17.81/17.35 (ALL X53.
% 17.81/17.35 bnd_ndr1_1 bnd_a1235 -->
% 17.81/17.35 (bnd_c2_2 bnd_a1235 X53 | ~ bnd_c9_2 bnd_a1235 X53) |
% 17.81/17.35 ~ bnd_c4_2 bnd_a1235 X53)) &
% 17.81/17.35 bnd_ndr1_1 bnd_a1235) &
% 17.81/17.35 ~ bnd_c8_2 bnd_a1235 bnd_a1236) &
% 17.81/17.35 ~ bnd_c3_2 bnd_a1235 bnd_a1236) &
% 17.81/17.35 bnd_c4_2 bnd_a1235 bnd_a1236) |
% 17.81/17.35 bnd_c1_0)) &
% 17.81/17.35 ((((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1237) &
% 17.81/17.35 bnd_c5_2 bnd_a1237 bnd_a1238) &
% 17.81/17.35 bnd_c7_2 bnd_a1237 bnd_a1238) &
% 17.81/17.35 bnd_c4_2 bnd_a1237 bnd_a1238) &
% 17.81/17.35 bnd_ndr1_1 bnd_a1237) &
% 17.81/17.35 bnd_c5_2 bnd_a1237 bnd_a1239) &
% 17.81/17.35 ~ bnd_c6_2 bnd_a1237 bnd_a1239) &
% 17.81/17.35 ~ bnd_c2_2 bnd_a1237 bnd_a1239) &
% 17.81/17.35 ~ bnd_c8_1 bnd_a1237 |
% 17.81/17.35 (ALL X54. bnd_ndr1_0 --> ~ bnd_c3_1 X54 | bnd_c8_1 X54)) |
% 17.81/17.35 bnd_c8_0)) &
% 17.81/17.35 bnd_c9_0) &
% 17.81/17.35 ((~ bnd_c3_0 |
% 17.81/17.35 ((bnd_ndr1_0 &
% 17.81/17.35 (ALL X55.
% 17.81/17.35 bnd_ndr1_1 bnd_a1240 -->
% 17.81/17.35 (bnd_c6_2 bnd_a1240 X55 | bnd_c4_2 bnd_a1240 X55) |
% 17.81/17.35 bnd_c5_2 bnd_a1240 X55)) &
% 17.81/17.35 (ALL X56.
% 17.81/17.35 bnd_ndr1_1 bnd_a1240 -->
% 17.81/17.35 (~ bnd_c5_2 bnd_a1240 X56 | bnd_c3_2 bnd_a1240 X56) |
% 17.81/17.35 bnd_c4_2 bnd_a1240 X56)) &
% 17.81/17.35 ~ bnd_c7_1 bnd_a1240) |
% 17.81/17.35 ((bnd_ndr1_0 &
% 17.81/17.35 (ALL X57.
% 17.81/17.35 bnd_ndr1_1 bnd_a1241 -->
% 17.81/17.35 (bnd_c6_2 bnd_a1241 X57 | ~ bnd_c8_2 bnd_a1241 X57) |
% 17.81/17.35 bnd_c7_2 bnd_a1241 X57)) &
% 17.81/17.35 (ALL X58.
% 17.81/17.35 bnd_ndr1_1 bnd_a1241 -->
% 17.81/17.35 ~ bnd_c9_2 bnd_a1241 X58 | ~ bnd_c10_2 bnd_a1241 X58)) &
% 17.81/17.35 ~ bnd_c3_1 bnd_a1241)) &
% 17.81/17.35 ((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1242) &
% 17.81/17.35 bnd_c8_2 bnd_a1242 bnd_a1243) &
% 17.81/17.35 bnd_c10_2 bnd_a1242 bnd_a1243) &
% 17.81/17.35 bnd_c2_2 bnd_a1242 bnd_a1243) &
% 17.81/17.35 bnd_c9_1 bnd_a1242 |
% 17.81/17.35 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1244) &
% 17.81/17.35 bnd_c6_2 bnd_a1244 bnd_a1245) &
% 17.81/17.35 bnd_c4_2 bnd_a1244 bnd_a1245) &
% 17.81/17.35 bnd_c7_2 bnd_a1244 bnd_a1245) &
% 17.81/17.35 bnd_c2_1 bnd_a1244) &
% 17.81/17.35 ~ bnd_c10_1 bnd_a1244) |
% 17.81/17.35 (ALL X59.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 bnd_c7_1 X59 |
% 17.81/17.35 ((bnd_ndr1_1 X59 & ~ bnd_c1_2 X59 bnd_a1246) &
% 17.81/17.35 bnd_c5_2 X59 bnd_a1246) &
% 17.81/17.35 ~ bnd_c9_2 X59 bnd_a1246))) &
% 17.81/17.35 ((((bnd_ndr1_0 & bnd_c6_1 bnd_a1247) & bnd_c9_1 bnd_a1247) &
% 17.81/17.35 (ALL X60.
% 17.81/17.35 bnd_ndr1_1 bnd_a1247 -->
% 17.81/17.35 (bnd_c5_2 bnd_a1247 X60 | ~ bnd_c10_2 bnd_a1247 X60) |
% 17.81/17.35 ~ bnd_c2_2 bnd_a1247 X60) |
% 17.81/17.35 bnd_c5_0) |
% 17.81/17.35 ~ bnd_c10_0)) &
% 17.81/17.35 ((~ bnd_c7_0 |
% 17.81/17.35 (ALL X61.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 ((ALL X62.
% 17.81/17.35 bnd_ndr1_1 X61 -->
% 17.81/17.35 (bnd_c2_2 X61 X62 | bnd_c5_2 X61 X62) | ~ bnd_c7_2 X61 X62) |
% 17.81/17.35 (ALL X63.
% 17.81/17.35 bnd_ndr1_1 X61 -->
% 17.81/17.35 (bnd_c5_2 X61 X63 | bnd_c2_2 X61 X63) |
% 17.81/17.35 ~ bnd_c1_2 X61 X63)) |
% 17.81/17.35 ~ bnd_c7_1 X61)) |
% 17.81/17.35 bnd_c4_0)) &
% 17.81/17.35 ((~ bnd_c8_0 | ~ bnd_c5_0) |
% 17.81/17.35 ((bnd_ndr1_0 &
% 17.81/17.35 (ALL X64.
% 17.81/17.35 bnd_ndr1_1 bnd_a1248 -->
% 17.81/17.35 ~ bnd_c4_2 bnd_a1248 X64 | ~ bnd_c1_2 bnd_a1248 X64)) &
% 17.81/17.35 ~ bnd_c4_1 bnd_a1248) &
% 17.81/17.35 ~ bnd_c5_1 bnd_a1248)) &
% 17.81/17.35 (((ALL X65.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (ALL X66.
% 17.81/17.35 bnd_ndr1_1 X65 -->
% 17.81/17.35 (~ bnd_c9_2 X65 X66 | ~ bnd_c5_2 X65 X66) |
% 17.81/17.35 ~ bnd_c6_2 X65 X66) |
% 17.81/17.35 bnd_c9_1 X65) |
% 17.81/17.35 (ALL X67.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (bnd_c2_1 X67 |
% 17.81/17.35 (ALL X68.
% 17.81/17.35 bnd_ndr1_1 X67 -->
% 17.81/17.35 (~ bnd_c2_2 X67 X68 | ~ bnd_c4_2 X67 X68) |
% 17.81/17.35 ~ bnd_c7_2 X67 X68)) |
% 17.81/17.35 ~ bnd_c10_1 X67)) |
% 17.81/17.35 ~ bnd_c1_0)) &
% 17.81/17.35 ~ bnd_c5_0) &
% 17.81/17.35 ((((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a1249) &
% 17.81/17.35 (ALL X69.
% 17.81/17.35 bnd_ndr1_1 bnd_a1249 -->
% 17.81/17.35 (bnd_c3_2 bnd_a1249 X69 | bnd_c6_2 bnd_a1249 X69) |
% 17.81/17.35 bnd_c5_2 bnd_a1249 X69)) &
% 17.81/17.35 bnd_c4_1 bnd_a1249 |
% 17.81/17.35 (bnd_ndr1_0 & bnd_c2_1 bnd_a1250) &
% 17.81/17.35 (ALL X70.
% 17.81/17.35 bnd_ndr1_1 bnd_a1250 -->
% 17.81/17.35 (bnd_c8_2 bnd_a1250 X70 | ~ bnd_c7_2 bnd_a1250 X70) |
% 17.81/17.35 bnd_c5_2 bnd_a1250 X70)) |
% 17.81/17.35 (ALL X71.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 ((ALL X72.
% 17.81/17.35 bnd_ndr1_1 X71 -->
% 17.81/17.35 (bnd_c3_2 X71 X72 | bnd_c5_2 X71 X72) | bnd_c7_2 X71 X72) |
% 17.81/17.35 (ALL X73.
% 17.81/17.35 bnd_ndr1_1 X71 -->
% 17.81/17.35 (bnd_c10_2 X71 X73 | ~ bnd_c3_2 X71 X73) | bnd_c7_2 X71 X73)) |
% 17.81/17.35 ~ bnd_c2_1 X71))) &
% 17.81/17.35 (((ALL X74.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (bnd_c10_1 X74 | bnd_c3_1 X74) |
% 17.81/17.35 ((bnd_ndr1_1 X74 & ~ bnd_c3_2 X74 bnd_a1251) &
% 17.81/17.35 ~ bnd_c5_2 X74 bnd_a1251) &
% 17.81/17.35 bnd_c8_2 X74 bnd_a1251) |
% 17.81/17.35 ~ bnd_c10_0) |
% 17.81/17.35 ~ bnd_c3_0)) &
% 17.81/17.35 ((((((((((bnd_ndr1_0 &
% 17.81/17.35 (ALL X75.
% 17.81/17.35 bnd_ndr1_1 bnd_a1252 -->
% 17.81/17.35 (~ bnd_c4_2 bnd_a1252 X75 | ~ bnd_c3_2 bnd_a1252 X75) |
% 17.81/17.35 bnd_c8_2 bnd_a1252 X75)) &
% 17.81/17.35 bnd_ndr1_1 bnd_a1252) &
% 17.81/17.35 ~ bnd_c2_2 bnd_a1252 bnd_a1253) &
% 17.81/17.35 bnd_c5_2 bnd_a1252 bnd_a1253) &
% 17.81/17.35 ~ bnd_c6_2 bnd_a1252 bnd_a1253) &
% 17.81/17.35 bnd_ndr1_1 bnd_a1252) &
% 17.81/17.35 ~ bnd_c10_2 bnd_a1252 bnd_a1254) &
% 17.81/17.35 bnd_c2_2 bnd_a1252 bnd_a1254) &
% 17.81/17.35 bnd_c5_2 bnd_a1252 bnd_a1254 |
% 17.81/17.35 bnd_c6_0) |
% 17.81/17.35 bnd_c3_0)) &
% 17.81/17.35 ((~ bnd_c6_0 |
% 17.81/17.35 (ALL X76.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 ((ALL X77.
% 17.81/17.35 bnd_ndr1_1 X76 -->
% 17.81/17.35 (bnd_c10_2 X76 X77 | ~ bnd_c9_2 X76 X77) | ~ bnd_c2_2 X76 X77) |
% 17.81/17.35 bnd_c7_1 X76) |
% 17.81/17.35 ~ bnd_c2_1 X76)) |
% 17.81/17.35 (ALL X78.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (~ bnd_c3_1 X78 |
% 17.81/17.35 (ALL X79.
% 17.81/17.35 bnd_ndr1_1 X78 -->
% 17.81/17.35 (bnd_c7_2 X78 X79 | ~ bnd_c9_2 X78 X79) | ~ bnd_c6_2 X78 X79)) |
% 17.81/17.35 bnd_c4_1 X78))) &
% 17.81/17.35 (((ALL X80.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 ((ALL X81.
% 17.81/17.35 bnd_ndr1_1 X80 -->
% 17.81/17.35 (~ bnd_c5_2 X80 X81 | bnd_c3_2 X80 X81) | bnd_c4_2 X80 X81) |
% 17.81/17.35 (ALL X82.
% 17.81/17.35 bnd_ndr1_1 X80 -->
% 17.81/17.35 (~ bnd_c4_2 X80 X82 | bnd_c8_2 X80 X82) | ~ bnd_c1_2 X80 X82)) |
% 17.81/17.35 (ALL X83.
% 17.81/17.35 bnd_ndr1_1 X80 -->
% 17.81/17.35 (~ bnd_c4_2 X80 X83 | bnd_c8_2 X80 X83) | bnd_c2_2 X80 X83)) |
% 17.81/17.35 bnd_c7_0) |
% 17.81/17.35 (((((bnd_ndr1_0 & bnd_c9_1 bnd_a1255) &
% 17.81/17.35 bnd_c1_1 bnd_a1255) &
% 17.81/17.35 bnd_ndr1_1 bnd_a1255) &
% 17.81/17.35 ~ bnd_c9_2 bnd_a1255 bnd_a1256) &
% 17.81/17.35 ~ bnd_c7_2 bnd_a1255 bnd_a1256) &
% 17.81/17.35 bnd_c10_2 bnd_a1255 bnd_a1256)) &
% 17.81/17.35 ((~ bnd_c10_0 | ~ bnd_c8_0) |
% 17.81/17.35 ~ bnd_c2_0)) &
% 17.81/17.35 (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1257) &
% 17.81/17.35 ~ bnd_c4_2 bnd_a1257 bnd_a1258) &
% 17.81/17.35 bnd_c3_2 bnd_a1257 bnd_a1258) &
% 17.81/17.35 bnd_c7_2 bnd_a1257 bnd_a1258) &
% 17.81/17.35 bnd_c8_1 bnd_a1257) &
% 17.81/17.35 ~ bnd_c9_1 bnd_a1257 |
% 17.81/17.35 (bnd_ndr1_0 & ~ bnd_c6_1 bnd_a1259) &
% 17.81/17.35 bnd_c5_1 bnd_a1259) |
% 17.81/17.35 bnd_c4_0)) &
% 17.81/17.35 ((~ bnd_c6_0 | bnd_c4_0) | bnd_c8_0)) &
% 17.81/17.35 ((~ bnd_c4_0 |
% 17.81/17.35 (ALL X84.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (bnd_c7_1 X84 | ~ bnd_c9_1 X84) |
% 17.81/17.35 (ALL X85.
% 17.81/17.35 bnd_ndr1_1 X84 -->
% 17.81/17.35 (bnd_c3_2 X84 X85 | ~ bnd_c6_2 X84 X85) | ~ bnd_c8_2 X84 X85))) |
% 17.81/17.35 (ALL X86.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (((bnd_ndr1_1 X86 &
% 17.81/17.35 bnd_c9_2 X86 bnd_a1260) &
% 17.81/17.35 ~ bnd_c4_2 X86 bnd_a1260) &
% 17.81/17.35 ~ bnd_c1_2 X86 bnd_a1260 |
% 17.81/17.35 ~ bnd_c7_1 X86) |
% 17.81/17.35 bnd_c9_1 X86))) &
% 17.81/17.35 (((ALL X87.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (~ bnd_c7_1 X87 | bnd_c10_1 X87) |
% 17.81/17.35 ~ bnd_c3_1 X87) |
% 17.81/17.35 bnd_c1_0) |
% 17.81/17.35 ((bnd_ndr1_0 &
% 17.81/17.35 (ALL X88.
% 17.81/17.35 bnd_ndr1_1 bnd_a1261 -->
% 17.81/17.35 (bnd_c1_2 bnd_a1261 X88 |
% 17.81/17.35 bnd_c3_2 bnd_a1261 X88) |
% 17.81/17.35 ~ bnd_c4_2 bnd_a1261 X88)) &
% 17.81/17.35 bnd_c10_1 bnd_a1261) &
% 17.81/17.35 (ALL X89.
% 17.81/17.35 bnd_ndr1_1 bnd_a1261 -->
% 17.81/17.35 ~ bnd_c7_2 bnd_a1261 X89 |
% 17.81/17.35 bnd_c1_2 bnd_a1261 X89))) &
% 17.81/17.35 ((~ bnd_c6_0 |
% 17.81/17.35 ((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1262) &
% 17.81/17.35 ~ bnd_c9_2 bnd_a1262 bnd_a1263) &
% 17.81/17.35 bnd_c1_2 bnd_a1262 bnd_a1263) &
% 17.81/17.35 bnd_c7_2 bnd_a1262 bnd_a1263) &
% 17.81/17.35 (ALL X90.
% 17.81/17.35 bnd_ndr1_1 bnd_a1262 -->
% 17.81/17.35 (~ bnd_c8_2 bnd_a1262 X90 | ~ bnd_c10_2 bnd_a1262 X90) |
% 17.81/17.35 bnd_c2_2 bnd_a1262 X90)) &
% 17.81/17.35 bnd_ndr1_1 bnd_a1262) &
% 17.81/17.35 bnd_c9_2 bnd_a1262 bnd_a1264) &
% 17.81/17.35 bnd_c10_2 bnd_a1262 bnd_a1264) &
% 17.81/17.35 bnd_c5_2 bnd_a1262 bnd_a1264) |
% 17.81/17.35 bnd_c10_0)) &
% 17.81/17.35 (((bnd_ndr1_0 & bnd_c10_1 bnd_a1265) &
% 17.81/17.35 bnd_c8_1 bnd_a1265 |
% 17.81/17.35 bnd_c4_0) |
% 17.81/17.35 (ALL X91.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (bnd_c10_1 X91 |
% 17.81/17.35 ((bnd_ndr1_1 X91 &
% 17.81/17.35 ~ bnd_c3_2 X91 bnd_a1266) &
% 17.81/17.35 bnd_c5_2 X91 bnd_a1266) &
% 17.81/17.35 bnd_c8_2 X91 bnd_a1266) |
% 17.81/17.35 ((bnd_ndr1_1 X91 & bnd_c5_2 X91 bnd_a1267) &
% 17.81/17.35 ~ bnd_c2_2 X91 bnd_a1267) &
% 17.81/17.35 bnd_c3_2 X91 bnd_a1267))) &
% 17.81/17.35 (((ALL X92.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (((bnd_ndr1_1 X92 &
% 17.81/17.35 bnd_c7_2 X92 bnd_a1268) &
% 17.81/17.35 ~ bnd_c8_2 X92 bnd_a1268) &
% 17.81/17.35 ~ bnd_c9_2 X92 bnd_a1268 |
% 17.81/17.35 ~ bnd_c9_1 X92) |
% 17.81/17.35 bnd_c8_1 X92) |
% 17.81/17.35 ~ bnd_c2_0) |
% 17.81/17.35 (bnd_ndr1_0 & bnd_c7_1 bnd_a1269) &
% 17.81/17.35 ~ bnd_c4_1 bnd_a1269)) &
% 17.81/17.35 (~ bnd_c3_0 |
% 17.81/17.35 (((((bnd_ndr1_0 & ~ bnd_c10_1 bnd_a1270) &
% 17.81/17.35 bnd_c9_1 bnd_a1270) &
% 17.81/17.35 bnd_ndr1_1 bnd_a1270) &
% 17.81/17.35 bnd_c8_2 bnd_a1270 bnd_a1271) &
% 17.81/17.35 bnd_c4_2 bnd_a1270 bnd_a1271) &
% 17.81/17.35 ~ bnd_c7_2 bnd_a1270 bnd_a1271)) &
% 17.81/17.35 ((~ bnd_c6_0 |
% 17.81/17.35 (ALL X93.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 ((ALL X94.
% 17.81/17.35 bnd_ndr1_1 X93 -->
% 17.81/17.35 (~ bnd_c1_2 X93 X94 |
% 17.81/17.35 bnd_c10_2 X93 X94) |
% 17.81/17.35 bnd_c7_2 X93 X94) |
% 17.81/17.35 bnd_c6_1 X93) |
% 17.81/17.35 bnd_c10_1 X93)) |
% 17.81/17.35 (((((bnd_ndr1_0 & ~ bnd_c3_1 bnd_a1272) &
% 17.81/17.35 ~ bnd_c8_1 bnd_a1272) &
% 17.81/17.35 bnd_ndr1_1 bnd_a1272) &
% 17.81/17.35 bnd_c7_2 bnd_a1272 bnd_a1273) &
% 17.81/17.35 bnd_c2_2 bnd_a1272 bnd_a1273) &
% 17.81/17.35 bnd_c8_2 bnd_a1272 bnd_a1273)) &
% 17.81/17.35 ((bnd_c10_0 |
% 17.81/17.35 (((((bnd_ndr1_0 & ~ bnd_c10_1 bnd_a1274) &
% 17.81/17.35 bnd_ndr1_1 bnd_a1274) &
% 17.81/17.35 ~ bnd_c9_2 bnd_a1274 bnd_a1275) &
% 17.81/17.35 ~ bnd_c8_2 bnd_a1274 bnd_a1275) &
% 17.81/17.35 ~ bnd_c6_2 bnd_a1274 bnd_a1275) &
% 17.81/17.35 (ALL X95.
% 17.81/17.35 bnd_ndr1_1 bnd_a1274 -->
% 17.81/17.35 (bnd_c6_2 bnd_a1274 X95 |
% 17.81/17.35 bnd_c5_2 bnd_a1274 X95) |
% 17.81/17.35 ~ bnd_c3_2 bnd_a1274 X95)) |
% 17.81/17.35 ~ bnd_c6_0)) &
% 17.81/17.35 ((~ bnd_c8_0 |
% 17.81/17.35 (ALL X96.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 ((ALL X97.
% 17.81/17.35 bnd_ndr1_1 X96 -->
% 17.81/17.35 (~ bnd_c8_2 X96 X97 | bnd_c5_2 X96 X97) |
% 17.81/17.35 ~ bnd_c6_2 X96 X97) |
% 17.81/17.35 (ALL X98.
% 17.81/17.35 bnd_ndr1_1 X96 -->
% 17.81/17.35 (~ bnd_c4_2 X96 X98 | ~ bnd_c9_2 X96 X98) |
% 17.81/17.35 bnd_c10_2 X96 X98)) |
% 17.81/17.35 ~ bnd_c4_1 X96)) |
% 17.81/17.35 ((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1276) &
% 17.81/17.35 ~ bnd_c10_2 bnd_a1276 bnd_a1277) &
% 17.81/17.35 bnd_c6_2 bnd_a1276 bnd_a1277) &
% 17.81/17.35 bnd_c8_2 bnd_a1276 bnd_a1277) &
% 17.81/17.35 ~ bnd_c8_1 bnd_a1276)) &
% 17.81/17.35 ((bnd_c3_0 |
% 17.81/17.35 (ALL X99.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (~ bnd_c2_1 X99 | bnd_c6_1 X99) |
% 17.81/17.35 ~ bnd_c4_1 X99)) |
% 17.81/17.35 bnd_c6_0)) &
% 17.81/17.35 ((((bnd_ndr1_0 &
% 17.81/17.35 (ALL X100.
% 17.81/17.35 bnd_ndr1_1 bnd_a1278 -->
% 17.81/17.35 (~ bnd_c3_2 bnd_a1278 X100 |
% 17.81/17.35 ~ bnd_c8_2 bnd_a1278 X100) |
% 17.81/17.35 bnd_c1_2 bnd_a1278 X100)) &
% 17.81/17.35 bnd_c7_1 bnd_a1278) &
% 17.81/17.35 (ALL X101.
% 17.81/17.35 bnd_ndr1_1 bnd_a1278 -->
% 17.81/17.35 (bnd_c3_2 bnd_a1278 X101 |
% 17.81/17.35 ~ bnd_c8_2 bnd_a1278 X101) |
% 17.81/17.35 ~ bnd_c10_2 bnd_a1278 X101) |
% 17.81/17.35 (ALL X102.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (((bnd_ndr1_1 X102 & ~ bnd_c5_2 X102 bnd_a1279) &
% 17.81/17.35 ~ bnd_c2_2 X102 bnd_a1279) &
% 17.81/17.35 ~ bnd_c7_2 X102 bnd_a1279 |
% 17.81/17.35 (bnd_ndr1_1 X102 & bnd_c4_2 X102 bnd_a1280) &
% 17.81/17.35 ~ bnd_c5_2 X102 bnd_a1280) |
% 17.81/17.35 bnd_c1_1 X102)) |
% 17.81/17.35 ((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1281) &
% 17.81/17.35 ~ bnd_c3_2 bnd_a1281 bnd_a1282) &
% 17.81/17.35 bnd_c8_2 bnd_a1281 bnd_a1282) &
% 17.81/17.35 bnd_c5_2 bnd_a1281 bnd_a1282) &
% 17.81/17.35 bnd_ndr1_1 bnd_a1281) &
% 17.81/17.35 bnd_c7_2 bnd_a1281 bnd_a1283) &
% 17.81/17.35 bnd_c4_2 bnd_a1281 bnd_a1283) &
% 17.81/17.35 bnd_c9_2 bnd_a1281 bnd_a1283) &
% 17.81/17.35 ~ bnd_c10_1 bnd_a1281)) &
% 17.81/17.35 (((bnd_ndr1_0 & bnd_c2_1 bnd_a1284) &
% 17.81/17.35 bnd_c1_1 bnd_a1284 |
% 17.81/17.35 ((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1285) &
% 17.81/17.35 ~ bnd_c5_2 bnd_a1285 bnd_a1286) &
% 17.81/17.35 bnd_c2_2 bnd_a1285 bnd_a1286) &
% 17.81/17.35 bnd_c1_2 bnd_a1285 bnd_a1286) &
% 17.81/17.35 ~ bnd_c9_1 bnd_a1285) |
% 17.81/17.35 bnd_c1_0)) &
% 17.81/17.35 ((((bnd_ndr1_0 &
% 17.81/17.35 (ALL X103.
% 17.81/17.35 bnd_ndr1_1 bnd_a1287 -->
% 17.81/17.35 ~ bnd_c4_2 bnd_a1287 X103 |
% 17.81/17.35 bnd_c1_2 bnd_a1287 X103)) &
% 17.81/17.35 (ALL X104.
% 17.81/17.35 bnd_ndr1_1 bnd_a1287 -->
% 17.81/17.35 (~ bnd_c7_2 bnd_a1287 X104 |
% 17.81/17.35 ~ bnd_c6_2 bnd_a1287 X104) |
% 17.81/17.35 ~ bnd_c1_2 bnd_a1287 X104)) &
% 17.81/17.35 bnd_c3_1 bnd_a1287 |
% 17.81/17.35 ((bnd_ndr1_0 &
% 17.81/17.35 (ALL X105.
% 17.81/17.35 bnd_ndr1_1 bnd_a1288 -->
% 17.81/17.35 (bnd_c3_2 bnd_a1288 X105 |
% 17.81/17.35 ~ bnd_c1_2 bnd_a1288 X105) |
% 17.81/17.35 bnd_c8_2 bnd_a1288 X105)) &
% 17.81/17.35 (ALL X106.
% 17.81/17.35 bnd_ndr1_1 bnd_a1288 -->
% 17.81/17.35 (~ bnd_c8_2 bnd_a1288 X106 |
% 17.81/17.35 bnd_c4_2 bnd_a1288 X106) |
% 17.81/17.35 bnd_c5_2 bnd_a1288 X106)) &
% 17.81/17.35 (ALL X107.
% 17.81/17.35 bnd_ndr1_1 bnd_a1288 -->
% 17.81/17.35 (bnd_c1_2 bnd_a1288 X107 |
% 17.81/17.35 bnd_c3_2 bnd_a1288 X107) |
% 17.81/17.35 ~ bnd_c2_2 bnd_a1288 X107)) |
% 17.81/17.35 bnd_c10_0)) &
% 17.81/17.35 ((~ bnd_c8_0 | bnd_c2_0) |
% 17.81/17.35 (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1289) &
% 17.81/17.35 bnd_c2_2 bnd_a1289 bnd_a1290) &
% 17.81/17.35 ~ bnd_c6_2 bnd_a1289 bnd_a1290) &
% 17.81/17.35 bnd_ndr1_1 bnd_a1289) &
% 17.81/17.35 bnd_c2_2 bnd_a1289 bnd_a1291) &
% 17.81/17.35 ~ bnd_c4_2 bnd_a1289 bnd_a1291) &
% 17.81/17.35 bnd_c8_2 bnd_a1289 bnd_a1291) &
% 17.81/17.35 ~ bnd_c8_1 bnd_a1289)) &
% 17.81/17.35 (~ bnd_c6_0 | ~ bnd_c3_0)) &
% 17.81/17.35 ((ALL X108.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 ((ALL X109.
% 17.81/17.35 bnd_ndr1_1 X108 -->
% 17.81/17.35 (~ bnd_c7_2 X108 X109 | bnd_c6_2 X108 X109) |
% 17.81/17.35 ~ bnd_c10_2 X108 X109) |
% 17.81/17.35 ((bnd_ndr1_1 X108 & ~ bnd_c6_2 X108 bnd_a1292) &
% 17.81/17.35 bnd_c8_2 X108 bnd_a1292) &
% 17.81/17.35 ~ bnd_c10_2 X108 bnd_a1292) |
% 17.81/17.35 (ALL X110.
% 17.81/17.35 bnd_ndr1_1 X108 -->
% 17.81/17.35 (bnd_c9_2 X108 X110 | bnd_c1_2 X108 X110) |
% 17.81/17.35 bnd_c3_2 X108 X110)) |
% 17.81/17.35 ((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1293) &
% 17.81/17.35 bnd_c10_2 bnd_a1293 bnd_a1294) &
% 17.81/17.35 bnd_c5_2 bnd_a1293 bnd_a1294) &
% 17.81/17.35 (ALL X111.
% 17.81/17.35 bnd_ndr1_1 bnd_a1293 -->
% 17.81/17.35 (~ bnd_c9_2 bnd_a1293 X111 |
% 17.81/17.35 ~ bnd_c6_2 bnd_a1293 X111) |
% 17.81/17.35 ~ bnd_c8_2 bnd_a1293 X111)) &
% 17.81/17.35 (ALL X112.
% 17.81/17.35 bnd_ndr1_1 bnd_a1293 -->
% 17.81/17.35 (~ bnd_c4_2 bnd_a1293 X112 | bnd_c5_2 bnd_a1293 X112) |
% 17.81/17.35 bnd_c7_2 bnd_a1293 X112))) &
% 17.81/17.35 (((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1295) &
% 17.81/17.35 bnd_c4_2 bnd_a1295 bnd_a1296) &
% 17.81/17.35 bnd_c10_2 bnd_a1295 bnd_a1296) &
% 17.81/17.35 ~ bnd_c7_2 bnd_a1295 bnd_a1296) &
% 17.81/17.35 bnd_ndr1_1 bnd_a1295) &
% 17.81/17.35 ~ bnd_c7_2 bnd_a1295 bnd_a1297) &
% 17.81/17.35 bnd_c1_2 bnd_a1295 bnd_a1297) &
% 17.81/17.35 (ALL X113.
% 17.81/17.35 bnd_ndr1_1 bnd_a1295 -->
% 17.81/17.35 (~ bnd_c5_2 bnd_a1295 X113 | bnd_c6_2 bnd_a1295 X113) |
% 17.81/17.35 ~ bnd_c9_2 bnd_a1295 X113) |
% 17.81/17.35 ~ bnd_c7_0) |
% 17.81/17.35 ~ bnd_c3_0)) &
% 17.81/17.35 ((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1298) &
% 17.81/17.35 bnd_c3_2 bnd_a1298 bnd_a1299) &
% 17.81/17.35 bnd_c4_2 bnd_a1298 bnd_a1299) &
% 17.81/17.35 bnd_c5_2 bnd_a1298 bnd_a1299) &
% 17.81/17.35 ~ bnd_c4_1 bnd_a1298) &
% 17.81/17.35 ~ bnd_c5_1 bnd_a1298 |
% 17.81/17.35 (ALL X114.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (~ bnd_c10_1 X114 | ~ bnd_c2_1 X114) |
% 17.81/17.35 ((bnd_ndr1_1 X114 & bnd_c5_2 X114 bnd_a1300) &
% 17.81/17.35 bnd_c1_2 X114 bnd_a1300) &
% 17.81/17.35 ~ bnd_c3_2 X114 bnd_a1300))) &
% 17.81/17.35 ((ALL X115.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (ALL X116.
% 17.81/17.35 bnd_ndr1_1 X115 -->
% 17.81/17.35 (~ bnd_c8_2 X115 X116 | ~ bnd_c1_2 X115 X116) |
% 17.81/17.35 ~ bnd_c9_2 X115 X116) |
% 17.81/17.35 ((bnd_ndr1_1 X115 & bnd_c8_2 X115 bnd_a1301) &
% 17.81/17.35 ~ bnd_c10_2 X115 bnd_a1301) &
% 17.81/17.35 ~ bnd_c6_2 X115 bnd_a1301) |
% 17.81/17.35 (ALL X117.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (bnd_c1_1 X117 | ~ bnd_c4_1 X117) |
% 17.81/17.35 (bnd_ndr1_1 X117 & ~ bnd_c1_2 X117 bnd_a1302) &
% 17.81/17.35 ~ bnd_c9_2 X117 bnd_a1302))) &
% 17.81/17.35 (((((((bnd_ndr1_0 & bnd_c1_1 bnd_a1303) & bnd_ndr1_1 bnd_a1303) &
% 17.81/17.35 ~ bnd_c6_2 bnd_a1303 bnd_a1304) &
% 17.81/17.35 bnd_c10_2 bnd_a1303 bnd_a1304) &
% 17.81/17.35 bnd_c5_2 bnd_a1303 bnd_a1304) &
% 17.81/17.35 (ALL X118.
% 17.81/17.35 bnd_ndr1_1 bnd_a1303 -->
% 17.81/17.35 (bnd_c1_2 bnd_a1303 X118 | bnd_c2_2 bnd_a1303 X118) |
% 17.81/17.35 ~ bnd_c5_2 bnd_a1303 X118) |
% 17.81/17.35 (ALL X119.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (~ bnd_c7_1 X119 | ~ bnd_c8_1 X119) | ~ bnd_c10_1 X119)) |
% 17.81/17.35 bnd_c6_0)) &
% 17.81/17.35 ((bnd_c3_0 |
% 17.81/17.35 (ALL X120.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (bnd_c6_1 X120 | ~ bnd_c9_1 X120) | bnd_c8_1 X120)) |
% 17.81/17.35 ~ bnd_c7_0)) &
% 17.81/17.35 (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1305) &
% 17.81/17.35 bnd_c1_2 bnd_a1305 bnd_a1306) &
% 17.81/17.35 ~ bnd_c10_2 bnd_a1305 bnd_a1306) &
% 17.81/17.35 ~ bnd_c4_2 bnd_a1305 bnd_a1306) &
% 17.81/17.35 ~ bnd_c5_1 bnd_a1305) &
% 17.81/17.35 bnd_c1_1 bnd_a1305 |
% 17.81/17.35 bnd_c7_0) |
% 17.81/17.35 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1307) &
% 17.81/17.35 ~ bnd_c4_2 bnd_a1307 bnd_a1308) &
% 17.81/17.35 bnd_c5_2 bnd_a1307 bnd_a1308) &
% 17.81/17.35 bnd_c7_2 bnd_a1307 bnd_a1308) &
% 17.81/17.35 (ALL X121.
% 17.81/17.35 bnd_ndr1_1 bnd_a1307 -->
% 17.81/17.35 (~ bnd_c6_2 bnd_a1307 X121 | ~ bnd_c4_2 bnd_a1307 X121) |
% 17.81/17.35 ~ bnd_c5_2 bnd_a1307 X121)) &
% 17.81/17.35 (ALL X122.
% 17.81/17.35 bnd_ndr1_1 bnd_a1307 -->
% 17.81/17.35 (bnd_c5_2 bnd_a1307 X122 | ~ bnd_c9_2 bnd_a1307 X122) |
% 17.81/17.35 ~ bnd_c3_2 bnd_a1307 X122))) &
% 17.81/17.35 (bnd_c2_0 | bnd_c10_0)) &
% 17.81/17.35 ((bnd_c7_0 |
% 17.81/17.35 (ALL X123.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (~ bnd_c10_1 X123 |
% 17.81/17.35 (ALL X124.
% 17.81/17.35 bnd_ndr1_1 X123 -->
% 17.81/17.35 (bnd_c7_2 X123 X124 | ~ bnd_c5_2 X123 X124) |
% 17.81/17.35 bnd_c3_2 X123 X124)) |
% 17.81/17.35 bnd_c6_1 X123)) |
% 17.81/17.35 (ALL X125.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 ((bnd_ndr1_1 X125 & ~ bnd_c4_2 X125 bnd_a1309) &
% 17.81/17.35 bnd_c7_2 X125 bnd_a1309 |
% 17.81/17.35 ~ bnd_c2_1 X125) |
% 17.81/17.35 (ALL X126.
% 17.81/17.35 bnd_ndr1_1 X125 -->
% 17.81/17.35 (bnd_c10_2 X125 X126 | bnd_c3_2 X125 X126) |
% 17.81/17.35 ~ bnd_c6_2 X125 X126)))) &
% 17.81/17.35 (~ bnd_c8_0 | bnd_c2_0)) &
% 17.81/17.35 (((ALL X127.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (~ bnd_c3_1 X127 |
% 17.81/17.35 ((bnd_ndr1_1 X127 & bnd_c1_2 X127 bnd_a1310) &
% 17.81/17.35 ~ bnd_c3_2 X127 bnd_a1310) &
% 17.81/17.35 ~ bnd_c2_2 X127 bnd_a1310) |
% 17.81/17.35 bnd_c8_1 X127) |
% 17.81/17.35 bnd_c2_0) |
% 17.81/17.35 ((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a1311) &
% 17.81/17.35 (ALL X128.
% 17.81/17.35 bnd_ndr1_1 bnd_a1311 -->
% 17.81/17.35 bnd_c8_2 bnd_a1311 X128 | bnd_c9_2 bnd_a1311 X128)) &
% 17.81/17.35 ~ bnd_c5_1 bnd_a1311)) &
% 17.81/17.35 ((~ bnd_c8_0 |
% 17.81/17.35 (ALL X129.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (~ bnd_c3_1 X129 | ~ bnd_c8_1 X129) | bnd_c6_1 X129)) |
% 17.81/17.35 bnd_c10_0)) &
% 17.81/17.35 ((bnd_c10_0 |
% 17.81/17.35 (ALL X130.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (~ bnd_c4_1 X130 | ~ bnd_c3_1 X130) |
% 17.81/17.35 (ALL X131.
% 17.81/17.35 bnd_ndr1_1 X130 -->
% 17.81/17.35 (~ bnd_c6_2 X130 X131 | ~ bnd_c8_2 X130 X131) |
% 17.81/17.35 bnd_c1_2 X130 X131))) |
% 17.81/17.35 bnd_c3_0)) &
% 17.81/17.35 ((~ bnd_c2_0 | (ALL X132. bnd_ndr1_0 --> bnd_c1_1 X132 | bnd_c6_1 X132)) |
% 17.81/17.35 ~ bnd_c8_0)) &
% 17.81/17.35 (~ bnd_c6_0 | bnd_c4_0)) &
% 17.81/17.35 ((~ bnd_c8_0 | bnd_c1_0) | ~ bnd_c2_0)) &
% 17.81/17.35 ((ALL X133.
% 17.81/17.35 bnd_ndr1_0 --> (bnd_c6_1 X133 | bnd_c7_1 X133) | bnd_c9_1 X133) |
% 17.81/17.35 bnd_c7_0)) &
% 17.81/17.35 (((ALL X134.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 ((ALL X135.
% 17.81/17.35 bnd_ndr1_1 X134 -->
% 17.81/17.35 (~ bnd_c9_2 X134 X135 | ~ bnd_c8_2 X134 X135) |
% 17.81/17.35 bnd_c6_2 X134 X135) |
% 17.81/17.35 (ALL X136.
% 17.81/17.35 bnd_ndr1_1 X134 -->
% 17.81/17.35 (bnd_c4_2 X134 X136 | ~ bnd_c9_2 X134 X136) |
% 17.81/17.35 ~ bnd_c7_2 X134 X136)) |
% 17.81/17.35 bnd_c4_1 X134) |
% 17.81/17.35 ~ bnd_c6_0) |
% 17.81/17.35 bnd_c2_0)) &
% 17.81/17.35 bnd_c4_0) &
% 17.81/17.35 (((ALL X137.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 ((ALL X138.
% 17.81/17.35 bnd_ndr1_1 X137 -->
% 17.81/17.35 (bnd_c9_2 X137 X138 | ~ bnd_c1_2 X137 X138) |
% 17.81/17.35 ~ bnd_c10_2 X137 X138) |
% 17.81/17.35 ~ bnd_c4_1 X137) |
% 17.81/17.35 ((bnd_ndr1_1 X137 & ~ bnd_c3_2 X137 bnd_a1312) &
% 17.81/17.35 bnd_c6_2 X137 bnd_a1312) &
% 17.81/17.35 ~ bnd_c4_2 X137 bnd_a1312) |
% 17.81/17.35 bnd_c8_0) |
% 17.81/17.35 ~ bnd_c2_0)) &
% 17.81/17.35 ((~ bnd_c10_0 |
% 17.81/17.35 (ALL X139.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (((bnd_ndr1_1 X139 & ~ bnd_c2_2 X139 bnd_a1313) &
% 17.81/17.35 bnd_c1_2 X139 bnd_a1313) &
% 17.81/17.35 ~ bnd_c3_2 X139 bnd_a1313 |
% 17.81/17.35 ~ bnd_c7_1 X139) |
% 17.81/17.35 ((bnd_ndr1_1 X139 & ~ bnd_c5_2 X139 bnd_a1314) & bnd_c4_2 X139 bnd_a1314) &
% 17.81/17.35 bnd_c10_2 X139 bnd_a1314)) |
% 17.81/17.35 bnd_c6_0)) &
% 17.81/17.35 ((((bnd_ndr1_0 & bnd_c10_1 bnd_a1315) &
% 17.81/17.35 (ALL X140.
% 17.81/17.35 bnd_ndr1_1 bnd_a1315 -->
% 17.81/17.35 ~ bnd_c8_2 bnd_a1315 X140 | ~ bnd_c2_2 bnd_a1315 X140)) &
% 17.81/17.35 (ALL X141.
% 17.81/17.35 bnd_ndr1_1 bnd_a1315 -->
% 17.81/17.35 (~ bnd_c5_2 bnd_a1315 X141 | ~ bnd_c6_2 bnd_a1315 X141) |
% 17.81/17.35 ~ bnd_c9_2 bnd_a1315 X141) |
% 17.81/17.35 ~ bnd_c2_0) |
% 17.81/17.35 (bnd_ndr1_0 & ~ bnd_c8_1 bnd_a1316) &
% 17.81/17.35 ~ bnd_c5_1 bnd_a1316)) &
% 17.81/17.35 (((ALL X142.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (~ bnd_c2_1 X142 |
% 17.81/17.35 (bnd_ndr1_1 X142 & ~ bnd_c6_2 X142 bnd_a1317) & ~ bnd_c2_2 X142 bnd_a1317) |
% 17.81/17.35 ~ bnd_c10_1 X142) |
% 17.81/17.35 (ALL X143.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (((bnd_ndr1_1 X143 &
% 17.81/17.35 ~ bnd_c8_2 X143 bnd_a1318) &
% 17.81/17.35 bnd_c7_2 X143 bnd_a1318) &
% 17.81/17.35 bnd_c3_2 X143 bnd_a1318 |
% 17.81/17.35 (ALL X144.
% 17.81/17.35 bnd_ndr1_1 X143 -->
% 17.81/17.35 (bnd_c9_2 X143 X144 | bnd_c3_2 X143 X144) | ~ bnd_c1_2 X143 X144)) |
% 17.81/17.35 ((bnd_ndr1_1 X143 &
% 17.81/17.35 ~ bnd_c6_2 X143 bnd_a1319) &
% 17.81/17.35 bnd_c1_2 X143 bnd_a1319) &
% 17.81/17.35 bnd_c8_2 X143 bnd_a1319)) |
% 17.81/17.35 (ALL X145.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (bnd_c3_1 X145 | ~ bnd_c2_1 X145) |
% 17.81/17.35 bnd_c7_1 X145))) &
% 17.81/17.35 ((~ bnd_c7_0 |
% 17.81/17.35 (((((((bnd_ndr1_0 &
% 17.81/17.35 (ALL X146.
% 17.81/17.35 bnd_ndr1_1 bnd_a1320 -->
% 17.81/17.35 (bnd_c3_2 bnd_a1320 X146 | bnd_c2_2 bnd_a1320 X146) |
% 17.81/17.35 bnd_c5_2 bnd_a1320 X146)) &
% 17.81/17.35 bnd_ndr1_1 bnd_a1320) &
% 17.81/17.35 ~ bnd_c5_2 bnd_a1320 bnd_a1321) &
% 17.81/17.35 ~ bnd_c10_2 bnd_a1320 bnd_a1321) &
% 17.81/17.35 bnd_c6_2 bnd_a1320 bnd_a1321) &
% 17.81/17.35 bnd_ndr1_1 bnd_a1320) &
% 17.81/17.35 ~ bnd_c8_2 bnd_a1320 bnd_a1322) &
% 17.81/17.35 bnd_c1_2 bnd_a1320 bnd_a1322) |
% 17.81/17.35 ~ bnd_c8_0)) &
% 17.81/17.35 (((ALL X147.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (~ bnd_c2_1 X147 | bnd_c7_1 X147) |
% 17.81/17.35 (ALL X148.
% 17.81/17.35 bnd_ndr1_1 X147 -->
% 17.81/17.35 (bnd_c3_2 X147 X148 | bnd_c6_2 X147 X148) | bnd_c8_2 X147 X148)) |
% 17.81/17.35 (((((bnd_ndr1_0 & bnd_c4_1 bnd_a1323) &
% 17.81/17.35 bnd_c6_1 bnd_a1323) &
% 17.81/17.35 bnd_ndr1_1 bnd_a1323) &
% 17.81/17.35 bnd_c9_2 bnd_a1323 bnd_a1324) &
% 17.81/17.35 ~ bnd_c8_2 bnd_a1323 bnd_a1324) &
% 17.81/17.35 ~ bnd_c1_2 bnd_a1323 bnd_a1324) |
% 17.81/17.35 (ALL X149.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (((bnd_ndr1_1 X149 &
% 17.81/17.35 ~ bnd_c1_2 X149 bnd_a1325) &
% 17.81/17.35 ~ bnd_c10_2 X149 bnd_a1325) &
% 17.81/17.35 ~ bnd_c8_2 X149 bnd_a1325 |
% 17.81/17.35 ~ bnd_c2_1 X149) |
% 17.81/17.35 ((bnd_ndr1_1 X149 &
% 17.81/17.35 ~ bnd_c1_2 X149 bnd_a1326) &
% 17.81/17.35 bnd_c2_2 X149 bnd_a1326) &
% 17.81/17.35 ~ bnd_c9_2 X149 bnd_a1326))) &
% 17.81/17.35 ((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1327) &
% 17.81/17.35 bnd_c8_2 bnd_a1327 bnd_a1328) &
% 17.81/17.35 ~ bnd_c3_2 bnd_a1327 bnd_a1328) &
% 17.81/17.35 (ALL X150.
% 17.81/17.35 bnd_ndr1_1 bnd_a1327 -->
% 17.81/17.35 (~ bnd_c10_2 bnd_a1327 X150 |
% 17.81/17.35 ~ bnd_c2_2 bnd_a1327 X150) |
% 17.81/17.35 ~ bnd_c3_2 bnd_a1327 X150)) &
% 17.81/17.35 bnd_c10_1 bnd_a1327 |
% 17.81/17.35 bnd_c3_0) |
% 17.81/17.35 ~ bnd_c2_0)) &
% 17.81/17.35 (((ALL X151.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (bnd_c4_1 X151 |
% 17.81/17.35 ((bnd_ndr1_1 X151 &
% 17.81/17.35 bnd_c8_2 X151 bnd_a1329) &
% 17.81/17.35 bnd_c5_2 X151 bnd_a1329) &
% 17.81/17.35 bnd_c7_2 X151 bnd_a1329) |
% 17.81/17.35 bnd_c1_1 X151) |
% 17.81/17.35 ~ bnd_c7_0) |
% 17.81/17.35 bnd_c2_0)) &
% 17.81/17.35 ((~ bnd_c1_0 |
% 17.81/17.35 (ALL X152.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (~ bnd_c10_1 X152 |
% 17.81/17.35 (ALL X153.
% 17.81/17.35 bnd_ndr1_1 X152 -->
% 17.81/17.35 (bnd_c10_2 X152 X153 |
% 17.81/17.35 bnd_c2_2 X152 X153) |
% 17.81/17.35 bnd_c7_2 X152 X153)) |
% 17.81/17.35 (ALL X154.
% 17.81/17.35 bnd_ndr1_1 X152 -->
% 17.81/17.35 (~ bnd_c5_2 X152 X154 |
% 17.81/17.35 bnd_c3_2 X152 X154) |
% 17.81/17.35 bnd_c1_2 X152 X154))) |
% 17.81/17.35 (ALL X155.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 ((ALL X156.
% 17.81/17.35 bnd_ndr1_1 X155 -->
% 17.81/17.35 (bnd_c2_2 X155 X156 |
% 17.81/17.35 ~ bnd_c8_2 X155 X156) |
% 17.81/17.35 bnd_c5_2 X155 X156) |
% 17.81/17.35 ~ bnd_c2_1 X155) |
% 17.81/17.35 ((bnd_ndr1_1 X155 &
% 17.81/17.35 ~ bnd_c8_2 X155 bnd_a1330) &
% 17.81/17.35 bnd_c9_2 X155 bnd_a1330) &
% 17.81/17.35 ~ bnd_c2_2 X155 bnd_a1330))) &
% 17.81/17.35 (~ bnd_c6_0 |
% 17.81/17.35 (((((bnd_ndr1_0 & bnd_c3_1 bnd_a1331) &
% 17.81/17.35 bnd_ndr1_1 bnd_a1331) &
% 17.81/17.35 bnd_c7_2 bnd_a1331 bnd_a1332) &
% 17.81/17.35 ~ bnd_c9_2 bnd_a1331 bnd_a1332) &
% 17.81/17.35 ~ bnd_c10_2 bnd_a1331 bnd_a1332) &
% 17.81/17.35 (ALL X157.
% 17.81/17.35 bnd_ndr1_1 bnd_a1331 -->
% 17.81/17.35 (bnd_c9_2 bnd_a1331 X157 |
% 17.81/17.35 ~ bnd_c6_2 bnd_a1331 X157) |
% 17.81/17.35 ~ bnd_c5_2 bnd_a1331 X157))) &
% 17.81/17.35 ((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1333) &
% 17.81/17.35 bnd_c6_2 bnd_a1333 bnd_a1334) &
% 17.81/17.35 ~ bnd_c3_2 bnd_a1333 bnd_a1334) &
% 17.81/17.35 ~ bnd_c9_2 bnd_a1333 bnd_a1334) &
% 17.81/17.35 bnd_c3_1 bnd_a1333) &
% 17.81/17.35 (ALL X158.
% 17.81/17.35 bnd_ndr1_1 bnd_a1333 -->
% 17.81/17.35 (~ bnd_c9_2 bnd_a1333 X158 |
% 17.81/17.35 ~ bnd_c10_2 bnd_a1333 X158) |
% 17.81/17.35 ~ bnd_c4_2 bnd_a1333 X158) |
% 17.81/17.35 (((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1335) &
% 17.81/17.35 ~ bnd_c2_2 bnd_a1335 bnd_a1336) &
% 17.81/17.35 bnd_c8_2 bnd_a1335 bnd_a1336) &
% 17.81/17.35 ~ bnd_c3_1 bnd_a1335)) &
% 17.81/17.35 ((ALL X159.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 ((ALL X160.
% 17.81/17.35 bnd_ndr1_1 X159 -->
% 17.81/17.35 (bnd_c7_2 X159 X160 |
% 17.81/17.35 ~ bnd_c6_2 X159 X160) |
% 17.81/17.35 bnd_c1_2 X159 X160) |
% 17.81/17.35 ((bnd_ndr1_1 X159 & bnd_c4_2 X159 bnd_a1337) &
% 17.81/17.35 bnd_c3_2 X159 bnd_a1337) &
% 17.81/17.35 ~ bnd_c8_2 X159 bnd_a1337) |
% 17.81/17.35 (ALL X161.
% 17.81/17.35 bnd_ndr1_1 X159 -->
% 17.81/17.35 bnd_c6_2 X159 X161 | bnd_c5_2 X159 X161)) |
% 17.81/17.35 ~ bnd_c7_0)) &
% 17.81/17.35 (((((((bnd_ndr1_0 & ~ bnd_c8_1 bnd_a1338) &
% 17.81/17.35 (ALL X162.
% 17.81/17.35 bnd_ndr1_1 bnd_a1338 -->
% 17.81/17.35 (bnd_c6_2 bnd_a1338 X162 |
% 17.81/17.35 bnd_c3_2 bnd_a1338 X162) |
% 17.81/17.35 ~ bnd_c9_2 bnd_a1338 X162)) &
% 17.81/17.35 bnd_ndr1_1 bnd_a1338) &
% 17.81/17.35 bnd_c8_2 bnd_a1338 bnd_a1339) &
% 17.81/17.35 bnd_c5_2 bnd_a1338 bnd_a1339) &
% 17.81/17.35 bnd_c4_2 bnd_a1338 bnd_a1339 |
% 17.81/17.35 bnd_c1_0) |
% 17.81/17.35 bnd_c3_0)) &
% 17.81/17.35 ((~ bnd_c2_0 | bnd_c3_0) |
% 17.81/17.35 (ALL X163.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 ((ALL X164.
% 17.81/17.35 bnd_ndr1_1 X163 -->
% 17.81/17.35 (~ bnd_c1_2 X163 X164 |
% 17.81/17.35 ~ bnd_c2_2 X163 X164) |
% 17.81/17.35 ~ bnd_c7_2 X163 X164) |
% 17.81/17.35 ((bnd_ndr1_1 X163 & ~ bnd_c2_2 X163 bnd_a1340) &
% 17.81/17.35 bnd_c6_2 X163 bnd_a1340) &
% 17.81/17.35 ~ bnd_c9_2 X163 bnd_a1340) |
% 17.81/17.35 bnd_c6_1 X163))) &
% 17.81/17.35 (bnd_c8_0 | ~ bnd_c3_0)) &
% 17.81/17.35 (bnd_c3_0 |
% 17.81/17.35 (ALL X165.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (~ bnd_c5_1 X165 | bnd_c4_1 X165) |
% 17.81/17.35 ~ bnd_c1_1 X165))) &
% 17.81/17.35 ((~ bnd_c8_0 | ~ bnd_c7_0) | ~ bnd_c3_0)) &
% 17.81/17.35 ((bnd_c1_0 |
% 17.81/17.35 (ALL X166.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 ((ALL X167.
% 17.81/17.35 bnd_ndr1_1 X166 -->
% 17.81/17.35 (bnd_c9_2 X166 X167 | bnd_c5_2 X166 X167) |
% 17.81/17.35 ~ bnd_c3_2 X166 X167) |
% 17.81/17.35 ~ bnd_c10_1 X166) |
% 17.81/17.35 bnd_c9_1 X166)) |
% 17.81/17.35 ~ bnd_c2_0)) &
% 17.81/17.35 (((((bnd_ndr1_0 & bnd_c2_1 bnd_a1341) &
% 17.81/17.35 bnd_ndr1_1 bnd_a1341) &
% 17.81/17.35 bnd_c7_2 bnd_a1341 bnd_a1342) &
% 17.81/17.35 ~ bnd_c3_2 bnd_a1341 bnd_a1342 |
% 17.81/17.35 ((bnd_ndr1_0 & bnd_c3_1 bnd_a1343) &
% 17.81/17.35 ~ bnd_c1_1 bnd_a1343) &
% 17.81/17.35 (ALL X168.
% 17.81/17.35 bnd_ndr1_1 bnd_a1343 -->
% 17.81/17.35 (bnd_c3_2 bnd_a1343 X168 |
% 17.81/17.35 ~ bnd_c5_2 bnd_a1343 X168) |
% 17.81/17.35 ~ bnd_c2_2 bnd_a1343 X168)) |
% 17.81/17.35 (ALL X169.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (((bnd_ndr1_1 X169 & bnd_c1_2 X169 bnd_a1344) &
% 17.81/17.35 bnd_c9_2 X169 bnd_a1344) &
% 17.81/17.35 bnd_c4_2 X169 bnd_a1344 |
% 17.81/17.35 (bnd_ndr1_1 X169 & bnd_c5_2 X169 bnd_a1345) &
% 17.81/17.35 ~ bnd_c4_2 X169 bnd_a1345) |
% 17.81/17.35 bnd_c3_1 X169))) &
% 17.81/17.35 (~ bnd_c1_0 |
% 17.81/17.35 (((((bnd_ndr1_0 &
% 17.81/17.35 (ALL X170.
% 17.81/17.35 bnd_ndr1_1 bnd_a1346 -->
% 17.81/17.35 (~ bnd_c6_2 bnd_a1346 X170 |
% 17.81/17.35 ~ bnd_c10_2 bnd_a1346 X170) |
% 17.81/17.35 bnd_c8_2 bnd_a1346 X170)) &
% 17.81/17.35 (ALL X171.
% 17.81/17.35 bnd_ndr1_1 bnd_a1346 -->
% 17.81/17.35 (~ bnd_c10_2 bnd_a1346 X171 |
% 17.81/17.35 ~ bnd_c5_2 bnd_a1346 X171) |
% 17.81/17.35 bnd_c9_2 bnd_a1346 X171)) &
% 17.81/17.35 bnd_ndr1_1 bnd_a1346) &
% 17.81/17.35 bnd_c6_2 bnd_a1346 bnd_a1347) &
% 17.81/17.35 ~ bnd_c4_2 bnd_a1346 bnd_a1347) &
% 17.81/17.35 ~ bnd_c2_2 bnd_a1346 bnd_a1347)) &
% 17.81/17.35 (((ALL X172.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 ((ALL X173.
% 17.81/17.35 bnd_ndr1_1 X172 -->
% 17.81/17.35 (~ bnd_c1_2 X172 X173 | bnd_c4_2 X172 X173) |
% 17.81/17.35 bnd_c3_2 X172 X173) |
% 17.81/17.35 bnd_c5_1 X172) |
% 17.81/17.35 ((bnd_ndr1_1 X172 & bnd_c4_2 X172 bnd_a1348) &
% 17.81/17.35 bnd_c5_2 X172 bnd_a1348) &
% 17.81/17.35 ~ bnd_c8_2 X172 bnd_a1348) |
% 17.81/17.35 ((bnd_ndr1_0 &
% 17.81/17.35 (ALL X174.
% 17.81/17.35 bnd_ndr1_1 bnd_a1349 -->
% 17.81/17.35 (~ bnd_c7_2 bnd_a1349 X174 |
% 17.81/17.35 ~ bnd_c3_2 bnd_a1349 X174) |
% 17.81/17.35 ~ bnd_c5_2 bnd_a1349 X174)) &
% 17.81/17.35 bnd_c6_1 bnd_a1349) &
% 17.81/17.35 bnd_c3_1 bnd_a1349) |
% 17.81/17.35 (bnd_ndr1_0 & ~ bnd_c10_1 bnd_a1350) &
% 17.81/17.35 (ALL X175.
% 17.81/17.35 bnd_ndr1_1 bnd_a1350 -->
% 17.81/17.35 (bnd_c1_2 bnd_a1350 X175 | bnd_c7_2 bnd_a1350 X175) |
% 17.81/17.35 bnd_c6_2 bnd_a1350 X175))) &
% 17.81/17.35 (ALL X176.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (((bnd_ndr1_1 X176 & bnd_c10_2 X176 bnd_a1351) &
% 17.81/17.35 bnd_c8_2 X176 bnd_a1351) &
% 17.81/17.35 bnd_c3_2 X176 bnd_a1351 |
% 17.81/17.35 bnd_c2_1 X176) |
% 17.81/17.35 ((bnd_ndr1_1 X176 & ~ bnd_c8_2 X176 bnd_a1352) &
% 17.81/17.35 bnd_c10_2 X176 bnd_a1352) &
% 17.81/17.35 ~ bnd_c2_2 X176 bnd_a1352)) &
% 17.81/17.35 (((bnd_ndr1_0 &
% 17.81/17.35 (ALL X177.
% 17.81/17.35 bnd_ndr1_1 bnd_a1353 -->
% 17.81/17.35 (bnd_c5_2 bnd_a1353 X177 | bnd_c3_2 bnd_a1353 X177) |
% 17.81/17.35 bnd_c2_2 bnd_a1353 X177)) &
% 17.81/17.35 ~ bnd_c5_1 bnd_a1353) &
% 17.81/17.35 ~ bnd_c3_1 bnd_a1353 |
% 17.81/17.35 (bnd_ndr1_0 & bnd_c4_1 bnd_a1354) & ~ bnd_c7_1 bnd_a1354)) &
% 17.81/17.35 ((bnd_c8_0 |
% 17.81/17.35 (ALL X178.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (bnd_c8_1 X178 |
% 17.81/17.35 ((bnd_ndr1_1 X178 & bnd_c9_2 X178 bnd_a1355) &
% 17.81/17.35 bnd_c6_2 X178 bnd_a1355) &
% 17.81/17.35 ~ bnd_c4_2 X178 bnd_a1355) |
% 17.81/17.35 ((bnd_ndr1_1 X178 & ~ bnd_c5_2 X178 bnd_a1356) &
% 17.81/17.35 ~ bnd_c4_2 X178 bnd_a1356) &
% 17.81/17.35 bnd_c1_2 X178 bnd_a1356)) |
% 17.81/17.35 (((((bnd_ndr1_0 &
% 17.81/17.35 (ALL X179.
% 17.81/17.35 bnd_ndr1_1 bnd_a1357 -->
% 17.81/17.35 (~ bnd_c10_2 bnd_a1357 X179 |
% 17.81/17.35 bnd_c1_2 bnd_a1357 X179) |
% 17.81/17.35 ~ bnd_c9_2 bnd_a1357 X179)) &
% 17.81/17.35 bnd_ndr1_1 bnd_a1357) &
% 17.81/17.35 bnd_c6_2 bnd_a1357 bnd_a1358) &
% 17.81/17.35 bnd_c9_2 bnd_a1357 bnd_a1358) &
% 17.81/17.35 bnd_c1_2 bnd_a1357 bnd_a1358) &
% 17.81/17.35 ~ bnd_c6_1 bnd_a1357)) &
% 17.81/17.35 (((ALL X180.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (((bnd_ndr1_1 X180 & ~ bnd_c4_2 X180 bnd_a1359) &
% 17.81/17.35 bnd_c1_2 X180 bnd_a1359) &
% 17.81/17.35 bnd_c7_2 X180 bnd_a1359 |
% 17.81/17.35 ((bnd_ndr1_1 X180 & bnd_c6_2 X180 bnd_a1360) &
% 17.81/17.35 bnd_c9_2 X180 bnd_a1360) &
% 17.81/17.35 ~ bnd_c10_2 X180 bnd_a1360) |
% 17.81/17.35 bnd_c8_1 X180) |
% 17.81/17.35 ((bnd_ndr1_0 &
% 17.81/17.35 (ALL X181.
% 17.81/17.35 bnd_ndr1_1 bnd_a1361 -->
% 17.81/17.35 (~ bnd_c5_2 bnd_a1361 X181 | bnd_c9_2 bnd_a1361 X181) |
% 17.81/17.35 ~ bnd_c7_2 bnd_a1361 X181)) &
% 17.81/17.35 bnd_c8_1 bnd_a1361) &
% 17.81/17.35 ~ bnd_c2_1 bnd_a1361) |
% 17.81/17.35 ~ bnd_c10_0)) &
% 17.81/17.35 (((ALL X182.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (~ bnd_c8_1 X182 |
% 17.81/17.35 ((bnd_ndr1_1 X182 & bnd_c4_2 X182 bnd_a1362) &
% 17.81/17.35 ~ bnd_c3_2 X182 bnd_a1362) &
% 17.81/17.35 bnd_c10_2 X182 bnd_a1362) |
% 17.81/17.35 (ALL X183.
% 17.81/17.35 bnd_ndr1_1 X182 -->
% 17.81/17.35 (bnd_c9_2 X182 X183 | bnd_c5_2 X182 X183) |
% 17.81/17.35 ~ bnd_c4_2 X182 X183)) |
% 17.81/17.35 bnd_c10_0) |
% 17.81/17.35 ~ bnd_c8_0)) &
% 17.81/17.35 ((bnd_c2_0 | bnd_c10_0) | ~ bnd_c6_0)) &
% 17.81/17.35 (~ bnd_c7_0 |
% 17.81/17.35 (ALL X184.
% 17.81/17.35 bnd_ndr1_0 -->
% 17.81/17.35 (~ bnd_c8_1 X184 | bnd_c4_1 X184) |
% 17.81/17.35 (ALL X185.
% 17.81/17.35 bnd_ndr1_1 X184 -->
% 17.81/17.35 (~ bnd_c3_2 X184 X185 | bnd_c6_2 X184 X185) |
% 17.81/17.35 bnd_c5_2 X184 X185)))) &
% 17.81/17.35 ~ bnd_c7_0) &
% 17.81/17.35 (~ bnd_c6_0 | bnd_c1_0)) &
% 17.81/17.35 (bnd_c1_0 | bnd_c2_0)) &
% 17.81/17.35 ((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a1363) &
% 17.81/17.35 ~ bnd_c7_2 bnd_a1363 bnd_a1364) &
% 17.81/17.35 ~ bnd_c1_2 bnd_a1363 bnd_a1364) &
% 17.81/17.35 bnd_c2_2 bnd_a1363 bnd_a1364) &
% 17.81/17.35 ~ bnd_c6_1 bnd_a1363) &
% 17.81/17.35 (ALL X186.
% 17.81/17.35 bnd_ndr1_1 bnd_a1363 -->
% 17.81/17.35 (~ bnd_c10_2 bnd_a1363 X186 | bnd_c1_2 bnd_a1363 X186) |
% 17.81/17.35 bnd_c3_2 bnd_a1363 X186) |
% 17.81/17.35 bnd_c10_0))
% 17.81/17.35 Adding axioms...
% 17.81/17.36 Typedef.type_definition_def
% 50.56/50.07 ...done.
% 50.66/50.11 Ground types: ?'b, TPTP_Interpret.ind
% 50.66/50.11 Translating term (sizes: 1, 1) ...
% 77.31/76.77 Invoking SAT solver...
% 77.31/76.77 No model exists.
% 77.31/76.77 Translating term (sizes: 2, 1) ...
% 104.78/104.15 Invoking SAT solver...
% 104.78/104.15 No model exists.
% 104.78/104.15 Translating term (sizes: 1, 2) ...
% 154.14/153.33 Invoking SAT solver...
% 156.76/155.93 Model found:
% 156.76/155.93 Size of types: ?'b: 1, TPTP_Interpret.ind: 2
% 156.76/155.93 bnd_a1364: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1363: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1362: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1361: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1360: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1359: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1358: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1357: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1356: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1355: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1354: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1353: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1352: ??.TPTP_Interpret.ind1
% 156.76/155.93 bnd_a1351: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1350: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1349: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1348: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1347: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1346: ??.TPTP_Interpret.ind1
% 156.76/155.93 bnd_a1345: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1344: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1343: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1342: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1341: ??.TPTP_Interpret.ind1
% 156.76/155.93 bnd_a1340: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1339: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1338: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1337: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1336: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1335: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1334: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1333: ??.TPTP_Interpret.ind1
% 156.76/155.93 bnd_a1332: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1331: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1330: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1329: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1328: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1327: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1326: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1325: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1324: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1323: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1322: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1321: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1320: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1319: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1318: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1317: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1316: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1315: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1314: ??.TPTP_Interpret.ind1
% 156.76/155.93 bnd_a1313: ??.TPTP_Interpret.ind1
% 156.76/155.93 bnd_a1312: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1311: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1310: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1309: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1308: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1307: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1306: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1305: ??.TPTP_Interpret.ind1
% 156.76/155.93 bnd_a1304: ??.TPTP_Interpret.ind1
% 156.76/155.93 bnd_a1303: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1302: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1301: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1300: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1299: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1298: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1297: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1296: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1295: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1294: ??.TPTP_Interpret.ind1
% 156.76/155.93 bnd_a1293: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1292: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1291: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1290: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1289: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1288: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1287: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1286: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1285: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1284: ??.TPTP_Interpret.ind1
% 156.76/155.93 bnd_a1283: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1282: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1281: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1280: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1279: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1278: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1277: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1276: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1275: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1274: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1273: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1272: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1271: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1270: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1269: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1268: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1267: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1266: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1265: ??.TPTP_Interpret.ind1
% 156.76/155.93 bnd_a1264: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1263: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1262: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1261: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1260: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1259: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1258: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1257: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1256: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1255: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1254: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1253: ??.TPTP_Interpret.ind1
% 156.76/155.93 bnd_a1252: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1251: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1250: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1249: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1248: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1247: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1246: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1245: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1244: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1243: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1242: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1241: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1240: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1239: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1238: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1237: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1236: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1235: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1234: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1233: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1232: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1231: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1230: ??.TPTP_Interpret.ind1
% 156.76/155.93 bnd_a1229: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1228: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1227: ??.TPTP_Interpret.ind1
% 156.76/155.93 bnd_a1226: ??.TPTP_Interpret.ind1
% 156.76/155.93 bnd_a1225: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1224: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1223: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1222: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1221: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1220: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1219: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1218: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1217: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1216: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1215: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1214: ??.TPTP_Interpret.ind1
% 156.76/155.93 bnd_a1213: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1212: ??.TPTP_Interpret.ind1
% 156.76/155.93 bnd_a1211: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1210: ??.TPTP_Interpret.ind1
% 156.76/155.93 bnd_a1209: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1208: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1207: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1206: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_c9_0: True
% 156.76/155.93 bnd_a1205: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1204: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1203: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1202: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1201: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1200: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_c8_0: False
% 156.76/155.93 bnd_a1199: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_c6_0: False
% 156.76/155.93 bnd_c3_1: {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, True)}
% 156.76/155.93 bnd_c10_0: True
% 156.76/155.93 bnd_a1198: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_c3_0: False
% 156.76/155.93 bnd_c4_0: True
% 156.76/155.93 bnd_a1197: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1196: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_c5_0: False
% 156.76/155.93 bnd_c1_0: True
% 156.76/155.93 bnd_c10_1: {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, True)}
% 156.76/155.93 bnd_c6_1: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}
% 156.76/155.93 bnd_c9_1: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)}
% 156.76/155.93 bnd_c8_1: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}
% 156.76/155.93 bnd_a1195: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_c9_2: {(??.TPTP_Interpret.ind0,
% 156.76/155.93 {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)}),
% 156.76/155.93 (??.TPTP_Interpret.ind1,
% 156.76/155.93 {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)})}
% 156.76/155.93 bnd_a1194: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_a1193: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_c10_2: {(??.TPTP_Interpret.ind0,
% 156.76/155.93 {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, True)}),
% 156.76/155.93 (??.TPTP_Interpret.ind1,
% 156.76/155.93 {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, True)})}
% 156.76/155.93 bnd_a1192: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_c7_2: {(??.TPTP_Interpret.ind0,
% 156.76/155.93 {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}),
% 156.76/155.93 (??.TPTP_Interpret.ind1,
% 156.76/155.93 {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)})}
% 156.76/155.93 bnd_c2_1: {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, True)}
% 156.76/155.93 bnd_c1_2: {(??.TPTP_Interpret.ind0,
% 156.76/155.93 {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}),
% 156.76/155.93 (??.TPTP_Interpret.ind1,
% 156.76/155.93 {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)})}
% 156.76/155.93 bnd_c3_2: {(??.TPTP_Interpret.ind0,
% 156.76/155.93 {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)}),
% 156.76/155.93 (??.TPTP_Interpret.ind1,
% 156.76/155.93 {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, True)})}
% 156.76/155.93 bnd_a1191: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_c5_2: {(??.TPTP_Interpret.ind0,
% 156.76/155.93 {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}),
% 156.76/155.93 (??.TPTP_Interpret.ind1,
% 156.76/155.93 {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)})}
% 156.76/155.93 bnd_c6_2: {(??.TPTP_Interpret.ind0,
% 156.76/155.93 {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)}),
% 156.76/155.93 (??.TPTP_Interpret.ind1,
% 156.76/155.93 {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)})}
% 156.76/155.93 bnd_c4_1: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}
% 156.76/155.93 bnd_a1190: ??.TPTP_Interpret.ind0
% 156.76/155.93 bnd_c1_1: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}
% 156.76/155.93 bnd_c2_0: False
% 156.76/155.93 bnd_c8_2: {(??.TPTP_Interpret.ind0,
% 156.76/155.93 {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)}),
% 156.76/155.93 (??.TPTP_Interpret.ind1,
% 156.76/155.93 {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)})}
% 156.76/155.93 bnd_c2_2: {(??.TPTP_Interpret.ind0,
% 156.76/155.93 {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)}),
% 156.76/155.93 (??.TPTP_Interpret.ind1,
% 156.76/155.93 {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, True)})}
% 156.76/155.93 bnd_c4_2: {(??.TPTP_Interpret.ind0,
% 156.76/155.93 {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}),
% 156.76/155.93 (??.TPTP_Interpret.ind1,
% 156.76/155.93 {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, True)})}
% 156.76/155.93 bnd_ndr1_1: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}
% 156.76/155.93 bnd_c7_1: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}
% 156.76/155.93 bnd_c5_1: {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)}
% 156.76/155.93 bnd_ndr1_0: True
% 156.76/155.93 bnd_c7_0: False
% 156.76/155.93
% 156.76/155.93 % SZS status CounterSatisfiable
%------------------------------------------------------------------------------