TSTP Solution File: SYN419+1 by Refute---2015
View Problem
- Process Solution
%------------------------------------------------------------------------------
% File : Refute---2015
% Problem : SYN419+1 : TPTP v6.4.0. Released v2.1.0.
% Transfm : none
% Format : tptp:raw
% Command : isabelle tptp_refute %d %s
% Computer : n090.star.cs.uiowa.edu
% Model : x86_64 x86_64
% CPU : Intel(R) Xeon(R) CPU E5-2609 0 2.40GHz
% Memory : 32218.75MB
% OS : Linux 3.10.0-327.10.1.el7.x86_64
% CPULimit : 300s
% DateTime : Thu Apr 14 06:41:41 EDT 2016
% Result : CounterSatisfiable 56.79s
% Output : Assurance 0s
% Verified :
% SZS Type : None (Parsing solution fails)
% Syntax : Number of formulae : 0
% Comments :
%------------------------------------------------------------------------------
%----No solution output by system
%------------------------------------------------------------------------------
%----ORIGINAL SYSTEM OUTPUT
% 0.00/0.03 % Problem : SYN419+1 : TPTP v6.4.0. Released v2.1.0.
% 0.00/0.04 % Command : isabelle tptp_refute %d %s
% 0.03/0.23 % Computer : n090.star.cs.uiowa.edu
% 0.03/0.23 % Model : x86_64 x86_64
% 0.03/0.23 % CPU : Intel(R) Xeon(R) CPU E5-2609 0 @ 2.40GHz
% 0.03/0.23 % Memory : 32218.75MB
% 0.03/0.23 % OS : Linux 3.10.0-327.10.1.el7.x86_64
% 0.03/0.23 % CPULimit : 300
% 0.03/0.23 % DateTime : Fri Apr 8 23:48:54 CDT 2016
% 0.03/0.23 % CPUTime:
% 6.30/5.82 > val it = (): unit
% 7.02/6.51 Trying to find a model that refutes: ~ ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((bnd_c7_0 |
% 7.02/6.51 bnd_c3_0) |
% 7.02/6.51 (ALL U.
% 7.02/6.51 bnd_ndr1_0 --> (~ bnd_c9_1 U | ~ bnd_c1_1 U) | bnd_c8_1 U)) &
% 7.02/6.51 (((bnd_ndr1_0 & bnd_c7_1 bnd_a147) & ~ bnd_c9_1 bnd_a147 |
% 7.02/6.51 ~ bnd_c1_0) |
% 7.02/6.51 (ALL V.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 ((bnd_ndr1_1 V & ~ bnd_c5_2 V bnd_a148) &
% 7.02/6.51 bnd_c7_2 V bnd_a148) &
% 7.02/6.51 bnd_c3_2 V bnd_a148 |
% 7.02/6.51 ~ bnd_c4_1 V))) &
% 7.02/6.51 ((((((((((bnd_ndr1_0 &
% 7.02/6.51 (ALL W.
% 7.02/6.51 bnd_ndr1_1 bnd_a149 -->
% 7.02/6.51 (bnd_c1_2 bnd_a149 W | ~ bnd_c4_2 bnd_a149 W) |
% 7.02/6.51 ~ bnd_c7_2 bnd_a149 W)) &
% 7.02/6.51 bnd_ndr1_1 bnd_a149) &
% 7.02/6.51 ~ bnd_c9_2 bnd_a149 bnd_a150) &
% 7.02/6.51 bnd_c7_2 bnd_a149 bnd_a150) &
% 7.02/6.51 ~ bnd_c5_2 bnd_a149 bnd_a150) &
% 7.02/6.51 bnd_ndr1_1 bnd_a149) &
% 7.02/6.51 ~ bnd_c4_2 bnd_a149 bnd_a151) &
% 7.02/6.51 ~ bnd_c1_2 bnd_a149 bnd_a151) &
% 7.02/6.51 ~ bnd_c10_2 bnd_a149 bnd_a151 |
% 7.02/6.51 ~ bnd_c4_0) |
% 7.02/6.51 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a152) &
% 7.02/6.51 bnd_c7_2 bnd_a152 bnd_a153) &
% 7.02/6.51 ~ bnd_c10_2 bnd_a152 bnd_a153) &
% 7.02/6.51 bnd_c9_2 bnd_a152 bnd_a153) &
% 7.02/6.51 (ALL X.
% 7.02/6.51 bnd_ndr1_1 bnd_a152 -->
% 7.02/6.51 (~ bnd_c4_2 bnd_a152 X | ~ bnd_c2_2 bnd_a152 X) |
% 7.02/6.51 ~ bnd_c10_2 bnd_a152 X)) &
% 7.02/6.51 ~ bnd_c8_1 bnd_a152)) &
% 7.02/6.51 (((ALL Y.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 (bnd_c5_1 Y | bnd_c8_1 Y) |
% 7.02/6.51 ((bnd_ndr1_1 Y & ~ bnd_c10_2 Y bnd_a154) &
% 7.02/6.51 bnd_c6_2 Y bnd_a154) &
% 7.02/6.51 ~ bnd_c3_2 Y bnd_a154) |
% 7.02/6.51 bnd_c3_0) |
% 7.02/6.51 ~ bnd_c1_0)) &
% 7.02/6.51 (((ALL Z.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 (((bnd_ndr1_1 Z & ~ bnd_c1_2 Z bnd_a155) &
% 7.02/6.51 bnd_c10_2 Z bnd_a155) &
% 7.02/6.51 ~ bnd_c4_2 Z bnd_a155 |
% 7.02/6.51 bnd_c8_1 Z) |
% 7.02/6.51 (bnd_ndr1_1 Z & bnd_c3_2 Z bnd_a156) & bnd_c6_2 Z bnd_a156) |
% 7.02/6.51 bnd_c7_0) |
% 7.02/6.51 ~ bnd_c1_0)) &
% 7.02/6.51 ((bnd_c8_0 | bnd_c9_0) | ~ bnd_c6_0)) &
% 7.02/6.51 ((~ bnd_c4_0 | ~ bnd_c5_0) | bnd_c3_0)) &
% 7.02/6.51 (~ bnd_c7_0 |
% 7.02/6.51 (bnd_ndr1_0 & bnd_c2_1 bnd_a157) &
% 7.02/6.51 (ALL X1.
% 7.02/6.51 bnd_ndr1_1 bnd_a157 -->
% 7.02/6.51 (bnd_c3_2 bnd_a157 X1 | ~ bnd_c9_2 bnd_a157 X1) |
% 7.02/6.51 ~ bnd_c8_2 bnd_a157 X1))) &
% 7.02/6.51 ((~ bnd_c2_0 |
% 7.02/6.51 (ALL X2.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 (~ bnd_c7_1 X2 | bnd_c10_1 X2) |
% 7.02/6.51 (ALL X3.
% 7.02/6.51 bnd_ndr1_1 X2 -->
% 7.02/6.51 (~ bnd_c6_2 X2 X3 | bnd_c1_2 X2 X3) | ~ bnd_c4_2 X2 X3))) |
% 7.02/6.51 ~ bnd_c4_0)) &
% 7.02/6.51 ((ALL X4.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 (bnd_c3_1 X4 |
% 7.02/6.51 (ALL X5.
% 7.02/6.51 bnd_ndr1_1 X4 -->
% 7.02/6.51 (bnd_c9_2 X4 X5 | bnd_c10_2 X4 X5) | ~ bnd_c3_2 X4 X5)) |
% 7.02/6.51 ((bnd_ndr1_1 X4 & bnd_c9_2 X4 bnd_a158) & ~ bnd_c6_2 X4 bnd_a158) &
% 7.02/6.51 bnd_c5_2 X4 bnd_a158) |
% 7.02/6.51 (ALL X6.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 ((ALL X7.
% 7.02/6.51 bnd_ndr1_1 X6 -->
% 7.02/6.51 (bnd_c8_2 X6 X7 | bnd_c4_2 X6 X7) | bnd_c6_2 X6 X7) |
% 7.02/6.51 bnd_c3_1 X6) |
% 7.02/6.51 (ALL X8.
% 7.02/6.51 bnd_ndr1_1 X6 -->
% 7.02/6.51 (~ bnd_c2_2 X6 X8 | ~ bnd_c4_2 X6 X8) | ~ bnd_c6_2 X6 X8)))) &
% 7.02/6.51 (((ALL X9.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 (bnd_c2_1 X9 |
% 7.02/6.51 ((bnd_ndr1_1 X9 & ~ bnd_c8_2 X9 bnd_a159) &
% 7.02/6.51 ~ bnd_c5_2 X9 bnd_a159) &
% 7.02/6.51 bnd_c7_2 X9 bnd_a159) |
% 7.02/6.51 (ALL X10. bnd_ndr1_1 X9 --> bnd_c5_2 X9 X10 | bnd_c10_2 X9 X10)) |
% 7.02/6.51 ((bnd_ndr1_0 & ~ bnd_c7_1 bnd_a160) & bnd_c10_1 bnd_a160) &
% 7.02/6.51 (ALL X11.
% 7.02/6.51 bnd_ndr1_1 bnd_a160 -->
% 7.02/6.51 (~ bnd_c4_2 bnd_a160 X11 | bnd_c2_2 bnd_a160 X11) |
% 7.02/6.51 bnd_c6_2 bnd_a160 X11)) |
% 7.02/6.51 ~ bnd_c4_0)) &
% 7.02/6.51 ((bnd_c3_0 | bnd_c9_0) |
% 7.02/6.51 (ALL X12.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 (((bnd_ndr1_1 X12 & ~ bnd_c10_2 X12 bnd_a161) &
% 7.02/6.51 ~ bnd_c3_2 X12 bnd_a161) &
% 7.02/6.51 ~ bnd_c4_2 X12 bnd_a161 |
% 7.02/6.51 ~ bnd_c7_1 X12) |
% 7.02/6.51 (ALL X13.
% 7.02/6.51 bnd_ndr1_1 X12 -->
% 7.02/6.51 (~ bnd_c7_2 X12 X13 | ~ bnd_c9_2 X12 X13) |
% 7.02/6.51 ~ bnd_c2_2 X12 X13)))) &
% 7.02/6.51 (bnd_c8_0 |
% 7.02/6.51 ((bnd_ndr1_0 & bnd_c7_1 bnd_a162) & ~ bnd_c2_1 bnd_a162) &
% 7.02/6.51 (ALL X14.
% 7.02/6.51 bnd_ndr1_1 bnd_a162 -->
% 7.02/6.51 (~ bnd_c1_2 bnd_a162 X14 | ~ bnd_c3_2 bnd_a162 X14) |
% 7.02/6.51 bnd_c2_2 bnd_a162 X14))) &
% 7.02/6.51 ((~ bnd_c9_0 | ~ bnd_c1_0) |
% 7.02/6.51 (((((bnd_ndr1_0 &
% 7.02/6.51 bnd_ndr1_1 bnd_a163) &
% 7.02/6.51 ~ bnd_c5_2 bnd_a163 bnd_a164) &
% 7.02/6.51 bnd_c9_2 bnd_a163 bnd_a164) &
% 7.02/6.51 bnd_c10_2 bnd_a163 bnd_a164) &
% 7.02/6.51 bnd_c1_1 bnd_a163) &
% 7.02/6.51 (ALL X15.
% 7.02/6.51 bnd_ndr1_1 bnd_a163 -->
% 7.02/6.51 (~ bnd_c4_2 bnd_a163 X15 | bnd_c2_2 bnd_a163 X15) |
% 7.02/6.51 ~ bnd_c6_2 bnd_a163 X15))) &
% 7.02/6.51 ((bnd_c9_0 | ~ bnd_c2_0) |
% 7.02/6.51 (((((bnd_ndr1_0 &
% 7.02/6.51 (ALL X16.
% 7.02/6.51 bnd_ndr1_1 bnd_a165 -->
% 7.02/6.51 (bnd_c8_2 bnd_a165 X16 | ~ bnd_c10_2 bnd_a165 X16) |
% 7.02/6.51 ~ bnd_c4_2 bnd_a165 X16)) &
% 7.02/6.51 (ALL X17.
% 7.02/6.51 bnd_ndr1_1 bnd_a165 -->
% 7.02/6.51 (bnd_c3_2 bnd_a165 X17 | ~ bnd_c2_2 bnd_a165 X17) |
% 7.02/6.51 bnd_c5_2 bnd_a165 X17)) &
% 7.02/6.51 bnd_ndr1_1 bnd_a165) &
% 7.02/6.51 ~ bnd_c2_2 bnd_a165 bnd_a166) &
% 7.02/6.51 bnd_c5_2 bnd_a165 bnd_a166) &
% 7.02/6.51 bnd_c3_2 bnd_a165 bnd_a166)) &
% 7.02/6.51 ((((bnd_ndr1_0 & bnd_c2_1 bnd_a167) &
% 7.02/6.51 (ALL X18.
% 7.02/6.51 bnd_ndr1_1 bnd_a167 -->
% 7.02/6.51 (~ bnd_c9_2 bnd_a167 X18 | bnd_c1_2 bnd_a167 X18) |
% 7.02/6.51 bnd_c10_2 bnd_a167 X18)) &
% 7.02/6.51 bnd_c7_1 bnd_a167 |
% 7.02/6.51 bnd_c6_0) |
% 7.02/6.51 bnd_c10_0)) &
% 7.02/6.51 ((bnd_c6_0 |
% 7.02/6.51 ((bnd_ndr1_0 & ~ bnd_c9_1 bnd_a168) &
% 7.02/6.51 bnd_c1_1 bnd_a168) &
% 7.02/6.51 bnd_c8_1 bnd_a168) |
% 7.02/6.51 ~ bnd_c1_0)) &
% 7.02/6.51 ((bnd_c3_0 |
% 7.02/6.51 (ALL X19.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 (~ bnd_c7_1 X19 |
% 7.02/6.51 (ALL X20. bnd_ndr1_1 X19 --> bnd_c8_2 X19 X20 | ~ bnd_c7_2 X19 X20)) |
% 7.02/6.51 (ALL X21. bnd_ndr1_1 X19 --> bnd_c7_2 X19 X21 | bnd_c8_2 X19 X21))) |
% 7.02/6.51 (ALL X22.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 ((ALL X23.
% 7.02/6.51 bnd_ndr1_1 X22 -->
% 7.02/6.51 (bnd_c9_2 X22 X23 | bnd_c7_2 X22 X23) | ~ bnd_c6_2 X22 X23) |
% 7.02/6.51 bnd_c9_1 X22) |
% 7.02/6.51 ~ bnd_c5_1 X22))) &
% 7.02/6.51 ((~ bnd_c9_0 | bnd_c8_0) | ~ bnd_c1_0)) &
% 7.02/6.51 ((((bnd_ndr1_0 &
% 7.02/6.51 (ALL X24.
% 7.02/6.51 bnd_ndr1_1 bnd_a169 -->
% 7.02/6.51 ~ bnd_c6_2 bnd_a169 X24 | ~ bnd_c10_2 bnd_a169 X24)) &
% 7.02/6.51 bnd_c2_1 bnd_a169) &
% 7.02/6.51 (ALL X25.
% 7.02/6.51 bnd_ndr1_1 bnd_a169 -->
% 7.02/6.51 (~ bnd_c1_2 bnd_a169 X25 |
% 7.02/6.51 ~ bnd_c9_2 bnd_a169 X25) |
% 7.02/6.51 ~ bnd_c8_2 bnd_a169 X25) |
% 7.02/6.51 ((bnd_ndr1_0 & ~ bnd_c8_1 bnd_a170) &
% 7.02/6.51 (ALL X26.
% 7.02/6.51 bnd_ndr1_1 bnd_a170 -->
% 7.02/6.51 (bnd_c3_2 bnd_a170 X26 |
% 7.02/6.51 ~ bnd_c9_2 bnd_a170 X26) |
% 7.02/6.51 ~ bnd_c10_2 bnd_a170 X26)) &
% 7.02/6.51 bnd_c6_1 bnd_a170) |
% 7.02/6.51 (ALL X27.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 ((ALL X28.
% 7.02/6.51 bnd_ndr1_1 X27 --> bnd_c3_2 X27 X28) |
% 7.02/6.51 ~ bnd_c2_1 X27) |
% 7.02/6.51 (ALL X29.
% 7.02/6.51 bnd_ndr1_1 X27 -->
% 7.02/6.51 (bnd_c9_2 X27 X29 | bnd_c5_2 X27 X29) | bnd_c6_2 X27 X29)))) &
% 7.02/6.51 (((bnd_ndr1_0 &
% 7.02/6.51 (ALL X30.
% 7.02/6.51 bnd_ndr1_1 bnd_a171 -->
% 7.02/6.51 (bnd_c7_2 bnd_a171 X30 |
% 7.02/6.51 bnd_c3_2 bnd_a171 X30) |
% 7.02/6.51 ~ bnd_c10_2 bnd_a171 X30)) &
% 7.02/6.51 ~ bnd_c1_1 bnd_a171) &
% 7.02/6.51 ~ bnd_c8_1 bnd_a171 |
% 7.02/6.51 (bnd_ndr1_0 & ~ bnd_c5_1 bnd_a172) &
% 7.02/6.51 (ALL X31.
% 7.02/6.51 bnd_ndr1_1 bnd_a172 -->
% 7.02/6.51 (~ bnd_c4_2 bnd_a172 X31 |
% 7.02/6.51 bnd_c5_2 bnd_a172 X31) |
% 7.02/6.51 ~ bnd_c8_2 bnd_a172 X31))) &
% 7.02/6.51 ((((bnd_ndr1_0 & bnd_c7_1 bnd_a173) &
% 7.02/6.51 bnd_c6_1 bnd_a173) &
% 7.02/6.51 ~ bnd_c10_1 bnd_a173 |
% 7.02/6.51 ~ bnd_c8_0) |
% 7.02/6.51 ~ bnd_c5_0)) &
% 7.02/6.51 ((((bnd_ndr1_0 & bnd_c9_1 bnd_a174) &
% 7.02/6.51 (ALL X32.
% 7.02/6.51 bnd_ndr1_1 bnd_a174 -->
% 7.02/6.51 (bnd_c4_2 bnd_a174 X32 |
% 7.02/6.51 bnd_c6_2 bnd_a174 X32) |
% 7.02/6.51 ~ bnd_c8_2 bnd_a174 X32)) &
% 7.02/6.51 ~ bnd_c1_1 bnd_a174 |
% 7.02/6.51 ~ bnd_c5_0) |
% 7.02/6.51 (((((bnd_ndr1_0 & bnd_c5_1 bnd_a175) &
% 7.02/6.51 bnd_ndr1_1 bnd_a175) &
% 7.02/6.51 bnd_c10_2 bnd_a175 bnd_a176) &
% 7.02/6.51 ~ bnd_c4_2 bnd_a175 bnd_a176) &
% 7.02/6.51 ~ bnd_c6_2 bnd_a175 bnd_a176) &
% 7.02/6.51 bnd_c1_1 bnd_a175)) &
% 7.02/6.51 ((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a177) &
% 7.02/6.51 ~ bnd_c3_2 bnd_a177 bnd_a178) &
% 7.02/6.51 ~ bnd_c9_2 bnd_a177 bnd_a178) &
% 7.02/6.51 ~ bnd_c7_2 bnd_a177 bnd_a178) &
% 7.02/6.51 (ALL X33.
% 7.02/6.51 bnd_ndr1_1 bnd_a177 -->
% 7.02/6.51 (~ bnd_c2_2 bnd_a177 X33 |
% 7.02/6.51 ~ bnd_c6_2 bnd_a177 X33) |
% 7.02/6.51 ~ bnd_c4_2 bnd_a177 X33)) &
% 7.02/6.51 bnd_c1_1 bnd_a177 |
% 7.02/6.51 bnd_c6_0)) &
% 7.02/6.51 ((ALL X34.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 (~ bnd_c9_1 X34 | bnd_c3_1 X34) |
% 7.02/6.51 ~ bnd_c2_1 X34) |
% 7.02/6.51 (ALL X35.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 (ALL X36.
% 7.02/6.51 bnd_ndr1_1 X35 -->
% 7.02/6.51 (~ bnd_c4_2 X35 X36 | bnd_c6_2 X35 X36) |
% 7.02/6.51 ~ bnd_c1_2 X35 X36) |
% 7.02/6.51 bnd_c2_1 X35))) &
% 7.02/6.51 (((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a179) &
% 7.02/6.51 ~ bnd_c8_2 bnd_a179 bnd_a180) &
% 7.02/6.51 bnd_c5_2 bnd_a179 bnd_a180) &
% 7.02/6.51 bnd_c10_2 bnd_a179 bnd_a180) &
% 7.02/6.51 bnd_ndr1_1 bnd_a179) &
% 7.02/6.51 bnd_c3_2 bnd_a179 bnd_a181) &
% 7.02/6.51 bnd_c5_2 bnd_a179 bnd_a181) &
% 7.02/6.51 ~ bnd_c9_1 bnd_a179 |
% 7.02/6.51 (ALL X37.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 ((bnd_ndr1_1 X37 & ~ bnd_c9_2 X37 bnd_a182) &
% 7.02/6.51 ~ bnd_c2_2 X37 bnd_a182 |
% 7.02/6.51 (ALL X38.
% 7.02/6.51 bnd_ndr1_1 X37 -->
% 7.02/6.51 (bnd_c3_2 X37 X38 | bnd_c10_2 X37 X38) |
% 7.02/6.51 bnd_c7_2 X37 X38)) |
% 7.02/6.51 (ALL X39.
% 7.02/6.51 bnd_ndr1_1 X37 -->
% 7.02/6.51 bnd_c3_2 X37 X39 | ~ bnd_c6_2 X37 X39))) |
% 7.02/6.51 (ALL X40.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 (bnd_c4_1 X40 | ~ bnd_c7_1 X40) |
% 7.02/6.51 bnd_c8_1 X40))) &
% 7.02/6.51 (((ALL X41.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 (bnd_c5_1 X41 |
% 7.02/6.51 ((bnd_ndr1_1 X41 & ~ bnd_c2_2 X41 bnd_a183) &
% 7.02/6.51 ~ bnd_c6_2 X41 bnd_a183) &
% 7.02/6.51 ~ bnd_c1_2 X41 bnd_a183) |
% 7.02/6.51 bnd_c3_1 X41) |
% 7.02/6.51 ~ bnd_c7_0) |
% 7.02/6.51 (ALL X42.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 (((bnd_ndr1_1 X42 & bnd_c9_2 X42 bnd_a184) &
% 7.02/6.51 ~ bnd_c7_2 X42 bnd_a184) &
% 7.02/6.51 ~ bnd_c5_2 X42 bnd_a184 |
% 7.02/6.51 (ALL X43.
% 7.02/6.51 bnd_ndr1_1 X42 -->
% 7.02/6.51 (bnd_c9_2 X42 X43 | ~ bnd_c1_2 X42 X43) |
% 7.02/6.51 ~ bnd_c6_2 X42 X43)) |
% 7.02/6.51 ~ bnd_c4_1 X42))) &
% 7.02/6.51 (((ALL X44.
% 7.02/6.51 bnd_ndr1_0 --> bnd_c4_1 X44 | bnd_c5_1 X44) |
% 7.02/6.51 ~ bnd_c9_0) |
% 7.02/6.51 bnd_c5_0)) &
% 7.02/6.51 (((ALL X45.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 (~ bnd_c10_1 X45 |
% 7.02/6.51 (ALL X46.
% 7.02/6.51 bnd_ndr1_1 X45 -->
% 7.02/6.51 (bnd_c2_2 X45 X46 | ~ bnd_c4_2 X45 X46) |
% 7.02/6.51 ~ bnd_c10_2 X45 X46)) |
% 7.02/6.51 ~ bnd_c5_1 X45) |
% 7.02/6.51 bnd_c2_0) |
% 7.02/6.51 ~ bnd_c6_0)) &
% 7.02/6.51 ((((bnd_ndr1_0 & bnd_c5_1 bnd_a185) &
% 7.02/6.51 (ALL X47.
% 7.02/6.51 bnd_ndr1_1 bnd_a185 -->
% 7.02/6.51 (~ bnd_c10_2 bnd_a185 X47 |
% 7.02/6.51 ~ bnd_c8_2 bnd_a185 X47) |
% 7.02/6.51 ~ bnd_c9_2 bnd_a185 X47)) &
% 7.02/6.51 ~ bnd_c1_1 bnd_a185 |
% 7.02/6.51 bnd_c5_0) |
% 7.02/6.51 (ALL X48.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 (bnd_c6_1 X48 |
% 7.02/6.51 ((bnd_ndr1_1 X48 & bnd_c9_2 X48 bnd_a186) &
% 7.02/6.51 ~ bnd_c3_2 X48 bnd_a186) &
% 7.02/6.51 ~ bnd_c2_2 X48 bnd_a186) |
% 7.02/6.51 ~ bnd_c5_1 X48))) &
% 7.02/6.51 ((bnd_c3_0 | ~ bnd_c8_0) |
% 7.02/6.51 (ALL X49.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 (((bnd_ndr1_1 X49 & ~ bnd_c7_2 X49 bnd_a187) &
% 7.02/6.51 ~ bnd_c1_2 X49 bnd_a187) &
% 7.02/6.51 ~ bnd_c2_2 X49 bnd_a187 |
% 7.02/6.51 ~ bnd_c7_1 X49) |
% 7.02/6.51 ((bnd_ndr1_1 X49 & bnd_c1_2 X49 bnd_a188) &
% 7.02/6.51 bnd_c9_2 X49 bnd_a188) &
% 7.02/6.51 bnd_c3_2 X49 bnd_a188))) &
% 7.02/6.51 (((ALL X50.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 ((ALL X51.
% 7.02/6.51 bnd_ndr1_1 X50 -->
% 7.02/6.51 (bnd_c7_2 X50 X51 | ~ bnd_c9_2 X50 X51) |
% 7.02/6.51 ~ bnd_c10_2 X50 X51) |
% 7.02/6.51 (ALL X52.
% 7.02/6.51 bnd_ndr1_1 X50 -->
% 7.02/6.51 (~ bnd_c9_2 X50 X52 | bnd_c5_2 X50 X52) |
% 7.02/6.51 ~ bnd_c4_2 X50 X52)) |
% 7.02/6.51 ~ bnd_c8_1 X50) |
% 7.02/6.51 ~ bnd_c7_0) |
% 7.02/6.51 ~ bnd_c6_0)) &
% 7.02/6.51 (((ALL X53.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 (bnd_c8_1 X53 |
% 7.02/6.51 (ALL X54.
% 7.02/6.51 bnd_ndr1_1 X53 -->
% 7.02/6.51 ~ bnd_c10_2 X53 X54 | bnd_c6_2 X53 X54)) |
% 7.02/6.51 bnd_c6_1 X53) |
% 7.02/6.51 ((bnd_ndr1_0 & bnd_c1_1 bnd_a189) &
% 7.02/6.51 ~ bnd_c5_1 bnd_a189) &
% 7.02/6.51 ~ bnd_c3_1 bnd_a189) |
% 7.02/6.51 (ALL X55.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 (~ bnd_c10_1 X55 |
% 7.02/6.51 (ALL X56.
% 7.02/6.51 bnd_ndr1_1 X55 -->
% 7.02/6.51 ~ bnd_c8_2 X55 X56 | ~ bnd_c2_2 X55 X56)) |
% 7.02/6.51 ~ bnd_c3_1 X55))) &
% 7.02/6.51 ((bnd_c7_0 |
% 7.02/6.51 (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a190) &
% 7.02/6.51 bnd_c3_2 bnd_a190 bnd_a191) &
% 7.02/6.51 ~ bnd_c8_2 bnd_a190 bnd_a191) &
% 7.02/6.51 bnd_c7_2 bnd_a190 bnd_a191) &
% 7.02/6.51 bnd_ndr1_1 bnd_a190) &
% 7.02/6.51 ~ bnd_c10_2 bnd_a190 bnd_a192) &
% 7.02/6.51 ~ bnd_c8_2 bnd_a190 bnd_a192) &
% 7.02/6.51 bnd_c4_2 bnd_a190 bnd_a192) |
% 7.02/6.51 ~ bnd_c10_0)) &
% 7.02/6.51 ((~ bnd_c4_0 |
% 7.02/6.51 (ALL X57.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 (~ bnd_c9_1 X57 |
% 7.02/6.51 (ALL X58.
% 7.02/6.51 bnd_ndr1_1 X57 -->
% 7.02/6.51 bnd_c8_2 X57 X58 | ~ bnd_c10_2 X57 X58)) |
% 7.02/6.51 bnd_c4_1 X57)) |
% 7.02/6.51 bnd_c10_0)) &
% 7.02/6.51 ((~ bnd_c10_0 |
% 7.02/6.51 (ALL X59.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 (~ bnd_c2_1 X59 | ~ bnd_c3_1 X59) |
% 7.02/6.51 ((bnd_ndr1_1 X59 & ~ bnd_c6_2 X59 bnd_a193) &
% 7.02/6.51 ~ bnd_c3_2 X59 bnd_a193) &
% 7.02/6.51 ~ bnd_c10_2 X59 bnd_a193)) |
% 7.02/6.51 (ALL X60.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 (((bnd_ndr1_1 X60 & bnd_c9_2 X60 bnd_a194) &
% 7.02/6.51 ~ bnd_c3_2 X60 bnd_a194) &
% 7.02/6.51 ~ bnd_c1_2 X60 bnd_a194 |
% 7.02/6.51 ~ bnd_c10_1 X60) |
% 7.02/6.51 bnd_c8_1 X60))) &
% 7.02/6.51 (((((((bnd_ndr1_0 & bnd_c7_1 bnd_a195) & bnd_c2_1 bnd_a195) &
% 7.02/6.51 bnd_ndr1_1 bnd_a195) &
% 7.02/6.51 bnd_c10_2 bnd_a195 bnd_a196) &
% 7.02/6.51 bnd_c2_2 bnd_a195 bnd_a196) &
% 7.02/6.51 ~ bnd_c1_2 bnd_a195 bnd_a196 |
% 7.02/6.51 bnd_c1_0) |
% 7.02/6.51 ~ bnd_c6_0)) &
% 7.02/6.51 (((ALL X61.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 ((ALL X62.
% 7.02/6.51 bnd_ndr1_1 X61 -->
% 7.02/6.51 (bnd_c6_2 X61 X62 | bnd_c2_2 X61 X62) |
% 7.02/6.51 bnd_c10_2 X61 X62) |
% 7.02/6.51 ((bnd_ndr1_1 X61 & ~ bnd_c7_2 X61 bnd_a197) &
% 7.02/6.51 ~ bnd_c8_2 X61 bnd_a197) &
% 7.02/6.51 ~ bnd_c5_2 X61 bnd_a197) |
% 7.02/6.51 ~ bnd_c9_1 X61) |
% 7.02/6.51 (ALL X63.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 (bnd_c6_1 X63 |
% 7.02/6.51 ((bnd_ndr1_1 X63 & bnd_c7_2 X63 bnd_a198) &
% 7.02/6.51 bnd_c6_2 X63 bnd_a198) &
% 7.02/6.51 ~ bnd_c5_2 X63 bnd_a198) |
% 7.02/6.51 ((bnd_ndr1_1 X63 & bnd_c7_2 X63 bnd_a199) &
% 7.02/6.51 bnd_c10_2 X63 bnd_a199) &
% 7.02/6.51 bnd_c9_2 X63 bnd_a199)) |
% 7.02/6.51 ~ bnd_c6_0)) &
% 7.02/6.51 ((((((((((bnd_ndr1_0 &
% 7.02/6.51 (ALL X64.
% 7.02/6.51 bnd_ndr1_1 bnd_a200 -->
% 7.02/6.51 bnd_c4_2 bnd_a200 X64 | ~ bnd_c6_2 bnd_a200 X64)) &
% 7.02/6.51 bnd_ndr1_1 bnd_a200) &
% 7.02/6.51 ~ bnd_c7_2 bnd_a200 bnd_a201) &
% 7.02/6.51 bnd_c5_2 bnd_a200 bnd_a201) &
% 7.02/6.51 ~ bnd_c8_2 bnd_a200 bnd_a201) &
% 7.02/6.51 bnd_ndr1_1 bnd_a200) &
% 7.02/6.51 bnd_c2_2 bnd_a200 bnd_a202) &
% 7.02/6.51 bnd_c3_2 bnd_a200 bnd_a202) &
% 7.02/6.51 bnd_c9_2 bnd_a200 bnd_a202 |
% 7.02/6.51 (ALL X65.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 (((bnd_ndr1_1 X65 & bnd_c7_2 X65 bnd_a203) &
% 7.02/6.51 ~ bnd_c3_2 X65 bnd_a203) &
% 7.02/6.51 bnd_c10_2 X65 bnd_a203 |
% 7.02/6.51 bnd_c1_1 X65) |
% 7.02/6.51 bnd_c6_1 X65)) |
% 7.02/6.51 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a204) &
% 7.02/6.51 bnd_c6_2 bnd_a204 bnd_a205) &
% 7.02/6.51 ~ bnd_c9_2 bnd_a204 bnd_a205) &
% 7.02/6.51 ~ bnd_c3_2 bnd_a204 bnd_a205) &
% 7.02/6.51 (ALL X66.
% 7.02/6.51 bnd_ndr1_1 bnd_a204 -->
% 7.02/6.51 (~ bnd_c8_2 bnd_a204 X66 | ~ bnd_c3_2 bnd_a204 X66) |
% 7.02/6.51 bnd_c7_2 bnd_a204 X66)) &
% 7.02/6.51 ~ bnd_c10_1 bnd_a204)) &
% 7.02/6.51 ((bnd_c9_0 | bnd_c1_0) | ~ bnd_c8_0)) &
% 7.02/6.51 ((((bnd_ndr1_0 & ~ bnd_c5_1 bnd_a206) &
% 7.02/6.51 (ALL X67.
% 7.02/6.51 bnd_ndr1_1 bnd_a206 -->
% 7.02/6.51 (~ bnd_c4_2 bnd_a206 X67 | bnd_c2_2 bnd_a206 X67) |
% 7.02/6.51 bnd_c6_2 bnd_a206 X67)) &
% 7.02/6.51 (ALL X68.
% 7.02/6.51 bnd_ndr1_1 bnd_a206 -->
% 7.02/6.51 bnd_c9_2 bnd_a206 X68 | bnd_c8_2 bnd_a206 X68) |
% 7.02/6.51 ((bnd_ndr1_0 & bnd_c6_1 bnd_a207) & bnd_c9_1 bnd_a207) &
% 7.02/6.51 bnd_c1_1 bnd_a207) |
% 7.02/6.51 ~ bnd_c7_0)) &
% 7.02/6.51 ((bnd_c4_0 |
% 7.02/6.51 (ALL X69.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 ((bnd_ndr1_1 X69 & ~ bnd_c4_2 X69 bnd_a208) &
% 7.02/6.51 bnd_c9_2 X69 bnd_a208 |
% 7.02/6.51 ~ bnd_c5_1 X69) |
% 7.02/6.51 bnd_c10_1 X69)) |
% 7.02/6.51 ~ bnd_c6_0)) &
% 7.02/6.51 ((bnd_c7_0 |
% 7.02/6.51 (ALL X70.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 ((ALL X71.
% 7.02/6.51 bnd_ndr1_1 X70 -->
% 7.02/6.51 (~ bnd_c8_2 X70 X71 | ~ bnd_c4_2 X70 X71) |
% 7.02/6.51 ~ bnd_c2_2 X70 X71) |
% 7.02/6.51 (ALL X72.
% 7.02/6.51 bnd_ndr1_1 X70 -->
% 7.02/6.51 (bnd_c4_2 X70 X72 | ~ bnd_c9_2 X70 X72) |
% 7.02/6.51 ~ bnd_c10_2 X70 X72)) |
% 7.02/6.51 ((bnd_ndr1_1 X70 & bnd_c10_2 X70 bnd_a209) &
% 7.02/6.51 ~ bnd_c2_2 X70 bnd_a209) &
% 7.02/6.51 ~ bnd_c4_2 X70 bnd_a209)) |
% 7.02/6.51 ~ bnd_c10_0)) &
% 7.02/6.51 (((ALL X73.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 (((bnd_ndr1_1 X73 & ~ bnd_c1_2 X73 bnd_a210) &
% 7.02/6.51 bnd_c7_2 X73 bnd_a210) &
% 7.02/6.51 bnd_c3_2 X73 bnd_a210 |
% 7.02/6.51 bnd_c3_1 X73) |
% 7.02/6.51 ((bnd_ndr1_1 X73 & bnd_c9_2 X73 bnd_a211) &
% 7.02/6.51 ~ bnd_c4_2 X73 bnd_a211) &
% 7.02/6.51 ~ bnd_c2_2 X73 bnd_a211) |
% 7.02/6.51 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a212) &
% 7.02/6.51 bnd_c5_2 bnd_a212 bnd_a213) &
% 7.02/6.51 ~ bnd_c8_2 bnd_a212 bnd_a213) &
% 7.02/6.51 bnd_c4_2 bnd_a212 bnd_a213) &
% 7.02/6.51 (ALL X74.
% 7.02/6.51 bnd_ndr1_1 bnd_a212 -->
% 7.02/6.51 (bnd_c7_2 bnd_a212 X74 | bnd_c9_2 bnd_a212 X74) |
% 7.02/6.51 ~ bnd_c5_2 bnd_a212 X74)) &
% 7.02/6.51 (ALL X75.
% 7.02/6.51 bnd_ndr1_1 bnd_a212 -->
% 7.02/6.51 (~ bnd_c8_2 bnd_a212 X75 | ~ bnd_c5_2 bnd_a212 X75) |
% 7.02/6.51 ~ bnd_c4_2 bnd_a212 X75)) |
% 7.02/6.51 (ALL X76.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 ((bnd_ndr1_1 X76 & ~ bnd_c4_2 X76 bnd_a214) &
% 7.02/6.51 ~ bnd_c6_2 X76 bnd_a214) &
% 7.02/6.51 bnd_c8_2 X76 bnd_a214 |
% 7.02/6.51 ~ bnd_c5_1 X76))) &
% 7.02/6.51 ((((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a215) &
% 7.02/6.51 (ALL X77.
% 7.02/6.51 bnd_ndr1_1 bnd_a215 -->
% 7.02/6.51 ~ bnd_c4_2 bnd_a215 X77 | ~ bnd_c5_2 bnd_a215 X77)) &
% 7.02/6.51 bnd_c8_1 bnd_a215 |
% 7.02/6.51 (((((bnd_ndr1_0 &
% 7.02/6.51 (ALL X78.
% 7.02/6.51 bnd_ndr1_1 bnd_a216 -->
% 7.02/6.51 (bnd_c10_2 bnd_a216 X78 | bnd_c1_2 bnd_a216 X78) |
% 7.02/6.51 bnd_c3_2 bnd_a216 X78)) &
% 7.02/6.51 (ALL X79.
% 7.02/6.51 bnd_ndr1_1 bnd_a216 -->
% 7.02/6.51 (~ bnd_c6_2 bnd_a216 X79 | bnd_c5_2 bnd_a216 X79) |
% 7.02/6.51 bnd_c8_2 bnd_a216 X79)) &
% 7.02/6.51 bnd_ndr1_1 bnd_a216) &
% 7.02/6.51 ~ bnd_c6_2 bnd_a216 bnd_a217) &
% 7.02/6.51 bnd_c10_2 bnd_a216 bnd_a217) &
% 7.02/6.51 ~ bnd_c8_2 bnd_a216 bnd_a217) |
% 7.02/6.51 ~ bnd_c10_0)) &
% 7.02/6.51 (bnd_c5_0 | ~ bnd_c6_0)) &
% 7.02/6.51 (((ALL X80. bnd_ndr1_0 --> bnd_c4_1 X80 | ~ bnd_c7_1 X80) | bnd_c2_0) |
% 7.02/6.51 bnd_c1_0)) &
% 7.02/6.51 (((ALL X81.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 ((ALL X82.
% 7.02/6.51 bnd_ndr1_1 X81 --> ~ bnd_c9_2 X81 X82 | ~ bnd_c7_2 X81 X82) |
% 7.02/6.51 bnd_c10_1 X81) |
% 7.02/6.51 ((bnd_ndr1_1 X81 & ~ bnd_c5_2 X81 bnd_a218) &
% 7.02/6.51 bnd_c1_2 X81 bnd_a218) &
% 7.02/6.51 bnd_c7_2 X81 bnd_a218) |
% 7.02/6.51 (bnd_ndr1_0 & ~ bnd_c7_1 bnd_a219) & ~ bnd_c5_1 bnd_a219) |
% 7.02/6.51 ~ bnd_c3_0)) &
% 7.02/6.51 ((bnd_c2_0 | ~ bnd_c1_0) | ~ bnd_c3_0)) &
% 7.02/6.51 ((~ bnd_c9_0 | bnd_c5_0) |
% 7.02/6.51 (ALL X83.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 ((ALL X84. bnd_ndr1_1 X83 --> bnd_c7_2 X83 X84 | ~ bnd_c3_2 X83 X84) |
% 7.02/6.51 bnd_c6_1 X83) |
% 7.02/6.51 ~ bnd_c1_1 X83))) &
% 7.02/6.51 ((~ bnd_c4_0 |
% 7.02/6.51 (ALL X85.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 (~ bnd_c9_1 X85 | bnd_c10_1 X85) |
% 7.02/6.51 ((bnd_ndr1_1 X85 & ~ bnd_c2_2 X85 bnd_a220) &
% 7.02/6.51 ~ bnd_c4_2 X85 bnd_a220) &
% 7.02/6.51 ~ bnd_c9_2 X85 bnd_a220)) |
% 7.02/6.51 ~ bnd_c3_0)) &
% 7.02/6.51 (((ALL X86.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 ~ bnd_c7_1 X86 |
% 7.02/6.51 ((bnd_ndr1_1 X86 & bnd_c1_2 X86 bnd_a221) & bnd_c5_2 X86 bnd_a221) &
% 7.02/6.51 ~ bnd_c8_2 X86 bnd_a221) |
% 7.02/6.51 (ALL X87.
% 7.02/6.51 bnd_ndr1_0 -->
% 7.02/6.51 (bnd_c3_1 X87 | bnd_c5_1 X87) |
% 7.02/6.51 (ALL X88.
% 7.02/6.51 bnd_ndr1_1 X87 -->
% 7.02/6.51 (bnd_c8_2 X87 X88 | ~ bnd_c4_2 X87 X88) | ~ bnd_c7_2 X87 X88))) |
% 7.02/6.51 ~ bnd_c8_0)) &
% 7.02/6.51 (((bnd_ndr1_0 & bnd_c1_1 bnd_a222) &
% 7.02/6.52 bnd_c4_1 bnd_a222 |
% 7.02/6.52 ~ bnd_c7_0) |
% 7.02/6.52 (ALL X89.
% 7.02/6.52 bnd_ndr1_0 -->
% 7.02/6.52 (((bnd_ndr1_1 X89 & bnd_c10_2 X89 bnd_a223) & bnd_c9_2 X89 bnd_a223) &
% 7.02/6.52 ~ bnd_c6_2 X89 bnd_a223 |
% 7.02/6.52 (ALL X90.
% 7.02/6.52 bnd_ndr1_1 X89 -->
% 7.02/6.52 (bnd_c1_2 X89 X90 | ~ bnd_c7_2 X89 X90) | bnd_c9_2 X89 X90)) |
% 7.02/6.52 bnd_c10_1 X89))) &
% 7.02/6.52 ((bnd_c10_0 |
% 7.02/6.52 (((((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a224) &
% 7.02/6.52 (ALL X91.
% 7.02/6.52 bnd_ndr1_1 bnd_a224 -->
% 7.02/6.52 (bnd_c4_2 bnd_a224 X91 | ~ bnd_c9_2 bnd_a224 X91) |
% 7.02/6.52 bnd_c8_2 bnd_a224 X91)) &
% 7.02/6.52 bnd_ndr1_1 bnd_a224) &
% 7.02/6.52 bnd_c3_2 bnd_a224 bnd_a225) &
% 7.02/6.52 ~ bnd_c4_2 bnd_a224 bnd_a225) &
% 7.02/6.52 bnd_c9_2 bnd_a224 bnd_a225) |
% 7.02/6.52 (ALL X92.
% 7.02/6.52 bnd_ndr1_0 -->
% 7.02/6.52 (bnd_c8_1 X92 |
% 7.02/6.52 ((bnd_ndr1_1 X92 & bnd_c3_2 X92 bnd_a226) & ~ bnd_c4_2 X92 bnd_a226) &
% 7.02/6.52 ~ bnd_c8_2 X92 bnd_a226) |
% 7.02/6.52 ((bnd_ndr1_1 X92 & bnd_c10_2 X92 bnd_a227) & ~ bnd_c1_2 X92 bnd_a227) &
% 7.02/6.52 ~ bnd_c7_2 X92 bnd_a227))) &
% 7.02/6.52 ((bnd_c4_0 | ~ bnd_c8_0) | ~ bnd_c3_0)) &
% 7.02/6.52 ((ALL X93.
% 7.02/6.52 bnd_ndr1_0 -->
% 7.02/6.52 ((ALL X94.
% 7.02/6.52 bnd_ndr1_1 X93 --> ~ bnd_c8_2 X93 X94 | ~ bnd_c10_2 X93 X94) |
% 7.02/6.52 (bnd_ndr1_1 X93 & ~ bnd_c10_2 X93 bnd_a228) & ~ bnd_c1_2 X93 bnd_a228) |
% 7.02/6.52 bnd_c8_1 X93) |
% 7.02/6.52 (ALL X95.
% 7.02/6.52 bnd_ndr1_0 -->
% 7.02/6.52 ((bnd_ndr1_1 X95 &
% 7.02/6.52 bnd_c2_2 X95 bnd_a229) &
% 7.02/6.52 ~ bnd_c7_2 X95 bnd_a229 |
% 7.02/6.52 bnd_c2_1 X95) |
% 7.02/6.52 bnd_c9_1 X95))) &
% 7.02/6.52 (((ALL X96.
% 7.02/6.52 bnd_ndr1_0 -->
% 7.02/6.52 (((bnd_ndr1_1 X96 &
% 7.02/6.52 bnd_c7_2 X96 bnd_a230) &
% 7.02/6.52 bnd_c6_2 X96 bnd_a230) &
% 7.02/6.52 ~ bnd_c3_2 X96 bnd_a230 |
% 7.02/6.52 bnd_c10_1 X96) |
% 7.02/6.52 ((bnd_ndr1_1 X96 &
% 7.02/6.52 ~ bnd_c8_2 X96 bnd_a231) &
% 7.02/6.52 ~ bnd_c1_2 X96 bnd_a231) &
% 7.02/6.52 bnd_c2_2 X96 bnd_a231) |
% 7.02/6.52 ((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a232) &
% 7.02/6.52 ~ bnd_c7_2 bnd_a232 bnd_a233) &
% 7.02/6.52 bnd_c8_2 bnd_a232 bnd_a233) &
% 7.02/6.52 (ALL X97.
% 7.02/6.52 bnd_ndr1_1 bnd_a232 -->
% 7.02/6.52 (~ bnd_c3_2 bnd_a232 X97 | ~ bnd_c6_2 bnd_a232 X97) |
% 7.02/6.52 ~ bnd_c9_2 bnd_a232 X97)) &
% 7.02/6.52 bnd_c6_1 bnd_a232) |
% 7.02/6.52 ~ bnd_c10_0)) &
% 7.02/6.52 ((~ bnd_c8_0 |
% 7.02/6.52 (bnd_ndr1_0 & bnd_c9_1 bnd_a234) &
% 7.02/6.52 ~ bnd_c1_1 bnd_a234) |
% 7.02/6.52 bnd_c4_0)) &
% 7.02/6.52 (((ALL X98.
% 7.02/6.52 bnd_ndr1_0 -->
% 7.02/6.52 (~ bnd_c7_1 X98 | ~ bnd_c5_1 X98) |
% 7.02/6.52 (ALL X99.
% 7.02/6.52 bnd_ndr1_1 X98 -->
% 7.02/6.52 (~ bnd_c4_2 X98 X99 | ~ bnd_c5_2 X98 X99) | ~ bnd_c10_2 X98 X99)) |
% 7.02/6.52 (bnd_ndr1_0 & bnd_c8_1 bnd_a235) &
% 7.02/6.52 ~ bnd_c5_1 bnd_a235) |
% 7.02/6.52 bnd_c4_0)) &
% 7.02/6.52 (bnd_c8_0 | bnd_c7_0)) &
% 7.02/6.52 (((ALL X100.
% 7.02/6.52 bnd_ndr1_0 -->
% 7.02/6.52 (~ bnd_c5_1 X100 | bnd_c10_1 X100) |
% 7.02/6.52 (ALL X101.
% 7.02/6.52 bnd_ndr1_1 X100 -->
% 7.02/6.52 (bnd_c7_2 X100 X101 |
% 7.02/6.52 ~ bnd_c3_2 X100 X101) |
% 7.02/6.52 bnd_c6_2 X100 X101)) |
% 7.02/6.52 (ALL X102.
% 7.02/6.52 bnd_ndr1_0 -->
% 7.02/6.52 (~ bnd_c10_1 X102 |
% 7.02/6.52 (ALL X103.
% 7.02/6.52 bnd_ndr1_1 X102 -->
% 7.02/6.52 (~ bnd_c6_2 X102 X103 | ~ bnd_c3_2 X102 X103) | bnd_c9_2 X102 X103)) |
% 7.02/6.52 bnd_c5_1 X102)) |
% 7.02/6.52 ~ bnd_c8_0)) &
% 7.02/6.52 ((~ bnd_c5_0 | ~ bnd_c2_0) |
% 7.02/6.52 (ALL X104.
% 7.02/6.52 bnd_ndr1_0 -->
% 7.02/6.52 (ALL X105.
% 7.02/6.52 bnd_ndr1_1 X104 -->
% 7.02/6.52 bnd_c10_2 X104 X105 |
% 7.02/6.52 bnd_c1_2 X104 X105) |
% 7.02/6.52 (ALL X106.
% 7.02/6.52 bnd_ndr1_1 X104 -->
% 7.02/6.52 ~ bnd_c10_2 X104 X106 |
% 7.02/6.52 bnd_c6_2 X104 X106)))) &
% 7.02/6.52 (((ALL X107.
% 7.02/6.52 bnd_ndr1_0 -->
% 7.02/6.52 (~ bnd_c7_1 X107 |
% 7.02/6.52 ((bnd_ndr1_1 X107 &
% 7.02/6.52 ~ bnd_c8_2 X107 bnd_a236) &
% 7.02/6.52 ~ bnd_c6_2 X107 bnd_a236) &
% 7.02/6.52 ~ bnd_c10_2 X107 bnd_a236) |
% 7.02/6.52 (ALL X108.
% 7.02/6.52 bnd_ndr1_1 X107 -->
% 7.02/6.52 (~ bnd_c10_2 X107 X108 |
% 7.02/6.52 ~ bnd_c2_2 X107 X108) |
% 7.02/6.52 bnd_c8_2 X107 X108)) |
% 7.02/6.52 (((((bnd_ndr1_0 &
% 7.02/6.52 (ALL X109.
% 7.02/6.52 bnd_ndr1_1 bnd_a237 -->
% 7.02/6.52 (~ bnd_c5_2 bnd_a237 X109 |
% 7.02/6.52 ~ bnd_c6_2 bnd_a237 X109) |
% 7.02/6.52 ~ bnd_c4_2 bnd_a237 X109)) &
% 7.02/6.52 bnd_ndr1_1 bnd_a237) &
% 7.02/6.52 ~ bnd_c7_2 bnd_a237 bnd_a238) &
% 7.02/6.52 bnd_c2_2 bnd_a237 bnd_a238) &
% 7.02/6.52 bnd_c4_2 bnd_a237 bnd_a238) &
% 7.02/6.52 (ALL X110.
% 7.02/6.52 bnd_ndr1_1 bnd_a237 -->
% 7.02/6.52 (~ bnd_c2_2 bnd_a237 X110 |
% 7.02/6.52 bnd_c3_2 bnd_a237 X110) |
% 7.02/6.52 bnd_c1_2 bnd_a237 X110)) |
% 7.02/6.52 ~ bnd_c9_0)) &
% 7.02/6.52 ((bnd_c9_0 |
% 7.02/6.52 ((bnd_ndr1_0 & bnd_c2_1 bnd_a239) &
% 7.02/6.52 (ALL X111.
% 7.02/6.52 bnd_ndr1_1 bnd_a239 -->
% 7.02/6.52 (~ bnd_c2_2 bnd_a239 X111 |
% 7.02/6.52 ~ bnd_c10_2 bnd_a239 X111) |
% 7.02/6.52 bnd_c3_2 bnd_a239 X111)) &
% 7.02/6.52 ~ bnd_c10_1 bnd_a239) |
% 7.02/6.52 (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a240) &
% 7.02/6.52 ~ bnd_c4_2 bnd_a240 bnd_a241) &
% 7.02/6.52 bnd_c3_2 bnd_a240 bnd_a241) &
% 7.02/6.52 bnd_c9_2 bnd_a240 bnd_a241) &
% 7.02/6.52 bnd_ndr1_1 bnd_a240) &
% 7.02/6.52 ~ bnd_c7_2 bnd_a240 bnd_a242) &
% 7.02/6.52 bnd_c8_2 bnd_a240 bnd_a242) &
% 7.02/6.52 (ALL X112.
% 7.02/6.52 bnd_ndr1_1 bnd_a240 -->
% 7.02/6.52 (~ bnd_c5_2 bnd_a240 X112 |
% 7.02/6.52 ~ bnd_c9_2 bnd_a240 X112) |
% 7.02/6.52 ~ bnd_c1_2 bnd_a240 X112))) &
% 7.02/6.52 ((bnd_c7_0 |
% 7.02/6.52 (ALL X113.
% 7.02/6.52 bnd_ndr1_0 -->
% 7.02/6.52 (ALL X114.
% 7.02/6.52 bnd_ndr1_1 X113 -->
% 7.02/6.52 (bnd_c7_2 X113 X114 | bnd_c8_2 X113 X114) |
% 7.02/6.52 bnd_c1_2 X113 X114))) |
% 7.02/6.52 bnd_c1_0)) &
% 7.02/6.52 ((ALL X115.
% 7.02/6.52 bnd_ndr1_0 -->
% 7.02/6.52 (bnd_c3_1 X115 |
% 7.02/6.52 ((bnd_ndr1_1 X115 & ~ bnd_c5_2 X115 bnd_a243) &
% 7.02/6.52 ~ bnd_c3_2 X115 bnd_a243) &
% 7.02/6.52 bnd_c8_2 X115 bnd_a243) |
% 7.02/6.52 ~ bnd_c1_1 X115) |
% 7.02/6.52 (ALL X116.
% 7.02/6.52 bnd_ndr1_0 -->
% 7.02/6.52 (((bnd_ndr1_1 X116 & ~ bnd_c3_2 X116 bnd_a244) &
% 7.02/6.52 ~ bnd_c8_2 X116 bnd_a244) &
% 7.02/6.52 bnd_c5_2 X116 bnd_a244 |
% 7.02/6.52 (ALL X117.
% 7.02/6.52 bnd_ndr1_1 X116 -->
% 7.02/6.52 (bnd_c4_2 X116 X117 |
% 7.02/6.52 ~ bnd_c8_2 X116 X117) |
% 7.02/6.52 bnd_c7_2 X116 X117)) |
% 7.02/6.52 (ALL X118.
% 7.02/6.52 bnd_ndr1_1 X116 -->
% 7.02/6.52 (bnd_c4_2 X116 X118 | bnd_c7_2 X116 X118) |
% 7.02/6.52 ~ bnd_c9_2 X116 X118)))) &
% 7.02/6.52 ((~ bnd_c9_0 | bnd_c7_0) |
% 7.02/6.52 ((bnd_ndr1_0 & bnd_c9_1 bnd_a245) &
% 7.02/6.52 bnd_c5_1 bnd_a245) &
% 7.02/6.52 (ALL X119.
% 7.02/6.52 bnd_ndr1_1 bnd_a245 -->
% 7.02/6.52 (~ bnd_c10_2 bnd_a245 X119 |
% 7.02/6.52 ~ bnd_c7_2 bnd_a245 X119) |
% 7.02/6.52 bnd_c9_2 bnd_a245 X119))) &
% 7.02/6.52 ((bnd_c10_0 | ~ bnd_c4_0) |
% 7.02/6.52 ((bnd_ndr1_0 &
% 7.02/6.52 (ALL X120.
% 7.02/6.52 bnd_ndr1_1 bnd_a246 -->
% 7.02/6.52 (~ bnd_c5_2 bnd_a246 X120 |
% 7.02/6.52 ~ bnd_c9_2 bnd_a246 X120) |
% 7.02/6.52 bnd_c10_2 bnd_a246 X120)) &
% 7.02/6.52 (ALL X121.
% 7.02/6.52 bnd_ndr1_1 bnd_a246 -->
% 7.02/6.52 (bnd_c7_2 bnd_a246 X121 |
% 7.02/6.52 bnd_c6_2 bnd_a246 X121) |
% 7.02/6.52 bnd_c5_2 bnd_a246 X121)) &
% 7.02/6.52 ~ bnd_c1_1 bnd_a246)) &
% 7.02/6.52 ((bnd_c4_0 | bnd_c1_0) | ~ bnd_c8_0)) &
% 7.02/6.52 ((~ bnd_c9_0 |
% 7.02/6.52 ((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a247) &
% 7.02/6.52 bnd_c5_2 bnd_a247 bnd_a248) &
% 7.02/6.52 ~ bnd_c6_2 bnd_a247 bnd_a248) &
% 7.02/6.52 bnd_c3_2 bnd_a247 bnd_a248) &
% 7.02/6.52 bnd_ndr1_1 bnd_a247) &
% 7.02/6.52 ~ bnd_c6_2 bnd_a247 bnd_a249) &
% 7.02/6.52 ~ bnd_c10_2 bnd_a247 bnd_a249) &
% 7.02/6.52 ~ bnd_c4_2 bnd_a247 bnd_a249) &
% 7.02/6.52 ~ bnd_c8_1 bnd_a247) |
% 7.02/6.52 bnd_c7_0)) &
% 7.02/6.52 ((ALL X122.
% 7.02/6.52 bnd_ndr1_0 -->
% 7.02/6.52 ((ALL X123.
% 7.02/6.52 bnd_ndr1_1 X122 -->
% 7.02/6.52 (bnd_c10_2 X122 X123 | ~ bnd_c5_2 X122 X123) |
% 7.02/6.52 ~ bnd_c3_2 X122 X123) |
% 7.02/6.52 ~ bnd_c9_1 X122) |
% 7.02/6.52 (bnd_ndr1_1 X122 & bnd_c6_2 X122 bnd_a250) &
% 7.02/6.52 bnd_c2_2 X122 bnd_a250) |
% 7.02/6.52 (ALL X124.
% 7.02/6.52 bnd_ndr1_0 -->
% 7.02/6.52 (~ bnd_c10_1 X124 | ~ bnd_c9_1 X124) |
% 7.02/6.52 bnd_c1_1 X124))) &
% 7.02/6.52 (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a251) &
% 7.02/6.52 bnd_c10_2 bnd_a251 bnd_a252) &
% 7.02/6.52 bnd_c1_2 bnd_a251 bnd_a252) &
% 7.02/6.52 ~ bnd_c5_2 bnd_a251 bnd_a252) &
% 7.02/6.52 bnd_c2_1 bnd_a251) &
% 7.02/6.52 ~ bnd_c9_1 bnd_a251 |
% 7.02/6.52 ~ bnd_c7_0) |
% 7.02/6.52 bnd_c6_0)) &
% 7.02/6.52 ((bnd_c10_0 |
% 7.02/6.52 (ALL X125.
% 7.02/6.52 bnd_ndr1_0 -->
% 7.02/6.52 (bnd_c6_1 X125 |
% 7.02/6.52 (ALL X126.
% 7.02/6.52 bnd_ndr1_1 X125 -->
% 7.02/6.52 bnd_c9_2 X125 X126 | ~ bnd_c1_2 X125 X126)) |
% 7.02/6.52 (ALL X127.
% 7.02/6.52 bnd_ndr1_1 X125 -->
% 7.02/6.52 (bnd_c6_2 X125 X127 | bnd_c3_2 X125 X127) |
% 7.02/6.52 ~ bnd_c8_2 X125 X127))) |
% 7.02/6.52 ((bnd_ndr1_0 & ~ bnd_c5_1 bnd_a253) & bnd_c9_1 bnd_a253) &
% 7.02/6.52 bnd_c1_1 bnd_a253)) &
% 7.02/6.52 ((bnd_c6_0 | ~ bnd_c10_0) | ~ bnd_c4_0)) &
% 7.02/6.52 (~ bnd_c6_0 | bnd_c2_0)) &
% 7.02/6.52 (((ALL X128.
% 7.02/6.52 bnd_ndr1_0 -->
% 7.02/6.52 (((bnd_ndr1_1 X128 & bnd_c10_2 X128 bnd_a254) &
% 7.02/6.52 ~ bnd_c8_2 X128 bnd_a254) &
% 7.02/6.52 bnd_c6_2 X128 bnd_a254 |
% 7.02/6.52 ((bnd_ndr1_1 X128 & ~ bnd_c6_2 X128 bnd_a255) &
% 7.02/6.52 bnd_c9_2 X128 bnd_a255) &
% 7.02/6.52 ~ bnd_c4_2 X128 bnd_a255) |
% 7.02/6.52 bnd_c8_1 X128) |
% 7.02/6.52 (ALL X129.
% 7.02/6.52 bnd_ndr1_0 -->
% 7.02/6.52 (bnd_c7_1 X129 | bnd_c9_1 X129) | ~ bnd_c2_1 X129)) |
% 7.02/6.52 (ALL X130.
% 7.02/6.52 bnd_ndr1_0 -->
% 7.02/6.52 (bnd_c6_1 X130 | ~ bnd_c9_1 X130) |
% 7.02/6.52 (ALL X131.
% 7.02/6.52 bnd_ndr1_1 X130 -->
% 7.02/6.52 (bnd_c8_2 X130 X131 | bnd_c6_2 X130 X131) |
% 7.02/6.52 ~ bnd_c1_2 X130 X131)))) &
% 7.02/6.52 ((~ bnd_c3_0 |
% 7.02/6.52 (ALL X132.
% 7.02/6.52 bnd_ndr1_0 -->
% 7.02/6.52 ((bnd_ndr1_1 X132 & ~ bnd_c8_2 X132 bnd_a256) &
% 7.02/6.52 ~ bnd_c9_2 X132 bnd_a256 |
% 7.02/6.52 bnd_c5_1 X132) |
% 7.02/6.52 bnd_c8_1 X132)) |
% 7.02/6.52 bnd_c8_0)) &
% 7.02/6.52 ((bnd_c10_0 |
% 7.02/6.52 ((bnd_ndr1_0 & ~ bnd_c7_1 bnd_a257) & ~ bnd_c2_1 bnd_a257) &
% 7.02/6.52 bnd_c5_1 bnd_a257) |
% 7.02/6.52 bnd_c9_0)) &
% 7.02/6.52 ((~ bnd_c5_0 | ~ bnd_c4_0) | bnd_c8_0)) &
% 7.02/6.52 (((ALL X133.
% 7.02/6.52 bnd_ndr1_0 -->
% 7.02/6.52 (~ bnd_c10_1 X133 |
% 7.02/6.52 (ALL X134.
% 7.02/6.52 bnd_ndr1_1 X133 -->
% 7.02/6.52 (bnd_c3_2 X133 X134 | bnd_c7_2 X133 X134) |
% 7.02/6.52 bnd_c10_2 X133 X134)) |
% 7.02/6.52 bnd_c3_1 X133) |
% 7.02/6.52 bnd_c9_0) |
% 7.02/6.52 ~ bnd_c6_0)) &
% 7.02/6.52 (((((((bnd_ndr1_0 & ~ bnd_c8_1 bnd_a258) & bnd_ndr1_1 bnd_a258) &
% 7.02/6.52 ~ bnd_c10_2 bnd_a258 bnd_a259) &
% 7.02/6.52 ~ bnd_c6_2 bnd_a258 bnd_a259) &
% 7.02/6.52 ~ bnd_c2_2 bnd_a258 bnd_a259) &
% 7.02/6.52 bnd_c5_1 bnd_a258 |
% 7.02/6.52 (ALL X135.
% 7.02/6.52 bnd_ndr1_0 -->
% 7.02/6.52 ((bnd_ndr1_1 X135 & bnd_c6_2 X135 bnd_a260) &
% 7.02/6.52 ~ bnd_c10_2 X135 bnd_a260) &
% 7.02/6.52 ~ bnd_c2_2 X135 bnd_a260 |
% 7.02/6.52 ~ bnd_c2_1 X135)) |
% 7.02/6.52 bnd_c9_0)) &
% 7.02/6.52 ((((bnd_ndr1_0 &
% 7.02/6.52 (ALL X136.
% 7.02/6.52 bnd_ndr1_1 bnd_a261 -->
% 7.02/6.52 (bnd_c1_2 bnd_a261 X136 | bnd_c8_2 bnd_a261 X136) |
% 7.02/6.52 ~ bnd_c7_2 bnd_a261 X136)) &
% 7.02/6.52 ~ bnd_c9_1 bnd_a261) &
% 7.02/6.52 (ALL X137.
% 7.02/6.52 bnd_ndr1_1 bnd_a261 -->
% 7.02/6.52 (~ bnd_c7_2 bnd_a261 X137 | bnd_c2_2 bnd_a261 X137) |
% 7.02/6.52 ~ bnd_c1_2 bnd_a261 X137) |
% 7.02/6.52 ((((((((bnd_ndr1_0 & bnd_c5_1 bnd_a262) & bnd_ndr1_1 bnd_a262) &
% 7.02/6.52 bnd_c8_2 bnd_a262 bnd_a263) &
% 7.02/6.52 bnd_c9_2 bnd_a262 bnd_a263) &
% 7.02/6.52 bnd_c10_2 bnd_a262 bnd_a263) &
% 7.02/6.52 bnd_ndr1_1 bnd_a262) &
% 7.02/6.52 ~ bnd_c6_2 bnd_a262 bnd_a264) &
% 7.02/6.52 ~ bnd_c10_2 bnd_a262 bnd_a264) &
% 7.02/6.52 ~ bnd_c4_2 bnd_a262 bnd_a264) |
% 7.02/6.52 bnd_c2_0)) &
% 7.02/6.52 ((~ bnd_c7_0 |
% 7.02/6.52 (ALL X138.
% 7.02/6.52 bnd_ndr1_0 -->
% 7.02/6.52 (~ bnd_c5_1 X138 | bnd_c2_1 X138) | ~ bnd_c6_1 X138)) |
% 7.02/6.52 bnd_c8_0)) &
% 7.02/6.52 ((bnd_c2_0 | bnd_c1_0) |
% 7.02/6.52 ((bnd_ndr1_0 & bnd_c1_1 bnd_a265) & bnd_c2_1 bnd_a265) &
% 7.02/6.52 ~ bnd_c7_1 bnd_a265)) &
% 7.02/6.52 ((bnd_c1_0 |
% 7.02/6.52 ((((((((bnd_ndr1_0 & ~ bnd_c7_1 bnd_a266) & bnd_ndr1_1 bnd_a266) &
% 7.02/6.52 ~ bnd_c9_2 bnd_a266 bnd_a267) &
% 7.02/6.52 bnd_c7_2 bnd_a266 bnd_a267) &
% 7.02/6.52 ~ bnd_c5_2 bnd_a266 bnd_a267) &
% 7.02/6.52 bnd_ndr1_1 bnd_a266) &
% 7.02/6.52 bnd_c10_2 bnd_a266 bnd_a268) &
% 7.02/6.52 ~ bnd_c2_2 bnd_a266 bnd_a268) &
% 7.02/6.52 bnd_c6_2 bnd_a266 bnd_a268) |
% 7.02/6.52 ~ bnd_c5_0))
% 14.22/13.73 Unfolded term: ~ ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((bnd_c7_0 |
% 14.22/13.73 bnd_c3_0) |
% 14.22/13.73 (ALL U.
% 14.22/13.73 bnd_ndr1_0 --> (~ bnd_c9_1 U | ~ bnd_c1_1 U) | bnd_c8_1 U)) &
% 14.22/13.73 (((bnd_ndr1_0 & bnd_c7_1 bnd_a147) & ~ bnd_c9_1 bnd_a147 |
% 14.22/13.73 ~ bnd_c1_0) |
% 14.22/13.73 (ALL V.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 ((bnd_ndr1_1 V & ~ bnd_c5_2 V bnd_a148) &
% 14.22/13.73 bnd_c7_2 V bnd_a148) &
% 14.22/13.73 bnd_c3_2 V bnd_a148 |
% 14.22/13.73 ~ bnd_c4_1 V))) &
% 14.22/13.73 ((((((((((bnd_ndr1_0 &
% 14.22/13.73 (ALL W.
% 14.22/13.73 bnd_ndr1_1 bnd_a149 -->
% 14.22/13.73 (bnd_c1_2 bnd_a149 W | ~ bnd_c4_2 bnd_a149 W) |
% 14.22/13.73 ~ bnd_c7_2 bnd_a149 W)) &
% 14.22/13.73 bnd_ndr1_1 bnd_a149) &
% 14.22/13.73 ~ bnd_c9_2 bnd_a149 bnd_a150) &
% 14.22/13.73 bnd_c7_2 bnd_a149 bnd_a150) &
% 14.22/13.73 ~ bnd_c5_2 bnd_a149 bnd_a150) &
% 14.22/13.73 bnd_ndr1_1 bnd_a149) &
% 14.22/13.73 ~ bnd_c4_2 bnd_a149 bnd_a151) &
% 14.22/13.73 ~ bnd_c1_2 bnd_a149 bnd_a151) &
% 14.22/13.73 ~ bnd_c10_2 bnd_a149 bnd_a151 |
% 14.22/13.73 ~ bnd_c4_0) |
% 14.22/13.73 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a152) &
% 14.22/13.73 bnd_c7_2 bnd_a152 bnd_a153) &
% 14.22/13.73 ~ bnd_c10_2 bnd_a152 bnd_a153) &
% 14.22/13.73 bnd_c9_2 bnd_a152 bnd_a153) &
% 14.22/13.73 (ALL X.
% 14.22/13.73 bnd_ndr1_1 bnd_a152 -->
% 14.22/13.73 (~ bnd_c4_2 bnd_a152 X | ~ bnd_c2_2 bnd_a152 X) |
% 14.22/13.73 ~ bnd_c10_2 bnd_a152 X)) &
% 14.22/13.73 ~ bnd_c8_1 bnd_a152)) &
% 14.22/13.73 (((ALL Y.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (bnd_c5_1 Y | bnd_c8_1 Y) |
% 14.22/13.73 ((bnd_ndr1_1 Y & ~ bnd_c10_2 Y bnd_a154) &
% 14.22/13.73 bnd_c6_2 Y bnd_a154) &
% 14.22/13.73 ~ bnd_c3_2 Y bnd_a154) |
% 14.22/13.73 bnd_c3_0) |
% 14.22/13.73 ~ bnd_c1_0)) &
% 14.22/13.73 (((ALL Z.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (((bnd_ndr1_1 Z & ~ bnd_c1_2 Z bnd_a155) &
% 14.22/13.73 bnd_c10_2 Z bnd_a155) &
% 14.22/13.73 ~ bnd_c4_2 Z bnd_a155 |
% 14.22/13.73 bnd_c8_1 Z) |
% 14.22/13.73 (bnd_ndr1_1 Z & bnd_c3_2 Z bnd_a156) & bnd_c6_2 Z bnd_a156) |
% 14.22/13.73 bnd_c7_0) |
% 14.22/13.73 ~ bnd_c1_0)) &
% 14.22/13.73 ((bnd_c8_0 | bnd_c9_0) | ~ bnd_c6_0)) &
% 14.22/13.73 ((~ bnd_c4_0 | ~ bnd_c5_0) | bnd_c3_0)) &
% 14.22/13.73 (~ bnd_c7_0 |
% 14.22/13.73 (bnd_ndr1_0 & bnd_c2_1 bnd_a157) &
% 14.22/13.73 (ALL X1.
% 14.22/13.73 bnd_ndr1_1 bnd_a157 -->
% 14.22/13.73 (bnd_c3_2 bnd_a157 X1 | ~ bnd_c9_2 bnd_a157 X1) |
% 14.22/13.73 ~ bnd_c8_2 bnd_a157 X1))) &
% 14.22/13.73 ((~ bnd_c2_0 |
% 14.22/13.73 (ALL X2.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (~ bnd_c7_1 X2 | bnd_c10_1 X2) |
% 14.22/13.73 (ALL X3.
% 14.22/13.73 bnd_ndr1_1 X2 -->
% 14.22/13.73 (~ bnd_c6_2 X2 X3 | bnd_c1_2 X2 X3) | ~ bnd_c4_2 X2 X3))) |
% 14.22/13.73 ~ bnd_c4_0)) &
% 14.22/13.73 ((ALL X4.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (bnd_c3_1 X4 |
% 14.22/13.73 (ALL X5.
% 14.22/13.73 bnd_ndr1_1 X4 -->
% 14.22/13.73 (bnd_c9_2 X4 X5 | bnd_c10_2 X4 X5) | ~ bnd_c3_2 X4 X5)) |
% 14.22/13.73 ((bnd_ndr1_1 X4 & bnd_c9_2 X4 bnd_a158) & ~ bnd_c6_2 X4 bnd_a158) &
% 14.22/13.73 bnd_c5_2 X4 bnd_a158) |
% 14.22/13.73 (ALL X6.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 ((ALL X7.
% 14.22/13.73 bnd_ndr1_1 X6 -->
% 14.22/13.73 (bnd_c8_2 X6 X7 | bnd_c4_2 X6 X7) | bnd_c6_2 X6 X7) |
% 14.22/13.73 bnd_c3_1 X6) |
% 14.22/13.73 (ALL X8.
% 14.22/13.73 bnd_ndr1_1 X6 -->
% 14.22/13.73 (~ bnd_c2_2 X6 X8 | ~ bnd_c4_2 X6 X8) | ~ bnd_c6_2 X6 X8)))) &
% 14.22/13.73 (((ALL X9.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (bnd_c2_1 X9 |
% 14.22/13.73 ((bnd_ndr1_1 X9 & ~ bnd_c8_2 X9 bnd_a159) &
% 14.22/13.73 ~ bnd_c5_2 X9 bnd_a159) &
% 14.22/13.73 bnd_c7_2 X9 bnd_a159) |
% 14.22/13.73 (ALL X10. bnd_ndr1_1 X9 --> bnd_c5_2 X9 X10 | bnd_c10_2 X9 X10)) |
% 14.22/13.73 ((bnd_ndr1_0 & ~ bnd_c7_1 bnd_a160) & bnd_c10_1 bnd_a160) &
% 14.22/13.73 (ALL X11.
% 14.22/13.73 bnd_ndr1_1 bnd_a160 -->
% 14.22/13.73 (~ bnd_c4_2 bnd_a160 X11 | bnd_c2_2 bnd_a160 X11) |
% 14.22/13.73 bnd_c6_2 bnd_a160 X11)) |
% 14.22/13.73 ~ bnd_c4_0)) &
% 14.22/13.73 ((bnd_c3_0 | bnd_c9_0) |
% 14.22/13.73 (ALL X12.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (((bnd_ndr1_1 X12 & ~ bnd_c10_2 X12 bnd_a161) &
% 14.22/13.73 ~ bnd_c3_2 X12 bnd_a161) &
% 14.22/13.73 ~ bnd_c4_2 X12 bnd_a161 |
% 14.22/13.73 ~ bnd_c7_1 X12) |
% 14.22/13.73 (ALL X13.
% 14.22/13.73 bnd_ndr1_1 X12 -->
% 14.22/13.73 (~ bnd_c7_2 X12 X13 | ~ bnd_c9_2 X12 X13) |
% 14.22/13.73 ~ bnd_c2_2 X12 X13)))) &
% 14.22/13.73 (bnd_c8_0 |
% 14.22/13.73 ((bnd_ndr1_0 & bnd_c7_1 bnd_a162) & ~ bnd_c2_1 bnd_a162) &
% 14.22/13.73 (ALL X14.
% 14.22/13.73 bnd_ndr1_1 bnd_a162 -->
% 14.22/13.73 (~ bnd_c1_2 bnd_a162 X14 | ~ bnd_c3_2 bnd_a162 X14) |
% 14.22/13.73 bnd_c2_2 bnd_a162 X14))) &
% 14.22/13.73 ((~ bnd_c9_0 | ~ bnd_c1_0) |
% 14.22/13.73 (((((bnd_ndr1_0 &
% 14.22/13.73 bnd_ndr1_1 bnd_a163) &
% 14.22/13.73 ~ bnd_c5_2 bnd_a163 bnd_a164) &
% 14.22/13.73 bnd_c9_2 bnd_a163 bnd_a164) &
% 14.22/13.73 bnd_c10_2 bnd_a163 bnd_a164) &
% 14.22/13.73 bnd_c1_1 bnd_a163) &
% 14.22/13.73 (ALL X15.
% 14.22/13.73 bnd_ndr1_1 bnd_a163 -->
% 14.22/13.73 (~ bnd_c4_2 bnd_a163 X15 | bnd_c2_2 bnd_a163 X15) |
% 14.22/13.73 ~ bnd_c6_2 bnd_a163 X15))) &
% 14.22/13.73 ((bnd_c9_0 | ~ bnd_c2_0) |
% 14.22/13.73 (((((bnd_ndr1_0 &
% 14.22/13.73 (ALL X16.
% 14.22/13.73 bnd_ndr1_1 bnd_a165 -->
% 14.22/13.73 (bnd_c8_2 bnd_a165 X16 | ~ bnd_c10_2 bnd_a165 X16) |
% 14.22/13.73 ~ bnd_c4_2 bnd_a165 X16)) &
% 14.22/13.73 (ALL X17.
% 14.22/13.73 bnd_ndr1_1 bnd_a165 -->
% 14.22/13.73 (bnd_c3_2 bnd_a165 X17 | ~ bnd_c2_2 bnd_a165 X17) |
% 14.22/13.73 bnd_c5_2 bnd_a165 X17)) &
% 14.22/13.73 bnd_ndr1_1 bnd_a165) &
% 14.22/13.73 ~ bnd_c2_2 bnd_a165 bnd_a166) &
% 14.22/13.73 bnd_c5_2 bnd_a165 bnd_a166) &
% 14.22/13.73 bnd_c3_2 bnd_a165 bnd_a166)) &
% 14.22/13.73 ((((bnd_ndr1_0 & bnd_c2_1 bnd_a167) &
% 14.22/13.73 (ALL X18.
% 14.22/13.73 bnd_ndr1_1 bnd_a167 -->
% 14.22/13.73 (~ bnd_c9_2 bnd_a167 X18 | bnd_c1_2 bnd_a167 X18) |
% 14.22/13.73 bnd_c10_2 bnd_a167 X18)) &
% 14.22/13.73 bnd_c7_1 bnd_a167 |
% 14.22/13.73 bnd_c6_0) |
% 14.22/13.73 bnd_c10_0)) &
% 14.22/13.73 ((bnd_c6_0 |
% 14.22/13.73 ((bnd_ndr1_0 & ~ bnd_c9_1 bnd_a168) &
% 14.22/13.73 bnd_c1_1 bnd_a168) &
% 14.22/13.73 bnd_c8_1 bnd_a168) |
% 14.22/13.73 ~ bnd_c1_0)) &
% 14.22/13.73 ((bnd_c3_0 |
% 14.22/13.73 (ALL X19.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (~ bnd_c7_1 X19 |
% 14.22/13.73 (ALL X20. bnd_ndr1_1 X19 --> bnd_c8_2 X19 X20 | ~ bnd_c7_2 X19 X20)) |
% 14.22/13.73 (ALL X21. bnd_ndr1_1 X19 --> bnd_c7_2 X19 X21 | bnd_c8_2 X19 X21))) |
% 14.22/13.73 (ALL X22.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 ((ALL X23.
% 14.22/13.73 bnd_ndr1_1 X22 -->
% 14.22/13.73 (bnd_c9_2 X22 X23 | bnd_c7_2 X22 X23) | ~ bnd_c6_2 X22 X23) |
% 14.22/13.73 bnd_c9_1 X22) |
% 14.22/13.73 ~ bnd_c5_1 X22))) &
% 14.22/13.73 ((~ bnd_c9_0 | bnd_c8_0) | ~ bnd_c1_0)) &
% 14.22/13.73 ((((bnd_ndr1_0 &
% 14.22/13.73 (ALL X24.
% 14.22/13.73 bnd_ndr1_1 bnd_a169 -->
% 14.22/13.73 ~ bnd_c6_2 bnd_a169 X24 | ~ bnd_c10_2 bnd_a169 X24)) &
% 14.22/13.73 bnd_c2_1 bnd_a169) &
% 14.22/13.73 (ALL X25.
% 14.22/13.73 bnd_ndr1_1 bnd_a169 -->
% 14.22/13.73 (~ bnd_c1_2 bnd_a169 X25 |
% 14.22/13.73 ~ bnd_c9_2 bnd_a169 X25) |
% 14.22/13.73 ~ bnd_c8_2 bnd_a169 X25) |
% 14.22/13.73 ((bnd_ndr1_0 & ~ bnd_c8_1 bnd_a170) &
% 14.22/13.73 (ALL X26.
% 14.22/13.73 bnd_ndr1_1 bnd_a170 -->
% 14.22/13.73 (bnd_c3_2 bnd_a170 X26 |
% 14.22/13.73 ~ bnd_c9_2 bnd_a170 X26) |
% 14.22/13.73 ~ bnd_c10_2 bnd_a170 X26)) &
% 14.22/13.73 bnd_c6_1 bnd_a170) |
% 14.22/13.73 (ALL X27.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 ((ALL X28.
% 14.22/13.73 bnd_ndr1_1 X27 --> bnd_c3_2 X27 X28) |
% 14.22/13.73 ~ bnd_c2_1 X27) |
% 14.22/13.73 (ALL X29.
% 14.22/13.73 bnd_ndr1_1 X27 -->
% 14.22/13.73 (bnd_c9_2 X27 X29 | bnd_c5_2 X27 X29) | bnd_c6_2 X27 X29)))) &
% 14.22/13.73 (((bnd_ndr1_0 &
% 14.22/13.73 (ALL X30.
% 14.22/13.73 bnd_ndr1_1 bnd_a171 -->
% 14.22/13.73 (bnd_c7_2 bnd_a171 X30 |
% 14.22/13.73 bnd_c3_2 bnd_a171 X30) |
% 14.22/13.73 ~ bnd_c10_2 bnd_a171 X30)) &
% 14.22/13.73 ~ bnd_c1_1 bnd_a171) &
% 14.22/13.73 ~ bnd_c8_1 bnd_a171 |
% 14.22/13.73 (bnd_ndr1_0 & ~ bnd_c5_1 bnd_a172) &
% 14.22/13.73 (ALL X31.
% 14.22/13.73 bnd_ndr1_1 bnd_a172 -->
% 14.22/13.73 (~ bnd_c4_2 bnd_a172 X31 |
% 14.22/13.73 bnd_c5_2 bnd_a172 X31) |
% 14.22/13.73 ~ bnd_c8_2 bnd_a172 X31))) &
% 14.22/13.73 ((((bnd_ndr1_0 & bnd_c7_1 bnd_a173) &
% 14.22/13.73 bnd_c6_1 bnd_a173) &
% 14.22/13.73 ~ bnd_c10_1 bnd_a173 |
% 14.22/13.73 ~ bnd_c8_0) |
% 14.22/13.73 ~ bnd_c5_0)) &
% 14.22/13.73 ((((bnd_ndr1_0 & bnd_c9_1 bnd_a174) &
% 14.22/13.73 (ALL X32.
% 14.22/13.73 bnd_ndr1_1 bnd_a174 -->
% 14.22/13.73 (bnd_c4_2 bnd_a174 X32 |
% 14.22/13.73 bnd_c6_2 bnd_a174 X32) |
% 14.22/13.73 ~ bnd_c8_2 bnd_a174 X32)) &
% 14.22/13.73 ~ bnd_c1_1 bnd_a174 |
% 14.22/13.73 ~ bnd_c5_0) |
% 14.22/13.73 (((((bnd_ndr1_0 & bnd_c5_1 bnd_a175) &
% 14.22/13.73 bnd_ndr1_1 bnd_a175) &
% 14.22/13.73 bnd_c10_2 bnd_a175 bnd_a176) &
% 14.22/13.73 ~ bnd_c4_2 bnd_a175 bnd_a176) &
% 14.22/13.73 ~ bnd_c6_2 bnd_a175 bnd_a176) &
% 14.22/13.73 bnd_c1_1 bnd_a175)) &
% 14.22/13.73 ((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a177) &
% 14.22/13.73 ~ bnd_c3_2 bnd_a177 bnd_a178) &
% 14.22/13.73 ~ bnd_c9_2 bnd_a177 bnd_a178) &
% 14.22/13.73 ~ bnd_c7_2 bnd_a177 bnd_a178) &
% 14.22/13.73 (ALL X33.
% 14.22/13.73 bnd_ndr1_1 bnd_a177 -->
% 14.22/13.73 (~ bnd_c2_2 bnd_a177 X33 |
% 14.22/13.73 ~ bnd_c6_2 bnd_a177 X33) |
% 14.22/13.73 ~ bnd_c4_2 bnd_a177 X33)) &
% 14.22/13.73 bnd_c1_1 bnd_a177 |
% 14.22/13.73 bnd_c6_0)) &
% 14.22/13.73 ((ALL X34.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (~ bnd_c9_1 X34 | bnd_c3_1 X34) |
% 14.22/13.73 ~ bnd_c2_1 X34) |
% 14.22/13.73 (ALL X35.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (ALL X36.
% 14.22/13.73 bnd_ndr1_1 X35 -->
% 14.22/13.73 (~ bnd_c4_2 X35 X36 | bnd_c6_2 X35 X36) |
% 14.22/13.73 ~ bnd_c1_2 X35 X36) |
% 14.22/13.73 bnd_c2_1 X35))) &
% 14.22/13.73 (((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a179) &
% 14.22/13.73 ~ bnd_c8_2 bnd_a179 bnd_a180) &
% 14.22/13.73 bnd_c5_2 bnd_a179 bnd_a180) &
% 14.22/13.73 bnd_c10_2 bnd_a179 bnd_a180) &
% 14.22/13.73 bnd_ndr1_1 bnd_a179) &
% 14.22/13.73 bnd_c3_2 bnd_a179 bnd_a181) &
% 14.22/13.73 bnd_c5_2 bnd_a179 bnd_a181) &
% 14.22/13.73 ~ bnd_c9_1 bnd_a179 |
% 14.22/13.73 (ALL X37.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 ((bnd_ndr1_1 X37 & ~ bnd_c9_2 X37 bnd_a182) &
% 14.22/13.73 ~ bnd_c2_2 X37 bnd_a182 |
% 14.22/13.73 (ALL X38.
% 14.22/13.73 bnd_ndr1_1 X37 -->
% 14.22/13.73 (bnd_c3_2 X37 X38 | bnd_c10_2 X37 X38) |
% 14.22/13.73 bnd_c7_2 X37 X38)) |
% 14.22/13.73 (ALL X39.
% 14.22/13.73 bnd_ndr1_1 X37 -->
% 14.22/13.73 bnd_c3_2 X37 X39 | ~ bnd_c6_2 X37 X39))) |
% 14.22/13.73 (ALL X40.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (bnd_c4_1 X40 | ~ bnd_c7_1 X40) |
% 14.22/13.73 bnd_c8_1 X40))) &
% 14.22/13.73 (((ALL X41.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (bnd_c5_1 X41 |
% 14.22/13.73 ((bnd_ndr1_1 X41 & ~ bnd_c2_2 X41 bnd_a183) &
% 14.22/13.73 ~ bnd_c6_2 X41 bnd_a183) &
% 14.22/13.73 ~ bnd_c1_2 X41 bnd_a183) |
% 14.22/13.73 bnd_c3_1 X41) |
% 14.22/13.73 ~ bnd_c7_0) |
% 14.22/13.73 (ALL X42.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (((bnd_ndr1_1 X42 & bnd_c9_2 X42 bnd_a184) &
% 14.22/13.73 ~ bnd_c7_2 X42 bnd_a184) &
% 14.22/13.73 ~ bnd_c5_2 X42 bnd_a184 |
% 14.22/13.73 (ALL X43.
% 14.22/13.73 bnd_ndr1_1 X42 -->
% 14.22/13.73 (bnd_c9_2 X42 X43 | ~ bnd_c1_2 X42 X43) |
% 14.22/13.73 ~ bnd_c6_2 X42 X43)) |
% 14.22/13.73 ~ bnd_c4_1 X42))) &
% 14.22/13.73 (((ALL X44.
% 14.22/13.73 bnd_ndr1_0 --> bnd_c4_1 X44 | bnd_c5_1 X44) |
% 14.22/13.73 ~ bnd_c9_0) |
% 14.22/13.73 bnd_c5_0)) &
% 14.22/13.73 (((ALL X45.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (~ bnd_c10_1 X45 |
% 14.22/13.73 (ALL X46.
% 14.22/13.73 bnd_ndr1_1 X45 -->
% 14.22/13.73 (bnd_c2_2 X45 X46 | ~ bnd_c4_2 X45 X46) |
% 14.22/13.73 ~ bnd_c10_2 X45 X46)) |
% 14.22/13.73 ~ bnd_c5_1 X45) |
% 14.22/13.73 bnd_c2_0) |
% 14.22/13.73 ~ bnd_c6_0)) &
% 14.22/13.73 ((((bnd_ndr1_0 & bnd_c5_1 bnd_a185) &
% 14.22/13.73 (ALL X47.
% 14.22/13.73 bnd_ndr1_1 bnd_a185 -->
% 14.22/13.73 (~ bnd_c10_2 bnd_a185 X47 |
% 14.22/13.73 ~ bnd_c8_2 bnd_a185 X47) |
% 14.22/13.73 ~ bnd_c9_2 bnd_a185 X47)) &
% 14.22/13.73 ~ bnd_c1_1 bnd_a185 |
% 14.22/13.73 bnd_c5_0) |
% 14.22/13.73 (ALL X48.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (bnd_c6_1 X48 |
% 14.22/13.73 ((bnd_ndr1_1 X48 & bnd_c9_2 X48 bnd_a186) &
% 14.22/13.73 ~ bnd_c3_2 X48 bnd_a186) &
% 14.22/13.73 ~ bnd_c2_2 X48 bnd_a186) |
% 14.22/13.73 ~ bnd_c5_1 X48))) &
% 14.22/13.73 ((bnd_c3_0 | ~ bnd_c8_0) |
% 14.22/13.73 (ALL X49.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (((bnd_ndr1_1 X49 & ~ bnd_c7_2 X49 bnd_a187) &
% 14.22/13.73 ~ bnd_c1_2 X49 bnd_a187) &
% 14.22/13.73 ~ bnd_c2_2 X49 bnd_a187 |
% 14.22/13.73 ~ bnd_c7_1 X49) |
% 14.22/13.73 ((bnd_ndr1_1 X49 & bnd_c1_2 X49 bnd_a188) &
% 14.22/13.73 bnd_c9_2 X49 bnd_a188) &
% 14.22/13.73 bnd_c3_2 X49 bnd_a188))) &
% 14.22/13.73 (((ALL X50.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 ((ALL X51.
% 14.22/13.73 bnd_ndr1_1 X50 -->
% 14.22/13.73 (bnd_c7_2 X50 X51 | ~ bnd_c9_2 X50 X51) |
% 14.22/13.73 ~ bnd_c10_2 X50 X51) |
% 14.22/13.73 (ALL X52.
% 14.22/13.73 bnd_ndr1_1 X50 -->
% 14.22/13.73 (~ bnd_c9_2 X50 X52 | bnd_c5_2 X50 X52) |
% 14.22/13.73 ~ bnd_c4_2 X50 X52)) |
% 14.22/13.73 ~ bnd_c8_1 X50) |
% 14.22/13.73 ~ bnd_c7_0) |
% 14.22/13.73 ~ bnd_c6_0)) &
% 14.22/13.73 (((ALL X53.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (bnd_c8_1 X53 |
% 14.22/13.73 (ALL X54.
% 14.22/13.73 bnd_ndr1_1 X53 -->
% 14.22/13.73 ~ bnd_c10_2 X53 X54 | bnd_c6_2 X53 X54)) |
% 14.22/13.73 bnd_c6_1 X53) |
% 14.22/13.73 ((bnd_ndr1_0 & bnd_c1_1 bnd_a189) &
% 14.22/13.73 ~ bnd_c5_1 bnd_a189) &
% 14.22/13.73 ~ bnd_c3_1 bnd_a189) |
% 14.22/13.73 (ALL X55.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (~ bnd_c10_1 X55 |
% 14.22/13.73 (ALL X56.
% 14.22/13.73 bnd_ndr1_1 X55 -->
% 14.22/13.73 ~ bnd_c8_2 X55 X56 | ~ bnd_c2_2 X55 X56)) |
% 14.22/13.73 ~ bnd_c3_1 X55))) &
% 14.22/13.73 ((bnd_c7_0 |
% 14.22/13.73 (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a190) &
% 14.22/13.73 bnd_c3_2 bnd_a190 bnd_a191) &
% 14.22/13.73 ~ bnd_c8_2 bnd_a190 bnd_a191) &
% 14.22/13.73 bnd_c7_2 bnd_a190 bnd_a191) &
% 14.22/13.73 bnd_ndr1_1 bnd_a190) &
% 14.22/13.73 ~ bnd_c10_2 bnd_a190 bnd_a192) &
% 14.22/13.73 ~ bnd_c8_2 bnd_a190 bnd_a192) &
% 14.22/13.73 bnd_c4_2 bnd_a190 bnd_a192) |
% 14.22/13.73 ~ bnd_c10_0)) &
% 14.22/13.73 ((~ bnd_c4_0 |
% 14.22/13.73 (ALL X57.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (~ bnd_c9_1 X57 |
% 14.22/13.73 (ALL X58.
% 14.22/13.73 bnd_ndr1_1 X57 -->
% 14.22/13.73 bnd_c8_2 X57 X58 | ~ bnd_c10_2 X57 X58)) |
% 14.22/13.73 bnd_c4_1 X57)) |
% 14.22/13.73 bnd_c10_0)) &
% 14.22/13.73 ((~ bnd_c10_0 |
% 14.22/13.73 (ALL X59.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (~ bnd_c2_1 X59 | ~ bnd_c3_1 X59) |
% 14.22/13.73 ((bnd_ndr1_1 X59 & ~ bnd_c6_2 X59 bnd_a193) &
% 14.22/13.73 ~ bnd_c3_2 X59 bnd_a193) &
% 14.22/13.73 ~ bnd_c10_2 X59 bnd_a193)) |
% 14.22/13.73 (ALL X60.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (((bnd_ndr1_1 X60 & bnd_c9_2 X60 bnd_a194) &
% 14.22/13.73 ~ bnd_c3_2 X60 bnd_a194) &
% 14.22/13.73 ~ bnd_c1_2 X60 bnd_a194 |
% 14.22/13.73 ~ bnd_c10_1 X60) |
% 14.22/13.73 bnd_c8_1 X60))) &
% 14.22/13.73 (((((((bnd_ndr1_0 & bnd_c7_1 bnd_a195) & bnd_c2_1 bnd_a195) &
% 14.22/13.73 bnd_ndr1_1 bnd_a195) &
% 14.22/13.73 bnd_c10_2 bnd_a195 bnd_a196) &
% 14.22/13.73 bnd_c2_2 bnd_a195 bnd_a196) &
% 14.22/13.73 ~ bnd_c1_2 bnd_a195 bnd_a196 |
% 14.22/13.73 bnd_c1_0) |
% 14.22/13.73 ~ bnd_c6_0)) &
% 14.22/13.73 (((ALL X61.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 ((ALL X62.
% 14.22/13.73 bnd_ndr1_1 X61 -->
% 14.22/13.73 (bnd_c6_2 X61 X62 | bnd_c2_2 X61 X62) |
% 14.22/13.73 bnd_c10_2 X61 X62) |
% 14.22/13.73 ((bnd_ndr1_1 X61 & ~ bnd_c7_2 X61 bnd_a197) &
% 14.22/13.73 ~ bnd_c8_2 X61 bnd_a197) &
% 14.22/13.73 ~ bnd_c5_2 X61 bnd_a197) |
% 14.22/13.73 ~ bnd_c9_1 X61) |
% 14.22/13.73 (ALL X63.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (bnd_c6_1 X63 |
% 14.22/13.73 ((bnd_ndr1_1 X63 & bnd_c7_2 X63 bnd_a198) &
% 14.22/13.73 bnd_c6_2 X63 bnd_a198) &
% 14.22/13.73 ~ bnd_c5_2 X63 bnd_a198) |
% 14.22/13.73 ((bnd_ndr1_1 X63 & bnd_c7_2 X63 bnd_a199) &
% 14.22/13.73 bnd_c10_2 X63 bnd_a199) &
% 14.22/13.73 bnd_c9_2 X63 bnd_a199)) |
% 14.22/13.73 ~ bnd_c6_0)) &
% 14.22/13.73 ((((((((((bnd_ndr1_0 &
% 14.22/13.73 (ALL X64.
% 14.22/13.73 bnd_ndr1_1 bnd_a200 -->
% 14.22/13.73 bnd_c4_2 bnd_a200 X64 | ~ bnd_c6_2 bnd_a200 X64)) &
% 14.22/13.73 bnd_ndr1_1 bnd_a200) &
% 14.22/13.73 ~ bnd_c7_2 bnd_a200 bnd_a201) &
% 14.22/13.73 bnd_c5_2 bnd_a200 bnd_a201) &
% 14.22/13.73 ~ bnd_c8_2 bnd_a200 bnd_a201) &
% 14.22/13.73 bnd_ndr1_1 bnd_a200) &
% 14.22/13.73 bnd_c2_2 bnd_a200 bnd_a202) &
% 14.22/13.73 bnd_c3_2 bnd_a200 bnd_a202) &
% 14.22/13.73 bnd_c9_2 bnd_a200 bnd_a202 |
% 14.22/13.73 (ALL X65.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (((bnd_ndr1_1 X65 & bnd_c7_2 X65 bnd_a203) &
% 14.22/13.73 ~ bnd_c3_2 X65 bnd_a203) &
% 14.22/13.73 bnd_c10_2 X65 bnd_a203 |
% 14.22/13.73 bnd_c1_1 X65) |
% 14.22/13.73 bnd_c6_1 X65)) |
% 14.22/13.73 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a204) &
% 14.22/13.73 bnd_c6_2 bnd_a204 bnd_a205) &
% 14.22/13.73 ~ bnd_c9_2 bnd_a204 bnd_a205) &
% 14.22/13.73 ~ bnd_c3_2 bnd_a204 bnd_a205) &
% 14.22/13.73 (ALL X66.
% 14.22/13.73 bnd_ndr1_1 bnd_a204 -->
% 14.22/13.73 (~ bnd_c8_2 bnd_a204 X66 | ~ bnd_c3_2 bnd_a204 X66) |
% 14.22/13.73 bnd_c7_2 bnd_a204 X66)) &
% 14.22/13.73 ~ bnd_c10_1 bnd_a204)) &
% 14.22/13.73 ((bnd_c9_0 | bnd_c1_0) | ~ bnd_c8_0)) &
% 14.22/13.73 ((((bnd_ndr1_0 & ~ bnd_c5_1 bnd_a206) &
% 14.22/13.73 (ALL X67.
% 14.22/13.73 bnd_ndr1_1 bnd_a206 -->
% 14.22/13.73 (~ bnd_c4_2 bnd_a206 X67 | bnd_c2_2 bnd_a206 X67) |
% 14.22/13.73 bnd_c6_2 bnd_a206 X67)) &
% 14.22/13.73 (ALL X68.
% 14.22/13.73 bnd_ndr1_1 bnd_a206 -->
% 14.22/13.73 bnd_c9_2 bnd_a206 X68 | bnd_c8_2 bnd_a206 X68) |
% 14.22/13.73 ((bnd_ndr1_0 & bnd_c6_1 bnd_a207) & bnd_c9_1 bnd_a207) &
% 14.22/13.73 bnd_c1_1 bnd_a207) |
% 14.22/13.73 ~ bnd_c7_0)) &
% 14.22/13.73 ((bnd_c4_0 |
% 14.22/13.73 (ALL X69.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 ((bnd_ndr1_1 X69 & ~ bnd_c4_2 X69 bnd_a208) &
% 14.22/13.73 bnd_c9_2 X69 bnd_a208 |
% 14.22/13.73 ~ bnd_c5_1 X69) |
% 14.22/13.73 bnd_c10_1 X69)) |
% 14.22/13.73 ~ bnd_c6_0)) &
% 14.22/13.73 ((bnd_c7_0 |
% 14.22/13.73 (ALL X70.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 ((ALL X71.
% 14.22/13.73 bnd_ndr1_1 X70 -->
% 14.22/13.73 (~ bnd_c8_2 X70 X71 | ~ bnd_c4_2 X70 X71) |
% 14.22/13.73 ~ bnd_c2_2 X70 X71) |
% 14.22/13.73 (ALL X72.
% 14.22/13.73 bnd_ndr1_1 X70 -->
% 14.22/13.73 (bnd_c4_2 X70 X72 | ~ bnd_c9_2 X70 X72) |
% 14.22/13.73 ~ bnd_c10_2 X70 X72)) |
% 14.22/13.73 ((bnd_ndr1_1 X70 & bnd_c10_2 X70 bnd_a209) &
% 14.22/13.73 ~ bnd_c2_2 X70 bnd_a209) &
% 14.22/13.73 ~ bnd_c4_2 X70 bnd_a209)) |
% 14.22/13.73 ~ bnd_c10_0)) &
% 14.22/13.73 (((ALL X73.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (((bnd_ndr1_1 X73 & ~ bnd_c1_2 X73 bnd_a210) &
% 14.22/13.73 bnd_c7_2 X73 bnd_a210) &
% 14.22/13.73 bnd_c3_2 X73 bnd_a210 |
% 14.22/13.73 bnd_c3_1 X73) |
% 14.22/13.73 ((bnd_ndr1_1 X73 & bnd_c9_2 X73 bnd_a211) &
% 14.22/13.73 ~ bnd_c4_2 X73 bnd_a211) &
% 14.22/13.73 ~ bnd_c2_2 X73 bnd_a211) |
% 14.22/13.73 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a212) &
% 14.22/13.73 bnd_c5_2 bnd_a212 bnd_a213) &
% 14.22/13.73 ~ bnd_c8_2 bnd_a212 bnd_a213) &
% 14.22/13.73 bnd_c4_2 bnd_a212 bnd_a213) &
% 14.22/13.73 (ALL X74.
% 14.22/13.73 bnd_ndr1_1 bnd_a212 -->
% 14.22/13.73 (bnd_c7_2 bnd_a212 X74 | bnd_c9_2 bnd_a212 X74) |
% 14.22/13.73 ~ bnd_c5_2 bnd_a212 X74)) &
% 14.22/13.73 (ALL X75.
% 14.22/13.73 bnd_ndr1_1 bnd_a212 -->
% 14.22/13.73 (~ bnd_c8_2 bnd_a212 X75 | ~ bnd_c5_2 bnd_a212 X75) |
% 14.22/13.73 ~ bnd_c4_2 bnd_a212 X75)) |
% 14.22/13.73 (ALL X76.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 ((bnd_ndr1_1 X76 & ~ bnd_c4_2 X76 bnd_a214) &
% 14.22/13.73 ~ bnd_c6_2 X76 bnd_a214) &
% 14.22/13.73 bnd_c8_2 X76 bnd_a214 |
% 14.22/13.73 ~ bnd_c5_1 X76))) &
% 14.22/13.73 ((((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a215) &
% 14.22/13.73 (ALL X77.
% 14.22/13.73 bnd_ndr1_1 bnd_a215 -->
% 14.22/13.73 ~ bnd_c4_2 bnd_a215 X77 | ~ bnd_c5_2 bnd_a215 X77)) &
% 14.22/13.73 bnd_c8_1 bnd_a215 |
% 14.22/13.73 (((((bnd_ndr1_0 &
% 14.22/13.73 (ALL X78.
% 14.22/13.73 bnd_ndr1_1 bnd_a216 -->
% 14.22/13.73 (bnd_c10_2 bnd_a216 X78 | bnd_c1_2 bnd_a216 X78) |
% 14.22/13.73 bnd_c3_2 bnd_a216 X78)) &
% 14.22/13.73 (ALL X79.
% 14.22/13.73 bnd_ndr1_1 bnd_a216 -->
% 14.22/13.73 (~ bnd_c6_2 bnd_a216 X79 | bnd_c5_2 bnd_a216 X79) |
% 14.22/13.73 bnd_c8_2 bnd_a216 X79)) &
% 14.22/13.73 bnd_ndr1_1 bnd_a216) &
% 14.22/13.73 ~ bnd_c6_2 bnd_a216 bnd_a217) &
% 14.22/13.73 bnd_c10_2 bnd_a216 bnd_a217) &
% 14.22/13.73 ~ bnd_c8_2 bnd_a216 bnd_a217) |
% 14.22/13.73 ~ bnd_c10_0)) &
% 14.22/13.73 (bnd_c5_0 | ~ bnd_c6_0)) &
% 14.22/13.73 (((ALL X80. bnd_ndr1_0 --> bnd_c4_1 X80 | ~ bnd_c7_1 X80) | bnd_c2_0) |
% 14.22/13.73 bnd_c1_0)) &
% 14.22/13.73 (((ALL X81.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 ((ALL X82.
% 14.22/13.73 bnd_ndr1_1 X81 --> ~ bnd_c9_2 X81 X82 | ~ bnd_c7_2 X81 X82) |
% 14.22/13.73 bnd_c10_1 X81) |
% 14.22/13.73 ((bnd_ndr1_1 X81 & ~ bnd_c5_2 X81 bnd_a218) &
% 14.22/13.73 bnd_c1_2 X81 bnd_a218) &
% 14.22/13.73 bnd_c7_2 X81 bnd_a218) |
% 14.22/13.73 (bnd_ndr1_0 & ~ bnd_c7_1 bnd_a219) & ~ bnd_c5_1 bnd_a219) |
% 14.22/13.73 ~ bnd_c3_0)) &
% 14.22/13.73 ((bnd_c2_0 | ~ bnd_c1_0) | ~ bnd_c3_0)) &
% 14.22/13.73 ((~ bnd_c9_0 | bnd_c5_0) |
% 14.22/13.73 (ALL X83.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 ((ALL X84. bnd_ndr1_1 X83 --> bnd_c7_2 X83 X84 | ~ bnd_c3_2 X83 X84) |
% 14.22/13.73 bnd_c6_1 X83) |
% 14.22/13.73 ~ bnd_c1_1 X83))) &
% 14.22/13.73 ((~ bnd_c4_0 |
% 14.22/13.73 (ALL X85.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (~ bnd_c9_1 X85 | bnd_c10_1 X85) |
% 14.22/13.73 ((bnd_ndr1_1 X85 & ~ bnd_c2_2 X85 bnd_a220) &
% 14.22/13.73 ~ bnd_c4_2 X85 bnd_a220) &
% 14.22/13.73 ~ bnd_c9_2 X85 bnd_a220)) |
% 14.22/13.73 ~ bnd_c3_0)) &
% 14.22/13.73 (((ALL X86.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 ~ bnd_c7_1 X86 |
% 14.22/13.73 ((bnd_ndr1_1 X86 & bnd_c1_2 X86 bnd_a221) & bnd_c5_2 X86 bnd_a221) &
% 14.22/13.73 ~ bnd_c8_2 X86 bnd_a221) |
% 14.22/13.73 (ALL X87.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (bnd_c3_1 X87 | bnd_c5_1 X87) |
% 14.22/13.73 (ALL X88.
% 14.22/13.73 bnd_ndr1_1 X87 -->
% 14.22/13.73 (bnd_c8_2 X87 X88 | ~ bnd_c4_2 X87 X88) | ~ bnd_c7_2 X87 X88))) |
% 14.22/13.73 ~ bnd_c8_0)) &
% 14.22/13.73 (((bnd_ndr1_0 & bnd_c1_1 bnd_a222) &
% 14.22/13.73 bnd_c4_1 bnd_a222 |
% 14.22/13.73 ~ bnd_c7_0) |
% 14.22/13.73 (ALL X89.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (((bnd_ndr1_1 X89 & bnd_c10_2 X89 bnd_a223) & bnd_c9_2 X89 bnd_a223) &
% 14.22/13.73 ~ bnd_c6_2 X89 bnd_a223 |
% 14.22/13.73 (ALL X90.
% 14.22/13.73 bnd_ndr1_1 X89 -->
% 14.22/13.73 (bnd_c1_2 X89 X90 | ~ bnd_c7_2 X89 X90) | bnd_c9_2 X89 X90)) |
% 14.22/13.73 bnd_c10_1 X89))) &
% 14.22/13.73 ((bnd_c10_0 |
% 14.22/13.73 (((((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a224) &
% 14.22/13.73 (ALL X91.
% 14.22/13.73 bnd_ndr1_1 bnd_a224 -->
% 14.22/13.73 (bnd_c4_2 bnd_a224 X91 | ~ bnd_c9_2 bnd_a224 X91) |
% 14.22/13.73 bnd_c8_2 bnd_a224 X91)) &
% 14.22/13.73 bnd_ndr1_1 bnd_a224) &
% 14.22/13.73 bnd_c3_2 bnd_a224 bnd_a225) &
% 14.22/13.73 ~ bnd_c4_2 bnd_a224 bnd_a225) &
% 14.22/13.73 bnd_c9_2 bnd_a224 bnd_a225) |
% 14.22/13.73 (ALL X92.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (bnd_c8_1 X92 |
% 14.22/13.73 ((bnd_ndr1_1 X92 & bnd_c3_2 X92 bnd_a226) & ~ bnd_c4_2 X92 bnd_a226) &
% 14.22/13.73 ~ bnd_c8_2 X92 bnd_a226) |
% 14.22/13.73 ((bnd_ndr1_1 X92 & bnd_c10_2 X92 bnd_a227) & ~ bnd_c1_2 X92 bnd_a227) &
% 14.22/13.73 ~ bnd_c7_2 X92 bnd_a227))) &
% 14.22/13.73 ((bnd_c4_0 | ~ bnd_c8_0) | ~ bnd_c3_0)) &
% 14.22/13.73 ((ALL X93.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 ((ALL X94.
% 14.22/13.73 bnd_ndr1_1 X93 --> ~ bnd_c8_2 X93 X94 | ~ bnd_c10_2 X93 X94) |
% 14.22/13.73 (bnd_ndr1_1 X93 & ~ bnd_c10_2 X93 bnd_a228) & ~ bnd_c1_2 X93 bnd_a228) |
% 14.22/13.73 bnd_c8_1 X93) |
% 14.22/13.73 (ALL X95.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 ((bnd_ndr1_1 X95 &
% 14.22/13.73 bnd_c2_2 X95 bnd_a229) &
% 14.22/13.73 ~ bnd_c7_2 X95 bnd_a229 |
% 14.22/13.73 bnd_c2_1 X95) |
% 14.22/13.73 bnd_c9_1 X95))) &
% 14.22/13.73 (((ALL X96.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (((bnd_ndr1_1 X96 &
% 14.22/13.73 bnd_c7_2 X96 bnd_a230) &
% 14.22/13.73 bnd_c6_2 X96 bnd_a230) &
% 14.22/13.73 ~ bnd_c3_2 X96 bnd_a230 |
% 14.22/13.73 bnd_c10_1 X96) |
% 14.22/13.73 ((bnd_ndr1_1 X96 &
% 14.22/13.73 ~ bnd_c8_2 X96 bnd_a231) &
% 14.22/13.73 ~ bnd_c1_2 X96 bnd_a231) &
% 14.22/13.73 bnd_c2_2 X96 bnd_a231) |
% 14.22/13.73 ((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a232) &
% 14.22/13.73 ~ bnd_c7_2 bnd_a232 bnd_a233) &
% 14.22/13.73 bnd_c8_2 bnd_a232 bnd_a233) &
% 14.22/13.73 (ALL X97.
% 14.22/13.73 bnd_ndr1_1 bnd_a232 -->
% 14.22/13.73 (~ bnd_c3_2 bnd_a232 X97 | ~ bnd_c6_2 bnd_a232 X97) |
% 14.22/13.73 ~ bnd_c9_2 bnd_a232 X97)) &
% 14.22/13.73 bnd_c6_1 bnd_a232) |
% 14.22/13.73 ~ bnd_c10_0)) &
% 14.22/13.73 ((~ bnd_c8_0 |
% 14.22/13.73 (bnd_ndr1_0 & bnd_c9_1 bnd_a234) &
% 14.22/13.73 ~ bnd_c1_1 bnd_a234) |
% 14.22/13.73 bnd_c4_0)) &
% 14.22/13.73 (((ALL X98.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (~ bnd_c7_1 X98 | ~ bnd_c5_1 X98) |
% 14.22/13.73 (ALL X99.
% 14.22/13.73 bnd_ndr1_1 X98 -->
% 14.22/13.73 (~ bnd_c4_2 X98 X99 | ~ bnd_c5_2 X98 X99) | ~ bnd_c10_2 X98 X99)) |
% 14.22/13.73 (bnd_ndr1_0 & bnd_c8_1 bnd_a235) &
% 14.22/13.73 ~ bnd_c5_1 bnd_a235) |
% 14.22/13.73 bnd_c4_0)) &
% 14.22/13.73 (bnd_c8_0 | bnd_c7_0)) &
% 14.22/13.73 (((ALL X100.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (~ bnd_c5_1 X100 | bnd_c10_1 X100) |
% 14.22/13.73 (ALL X101.
% 14.22/13.73 bnd_ndr1_1 X100 -->
% 14.22/13.73 (bnd_c7_2 X100 X101 |
% 14.22/13.73 ~ bnd_c3_2 X100 X101) |
% 14.22/13.73 bnd_c6_2 X100 X101)) |
% 14.22/13.73 (ALL X102.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (~ bnd_c10_1 X102 |
% 14.22/13.73 (ALL X103.
% 14.22/13.73 bnd_ndr1_1 X102 -->
% 14.22/13.73 (~ bnd_c6_2 X102 X103 | ~ bnd_c3_2 X102 X103) | bnd_c9_2 X102 X103)) |
% 14.22/13.73 bnd_c5_1 X102)) |
% 14.22/13.73 ~ bnd_c8_0)) &
% 14.22/13.73 ((~ bnd_c5_0 | ~ bnd_c2_0) |
% 14.22/13.73 (ALL X104.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (ALL X105.
% 14.22/13.73 bnd_ndr1_1 X104 -->
% 14.22/13.73 bnd_c10_2 X104 X105 |
% 14.22/13.73 bnd_c1_2 X104 X105) |
% 14.22/13.73 (ALL X106.
% 14.22/13.73 bnd_ndr1_1 X104 -->
% 14.22/13.73 ~ bnd_c10_2 X104 X106 |
% 14.22/13.73 bnd_c6_2 X104 X106)))) &
% 14.22/13.73 (((ALL X107.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (~ bnd_c7_1 X107 |
% 14.22/13.73 ((bnd_ndr1_1 X107 &
% 14.22/13.73 ~ bnd_c8_2 X107 bnd_a236) &
% 14.22/13.73 ~ bnd_c6_2 X107 bnd_a236) &
% 14.22/13.73 ~ bnd_c10_2 X107 bnd_a236) |
% 14.22/13.73 (ALL X108.
% 14.22/13.73 bnd_ndr1_1 X107 -->
% 14.22/13.73 (~ bnd_c10_2 X107 X108 |
% 14.22/13.73 ~ bnd_c2_2 X107 X108) |
% 14.22/13.73 bnd_c8_2 X107 X108)) |
% 14.22/13.73 (((((bnd_ndr1_0 &
% 14.22/13.73 (ALL X109.
% 14.22/13.73 bnd_ndr1_1 bnd_a237 -->
% 14.22/13.73 (~ bnd_c5_2 bnd_a237 X109 |
% 14.22/13.73 ~ bnd_c6_2 bnd_a237 X109) |
% 14.22/13.73 ~ bnd_c4_2 bnd_a237 X109)) &
% 14.22/13.73 bnd_ndr1_1 bnd_a237) &
% 14.22/13.73 ~ bnd_c7_2 bnd_a237 bnd_a238) &
% 14.22/13.73 bnd_c2_2 bnd_a237 bnd_a238) &
% 14.22/13.73 bnd_c4_2 bnd_a237 bnd_a238) &
% 14.22/13.73 (ALL X110.
% 14.22/13.73 bnd_ndr1_1 bnd_a237 -->
% 14.22/13.73 (~ bnd_c2_2 bnd_a237 X110 |
% 14.22/13.73 bnd_c3_2 bnd_a237 X110) |
% 14.22/13.73 bnd_c1_2 bnd_a237 X110)) |
% 14.22/13.73 ~ bnd_c9_0)) &
% 14.22/13.73 ((bnd_c9_0 |
% 14.22/13.73 ((bnd_ndr1_0 & bnd_c2_1 bnd_a239) &
% 14.22/13.73 (ALL X111.
% 14.22/13.73 bnd_ndr1_1 bnd_a239 -->
% 14.22/13.73 (~ bnd_c2_2 bnd_a239 X111 |
% 14.22/13.73 ~ bnd_c10_2 bnd_a239 X111) |
% 14.22/13.73 bnd_c3_2 bnd_a239 X111)) &
% 14.22/13.73 ~ bnd_c10_1 bnd_a239) |
% 14.22/13.73 (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a240) &
% 14.22/13.73 ~ bnd_c4_2 bnd_a240 bnd_a241) &
% 14.22/13.73 bnd_c3_2 bnd_a240 bnd_a241) &
% 14.22/13.73 bnd_c9_2 bnd_a240 bnd_a241) &
% 14.22/13.73 bnd_ndr1_1 bnd_a240) &
% 14.22/13.73 ~ bnd_c7_2 bnd_a240 bnd_a242) &
% 14.22/13.73 bnd_c8_2 bnd_a240 bnd_a242) &
% 14.22/13.73 (ALL X112.
% 14.22/13.73 bnd_ndr1_1 bnd_a240 -->
% 14.22/13.73 (~ bnd_c5_2 bnd_a240 X112 |
% 14.22/13.73 ~ bnd_c9_2 bnd_a240 X112) |
% 14.22/13.73 ~ bnd_c1_2 bnd_a240 X112))) &
% 14.22/13.73 ((bnd_c7_0 |
% 14.22/13.73 (ALL X113.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (ALL X114.
% 14.22/13.73 bnd_ndr1_1 X113 -->
% 14.22/13.73 (bnd_c7_2 X113 X114 | bnd_c8_2 X113 X114) |
% 14.22/13.73 bnd_c1_2 X113 X114))) |
% 14.22/13.73 bnd_c1_0)) &
% 14.22/13.73 ((ALL X115.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (bnd_c3_1 X115 |
% 14.22/13.73 ((bnd_ndr1_1 X115 & ~ bnd_c5_2 X115 bnd_a243) &
% 14.22/13.73 ~ bnd_c3_2 X115 bnd_a243) &
% 14.22/13.73 bnd_c8_2 X115 bnd_a243) |
% 14.22/13.73 ~ bnd_c1_1 X115) |
% 14.22/13.73 (ALL X116.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (((bnd_ndr1_1 X116 & ~ bnd_c3_2 X116 bnd_a244) &
% 14.22/13.73 ~ bnd_c8_2 X116 bnd_a244) &
% 14.22/13.73 bnd_c5_2 X116 bnd_a244 |
% 14.22/13.73 (ALL X117.
% 14.22/13.73 bnd_ndr1_1 X116 -->
% 14.22/13.73 (bnd_c4_2 X116 X117 |
% 14.22/13.73 ~ bnd_c8_2 X116 X117) |
% 14.22/13.73 bnd_c7_2 X116 X117)) |
% 14.22/13.73 (ALL X118.
% 14.22/13.73 bnd_ndr1_1 X116 -->
% 14.22/13.73 (bnd_c4_2 X116 X118 | bnd_c7_2 X116 X118) |
% 14.22/13.73 ~ bnd_c9_2 X116 X118)))) &
% 14.22/13.73 ((~ bnd_c9_0 | bnd_c7_0) |
% 14.22/13.73 ((bnd_ndr1_0 & bnd_c9_1 bnd_a245) &
% 14.22/13.73 bnd_c5_1 bnd_a245) &
% 14.22/13.73 (ALL X119.
% 14.22/13.73 bnd_ndr1_1 bnd_a245 -->
% 14.22/13.73 (~ bnd_c10_2 bnd_a245 X119 |
% 14.22/13.73 ~ bnd_c7_2 bnd_a245 X119) |
% 14.22/13.73 bnd_c9_2 bnd_a245 X119))) &
% 14.22/13.73 ((bnd_c10_0 | ~ bnd_c4_0) |
% 14.22/13.73 ((bnd_ndr1_0 &
% 14.22/13.73 (ALL X120.
% 14.22/13.73 bnd_ndr1_1 bnd_a246 -->
% 14.22/13.73 (~ bnd_c5_2 bnd_a246 X120 |
% 14.22/13.73 ~ bnd_c9_2 bnd_a246 X120) |
% 14.22/13.73 bnd_c10_2 bnd_a246 X120)) &
% 14.22/13.73 (ALL X121.
% 14.22/13.73 bnd_ndr1_1 bnd_a246 -->
% 14.22/13.73 (bnd_c7_2 bnd_a246 X121 |
% 14.22/13.73 bnd_c6_2 bnd_a246 X121) |
% 14.22/13.73 bnd_c5_2 bnd_a246 X121)) &
% 14.22/13.73 ~ bnd_c1_1 bnd_a246)) &
% 14.22/13.73 ((bnd_c4_0 | bnd_c1_0) | ~ bnd_c8_0)) &
% 14.22/13.73 ((~ bnd_c9_0 |
% 14.22/13.73 ((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a247) &
% 14.22/13.73 bnd_c5_2 bnd_a247 bnd_a248) &
% 14.22/13.73 ~ bnd_c6_2 bnd_a247 bnd_a248) &
% 14.22/13.73 bnd_c3_2 bnd_a247 bnd_a248) &
% 14.22/13.73 bnd_ndr1_1 bnd_a247) &
% 14.22/13.73 ~ bnd_c6_2 bnd_a247 bnd_a249) &
% 14.22/13.73 ~ bnd_c10_2 bnd_a247 bnd_a249) &
% 14.22/13.73 ~ bnd_c4_2 bnd_a247 bnd_a249) &
% 14.22/13.73 ~ bnd_c8_1 bnd_a247) |
% 14.22/13.73 bnd_c7_0)) &
% 14.22/13.73 ((ALL X122.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 ((ALL X123.
% 14.22/13.73 bnd_ndr1_1 X122 -->
% 14.22/13.73 (bnd_c10_2 X122 X123 | ~ bnd_c5_2 X122 X123) |
% 14.22/13.73 ~ bnd_c3_2 X122 X123) |
% 14.22/13.73 ~ bnd_c9_1 X122) |
% 14.22/13.73 (bnd_ndr1_1 X122 & bnd_c6_2 X122 bnd_a250) &
% 14.22/13.73 bnd_c2_2 X122 bnd_a250) |
% 14.22/13.73 (ALL X124.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (~ bnd_c10_1 X124 | ~ bnd_c9_1 X124) |
% 14.22/13.73 bnd_c1_1 X124))) &
% 14.22/13.73 (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a251) &
% 14.22/13.73 bnd_c10_2 bnd_a251 bnd_a252) &
% 14.22/13.73 bnd_c1_2 bnd_a251 bnd_a252) &
% 14.22/13.73 ~ bnd_c5_2 bnd_a251 bnd_a252) &
% 14.22/13.73 bnd_c2_1 bnd_a251) &
% 14.22/13.73 ~ bnd_c9_1 bnd_a251 |
% 14.22/13.73 ~ bnd_c7_0) |
% 14.22/13.73 bnd_c6_0)) &
% 14.22/13.73 ((bnd_c10_0 |
% 14.22/13.73 (ALL X125.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (bnd_c6_1 X125 |
% 14.22/13.73 (ALL X126.
% 14.22/13.73 bnd_ndr1_1 X125 -->
% 14.22/13.73 bnd_c9_2 X125 X126 | ~ bnd_c1_2 X125 X126)) |
% 14.22/13.73 (ALL X127.
% 14.22/13.73 bnd_ndr1_1 X125 -->
% 14.22/13.73 (bnd_c6_2 X125 X127 | bnd_c3_2 X125 X127) |
% 14.22/13.73 ~ bnd_c8_2 X125 X127))) |
% 14.22/13.73 ((bnd_ndr1_0 & ~ bnd_c5_1 bnd_a253) & bnd_c9_1 bnd_a253) &
% 14.22/13.73 bnd_c1_1 bnd_a253)) &
% 14.22/13.73 ((bnd_c6_0 | ~ bnd_c10_0) | ~ bnd_c4_0)) &
% 14.22/13.73 (~ bnd_c6_0 | bnd_c2_0)) &
% 14.22/13.73 (((ALL X128.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (((bnd_ndr1_1 X128 & bnd_c10_2 X128 bnd_a254) &
% 14.22/13.73 ~ bnd_c8_2 X128 bnd_a254) &
% 14.22/13.73 bnd_c6_2 X128 bnd_a254 |
% 14.22/13.73 ((bnd_ndr1_1 X128 & ~ bnd_c6_2 X128 bnd_a255) &
% 14.22/13.73 bnd_c9_2 X128 bnd_a255) &
% 14.22/13.73 ~ bnd_c4_2 X128 bnd_a255) |
% 14.22/13.73 bnd_c8_1 X128) |
% 14.22/13.73 (ALL X129.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (bnd_c7_1 X129 | bnd_c9_1 X129) | ~ bnd_c2_1 X129)) |
% 14.22/13.73 (ALL X130.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (bnd_c6_1 X130 | ~ bnd_c9_1 X130) |
% 14.22/13.73 (ALL X131.
% 14.22/13.73 bnd_ndr1_1 X130 -->
% 14.22/13.73 (bnd_c8_2 X130 X131 | bnd_c6_2 X130 X131) |
% 14.22/13.73 ~ bnd_c1_2 X130 X131)))) &
% 14.22/13.73 ((~ bnd_c3_0 |
% 14.22/13.73 (ALL X132.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 ((bnd_ndr1_1 X132 & ~ bnd_c8_2 X132 bnd_a256) &
% 14.22/13.73 ~ bnd_c9_2 X132 bnd_a256 |
% 14.22/13.73 bnd_c5_1 X132) |
% 14.22/13.73 bnd_c8_1 X132)) |
% 14.22/13.73 bnd_c8_0)) &
% 14.22/13.73 ((bnd_c10_0 |
% 14.22/13.73 ((bnd_ndr1_0 & ~ bnd_c7_1 bnd_a257) & ~ bnd_c2_1 bnd_a257) &
% 14.22/13.73 bnd_c5_1 bnd_a257) |
% 14.22/13.73 bnd_c9_0)) &
% 14.22/13.73 ((~ bnd_c5_0 | ~ bnd_c4_0) | bnd_c8_0)) &
% 14.22/13.73 (((ALL X133.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (~ bnd_c10_1 X133 |
% 14.22/13.73 (ALL X134.
% 14.22/13.73 bnd_ndr1_1 X133 -->
% 14.22/13.73 (bnd_c3_2 X133 X134 | bnd_c7_2 X133 X134) |
% 14.22/13.73 bnd_c10_2 X133 X134)) |
% 14.22/13.73 bnd_c3_1 X133) |
% 14.22/13.73 bnd_c9_0) |
% 14.22/13.73 ~ bnd_c6_0)) &
% 14.22/13.73 (((((((bnd_ndr1_0 & ~ bnd_c8_1 bnd_a258) & bnd_ndr1_1 bnd_a258) &
% 14.22/13.73 ~ bnd_c10_2 bnd_a258 bnd_a259) &
% 14.22/13.73 ~ bnd_c6_2 bnd_a258 bnd_a259) &
% 14.22/13.73 ~ bnd_c2_2 bnd_a258 bnd_a259) &
% 14.22/13.73 bnd_c5_1 bnd_a258 |
% 14.22/13.73 (ALL X135.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 ((bnd_ndr1_1 X135 & bnd_c6_2 X135 bnd_a260) &
% 14.22/13.73 ~ bnd_c10_2 X135 bnd_a260) &
% 14.22/13.73 ~ bnd_c2_2 X135 bnd_a260 |
% 14.22/13.73 ~ bnd_c2_1 X135)) |
% 14.22/13.73 bnd_c9_0)) &
% 14.22/13.73 ((((bnd_ndr1_0 &
% 14.22/13.73 (ALL X136.
% 14.22/13.73 bnd_ndr1_1 bnd_a261 -->
% 14.22/13.73 (bnd_c1_2 bnd_a261 X136 | bnd_c8_2 bnd_a261 X136) |
% 14.22/13.73 ~ bnd_c7_2 bnd_a261 X136)) &
% 14.22/13.73 ~ bnd_c9_1 bnd_a261) &
% 14.22/13.73 (ALL X137.
% 14.22/13.73 bnd_ndr1_1 bnd_a261 -->
% 14.22/13.73 (~ bnd_c7_2 bnd_a261 X137 | bnd_c2_2 bnd_a261 X137) |
% 14.22/13.73 ~ bnd_c1_2 bnd_a261 X137) |
% 14.22/13.73 ((((((((bnd_ndr1_0 & bnd_c5_1 bnd_a262) & bnd_ndr1_1 bnd_a262) &
% 14.22/13.73 bnd_c8_2 bnd_a262 bnd_a263) &
% 14.22/13.73 bnd_c9_2 bnd_a262 bnd_a263) &
% 14.22/13.73 bnd_c10_2 bnd_a262 bnd_a263) &
% 14.22/13.73 bnd_ndr1_1 bnd_a262) &
% 14.22/13.73 ~ bnd_c6_2 bnd_a262 bnd_a264) &
% 14.22/13.73 ~ bnd_c10_2 bnd_a262 bnd_a264) &
% 14.22/13.73 ~ bnd_c4_2 bnd_a262 bnd_a264) |
% 14.22/13.73 bnd_c2_0)) &
% 14.22/13.73 ((~ bnd_c7_0 |
% 14.22/13.73 (ALL X138.
% 14.22/13.73 bnd_ndr1_0 -->
% 14.22/13.73 (~ bnd_c5_1 X138 | bnd_c2_1 X138) | ~ bnd_c6_1 X138)) |
% 14.22/13.73 bnd_c8_0)) &
% 14.22/13.73 ((bnd_c2_0 | bnd_c1_0) |
% 14.22/13.73 ((bnd_ndr1_0 & bnd_c1_1 bnd_a265) & bnd_c2_1 bnd_a265) &
% 14.22/13.73 ~ bnd_c7_1 bnd_a265)) &
% 14.22/13.73 ((bnd_c1_0 |
% 14.22/13.73 ((((((((bnd_ndr1_0 & ~ bnd_c7_1 bnd_a266) & bnd_ndr1_1 bnd_a266) &
% 14.22/13.73 ~ bnd_c9_2 bnd_a266 bnd_a267) &
% 14.22/13.73 bnd_c7_2 bnd_a266 bnd_a267) &
% 14.22/13.73 ~ bnd_c5_2 bnd_a266 bnd_a267) &
% 14.22/13.73 bnd_ndr1_1 bnd_a266) &
% 14.22/13.73 bnd_c10_2 bnd_a266 bnd_a268) &
% 14.22/13.73 ~ bnd_c2_2 bnd_a266 bnd_a268) &
% 14.22/13.73 bnd_c6_2 bnd_a266 bnd_a268) |
% 14.22/13.73 ~ bnd_c5_0))
% 14.22/13.73 Adding axioms...
% 14.22/13.74 Typedef.type_definition_def
% 37.36/36.84 ...done.
% 37.36/36.86 Ground types: ?'b, TPTP_Interpret.ind
% 37.36/36.86 Translating term (sizes: 1, 1) ...
% 56.60/56.07 Invoking SAT solver...
% 56.79/56.27 Model found:
% 56.79/56.27 Size of types: ?'b: 1, TPTP_Interpret.ind: 1
% 56.79/56.27 bnd_a268: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a267: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a266: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a265: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a264: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a263: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a262: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a261: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a260: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a259: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a258: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a257: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a256: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a255: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a254: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a253: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a252: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a251: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a250: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a249: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a248: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a247: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a246: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a245: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a244: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a243: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a242: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a241: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a240: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a239: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a238: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a237: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a236: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a235: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a234: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a233: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a232: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a231: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a230: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a229: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a228: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a227: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a226: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a225: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a224: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a223: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a222: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a221: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a220: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a219: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a218: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a217: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a216: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a215: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a214: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a213: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a212: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a211: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a210: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a209: ??.TPTP_Interpret.ind0
% 56.79/56.27 bnd_a208: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a207: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a206: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a205: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a204: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a203: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a202: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a201: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a200: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a199: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a198: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a197: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a196: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a195: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a194: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a193: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a192: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a191: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a190: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a189: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a188: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a187: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a186: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a185: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a184: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a183: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a182: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a181: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a180: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a179: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a178: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a177: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a176: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a175: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a174: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a173: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a172: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a171: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_c6_1: {(??.TPTP_Interpret.ind0, True)}
% 56.79/56.28 bnd_a170: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a169: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a168: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_c10_0: True
% 56.79/56.28 bnd_a167: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a166: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a165: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a164: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a163: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a162: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a161: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a160: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a159: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a158: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_c3_1: {(??.TPTP_Interpret.ind0, True)}
% 56.79/56.28 bnd_c10_1: {(??.TPTP_Interpret.ind0, False)}
% 56.79/56.28 bnd_c2_0: True
% 56.79/56.28 bnd_c8_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, True)})}
% 56.79/56.28 bnd_a157: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_c2_1: {(??.TPTP_Interpret.ind0, True)}
% 56.79/56.28 bnd_c5_0: True
% 56.79/56.28 bnd_c6_0: True
% 56.79/56.28 bnd_c9_0: False
% 56.79/56.28 bnd_c8_0: True
% 56.79/56.28 bnd_a156: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a155: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_c6_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, True)})}
% 56.79/56.28 bnd_a154: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_c5_1: {(??.TPTP_Interpret.ind0, False)}
% 56.79/56.28 bnd_c2_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, False)})}
% 56.79/56.28 bnd_a153: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a152: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_c4_0: False
% 56.79/56.28 bnd_c10_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, False)})}
% 56.79/56.28 bnd_a151: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_a150: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_c9_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, False)})}
% 56.79/56.28 bnd_c4_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, False)})}
% 56.79/56.28 bnd_c1_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, False)})}
% 56.79/56.28 bnd_a149: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_c4_1: {(??.TPTP_Interpret.ind0, False)}
% 56.79/56.28 bnd_c3_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, True)})}
% 56.79/56.28 bnd_c7_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, False)})}
% 56.79/56.28 bnd_a148: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_c5_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, True)})}
% 56.79/56.28 bnd_ndr1_1: {(??.TPTP_Interpret.ind0, True)}
% 56.79/56.28 bnd_c1_0: True
% 56.79/56.28 bnd_a147: ??.TPTP_Interpret.ind0
% 56.79/56.28 bnd_c7_1: {(??.TPTP_Interpret.ind0, True)}
% 56.79/56.28 bnd_c8_1: {(??.TPTP_Interpret.ind0, True)}
% 56.79/56.28 bnd_c1_1: {(??.TPTP_Interpret.ind0, False)}
% 56.79/56.28 bnd_c9_1: {(??.TPTP_Interpret.ind0, True)}
% 56.79/56.28 bnd_ndr1_0: True
% 56.79/56.28 bnd_c3_0: False
% 56.79/56.28 bnd_c7_0: True
% 56.79/56.28
% 56.79/56.28 % SZS status CounterSatisfiable
%------------------------------------------------------------------------------