TSTP Solution File: SWV470+1 by ePrincess---1.0

View Problem - Process Solution

%------------------------------------------------------------------------------
% File     : ePrincess---1.0
% Problem  : SWV470+1 : TPTP v8.1.0. Released v4.0.0.
% Transfm  : none
% Format   : tptp:raw
% Command  : ePrincess-casc -timeout=%d %s

% Computer : n006.cluster.edu
% Model    : x86_64 x86_64
% CPU      : Intel(R) Xeon(R) CPU E5-2620 v4 2.10GHz
% Memory   : 8042.1875MB
% OS       : Linux 3.10.0-693.el7.x86_64
% CPULimit : 300s
% WCLimit  : 600s
% DateTime : Wed Jul 20 17:51:41 EDT 2022

% Result   : Theorem 249.39s 181.42s
% Output   : Proof 254.62s
% Verified : 
% SZS Type : -

% Comments : 
%------------------------------------------------------------------------------
%----WARNING: Could not form TPTP format derivation
%------------------------------------------------------------------------------
%----ORIGINAL SYSTEM OUTPUT
% 0.11/0.12  % Problem  : SWV470+1 : TPTP v8.1.0. Released v4.0.0.
% 0.11/0.12  % Command  : ePrincess-casc -timeout=%d %s
% 0.12/0.33  % Computer : n006.cluster.edu
% 0.12/0.33  % Model    : x86_64 x86_64
% 0.12/0.33  % CPU      : Intel(R) Xeon(R) CPU E5-2620 v4 @ 2.10GHz
% 0.12/0.33  % Memory   : 8042.1875MB
% 0.12/0.33  % OS       : Linux 3.10.0-693.el7.x86_64
% 0.12/0.33  % CPULimit : 300
% 0.12/0.33  % WCLimit  : 600
% 0.12/0.33  % DateTime : Wed Jun 15 16:34:11 EDT 2022
% 0.12/0.33  % CPUTime  : 
% 0.19/0.58          ____       _                          
% 0.19/0.58    ___  / __ \_____(_)___  ________  __________
% 0.19/0.58   / _ \/ /_/ / ___/ / __ \/ ___/ _ \/ ___/ ___/
% 0.19/0.58  /  __/ ____/ /  / / / / / /__/  __(__  |__  ) 
% 0.19/0.58  \___/_/   /_/  /_/_/ /_/\___/\___/____/____/  
% 0.19/0.58  
% 0.19/0.58  A Theorem Prover for First-Order Logic
% 0.19/0.59  (ePrincess v.1.0)
% 0.19/0.59  
% 0.19/0.59  (c) Philipp Rümmer, 2009-2015
% 0.19/0.59  (c) Peter Backeman, 2014-2015
% 0.19/0.59  (contributions by Angelo Brillout, Peter Baumgartner)
% 0.19/0.59  Free software under GNU Lesser General Public License (LGPL).
% 0.19/0.59  Bug reports to peter@backeman.se
% 0.19/0.59  
% 0.19/0.59  For more information, visit http://user.uu.se/~petba168/breu/
% 0.19/0.59  
% 0.19/0.59  Loading /export/starexec/sandbox2/benchmark/theBenchmark.p ...
% 0.74/0.64  Prover 0: Options:  -triggersInConjecture -genTotalityAxioms -tightFunctionScopes -clausifier=simple -reverseFunctionalityPropagation +boolFunsAsPreds -triggerStrategy=allMaximal -resolutionMethod=nonUnifying +ignoreQuantifiers -generateTriggers=all
% 1.94/1.02  Prover 0: Preprocessing ...
% 3.56/1.49  Prover 0: Warning: ignoring some quantifiers
% 3.73/1.52  Prover 0: Constructing countermodel ...
% 19.81/5.93  Prover 1: Options:  +triggersInConjecture -genTotalityAxioms -tightFunctionScopes -clausifier=simple +reverseFunctionalityPropagation -boolFunsAsPreds -triggerStrategy=maximal -resolutionMethod=normal +ignoreQuantifiers -generateTriggers=all
% 20.19/6.01  Prover 1: Preprocessing ...
% 20.84/6.20  Prover 1: Constructing countermodel ...
% 24.23/6.95  Prover 1: gave up
% 24.23/6.95  Prover 2: Options:  +triggersInConjecture +genTotalityAxioms +tightFunctionScopes -clausifier=simple -reverseFunctionalityPropagation -boolFunsAsPreds -triggerStrategy=allUni -resolutionMethod=nonUnifying +ignoreQuantifiers -generateTriggers=all
% 24.66/7.00  Prover 2: Preprocessing ...
% 25.59/7.24  Prover 2: Warning: ignoring some quantifiers
% 25.59/7.25  Prover 2: Constructing countermodel ...
% 31.28/8.64  Prover 3: Options:  -triggersInConjecture -genTotalityAxioms +tightFunctionScopes -clausifier=simple +reverseFunctionalityPropagation +boolFunsAsPreds -triggerStrategy=maximal -resolutionMethod=nonUnifying +ignoreQuantifiers -generateTriggers=all
% 31.62/8.74  Prover 3: Preprocessing ...
% 32.23/8.83  Prover 3: Warning: ignoring some quantifiers
% 32.23/8.83  Prover 3: Constructing countermodel ...
% 35.39/9.65  Prover 3: gave up
% 35.39/9.65  Prover 4: Options:  +triggersInConjecture -genTotalityAxioms -tightFunctionScopes -clausifier=simple -reverseFunctionalityPropagation -boolFunsAsPreds -triggerStrategy=allUni -resolutionMethod=nonUnifying +ignoreQuantifiers -generateTriggers=complete
% 35.82/9.68  Prover 4: Preprocessing ...
% 36.34/9.87  Prover 4: Warning: ignoring some quantifiers
% 36.34/9.88  Prover 4: Constructing countermodel ...
% 41.87/11.90  Prover 0: stopped
% 42.16/12.10  Prover 5: Options:  +triggersInConjecture -genTotalityAxioms -tightFunctionScopes -clausifier=none +reverseFunctionalityPropagation -boolFunsAsPreds -triggerStrategy=allMinimal -resolutionMethod=nonUnifying +ignoreQuantifiers -generateTriggers=all
% 42.16/12.16  Prover 5: Preprocessing ...
% 43.03/12.34  Prover 5: Constructing countermodel ...
% 59.00/25.18  Prover 5: stopped
% 59.28/25.38  Prover 6: Options:  +triggersInConjecture +genTotalityAxioms +tightFunctionScopes -clausifier=simple -reverseFunctionalityPropagation -boolFunsAsPreds -triggerStrategy=allUni -resolutionMethod=normal +ignoreQuantifiers -generateTriggers=all
% 59.42/25.43  Prover 6: Preprocessing ...
% 59.74/25.56  Prover 6: Warning: ignoring some quantifiers
% 59.74/25.57  Prover 6: Constructing countermodel ...
% 141.27/95.21  Prover 2: stopped
% 141.50/95.41  Prover 7: Options:  +triggersInConjecture -genTotalityAxioms +tightFunctionScopes -clausifier=none +reverseFunctionalityPropagation +boolFunsAsPreds -triggerStrategy=maximalOutermost -resolutionMethod=normal -ignoreQuantifiers -generateTriggers=all
% 141.50/95.45  Prover 7: Preprocessing ...
% 141.75/95.53  Prover 7: Proving ...
% 193.95/136.29  Prover 4: stopped
% 194.20/136.49  Prover 8: Options:  +triggersInConjecture -genTotalityAxioms -tightFunctionScopes -clausifier=none -reverseFunctionalityPropagation -boolFunsAsPreds -triggerStrategy=maximal -resolutionMethod=normal -ignoreQuantifiers -generateTriggers=all
% 194.32/136.55  Prover 8: Preprocessing ...
% 194.77/136.62  Prover 8: Constructing countermodel ...
% 195.72/137.07  Prover 8: gave up
% 195.72/137.07  Prover 9: Options:  -triggersInConjecture -genTotalityAxioms -tightFunctionScopes -clausifier=simple -reverseFunctionalityPropagation +boolFunsAsPreds -triggerStrategy=allMinimal -resolutionMethod=normal -ignoreQuantifiers -generateTriggers=completeFrugal
% 195.98/137.10  Prover 9: Preprocessing ...
% 195.98/137.16  Prover 9: Proving ...
% 212.70/151.89  Prover 9: stopped
% 212.89/152.09  Prover 10: Options:  -triggersInConjecture +genTotalityAxioms +tightFunctionScopes -clausifier=simple +reverseFunctionalityPropagation +boolFunsAsPreds -triggerStrategy=allMaximal -resolutionMethod=normal +ignoreQuantifiers -generateTriggers=all
% 212.99/152.14  Prover 10: Preprocessing ...
% 212.99/152.19  Prover 10: Warning: ignoring some quantifiers
% 212.99/152.19  Prover 10: Constructing countermodel ...
% 248.22/180.91  Prover 6: stopped
% 248.36/181.11  Prover 11: Options:  +triggersInConjecture +genTotalityAxioms +tightFunctionScopes -clausifier=simple +reverseFunctionalityPropagation +boolFunsAsPreds -triggerStrategy=maximal -resolutionMethod=nonUnifying +ignoreQuantifiers -generateTriggers=all
% 248.45/181.16  Prover 11: Preprocessing ...
% 248.60/181.21  Prover 11: Warning: ignoring some quantifiers
% 248.60/181.22  Prover 11: Constructing countermodel ...
% 249.39/181.41  Prover 11: proved (307ms)
% 249.39/181.42  Prover 7: stopped
% 249.39/181.42  Prover 10: stopped
% 249.39/181.42  
% 249.39/181.42  No countermodel exists, formula is valid
% 249.39/181.42  % SZS status Theorem for theBenchmark
% 249.39/181.42  
% 249.39/181.42  Generating proof ... Warning: ignoring some quantifiers
% 254.03/182.90  found it (size 87)
% 254.03/182.90  
% 254.03/182.90  % SZS output start Proof for theBenchmark
% 254.03/182.90  Assumed formulas after preprocessing and simplification: 
% 254.03/182.90  | (0)  ? [v0] :  ? [v1] :  ? [v2] :  ? [v3] :  ? [v4] :  ? [v5] :  ? [v6] :  ? [v7] :  ? [v8] :  ? [v9] :  ? [v10] :  ? [v11] :  ? [v12] :  ? [v13] :  ? [v14] :  ? [v15] :  ? [v16] :  ? [v17] : ( ~ (v4 = nbr_proc) &  ~ (norm = wait) &  ~ (norm = elec_1) &  ~ (norm = elec_2) &  ~ (wait = elec_1) &  ~ (wait = elec_2) &  ~ (elec_1 = elec_2) & index(down, nbr_proc) = v13 & index(status, nbr_proc) = elec_1 & snoc(v1, v7) = v8 & cons(v6, v1) = v5 & m_Down(v11) = v15 & m_Down(v10) = v17 & m_Halt(v3) = v6 & s(zero) = v0 & m_Ack(v3, v2) = v7 & host(v12) = nbr_proc & host(v11) = v14 & host(v10) = nbr_proc & host(v9) = v4 & host(v3) = v4 & host(v2) = v4 & queue(v4) = v5 & queue(nbr_proc) = v16 & ordered(q_nil) & leq(v0, nbr_proc) & setIn(v9, alive) & setIn(v2, alive) & elem(v17, v8) & elem(v15, v16) &  ~ setIn(nil, alive) &  ! [v18] :  ! [v19] :  ! [v20] :  ! [v21] :  ! [v22] :  ! [v23] :  ! [v24] :  ! [v25] : (v23 = v22 |  ~ (m_Down(v21) = v24) |  ~ (m_Down(v19) = v25) |  ~ (host(v20) = v22) |  ~ (host(v18) = v23) |  ~ setIn(v20, alive) |  ~ setIn(v18, alive) |  ? [v26] : (( ~ (v26 = v23) & host(v19) = v26) | ( ~ (v26 = v22) & host(v21) = v26) | (queue(v23) = v26 &  ~ elem(v24, v26)) | (queue(v22) = v26 &  ~ elem(v25, v26)))) &  ! [v18] :  ! [v19] :  ! [v20] :  ! [v21] :  ! [v22] :  ! [v23] :  ! [v24] : (v23 = v22 |  ~ (m_Down(v21) = v24) |  ~ (host(v20) = v22) |  ~ (host(v19) = v23) |  ~ (host(v18) = v23) |  ~ setIn(v20, alive) |  ~ setIn(v18, alive) |  ? [v25] : (( ~ (v25 = v22) & host(v21) = v25) | (index(down, v22) = v25 &  ~ setIn(v23, v25)) | (queue(v23) = v25 &  ~ elem(v24, v25)))) &  ! [v18] :  ! [v19] :  ! [v20] :  ! [v21] :  ! [v22] :  ! [v23] :  ! [v24] : ( ~ (m_Down(v20) = v22) |  ~ (m_Down(v19) = v23) |  ~ (host(v21) = nbr_proc) |  ~ (host(v18) = v24) |  ~ setIn(v18, alive) |  ? [v25] :  ? [v26] :  ? [v27] : ((v25 = v16 &  ~ elem(v22, v16)) | (v25 = v13 &  ~ (v27 = v26) & host(v20) = v26 & leq(v0, v27) &  ~ leq(nbr_proc, v27) &  ~ setIn(v27, v13)) | ( ~ (v25 = nbr_proc) & host(v19) = v25) | (queue(v24) = v25 &  ~ elem(v23, v25)))) &  ! [v18] :  ! [v19] :  ! [v20] :  ! [v21] :  ! [v22] :  ! [v23] : (v22 = v21 |  ~ (m_Down(v18) = v23) |  ~ (host(v20) = v21) |  ~ (host(v19) = v22) |  ~ setIn(v20, alive) |  ? [v24] :  ? [v25] : (( ~ (v25 = v22) & index(elid, v21) = v24 & host(v24) = v25) | ( ~ (v24 = v21) & host(v18) = v24) | ( ~ (v24 = wait) & index(status, v21) = v24) | (queue(v22) = v24 &  ~ elem(v23, v24)))) &  ! [v18] :  ! [v19] :  ! [v20] :  ! [v21] :  ! [v22] :  ! [v23] : (v22 = v21 |  ~ (m_Down(v18) = v23) |  ~ (host(v20) = v21) |  ~ (host(v19) = v22) |  ~ setIn(v20, alive) |  ? [v24] : (( ~ (v24 = v22) & index(ldr, v21) = v24) | ( ~ (v24 = v21) & host(v18) = v24) | ( ~ (v24 = norm) & index(status, v21) = v24) | (queue(v22) = v24 &  ~ elem(v23, v24)))) &  ! [v18] :  ! [v19] :  ! [v20] :  ! [v21] :  ! [v22] :  ! [v23] : ( ~ (cons(v21, v18) = v22) |  ~ (m_Down(v20) = v23) |  ~ (m_Halt(v19) = v21) |  ~ ordered(v22) |  ~ elem(v23, v18) | leq(v19, v20) |  ? [v24] :  ? [v25] : ( ~ (v25 = v24) & host(v20) = v25 & host(v19) = v24)) &  ! [v18] :  ! [v19] :  ! [v20] :  ! [v21] :  ! [v22] : (v21 = v20 |  ~ (m_Ack(v19, v21) = v22) |  ~ (m_Ack(v18, v20) = v22)) &  ! [v18] :  ! [v19] :  ! [v20] :  ! [v21] :  ! [v22] : (v19 = v18 |  ~ (m_Ack(v19, v21) = v22) |  ~ (m_Ack(v18, v20) = v22)) &  ! [v18] :  ! [v19] :  ! [v20] :  ! [v21] :  ! [v22] : ( ~ (snoc(v20, v19) = v21) |  ~ (cons(v18, v21) = v22) |  ? [v23] : (snoc(v23, v19) = v22 & cons(v18, v20) = v23)) &  ! [v18] :  ! [v19] :  ! [v20] :  ! [v21] :  ! [v22] : ( ~ (snoc(v18, v21) = v22) |  ~ (m_Ack(v19, v20) = v21) |  ~ ordered(v18) | ordered(v22)) &  ! [v18] :  ! [v19] :  ! [v20] :  ! [v21] : (v21 = v18 | v18 = q_nil |  ~ (init(v18) = v19) |  ~ (snoc(v19, v20) = v21) |  ~ (last(v18) = v20)) &  ! [v18] :  ! [v19] :  ! [v20] :  ! [v21] : (v21 = v18 | v18 = q_nil |  ~ (tail(v18) = v20) |  ~ (cons(v19, v20) = v21) |  ~ (head(v18) = v19)) &  ! [v18] :  ! [v19] :  ! [v20] :  ! [v21] : (v19 = v18 |  ~ (index(v21, v20) = v19) |  ~ (index(v21, v20) = v18)) &  ! [v18] :  ! [v19] :  ! [v20] :  ! [v21] : (v19 = v18 |  ~ (snoc(v21, v20) = v19) |  ~ (snoc(v21, v20) = v18)) &  ! [v18] :  ! [v19] :  ! [v20] :  ! [v21] : (v19 = v18 |  ~ (snoc(v20, v19) = v21) |  ~ elem(v18, v21) | elem(v18, v20)) &  ! [v18] :  ! [v19] :  ! [v20] :  ! [v21] : (v19 = v18 |  ~ (cons(v21, v20) = v19) |  ~ (cons(v21, v20) = v18)) &  ! [v18] :  ! [v19] :  ! [v20] :  ! [v21] : (v19 = v18 |  ~ (cons(v19, v20) = v21) |  ~ elem(v18, v21) | elem(v18, v20)) &  ! [v18] :  ! [v19] :  ! [v20] :  ! [v21] : (v19 = v18 |  ~ (m_Ack(v21, v20) = v19) |  ~ (m_Ack(v21, v20) = v18)) &  ! [v18] :  ! [v19] :  ! [v20] :  ! [v21] : ( ~ (snoc(v20, v19) = v21) |  ~ elem(v18, v20) | elem(v18, v21)) &  ! [v18] :  ! [v19] :  ! [v20] :  ! [v21] : ( ~ (snoc(v18, v20) = v21) |  ~ (m_Ldr(v19) = v20) |  ~ ordered(v18) | ordered(v21)) &  ! [v18] :  ! [v19] :  ! [v20] :  ! [v21] : ( ~ (cons(v19, v20) = v21) |  ~ elem(v18, v20) | elem(v18, v21)) &  ! [v18] :  ! [v19] :  ! [v20] :  ! [v21] : ( ~ (m_NormQ(v20) = v21) |  ~ (m_Ack(v18, v19) = v21)) &  ! [v18] :  ! [v19] :  ! [v20] :  ! [v21] : ( ~ (m_Ldr(v20) = v21) |  ~ (m_Ack(v18, v19) = v21)) &  ! [v18] :  ! [v19] :  ! [v20] :  ! [v21] : ( ~ (m_Ldr(v19) = v20) |  ~ (host(v18) = v21) |  ? [v22] : ((host(v19) = v22 &  ~ leq(v21, v22)) | (queue(v21) = v22 &  ~ elem(v20, v22)))) &  ! [v18] :  ! [v19] :  ! [v20] :  ! [v21] : ( ~ (m_NotNorm(v20) = v21) |  ~ (m_Ack(v18, v19) = v21)) &  ! [v18] :  ! [v19] :  ! [v20] :  ! [v21] : ( ~ (m_Down(v20) = v21) |  ~ (m_Ack(v18, v19) = v21)) &  ! [v18] :  ! [v19] :  ! [v20] :  ! [v21] : ( ~ (m_Down(v19) = v20) |  ~ (host(v18) = v21) |  ? [v22] : (( ~ (v22 = v21) & host(v19) = v22) | (queue(v21) = v22 &  ~ elem(v20, v22)))) &  ! [v18] :  ! [v19] :  ! [v20] :  ! [v21] : ( ~ (m_Halt(v20) = v21) |  ~ (m_Ack(v18, v19) = v21)) &  ! [v18] :  ! [v19] :  ! [v20] :  ! [v21] : ( ~ (s(v19) = v21) |  ~ (s(v18) = v20) |  ~ leq(v20, v21) | leq(v18, v19)) &  ! [v18] :  ! [v19] :  ! [v20] :  ! [v21] : ( ~ (s(v19) = v21) |  ~ (s(v18) = v20) |  ~ leq(v18, v19) | leq(v20, v21)) &  ! [v18] :  ! [v19] :  ! [v20] : (v20 = v19 |  ~ (m_NormQ(v18) = v20) |  ~ (m_NormQ(v18) = v19)) &  ! [v18] :  ! [v19] :  ! [v20] : (v20 = v19 |  ~ (m_Ldr(v18) = v20) |  ~ (m_Ldr(v18) = v19)) &  ! [v18] :  ! [v19] :  ! [v20] : (v20 = v19 |  ~ (m_NotNorm(v18) = v20) |  ~ (m_NotNorm(v18) = v19)) &  ! [v18] :  ! [v19] :  ! [v20] : (v20 = v19 |  ~ (m_Down(v18) = v20) |  ~ (m_Down(v18) = v19)) &  ! [v18] :  ! [v19] :  ! [v20] : (v20 = v19 |  ~ (m_Halt(v18) = v20) |  ~ (m_Halt(v18) = v19)) &  ! [v18] :  ! [v19] :  ! [v20] : (v20 = v19 |  ~ (host(v18) = v20) |  ~ (host(v18) = v19)) &  ! [v18] :  ! [v19] :  ! [v20] : (v20 = v18 |  ~ (s(v19) = v20) |  ~ leq(v18, v20) | leq(v18, v19)) &  ! [v18] :  ! [v19] :  ! [v20] : (v19 = v18 |  ~ (pidMsg(v20) = v19) |  ~ (pidMsg(v20) = v18)) &  ! [v18] :  ! [v19] :  ! [v20] : (v19 = v18 |  ~ (init(v20) = v19) |  ~ (init(v20) = v18)) &  ! [v18] :  ! [v19] :  ! [v20] : (v19 = v18 |  ~ (last(v20) = v19) |  ~ (last(v20) = v18)) &  ! [v18] :  ! [v19] :  ! [v20] : (v19 = v18 |  ~ (tail(v20) = v19) |  ~ (tail(v20) = v18)) &  ! [v18] :  ! [v19] :  ! [v20] : (v19 = v18 |  ~ (head(v20) = v19) |  ~ (head(v20) = v18)) &  ! [v18] :  ! [v19] :  ! [v20] : (v19 = v18 |  ~ (m_NormQ(v20) = v19) |  ~ (m_NormQ(v20) = v18)) &  ! [v18] :  ! [v19] :  ! [v20] : (v19 = v18 |  ~ (m_NormQ(v19) = v20) |  ~ (m_NormQ(v18) = v20)) &  ! [v18] :  ! [v19] :  ! [v20] : (v19 = v18 |  ~ (m_Ldr(v20) = v19) |  ~ (m_Ldr(v20) = v18)) &  ! [v18] :  ! [v19] :  ! [v20] : (v19 = v18 |  ~ (m_Ldr(v19) = v20) |  ~ (m_Ldr(v18) = v20)) &  ! [v18] :  ! [v19] :  ! [v20] : (v19 = v18 |  ~ (m_NotNorm(v20) = v19) |  ~ (m_NotNorm(v20) = v18)) &  ! [v18] :  ! [v19] :  ! [v20] : (v19 = v18 |  ~ (m_NotNorm(v19) = v20) |  ~ (m_NotNorm(v18) = v20)) &  ! [v18] :  ! [v19] :  ! [v20] : (v19 = v18 |  ~ (m_Down(v20) = v19) |  ~ (m_Down(v20) = v18)) &  ! [v18] :  ! [v19] :  ! [v20] : (v19 = v18 |  ~ (m_Down(v19) = v20) |  ~ (m_Down(v18) = v20)) &  ! [v18] :  ! [v19] :  ! [v20] : (v19 = v18 |  ~ (m_Halt(v20) = v19) |  ~ (m_Halt(v20) = v18)) &  ! [v18] :  ! [v19] :  ! [v20] : (v19 = v18 |  ~ (m_Halt(v19) = v20) |  ~ (m_Halt(v18) = v20)) &  ! [v18] :  ! [v19] :  ! [v20] : (v19 = v18 |  ~ (s(v20) = v19) |  ~ (s(v20) = v18)) &  ! [v18] :  ! [v19] :  ! [v20] : (v19 = v18 |  ~ (host(v20) = v19) |  ~ (host(v20) = v18)) &  ! [v18] :  ! [v19] :  ! [v20] : (v19 = v18 |  ~ (host(v19) = v20) |  ~ (host(v18) = v20) |  ~ setIn(v19, alive) |  ~ setIn(v18, alive)) &  ! [v18] :  ! [v19] :  ! [v20] : (v19 = v18 |  ~ (queue(v20) = v19) |  ~ (queue(v20) = v18)) &  ! [v18] :  ! [v19] :  ! [v20] : ( ~ (snoc(v19, v18) = v20) |  ~ ordered(v20) | ordered(v19)) &  ! [v18] :  ! [v19] :  ! [v20] : ( ~ (snoc(v19, v18) = v20) |  ~ ordered(v20) |  ? [v21] :  ? [v22] : (pidMsg(v18) = v21 & host(v21) = v22 &  ! [v23] :  ! [v24] : ( ~ (pidMsg(v23) = v24) |  ~ pidElem(v23) |  ~ pidElem(v18) |  ~ elem(v23, v19) | leq(v24, v21) |  ? [v25] : ( ~ (v25 = v22) & host(v24) = v25)))) &  ! [v18] :  ! [v19] :  ! [v20] : ( ~ (snoc(v19, v18) = v20) |  ~ ordered(v19) | ordered(v20) |  ? [v21] :  ? [v22] :  ? [v23] :  ? [v24] : (pidMsg(v23) = v24 & pidMsg(v18) = v21 & host(v24) = v22 & host(v21) = v22 & pidElem(v23) & pidElem(v18) & elem(v23, v19) &  ~ leq(v24, v21))) &  ! [v18] :  ! [v19] :  ! [v20] : ( ~ (snoc(v19, v18) = v20) | init(v20) = v19) &  ! [v18] :  ! [v19] :  ! [v20] : ( ~ (snoc(v19, v18) = v20) | last(v20) = v18) &  ! [v18] :  ! [v19] :  ! [v20] : ( ~ (snoc(v19, v18) = v20) | elem(v18, v20)) &  ! [v18] :  ! [v19] :  ! [v20] : ( ~ (cons(v18, v19) = v20) |  ~ ordered(v20) | ordered(v19)) &  ! [v18] :  ! [v19] :  ! [v20] : ( ~ (cons(v18, v19) = v20) |  ~ ordered(v20) |  ? [v21] :  ? [v22] : (pidMsg(v18) = v21 & host(v21) = v22 &  ! [v23] :  ! [v24] : ( ~ (pidMsg(v23) = v24) |  ~ pidElem(v23) |  ~ pidElem(v18) |  ~ elem(v23, v19) | leq(v21, v24) |  ? [v25] : ( ~ (v25 = v22) & host(v24) = v25)))) &  ! [v18] :  ! [v19] :  ! [v20] : ( ~ (cons(v18, v19) = v20) |  ~ ordered(v19) | ordered(v20) |  ? [v21] :  ? [v22] :  ? [v23] :  ? [v24] : (pidMsg(v23) = v24 & pidMsg(v18) = v21 & host(v24) = v22 & host(v21) = v22 & pidElem(v23) & pidElem(v18) & elem(v23, v19) &  ~ leq(v21, v24))) &  ! [v18] :  ! [v19] :  ! [v20] : ( ~ (cons(v18, v19) = v20) | tail(v20) = v19) &  ! [v18] :  ! [v19] :  ! [v20] : ( ~ (cons(v18, v19) = v20) | head(v20) = v18) &  ! [v18] :  ! [v19] :  ! [v20] : ( ~ (cons(v18, v19) = v20) | elem(v18, v20)) &  ! [v18] :  ! [v19] :  ! [v20] : ( ~ (m_NormQ(v19) = v20) |  ~ (m_Ldr(v18) = v20)) &  ! [v18] :  ! [v19] :  ! [v20] : ( ~ (m_NormQ(v19) = v20) |  ~ (m_Down(v18) = v20)) &  ! [v18] :  ! [v19] :  ! [v20] : ( ~ (m_NormQ(v18) = v20) |  ~ (m_NotNorm(v19) = v20)) &  ! [v18] :  ! [v19] :  ! [v20] : ( ~ (m_NormQ(v18) = v20) |  ~ (m_Halt(v19) = v20)) &  ! [v18] :  ! [v19] :  ! [v20] : ( ~ (m_Ldr(v19) = v20) |  ~ (m_Down(v18) = v20)) &  ! [v18] :  ! [v19] :  ! [v20] : ( ~ (m_Ldr(v18) = v20) |  ~ (m_NotNorm(v19) = v20)) &  ! [v18] :  ! [v19] :  ! [v20] : ( ~ (m_Ldr(v18) = v20) |  ~ (m_Halt(v19) = v20)) &  ! [v18] :  ! [v19] :  ! [v20] : ( ~ (m_NotNorm(v19) = v20) |  ~ (m_Down(v18) = v20)) &  ! [v18] :  ! [v19] :  ! [v20] : ( ~ (m_NotNorm(v18) = v20) |  ~ (m_Halt(v19) = v20)) &  ! [v18] :  ! [v19] :  ! [v20] : ( ~ (m_NotNorm(v18) = v20) |  ~ (host(v19) = nbr_proc) |  ~ elem(v20, v16)) &  ! [v18] :  ! [v19] :  ! [v20] : ( ~ (m_Down(v18) = v20) |  ~ (m_Halt(v19) = v20)) &  ! [v18] :  ! [v19] :  ! [v20] : ( ~ (s(v19) = v20) |  ~ leq(v18, v19) | leq(v18, v20)) &  ! [v18] :  ! [v19] :  ! [v20] : ( ~ (m_Ack(v18, v19) = v20) | setIn(v19, pids) |  ? [v21] :  ? [v22] : (host(v18) = v21 & queue(v21) = v22 &  ~ elem(v20, v22))) &  ! [v18] :  ! [v19] :  ! [v20] : ( ~ (m_Ack(v18, v19) = v20) | setIn(v18, pids) |  ? [v21] :  ? [v22] : (host(v18) = v21 & queue(v21) = v22 &  ~ elem(v20, v22))) &  ! [v18] :  ! [v19] :  ! [v20] : ( ~ (host(v19) = v20) |  ~ (host(v18) = v20) |  ? [v21] : ( ~ (v21 = v20) & s(v20) = v21)) &  ! [v18] :  ! [v19] :  ! [v20] : ( ~ leq(v19, v20) |  ~ leq(v18, v19) | leq(v18, v20)) &  ! [v18] :  ! [v19] : (v19 = v18 |  ~ leq(v19, v18) |  ~ leq(v18, v19)) &  ! [v18] :  ! [v19] :  ~ (snoc(v19, v18) = q_nil) &  ! [v18] :  ! [v19] : ( ~ (snoc(q_nil, v18) = v19) | ordered(v19)) &  ! [v18] :  ! [v19] :  ~ (cons(v18, v19) = q_nil) &  ! [v18] :  ! [v19] : ( ~ (cons(v18, q_nil) = v19) | snoc(q_nil, v18) = v19) &  ! [v18] :  ! [v19] : ( ~ (cons(v18, q_nil) = v19) | ordered(v19)) &  ! [v18] :  ! [v19] : ( ~ (m_Down(v19) = v18) | pidElem(v18)) &  ! [v18] :  ! [v19] : ( ~ (m_Down(v18) = v19) | pidMsg(v19) = v18) &  ! [v18] :  ! [v19] : ( ~ (m_Halt(v19) = v18) | pidElem(v18)) &  ! [v18] :  ! [v19] : ( ~ (m_Halt(v18) = v19) | pidMsg(v19) = v18) &  ! [v18] :  ! [v19] : ( ~ (s(v19) = v18) | leq(v18, v18)) &  ! [v18] :  ! [v19] : ( ~ (s(v18) = v19) |  ~ leq(v19, v18)) &  ! [v18] :  ! [v19] : ( ~ (host(v18) = v19) |  ~ setIn(v18, alive) |  ? [v20] : ((v20 = v18 & index(elid, v19) = v18) | ( ~ (v20 = elec_1) &  ~ (v20 = elec_2) & index(status, v19) = v20))) &  ! [v18] :  ! [v19] : ( ~ (host(v18) = v19) | leq(v19, nbr_proc)) &  ! [v18] :  ! [v19] : ( ~ (host(v18) = v19) | leq(v0, v19)) &  ! [v18] : (v18 = v14 |  ~ leq(v0, v18) | leq(nbr_proc, v18) | setIn(v18, v13)) &  ! [v18] : ( ~ pidElem(v18) |  ? [v19] :  ? [v20] : ((v20 = v18 & m_Down(v19) = v18) | (v20 = v18 & m_Halt(v19) = v18))) &  ! [v18] :  ~ setIn(v18, setEmpty) &  ! [v18] :  ~ elem(v18, q_nil) &  ? [v18] :  ? [v19] :  ? [v20] : index(v19, v18) = v20 &  ? [v18] :  ? [v19] :  ? [v20] : snoc(v19, v18) = v20 &  ? [v18] :  ? [v19] :  ? [v20] : cons(v19, v18) = v20 &  ? [v18] :  ? [v19] :  ? [v20] : m_Ack(v19, v18) = v20 &  ? [v18] :  ? [v19] : pidMsg(v18) = v19 &  ? [v18] :  ? [v19] : init(v18) = v19 &  ? [v18] :  ? [v19] : last(v18) = v19 &  ? [v18] :  ? [v19] : tail(v18) = v19 &  ? [v18] :  ? [v19] : head(v18) = v19 &  ? [v18] :  ? [v19] : m_NormQ(v18) = v19 &  ? [v18] :  ? [v19] : m_Ldr(v18) = v19 &  ? [v18] :  ? [v19] : m_NotNorm(v18) = v19 &  ? [v18] :  ? [v19] : m_Down(v18) = v19 &  ? [v18] :  ? [v19] : m_Halt(v18) = v19 &  ? [v18] :  ? [v19] : s(v18) = v19 &  ? [v18] :  ? [v19] : host(v18) = v19 &  ? [v18] :  ? [v19] : queue(v18) = v19 &  ? [v18] :  ? [v19] : (leq(v19, v18) | leq(v18, v19)) &  ? [v18] : leq(v18, v18))
% 254.18/182.97  | Instantiating (0) with all_0_0_0, all_0_1_1, all_0_2_2, all_0_3_3, all_0_4_4, all_0_5_5, all_0_6_6, all_0_7_7, all_0_8_8, all_0_9_9, all_0_10_10, all_0_11_11, all_0_12_12, all_0_13_13, all_0_14_14, all_0_15_15, all_0_16_16, all_0_17_17 yields:
% 254.18/182.97  | (1)  ~ (all_0_13_13 = nbr_proc) &  ~ (norm = wait) &  ~ (norm = elec_1) &  ~ (norm = elec_2) &  ~ (wait = elec_1) &  ~ (wait = elec_2) &  ~ (elec_1 = elec_2) & index(down, nbr_proc) = all_0_4_4 & index(status, nbr_proc) = elec_1 & snoc(all_0_16_16, all_0_10_10) = all_0_9_9 & cons(all_0_11_11, all_0_16_16) = all_0_12_12 & m_Down(all_0_6_6) = all_0_2_2 & m_Down(all_0_7_7) = all_0_0_0 & m_Halt(all_0_14_14) = all_0_11_11 & s(zero) = all_0_17_17 & m_Ack(all_0_14_14, all_0_15_15) = all_0_10_10 & host(all_0_5_5) = nbr_proc & host(all_0_6_6) = all_0_3_3 & host(all_0_7_7) = nbr_proc & host(all_0_8_8) = all_0_13_13 & host(all_0_14_14) = all_0_13_13 & host(all_0_15_15) = all_0_13_13 & queue(all_0_13_13) = all_0_12_12 & queue(nbr_proc) = all_0_1_1 & ordered(q_nil) & leq(all_0_17_17, nbr_proc) & setIn(all_0_8_8, alive) & setIn(all_0_15_15, alive) & elem(all_0_0_0, all_0_9_9) & elem(all_0_2_2, all_0_1_1) &  ~ setIn(nil, alive) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] :  ! [v6] :  ! [v7] : (v5 = v4 |  ~ (m_Down(v3) = v6) |  ~ (m_Down(v1) = v7) |  ~ (host(v2) = v4) |  ~ (host(v0) = v5) |  ~ setIn(v2, alive) |  ~ setIn(v0, alive) |  ? [v8] : (( ~ (v8 = v5) & host(v1) = v8) | ( ~ (v8 = v4) & host(v3) = v8) | (queue(v5) = v8 &  ~ elem(v6, v8)) | (queue(v4) = v8 &  ~ elem(v7, v8)))) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] :  ! [v6] : (v5 = v4 |  ~ (m_Down(v3) = v6) |  ~ (host(v2) = v4) |  ~ (host(v1) = v5) |  ~ (host(v0) = v5) |  ~ setIn(v2, alive) |  ~ setIn(v0, alive) |  ? [v7] : (( ~ (v7 = v4) & host(v3) = v7) | (index(down, v4) = v7 &  ~ setIn(v5, v7)) | (queue(v5) = v7 &  ~ elem(v6, v7)))) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] :  ! [v6] : ( ~ (m_Down(v2) = v4) |  ~ (m_Down(v1) = v5) |  ~ (host(v3) = nbr_proc) |  ~ (host(v0) = v6) |  ~ setIn(v0, alive) |  ? [v7] :  ? [v8] :  ? [v9] : ((v7 = all_0_1_1 &  ~ elem(v4, all_0_1_1)) | (v7 = all_0_4_4 &  ~ (v9 = v8) & host(v2) = v8 & leq(all_0_17_17, v9) &  ~ leq(nbr_proc, v9) &  ~ setIn(v9, all_0_4_4)) | ( ~ (v7 = nbr_proc) & host(v1) = v7) | (queue(v6) = v7 &  ~ elem(v5, v7)))) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] : (v4 = v3 |  ~ (m_Down(v0) = v5) |  ~ (host(v2) = v3) |  ~ (host(v1) = v4) |  ~ setIn(v2, alive) |  ? [v6] :  ? [v7] : (( ~ (v7 = v4) & index(elid, v3) = v6 & host(v6) = v7) | ( ~ (v6 = v3) & host(v0) = v6) | ( ~ (v6 = wait) & index(status, v3) = v6) | (queue(v4) = v6 &  ~ elem(v5, v6)))) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] : (v4 = v3 |  ~ (m_Down(v0) = v5) |  ~ (host(v2) = v3) |  ~ (host(v1) = v4) |  ~ setIn(v2, alive) |  ? [v6] : (( ~ (v6 = v4) & index(ldr, v3) = v6) | ( ~ (v6 = v3) & host(v0) = v6) | ( ~ (v6 = norm) & index(status, v3) = v6) | (queue(v4) = v6 &  ~ elem(v5, v6)))) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] : ( ~ (cons(v3, v0) = v4) |  ~ (m_Down(v2) = v5) |  ~ (m_Halt(v1) = v3) |  ~ ordered(v4) |  ~ elem(v5, v0) | leq(v1, v2) |  ? [v6] :  ? [v7] : ( ~ (v7 = v6) & host(v2) = v7 & host(v1) = v6)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] : (v3 = v2 |  ~ (m_Ack(v1, v3) = v4) |  ~ (m_Ack(v0, v2) = v4)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] : (v1 = v0 |  ~ (m_Ack(v1, v3) = v4) |  ~ (m_Ack(v0, v2) = v4)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] : ( ~ (snoc(v2, v1) = v3) |  ~ (cons(v0, v3) = v4) |  ? [v5] : (snoc(v5, v1) = v4 & cons(v0, v2) = v5)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] : ( ~ (snoc(v0, v3) = v4) |  ~ (m_Ack(v1, v2) = v3) |  ~ ordered(v0) | ordered(v4)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v3 = v0 | v0 = q_nil |  ~ (init(v0) = v1) |  ~ (snoc(v1, v2) = v3) |  ~ (last(v0) = v2)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v3 = v0 | v0 = q_nil |  ~ (tail(v0) = v2) |  ~ (cons(v1, v2) = v3) |  ~ (head(v0) = v1)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v1 = v0 |  ~ (index(v3, v2) = v1) |  ~ (index(v3, v2) = v0)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v1 = v0 |  ~ (snoc(v3, v2) = v1) |  ~ (snoc(v3, v2) = v0)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v1 = v0 |  ~ (snoc(v2, v1) = v3) |  ~ elem(v0, v3) | elem(v0, v2)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v1 = v0 |  ~ (cons(v3, v2) = v1) |  ~ (cons(v3, v2) = v0)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v1 = v0 |  ~ (cons(v1, v2) = v3) |  ~ elem(v0, v3) | elem(v0, v2)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v1 = v0 |  ~ (m_Ack(v3, v2) = v1) |  ~ (m_Ack(v3, v2) = v0)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (snoc(v2, v1) = v3) |  ~ elem(v0, v2) | elem(v0, v3)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (snoc(v0, v2) = v3) |  ~ (m_Ldr(v1) = v2) |  ~ ordered(v0) | ordered(v3)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (cons(v1, v2) = v3) |  ~ elem(v0, v2) | elem(v0, v3)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (m_NormQ(v2) = v3) |  ~ (m_Ack(v0, v1) = v3)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (m_Ldr(v2) = v3) |  ~ (m_Ack(v0, v1) = v3)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (m_Ldr(v1) = v2) |  ~ (host(v0) = v3) |  ? [v4] : ((host(v1) = v4 &  ~ leq(v3, v4)) | (queue(v3) = v4 &  ~ elem(v2, v4)))) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (m_NotNorm(v2) = v3) |  ~ (m_Ack(v0, v1) = v3)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (m_Down(v2) = v3) |  ~ (m_Ack(v0, v1) = v3)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (m_Down(v1) = v2) |  ~ (host(v0) = v3) |  ? [v4] : (( ~ (v4 = v3) & host(v1) = v4) | (queue(v3) = v4 &  ~ elem(v2, v4)))) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (m_Halt(v2) = v3) |  ~ (m_Ack(v0, v1) = v3)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (s(v1) = v3) |  ~ (s(v0) = v2) |  ~ leq(v2, v3) | leq(v0, v1)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (s(v1) = v3) |  ~ (s(v0) = v2) |  ~ leq(v0, v1) | leq(v2, v3)) &  ! [v0] :  ! [v1] :  ! [v2] : (v2 = v1 |  ~ (m_NormQ(v0) = v2) |  ~ (m_NormQ(v0) = v1)) &  ! [v0] :  ! [v1] :  ! [v2] : (v2 = v1 |  ~ (m_Ldr(v0) = v2) |  ~ (m_Ldr(v0) = v1)) &  ! [v0] :  ! [v1] :  ! [v2] : (v2 = v1 |  ~ (m_NotNorm(v0) = v2) |  ~ (m_NotNorm(v0) = v1)) &  ! [v0] :  ! [v1] :  ! [v2] : (v2 = v1 |  ~ (m_Down(v0) = v2) |  ~ (m_Down(v0) = v1)) &  ! [v0] :  ! [v1] :  ! [v2] : (v2 = v1 |  ~ (m_Halt(v0) = v2) |  ~ (m_Halt(v0) = v1)) &  ! [v0] :  ! [v1] :  ! [v2] : (v2 = v1 |  ~ (host(v0) = v2) |  ~ (host(v0) = v1)) &  ! [v0] :  ! [v1] :  ! [v2] : (v2 = v0 |  ~ (s(v1) = v2) |  ~ leq(v0, v2) | leq(v0, v1)) &  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (pidMsg(v2) = v1) |  ~ (pidMsg(v2) = v0)) &  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (init(v2) = v1) |  ~ (init(v2) = v0)) &  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (last(v2) = v1) |  ~ (last(v2) = v0)) &  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (tail(v2) = v1) |  ~ (tail(v2) = v0)) &  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (head(v2) = v1) |  ~ (head(v2) = v0)) &  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (m_NormQ(v2) = v1) |  ~ (m_NormQ(v2) = v0)) &  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (m_NormQ(v1) = v2) |  ~ (m_NormQ(v0) = v2)) &  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (m_Ldr(v2) = v1) |  ~ (m_Ldr(v2) = v0)) &  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (m_Ldr(v1) = v2) |  ~ (m_Ldr(v0) = v2)) &  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (m_NotNorm(v2) = v1) |  ~ (m_NotNorm(v2) = v0)) &  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (m_NotNorm(v1) = v2) |  ~ (m_NotNorm(v0) = v2)) &  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (m_Down(v2) = v1) |  ~ (m_Down(v2) = v0)) &  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (m_Down(v1) = v2) |  ~ (m_Down(v0) = v2)) &  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (m_Halt(v2) = v1) |  ~ (m_Halt(v2) = v0)) &  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (m_Halt(v1) = v2) |  ~ (m_Halt(v0) = v2)) &  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (s(v2) = v1) |  ~ (s(v2) = v0)) &  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (host(v2) = v1) |  ~ (host(v2) = v0)) &  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (host(v1) = v2) |  ~ (host(v0) = v2) |  ~ setIn(v1, alive) |  ~ setIn(v0, alive)) &  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (queue(v2) = v1) |  ~ (queue(v2) = v0)) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (snoc(v1, v0) = v2) |  ~ ordered(v2) | ordered(v1)) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (snoc(v1, v0) = v2) |  ~ ordered(v2) |  ? [v3] :  ? [v4] : (pidMsg(v0) = v3 & host(v3) = v4 &  ! [v5] :  ! [v6] : ( ~ (pidMsg(v5) = v6) |  ~ pidElem(v5) |  ~ pidElem(v0) |  ~ elem(v5, v1) | leq(v6, v3) |  ? [v7] : ( ~ (v7 = v4) & host(v6) = v7)))) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (snoc(v1, v0) = v2) |  ~ ordered(v1) | ordered(v2) |  ? [v3] :  ? [v4] :  ? [v5] :  ? [v6] : (pidMsg(v5) = v6 & pidMsg(v0) = v3 & host(v6) = v4 & host(v3) = v4 & pidElem(v5) & pidElem(v0) & elem(v5, v1) &  ~ leq(v6, v3))) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (snoc(v1, v0) = v2) | init(v2) = v1) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (snoc(v1, v0) = v2) | last(v2) = v0) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (snoc(v1, v0) = v2) | elem(v0, v2)) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (cons(v0, v1) = v2) |  ~ ordered(v2) | ordered(v1)) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (cons(v0, v1) = v2) |  ~ ordered(v2) |  ? [v3] :  ? [v4] : (pidMsg(v0) = v3 & host(v3) = v4 &  ! [v5] :  ! [v6] : ( ~ (pidMsg(v5) = v6) |  ~ pidElem(v5) |  ~ pidElem(v0) |  ~ elem(v5, v1) | leq(v3, v6) |  ? [v7] : ( ~ (v7 = v4) & host(v6) = v7)))) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (cons(v0, v1) = v2) |  ~ ordered(v1) | ordered(v2) |  ? [v3] :  ? [v4] :  ? [v5] :  ? [v6] : (pidMsg(v5) = v6 & pidMsg(v0) = v3 & host(v6) = v4 & host(v3) = v4 & pidElem(v5) & pidElem(v0) & elem(v5, v1) &  ~ leq(v3, v6))) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (cons(v0, v1) = v2) | tail(v2) = v1) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (cons(v0, v1) = v2) | head(v2) = v0) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (cons(v0, v1) = v2) | elem(v0, v2)) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (m_NormQ(v1) = v2) |  ~ (m_Ldr(v0) = v2)) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (m_NormQ(v1) = v2) |  ~ (m_Down(v0) = v2)) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (m_NormQ(v0) = v2) |  ~ (m_NotNorm(v1) = v2)) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (m_NormQ(v0) = v2) |  ~ (m_Halt(v1) = v2)) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (m_Ldr(v1) = v2) |  ~ (m_Down(v0) = v2)) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (m_Ldr(v0) = v2) |  ~ (m_NotNorm(v1) = v2)) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (m_Ldr(v0) = v2) |  ~ (m_Halt(v1) = v2)) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (m_NotNorm(v1) = v2) |  ~ (m_Down(v0) = v2)) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (m_NotNorm(v0) = v2) |  ~ (m_Halt(v1) = v2)) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (m_NotNorm(v0) = v2) |  ~ (host(v1) = nbr_proc) |  ~ elem(v2, all_0_1_1)) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (m_Down(v0) = v2) |  ~ (m_Halt(v1) = v2)) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (s(v1) = v2) |  ~ leq(v0, v1) | leq(v0, v2)) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (m_Ack(v0, v1) = v2) | setIn(v1, pids) |  ? [v3] :  ? [v4] : (host(v0) = v3 & queue(v3) = v4 &  ~ elem(v2, v4))) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (m_Ack(v0, v1) = v2) | setIn(v0, pids) |  ? [v3] :  ? [v4] : (host(v0) = v3 & queue(v3) = v4 &  ~ elem(v2, v4))) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (host(v1) = v2) |  ~ (host(v0) = v2) |  ? [v3] : ( ~ (v3 = v2) & s(v2) = v3)) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ leq(v1, v2) |  ~ leq(v0, v1) | leq(v0, v2)) &  ! [v0] :  ! [v1] : (v1 = v0 |  ~ leq(v1, v0) |  ~ leq(v0, v1)) &  ! [v0] :  ! [v1] :  ~ (snoc(v1, v0) = q_nil) &  ! [v0] :  ! [v1] : ( ~ (snoc(q_nil, v0) = v1) | ordered(v1)) &  ! [v0] :  ! [v1] :  ~ (cons(v0, v1) = q_nil) &  ! [v0] :  ! [v1] : ( ~ (cons(v0, q_nil) = v1) | snoc(q_nil, v0) = v1) &  ! [v0] :  ! [v1] : ( ~ (cons(v0, q_nil) = v1) | ordered(v1)) &  ! [v0] :  ! [v1] : ( ~ (m_Down(v1) = v0) | pidElem(v0)) &  ! [v0] :  ! [v1] : ( ~ (m_Down(v0) = v1) | pidMsg(v1) = v0) &  ! [v0] :  ! [v1] : ( ~ (m_Halt(v1) = v0) | pidElem(v0)) &  ! [v0] :  ! [v1] : ( ~ (m_Halt(v0) = v1) | pidMsg(v1) = v0) &  ! [v0] :  ! [v1] : ( ~ (s(v1) = v0) | leq(v0, v0)) &  ! [v0] :  ! [v1] : ( ~ (s(v0) = v1) |  ~ leq(v1, v0)) &  ! [v0] :  ! [v1] : ( ~ (host(v0) = v1) |  ~ setIn(v0, alive) |  ? [v2] : ((v2 = v0 & index(elid, v1) = v0) | ( ~ (v2 = elec_1) &  ~ (v2 = elec_2) & index(status, v1) = v2))) &  ! [v0] :  ! [v1] : ( ~ (host(v0) = v1) | leq(v1, nbr_proc)) &  ! [v0] :  ! [v1] : ( ~ (host(v0) = v1) | leq(all_0_17_17, v1)) &  ! [v0] : (v0 = all_0_3_3 |  ~ leq(all_0_17_17, v0) | leq(nbr_proc, v0) | setIn(v0, all_0_4_4)) &  ! [v0] : ( ~ pidElem(v0) |  ? [v1] :  ? [v2] : ((v2 = v0 & m_Down(v1) = v0) | (v2 = v0 & m_Halt(v1) = v0))) &  ! [v0] :  ~ setIn(v0, setEmpty) &  ! [v0] :  ~ elem(v0, q_nil) &  ? [v0] :  ? [v1] :  ? [v2] : index(v1, v0) = v2 &  ? [v0] :  ? [v1] :  ? [v2] : snoc(v1, v0) = v2 &  ? [v0] :  ? [v1] :  ? [v2] : cons(v1, v0) = v2 &  ? [v0] :  ? [v1] :  ? [v2] : m_Ack(v1, v0) = v2 &  ? [v0] :  ? [v1] : pidMsg(v0) = v1 &  ? [v0] :  ? [v1] : init(v0) = v1 &  ? [v0] :  ? [v1] : last(v0) = v1 &  ? [v0] :  ? [v1] : tail(v0) = v1 &  ? [v0] :  ? [v1] : head(v0) = v1 &  ? [v0] :  ? [v1] : m_NormQ(v0) = v1 &  ? [v0] :  ? [v1] : m_Ldr(v0) = v1 &  ? [v0] :  ? [v1] : m_NotNorm(v0) = v1 &  ? [v0] :  ? [v1] : m_Down(v0) = v1 &  ? [v0] :  ? [v1] : m_Halt(v0) = v1 &  ? [v0] :  ? [v1] : s(v0) = v1 &  ? [v0] :  ? [v1] : host(v0) = v1 &  ? [v0] :  ? [v1] : queue(v0) = v1 &  ? [v0] :  ? [v1] : (leq(v1, v0) | leq(v0, v1)) &  ? [v0] : leq(v0, v0)
% 254.18/182.99  |
% 254.18/182.99  | Applying alpha-rule on (1) yields:
% 254.18/182.99  | (2)  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (m_Down(v2) = v1) |  ~ (m_Down(v2) = v0))
% 254.18/182.99  | (3)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (m_Halt(v2) = v3) |  ~ (m_Ack(v0, v1) = v3))
% 254.18/182.99  | (4) index(status, nbr_proc) = elec_1
% 254.18/182.99  | (5)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] :  ! [v6] : ( ~ (m_Down(v2) = v4) |  ~ (m_Down(v1) = v5) |  ~ (host(v3) = nbr_proc) |  ~ (host(v0) = v6) |  ~ setIn(v0, alive) |  ? [v7] :  ? [v8] :  ? [v9] : ((v7 = all_0_1_1 &  ~ elem(v4, all_0_1_1)) | (v7 = all_0_4_4 &  ~ (v9 = v8) & host(v2) = v8 & leq(all_0_17_17, v9) &  ~ leq(nbr_proc, v9) &  ~ setIn(v9, all_0_4_4)) | ( ~ (v7 = nbr_proc) & host(v1) = v7) | (queue(v6) = v7 &  ~ elem(v5, v7))))
% 254.18/182.99  | (6) host(all_0_14_14) = all_0_13_13
% 254.18/182.99  | (7)  ! [v0] : ( ~ pidElem(v0) |  ? [v1] :  ? [v2] : ((v2 = v0 & m_Down(v1) = v0) | (v2 = v0 & m_Halt(v1) = v0)))
% 254.18/183.00  | (8)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] :  ! [v6] :  ! [v7] : (v5 = v4 |  ~ (m_Down(v3) = v6) |  ~ (m_Down(v1) = v7) |  ~ (host(v2) = v4) |  ~ (host(v0) = v5) |  ~ setIn(v2, alive) |  ~ setIn(v0, alive) |  ? [v8] : (( ~ (v8 = v5) & host(v1) = v8) | ( ~ (v8 = v4) & host(v3) = v8) | (queue(v5) = v8 &  ~ elem(v6, v8)) | (queue(v4) = v8 &  ~ elem(v7, v8))))
% 254.18/183.00  | (9)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] : (v4 = v3 |  ~ (m_Down(v0) = v5) |  ~ (host(v2) = v3) |  ~ (host(v1) = v4) |  ~ setIn(v2, alive) |  ? [v6] :  ? [v7] : (( ~ (v7 = v4) & index(elid, v3) = v6 & host(v6) = v7) | ( ~ (v6 = v3) & host(v0) = v6) | ( ~ (v6 = wait) & index(status, v3) = v6) | (queue(v4) = v6 &  ~ elem(v5, v6))))
% 254.18/183.00  | (10)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] : ( ~ (snoc(v2, v1) = v3) |  ~ (cons(v0, v3) = v4) |  ? [v5] : (snoc(v5, v1) = v4 & cons(v0, v2) = v5))
% 254.18/183.00  | (11)  ~ setIn(nil, alive)
% 254.18/183.00  | (12) host(all_0_8_8) = all_0_13_13
% 254.18/183.00  | (13)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (snoc(v1, v0) = v2) |  ~ ordered(v2) |  ? [v3] :  ? [v4] : (pidMsg(v0) = v3 & host(v3) = v4 &  ! [v5] :  ! [v6] : ( ~ (pidMsg(v5) = v6) |  ~ pidElem(v5) |  ~ pidElem(v0) |  ~ elem(v5, v1) | leq(v6, v3) |  ? [v7] : ( ~ (v7 = v4) & host(v6) = v7))))
% 254.18/183.00  | (14)  ~ (wait = elec_2)
% 254.18/183.00  | (15)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] : (v1 = v0 |  ~ (m_Ack(v1, v3) = v4) |  ~ (m_Ack(v0, v2) = v4))
% 254.18/183.00  | (16)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (m_Down(v0) = v2) |  ~ (m_Halt(v1) = v2))
% 254.18/183.00  | (17) elem(all_0_2_2, all_0_1_1)
% 254.18/183.00  | (18)  ! [v0] :  ! [v1] : ( ~ (m_Halt(v0) = v1) | pidMsg(v1) = v0)
% 254.18/183.00  | (19)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v1 = v0 |  ~ (index(v3, v2) = v1) |  ~ (index(v3, v2) = v0))
% 254.18/183.00  | (20)  ? [v0] :  ? [v1] : m_Ldr(v0) = v1
% 254.18/183.00  | (21)  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (m_Halt(v1) = v2) |  ~ (m_Halt(v0) = v2))
% 254.18/183.00  | (22)  ! [v0] :  ! [v1] : ( ~ (host(v0) = v1) | leq(v1, nbr_proc))
% 254.18/183.00  | (23)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (s(v1) = v3) |  ~ (s(v0) = v2) |  ~ leq(v0, v1) | leq(v2, v3))
% 254.18/183.00  | (24)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (s(v1) = v3) |  ~ (s(v0) = v2) |  ~ leq(v2, v3) | leq(v0, v1))
% 254.18/183.00  | (25)  ? [v0] :  ? [v1] : m_Halt(v0) = v1
% 254.18/183.00  | (26)  ~ (norm = wait)
% 254.18/183.00  | (27)  ! [v0] :  ! [v1] : ( ~ (m_Halt(v1) = v0) | pidElem(v0))
% 254.18/183.00  | (28)  ? [v0] :  ? [v1] : m_NotNorm(v0) = v1
% 254.18/183.00  | (29)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (m_NormQ(v0) = v2) |  ~ (m_Halt(v1) = v2))
% 254.18/183.00  | (30)  ! [v0] :  ! [v1] : ( ~ (s(v0) = v1) |  ~ leq(v1, v0))
% 254.18/183.00  | (31)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (m_Ack(v0, v1) = v2) | setIn(v1, pids) |  ? [v3] :  ? [v4] : (host(v0) = v3 & queue(v3) = v4 &  ~ elem(v2, v4)))
% 254.18/183.00  | (32)  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (m_Down(v1) = v2) |  ~ (m_Down(v0) = v2))
% 254.18/183.00  | (33)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] :  ! [v6] : (v5 = v4 |  ~ (m_Down(v3) = v6) |  ~ (host(v2) = v4) |  ~ (host(v1) = v5) |  ~ (host(v0) = v5) |  ~ setIn(v2, alive) |  ~ setIn(v0, alive) |  ? [v7] : (( ~ (v7 = v4) & host(v3) = v7) | (index(down, v4) = v7 &  ~ setIn(v5, v7)) | (queue(v5) = v7 &  ~ elem(v6, v7))))
% 254.18/183.00  | (34)  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (init(v2) = v1) |  ~ (init(v2) = v0))
% 254.18/183.00  | (35) snoc(all_0_16_16, all_0_10_10) = all_0_9_9
% 254.18/183.00  | (36)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (cons(v0, v1) = v2) |  ~ ordered(v2) | ordered(v1))
% 254.18/183.00  | (37) m_Ack(all_0_14_14, all_0_15_15) = all_0_10_10
% 254.18/183.00  | (38)  ! [v0] :  ! [v1] :  ! [v2] : (v2 = v1 |  ~ (host(v0) = v2) |  ~ (host(v0) = v1))
% 254.18/183.00  | (39)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (snoc(v2, v1) = v3) |  ~ elem(v0, v2) | elem(v0, v3))
% 254.18/183.00  | (40)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (snoc(v1, v0) = v2) | init(v2) = v1)
% 254.18/183.00  | (41) setIn(all_0_15_15, alive)
% 254.18/183.00  | (42)  ! [v0] :  ! [v1] : ( ~ (cons(v0, q_nil) = v1) | ordered(v1))
% 254.18/183.00  | (43)  ~ (norm = elec_2)
% 254.18/183.00  | (44)  ! [v0] :  ! [v1] : ( ~ (host(v0) = v1) | leq(all_0_17_17, v1))
% 254.18/183.00  | (45)  ! [v0] :  ! [v1] : ( ~ (m_Down(v1) = v0) | pidElem(v0))
% 254.18/183.00  | (46) m_Halt(all_0_14_14) = all_0_11_11
% 254.18/183.00  | (47)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v3 = v0 | v0 = q_nil |  ~ (init(v0) = v1) |  ~ (snoc(v1, v2) = v3) |  ~ (last(v0) = v2))
% 254.18/183.00  | (48)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (snoc(v0, v2) = v3) |  ~ (m_Ldr(v1) = v2) |  ~ ordered(v0) | ordered(v3))
% 254.18/183.00  | (49)  ? [v0] :  ? [v1] : (leq(v1, v0) | leq(v0, v1))
% 254.18/183.00  | (50)  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (m_NormQ(v2) = v1) |  ~ (m_NormQ(v2) = v0))
% 254.18/183.01  | (51)  ? [v0] :  ? [v1] :  ? [v2] : index(v1, v0) = v2
% 254.18/183.01  | (52)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (cons(v0, v1) = v2) | elem(v0, v2))
% 254.18/183.01  | (53) host(all_0_15_15) = all_0_13_13
% 254.18/183.01  | (54)  ! [v0] :  ! [v1] : (v1 = v0 |  ~ leq(v1, v0) |  ~ leq(v0, v1))
% 254.18/183.01  | (55)  ? [v0] :  ? [v1] :  ? [v2] : cons(v1, v0) = v2
% 254.18/183.01  | (56)  ! [v0] :  ! [v1] :  ! [v2] : (v2 = v0 |  ~ (s(v1) = v2) |  ~ leq(v0, v2) | leq(v0, v1))
% 254.18/183.01  | (57)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] : ( ~ (cons(v3, v0) = v4) |  ~ (m_Down(v2) = v5) |  ~ (m_Halt(v1) = v3) |  ~ ordered(v4) |  ~ elem(v5, v0) | leq(v1, v2) |  ? [v6] :  ? [v7] : ( ~ (v7 = v6) & host(v2) = v7 & host(v1) = v6))
% 254.18/183.01  | (58)  ! [v0] :  ! [v1] : ( ~ (m_Down(v0) = v1) | pidMsg(v1) = v0)
% 254.18/183.01  | (59)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (s(v1) = v2) |  ~ leq(v0, v1) | leq(v0, v2))
% 254.18/183.01  | (60)  ! [v0] :  ~ elem(v0, q_nil)
% 254.18/183.01  | (61)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] : (v4 = v3 |  ~ (m_Down(v0) = v5) |  ~ (host(v2) = v3) |  ~ (host(v1) = v4) |  ~ setIn(v2, alive) |  ? [v6] : (( ~ (v6 = v4) & index(ldr, v3) = v6) | ( ~ (v6 = v3) & host(v0) = v6) | ( ~ (v6 = norm) & index(status, v3) = v6) | (queue(v4) = v6 &  ~ elem(v5, v6))))
% 254.18/183.01  | (62)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (m_Ack(v0, v1) = v2) | setIn(v0, pids) |  ? [v3] :  ? [v4] : (host(v0) = v3 & queue(v3) = v4 &  ~ elem(v2, v4)))
% 254.18/183.01  | (63)  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (pidMsg(v2) = v1) |  ~ (pidMsg(v2) = v0))
% 254.18/183.01  | (64)  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (m_NotNorm(v2) = v1) |  ~ (m_NotNorm(v2) = v0))
% 254.18/183.01  | (65)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (m_NormQ(v1) = v2) |  ~ (m_Ldr(v0) = v2))
% 254.18/183.01  | (66) m_Down(all_0_6_6) = all_0_2_2
% 254.18/183.01  | (67)  ! [v0] :  ! [v1] :  ! [v2] : (v2 = v1 |  ~ (m_Ldr(v0) = v2) |  ~ (m_Ldr(v0) = v1))
% 254.18/183.01  | (68)  ? [v0] :  ? [v1] :  ? [v2] : m_Ack(v1, v0) = v2
% 254.18/183.01  | (69)  ! [v0] :  ~ setIn(v0, setEmpty)
% 254.18/183.01  | (70)  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (host(v1) = v2) |  ~ (host(v0) = v2) |  ~ setIn(v1, alive) |  ~ setIn(v0, alive))
% 254.18/183.01  | (71)  ! [v0] :  ! [v1] :  ! [v2] : (v2 = v1 |  ~ (m_Halt(v0) = v2) |  ~ (m_Halt(v0) = v1))
% 254.18/183.01  | (72)  ? [v0] :  ? [v1] : pidMsg(v0) = v1
% 254.18/183.01  | (73)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v1 = v0 |  ~ (cons(v1, v2) = v3) |  ~ elem(v0, v3) | elem(v0, v2))
% 254.18/183.01  | (74)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v1 = v0 |  ~ (m_Ack(v3, v2) = v1) |  ~ (m_Ack(v3, v2) = v0))
% 254.18/183.01  | (75)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] : (v3 = v2 |  ~ (m_Ack(v1, v3) = v4) |  ~ (m_Ack(v0, v2) = v4))
% 254.18/183.01  | (76)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ leq(v1, v2) |  ~ leq(v0, v1) | leq(v0, v2))
% 254.61/183.01  | (77)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (host(v1) = v2) |  ~ (host(v0) = v2) |  ? [v3] : ( ~ (v3 = v2) & s(v2) = v3))
% 254.61/183.01  | (78)  ~ (elec_1 = elec_2)
% 254.61/183.01  | (79)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v1 = v0 |  ~ (snoc(v3, v2) = v1) |  ~ (snoc(v3, v2) = v0))
% 254.61/183.01  | (80)  ! [v0] :  ! [v1] : ( ~ (cons(v0, q_nil) = v1) | snoc(q_nil, v0) = v1)
% 254.61/183.01  | (81)  ? [v0] :  ? [v1] : queue(v0) = v1
% 254.61/183.01  | (82)  ~ (wait = elec_1)
% 254.61/183.01  | (83) host(all_0_7_7) = nbr_proc
% 254.61/183.01  | (84)  ! [v0] :  ! [v1] :  ! [v2] : (v2 = v1 |  ~ (m_NormQ(v0) = v2) |  ~ (m_NormQ(v0) = v1))
% 254.61/183.01  | (85) index(down, nbr_proc) = all_0_4_4
% 254.61/183.01  | (86)  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (tail(v2) = v1) |  ~ (tail(v2) = v0))
% 254.61/183.01  | (87)  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (m_NotNorm(v1) = v2) |  ~ (m_NotNorm(v0) = v2))
% 254.61/183.01  | (88)  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (m_Halt(v2) = v1) |  ~ (m_Halt(v2) = v0))
% 254.61/183.01  | (89)  ! [v0] : (v0 = all_0_3_3 |  ~ leq(all_0_17_17, v0) | leq(nbr_proc, v0) | setIn(v0, all_0_4_4))
% 254.61/183.01  | (90)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (cons(v1, v2) = v3) |  ~ elem(v0, v2) | elem(v0, v3))
% 254.61/183.01  | (91)  ~ (norm = elec_1)
% 254.61/183.01  | (92)  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (m_Ldr(v1) = v2) |  ~ (m_Ldr(v0) = v2))
% 254.62/183.01  | (93)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (m_NotNorm(v0) = v2) |  ~ (m_Halt(v1) = v2))
% 254.62/183.01  | (94)  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (m_Ldr(v2) = v1) |  ~ (m_Ldr(v2) = v0))
% 254.62/183.01  | (95) elem(all_0_0_0, all_0_9_9)
% 254.62/183.01  | (96)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (m_NotNorm(v2) = v3) |  ~ (m_Ack(v0, v1) = v3))
% 254.62/183.01  | (97)  ? [v0] :  ? [v1] : head(v0) = v1
% 254.62/183.01  | (98)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (m_Ldr(v1) = v2) |  ~ (m_Down(v0) = v2))
% 254.62/183.02  | (99)  ! [v0] :  ! [v1] : ( ~ (s(v1) = v0) | leq(v0, v0))
% 254.62/183.02  | (100) queue(all_0_13_13) = all_0_12_12
% 254.62/183.02  | (101)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (cons(v0, v1) = v2) |  ~ ordered(v1) | ordered(v2) |  ? [v3] :  ? [v4] :  ? [v5] :  ? [v6] : (pidMsg(v5) = v6 & pidMsg(v0) = v3 & host(v6) = v4 & host(v3) = v4 & pidElem(v5) & pidElem(v0) & elem(v5, v1) &  ~ leq(v3, v6)))
% 254.62/183.02  | (102) s(zero) = all_0_17_17
% 254.62/183.02  | (103)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (snoc(v1, v0) = v2) | elem(v0, v2))
% 254.62/183.02  | (104)  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (head(v2) = v1) |  ~ (head(v2) = v0))
% 254.62/183.02  | (105)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (m_Ldr(v0) = v2) |  ~ (m_Halt(v1) = v2))
% 254.62/183.02  | (106)  ! [v0] :  ! [v1] :  ! [v2] : (v2 = v1 |  ~ (m_Down(v0) = v2) |  ~ (m_Down(v0) = v1))
% 254.62/183.02  | (107)  ? [v0] :  ? [v1] : m_Down(v0) = v1
% 254.62/183.02  | (108)  ! [v0] :  ! [v1] :  ~ (snoc(v1, v0) = q_nil)
% 254.62/183.02  | (109)  ? [v0] :  ? [v1] : host(v0) = v1
% 254.62/183.02  | (110) ordered(q_nil)
% 254.62/183.02  | (111)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (snoc(v1, v0) = v2) | last(v2) = v0)
% 254.62/183.02  | (112) m_Down(all_0_7_7) = all_0_0_0
% 254.62/183.02  | (113)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (m_Ldr(v1) = v2) |  ~ (host(v0) = v3) |  ? [v4] : ((host(v1) = v4 &  ~ leq(v3, v4)) | (queue(v3) = v4 &  ~ elem(v2, v4))))
% 254.62/183.02  | (114)  ! [v0] :  ! [v1] :  ! [v2] : (v2 = v1 |  ~ (m_NotNorm(v0) = v2) |  ~ (m_NotNorm(v0) = v1))
% 254.62/183.02  | (115) host(all_0_5_5) = nbr_proc
% 254.62/183.02  | (116)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (m_NotNorm(v1) = v2) |  ~ (m_Down(v0) = v2))
% 254.62/183.02  | (117)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] : ( ~ (snoc(v0, v3) = v4) |  ~ (m_Ack(v1, v2) = v3) |  ~ ordered(v0) | ordered(v4))
% 254.62/183.02  | (118)  ? [v0] :  ? [v1] : tail(v0) = v1
% 254.62/183.02  | (119)  ? [v0] :  ? [v1] : m_NormQ(v0) = v1
% 254.62/183.02  | (120)  ? [v0] : leq(v0, v0)
% 254.62/183.02  | (121) leq(all_0_17_17, nbr_proc)
% 254.62/183.02  | (122)  ! [v0] :  ! [v1] : ( ~ (host(v0) = v1) |  ~ setIn(v0, alive) |  ? [v2] : ((v2 = v0 & index(elid, v1) = v0) | ( ~ (v2 = elec_1) &  ~ (v2 = elec_2) & index(status, v1) = v2)))
% 254.62/183.02  | (123)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (snoc(v1, v0) = v2) |  ~ ordered(v1) | ordered(v2) |  ? [v3] :  ? [v4] :  ? [v5] :  ? [v6] : (pidMsg(v5) = v6 & pidMsg(v0) = v3 & host(v6) = v4 & host(v3) = v4 & pidElem(v5) & pidElem(v0) & elem(v5, v1) &  ~ leq(v6, v3)))
% 254.62/183.02  | (124)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (cons(v0, v1) = v2) | tail(v2) = v1)
% 254.62/183.02  | (125)  ? [v0] :  ? [v1] :  ? [v2] : snoc(v1, v0) = v2
% 254.62/183.02  | (126)  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (last(v2) = v1) |  ~ (last(v2) = v0))
% 254.62/183.02  | (127)  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (host(v2) = v1) |  ~ (host(v2) = v0))
% 254.62/183.02  | (128)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (m_Ldr(v2) = v3) |  ~ (m_Ack(v0, v1) = v3))
% 254.62/183.02  | (129) host(all_0_6_6) = all_0_3_3
% 254.62/183.02  | (130)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v1 = v0 |  ~ (cons(v3, v2) = v1) |  ~ (cons(v3, v2) = v0))
% 254.62/183.02  | (131)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (m_NotNorm(v0) = v2) |  ~ (host(v1) = nbr_proc) |  ~ elem(v2, all_0_1_1))
% 254.62/183.02  | (132)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v1 = v0 |  ~ (snoc(v2, v1) = v3) |  ~ elem(v0, v3) | elem(v0, v2))
% 254.62/183.02  | (133)  ? [v0] :  ? [v1] : s(v0) = v1
% 254.62/183.02  | (134) setIn(all_0_8_8, alive)
% 254.62/183.02  | (135)  ! [v0] :  ! [v1] : ( ~ (snoc(q_nil, v0) = v1) | ordered(v1))
% 254.62/183.02  | (136)  ! [v0] :  ! [v1] :  ~ (cons(v0, v1) = q_nil)
% 254.62/183.02  | (137)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (m_NormQ(v2) = v3) |  ~ (m_Ack(v0, v1) = v3))
% 254.62/183.02  | (138)  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (m_NormQ(v1) = v2) |  ~ (m_NormQ(v0) = v2))
% 254.62/183.02  | (139)  ~ (all_0_13_13 = nbr_proc)
% 254.62/183.02  | (140)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (cons(v0, v1) = v2) |  ~ ordered(v2) |  ? [v3] :  ? [v4] : (pidMsg(v0) = v3 & host(v3) = v4 &  ! [v5] :  ! [v6] : ( ~ (pidMsg(v5) = v6) |  ~ pidElem(v5) |  ~ pidElem(v0) |  ~ elem(v5, v1) | leq(v3, v6) |  ? [v7] : ( ~ (v7 = v4) & host(v6) = v7))))
% 254.62/183.02  | (141)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v3 = v0 | v0 = q_nil |  ~ (tail(v0) = v2) |  ~ (cons(v1, v2) = v3) |  ~ (head(v0) = v1))
% 254.62/183.02  | (142)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (cons(v0, v1) = v2) | head(v2) = v0)
% 254.62/183.02  | (143)  ? [v0] :  ? [v1] : init(v0) = v1
% 254.62/183.02  | (144)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (snoc(v1, v0) = v2) |  ~ ordered(v2) | ordered(v1))
% 254.62/183.03  | (145)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (m_Down(v1) = v2) |  ~ (host(v0) = v3) |  ? [v4] : (( ~ (v4 = v3) & host(v1) = v4) | (queue(v3) = v4 &  ~ elem(v2, v4))))
% 254.62/183.03  | (146) cons(all_0_11_11, all_0_16_16) = all_0_12_12
% 254.62/183.03  | (147)  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (s(v2) = v1) |  ~ (s(v2) = v0))
% 254.62/183.03  | (148)  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (queue(v2) = v1) |  ~ (queue(v2) = v0))
% 254.62/183.03  | (149)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (m_NormQ(v1) = v2) |  ~ (m_Down(v0) = v2))
% 254.62/183.03  | (150)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (m_Ldr(v0) = v2) |  ~ (m_NotNorm(v1) = v2))
% 254.62/183.03  | (151) queue(nbr_proc) = all_0_1_1
% 254.62/183.03  | (152)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (m_Down(v2) = v3) |  ~ (m_Ack(v0, v1) = v3))
% 254.62/183.03  | (153)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (m_NormQ(v0) = v2) |  ~ (m_NotNorm(v1) = v2))
% 254.62/183.03  | (154)  ? [v0] :  ? [v1] : last(v0) = v1
% 254.62/183.03  |
% 254.62/183.03  | Instantiating formula (152) with all_0_10_10, all_0_7_7, all_0_15_15, all_0_14_14 and discharging atoms m_Ack(all_0_14_14, all_0_15_15) = all_0_10_10, yields:
% 254.62/183.03  | (155)  ~ (m_Down(all_0_7_7) = all_0_10_10)
% 254.62/183.03  |
% 254.62/183.03  | Instantiating formula (70) with all_0_13_13, all_0_8_8, all_0_15_15 and discharging atoms host(all_0_8_8) = all_0_13_13, host(all_0_15_15) = all_0_13_13, setIn(all_0_8_8, alive), setIn(all_0_15_15, alive), yields:
% 254.62/183.03  | (156) all_0_8_8 = all_0_15_15
% 254.62/183.03  |
% 254.62/183.03  | From (156) and (12) follows:
% 254.62/183.03  | (53) host(all_0_15_15) = all_0_13_13
% 254.62/183.03  |
% 254.62/183.03  | From (156) and (134) follows:
% 254.62/183.03  | (41) setIn(all_0_15_15, alive)
% 254.62/183.03  |
% 254.62/183.03  | Using (112) and (155) yields:
% 254.62/183.03  | (159)  ~ (all_0_0_0 = all_0_10_10)
% 254.62/183.03  |
% 254.62/183.03  | Instantiating formula (145) with nbr_proc, all_0_2_2, all_0_6_6, all_0_7_7 and discharging atoms m_Down(all_0_6_6) = all_0_2_2, host(all_0_7_7) = nbr_proc, yields:
% 254.62/183.03  | (160)  ? [v0] : (( ~ (v0 = nbr_proc) & host(all_0_6_6) = v0) | (queue(nbr_proc) = v0 &  ~ elem(all_0_2_2, v0)))
% 254.62/183.03  |
% 254.62/183.03  | Instantiating formula (145) with nbr_proc, all_0_0_0, all_0_7_7, all_0_7_7 and discharging atoms m_Down(all_0_7_7) = all_0_0_0, host(all_0_7_7) = nbr_proc, yields:
% 254.62/183.03  | (161)  ? [v0] : (( ~ (v0 = nbr_proc) & host(all_0_7_7) = v0) | (queue(nbr_proc) = v0 &  ~ elem(all_0_0_0, v0)))
% 254.62/183.03  |
% 254.62/183.03  | Instantiating formula (145) with all_0_13_13, all_0_0_0, all_0_7_7, all_0_15_15 and discharging atoms m_Down(all_0_7_7) = all_0_0_0, host(all_0_15_15) = all_0_13_13, yields:
% 254.62/183.03  | (162)  ? [v0] : (( ~ (v0 = all_0_13_13) & host(all_0_7_7) = v0) | (queue(all_0_13_13) = v0 &  ~ elem(all_0_0_0, v0)))
% 254.62/183.03  |
% 254.62/183.03  | Instantiating formula (5) with all_0_13_13, all_0_0_0, all_0_2_2, all_0_7_7, all_0_6_6, all_0_7_7, all_0_15_15 and discharging atoms m_Down(all_0_6_6) = all_0_2_2, m_Down(all_0_7_7) = all_0_0_0, host(all_0_7_7) = nbr_proc, host(all_0_15_15) = all_0_13_13, setIn(all_0_15_15, alive), yields:
% 254.62/183.03  | (163)  ? [v0] :  ? [v1] :  ? [v2] : ((v0 = all_0_1_1 &  ~ elem(all_0_2_2, all_0_1_1)) | (v0 = all_0_4_4 &  ~ (v2 = v1) & host(all_0_6_6) = v1 & leq(all_0_17_17, v2) &  ~ leq(nbr_proc, v2) &  ~ setIn(v2, all_0_4_4)) | ( ~ (v0 = nbr_proc) & host(all_0_7_7) = v0) | (queue(all_0_13_13) = v0 &  ~ elem(all_0_0_0, v0)))
% 254.62/183.03  |
% 254.62/183.03  | Instantiating formula (90) with all_0_12_12, all_0_16_16, all_0_11_11, all_0_0_0 and discharging atoms cons(all_0_11_11, all_0_16_16) = all_0_12_12, yields:
% 254.62/183.03  | (164)  ~ elem(all_0_0_0, all_0_16_16) | elem(all_0_0_0, all_0_12_12)
% 254.62/183.03  |
% 254.62/183.03  | Instantiating formula (132) with all_0_9_9, all_0_16_16, all_0_10_10, all_0_0_0 and discharging atoms snoc(all_0_16_16, all_0_10_10) = all_0_9_9, elem(all_0_0_0, all_0_9_9), yields:
% 254.62/183.03  | (165) all_0_0_0 = all_0_10_10 | elem(all_0_0_0, all_0_16_16)
% 254.62/183.03  |
% 254.62/183.03  | Instantiating (162) with all_57_0_61 yields:
% 254.62/183.03  | (166) ( ~ (all_57_0_61 = all_0_13_13) & host(all_0_7_7) = all_57_0_61) | (queue(all_0_13_13) = all_57_0_61 &  ~ elem(all_0_0_0, all_57_0_61))
% 254.62/183.03  |
% 254.62/183.03  | Instantiating (161) with all_59_0_63 yields:
% 254.62/183.03  | (167) ( ~ (all_59_0_63 = nbr_proc) & host(all_0_7_7) = all_59_0_63) | (queue(nbr_proc) = all_59_0_63 &  ~ elem(all_0_0_0, all_59_0_63))
% 254.62/183.03  |
% 254.62/183.03  | Instantiating (160) with all_62_0_66 yields:
% 254.62/183.03  | (168) ( ~ (all_62_0_66 = nbr_proc) & host(all_0_6_6) = all_62_0_66) | (queue(nbr_proc) = all_62_0_66 &  ~ elem(all_0_2_2, all_62_0_66))
% 254.62/183.03  |
% 254.62/183.03  | Instantiating (163) with all_81_0_95, all_81_1_96, all_81_2_97 yields:
% 254.62/183.03  | (169) (all_81_2_97 = all_0_1_1 &  ~ elem(all_0_2_2, all_0_1_1)) | (all_81_2_97 = all_0_4_4 &  ~ (all_81_0_95 = all_81_1_96) & host(all_0_6_6) = all_81_1_96 & leq(all_0_17_17, all_81_0_95) &  ~ leq(nbr_proc, all_81_0_95) &  ~ setIn(all_81_0_95, all_0_4_4)) | ( ~ (all_81_2_97 = nbr_proc) & host(all_0_7_7) = all_81_2_97) | (queue(all_0_13_13) = all_81_2_97 &  ~ elem(all_0_0_0, all_81_2_97))
% 254.62/183.03  |
% 254.62/183.03  +-Applying beta-rule and splitting (167), into two cases.
% 254.62/183.03  |-Branch one:
% 254.62/183.03  | (170)  ~ (all_59_0_63 = nbr_proc) & host(all_0_7_7) = all_59_0_63
% 254.62/183.03  |
% 254.62/183.03  	| Applying alpha-rule on (170) yields:
% 254.62/183.03  	| (171)  ~ (all_59_0_63 = nbr_proc)
% 254.62/183.03  	| (172) host(all_0_7_7) = all_59_0_63
% 254.62/183.03  	|
% 254.62/183.03  	+-Applying beta-rule and splitting (165), into two cases.
% 254.62/183.03  	|-Branch one:
% 254.62/183.04  	| (173) elem(all_0_0_0, all_0_16_16)
% 254.62/183.04  	|
% 254.62/183.04  		+-Applying beta-rule and splitting (164), into two cases.
% 254.62/183.04  		|-Branch one:
% 254.62/183.04  		| (174)  ~ elem(all_0_0_0, all_0_16_16)
% 254.62/183.04  		|
% 254.62/183.04  			| Using (173) and (174) yields:
% 254.62/183.04  			| (175) $false
% 254.62/183.04  			|
% 254.62/183.04  			|-The branch is then unsatisfiable
% 254.62/183.04  		|-Branch two:
% 254.62/183.04  		| (173) elem(all_0_0_0, all_0_16_16)
% 254.62/183.04  		| (177) elem(all_0_0_0, all_0_12_12)
% 254.62/183.04  		|
% 254.62/183.04  			+-Applying beta-rule and splitting (166), into two cases.
% 254.62/183.04  			|-Branch one:
% 254.62/183.04  			| (178)  ~ (all_57_0_61 = all_0_13_13) & host(all_0_7_7) = all_57_0_61
% 254.62/183.04  			|
% 254.62/183.04  				| Applying alpha-rule on (178) yields:
% 254.62/183.04  				| (179)  ~ (all_57_0_61 = all_0_13_13)
% 254.62/183.04  				| (180) host(all_0_7_7) = all_57_0_61
% 254.62/183.04  				|
% 254.62/183.04  				| Instantiating formula (38) with all_59_0_63, nbr_proc, all_0_7_7 and discharging atoms host(all_0_7_7) = all_59_0_63, host(all_0_7_7) = nbr_proc, yields:
% 254.62/183.04  				| (181) all_59_0_63 = nbr_proc
% 254.62/183.04  				|
% 254.62/183.04  				| Instantiating formula (38) with all_57_0_61, all_59_0_63, all_0_7_7 and discharging atoms host(all_0_7_7) = all_59_0_63, host(all_0_7_7) = all_57_0_61, yields:
% 254.62/183.04  				| (182) all_59_0_63 = all_57_0_61
% 254.62/183.04  				|
% 254.62/183.04  				| Combining equations (181,182) yields a new equation:
% 254.62/183.04  				| (183) all_57_0_61 = nbr_proc
% 254.62/183.04  				|
% 254.62/183.04  				| Combining equations (183,182) yields a new equation:
% 254.62/183.04  				| (181) all_59_0_63 = nbr_proc
% 254.62/183.04  				|
% 254.62/183.04  				| Equations (181) can reduce 171 to:
% 254.62/183.04  				| (185) $false
% 254.62/183.04  				|
% 254.62/183.04  				|-The branch is then unsatisfiable
% 254.62/183.04  			|-Branch two:
% 254.62/183.04  			| (186) queue(all_0_13_13) = all_57_0_61 &  ~ elem(all_0_0_0, all_57_0_61)
% 254.62/183.04  			|
% 254.62/183.04  				| Applying alpha-rule on (186) yields:
% 254.62/183.04  				| (187) queue(all_0_13_13) = all_57_0_61
% 254.62/183.04  				| (188)  ~ elem(all_0_0_0, all_57_0_61)
% 254.62/183.04  				|
% 254.62/183.04  				| Instantiating formula (148) with all_0_13_13, all_57_0_61, all_0_12_12 and discharging atoms queue(all_0_13_13) = all_57_0_61, queue(all_0_13_13) = all_0_12_12, yields:
% 254.62/183.04  				| (189) all_57_0_61 = all_0_12_12
% 254.62/183.04  				|
% 254.62/183.04  				| Using (177) and (188) yields:
% 254.62/183.04  				| (190)  ~ (all_57_0_61 = all_0_12_12)
% 254.62/183.04  				|
% 254.62/183.04  				| Equations (189) can reduce 190 to:
% 254.62/183.04  				| (185) $false
% 254.62/183.04  				|
% 254.62/183.04  				|-The branch is then unsatisfiable
% 254.62/183.04  	|-Branch two:
% 254.62/183.04  	| (174)  ~ elem(all_0_0_0, all_0_16_16)
% 254.62/183.04  	| (193) all_0_0_0 = all_0_10_10
% 254.62/183.04  	|
% 254.62/183.04  		| Equations (193) can reduce 159 to:
% 254.62/183.04  		| (185) $false
% 254.62/183.04  		|
% 254.62/183.04  		|-The branch is then unsatisfiable
% 254.62/183.04  |-Branch two:
% 254.62/183.04  | (195) queue(nbr_proc) = all_59_0_63 &  ~ elem(all_0_0_0, all_59_0_63)
% 254.62/183.04  |
% 254.62/183.04  	| Applying alpha-rule on (195) yields:
% 254.62/183.04  	| (196) queue(nbr_proc) = all_59_0_63
% 254.62/183.04  	| (197)  ~ elem(all_0_0_0, all_59_0_63)
% 254.62/183.04  	|
% 254.62/183.04  	+-Applying beta-rule and splitting (165), into two cases.
% 254.62/183.04  	|-Branch one:
% 254.62/183.04  	| (173) elem(all_0_0_0, all_0_16_16)
% 254.62/183.04  	|
% 254.62/183.04  		+-Applying beta-rule and splitting (164), into two cases.
% 254.62/183.04  		|-Branch one:
% 254.62/183.04  		| (174)  ~ elem(all_0_0_0, all_0_16_16)
% 254.62/183.04  		|
% 254.62/183.04  			| Using (173) and (174) yields:
% 254.62/183.04  			| (175) $false
% 254.62/183.04  			|
% 254.62/183.04  			|-The branch is then unsatisfiable
% 254.62/183.04  		|-Branch two:
% 254.62/183.04  		| (173) elem(all_0_0_0, all_0_16_16)
% 254.62/183.04  		| (177) elem(all_0_0_0, all_0_12_12)
% 254.62/183.04  		|
% 254.62/183.04  			+-Applying beta-rule and splitting (166), into two cases.
% 254.62/183.04  			|-Branch one:
% 254.62/183.04  			| (178)  ~ (all_57_0_61 = all_0_13_13) & host(all_0_7_7) = all_57_0_61
% 254.62/183.04  			|
% 254.62/183.04  				| Applying alpha-rule on (178) yields:
% 254.62/183.04  				| (179)  ~ (all_57_0_61 = all_0_13_13)
% 254.62/183.04  				| (180) host(all_0_7_7) = all_57_0_61
% 254.62/183.04  				|
% 254.62/183.04  				| Instantiating formula (38) with all_57_0_61, nbr_proc, all_0_7_7 and discharging atoms host(all_0_7_7) = all_57_0_61, host(all_0_7_7) = nbr_proc, yields:
% 254.62/183.04  				| (183) all_57_0_61 = nbr_proc
% 254.62/183.04  				|
% 254.62/183.04  				| Instantiating formula (148) with nbr_proc, all_59_0_63, all_0_1_1 and discharging atoms queue(nbr_proc) = all_59_0_63, queue(nbr_proc) = all_0_1_1, yields:
% 254.62/183.04  				| (207) all_59_0_63 = all_0_1_1
% 254.62/183.04  				|
% 254.62/183.04  				| From (183) and (180) follows:
% 254.62/183.04  				| (83) host(all_0_7_7) = nbr_proc
% 254.62/183.04  				|
% 254.62/183.04  				| From (207) and (196) follows:
% 254.62/183.04  				| (151) queue(nbr_proc) = all_0_1_1
% 254.62/183.04  				|
% 254.62/183.04  				+-Applying beta-rule and splitting (169), into two cases.
% 254.62/183.04  				|-Branch one:
% 254.62/183.04  				| (210) (all_81_2_97 = all_0_1_1 &  ~ elem(all_0_2_2, all_0_1_1)) | (all_81_2_97 = all_0_4_4 &  ~ (all_81_0_95 = all_81_1_96) & host(all_0_6_6) = all_81_1_96 & leq(all_0_17_17, all_81_0_95) &  ~ leq(nbr_proc, all_81_0_95) &  ~ setIn(all_81_0_95, all_0_4_4)) | ( ~ (all_81_2_97 = nbr_proc) & host(all_0_7_7) = all_81_2_97)
% 254.62/183.04  				|
% 254.62/183.04  					+-Applying beta-rule and splitting (210), into two cases.
% 254.62/183.04  					|-Branch one:
% 254.62/183.04  					| (211) (all_81_2_97 = all_0_1_1 &  ~ elem(all_0_2_2, all_0_1_1)) | (all_81_2_97 = all_0_4_4 &  ~ (all_81_0_95 = all_81_1_96) & host(all_0_6_6) = all_81_1_96 & leq(all_0_17_17, all_81_0_95) &  ~ leq(nbr_proc, all_81_0_95) &  ~ setIn(all_81_0_95, all_0_4_4))
% 254.62/183.04  					|
% 254.62/183.04  						+-Applying beta-rule and splitting (211), into two cases.
% 254.62/183.04  						|-Branch one:
% 254.62/183.04  						| (212) all_81_2_97 = all_0_1_1 &  ~ elem(all_0_2_2, all_0_1_1)
% 254.62/183.04  						|
% 254.62/183.04  							| Applying alpha-rule on (212) yields:
% 254.62/183.04  							| (213) all_81_2_97 = all_0_1_1
% 254.62/183.04  							| (214)  ~ elem(all_0_2_2, all_0_1_1)
% 254.62/183.04  							|
% 254.62/183.04  							| Using (17) and (214) yields:
% 254.62/183.04  							| (175) $false
% 254.62/183.04  							|
% 254.62/183.04  							|-The branch is then unsatisfiable
% 254.62/183.04  						|-Branch two:
% 254.62/183.04  						| (216) all_81_2_97 = all_0_4_4 &  ~ (all_81_0_95 = all_81_1_96) & host(all_0_6_6) = all_81_1_96 & leq(all_0_17_17, all_81_0_95) &  ~ leq(nbr_proc, all_81_0_95) &  ~ setIn(all_81_0_95, all_0_4_4)
% 254.62/183.04  						|
% 254.62/183.04  							| Applying alpha-rule on (216) yields:
% 254.62/183.04  							| (217) host(all_0_6_6) = all_81_1_96
% 254.62/183.04  							| (218) all_81_2_97 = all_0_4_4
% 254.62/183.05  							| (219)  ~ (all_81_0_95 = all_81_1_96)
% 254.62/183.05  							| (220)  ~ leq(nbr_proc, all_81_0_95)
% 254.62/183.05  							| (221)  ~ setIn(all_81_0_95, all_0_4_4)
% 254.62/183.05  							| (222) leq(all_0_17_17, all_81_0_95)
% 254.62/183.05  							|
% 254.62/183.05  							+-Applying beta-rule and splitting (168), into two cases.
% 254.62/183.05  							|-Branch one:
% 254.62/183.05  							| (223)  ~ (all_62_0_66 = nbr_proc) & host(all_0_6_6) = all_62_0_66
% 254.62/183.05  							|
% 254.62/183.05  								| Applying alpha-rule on (223) yields:
% 254.62/183.05  								| (224)  ~ (all_62_0_66 = nbr_proc)
% 254.62/183.05  								| (225) host(all_0_6_6) = all_62_0_66
% 254.62/183.05  								|
% 254.62/183.05  								| Instantiating formula (38) with all_81_1_96, all_0_3_3, all_0_6_6 and discharging atoms host(all_0_6_6) = all_81_1_96, host(all_0_6_6) = all_0_3_3, yields:
% 254.62/183.05  								| (226) all_81_1_96 = all_0_3_3
% 254.62/183.05  								|
% 254.62/183.05  								| Instantiating formula (38) with all_62_0_66, all_81_1_96, all_0_6_6 and discharging atoms host(all_0_6_6) = all_81_1_96, host(all_0_6_6) = all_62_0_66, yields:
% 254.62/183.05  								| (227) all_81_1_96 = all_62_0_66
% 254.62/183.05  								|
% 254.62/183.05  								| Combining equations (226,227) yields a new equation:
% 254.62/183.05  								| (228) all_62_0_66 = all_0_3_3
% 254.62/183.05  								|
% 254.62/183.05  								| Combining equations (228,227) yields a new equation:
% 254.62/183.05  								| (226) all_81_1_96 = all_0_3_3
% 254.62/183.05  								|
% 254.62/183.05  								| Equations (226) can reduce 219 to:
% 254.62/183.05  								| (230)  ~ (all_81_0_95 = all_0_3_3)
% 254.62/183.05  								|
% 254.62/183.05  								| Instantiating formula (89) with all_81_0_95 and discharging atoms leq(all_0_17_17, all_81_0_95),  ~ leq(nbr_proc, all_81_0_95),  ~ setIn(all_81_0_95, all_0_4_4), yields:
% 254.62/183.05  								| (231) all_81_0_95 = all_0_3_3
% 254.62/183.05  								|
% 254.62/183.05  								| Equations (231) can reduce 230 to:
% 254.62/183.05  								| (185) $false
% 254.62/183.05  								|
% 254.62/183.05  								|-The branch is then unsatisfiable
% 254.62/183.05  							|-Branch two:
% 254.62/183.05  							| (233) queue(nbr_proc) = all_62_0_66 &  ~ elem(all_0_2_2, all_62_0_66)
% 254.62/183.05  							|
% 254.62/183.05  								| Applying alpha-rule on (233) yields:
% 254.62/183.05  								| (234) queue(nbr_proc) = all_62_0_66
% 254.62/183.05  								| (235)  ~ elem(all_0_2_2, all_62_0_66)
% 254.62/183.05  								|
% 254.62/183.05  								| Instantiating formula (148) with nbr_proc, all_62_0_66, all_0_1_1 and discharging atoms queue(nbr_proc) = all_62_0_66, queue(nbr_proc) = all_0_1_1, yields:
% 254.62/183.05  								| (236) all_62_0_66 = all_0_1_1
% 254.62/183.05  								|
% 254.62/183.05  								| Using (17) and (235) yields:
% 254.62/183.05  								| (237)  ~ (all_62_0_66 = all_0_1_1)
% 254.62/183.05  								|
% 254.62/183.05  								| Equations (236) can reduce 237 to:
% 254.62/183.05  								| (185) $false
% 254.62/183.05  								|
% 254.62/183.05  								|-The branch is then unsatisfiable
% 254.62/183.05  					|-Branch two:
% 254.62/183.05  					| (239)  ~ (all_81_2_97 = nbr_proc) & host(all_0_7_7) = all_81_2_97
% 254.62/183.05  					|
% 254.62/183.05  						| Applying alpha-rule on (239) yields:
% 254.62/183.05  						| (240)  ~ (all_81_2_97 = nbr_proc)
% 254.62/183.05  						| (241) host(all_0_7_7) = all_81_2_97
% 254.62/183.05  						|
% 254.62/183.05  						| Instantiating formula (38) with all_81_2_97, nbr_proc, all_0_7_7 and discharging atoms host(all_0_7_7) = all_81_2_97, host(all_0_7_7) = nbr_proc, yields:
% 254.62/183.05  						| (242) all_81_2_97 = nbr_proc
% 254.62/183.05  						|
% 254.62/183.05  						| Equations (242) can reduce 240 to:
% 254.62/183.05  						| (185) $false
% 254.62/183.05  						|
% 254.62/183.05  						|-The branch is then unsatisfiable
% 254.62/183.05  				|-Branch two:
% 254.62/183.05  				| (244) queue(all_0_13_13) = all_81_2_97 &  ~ elem(all_0_0_0, all_81_2_97)
% 254.62/183.05  				|
% 254.62/183.05  					| Applying alpha-rule on (244) yields:
% 254.62/183.05  					| (245) queue(all_0_13_13) = all_81_2_97
% 254.62/183.05  					| (246)  ~ elem(all_0_0_0, all_81_2_97)
% 254.62/183.05  					|
% 254.62/183.05  					| Instantiating formula (148) with all_0_13_13, all_81_2_97, all_0_12_12 and discharging atoms queue(all_0_13_13) = all_81_2_97, queue(all_0_13_13) = all_0_12_12, yields:
% 254.62/183.05  					| (247) all_81_2_97 = all_0_12_12
% 254.62/183.05  					|
% 254.62/183.05  					| Using (177) and (246) yields:
% 254.62/183.05  					| (248)  ~ (all_81_2_97 = all_0_12_12)
% 254.62/183.05  					|
% 254.62/183.05  					| Equations (247) can reduce 248 to:
% 254.62/183.05  					| (185) $false
% 254.62/183.05  					|
% 254.62/183.05  					|-The branch is then unsatisfiable
% 254.62/183.05  			|-Branch two:
% 254.62/183.05  			| (186) queue(all_0_13_13) = all_57_0_61 &  ~ elem(all_0_0_0, all_57_0_61)
% 254.62/183.05  			|
% 254.62/183.05  				| Applying alpha-rule on (186) yields:
% 254.62/183.05  				| (187) queue(all_0_13_13) = all_57_0_61
% 254.62/183.05  				| (188)  ~ elem(all_0_0_0, all_57_0_61)
% 254.62/183.05  				|
% 254.62/183.05  				| Instantiating formula (148) with all_0_13_13, all_57_0_61, all_0_12_12 and discharging atoms queue(all_0_13_13) = all_57_0_61, queue(all_0_13_13) = all_0_12_12, yields:
% 254.62/183.05  				| (189) all_57_0_61 = all_0_12_12
% 254.62/183.05  				|
% 254.62/183.05  				| Using (177) and (188) yields:
% 254.62/183.05  				| (190)  ~ (all_57_0_61 = all_0_12_12)
% 254.62/183.05  				|
% 254.62/183.05  				| Equations (189) can reduce 190 to:
% 254.62/183.06  				| (185) $false
% 254.62/183.06  				|
% 254.62/183.06  				|-The branch is then unsatisfiable
% 254.62/183.06  	|-Branch two:
% 254.62/183.06  	| (174)  ~ elem(all_0_0_0, all_0_16_16)
% 254.62/183.06  	| (193) all_0_0_0 = all_0_10_10
% 254.62/183.06  	|
% 254.62/183.06  		| Equations (193) can reduce 159 to:
% 254.62/183.06  		| (185) $false
% 254.62/183.06  		|
% 254.62/183.06  		|-The branch is then unsatisfiable
% 254.62/183.06  % SZS output end Proof for theBenchmark
% 254.62/183.06  
% 254.62/183.06  182459ms
%------------------------------------------------------------------------------