TSTP Solution File: SWV461+1 by ePrincess---1.0
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- Process Solution
%------------------------------------------------------------------------------
% File : ePrincess---1.0
% Problem : SWV461+1 : TPTP v8.1.0. Released v4.0.0.
% Transfm : none
% Format : tptp:raw
% Command : ePrincess-casc -timeout=%d %s
% Computer : n004.cluster.edu
% Model : x86_64 x86_64
% CPU : Intel(R) Xeon(R) CPU E5-2620 v4 2.10GHz
% Memory : 8042.1875MB
% OS : Linux 3.10.0-693.el7.x86_64
% CPULimit : 300s
% WCLimit : 600s
% DateTime : Wed Jul 20 17:51:39 EDT 2022
% Result : Theorem 23.11s 6.41s
% Output : Proof 31.29s
% Verified :
% SZS Type : -
% Comments :
%------------------------------------------------------------------------------
%----WARNING: Could not form TPTP format derivation
%------------------------------------------------------------------------------
%----ORIGINAL SYSTEM OUTPUT
% 0.10/0.12 % Problem : SWV461+1 : TPTP v8.1.0. Released v4.0.0.
% 0.10/0.12 % Command : ePrincess-casc -timeout=%d %s
% 0.12/0.33 % Computer : n004.cluster.edu
% 0.12/0.33 % Model : x86_64 x86_64
% 0.12/0.33 % CPU : Intel(R) Xeon(R) CPU E5-2620 v4 @ 2.10GHz
% 0.12/0.33 % Memory : 8042.1875MB
% 0.12/0.33 % OS : Linux 3.10.0-693.el7.x86_64
% 0.12/0.33 % CPULimit : 300
% 0.12/0.33 % WCLimit : 600
% 0.12/0.33 % DateTime : Wed Jun 15 13:34:54 EDT 2022
% 0.12/0.33 % CPUTime :
% 0.19/0.58 ____ _
% 0.19/0.58 ___ / __ \_____(_)___ ________ __________
% 0.19/0.58 / _ \/ /_/ / ___/ / __ \/ ___/ _ \/ ___/ ___/
% 0.19/0.58 / __/ ____/ / / / / / / /__/ __(__ |__ )
% 0.19/0.58 \___/_/ /_/ /_/_/ /_/\___/\___/____/____/
% 0.19/0.58
% 0.19/0.58 A Theorem Prover for First-Order Logic
% 0.19/0.58 (ePrincess v.1.0)
% 0.19/0.58
% 0.19/0.58 (c) Philipp Rümmer, 2009-2015
% 0.19/0.58 (c) Peter Backeman, 2014-2015
% 0.19/0.58 (contributions by Angelo Brillout, Peter Baumgartner)
% 0.19/0.58 Free software under GNU Lesser General Public License (LGPL).
% 0.19/0.58 Bug reports to peter@backeman.se
% 0.19/0.58
% 0.19/0.58 For more information, visit http://user.uu.se/~petba168/breu/
% 0.19/0.58
% 0.19/0.58 Loading /export/starexec/sandbox/benchmark/theBenchmark.p ...
% 0.69/0.66 Prover 0: Options: -triggersInConjecture -genTotalityAxioms -tightFunctionScopes -clausifier=simple -reverseFunctionalityPropagation +boolFunsAsPreds -triggerStrategy=allMaximal -resolutionMethod=nonUnifying +ignoreQuantifiers -generateTriggers=all
% 1.98/1.07 Prover 0: Preprocessing ...
% 4.01/1.54 Prover 0: Warning: ignoring some quantifiers
% 4.01/1.57 Prover 0: Constructing countermodel ...
% 21.03/5.95 Prover 1: Options: +triggersInConjecture -genTotalityAxioms -tightFunctionScopes -clausifier=simple +reverseFunctionalityPropagation -boolFunsAsPreds -triggerStrategy=maximal -resolutionMethod=normal +ignoreQuantifiers -generateTriggers=all
% 21.29/6.05 Prover 1: Preprocessing ...
% 22.28/6.24 Prover 1: Constructing countermodel ...
% 23.11/6.40 Prover 1: proved (453ms)
% 23.11/6.41 Prover 0: stopped
% 23.11/6.41
% 23.11/6.41 No countermodel exists, formula is valid
% 23.11/6.41 % SZS status Theorem for theBenchmark
% 23.11/6.41
% 23.11/6.41 Generating proof ... found it (size 277)
% 30.29/8.18
% 30.29/8.18 % SZS output start Proof for theBenchmark
% 30.29/8.18 Assumed formulas after preprocessing and simplification:
% 30.29/8.18 | (0) ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ? [v8] : ? [v9] : ? [v10] : ? [v11] : ? [v12] : ? [v13] : ? [v14] : ? [v15] : ? [v16] : ? [v17] : ? [v18] : ? [v19] : ? [v20] : ( ~ (v9 = v0) & ~ (v6 = v0) & ~ (v5 = 0) & ~ (v4 = 0) & ~ (v1 = 0) & ~ (norm = wait) & ~ (norm = elec_1) & ~ (norm = elec_2) & ~ (wait = elec_1) & ~ (wait = elec_2) & ~ (elec_1 = elec_2) & index(ldr, v9) = v9 & index(status, v9) = norm & index(status, v6) = elec_2 & index(pendack, v6) = v15 & ordered(q_nil) = 0 & snoc(v18, v7) = v19 & m_Down(v12) = v17 & m_Halt(v2) = v7 & leq(v0, nbr_proc) = 0 & leq(nbr_proc, v16) = 0 & leq(nbr_proc, v0) = v5 & s(v15) = v16 & s(v0) = v6 & s(zero) = v0 & m_Ack(v13, v11) = v20 & host(v13) = v6 & host(v12) = v16 & host(v11) = v15 & host(v8) = v9 & host(v3) = v0 & host(v2) = v0 & queue(v6) = v18 & queue(v0) = q_nil & elem(v20, v19) = 0 & elem(v17, v19) = 0 & setIn(v13, alive) = v14 & setIn(v8, alive) = v10 & setIn(v2, pids) = v4 & setIn(nil, alive) = v1 & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ! [v25] : ! [v26] : ! [v27] : ! [v28] : ! [v29] : ! [v30] : (v27 = 0 | ~ (index(pendack, v24) = v25) | ~ (m_Halt(v23) = v28) | ~ (leq(v25, v26) = v27) | ~ (host(v23) = v24) | ~ (host(v22) = v29) | ~ (host(v21) = v26) | ~ (queue(v29) = v30) | ~ (elem(v28, v30) = 0) | ? [v31] : ? [v32] : ? [v33] : ? [v34] : ? [v35] : (index(ldr, v26) = v34 & index(status, v26) = v35 & index(status, v24) = v32 & setIn(v23, alive) = v31 & setIn(v21, alive) = v33 & ( ~ (v35 = norm) | ~ (v34 = v26) | ~ (v33 = 0) | ~ (v32 = elec_2) | ~ (v31 = 0)))) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ! [v25] : ! [v26] : ! [v27] : ! [v28] : ! [v29] : ( ~ (m_Down(v23) = v25) | ~ (m_Down(v22) = v27) | ~ (host(v24) = nbr_proc) | ~ (host(v21) = v28) | ~ (queue(v28) = v29) | ~ (queue(nbr_proc) = v26) | ~ (elem(v27, v29) = 0) | ~ (elem(v25, v26) = 0) | ? [v30] : ? [v31] : ? [v32] : ? [v33] : ? [v34] : ? [v35] : ? [v36] : ? [v37] : ? [v38] : (index(down, nbr_proc) = v30 & index(status, nbr_proc) = v33 & host(v23) = v31 & host(v22) = v32 & setIn(v21, alive) = v34 & ( ~ (v34 = 0) | ~ (v33 = elec_1) | ~ (v32 = nbr_proc) | (v37 = 0 & ~ (v38 = 0) & ~ (v36 = 0) & ~ (v35 = v31) & leq(v0, v35) = 0 & leq(nbr_proc, v35) = v36 & setIn(v35, v30) = v38)))) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ! [v25] : ! [v26] : ! [v27] : ! [v28] : ( ~ (m_Down(v23) = v25) | ~ (m_Ack(v24, v22) = v28) | ~ (host(v24) = v26) | ~ (queue(v26) = v27) | ~ (elem(v28, v27) = 0) | ~ (elem(v25, v27) = 0) | ~ (setIn(v21, alive) = 0) | ? [v29] : ? [v30] : ? [v31] : ? [v32] : ? [v33] : ? [v34] : ? [v35] : ? [v36] : ? [v37] : ? [v38] : (index(ldr, v36) = v37 & index(status, v36) = v38 & index(status, v26) = v33 & index(pendack, v26) = v30 & leq(nbr_proc, v31) = v32 & s(v30) = v31 & host(v23) = v35 & host(v22) = v34 & host(v21) = v36 & setIn(v24, alive) = v29 & ( ~ (v38 = norm) | ~ (v37 = v36) | ~ (v35 = v31) | ~ (v34 = v30) | ~ (v33 = elec_2) | ~ (v32 = 0) | ~ (v29 = 0)))) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ! [v25] : ! [v26] : (v26 = 0 | ~ (index(pendack, v24) = v25) | ~ (leq(v25, v23) = v26) | ~ (host(v22) = v24) | ~ (host(v21) = v23) | ? [v27] : ? [v28] : ? [v29] : ? [v30] : ? [v31] : (index(status, v24) = v31 & index(status, v23) = v30 & leq(v23, v24) = v27 & setIn(v22, alive) = v29 & setIn(v21, alive) = v28 & ( ~ (v31 = elec_2) | ~ (v30 = elec_2) | ~ (v29 = 0) | ~ (v28 = 0) | v27 = 0))) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ! [v25] : ! [v26] : (v26 = 0 | ~ (index(pendack, v23) = v25) | ~ (leq(v24, v25) = v26) | ~ (host(v22) = v23) | ~ (host(v21) = v24) | ? [v27] : ? [v28] : ? [v29] : ? [v30] : (m_Ack(v22, v21) = v28 & queue(v23) = v29 & elem(v28, v29) = v30 & setIn(v22, alive) = v27 & ( ~ (v30 = 0) | ~ (v27 = 0)))) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ! [v25] : ! [v26] : ( ~ (index(pendack, v24) = v26) | ~ (index(pendack, v23) = v25) | ~ (leq(v25, v26) = 0) | ~ (host(v22) = v24) | ~ (host(v21) = v23) | ? [v27] : ? [v28] : ? [v29] : ? [v30] : ? [v31] : (index(status, v24) = v31 & index(status, v23) = v30 & leq(v23, v24) = v27 & setIn(v22, alive) = v29 & setIn(v21, alive) = v28 & ( ~ (v31 = elec_2) | ~ (v30 = elec_2) | ~ (v29 = 0) | ~ (v28 = 0) | v27 = 0))) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ! [v25] : ! [v26] : ( ~ (cons(v24, v21) = v25) | ~ (m_Down(v23) = v26) | ~ (m_Halt(v22) = v24) | ~ (elem(v26, v21) = 0) | ? [v27] : ? [v28] : ? [v29] : ? [v30] : (ordered(v25) = v27 & leq(v22, v23) = v30 & host(v23) = v29 & host(v22) = v28 & ( ~ (v29 = v28) | ~ (v27 = 0) | v30 = 0))) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ! [v25] : ! [v26] : ( ~ (m_Down(v22) = v24) | ~ (host(v23) = v25) | ~ (queue(v25) = v26) | ~ (elem(v24, v26) = 0) | ~ (setIn(v21, alive) = 0) | ? [v27] : ? [v28] : ? [v29] : ? [v30] : ? [v31] : (index(ldr, v29) = v30 & index(status, v29) = v31 & host(v22) = v28 & host(v21) = v29 & setIn(v23, alive) = v27 & ( ~ (v31 = norm) | ~ (v30 = v28) | ~ (v29 = v28) | ~ (v27 = 0)))) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ! [v25] : ! [v26] : ( ~ (m_Ack(v23, v21) = v24) | ~ (host(v22) = v25) | ~ (queue(v25) = v26) | ~ (elem(v24, v26) = 0) | ? [v27] : ? [v28] : ? [v29] : ( ~ (v29 = 0) & leq(v27, v28) = v29 & host(v23) = v28 & host(v21) = v27)) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ! [v25] : ! [v26] : ( ~ (m_Ack(v21, v22) = v25) | ~ (host(v21) = v24) | ~ (queue(v24) = v26) | ~ (elem(v25, v26) = 0) | ~ (setIn(v23, alive) = 0) | ? [v27] : ? [v28] : ? [v29] : ? [v30] : ? [v31] : (index(status, v28) = v31 & index(status, v24) = v30 & host(v23) = v28 & host(v22) = v29 & setIn(v21, alive) = v27 & ( ~ (v31 = elec_2) | ~ (v30 = elec_2) | ~ (v29 = v28) | ~ (v27 = 0)))) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ! [v25] : (v25 = 0 | ~ (snoc(v23, v22) = v24) | ~ (elem(v21, v24) = v25) | ? [v26] : ( ~ (v26 = 0) & elem(v21, v23) = v26)) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ! [v25] : (v25 = 0 | ~ (cons(v22, v23) = v24) | ~ (elem(v21, v24) = v25) | ? [v26] : ( ~ (v26 = 0) & elem(v21, v23) = v26)) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ! [v25] : (v25 = 0 | ~ (leq(v23, v24) = v25) | ~ (s(v22) = v24) | ~ (s(v21) = v23) | ? [v26] : ( ~ (v26 = 0) & leq(v21, v22) = v26)) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ! [v25] : (v24 = v23 | ~ (m_Ack(v22, v24) = v25) | ~ (m_Ack(v21, v23) = v25)) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ! [v25] : (v22 = v21 | ~ (m_Ack(v22, v24) = v25) | ~ (m_Ack(v21, v23) = v25)) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ! [v25] : ( ~ (snoc(v23, v22) = v24) | ~ (cons(v21, v24) = v25) | ? [v26] : (snoc(v26, v22) = v25 & cons(v21, v23) = v26)) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ! [v25] : ( ~ (snoc(v21, v24) = v25) | ~ (m_Ack(v22, v23) = v24) | ? [v26] : ? [v27] : (ordered(v25) = v27 & ordered(v21) = v26 & ( ~ (v26 = 0) | v27 = 0))) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ! [v25] : ( ~ (m_Ldr(v22) = v23) | ~ (host(v21) = v24) | ~ (queue(v24) = v25) | ~ (elem(v23, v25) = 0) | ? [v26] : ? [v27] : ( ~ (v27 = 0) & leq(v24, v26) = v27 & host(v22) = v26)) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ! [v25] : ( ~ (m_Down(v22) = v23) | ~ (host(v21) = v24) | ~ (queue(v24) = v25) | ~ (elem(v23, v25) = 0) | ? [v26] : ( ~ (v26 = v24) & host(v22) = v26)) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ! [v25] : ( ~ (m_Halt(v22) = v23) | ~ (host(v21) = v24) | ~ (queue(v24) = v25) | ~ (elem(v23, v25) = 0) | ? [v26] : ? [v27] : ( ~ (v27 = 0) & leq(v24, v26) = v27 & host(v22) = v26)) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ! [v25] : ( ~ (m_Ack(v22, v21) = v24) | ~ (host(v22) = v23) | ~ (queue(v23) = v25) | ~ (elem(v24, v25) = 0) | ? [v26] : ? [v27] : (index(status, v23) = v27 & setIn(v22, alive) = v26 & ( ~ (v27 = elec_1) | ~ (v26 = 0)))) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ! [v25] : ( ~ (m_Ack(v21, v22) = v23) | ~ (host(v21) = v24) | ~ (queue(v24) = v25) | ~ (elem(v23, v25) = 0) | (setIn(v22, pids) = 0 & setIn(v21, pids) = 0)) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : (v24 = v21 | v21 = q_nil | ~ (init(v21) = v22) | ~ (snoc(v22, v23) = v24) | ~ (last(v21) = v23)) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : (v24 = v21 | v21 = q_nil | ~ (tail(v21) = v23) | ~ (cons(v22, v23) = v24) | ~ (head(v21) = v22)) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : (v24 = 0 | ~ (snoc(v22, v21) = v23) | ~ (elem(v21, v23) = v24)) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : (v24 = 0 | ~ (cons(v21, v22) = v23) | ~ (elem(v21, v23) = v24)) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : (v24 = 0 | ~ (leq(v21, v23) = v24) | ~ (leq(v21, v22) = 0) | ? [v25] : ( ~ (v25 = 0) & leq(v22, v23) = v25)) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : (v24 = 0 | ~ (leq(v21, v23) = v24) | ~ (s(v22) = v23) | ? [v25] : ( ~ (v25 = 0) & leq(v21, v22) = v25)) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : (v22 = v21 | ~ (index(v24, v23) = v22) | ~ (index(v24, v23) = v21)) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : (v22 = v21 | ~ (snoc(v24, v23) = v22) | ~ (snoc(v24, v23) = v21)) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : (v22 = v21 | ~ (snoc(v23, v22) = v24) | ~ (elem(v21, v24) = 0) | elem(v21, v23) = 0) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : (v22 = v21 | ~ (cons(v24, v23) = v22) | ~ (cons(v24, v23) = v21)) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : (v22 = v21 | ~ (cons(v22, v23) = v24) | ~ (elem(v21, v24) = 0) | elem(v21, v23) = 0) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : (v22 = v21 | ~ (leq(v24, v23) = v22) | ~ (leq(v24, v23) = v21)) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : (v22 = v21 | ~ (m_Ack(v24, v23) = v22) | ~ (m_Ack(v24, v23) = v21)) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : (v22 = v21 | ~ (elem(v24, v23) = v22) | ~ (elem(v24, v23) = v21)) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : (v22 = v21 | ~ (setIn(v24, v23) = v22) | ~ (setIn(v24, v23) = v21)) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ( ~ (ordered(v22) = v23) | ~ (pidElem(v21) = v24) | ? [v25] : ? [v26] : ? [v27] : ? [v28] : (ordered(v25) = v26 & pidMsg(v21) = v27 & snoc(v22, v21) = v25 & host(v27) = v28 & ( ~ (v26 = 0) | (v23 = 0 & ! [v29] : ! [v30] : ! [v31] : ( ~ (v24 = 0) | v31 = 0 | ~ (pidMsg(v29) = v30) | ~ (leq(v30, v27) = v31) | ? [v32] : ? [v33] : ? [v34] : (pidElem(v29) = v33 & host(v30) = v34 & elem(v29, v22) = v32 & ( ~ (v34 = v28) | ~ (v33 = 0) | ~ (v32 = 0)))))))) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ( ~ (ordered(v22) = v23) | ~ (pidElem(v21) = v24) | ? [v25] : ? [v26] : ? [v27] : ? [v28] : (ordered(v25) = v26 & pidMsg(v21) = v27 & cons(v21, v22) = v25 & host(v27) = v28 & ( ~ (v26 = 0) | (v23 = 0 & ! [v29] : ! [v30] : ! [v31] : ( ~ (v24 = 0) | v31 = 0 | ~ (pidMsg(v29) = v30) | ~ (leq(v27, v30) = v31) | ? [v32] : ? [v33] : ? [v34] : (pidElem(v29) = v33 & host(v30) = v34 & elem(v29, v22) = v32 & ( ~ (v34 = v28) | ~ (v33 = 0) | ~ (v32 = 0)))))))) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ( ~ (snoc(v21, v23) = v24) | ~ (m_Ldr(v22) = v23) | ? [v25] : ? [v26] : (ordered(v24) = v26 & ordered(v21) = v25 & ( ~ (v25 = 0) | v26 = 0))) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ( ~ (m_NormQ(v23) = v24) | ~ (m_Ack(v21, v22) = v24)) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ( ~ (m_Ldr(v23) = v24) | ~ (m_Ack(v21, v22) = v24)) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ( ~ (m_NotNorm(v23) = v24) | ~ (m_Ack(v21, v22) = v24)) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ( ~ (m_Down(v23) = v24) | ~ (m_Ack(v21, v22) = v24)) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ( ~ (m_Halt(v23) = v24) | ~ (m_Ack(v21, v22) = v24)) & ! [v21] : ! [v22] : ! [v23] : ! [v24] : ( ~ (leq(v23, v24) = 0) | ~ (s(v22) = v24) | ~ (s(v21) = v23) | leq(v21, v22) = 0) & ! [v21] : ! [v22] : ! [v23] : (v23 = v22 | ~ (m_NormQ(v21) = v23) | ~ (m_NormQ(v21) = v22)) & ! [v21] : ! [v22] : ! [v23] : (v23 = v22 | ~ (m_Ldr(v21) = v23) | ~ (m_Ldr(v21) = v22)) & ! [v21] : ! [v22] : ! [v23] : (v23 = v22 | ~ (m_NotNorm(v21) = v23) | ~ (m_NotNorm(v21) = v22)) & ! [v21] : ! [v22] : ! [v23] : (v23 = v22 | ~ (m_Down(v21) = v23) | ~ (m_Down(v21) = v22)) & ! [v21] : ! [v22] : ! [v23] : (v23 = v22 | ~ (m_Halt(v21) = v23) | ~ (m_Halt(v21) = v22)) & ! [v21] : ! [v22] : ! [v23] : (v23 = v22 | ~ (host(v21) = v23) | ~ (host(v21) = v22)) & ! [v21] : ! [v22] : ! [v23] : (v23 = v21 | ~ (leq(v21, v23) = 0) | ~ (s(v22) = v23) | leq(v21, v22) = 0) & ! [v21] : ! [v22] : ! [v23] : (v23 = 0 | ~ (leq(v21, v22) = v23) | leq(v22, v21) = 0) & ! [v21] : ! [v22] : ! [v23] : (v23 = 0 | ~ (leq(v21, v21) = v23) | ~ (s(v22) = v21)) & ! [v21] : ! [v22] : ! [v23] : (v22 = v21 | ~ (ordered(v23) = v22) | ~ (ordered(v23) = v21)) & ! [v21] : ! [v22] : ! [v23] : (v22 = v21 | ~ (pidMsg(v23) = v22) | ~ (pidMsg(v23) = v21)) & ! [v21] : ! [v22] : ! [v23] : (v22 = v21 | ~ (pidElem(v23) = v22) | ~ (pidElem(v23) = v21)) & ! [v21] : ! [v22] : ! [v23] : (v22 = v21 | ~ (init(v23) = v22) | ~ (init(v23) = v21)) & ! [v21] : ! [v22] : ! [v23] : (v22 = v21 | ~ (last(v23) = v22) | ~ (last(v23) = v21)) & ! [v21] : ! [v22] : ! [v23] : (v22 = v21 | ~ (tail(v23) = v22) | ~ (tail(v23) = v21)) & ! [v21] : ! [v22] : ! [v23] : (v22 = v21 | ~ (head(v23) = v22) | ~ (head(v23) = v21)) & ! [v21] : ! [v22] : ! [v23] : (v22 = v21 | ~ (m_NormQ(v23) = v22) | ~ (m_NormQ(v23) = v21)) & ! [v21] : ! [v22] : ! [v23] : (v22 = v21 | ~ (m_NormQ(v22) = v23) | ~ (m_NormQ(v21) = v23)) & ! [v21] : ! [v22] : ! [v23] : (v22 = v21 | ~ (m_Ldr(v23) = v22) | ~ (m_Ldr(v23) = v21)) & ! [v21] : ! [v22] : ! [v23] : (v22 = v21 | ~ (m_Ldr(v22) = v23) | ~ (m_Ldr(v21) = v23)) & ! [v21] : ! [v22] : ! [v23] : (v22 = v21 | ~ (m_NotNorm(v23) = v22) | ~ (m_NotNorm(v23) = v21)) & ! [v21] : ! [v22] : ! [v23] : (v22 = v21 | ~ (m_NotNorm(v22) = v23) | ~ (m_NotNorm(v21) = v23)) & ! [v21] : ! [v22] : ! [v23] : (v22 = v21 | ~ (m_Down(v23) = v22) | ~ (m_Down(v23) = v21)) & ! [v21] : ! [v22] : ! [v23] : (v22 = v21 | ~ (m_Down(v22) = v23) | ~ (m_Down(v21) = v23)) & ! [v21] : ! [v22] : ! [v23] : (v22 = v21 | ~ (m_Halt(v23) = v22) | ~ (m_Halt(v23) = v21)) & ! [v21] : ! [v22] : ! [v23] : (v22 = v21 | ~ (m_Halt(v22) = v23) | ~ (m_Halt(v21) = v23)) & ! [v21] : ! [v22] : ! [v23] : (v22 = v21 | ~ (s(v23) = v22) | ~ (s(v23) = v21)) & ! [v21] : ! [v22] : ! [v23] : (v22 = v21 | ~ (host(v23) = v22) | ~ (host(v23) = v21)) & ! [v21] : ! [v22] : ! [v23] : (v22 = v21 | ~ (queue(v23) = v22) | ~ (queue(v23) = v21)) & ! [v21] : ! [v22] : ! [v23] : (v22 = 0 | ~ (pidElem(v21) = v22) | ~ (m_Down(v23) = v21)) & ! [v21] : ! [v22] : ! [v23] : (v22 = 0 | ~ (pidElem(v21) = v22) | ~ (m_Halt(v23) = v21)) & ! [v21] : ! [v22] : ! [v23] : ( ~ (ordered(v22) = 0) | ~ (pidElem(v21) = v23) | ? [v24] : ? [v25] : ? [v26] : ? [v27] : ? [v28] : ? [v29] : ? [v30] : ? [v31] : ? [v32] : ? [v33] : (ordered(v26) = v27 & pidMsg(v21) = v24 & snoc(v22, v21) = v26 & host(v24) = v25 & (v27 = 0 | (v32 = v25 & v30 = 0 & v29 = 0 & v23 = 0 & ~ (v33 = 0) & pidMsg(v28) = v31 & pidElem(v28) = 0 & leq(v31, v24) = v33 & host(v31) = v25 & elem(v28, v22) = 0)))) & ! [v21] : ! [v22] : ! [v23] : ( ~ (ordered(v22) = 0) | ~ (pidElem(v21) = v23) | ? [v24] : ? [v25] : ? [v26] : ? [v27] : ? [v28] : ? [v29] : ? [v30] : ? [v31] : ? [v32] : ? [v33] : (ordered(v26) = v27 & pidMsg(v21) = v24 & cons(v21, v22) = v26 & host(v24) = v25 & (v27 = 0 | (v32 = v25 & v30 = 0 & v29 = 0 & v23 = 0 & ~ (v33 = 0) & pidMsg(v28) = v31 & pidElem(v28) = 0 & leq(v24, v31) = v33 & host(v31) = v25 & elem(v28, v22) = 0)))) & ! [v21] : ! [v22] : ! [v23] : ( ~ (snoc(v22, v21) = v23) | init(v23) = v22) & ! [v21] : ! [v22] : ! [v23] : ( ~ (snoc(v22, v21) = v23) | last(v23) = v21) & ! [v21] : ! [v22] : ! [v23] : ( ~ (cons(v21, v22) = v23) | tail(v23) = v22) & ! [v21] : ! [v22] : ! [v23] : ( ~ (cons(v21, v22) = v23) | head(v23) = v21) & ! [v21] : ! [v22] : ! [v23] : ( ~ (m_NormQ(v22) = v23) | ~ (m_Ldr(v21) = v23)) & ! [v21] : ! [v22] : ! [v23] : ( ~ (m_NormQ(v22) = v23) | ~ (m_Down(v21) = v23)) & ! [v21] : ! [v22] : ! [v23] : ( ~ (m_NormQ(v21) = v23) | ~ (m_NotNorm(v22) = v23)) & ! [v21] : ! [v22] : ! [v23] : ( ~ (m_NormQ(v21) = v23) | ~ (m_Halt(v22) = v23)) & ! [v21] : ! [v22] : ! [v23] : ( ~ (m_Ldr(v22) = v23) | ~ (m_Down(v21) = v23)) & ! [v21] : ! [v22] : ! [v23] : ( ~ (m_Ldr(v21) = v23) | ~ (m_NotNorm(v22) = v23)) & ! [v21] : ! [v22] : ! [v23] : ( ~ (m_Ldr(v21) = v23) | ~ (m_Halt(v22) = v23)) & ! [v21] : ! [v22] : ! [v23] : ( ~ (m_NotNorm(v22) = v23) | ~ (m_Down(v21) = v23)) & ! [v21] : ! [v22] : ! [v23] : ( ~ (m_NotNorm(v21) = v23) | ~ (m_Halt(v22) = v23)) & ! [v21] : ! [v22] : ! [v23] : ( ~ (m_Down(v21) = v23) | ~ (m_Halt(v22) = v23)) & ! [v21] : ! [v22] : ! [v23] : ( ~ (host(v22) = v23) | ~ (host(v21) = v23) | ? [v24] : ( ~ (v24 = v23) & s(v23) = v24)) & ! [v21] : ! [v22] : (v22 = v21 | ~ (leq(v21, v22) = 0) | ? [v23] : ( ~ (v23 = 0) & leq(v22, v21) = v23)) & ! [v21] : ! [v22] : (v22 = v21 | ~ (setIn(v22, alive) = 0) | ~ (setIn(v21, alive) = 0) | ? [v23] : ? [v24] : ( ~ (v24 = v23) & host(v22) = v23 & host(v21) = v24)) & ! [v21] : ! [v22] : (v22 = 0 | ~ (leq(v21, v21) = v22)) & ! [v21] : ! [v22] : (v22 = 0 | ~ (leq(v21, v2) = v22) | ? [v23] : ( ~ (v23 = v0) & host(v21) = v23)) & ! [v21] : ! [v22] : ~ (snoc(v22, v21) = q_nil) & ! [v21] : ! [v22] : ( ~ (snoc(q_nil, v21) = v22) | ordered(v22) = 0) & ! [v21] : ! [v22] : ~ (cons(v21, v22) = q_nil) & ! [v21] : ! [v22] : ( ~ (cons(v21, q_nil) = v22) | ordered(v22) = 0) & ! [v21] : ! [v22] : ( ~ (cons(v21, q_nil) = v22) | snoc(q_nil, v21) = v22) & ! [v21] : ! [v22] : ( ~ (m_Down(v21) = v22) | pidMsg(v22) = v21) & ! [v21] : ! [v22] : ( ~ (m_Halt(v21) = v22) | pidMsg(v22) = v21) & ! [v21] : ! [v22] : ( ~ (leq(v22, v21) = 0) | ~ (s(v21) = v22)) & ! [v21] : ! [v22] : ( ~ (host(v21) = v22) | leq(v22, nbr_proc) = 0) & ! [v21] : ! [v22] : ( ~ (host(v21) = v22) | leq(v0, v22) = 0) & ! [v21] : ( ~ (pidElem(v21) = 0) | ? [v22] : ? [v23] : ? [v24] : (m_Down(v22) = v24 & m_Halt(v22) = v23 & (v24 = v21 | v23 = v21))) & ! [v21] : ~ (elem(v21, q_nil) = 0) & ! [v21] : ~ (setIn(v21, setEmpty) = 0) & ! [v21] : ( ~ (setIn(v21, alive) = 0) | ? [v22] : ? [v23] : ? [v24] : (index(elid, v22) = v24 & index(status, v22) = v23 & host(v21) = v22 & (v24 = v21 | ( ~ (v23 = elec_1) & ~ (v23 = elec_2))))) & ! [v21] : ( ~ (setIn(v21, alive) = 0) | ? [v22] : ( ~ (v22 = v0) & host(v21) = v22)) & (v14 = 0 | v13 = v2) & (v10 = 0 | v8 = v2))
% 30.65/8.24 | Instantiating (0) with all_0_0_0, all_0_1_1, all_0_2_2, all_0_3_3, all_0_4_4, all_0_5_5, all_0_6_6, all_0_7_7, all_0_8_8, all_0_9_9, all_0_10_10, all_0_11_11, all_0_12_12, all_0_13_13, all_0_14_14, all_0_15_15, all_0_16_16, all_0_17_17, all_0_18_18, all_0_19_19, all_0_20_20 yields:
% 30.65/8.24 | (1) ~ (all_0_11_11 = all_0_20_20) & ~ (all_0_14_14 = all_0_20_20) & ~ (all_0_15_15 = 0) & ~ (all_0_16_16 = 0) & ~ (all_0_19_19 = 0) & ~ (norm = wait) & ~ (norm = elec_1) & ~ (norm = elec_2) & ~ (wait = elec_1) & ~ (wait = elec_2) & ~ (elec_1 = elec_2) & index(ldr, all_0_11_11) = all_0_11_11 & index(status, all_0_11_11) = norm & index(status, all_0_14_14) = elec_2 & index(pendack, all_0_14_14) = all_0_5_5 & ordered(q_nil) = 0 & snoc(all_0_2_2, all_0_13_13) = all_0_1_1 & m_Down(all_0_8_8) = all_0_3_3 & m_Halt(all_0_18_18) = all_0_13_13 & leq(all_0_20_20, nbr_proc) = 0 & leq(nbr_proc, all_0_4_4) = 0 & leq(nbr_proc, all_0_20_20) = all_0_15_15 & s(all_0_5_5) = all_0_4_4 & s(all_0_20_20) = all_0_14_14 & s(zero) = all_0_20_20 & m_Ack(all_0_7_7, all_0_9_9) = all_0_0_0 & host(all_0_7_7) = all_0_14_14 & host(all_0_8_8) = all_0_4_4 & host(all_0_9_9) = all_0_5_5 & host(all_0_12_12) = all_0_11_11 & host(all_0_17_17) = all_0_20_20 & host(all_0_18_18) = all_0_20_20 & queue(all_0_14_14) = all_0_2_2 & queue(all_0_20_20) = q_nil & elem(all_0_0_0, all_0_1_1) = 0 & elem(all_0_3_3, all_0_1_1) = 0 & setIn(all_0_7_7, alive) = all_0_6_6 & setIn(all_0_12_12, alive) = all_0_10_10 & setIn(all_0_18_18, pids) = all_0_16_16 & setIn(nil, alive) = all_0_19_19 & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ! [v6] : ! [v7] : ! [v8] : ! [v9] : (v6 = 0 | ~ (index(pendack, v3) = v4) | ~ (m_Halt(v2) = v7) | ~ (leq(v4, v5) = v6) | ~ (host(v2) = v3) | ~ (host(v1) = v8) | ~ (host(v0) = v5) | ~ (queue(v8) = v9) | ~ (elem(v7, v9) = 0) | ? [v10] : ? [v11] : ? [v12] : ? [v13] : ? [v14] : (index(ldr, v5) = v13 & index(status, v5) = v14 & index(status, v3) = v11 & setIn(v2, alive) = v10 & setIn(v0, alive) = v12 & ( ~ (v14 = norm) | ~ (v13 = v5) | ~ (v12 = 0) | ~ (v11 = elec_2) | ~ (v10 = 0)))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ! [v6] : ! [v7] : ! [v8] : ( ~ (m_Down(v2) = v4) | ~ (m_Down(v1) = v6) | ~ (host(v3) = nbr_proc) | ~ (host(v0) = v7) | ~ (queue(v7) = v8) | ~ (queue(nbr_proc) = v5) | ~ (elem(v6, v8) = 0) | ~ (elem(v4, v5) = 0) | ? [v9] : ? [v10] : ? [v11] : ? [v12] : ? [v13] : ? [v14] : ? [v15] : ? [v16] : ? [v17] : (index(down, nbr_proc) = v9 & index(status, nbr_proc) = v12 & host(v2) = v10 & host(v1) = v11 & setIn(v0, alive) = v13 & ( ~ (v13 = 0) | ~ (v12 = elec_1) | ~ (v11 = nbr_proc) | (v16 = 0 & ~ (v17 = 0) & ~ (v15 = 0) & ~ (v14 = v10) & leq(all_0_20_20, v14) = 0 & leq(nbr_proc, v14) = v15 & setIn(v14, v9) = v17)))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ! [v6] : ! [v7] : ( ~ (m_Down(v2) = v4) | ~ (m_Ack(v3, v1) = v7) | ~ (host(v3) = v5) | ~ (queue(v5) = v6) | ~ (elem(v7, v6) = 0) | ~ (elem(v4, v6) = 0) | ~ (setIn(v0, alive) = 0) | ? [v8] : ? [v9] : ? [v10] : ? [v11] : ? [v12] : ? [v13] : ? [v14] : ? [v15] : ? [v16] : ? [v17] : (index(ldr, v15) = v16 & index(status, v15) = v17 & index(status, v5) = v12 & index(pendack, v5) = v9 & leq(nbr_proc, v10) = v11 & s(v9) = v10 & host(v2) = v14 & host(v1) = v13 & host(v0) = v15 & setIn(v3, alive) = v8 & ( ~ (v17 = norm) | ~ (v16 = v15) | ~ (v14 = v10) | ~ (v13 = v9) | ~ (v12 = elec_2) | ~ (v11 = 0) | ~ (v8 = 0)))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : (v5 = 0 | ~ (index(pendack, v3) = v4) | ~ (leq(v4, v2) = v5) | ~ (host(v1) = v3) | ~ (host(v0) = v2) | ? [v6] : ? [v7] : ? [v8] : ? [v9] : ? [v10] : (index(status, v3) = v10 & index(status, v2) = v9 & leq(v2, v3) = v6 & setIn(v1, alive) = v8 & setIn(v0, alive) = v7 & ( ~ (v10 = elec_2) | ~ (v9 = elec_2) | ~ (v8 = 0) | ~ (v7 = 0) | v6 = 0))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : (v5 = 0 | ~ (index(pendack, v2) = v4) | ~ (leq(v3, v4) = v5) | ~ (host(v1) = v2) | ~ (host(v0) = v3) | ? [v6] : ? [v7] : ? [v8] : ? [v9] : (m_Ack(v1, v0) = v7 & queue(v2) = v8 & elem(v7, v8) = v9 & setIn(v1, alive) = v6 & ( ~ (v9 = 0) | ~ (v6 = 0)))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ( ~ (index(pendack, v3) = v5) | ~ (index(pendack, v2) = v4) | ~ (leq(v4, v5) = 0) | ~ (host(v1) = v3) | ~ (host(v0) = v2) | ? [v6] : ? [v7] : ? [v8] : ? [v9] : ? [v10] : (index(status, v3) = v10 & index(status, v2) = v9 & leq(v2, v3) = v6 & setIn(v1, alive) = v8 & setIn(v0, alive) = v7 & ( ~ (v10 = elec_2) | ~ (v9 = elec_2) | ~ (v8 = 0) | ~ (v7 = 0) | v6 = 0))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ( ~ (cons(v3, v0) = v4) | ~ (m_Down(v2) = v5) | ~ (m_Halt(v1) = v3) | ~ (elem(v5, v0) = 0) | ? [v6] : ? [v7] : ? [v8] : ? [v9] : (ordered(v4) = v6 & leq(v1, v2) = v9 & host(v2) = v8 & host(v1) = v7 & ( ~ (v8 = v7) | ~ (v6 = 0) | v9 = 0))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ( ~ (m_Down(v1) = v3) | ~ (host(v2) = v4) | ~ (queue(v4) = v5) | ~ (elem(v3, v5) = 0) | ~ (setIn(v0, alive) = 0) | ? [v6] : ? [v7] : ? [v8] : ? [v9] : ? [v10] : (index(ldr, v8) = v9 & index(status, v8) = v10 & host(v1) = v7 & host(v0) = v8 & setIn(v2, alive) = v6 & ( ~ (v10 = norm) | ~ (v9 = v7) | ~ (v8 = v7) | ~ (v6 = 0)))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ( ~ (m_Ack(v2, v0) = v3) | ~ (host(v1) = v4) | ~ (queue(v4) = v5) | ~ (elem(v3, v5) = 0) | ? [v6] : ? [v7] : ? [v8] : ( ~ (v8 = 0) & leq(v6, v7) = v8 & host(v2) = v7 & host(v0) = v6)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ( ~ (m_Ack(v0, v1) = v4) | ~ (host(v0) = v3) | ~ (queue(v3) = v5) | ~ (elem(v4, v5) = 0) | ~ (setIn(v2, alive) = 0) | ? [v6] : ? [v7] : ? [v8] : ? [v9] : ? [v10] : (index(status, v7) = v10 & index(status, v3) = v9 & host(v2) = v7 & host(v1) = v8 & setIn(v0, alive) = v6 & ( ~ (v10 = elec_2) | ~ (v9 = elec_2) | ~ (v8 = v7) | ~ (v6 = 0)))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : (v4 = 0 | ~ (snoc(v2, v1) = v3) | ~ (elem(v0, v3) = v4) | ? [v5] : ( ~ (v5 = 0) & elem(v0, v2) = v5)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : (v4 = 0 | ~ (cons(v1, v2) = v3) | ~ (elem(v0, v3) = v4) | ? [v5] : ( ~ (v5 = 0) & elem(v0, v2) = v5)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : (v4 = 0 | ~ (leq(v2, v3) = v4) | ~ (s(v1) = v3) | ~ (s(v0) = v2) | ? [v5] : ( ~ (v5 = 0) & leq(v0, v1) = v5)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : (v3 = v2 | ~ (m_Ack(v1, v3) = v4) | ~ (m_Ack(v0, v2) = v4)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : (v1 = v0 | ~ (m_Ack(v1, v3) = v4) | ~ (m_Ack(v0, v2) = v4)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (snoc(v2, v1) = v3) | ~ (cons(v0, v3) = v4) | ? [v5] : (snoc(v5, v1) = v4 & cons(v0, v2) = v5)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (snoc(v0, v3) = v4) | ~ (m_Ack(v1, v2) = v3) | ? [v5] : ? [v6] : (ordered(v4) = v6 & ordered(v0) = v5 & ( ~ (v5 = 0) | v6 = 0))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (m_Ldr(v1) = v2) | ~ (host(v0) = v3) | ~ (queue(v3) = v4) | ~ (elem(v2, v4) = 0) | ? [v5] : ? [v6] : ( ~ (v6 = 0) & leq(v3, v5) = v6 & host(v1) = v5)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (m_Down(v1) = v2) | ~ (host(v0) = v3) | ~ (queue(v3) = v4) | ~ (elem(v2, v4) = 0) | ? [v5] : ( ~ (v5 = v3) & host(v1) = v5)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (m_Halt(v1) = v2) | ~ (host(v0) = v3) | ~ (queue(v3) = v4) | ~ (elem(v2, v4) = 0) | ? [v5] : ? [v6] : ( ~ (v6 = 0) & leq(v3, v5) = v6 & host(v1) = v5)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (m_Ack(v1, v0) = v3) | ~ (host(v1) = v2) | ~ (queue(v2) = v4) | ~ (elem(v3, v4) = 0) | ? [v5] : ? [v6] : (index(status, v2) = v6 & setIn(v1, alive) = v5 & ( ~ (v6 = elec_1) | ~ (v5 = 0)))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (m_Ack(v0, v1) = v2) | ~ (host(v0) = v3) | ~ (queue(v3) = v4) | ~ (elem(v2, v4) = 0) | (setIn(v1, pids) = 0 & setIn(v0, pids) = 0)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v3 = v0 | v0 = q_nil | ~ (init(v0) = v1) | ~ (snoc(v1, v2) = v3) | ~ (last(v0) = v2)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v3 = v0 | v0 = q_nil | ~ (tail(v0) = v2) | ~ (cons(v1, v2) = v3) | ~ (head(v0) = v1)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v3 = 0 | ~ (snoc(v1, v0) = v2) | ~ (elem(v0, v2) = v3)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v3 = 0 | ~ (cons(v0, v1) = v2) | ~ (elem(v0, v2) = v3)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v3 = 0 | ~ (leq(v0, v2) = v3) | ~ (leq(v0, v1) = 0) | ? [v4] : ( ~ (v4 = 0) & leq(v1, v2) = v4)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v3 = 0 | ~ (leq(v0, v2) = v3) | ~ (s(v1) = v2) | ? [v4] : ( ~ (v4 = 0) & leq(v0, v1) = v4)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (index(v3, v2) = v1) | ~ (index(v3, v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (snoc(v3, v2) = v1) | ~ (snoc(v3, v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (snoc(v2, v1) = v3) | ~ (elem(v0, v3) = 0) | elem(v0, v2) = 0) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (cons(v3, v2) = v1) | ~ (cons(v3, v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (cons(v1, v2) = v3) | ~ (elem(v0, v3) = 0) | elem(v0, v2) = 0) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (leq(v3, v2) = v1) | ~ (leq(v3, v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (m_Ack(v3, v2) = v1) | ~ (m_Ack(v3, v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (elem(v3, v2) = v1) | ~ (elem(v3, v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (setIn(v3, v2) = v1) | ~ (setIn(v3, v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (ordered(v1) = v2) | ~ (pidElem(v0) = v3) | ? [v4] : ? [v5] : ? [v6] : ? [v7] : (ordered(v4) = v5 & pidMsg(v0) = v6 & snoc(v1, v0) = v4 & host(v6) = v7 & ( ~ (v5 = 0) | (v2 = 0 & ! [v8] : ! [v9] : ! [v10] : ( ~ (v3 = 0) | v10 = 0 | ~ (pidMsg(v8) = v9) | ~ (leq(v9, v6) = v10) | ? [v11] : ? [v12] : ? [v13] : (pidElem(v8) = v12 & host(v9) = v13 & elem(v8, v1) = v11 & ( ~ (v13 = v7) | ~ (v12 = 0) | ~ (v11 = 0)))))))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (ordered(v1) = v2) | ~ (pidElem(v0) = v3) | ? [v4] : ? [v5] : ? [v6] : ? [v7] : (ordered(v4) = v5 & pidMsg(v0) = v6 & cons(v0, v1) = v4 & host(v6) = v7 & ( ~ (v5 = 0) | (v2 = 0 & ! [v8] : ! [v9] : ! [v10] : ( ~ (v3 = 0) | v10 = 0 | ~ (pidMsg(v8) = v9) | ~ (leq(v6, v9) = v10) | ? [v11] : ? [v12] : ? [v13] : (pidElem(v8) = v12 & host(v9) = v13 & elem(v8, v1) = v11 & ( ~ (v13 = v7) | ~ (v12 = 0) | ~ (v11 = 0)))))))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (snoc(v0, v2) = v3) | ~ (m_Ldr(v1) = v2) | ? [v4] : ? [v5] : (ordered(v3) = v5 & ordered(v0) = v4 & ( ~ (v4 = 0) | v5 = 0))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (m_NormQ(v2) = v3) | ~ (m_Ack(v0, v1) = v3)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (m_Ldr(v2) = v3) | ~ (m_Ack(v0, v1) = v3)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (m_NotNorm(v2) = v3) | ~ (m_Ack(v0, v1) = v3)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (m_Down(v2) = v3) | ~ (m_Ack(v0, v1) = v3)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (m_Halt(v2) = v3) | ~ (m_Ack(v0, v1) = v3)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (leq(v2, v3) = 0) | ~ (s(v1) = v3) | ~ (s(v0) = v2) | leq(v0, v1) = 0) & ! [v0] : ! [v1] : ! [v2] : (v2 = v1 | ~ (m_NormQ(v0) = v2) | ~ (m_NormQ(v0) = v1)) & ! [v0] : ! [v1] : ! [v2] : (v2 = v1 | ~ (m_Ldr(v0) = v2) | ~ (m_Ldr(v0) = v1)) & ! [v0] : ! [v1] : ! [v2] : (v2 = v1 | ~ (m_NotNorm(v0) = v2) | ~ (m_NotNorm(v0) = v1)) & ! [v0] : ! [v1] : ! [v2] : (v2 = v1 | ~ (m_Down(v0) = v2) | ~ (m_Down(v0) = v1)) & ! [v0] : ! [v1] : ! [v2] : (v2 = v1 | ~ (m_Halt(v0) = v2) | ~ (m_Halt(v0) = v1)) & ! [v0] : ! [v1] : ! [v2] : (v2 = v1 | ~ (host(v0) = v2) | ~ (host(v0) = v1)) & ! [v0] : ! [v1] : ! [v2] : (v2 = v0 | ~ (leq(v0, v2) = 0) | ~ (s(v1) = v2) | leq(v0, v1) = 0) & ! [v0] : ! [v1] : ! [v2] : (v2 = 0 | ~ (leq(v0, v1) = v2) | leq(v1, v0) = 0) & ! [v0] : ! [v1] : ! [v2] : (v2 = 0 | ~ (leq(v0, v0) = v2) | ~ (s(v1) = v0)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (ordered(v2) = v1) | ~ (ordered(v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (pidMsg(v2) = v1) | ~ (pidMsg(v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (pidElem(v2) = v1) | ~ (pidElem(v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (init(v2) = v1) | ~ (init(v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (last(v2) = v1) | ~ (last(v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (tail(v2) = v1) | ~ (tail(v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (head(v2) = v1) | ~ (head(v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (m_NormQ(v2) = v1) | ~ (m_NormQ(v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (m_NormQ(v1) = v2) | ~ (m_NormQ(v0) = v2)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (m_Ldr(v2) = v1) | ~ (m_Ldr(v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (m_Ldr(v1) = v2) | ~ (m_Ldr(v0) = v2)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (m_NotNorm(v2) = v1) | ~ (m_NotNorm(v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (m_NotNorm(v1) = v2) | ~ (m_NotNorm(v0) = v2)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (m_Down(v2) = v1) | ~ (m_Down(v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (m_Down(v1) = v2) | ~ (m_Down(v0) = v2)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (m_Halt(v2) = v1) | ~ (m_Halt(v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (m_Halt(v1) = v2) | ~ (m_Halt(v0) = v2)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (s(v2) = v1) | ~ (s(v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (host(v2) = v1) | ~ (host(v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (queue(v2) = v1) | ~ (queue(v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : (v1 = 0 | ~ (pidElem(v0) = v1) | ~ (m_Down(v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : (v1 = 0 | ~ (pidElem(v0) = v1) | ~ (m_Halt(v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : ( ~ (ordered(v1) = 0) | ~ (pidElem(v0) = v2) | ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ? [v8] : ? [v9] : ? [v10] : ? [v11] : ? [v12] : (ordered(v5) = v6 & pidMsg(v0) = v3 & snoc(v1, v0) = v5 & host(v3) = v4 & (v6 = 0 | (v11 = v4 & v9 = 0 & v8 = 0 & v2 = 0 & ~ (v12 = 0) & pidMsg(v7) = v10 & pidElem(v7) = 0 & leq(v10, v3) = v12 & host(v10) = v4 & elem(v7, v1) = 0)))) & ! [v0] : ! [v1] : ! [v2] : ( ~ (ordered(v1) = 0) | ~ (pidElem(v0) = v2) | ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ? [v8] : ? [v9] : ? [v10] : ? [v11] : ? [v12] : (ordered(v5) = v6 & pidMsg(v0) = v3 & cons(v0, v1) = v5 & host(v3) = v4 & (v6 = 0 | (v11 = v4 & v9 = 0 & v8 = 0 & v2 = 0 & ~ (v12 = 0) & pidMsg(v7) = v10 & pidElem(v7) = 0 & leq(v3, v10) = v12 & host(v10) = v4 & elem(v7, v1) = 0)))) & ! [v0] : ! [v1] : ! [v2] : ( ~ (snoc(v1, v0) = v2) | init(v2) = v1) & ! [v0] : ! [v1] : ! [v2] : ( ~ (snoc(v1, v0) = v2) | last(v2) = v0) & ! [v0] : ! [v1] : ! [v2] : ( ~ (cons(v0, v1) = v2) | tail(v2) = v1) & ! [v0] : ! [v1] : ! [v2] : ( ~ (cons(v0, v1) = v2) | head(v2) = v0) & ! [v0] : ! [v1] : ! [v2] : ( ~ (m_NormQ(v1) = v2) | ~ (m_Ldr(v0) = v2)) & ! [v0] : ! [v1] : ! [v2] : ( ~ (m_NormQ(v1) = v2) | ~ (m_Down(v0) = v2)) & ! [v0] : ! [v1] : ! [v2] : ( ~ (m_NormQ(v0) = v2) | ~ (m_NotNorm(v1) = v2)) & ! [v0] : ! [v1] : ! [v2] : ( ~ (m_NormQ(v0) = v2) | ~ (m_Halt(v1) = v2)) & ! [v0] : ! [v1] : ! [v2] : ( ~ (m_Ldr(v1) = v2) | ~ (m_Down(v0) = v2)) & ! [v0] : ! [v1] : ! [v2] : ( ~ (m_Ldr(v0) = v2) | ~ (m_NotNorm(v1) = v2)) & ! [v0] : ! [v1] : ! [v2] : ( ~ (m_Ldr(v0) = v2) | ~ (m_Halt(v1) = v2)) & ! [v0] : ! [v1] : ! [v2] : ( ~ (m_NotNorm(v1) = v2) | ~ (m_Down(v0) = v2)) & ! [v0] : ! [v1] : ! [v2] : ( ~ (m_NotNorm(v0) = v2) | ~ (m_Halt(v1) = v2)) & ! [v0] : ! [v1] : ! [v2] : ( ~ (m_Down(v0) = v2) | ~ (m_Halt(v1) = v2)) & ! [v0] : ! [v1] : ! [v2] : ( ~ (host(v1) = v2) | ~ (host(v0) = v2) | ? [v3] : ( ~ (v3 = v2) & s(v2) = v3)) & ! [v0] : ! [v1] : (v1 = v0 | ~ (leq(v0, v1) = 0) | ? [v2] : ( ~ (v2 = 0) & leq(v1, v0) = v2)) & ! [v0] : ! [v1] : (v1 = v0 | ~ (setIn(v1, alive) = 0) | ~ (setIn(v0, alive) = 0) | ? [v2] : ? [v3] : ( ~ (v3 = v2) & host(v1) = v2 & host(v0) = v3)) & ! [v0] : ! [v1] : (v1 = 0 | ~ (leq(v0, v0) = v1)) & ! [v0] : ! [v1] : (v1 = 0 | ~ (leq(v0, all_0_18_18) = v1) | ? [v2] : ( ~ (v2 = all_0_20_20) & host(v0) = v2)) & ! [v0] : ! [v1] : ~ (snoc(v1, v0) = q_nil) & ! [v0] : ! [v1] : ( ~ (snoc(q_nil, v0) = v1) | ordered(v1) = 0) & ! [v0] : ! [v1] : ~ (cons(v0, v1) = q_nil) & ! [v0] : ! [v1] : ( ~ (cons(v0, q_nil) = v1) | ordered(v1) = 0) & ! [v0] : ! [v1] : ( ~ (cons(v0, q_nil) = v1) | snoc(q_nil, v0) = v1) & ! [v0] : ! [v1] : ( ~ (m_Down(v0) = v1) | pidMsg(v1) = v0) & ! [v0] : ! [v1] : ( ~ (m_Halt(v0) = v1) | pidMsg(v1) = v0) & ! [v0] : ! [v1] : ( ~ (leq(v1, v0) = 0) | ~ (s(v0) = v1)) & ! [v0] : ! [v1] : ( ~ (host(v0) = v1) | leq(v1, nbr_proc) = 0) & ! [v0] : ! [v1] : ( ~ (host(v0) = v1) | leq(all_0_20_20, v1) = 0) & ! [v0] : ( ~ (pidElem(v0) = 0) | ? [v1] : ? [v2] : ? [v3] : (m_Down(v1) = v3 & m_Halt(v1) = v2 & (v3 = v0 | v2 = v0))) & ! [v0] : ~ (elem(v0, q_nil) = 0) & ! [v0] : ~ (setIn(v0, setEmpty) = 0) & ! [v0] : ( ~ (setIn(v0, alive) = 0) | ? [v1] : ? [v2] : ? [v3] : (index(elid, v1) = v3 & index(status, v1) = v2 & host(v0) = v1 & (v3 = v0 | ( ~ (v2 = elec_1) & ~ (v2 = elec_2))))) & ! [v0] : ( ~ (setIn(v0, alive) = 0) | ? [v1] : ( ~ (v1 = all_0_20_20) & host(v0) = v1)) & (all_0_6_6 = 0 | all_0_7_7 = all_0_18_18) & (all_0_10_10 = 0 | all_0_12_12 = all_0_18_18)
% 30.65/8.27 |
% 30.65/8.27 | Applying alpha-rule on (1) yields:
% 30.65/8.27 | (2) queue(all_0_14_14) = all_0_2_2
% 30.65/8.27 | (3) ! [v0] : ! [v1] : ! [v2] : (v2 = v1 | ~ (m_Down(v0) = v2) | ~ (m_Down(v0) = v1))
% 30.65/8.27 | (4) ~ (norm = wait)
% 30.65/8.27 | (5) ! [v0] : ! [v1] : ( ~ (host(v0) = v1) | leq(all_0_20_20, v1) = 0)
% 30.65/8.27 | (6) ordered(q_nil) = 0
% 30.65/8.27 | (7) ! [v0] : ! [v1] : ! [v2] : ( ~ (host(v1) = v2) | ~ (host(v0) = v2) | ? [v3] : ( ~ (v3 = v2) & s(v2) = v3))
% 30.65/8.27 | (8) ! [v0] : ! [v1] : ( ~ (m_Halt(v0) = v1) | pidMsg(v1) = v0)
% 30.65/8.27 | (9) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v3 = 0 | ~ (leq(v0, v2) = v3) | ~ (leq(v0, v1) = 0) | ? [v4] : ( ~ (v4 = 0) & leq(v1, v2) = v4))
% 30.65/8.27 | (10) ! [v0] : ! [v1] : ( ~ (host(v0) = v1) | leq(v1, nbr_proc) = 0)
% 30.65/8.27 | (11) setIn(all_0_7_7, alive) = all_0_6_6
% 30.65/8.27 | (12) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ( ~ (cons(v3, v0) = v4) | ~ (m_Down(v2) = v5) | ~ (m_Halt(v1) = v3) | ~ (elem(v5, v0) = 0) | ? [v6] : ? [v7] : ? [v8] : ? [v9] : (ordered(v4) = v6 & leq(v1, v2) = v9 & host(v2) = v8 & host(v1) = v7 & ( ~ (v8 = v7) | ~ (v6 = 0) | v9 = 0)))
% 30.65/8.27 | (13) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (m_NormQ(v1) = v2) | ~ (m_NormQ(v0) = v2))
% 30.65/8.27 | (14) elem(all_0_3_3, all_0_1_1) = 0
% 30.65/8.27 | (15) leq(nbr_proc, all_0_20_20) = all_0_15_15
% 30.65/8.27 | (16) m_Ack(all_0_7_7, all_0_9_9) = all_0_0_0
% 30.65/8.27 | (17) ! [v0] : ! [v1] : ! [v2] : ( ~ (cons(v0, v1) = v2) | head(v2) = v0)
% 30.65/8.27 | (18) ! [v0] : ( ~ (pidElem(v0) = 0) | ? [v1] : ? [v2] : ? [v3] : (m_Down(v1) = v3 & m_Halt(v1) = v2 & (v3 = v0 | v2 = v0)))
% 30.65/8.27 | (19) elem(all_0_0_0, all_0_1_1) = 0
% 30.65/8.27 | (20) ! [v0] : ! [v1] : ! [v2] : ( ~ (snoc(v1, v0) = v2) | init(v2) = v1)
% 30.65/8.27 | (21) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (last(v2) = v1) | ~ (last(v2) = v0))
% 30.65/8.27 | (22) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : (v4 = 0 | ~ (leq(v2, v3) = v4) | ~ (s(v1) = v3) | ~ (s(v0) = v2) | ? [v5] : ( ~ (v5 = 0) & leq(v0, v1) = v5))
% 30.65/8.27 | (23) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : (v4 = 0 | ~ (snoc(v2, v1) = v3) | ~ (elem(v0, v3) = v4) | ? [v5] : ( ~ (v5 = 0) & elem(v0, v2) = v5))
% 30.65/8.27 | (24) leq(all_0_20_20, nbr_proc) = 0
% 30.65/8.28 | (25) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (m_Down(v1) = v2) | ~ (m_Down(v0) = v2))
% 30.65/8.28 | (26) ~ (wait = elec_2)
% 30.65/8.28 | (27) ! [v0] : ! [v1] : ( ~ (snoc(q_nil, v0) = v1) | ordered(v1) = 0)
% 30.65/8.28 | (28) ! [v0] : ! [v1] : ! [v2] : (v2 = v1 | ~ (host(v0) = v2) | ~ (host(v0) = v1))
% 30.65/8.28 | (29) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (m_Halt(v1) = v2) | ~ (host(v0) = v3) | ~ (queue(v3) = v4) | ~ (elem(v2, v4) = 0) | ? [v5] : ? [v6] : ( ~ (v6 = 0) & leq(v3, v5) = v6 & host(v1) = v5))
% 30.65/8.28 | (30) ~ (all_0_16_16 = 0)
% 30.65/8.28 | (31) ! [v0] : ! [v1] : ! [v2] : ( ~ (ordered(v1) = 0) | ~ (pidElem(v0) = v2) | ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ? [v8] : ? [v9] : ? [v10] : ? [v11] : ? [v12] : (ordered(v5) = v6 & pidMsg(v0) = v3 & snoc(v1, v0) = v5 & host(v3) = v4 & (v6 = 0 | (v11 = v4 & v9 = 0 & v8 = 0 & v2 = 0 & ~ (v12 = 0) & pidMsg(v7) = v10 & pidElem(v7) = 0 & leq(v10, v3) = v12 & host(v10) = v4 & elem(v7, v1) = 0))))
% 30.65/8.28 | (32) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v3 = v0 | v0 = q_nil | ~ (init(v0) = v1) | ~ (snoc(v1, v2) = v3) | ~ (last(v0) = v2))
% 30.65/8.28 | (33) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (snoc(v2, v1) = v3) | ~ (elem(v0, v3) = 0) | elem(v0, v2) = 0)
% 30.65/8.28 | (34) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (elem(v3, v2) = v1) | ~ (elem(v3, v2) = v0))
% 30.65/8.28 | (35) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (leq(v3, v2) = v1) | ~ (leq(v3, v2) = v0))
% 30.65/8.28 | (36) m_Halt(all_0_18_18) = all_0_13_13
% 30.65/8.28 | (37) ! [v0] : ! [v1] : ! [v2] : (v2 = v1 | ~ (m_NotNorm(v0) = v2) | ~ (m_NotNorm(v0) = v1))
% 30.65/8.28 | (38) host(all_0_8_8) = all_0_4_4
% 30.65/8.28 | (39) index(pendack, all_0_14_14) = all_0_5_5
% 30.65/8.28 | (40) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (snoc(v2, v1) = v3) | ~ (cons(v0, v3) = v4) | ? [v5] : (snoc(v5, v1) = v4 & cons(v0, v2) = v5))
% 30.65/8.28 | (41) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (ordered(v1) = v2) | ~ (pidElem(v0) = v3) | ? [v4] : ? [v5] : ? [v6] : ? [v7] : (ordered(v4) = v5 & pidMsg(v0) = v6 & cons(v0, v1) = v4 & host(v6) = v7 & ( ~ (v5 = 0) | (v2 = 0 & ! [v8] : ! [v9] : ! [v10] : ( ~ (v3 = 0) | v10 = 0 | ~ (pidMsg(v8) = v9) | ~ (leq(v6, v9) = v10) | ? [v11] : ? [v12] : ? [v13] : (pidElem(v8) = v12 & host(v9) = v13 & elem(v8, v1) = v11 & ( ~ (v13 = v7) | ~ (v12 = 0) | ~ (v11 = 0))))))))
% 30.65/8.28 | (42) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (m_Down(v2) = v3) | ~ (m_Ack(v0, v1) = v3))
% 31.12/8.28 | (43) ! [v0] : ! [v1] : ( ~ (cons(v0, q_nil) = v1) | snoc(q_nil, v0) = v1)
% 31.12/8.28 | (44) ! [v0] : ! [v1] : ! [v2] : ( ~ (ordered(v1) = 0) | ~ (pidElem(v0) = v2) | ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ? [v8] : ? [v9] : ? [v10] : ? [v11] : ? [v12] : (ordered(v5) = v6 & pidMsg(v0) = v3 & cons(v0, v1) = v5 & host(v3) = v4 & (v6 = 0 | (v11 = v4 & v9 = 0 & v8 = 0 & v2 = 0 & ~ (v12 = 0) & pidMsg(v7) = v10 & pidElem(v7) = 0 & leq(v3, v10) = v12 & host(v10) = v4 & elem(v7, v1) = 0))))
% 31.12/8.28 | (45) ! [v0] : ! [v1] : ! [v2] : (v2 = v0 | ~ (leq(v0, v2) = 0) | ~ (s(v1) = v2) | leq(v0, v1) = 0)
% 31.12/8.28 | (46) host(all_0_9_9) = all_0_5_5
% 31.12/8.28 | (47) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : (v1 = v0 | ~ (m_Ack(v1, v3) = v4) | ~ (m_Ack(v0, v2) = v4))
% 31.12/8.28 | (48) ~ (norm = elec_1)
% 31.12/8.28 | (49) host(all_0_7_7) = all_0_14_14
% 31.12/8.28 | (50) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (m_Halt(v2) = v1) | ~ (m_Halt(v2) = v0))
% 31.12/8.28 | (51) ! [v0] : ! [v1] : ! [v2] : ( ~ (m_NotNorm(v1) = v2) | ~ (m_Down(v0) = v2))
% 31.12/8.28 | (52) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (cons(v1, v2) = v3) | ~ (elem(v0, v3) = 0) | elem(v0, v2) = 0)
% 31.12/8.28 | (53) ~ (all_0_19_19 = 0)
% 31.12/8.28 | (54) s(all_0_5_5) = all_0_4_4
% 31.12/8.28 | (55) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : (v5 = 0 | ~ (index(pendack, v2) = v4) | ~ (leq(v3, v4) = v5) | ~ (host(v1) = v2) | ~ (host(v0) = v3) | ? [v6] : ? [v7] : ? [v8] : ? [v9] : (m_Ack(v1, v0) = v7 & queue(v2) = v8 & elem(v7, v8) = v9 & setIn(v1, alive) = v6 & ( ~ (v9 = 0) | ~ (v6 = 0))))
% 31.12/8.28 | (56) all_0_10_10 = 0 | all_0_12_12 = all_0_18_18
% 31.12/8.28 | (57) ! [v0] : ~ (setIn(v0, setEmpty) = 0)
% 31.12/8.28 | (58) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ! [v6] : ! [v7] : ( ~ (m_Down(v2) = v4) | ~ (m_Ack(v3, v1) = v7) | ~ (host(v3) = v5) | ~ (queue(v5) = v6) | ~ (elem(v7, v6) = 0) | ~ (elem(v4, v6) = 0) | ~ (setIn(v0, alive) = 0) | ? [v8] : ? [v9] : ? [v10] : ? [v11] : ? [v12] : ? [v13] : ? [v14] : ? [v15] : ? [v16] : ? [v17] : (index(ldr, v15) = v16 & index(status, v15) = v17 & index(status, v5) = v12 & index(pendack, v5) = v9 & leq(nbr_proc, v10) = v11 & s(v9) = v10 & host(v2) = v14 & host(v1) = v13 & host(v0) = v15 & setIn(v3, alive) = v8 & ( ~ (v17 = norm) | ~ (v16 = v15) | ~ (v14 = v10) | ~ (v13 = v9) | ~ (v12 = elec_2) | ~ (v11 = 0) | ~ (v8 = 0))))
% 31.12/8.28 | (59) ! [v0] : ! [v1] : ! [v2] : (v1 = 0 | ~ (pidElem(v0) = v1) | ~ (m_Down(v2) = v0))
% 31.12/8.28 | (60) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v3 = 0 | ~ (leq(v0, v2) = v3) | ~ (s(v1) = v2) | ? [v4] : ( ~ (v4 = 0) & leq(v0, v1) = v4))
% 31.12/8.28 | (61) all_0_6_6 = 0 | all_0_7_7 = all_0_18_18
% 31.12/8.28 | (62) ~ (norm = elec_2)
% 31.12/8.28 | (63) ! [v0] : ! [v1] : (v1 = v0 | ~ (setIn(v1, alive) = 0) | ~ (setIn(v0, alive) = 0) | ? [v2] : ? [v3] : ( ~ (v3 = v2) & host(v1) = v2 & host(v0) = v3))
% 31.12/8.29 | (64) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ( ~ (m_Down(v1) = v3) | ~ (host(v2) = v4) | ~ (queue(v4) = v5) | ~ (elem(v3, v5) = 0) | ~ (setIn(v0, alive) = 0) | ? [v6] : ? [v7] : ? [v8] : ? [v9] : ? [v10] : (index(ldr, v8) = v9 & index(status, v8) = v10 & host(v1) = v7 & host(v0) = v8 & setIn(v2, alive) = v6 & ( ~ (v10 = norm) | ~ (v9 = v7) | ~ (v8 = v7) | ~ (v6 = 0))))
% 31.12/8.29 | (65) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (m_Halt(v2) = v3) | ~ (m_Ack(v0, v1) = v3))
% 31.12/8.29 | (66) m_Down(all_0_8_8) = all_0_3_3
% 31.12/8.29 | (67) ~ (all_0_14_14 = all_0_20_20)
% 31.12/8.29 | (68) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (m_NotNorm(v1) = v2) | ~ (m_NotNorm(v0) = v2))
% 31.12/8.29 | (69) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (cons(v3, v2) = v1) | ~ (cons(v3, v2) = v0))
% 31.12/8.29 | (70) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v3 = v0 | v0 = q_nil | ~ (tail(v0) = v2) | ~ (cons(v1, v2) = v3) | ~ (head(v0) = v1))
% 31.12/8.29 | (71) ! [v0] : ! [v1] : ! [v2] : ( ~ (snoc(v1, v0) = v2) | last(v2) = v0)
% 31.12/8.29 | (72) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (leq(v2, v3) = 0) | ~ (s(v1) = v3) | ~ (s(v0) = v2) | leq(v0, v1) = 0)
% 31.12/8.29 | (73) index(ldr, all_0_11_11) = all_0_11_11
% 31.12/8.29 | (74) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ( ~ (m_Ack(v2, v0) = v3) | ~ (host(v1) = v4) | ~ (queue(v4) = v5) | ~ (elem(v3, v5) = 0) | ? [v6] : ? [v7] : ? [v8] : ( ~ (v8 = 0) & leq(v6, v7) = v8 & host(v2) = v7 & host(v0) = v6))
% 31.12/8.29 | (75) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (tail(v2) = v1) | ~ (tail(v2) = v0))
% 31.12/8.29 | (76) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (queue(v2) = v1) | ~ (queue(v2) = v0))
% 31.12/8.29 | (77) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (snoc(v0, v3) = v4) | ~ (m_Ack(v1, v2) = v3) | ? [v5] : ? [v6] : (ordered(v4) = v6 & ordered(v0) = v5 & ( ~ (v5 = 0) | v6 = 0)))
% 31.12/8.29 | (78) ! [v0] : ! [v1] : ( ~ (m_Down(v0) = v1) | pidMsg(v1) = v0)
% 31.12/8.29 | (79) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (m_Ldr(v1) = v2) | ~ (host(v0) = v3) | ~ (queue(v3) = v4) | ~ (elem(v2, v4) = 0) | ? [v5] : ? [v6] : ( ~ (v6 = 0) & leq(v3, v5) = v6 & host(v1) = v5))
% 31.12/8.29 | (80) ! [v0] : ! [v1] : ( ~ (leq(v1, v0) = 0) | ~ (s(v0) = v1))
% 31.12/8.29 | (81) leq(nbr_proc, all_0_4_4) = 0
% 31.12/8.29 | (82) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (m_Ldr(v1) = v2) | ~ (m_Ldr(v0) = v2))
% 31.12/8.29 | (83) ! [v0] : ! [v1] : ! [v2] : ( ~ (m_NormQ(v1) = v2) | ~ (m_Ldr(v0) = v2))
% 31.12/8.29 | (84) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (m_NotNorm(v2) = v3) | ~ (m_Ack(v0, v1) = v3))
% 31.12/8.29 | (85) ! [v0] : ! [v1] : (v1 = 0 | ~ (leq(v0, all_0_18_18) = v1) | ? [v2] : ( ~ (v2 = all_0_20_20) & host(v0) = v2))
% 31.12/8.29 | (86) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (index(v3, v2) = v1) | ~ (index(v3, v2) = v0))
% 31.12/8.29 | (87) ! [v0] : ! [v1] : ! [v2] : (v2 = v1 | ~ (m_NormQ(v0) = v2) | ~ (m_NormQ(v0) = v1))
% 31.12/8.29 | (88) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (m_Ack(v0, v1) = v2) | ~ (host(v0) = v3) | ~ (queue(v3) = v4) | ~ (elem(v2, v4) = 0) | (setIn(v1, pids) = 0 & setIn(v0, pids) = 0))
% 31.12/8.29 | (89) host(all_0_12_12) = all_0_11_11
% 31.12/8.29 | (90) ! [v0] : ~ (elem(v0, q_nil) = 0)
% 31.12/8.29 | (91) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (snoc(v3, v2) = v1) | ~ (snoc(v3, v2) = v0))
% 31.12/8.29 | (92) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (m_NormQ(v2) = v3) | ~ (m_Ack(v0, v1) = v3))
% 31.12/8.29 | (93) ! [v0] : ( ~ (setIn(v0, alive) = 0) | ? [v1] : ? [v2] : ? [v3] : (index(elid, v1) = v3 & index(status, v1) = v2 & host(v0) = v1 & (v3 = v0 | ( ~ (v2 = elec_1) & ~ (v2 = elec_2)))))
% 31.12/8.29 | (94) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : (v3 = v2 | ~ (m_Ack(v1, v3) = v4) | ~ (m_Ack(v0, v2) = v4))
% 31.12/8.29 | (95) ~ (all_0_11_11 = all_0_20_20)
% 31.12/8.29 | (96) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v3 = 0 | ~ (cons(v0, v1) = v2) | ~ (elem(v0, v2) = v3))
% 31.12/8.29 | (97) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (m_Halt(v1) = v2) | ~ (m_Halt(v0) = v2))
% 31.12/8.29 | (98) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : (v5 = 0 | ~ (index(pendack, v3) = v4) | ~ (leq(v4, v2) = v5) | ~ (host(v1) = v3) | ~ (host(v0) = v2) | ? [v6] : ? [v7] : ? [v8] : ? [v9] : ? [v10] : (index(status, v3) = v10 & index(status, v2) = v9 & leq(v2, v3) = v6 & setIn(v1, alive) = v8 & setIn(v0, alive) = v7 & ( ~ (v10 = elec_2) | ~ (v9 = elec_2) | ~ (v8 = 0) | ~ (v7 = 0) | v6 = 0)))
% 31.19/8.29 | (99) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (setIn(v3, v2) = v1) | ~ (setIn(v3, v2) = v0))
% 31.19/8.29 | (100) setIn(all_0_18_18, pids) = all_0_16_16
% 31.19/8.29 | (101) queue(all_0_20_20) = q_nil
% 31.19/8.29 | (102) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v3 = 0 | ~ (snoc(v1, v0) = v2) | ~ (elem(v0, v2) = v3))
% 31.19/8.29 | (103) host(all_0_17_17) = all_0_20_20
% 31.19/8.29 | (104) ! [v0] : ! [v1] : ! [v2] : ( ~ (m_Ldr(v0) = v2) | ~ (m_Halt(v1) = v2))
% 31.19/8.29 | (105) ! [v0] : ! [v1] : ( ~ (cons(v0, q_nil) = v1) | ordered(v1) = 0)
% 31.19/8.29 | (106) ! [v0] : ! [v1] : ~ (cons(v0, v1) = q_nil)
% 31.19/8.29 | (107) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (init(v2) = v1) | ~ (init(v2) = v0))
% 31.19/8.29 | (108) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (m_Down(v2) = v1) | ~ (m_Down(v2) = v0))
% 31.19/8.29 | (109) snoc(all_0_2_2, all_0_13_13) = all_0_1_1
% 31.19/8.29 | (110) host(all_0_18_18) = all_0_20_20
% 31.19/8.29 | (111) ! [v0] : ! [v1] : ! [v2] : ( ~ (m_NormQ(v0) = v2) | ~ (m_Halt(v1) = v2))
% 31.19/8.29 | (112) ~ (all_0_15_15 = 0)
% 31.19/8.29 | (113) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ( ~ (m_Ack(v0, v1) = v4) | ~ (host(v0) = v3) | ~ (queue(v3) = v5) | ~ (elem(v4, v5) = 0) | ~ (setIn(v2, alive) = 0) | ? [v6] : ? [v7] : ? [v8] : ? [v9] : ? [v10] : (index(status, v7) = v10 & index(status, v3) = v9 & host(v2) = v7 & host(v1) = v8 & setIn(v0, alive) = v6 & ( ~ (v10 = elec_2) | ~ (v9 = elec_2) | ~ (v8 = v7) | ~ (v6 = 0))))
% 31.19/8.30 | (114) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (m_Ack(v3, v2) = v1) | ~ (m_Ack(v3, v2) = v0))
% 31.19/8.30 | (115) ~ (elec_1 = elec_2)
% 31.19/8.30 | (116) s(all_0_20_20) = all_0_14_14
% 31.19/8.30 | (117) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (pidMsg(v2) = v1) | ~ (pidMsg(v2) = v0))
% 31.19/8.30 | (118) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (ordered(v2) = v1) | ~ (ordered(v2) = v0))
% 31.19/8.30 | (119) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (m_Ack(v1, v0) = v3) | ~ (host(v1) = v2) | ~ (queue(v2) = v4) | ~ (elem(v3, v4) = 0) | ? [v5] : ? [v6] : (index(status, v2) = v6 & setIn(v1, alive) = v5 & ( ~ (v6 = elec_1) | ~ (v5 = 0))))
% 31.19/8.30 | (120) ! [v0] : ! [v1] : ! [v2] : ( ~ (m_Ldr(v1) = v2) | ~ (m_Down(v0) = v2))
% 31.19/8.30 | (121) ~ (wait = elec_1)
% 31.19/8.30 | (122) ! [v0] : ! [v1] : ! [v2] : (v2 = v1 | ~ (m_Ldr(v0) = v2) | ~ (m_Ldr(v0) = v1))
% 31.19/8.30 | (123) ! [v0] : ! [v1] : ! [v2] : ( ~ (m_Down(v0) = v2) | ~ (m_Halt(v1) = v2))
% 31.19/8.30 | (124) setIn(nil, alive) = all_0_19_19
% 31.19/8.30 | (125) ! [v0] : ! [v1] : ! [v2] : (v2 = v1 | ~ (m_Halt(v0) = v2) | ~ (m_Halt(v0) = v1))
% 31.19/8.30 | (126) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (m_Ldr(v2) = v3) | ~ (m_Ack(v0, v1) = v3))
% 31.19/8.30 | (127) ! [v0] : ! [v1] : ! [v2] : (v1 = 0 | ~ (pidElem(v0) = v1) | ~ (m_Halt(v2) = v0))
% 31.19/8.30 | (128) ! [v0] : ! [v1] : ! [v2] : ( ~ (cons(v0, v1) = v2) | tail(v2) = v1)
% 31.19/8.30 | (129) ! [v0] : ! [v1] : ! [v2] : ( ~ (m_Ldr(v0) = v2) | ~ (m_NotNorm(v1) = v2))
% 31.19/8.30 | (130) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (ordered(v1) = v2) | ~ (pidElem(v0) = v3) | ? [v4] : ? [v5] : ? [v6] : ? [v7] : (ordered(v4) = v5 & pidMsg(v0) = v6 & snoc(v1, v0) = v4 & host(v6) = v7 & ( ~ (v5 = 0) | (v2 = 0 & ! [v8] : ! [v9] : ! [v10] : ( ~ (v3 = 0) | v10 = 0 | ~ (pidMsg(v8) = v9) | ~ (leq(v9, v6) = v10) | ? [v11] : ? [v12] : ? [v13] : (pidElem(v8) = v12 & host(v9) = v13 & elem(v8, v1) = v11 & ( ~ (v13 = v7) | ~ (v12 = 0) | ~ (v11 = 0))))))))
% 31.19/8.30 | (131) setIn(all_0_12_12, alive) = all_0_10_10
% 31.19/8.30 | (132) ! [v0] : ! [v1] : ! [v2] : ( ~ (m_NormQ(v1) = v2) | ~ (m_Down(v0) = v2))
% 31.19/8.30 | (133) ! [v0] : ! [v1] : ~ (snoc(v1, v0) = q_nil)
% 31.19/8.30 | (134) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (m_Down(v1) = v2) | ~ (host(v0) = v3) | ~ (queue(v3) = v4) | ~ (elem(v2, v4) = 0) | ? [v5] : ( ~ (v5 = v3) & host(v1) = v5))
% 31.19/8.30 | (135) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (head(v2) = v1) | ~ (head(v2) = v0))
% 31.19/8.30 | (136) index(status, all_0_11_11) = norm
% 31.19/8.30 | (137) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : (v4 = 0 | ~ (cons(v1, v2) = v3) | ~ (elem(v0, v3) = v4) | ? [v5] : ( ~ (v5 = 0) & elem(v0, v2) = v5))
% 31.19/8.30 | (138) index(status, all_0_14_14) = elec_2
% 31.19/8.30 | (139) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (s(v2) = v1) | ~ (s(v2) = v0))
% 31.19/8.30 | (140) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (snoc(v0, v2) = v3) | ~ (m_Ldr(v1) = v2) | ? [v4] : ? [v5] : (ordered(v3) = v5 & ordered(v0) = v4 & ( ~ (v4 = 0) | v5 = 0)))
% 31.19/8.30 | (141) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (host(v2) = v1) | ~ (host(v2) = v0))
% 31.19/8.30 | (142) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (m_NotNorm(v2) = v1) | ~ (m_NotNorm(v2) = v0))
% 31.19/8.30 | (143) ! [v0] : ! [v1] : ! [v2] : (v2 = 0 | ~ (leq(v0, v0) = v2) | ~ (s(v1) = v0))
% 31.19/8.30 | (144) ! [v0] : ! [v1] : (v1 = v0 | ~ (leq(v0, v1) = 0) | ? [v2] : ( ~ (v2 = 0) & leq(v1, v0) = v2))
% 31.19/8.30 | (145) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ! [v6] : ! [v7] : ! [v8] : ! [v9] : (v6 = 0 | ~ (index(pendack, v3) = v4) | ~ (m_Halt(v2) = v7) | ~ (leq(v4, v5) = v6) | ~ (host(v2) = v3) | ~ (host(v1) = v8) | ~ (host(v0) = v5) | ~ (queue(v8) = v9) | ~ (elem(v7, v9) = 0) | ? [v10] : ? [v11] : ? [v12] : ? [v13] : ? [v14] : (index(ldr, v5) = v13 & index(status, v5) = v14 & index(status, v3) = v11 & setIn(v2, alive) = v10 & setIn(v0, alive) = v12 & ( ~ (v14 = norm) | ~ (v13 = v5) | ~ (v12 = 0) | ~ (v11 = elec_2) | ~ (v10 = 0))))
% 31.19/8.30 | (146) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (m_Ldr(v2) = v1) | ~ (m_Ldr(v2) = v0))
% 31.19/8.30 | (147) ! [v0] : ! [v1] : ! [v2] : ( ~ (m_NormQ(v0) = v2) | ~ (m_NotNorm(v1) = v2))
% 31.19/8.30 | (148) s(zero) = all_0_20_20
% 31.19/8.30 | (149) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (pidElem(v2) = v1) | ~ (pidElem(v2) = v0))
% 31.19/8.30 | (150) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ! [v6] : ! [v7] : ! [v8] : ( ~ (m_Down(v2) = v4) | ~ (m_Down(v1) = v6) | ~ (host(v3) = nbr_proc) | ~ (host(v0) = v7) | ~ (queue(v7) = v8) | ~ (queue(nbr_proc) = v5) | ~ (elem(v6, v8) = 0) | ~ (elem(v4, v5) = 0) | ? [v9] : ? [v10] : ? [v11] : ? [v12] : ? [v13] : ? [v14] : ? [v15] : ? [v16] : ? [v17] : (index(down, nbr_proc) = v9 & index(status, nbr_proc) = v12 & host(v2) = v10 & host(v1) = v11 & setIn(v0, alive) = v13 & ( ~ (v13 = 0) | ~ (v12 = elec_1) | ~ (v11 = nbr_proc) | (v16 = 0 & ~ (v17 = 0) & ~ (v15 = 0) & ~ (v14 = v10) & leq(all_0_20_20, v14) = 0 & leq(nbr_proc, v14) = v15 & setIn(v14, v9) = v17))))
% 31.19/8.30 | (151) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (m_NormQ(v2) = v1) | ~ (m_NormQ(v2) = v0))
% 31.19/8.30 | (152) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ( ~ (index(pendack, v3) = v5) | ~ (index(pendack, v2) = v4) | ~ (leq(v4, v5) = 0) | ~ (host(v1) = v3) | ~ (host(v0) = v2) | ? [v6] : ? [v7] : ? [v8] : ? [v9] : ? [v10] : (index(status, v3) = v10 & index(status, v2) = v9 & leq(v2, v3) = v6 & setIn(v1, alive) = v8 & setIn(v0, alive) = v7 & ( ~ (v10 = elec_2) | ~ (v9 = elec_2) | ~ (v8 = 0) | ~ (v7 = 0) | v6 = 0)))
% 31.19/8.30 | (153) ! [v0] : ! [v1] : ! [v2] : (v2 = 0 | ~ (leq(v0, v1) = v2) | leq(v1, v0) = 0)
% 31.19/8.30 | (154) ! [v0] : ! [v1] : ! [v2] : ( ~ (m_NotNorm(v0) = v2) | ~ (m_Halt(v1) = v2))
% 31.19/8.30 | (155) ! [v0] : ! [v1] : (v1 = 0 | ~ (leq(v0, v0) = v1))
% 31.19/8.30 | (156) ! [v0] : ( ~ (setIn(v0, alive) = 0) | ? [v1] : ( ~ (v1 = all_0_20_20) & host(v0) = v1))
% 31.19/8.30 |
% 31.19/8.30 | Instantiating formula (123) with all_0_13_13, all_0_18_18, all_0_8_8 and discharging atoms m_Halt(all_0_18_18) = all_0_13_13, yields:
% 31.19/8.30 | (157) ~ (m_Down(all_0_8_8) = all_0_13_13)
% 31.19/8.30 |
% 31.19/8.30 | Instantiating formula (65) with all_0_13_13, all_0_18_18, all_0_9_9, all_0_7_7 and discharging atoms m_Halt(all_0_18_18) = all_0_13_13, yields:
% 31.19/8.30 | (158) ~ (m_Ack(all_0_7_7, all_0_9_9) = all_0_13_13)
% 31.19/8.30 |
% 31.19/8.30 | Instantiating formula (28) with all_0_20_20, all_0_14_14, all_0_18_18 and discharging atoms host(all_0_18_18) = all_0_20_20, yields:
% 31.19/8.30 | (159) all_0_14_14 = all_0_20_20 | ~ (host(all_0_18_18) = all_0_14_14)
% 31.19/8.30 |
% 31.19/8.31 | Instantiating formula (28) with all_0_20_20, all_0_11_11, all_0_18_18 and discharging atoms host(all_0_18_18) = all_0_20_20, yields:
% 31.19/8.31 | (160) all_0_11_11 = all_0_20_20 | ~ (host(all_0_18_18) = all_0_11_11)
% 31.19/8.31 |
% 31.19/8.31 | Instantiating formula (99) with all_0_12_12, alive, all_0_10_10, all_0_6_6 and discharging atoms setIn(all_0_12_12, alive) = all_0_10_10, yields:
% 31.19/8.31 | (161) all_0_6_6 = all_0_10_10 | ~ (setIn(all_0_12_12, alive) = all_0_6_6)
% 31.19/8.31 |
% 31.19/8.31 | Using (66) and (157) yields:
% 31.19/8.31 | (162) ~ (all_0_3_3 = all_0_13_13)
% 31.19/8.31 |
% 31.19/8.31 | Using (16) and (158) yields:
% 31.19/8.31 | (163) ~ (all_0_0_0 = all_0_13_13)
% 31.19/8.31 |
% 31.19/8.31 | Instantiating formula (144) with all_0_4_4, nbr_proc and discharging atoms leq(nbr_proc, all_0_4_4) = 0, yields:
% 31.19/8.31 | (164) all_0_4_4 = nbr_proc | ? [v0] : ( ~ (v0 = 0) & leq(all_0_4_4, nbr_proc) = v0)
% 31.19/8.31 |
% 31.19/8.31 | Instantiating formula (72) with nbr_proc, nbr_proc, all_0_5_5, all_0_5_5 yields:
% 31.19/8.31 | (165) ~ (leq(nbr_proc, nbr_proc) = 0) | ~ (s(all_0_5_5) = nbr_proc) | leq(all_0_5_5, all_0_5_5) = 0
% 31.19/8.31 |
% 31.19/8.31 | Instantiating formula (22) with all_0_15_15, all_0_20_20, nbr_proc, zero, all_0_5_5 and discharging atoms leq(nbr_proc, all_0_20_20) = all_0_15_15, s(zero) = all_0_20_20, yields:
% 31.19/8.31 | (166) all_0_15_15 = 0 | ~ (s(all_0_5_5) = nbr_proc) | ? [v0] : ( ~ (v0 = 0) & leq(all_0_5_5, zero) = v0)
% 31.19/8.31 |
% 31.19/8.31 | Instantiating formula (5) with all_0_14_14, all_0_7_7 and discharging atoms host(all_0_7_7) = all_0_14_14, yields:
% 31.19/8.31 | (167) leq(all_0_20_20, all_0_14_14) = 0
% 31.19/8.31 |
% 31.19/8.31 | Instantiating formula (10) with all_0_4_4, all_0_8_8 and discharging atoms host(all_0_8_8) = all_0_4_4, yields:
% 31.19/8.31 | (168) leq(all_0_4_4, nbr_proc) = 0
% 31.19/8.31 |
% 31.19/8.31 | Instantiating formula (7) with all_0_5_5, all_0_9_9, all_0_9_9 and discharging atoms host(all_0_9_9) = all_0_5_5, yields:
% 31.19/8.31 | (169) ? [v0] : ( ~ (v0 = all_0_5_5) & s(all_0_5_5) = v0)
% 31.19/8.31 |
% 31.19/8.31 | Instantiating formula (10) with all_0_5_5, all_0_9_9 and discharging atoms host(all_0_9_9) = all_0_5_5, yields:
% 31.19/8.31 | (170) leq(all_0_5_5, nbr_proc) = 0
% 31.19/8.31 |
% 31.19/8.31 | Instantiating formula (5) with all_0_11_11, all_0_12_12 and discharging atoms host(all_0_12_12) = all_0_11_11, yields:
% 31.19/8.31 | (171) leq(all_0_20_20, all_0_11_11) = 0
% 31.19/8.31 |
% 31.19/8.31 | Instantiating formula (74) with all_0_2_2, all_0_14_14, all_0_0_0, all_0_7_7, all_0_7_7, all_0_9_9 and discharging atoms m_Ack(all_0_7_7, all_0_9_9) = all_0_0_0, host(all_0_7_7) = all_0_14_14, queue(all_0_14_14) = all_0_2_2, yields:
% 31.19/8.31 | (172) ~ (elem(all_0_0_0, all_0_2_2) = 0) | ? [v0] : ? [v1] : ? [v2] : ( ~ (v2 = 0) & leq(v0, v1) = v2 & host(all_0_7_7) = v1 & host(all_0_9_9) = v0)
% 31.19/8.31 |
% 31.19/8.31 | Instantiating formula (88) with all_0_2_2, all_0_14_14, all_0_0_0, all_0_9_9, all_0_7_7 and discharging atoms m_Ack(all_0_7_7, all_0_9_9) = all_0_0_0, host(all_0_7_7) = all_0_14_14, queue(all_0_14_14) = all_0_2_2, yields:
% 31.19/8.31 | (173) ~ (elem(all_0_0_0, all_0_2_2) = 0) | (setIn(all_0_7_7, pids) = 0 & setIn(all_0_9_9, pids) = 0)
% 31.19/8.31 |
% 31.19/8.31 | Instantiating formula (33) with all_0_1_1, all_0_2_2, all_0_13_13, all_0_0_0 and discharging atoms snoc(all_0_2_2, all_0_13_13) = all_0_1_1, elem(all_0_0_0, all_0_1_1) = 0, yields:
% 31.19/8.31 | (174) all_0_0_0 = all_0_13_13 | elem(all_0_0_0, all_0_2_2) = 0
% 31.19/8.31 |
% 31.19/8.31 | Instantiating formula (134) with all_0_2_2, all_0_14_14, all_0_3_3, all_0_8_8, all_0_7_7 and discharging atoms m_Down(all_0_8_8) = all_0_3_3, host(all_0_7_7) = all_0_14_14, queue(all_0_14_14) = all_0_2_2, yields:
% 31.19/8.31 | (175) ~ (elem(all_0_3_3, all_0_2_2) = 0) | ? [v0] : ( ~ (v0 = all_0_14_14) & host(all_0_8_8) = v0)
% 31.19/8.31 |
% 31.19/8.31 | Instantiating formula (33) with all_0_1_1, all_0_2_2, all_0_13_13, all_0_3_3 and discharging atoms snoc(all_0_2_2, all_0_13_13) = all_0_1_1, elem(all_0_3_3, all_0_1_1) = 0, yields:
% 31.19/8.31 | (176) all_0_3_3 = all_0_13_13 | elem(all_0_3_3, all_0_2_2) = 0
% 31.19/8.31 |
% 31.19/8.31 | Instantiating formula (93) with all_0_7_7 yields:
% 31.19/8.31 | (177) ~ (setIn(all_0_7_7, alive) = 0) | ? [v0] : ? [v1] : ? [v2] : (index(elid, v0) = v2 & index(status, v0) = v1 & host(all_0_7_7) = v0 & (v2 = all_0_7_7 | ( ~ (v1 = elec_1) & ~ (v1 = elec_2))))
% 31.19/8.31 |
% 31.19/8.31 | Instantiating formula (93) with all_0_12_12 yields:
% 31.19/8.31 | (178) ~ (setIn(all_0_12_12, alive) = 0) | ? [v0] : ? [v1] : ? [v2] : (index(elid, v0) = v2 & index(status, v0) = v1 & host(all_0_12_12) = v0 & (v2 = all_0_12_12 | ( ~ (v1 = elec_1) & ~ (v1 = elec_2))))
% 31.19/8.31 |
% 31.19/8.31 | Instantiating (169) with all_21_0_21 yields:
% 31.19/8.31 | (179) ~ (all_21_0_21 = all_0_5_5) & s(all_0_5_5) = all_21_0_21
% 31.19/8.31 |
% 31.19/8.31 | Applying alpha-rule on (179) yields:
% 31.19/8.31 | (180) ~ (all_21_0_21 = all_0_5_5)
% 31.19/8.31 | (181) s(all_0_5_5) = all_21_0_21
% 31.19/8.31 |
% 31.19/8.31 +-Applying beta-rule and splitting (164), into two cases.
% 31.19/8.31 |-Branch one:
% 31.19/8.31 | (182) all_0_4_4 = nbr_proc
% 31.27/8.31 |
% 31.27/8.31 | From (182) and (81) follows:
% 31.27/8.31 | (183) leq(nbr_proc, nbr_proc) = 0
% 31.27/8.31 |
% 31.27/8.31 | From (182) and (54) follows:
% 31.27/8.31 | (184) s(all_0_5_5) = nbr_proc
% 31.27/8.31 |
% 31.27/8.31 | From (182) and (38) follows:
% 31.27/8.31 | (185) host(all_0_8_8) = nbr_proc
% 31.27/8.31 |
% 31.27/8.31 +-Applying beta-rule and splitting (174), into two cases.
% 31.27/8.31 |-Branch one:
% 31.27/8.31 | (186) elem(all_0_0_0, all_0_2_2) = 0
% 31.27/8.31 |
% 31.27/8.31 +-Applying beta-rule and splitting (173), into two cases.
% 31.27/8.31 |-Branch one:
% 31.27/8.31 | (187) ~ (elem(all_0_0_0, all_0_2_2) = 0)
% 31.27/8.31 |
% 31.27/8.31 | Using (186) and (187) yields:
% 31.27/8.31 | (188) $false
% 31.27/8.31 |
% 31.27/8.31 |-The branch is then unsatisfiable
% 31.27/8.31 |-Branch two:
% 31.27/8.31 | (186) elem(all_0_0_0, all_0_2_2) = 0
% 31.27/8.31 | (190) setIn(all_0_7_7, pids) = 0 & setIn(all_0_9_9, pids) = 0
% 31.27/8.31 |
% 31.27/8.31 +-Applying beta-rule and splitting (172), into two cases.
% 31.27/8.31 |-Branch one:
% 31.27/8.31 | (187) ~ (elem(all_0_0_0, all_0_2_2) = 0)
% 31.27/8.31 |
% 31.27/8.31 | Using (186) and (187) yields:
% 31.27/8.31 | (188) $false
% 31.27/8.31 |
% 31.27/8.31 |-The branch is then unsatisfiable
% 31.27/8.31 |-Branch two:
% 31.27/8.31 | (186) elem(all_0_0_0, all_0_2_2) = 0
% 31.27/8.31 | (194) ? [v0] : ? [v1] : ? [v2] : ( ~ (v2 = 0) & leq(v0, v1) = v2 & host(all_0_7_7) = v1 & host(all_0_9_9) = v0)
% 31.27/8.31 |
% 31.27/8.31 | Instantiating (194) with all_53_0_26, all_53_1_27, all_53_2_28 yields:
% 31.27/8.31 | (195) ~ (all_53_0_26 = 0) & leq(all_53_2_28, all_53_1_27) = all_53_0_26 & host(all_0_7_7) = all_53_1_27 & host(all_0_9_9) = all_53_2_28
% 31.27/8.31 |
% 31.27/8.31 | Applying alpha-rule on (195) yields:
% 31.27/8.31 | (196) ~ (all_53_0_26 = 0)
% 31.27/8.31 | (197) leq(all_53_2_28, all_53_1_27) = all_53_0_26
% 31.27/8.31 | (198) host(all_0_7_7) = all_53_1_27
% 31.27/8.31 | (199) host(all_0_9_9) = all_53_2_28
% 31.27/8.31 |
% 31.27/8.31 +-Applying beta-rule and splitting (165), into two cases.
% 31.27/8.31 |-Branch one:
% 31.27/8.31 | (200) ~ (leq(nbr_proc, nbr_proc) = 0)
% 31.27/8.31 |
% 31.27/8.31 | Using (183) and (200) yields:
% 31.27/8.31 | (188) $false
% 31.27/8.31 |
% 31.27/8.31 |-The branch is then unsatisfiable
% 31.27/8.31 |-Branch two:
% 31.27/8.31 | (183) leq(nbr_proc, nbr_proc) = 0
% 31.27/8.31 | (203) ~ (s(all_0_5_5) = nbr_proc) | leq(all_0_5_5, all_0_5_5) = 0
% 31.27/8.31 |
% 31.27/8.31 +-Applying beta-rule and splitting (176), into two cases.
% 31.27/8.31 |-Branch one:
% 31.27/8.31 | (204) elem(all_0_3_3, all_0_2_2) = 0
% 31.27/8.31 |
% 31.27/8.31 +-Applying beta-rule and splitting (203), into two cases.
% 31.27/8.31 |-Branch one:
% 31.27/8.31 | (205) leq(all_0_5_5, all_0_5_5) = 0
% 31.27/8.31 |
% 31.29/8.31 +-Applying beta-rule and splitting (175), into two cases.
% 31.29/8.31 |-Branch one:
% 31.29/8.31 | (206) ~ (elem(all_0_3_3, all_0_2_2) = 0)
% 31.29/8.31 |
% 31.29/8.31 | Using (204) and (206) yields:
% 31.29/8.31 | (188) $false
% 31.29/8.31 |
% 31.29/8.31 |-The branch is then unsatisfiable
% 31.29/8.31 |-Branch two:
% 31.29/8.31 | (204) elem(all_0_3_3, all_0_2_2) = 0
% 31.29/8.31 | (209) ? [v0] : ( ~ (v0 = all_0_14_14) & host(all_0_8_8) = v0)
% 31.29/8.31 |
% 31.29/8.31 | Instantiating (209) with all_71_0_29 yields:
% 31.29/8.31 | (210) ~ (all_71_0_29 = all_0_14_14) & host(all_0_8_8) = all_71_0_29
% 31.29/8.31 |
% 31.29/8.31 | Applying alpha-rule on (210) yields:
% 31.29/8.31 | (211) ~ (all_71_0_29 = all_0_14_14)
% 31.29/8.31 | (212) host(all_0_8_8) = all_71_0_29
% 31.29/8.31 |
% 31.29/8.31 +-Applying beta-rule and splitting (166), into two cases.
% 31.29/8.31 |-Branch one:
% 31.29/8.31 | (213) ~ (s(all_0_5_5) = nbr_proc)
% 31.29/8.31 |
% 31.29/8.31 | Using (184) and (213) yields:
% 31.29/8.31 | (188) $false
% 31.29/8.31 |
% 31.29/8.31 |-The branch is then unsatisfiable
% 31.29/8.31 |-Branch two:
% 31.29/8.31 | (184) s(all_0_5_5) = nbr_proc
% 31.29/8.31 | (216) all_0_15_15 = 0 | ? [v0] : ( ~ (v0 = 0) & leq(all_0_5_5, zero) = v0)
% 31.29/8.31 |
% 31.29/8.31 | Instantiating formula (139) with all_0_5_5, nbr_proc, all_21_0_21 and discharging atoms s(all_0_5_5) = all_21_0_21, s(all_0_5_5) = nbr_proc, yields:
% 31.29/8.31 | (217) all_21_0_21 = nbr_proc
% 31.29/8.31 |
% 31.29/8.31 | Instantiating formula (28) with all_53_1_27, all_0_14_14, all_0_7_7 and discharging atoms host(all_0_7_7) = all_53_1_27, host(all_0_7_7) = all_0_14_14, yields:
% 31.29/8.31 | (218) all_53_1_27 = all_0_14_14
% 31.29/8.31 |
% 31.29/8.31 | Instantiating formula (28) with nbr_proc, all_71_0_29, all_0_8_8 and discharging atoms host(all_0_8_8) = all_71_0_29, host(all_0_8_8) = nbr_proc, yields:
% 31.29/8.31 | (219) all_71_0_29 = nbr_proc
% 31.29/8.31 |
% 31.29/8.31 | Instantiating formula (28) with all_53_2_28, all_0_5_5, all_0_9_9 and discharging atoms host(all_0_9_9) = all_53_2_28, host(all_0_9_9) = all_0_5_5, yields:
% 31.29/8.31 | (220) all_53_2_28 = all_0_5_5
% 31.29/8.31 |
% 31.29/8.31 | Equations (217) can reduce 180 to:
% 31.29/8.31 | (221) ~ (all_0_5_5 = nbr_proc)
% 31.29/8.32 |
% 31.29/8.32 | Simplifying 221 yields:
% 31.29/8.32 | (222) ~ (all_0_5_5 = nbr_proc)
% 31.29/8.32 |
% 31.29/8.32 | From (220)(218) and (197) follows:
% 31.29/8.32 | (223) leq(all_0_5_5, all_0_14_14) = all_53_0_26
% 31.29/8.32 |
% 31.29/8.32 | From (217) and (181) follows:
% 31.29/8.32 | (184) s(all_0_5_5) = nbr_proc
% 31.29/8.32 |
% 31.29/8.32 | From (218) and (198) follows:
% 31.29/8.32 | (49) host(all_0_7_7) = all_0_14_14
% 31.29/8.32 |
% 31.29/8.32 | From (219) and (212) follows:
% 31.29/8.32 | (185) host(all_0_8_8) = nbr_proc
% 31.29/8.32 |
% 31.29/8.32 | From (220) and (199) follows:
% 31.29/8.32 | (46) host(all_0_9_9) = all_0_5_5
% 31.29/8.32 |
% 31.29/8.32 | Instantiating formula (152) with all_0_5_5, all_0_5_5, all_0_14_14, all_0_14_14, all_0_7_7, all_0_7_7 and discharging atoms index(pendack, all_0_14_14) = all_0_5_5, leq(all_0_5_5, all_0_5_5) = 0, host(all_0_7_7) = all_0_14_14, yields:
% 31.29/8.32 | (228) ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : (index(status, all_0_14_14) = v4 & index(status, all_0_14_14) = v3 & leq(all_0_14_14, all_0_14_14) = v0 & setIn(all_0_7_7, alive) = v2 & setIn(all_0_7_7, alive) = v1 & ( ~ (v4 = elec_2) | ~ (v3 = elec_2) | ~ (v2 = 0) | ~ (v1 = 0) | v0 = 0))
% 31.29/8.32 |
% 31.29/8.32 | Instantiating formula (60) with all_53_0_26, all_0_14_14, all_0_20_20, all_0_5_5 and discharging atoms leq(all_0_5_5, all_0_14_14) = all_53_0_26, s(all_0_20_20) = all_0_14_14, yields:
% 31.29/8.32 | (229) all_53_0_26 = 0 | ? [v0] : ( ~ (v0 = 0) & leq(all_0_5_5, all_0_20_20) = v0)
% 31.29/8.32 |
% 31.29/8.32 | Instantiating formula (144) with nbr_proc, all_0_5_5 and discharging atoms leq(all_0_5_5, nbr_proc) = 0, yields:
% 31.29/8.32 | (230) all_0_5_5 = nbr_proc | ? [v0] : ( ~ (v0 = 0) & leq(nbr_proc, all_0_5_5) = v0)
% 31.29/8.32 |
% 31.29/8.32 | Instantiating formula (144) with all_0_11_11, all_0_20_20 and discharging atoms leq(all_0_20_20, all_0_11_11) = 0, yields:
% 31.29/8.32 | (231) all_0_11_11 = all_0_20_20 | ? [v0] : ( ~ (v0 = 0) & leq(all_0_11_11, all_0_20_20) = v0)
% 31.29/8.32 |
% 31.29/8.32 | Instantiating formula (144) with all_0_14_14, all_0_20_20 and discharging atoms leq(all_0_20_20, all_0_14_14) = 0, yields:
% 31.29/8.32 | (232) all_0_14_14 = all_0_20_20 | ? [v0] : ( ~ (v0 = 0) & leq(all_0_14_14, all_0_20_20) = v0)
% 31.29/8.32 |
% 31.29/8.32 | Instantiating formula (58) with all_0_0_0, all_0_2_2, all_0_14_14, all_0_3_3, all_0_7_7, all_0_8_8, all_0_9_9, all_0_7_7 and discharging atoms m_Down(all_0_8_8) = all_0_3_3, m_Ack(all_0_7_7, all_0_9_9) = all_0_0_0, host(all_0_7_7) = all_0_14_14, queue(all_0_14_14) = all_0_2_2, elem(all_0_0_0, all_0_2_2) = 0, elem(all_0_3_3, all_0_2_2) = 0, yields:
% 31.29/8.32 | (233) ~ (setIn(all_0_7_7, alive) = 0) | ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ? [v8] : ? [v9] : (index(ldr, v7) = v8 & index(status, v7) = v9 & index(status, all_0_14_14) = v4 & index(pendack, all_0_14_14) = v1 & leq(nbr_proc, v2) = v3 & s(v1) = v2 & host(all_0_7_7) = v7 & host(all_0_8_8) = v6 & host(all_0_9_9) = v5 & setIn(all_0_7_7, alive) = v0 & ( ~ (v9 = norm) | ~ (v8 = v7) | ~ (v6 = v2) | ~ (v5 = v1) | ~ (v4 = elec_2) | ~ (v3 = 0) | ~ (v0 = 0)))
% 31.29/8.32 |
% 31.29/8.32 | Instantiating formula (64) with all_0_2_2, all_0_14_14, all_0_3_3, all_0_7_7, all_0_8_8, all_0_7_7 and discharging atoms m_Down(all_0_8_8) = all_0_3_3, host(all_0_7_7) = all_0_14_14, queue(all_0_14_14) = all_0_2_2, elem(all_0_3_3, all_0_2_2) = 0, yields:
% 31.29/8.32 | (234) ~ (setIn(all_0_7_7, alive) = 0) | ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : (index(ldr, v2) = v3 & index(status, v2) = v4 & host(all_0_7_7) = v2 & host(all_0_8_8) = v1 & setIn(all_0_7_7, alive) = v0 & ( ~ (v4 = norm) | ~ (v3 = v1) | ~ (v2 = v1) | ~ (v0 = 0)))
% 31.29/8.32 |
% 31.29/8.32 | Instantiating (228) with all_112_0_31, all_112_1_32, all_112_2_33, all_112_3_34, all_112_4_35 yields:
% 31.29/8.32 | (235) index(status, all_0_14_14) = all_112_0_31 & index(status, all_0_14_14) = all_112_1_32 & leq(all_0_14_14, all_0_14_14) = all_112_4_35 & setIn(all_0_7_7, alive) = all_112_2_33 & setIn(all_0_7_7, alive) = all_112_3_34 & ( ~ (all_112_0_31 = elec_2) | ~ (all_112_1_32 = elec_2) | ~ (all_112_2_33 = 0) | ~ (all_112_3_34 = 0) | all_112_4_35 = 0)
% 31.29/8.32 |
% 31.29/8.32 | Applying alpha-rule on (235) yields:
% 31.29/8.32 | (236) index(status, all_0_14_14) = all_112_0_31
% 31.29/8.32 | (237) ~ (all_112_0_31 = elec_2) | ~ (all_112_1_32 = elec_2) | ~ (all_112_2_33 = 0) | ~ (all_112_3_34 = 0) | all_112_4_35 = 0
% 31.29/8.32 | (238) leq(all_0_14_14, all_0_14_14) = all_112_4_35
% 31.29/8.32 | (239) setIn(all_0_7_7, alive) = all_112_3_34
% 31.29/8.32 | (240) index(status, all_0_14_14) = all_112_1_32
% 31.29/8.32 | (241) setIn(all_0_7_7, alive) = all_112_2_33
% 31.29/8.32 |
% 31.29/8.32 +-Applying beta-rule and splitting (229), into two cases.
% 31.29/8.32 |-Branch one:
% 31.29/8.32 | (242) all_53_0_26 = 0
% 31.29/8.32 |
% 31.29/8.32 | Equations (242) can reduce 196 to:
% 31.29/8.32 | (243) $false
% 31.29/8.32 |
% 31.29/8.32 |-The branch is then unsatisfiable
% 31.29/8.32 |-Branch two:
% 31.29/8.32 | (196) ~ (all_53_0_26 = 0)
% 31.29/8.32 | (245) ? [v0] : ( ~ (v0 = 0) & leq(all_0_5_5, all_0_20_20) = v0)
% 31.29/8.32 |
% 31.29/8.32 | Instantiating (245) with all_133_0_41 yields:
% 31.29/8.32 | (246) ~ (all_133_0_41 = 0) & leq(all_0_5_5, all_0_20_20) = all_133_0_41
% 31.29/8.32 |
% 31.29/8.32 | Applying alpha-rule on (246) yields:
% 31.29/8.32 | (247) ~ (all_133_0_41 = 0)
% 31.29/8.32 | (248) leq(all_0_5_5, all_0_20_20) = all_133_0_41
% 31.29/8.32 |
% 31.29/8.32 +-Applying beta-rule and splitting (232), into two cases.
% 31.29/8.32 |-Branch one:
% 31.29/8.32 | (249) all_0_14_14 = all_0_20_20
% 31.29/8.32 |
% 31.29/8.32 | Equations (249) can reduce 67 to:
% 31.29/8.32 | (243) $false
% 31.29/8.32 |
% 31.29/8.32 |-The branch is then unsatisfiable
% 31.29/8.32 |-Branch two:
% 31.29/8.32 | (67) ~ (all_0_14_14 = all_0_20_20)
% 31.29/8.32 | (252) ? [v0] : ( ~ (v0 = 0) & leq(all_0_14_14, all_0_20_20) = v0)
% 31.29/8.32 |
% 31.29/8.32 +-Applying beta-rule and splitting (230), into two cases.
% 31.29/8.32 |-Branch one:
% 31.29/8.32 | (253) all_0_5_5 = nbr_proc
% 31.29/8.32 |
% 31.29/8.32 | Equations (253) can reduce 222 to:
% 31.29/8.32 | (243) $false
% 31.29/8.32 |
% 31.29/8.32 |-The branch is then unsatisfiable
% 31.29/8.32 |-Branch two:
% 31.29/8.32 | (222) ~ (all_0_5_5 = nbr_proc)
% 31.29/8.32 | (256) ? [v0] : ( ~ (v0 = 0) & leq(nbr_proc, all_0_5_5) = v0)
% 31.29/8.32 |
% 31.29/8.32 | Instantiating (256) with all_152_0_44 yields:
% 31.29/8.32 | (257) ~ (all_152_0_44 = 0) & leq(nbr_proc, all_0_5_5) = all_152_0_44
% 31.29/8.32 |
% 31.29/8.32 | Applying alpha-rule on (257) yields:
% 31.29/8.32 | (258) ~ (all_152_0_44 = 0)
% 31.29/8.32 | (259) leq(nbr_proc, all_0_5_5) = all_152_0_44
% 31.29/8.32 |
% 31.29/8.32 +-Applying beta-rule and splitting (231), into two cases.
% 31.29/8.32 |-Branch one:
% 31.29/8.32 | (260) all_0_11_11 = all_0_20_20
% 31.29/8.32 |
% 31.29/8.32 | Equations (260) can reduce 95 to:
% 31.29/8.32 | (243) $false
% 31.29/8.32 |
% 31.29/8.32 |-The branch is then unsatisfiable
% 31.29/8.32 |-Branch two:
% 31.29/8.32 | (95) ~ (all_0_11_11 = all_0_20_20)
% 31.29/8.32 | (263) ? [v0] : ( ~ (v0 = 0) & leq(all_0_11_11, all_0_20_20) = v0)
% 31.29/8.32 |
% 31.29/8.32 | Instantiating formula (86) with status, all_0_14_14, all_112_0_31, elec_2 and discharging atoms index(status, all_0_14_14) = all_112_0_31, index(status, all_0_14_14) = elec_2, yields:
% 31.29/8.32 | (264) all_112_0_31 = elec_2
% 31.29/8.32 |
% 31.29/8.32 | Instantiating formula (86) with status, all_0_14_14, all_112_1_32, all_112_0_31 and discharging atoms index(status, all_0_14_14) = all_112_0_31, index(status, all_0_14_14) = all_112_1_32, yields:
% 31.29/8.32 | (265) all_112_0_31 = all_112_1_32
% 31.29/8.32 |
% 31.29/8.32 | Instantiating formula (99) with all_0_7_7, alive, all_112_2_33, all_0_6_6 and discharging atoms setIn(all_0_7_7, alive) = all_112_2_33, setIn(all_0_7_7, alive) = all_0_6_6, yields:
% 31.29/8.32 | (266) all_112_2_33 = all_0_6_6
% 31.29/8.32 |
% 31.29/8.32 | Instantiating formula (99) with all_0_7_7, alive, all_112_3_34, all_112_2_33 and discharging atoms setIn(all_0_7_7, alive) = all_112_2_33, setIn(all_0_7_7, alive) = all_112_3_34, yields:
% 31.29/8.32 | (267) all_112_2_33 = all_112_3_34
% 31.29/8.32 |
% 31.29/8.32 | Combining equations (264,265) yields a new equation:
% 31.29/8.32 | (268) all_112_1_32 = elec_2
% 31.29/8.32 |
% 31.29/8.32 | Combining equations (267,266) yields a new equation:
% 31.29/8.32 | (269) all_112_3_34 = all_0_6_6
% 31.29/8.32 |
% 31.29/8.32 | Simplifying 269 yields:
% 31.29/8.32 | (270) all_112_3_34 = all_0_6_6
% 31.29/8.32 |
% 31.29/8.32 | From (268) and (240) follows:
% 31.29/8.32 | (138) index(status, all_0_14_14) = elec_2
% 31.29/8.32 |
% 31.29/8.32 | From (270) and (239) follows:
% 31.29/8.32 | (11) setIn(all_0_7_7, alive) = all_0_6_6
% 31.29/8.32 |
% 31.29/8.32 +-Applying beta-rule and splitting (160), into two cases.
% 31.29/8.32 |-Branch one:
% 31.29/8.32 | (273) ~ (host(all_0_18_18) = all_0_11_11)
% 31.29/8.32 |
% 31.29/8.32 | Using (89) and (273) yields:
% 31.29/8.32 | (274) ~ (all_0_12_12 = all_0_18_18)
% 31.29/8.32 |
% 31.29/8.32 +-Applying beta-rule and splitting (56), into two cases.
% 31.29/8.32 |-Branch one:
% 31.29/8.32 | (275) all_0_10_10 = 0
% 31.29/8.32 |
% 31.29/8.32 | From (275) and (131) follows:
% 31.29/8.32 | (276) setIn(all_0_12_12, alive) = 0
% 31.29/8.32 |
% 31.29/8.32 +-Applying beta-rule and splitting (178), into two cases.
% 31.29/8.32 |-Branch one:
% 31.29/8.32 | (277) ~ (setIn(all_0_12_12, alive) = 0)
% 31.29/8.32 |
% 31.29/8.32 | Using (276) and (277) yields:
% 31.29/8.32 | (188) $false
% 31.29/8.32 |
% 31.29/8.32 |-The branch is then unsatisfiable
% 31.29/8.32 |-Branch two:
% 31.29/8.32 | (276) setIn(all_0_12_12, alive) = 0
% 31.29/8.32 | (280) ? [v0] : ? [v1] : ? [v2] : (index(elid, v0) = v2 & index(status, v0) = v1 & host(all_0_12_12) = v0 & (v2 = all_0_12_12 | ( ~ (v1 = elec_1) & ~ (v1 = elec_2))))
% 31.29/8.32 |
% 31.29/8.32 | Instantiating (280) with all_232_0_46, all_232_1_47, all_232_2_48 yields:
% 31.29/8.32 | (281) index(elid, all_232_2_48) = all_232_0_46 & index(status, all_232_2_48) = all_232_1_47 & host(all_0_12_12) = all_232_2_48 & (all_232_0_46 = all_0_12_12 | ( ~ (all_232_1_47 = elec_1) & ~ (all_232_1_47 = elec_2)))
% 31.29/8.32 |
% 31.29/8.32 | Applying alpha-rule on (281) yields:
% 31.29/8.32 | (282) index(elid, all_232_2_48) = all_232_0_46
% 31.29/8.32 | (283) index(status, all_232_2_48) = all_232_1_47
% 31.29/8.32 | (284) host(all_0_12_12) = all_232_2_48
% 31.29/8.32 | (285) all_232_0_46 = all_0_12_12 | ( ~ (all_232_1_47 = elec_1) & ~ (all_232_1_47 = elec_2))
% 31.29/8.32 |
% 31.29/8.32 | Instantiating formula (86) with status, all_0_11_11, all_232_1_47, norm and discharging atoms index(status, all_0_11_11) = norm, yields:
% 31.29/8.32 | (286) all_232_1_47 = norm | ~ (index(status, all_0_11_11) = all_232_1_47)
% 31.29/8.32 |
% 31.29/8.32 | Instantiating formula (28) with all_232_2_48, all_0_11_11, all_0_12_12 and discharging atoms host(all_0_12_12) = all_232_2_48, host(all_0_12_12) = all_0_11_11, yields:
% 31.29/8.32 | (287) all_232_2_48 = all_0_11_11
% 31.29/8.32 |
% 31.29/8.32 | From (287) and (283) follows:
% 31.29/8.32 | (288) index(status, all_0_11_11) = all_232_1_47
% 31.29/8.32 |
% 31.29/8.32 | From (287) and (284) follows:
% 31.29/8.32 | (89) host(all_0_12_12) = all_0_11_11
% 31.29/8.32 |
% 31.29/8.32 +-Applying beta-rule and splitting (286), into two cases.
% 31.29/8.32 |-Branch one:
% 31.29/8.32 | (290) ~ (index(status, all_0_11_11) = all_232_1_47)
% 31.29/8.33 |
% 31.29/8.33 | Using (288) and (290) yields:
% 31.29/8.33 | (188) $false
% 31.29/8.33 |
% 31.29/8.33 |-The branch is then unsatisfiable
% 31.29/8.33 |-Branch two:
% 31.29/8.33 | (288) index(status, all_0_11_11) = all_232_1_47
% 31.29/8.33 | (293) all_232_1_47 = norm
% 31.29/8.33 |
% 31.29/8.33 | From (293) and (288) follows:
% 31.29/8.33 | (136) index(status, all_0_11_11) = norm
% 31.29/8.33 |
% 31.29/8.33 +-Applying beta-rule and splitting (159), into two cases.
% 31.29/8.33 |-Branch one:
% 31.29/8.33 | (295) ~ (host(all_0_18_18) = all_0_14_14)
% 31.29/8.33 |
% 31.29/8.33 | Using (49) and (295) yields:
% 31.29/8.33 | (296) ~ (all_0_7_7 = all_0_18_18)
% 31.29/8.33 |
% 31.29/8.33 +-Applying beta-rule and splitting (61), into two cases.
% 31.29/8.33 |-Branch one:
% 31.29/8.33 | (297) all_0_6_6 = 0
% 31.29/8.33 |
% 31.29/8.33 | From (297) and (11) follows:
% 31.29/8.33 | (298) setIn(all_0_7_7, alive) = 0
% 31.29/8.33 |
% 31.29/8.33 +-Applying beta-rule and splitting (177), into two cases.
% 31.29/8.33 |-Branch one:
% 31.29/8.33 | (299) ~ (setIn(all_0_7_7, alive) = 0)
% 31.29/8.33 |
% 31.29/8.33 | Using (298) and (299) yields:
% 31.29/8.33 | (188) $false
% 31.29/8.33 |
% 31.29/8.33 |-The branch is then unsatisfiable
% 31.29/8.33 |-Branch two:
% 31.29/8.33 | (298) setIn(all_0_7_7, alive) = 0
% 31.29/8.33 | (302) ? [v0] : ? [v1] : ? [v2] : (index(elid, v0) = v2 & index(status, v0) = v1 & host(all_0_7_7) = v0 & (v2 = all_0_7_7 | ( ~ (v1 = elec_1) & ~ (v1 = elec_2))))
% 31.29/8.33 |
% 31.29/8.33 | Instantiating (302) with all_314_0_50, all_314_1_51, all_314_2_52 yields:
% 31.29/8.33 | (303) index(elid, all_314_2_52) = all_314_0_50 & index(status, all_314_2_52) = all_314_1_51 & host(all_0_7_7) = all_314_2_52 & (all_314_0_50 = all_0_7_7 | ( ~ (all_314_1_51 = elec_1) & ~ (all_314_1_51 = elec_2)))
% 31.29/8.33 |
% 31.29/8.33 | Applying alpha-rule on (303) yields:
% 31.29/8.33 | (304) index(elid, all_314_2_52) = all_314_0_50
% 31.29/8.33 | (305) index(status, all_314_2_52) = all_314_1_51
% 31.29/8.33 | (306) host(all_0_7_7) = all_314_2_52
% 31.29/8.33 | (307) all_314_0_50 = all_0_7_7 | ( ~ (all_314_1_51 = elec_1) & ~ (all_314_1_51 = elec_2))
% 31.29/8.33 |
% 31.29/8.33 +-Applying beta-rule and splitting (233), into two cases.
% 31.29/8.33 |-Branch one:
% 31.29/8.33 | (299) ~ (setIn(all_0_7_7, alive) = 0)
% 31.29/8.33 |
% 31.29/8.33 | Using (298) and (299) yields:
% 31.29/8.33 | (188) $false
% 31.29/8.33 |
% 31.29/8.33 |-The branch is then unsatisfiable
% 31.29/8.33 |-Branch two:
% 31.29/8.33 | (298) setIn(all_0_7_7, alive) = 0
% 31.29/8.33 | (311) ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ? [v8] : ? [v9] : (index(ldr, v7) = v8 & index(status, v7) = v9 & index(status, all_0_14_14) = v4 & index(pendack, all_0_14_14) = v1 & leq(nbr_proc, v2) = v3 & s(v1) = v2 & host(all_0_7_7) = v7 & host(all_0_8_8) = v6 & host(all_0_9_9) = v5 & setIn(all_0_7_7, alive) = v0 & ( ~ (v9 = norm) | ~ (v8 = v7) | ~ (v6 = v2) | ~ (v5 = v1) | ~ (v4 = elec_2) | ~ (v3 = 0) | ~ (v0 = 0)))
% 31.29/8.33 |
% 31.29/8.33 | Instantiating (311) with all_319_0_53, all_319_1_54, all_319_2_55, all_319_3_56, all_319_4_57, all_319_5_58, all_319_6_59, all_319_7_60, all_319_8_61, all_319_9_62 yields:
% 31.29/8.33 | (312) index(ldr, all_319_2_55) = all_319_1_54 & index(status, all_319_2_55) = all_319_0_53 & index(status, all_0_14_14) = all_319_5_58 & index(pendack, all_0_14_14) = all_319_8_61 & leq(nbr_proc, all_319_7_60) = all_319_6_59 & s(all_319_8_61) = all_319_7_60 & host(all_0_7_7) = all_319_2_55 & host(all_0_8_8) = all_319_3_56 & host(all_0_9_9) = all_319_4_57 & setIn(all_0_7_7, alive) = all_319_9_62 & ( ~ (all_319_0_53 = norm) | ~ (all_319_1_54 = all_319_2_55) | ~ (all_319_3_56 = all_319_7_60) | ~ (all_319_4_57 = all_319_8_61) | ~ (all_319_5_58 = elec_2) | ~ (all_319_6_59 = 0) | ~ (all_319_9_62 = 0))
% 31.29/8.33 |
% 31.29/8.33 | Applying alpha-rule on (312) yields:
% 31.29/8.33 | (313) host(all_0_8_8) = all_319_3_56
% 31.29/8.33 | (314) s(all_319_8_61) = all_319_7_60
% 31.29/8.33 | (315) index(status, all_0_14_14) = all_319_5_58
% 31.29/8.33 | (316) index(ldr, all_319_2_55) = all_319_1_54
% 31.29/8.33 | (317) host(all_0_9_9) = all_319_4_57
% 31.29/8.33 | (318) host(all_0_7_7) = all_319_2_55
% 31.29/8.33 | (319) leq(nbr_proc, all_319_7_60) = all_319_6_59
% 31.29/8.33 | (320) setIn(all_0_7_7, alive) = all_319_9_62
% 31.29/8.33 | (321) index(status, all_319_2_55) = all_319_0_53
% 31.29/8.33 | (322) index(pendack, all_0_14_14) = all_319_8_61
% 31.29/8.33 | (323) ~ (all_319_0_53 = norm) | ~ (all_319_1_54 = all_319_2_55) | ~ (all_319_3_56 = all_319_7_60) | ~ (all_319_4_57 = all_319_8_61) | ~ (all_319_5_58 = elec_2) | ~ (all_319_6_59 = 0) | ~ (all_319_9_62 = 0)
% 31.29/8.33 |
% 31.29/8.33 +-Applying beta-rule and splitting (234), into two cases.
% 31.29/8.33 |-Branch one:
% 31.29/8.33 | (299) ~ (setIn(all_0_7_7, alive) = 0)
% 31.29/8.33 |
% 31.29/8.33 | Using (298) and (299) yields:
% 31.29/8.33 | (188) $false
% 31.29/8.33 |
% 31.29/8.33 |-The branch is then unsatisfiable
% 31.29/8.33 |-Branch two:
% 31.29/8.33 | (298) setIn(all_0_7_7, alive) = 0
% 31.29/8.33 | (327) ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : (index(ldr, v2) = v3 & index(status, v2) = v4 & host(all_0_7_7) = v2 & host(all_0_8_8) = v1 & setIn(all_0_7_7, alive) = v0 & ( ~ (v4 = norm) | ~ (v3 = v1) | ~ (v2 = v1) | ~ (v0 = 0)))
% 31.29/8.33 |
% 31.29/8.33 | Instantiating (327) with all_324_0_63, all_324_1_64, all_324_2_65, all_324_3_66, all_324_4_67 yields:
% 31.29/8.33 | (328) index(ldr, all_324_2_65) = all_324_1_64 & index(status, all_324_2_65) = all_324_0_63 & host(all_0_7_7) = all_324_2_65 & host(all_0_8_8) = all_324_3_66 & setIn(all_0_7_7, alive) = all_324_4_67 & ( ~ (all_324_0_63 = norm) | ~ (all_324_1_64 = all_324_3_66) | ~ (all_324_2_65 = all_324_3_66) | ~ (all_324_4_67 = 0))
% 31.29/8.33 |
% 31.29/8.33 | Applying alpha-rule on (328) yields:
% 31.29/8.33 | (329) index(status, all_324_2_65) = all_324_0_63
% 31.29/8.33 | (330) index(ldr, all_324_2_65) = all_324_1_64
% 31.29/8.33 | (331) setIn(all_0_7_7, alive) = all_324_4_67
% 31.29/8.33 | (332) host(all_0_7_7) = all_324_2_65
% 31.29/8.33 | (333) ~ (all_324_0_63 = norm) | ~ (all_324_1_64 = all_324_3_66) | ~ (all_324_2_65 = all_324_3_66) | ~ (all_324_4_67 = 0)
% 31.29/8.33 | (334) host(all_0_8_8) = all_324_3_66
% 31.29/8.33 |
% 31.29/8.33 | Instantiating formula (86) with status, all_0_14_14, all_319_5_58, elec_2 and discharging atoms index(status, all_0_14_14) = all_319_5_58, index(status, all_0_14_14) = elec_2, yields:
% 31.29/8.33 | (335) all_319_5_58 = elec_2
% 31.29/8.33 |
% 31.29/8.33 | Instantiating formula (86) with status, all_0_14_14, all_319_5_58, all_324_0_63 and discharging atoms index(status, all_0_14_14) = all_319_5_58, yields:
% 31.29/8.33 | (336) all_324_0_63 = all_319_5_58 | ~ (index(status, all_0_14_14) = all_324_0_63)
% 31.29/8.33 |
% 31.29/8.33 | Instantiating formula (86) with pendack, all_0_14_14, all_319_8_61, all_0_5_5 and discharging atoms index(pendack, all_0_14_14) = all_319_8_61, index(pendack, all_0_14_14) = all_0_5_5, yields:
% 31.29/8.33 | (337) all_319_8_61 = all_0_5_5
% 31.29/8.33 |
% 31.29/8.33 | Instantiating formula (139) with all_0_5_5, all_319_7_60, nbr_proc and discharging atoms s(all_0_5_5) = nbr_proc, yields:
% 31.29/8.33 | (338) all_319_7_60 = nbr_proc | ~ (s(all_0_5_5) = all_319_7_60)
% 31.29/8.33 |
% 31.29/8.33 | Instantiating formula (28) with all_319_2_55, all_0_14_14, all_0_7_7 and discharging atoms host(all_0_7_7) = all_319_2_55, host(all_0_7_7) = all_0_14_14, yields:
% 31.29/8.33 | (339) all_319_2_55 = all_0_14_14
% 31.29/8.33 |
% 31.29/8.33 | Instantiating formula (28) with all_319_2_55, all_324_2_65, all_0_7_7 and discharging atoms host(all_0_7_7) = all_324_2_65, host(all_0_7_7) = all_319_2_55, yields:
% 31.29/8.33 | (340) all_324_2_65 = all_319_2_55
% 31.29/8.33 |
% 31.29/8.33 | Instantiating formula (28) with all_314_2_52, all_324_2_65, all_0_7_7 and discharging atoms host(all_0_7_7) = all_324_2_65, host(all_0_7_7) = all_314_2_52, yields:
% 31.29/8.33 | (341) all_324_2_65 = all_314_2_52
% 31.29/8.33 |
% 31.29/8.33 | Instantiating formula (28) with all_324_3_66, nbr_proc, all_0_8_8 and discharging atoms host(all_0_8_8) = all_324_3_66, host(all_0_8_8) = nbr_proc, yields:
% 31.29/8.33 | (342) all_324_3_66 = nbr_proc
% 31.29/8.33 |
% 31.29/8.33 | Instantiating formula (28) with all_319_3_56, all_324_3_66, all_0_8_8 and discharging atoms host(all_0_8_8) = all_324_3_66, host(all_0_8_8) = all_319_3_56, yields:
% 31.29/8.33 | (343) all_324_3_66 = all_319_3_56
% 31.29/8.33 |
% 31.29/8.33 | Instantiating formula (28) with all_319_4_57, all_0_5_5, all_0_9_9 and discharging atoms host(all_0_9_9) = all_319_4_57, host(all_0_9_9) = all_0_5_5, yields:
% 31.29/8.33 | (344) all_319_4_57 = all_0_5_5
% 31.29/8.33 |
% 31.29/8.33 | Instantiating formula (99) with all_0_7_7, alive, all_319_9_62, all_324_4_67 and discharging atoms setIn(all_0_7_7, alive) = all_324_4_67, setIn(all_0_7_7, alive) = all_319_9_62, yields:
% 31.29/8.33 | (345) all_324_4_67 = all_319_9_62
% 31.29/8.33 |
% 31.29/8.33 | Instantiating formula (99) with all_0_7_7, alive, 0, all_324_4_67 and discharging atoms setIn(all_0_7_7, alive) = all_324_4_67, setIn(all_0_7_7, alive) = 0, yields:
% 31.29/8.33 | (346) all_324_4_67 = 0
% 31.29/8.33 |
% 31.29/8.33 | Combining equations (340,341) yields a new equation:
% 31.29/8.33 | (347) all_319_2_55 = all_314_2_52
% 31.29/8.33 |
% 31.29/8.33 | Simplifying 347 yields:
% 31.29/8.33 | (348) all_319_2_55 = all_314_2_52
% 31.29/8.33 |
% 31.29/8.33 | Combining equations (343,342) yields a new equation:
% 31.29/8.33 | (349) all_319_3_56 = nbr_proc
% 31.29/8.33 |
% 31.29/8.33 | Simplifying 349 yields:
% 31.29/8.33 | (350) all_319_3_56 = nbr_proc
% 31.29/8.33 |
% 31.29/8.33 | Combining equations (345,346) yields a new equation:
% 31.29/8.33 | (351) all_319_9_62 = 0
% 31.29/8.33 |
% 31.29/8.33 | Simplifying 351 yields:
% 31.29/8.33 | (352) all_319_9_62 = 0
% 31.29/8.33 |
% 31.29/8.33 | Combining equations (339,348) yields a new equation:
% 31.29/8.33 | (353) all_314_2_52 = all_0_14_14
% 31.29/8.33 |
% 31.29/8.33 | Combining equations (353,341) yields a new equation:
% 31.29/8.33 | (354) all_324_2_65 = all_0_14_14
% 31.29/8.33 |
% 31.29/8.33 | From (354) and (329) follows:
% 31.29/8.33 | (355) index(status, all_0_14_14) = all_324_0_63
% 31.29/8.33 |
% 31.29/8.33 | From (337) and (322) follows:
% 31.29/8.33 | (39) index(pendack, all_0_14_14) = all_0_5_5
% 31.29/8.33 |
% 31.29/8.33 | From (337) and (314) follows:
% 31.29/8.33 | (357) s(all_0_5_5) = all_319_7_60
% 31.29/8.33 |
% 31.29/8.33 | From (353) and (306) follows:
% 31.29/8.33 | (49) host(all_0_7_7) = all_0_14_14
% 31.29/8.33 |
% 31.29/8.33 | From (350) and (313) follows:
% 31.29/8.33 | (185) host(all_0_8_8) = nbr_proc
% 31.29/8.33 |
% 31.29/8.33 | From (344) and (317) follows:
% 31.29/8.33 | (46) host(all_0_9_9) = all_0_5_5
% 31.29/8.33 |
% 31.29/8.33 | From (352) and (320) follows:
% 31.29/8.33 | (298) setIn(all_0_7_7, alive) = 0
% 31.29/8.33 |
% 31.29/8.33 +-Applying beta-rule and splitting (338), into two cases.
% 31.29/8.33 |-Branch one:
% 31.29/8.33 | (362) ~ (s(all_0_5_5) = all_319_7_60)
% 31.29/8.33 |
% 31.29/8.33 | Using (357) and (362) yields:
% 31.29/8.33 | (188) $false
% 31.29/8.33 |
% 31.29/8.33 |-The branch is then unsatisfiable
% 31.29/8.33 |-Branch two:
% 31.29/8.33 | (357) s(all_0_5_5) = all_319_7_60
% 31.29/8.33 | (365) all_319_7_60 = nbr_proc
% 31.29/8.33 |
% 31.29/8.33 | From (365) and (357) follows:
% 31.29/8.33 | (184) s(all_0_5_5) = nbr_proc
% 31.29/8.33 |
% 31.29/8.33 +-Applying beta-rule and splitting (336), into two cases.
% 31.29/8.33 |-Branch one:
% 31.29/8.33 | (367) ~ (index(status, all_0_14_14) = all_324_0_63)
% 31.29/8.33 |
% 31.29/8.33 | Using (355) and (367) yields:
% 31.29/8.33 | (188) $false
% 31.29/8.33 |
% 31.29/8.33 |-The branch is then unsatisfiable
% 31.29/8.33 |-Branch two:
% 31.29/8.33 | (355) index(status, all_0_14_14) = all_324_0_63
% 31.29/8.33 | (370) all_324_0_63 = all_319_5_58
% 31.29/8.33 |
% 31.29/8.33 | Combining equations (335,370) yields a new equation:
% 31.29/8.33 | (371) all_324_0_63 = elec_2
% 31.29/8.33 |
% 31.29/8.33 | From (371) and (355) follows:
% 31.29/8.33 | (138) index(status, all_0_14_14) = elec_2
% 31.29/8.33 |
% 31.29/8.33 +-Applying beta-rule and splitting (161), into two cases.
% 31.29/8.33 |-Branch one:
% 31.29/8.33 | (373) ~ (setIn(all_0_12_12, alive) = all_0_6_6)
% 31.29/8.33 |
% 31.29/8.33 | From (297) and (373) follows:
% 31.29/8.33 | (277) ~ (setIn(all_0_12_12, alive) = 0)
% 31.29/8.34 |
% 31.29/8.34 | Using (276) and (277) yields:
% 31.29/8.34 | (188) $false
% 31.29/8.34 |
% 31.29/8.34 |-The branch is then unsatisfiable
% 31.29/8.34 |-Branch two:
% 31.29/8.34 | (376) setIn(all_0_12_12, alive) = all_0_6_6
% 31.29/8.34 | (377) all_0_6_6 = all_0_10_10
% 31.29/8.34 |
% 31.29/8.34 | Combining equations (297,377) yields a new equation:
% 31.29/8.34 | (275) all_0_10_10 = 0
% 31.29/8.34 |
% 31.29/8.34 | Combining equations (275,377) yields a new equation:
% 31.29/8.34 | (297) all_0_6_6 = 0
% 31.29/8.34 |
% 31.29/8.34 | From (297) and (376) follows:
% 31.29/8.34 | (276) setIn(all_0_12_12, alive) = 0
% 31.29/8.34 |
% 31.29/8.34 | Instantiating formula (98) with all_133_0_41, all_0_5_5, all_0_14_14, all_0_20_20, all_0_7_7, all_0_17_17 and discharging atoms index(pendack, all_0_14_14) = all_0_5_5, leq(all_0_5_5, all_0_20_20) = all_133_0_41, host(all_0_7_7) = all_0_14_14, host(all_0_17_17) = all_0_20_20, yields:
% 31.29/8.34 | (381) all_133_0_41 = 0 | ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : (index(status, all_0_14_14) = v4 & index(status, all_0_20_20) = v3 & leq(all_0_20_20, all_0_14_14) = v0 & setIn(all_0_7_7, alive) = v2 & setIn(all_0_17_17, alive) = v1 & ( ~ (v4 = elec_2) | ~ (v3 = elec_2) | ~ (v2 = 0) | ~ (v1 = 0) | v0 = 0))
% 31.29/8.34 |
% 31.29/8.34 | Instantiating formula (98) with all_133_0_41, all_0_5_5, all_0_14_14, all_0_20_20, all_0_7_7, all_0_18_18 and discharging atoms index(pendack, all_0_14_14) = all_0_5_5, leq(all_0_5_5, all_0_20_20) = all_133_0_41, host(all_0_7_7) = all_0_14_14, host(all_0_18_18) = all_0_20_20, yields:
% 31.29/8.34 | (382) all_133_0_41 = 0 | ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : (index(status, all_0_14_14) = v4 & index(status, all_0_20_20) = v3 & leq(all_0_20_20, all_0_14_14) = v0 & setIn(all_0_7_7, alive) = v2 & setIn(all_0_18_18, alive) = v1 & ( ~ (v4 = elec_2) | ~ (v3 = elec_2) | ~ (v2 = 0) | ~ (v1 = 0) | v0 = 0))
% 31.29/8.34 |
% 31.29/8.34 | Instantiating formula (55) with all_152_0_44, all_0_5_5, nbr_proc, all_0_14_14, all_0_7_7, all_0_8_8 and discharging atoms index(pendack, all_0_14_14) = all_0_5_5, leq(nbr_proc, all_0_5_5) = all_152_0_44, host(all_0_7_7) = all_0_14_14, host(all_0_8_8) = nbr_proc, yields:
% 31.29/8.34 | (383) all_152_0_44 = 0 | ? [v0] : ? [v1] : ? [v2] : ? [v3] : (m_Ack(all_0_7_7, all_0_8_8) = v1 & queue(all_0_14_14) = v2 & elem(v1, v2) = v3 & setIn(all_0_7_7, alive) = v0 & ( ~ (v3 = 0) | ~ (v0 = 0)))
% 31.29/8.34 |
% 31.29/8.34 | Instantiating formula (58) with all_0_0_0, all_0_2_2, all_0_14_14, all_0_3_3, all_0_7_7, all_0_8_8, all_0_9_9, all_0_12_12 and discharging atoms m_Down(all_0_8_8) = all_0_3_3, m_Ack(all_0_7_7, all_0_9_9) = all_0_0_0, host(all_0_7_7) = all_0_14_14, queue(all_0_14_14) = all_0_2_2, elem(all_0_0_0, all_0_2_2) = 0, elem(all_0_3_3, all_0_2_2) = 0, setIn(all_0_12_12, alive) = 0, yields:
% 31.29/8.34 | (384) ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ? [v8] : ? [v9] : (index(ldr, v7) = v8 & index(status, v7) = v9 & index(status, all_0_14_14) = v4 & index(pendack, all_0_14_14) = v1 & leq(nbr_proc, v2) = v3 & s(v1) = v2 & host(all_0_8_8) = v6 & host(all_0_9_9) = v5 & host(all_0_12_12) = v7 & setIn(all_0_7_7, alive) = v0 & ( ~ (v9 = norm) | ~ (v8 = v7) | ~ (v6 = v2) | ~ (v5 = v1) | ~ (v4 = elec_2) | ~ (v3 = 0) | ~ (v0 = 0)))
% 31.29/8.34 |
% 31.29/8.34 | Instantiating (384) with all_463_0_68, all_463_1_69, all_463_2_70, all_463_3_71, all_463_4_72, all_463_5_73, all_463_6_74, all_463_7_75, all_463_8_76, all_463_9_77 yields:
% 31.29/8.34 | (385) index(ldr, all_463_2_70) = all_463_1_69 & index(status, all_463_2_70) = all_463_0_68 & index(status, all_0_14_14) = all_463_5_73 & index(pendack, all_0_14_14) = all_463_8_76 & leq(nbr_proc, all_463_7_75) = all_463_6_74 & s(all_463_8_76) = all_463_7_75 & host(all_0_8_8) = all_463_3_71 & host(all_0_9_9) = all_463_4_72 & host(all_0_12_12) = all_463_2_70 & setIn(all_0_7_7, alive) = all_463_9_77 & ( ~ (all_463_0_68 = norm) | ~ (all_463_1_69 = all_463_2_70) | ~ (all_463_3_71 = all_463_7_75) | ~ (all_463_4_72 = all_463_8_76) | ~ (all_463_5_73 = elec_2) | ~ (all_463_6_74 = 0) | ~ (all_463_9_77 = 0))
% 31.29/8.34 |
% 31.29/8.34 | Applying alpha-rule on (385) yields:
% 31.29/8.34 | (386) index(status, all_463_2_70) = all_463_0_68
% 31.29/8.34 | (387) s(all_463_8_76) = all_463_7_75
% 31.29/8.34 | (388) index(ldr, all_463_2_70) = all_463_1_69
% 31.29/8.34 | (389) index(status, all_0_14_14) = all_463_5_73
% 31.29/8.34 | (390) host(all_0_8_8) = all_463_3_71
% 31.29/8.34 | (391) host(all_0_12_12) = all_463_2_70
% 31.29/8.34 | (392) host(all_0_9_9) = all_463_4_72
% 31.29/8.34 | (393) index(pendack, all_0_14_14) = all_463_8_76
% 31.29/8.34 | (394) leq(nbr_proc, all_463_7_75) = all_463_6_74
% 31.29/8.34 | (395) ~ (all_463_0_68 = norm) | ~ (all_463_1_69 = all_463_2_70) | ~ (all_463_3_71 = all_463_7_75) | ~ (all_463_4_72 = all_463_8_76) | ~ (all_463_5_73 = elec_2) | ~ (all_463_6_74 = 0) | ~ (all_463_9_77 = 0)
% 31.29/8.34 | (396) setIn(all_0_7_7, alive) = all_463_9_77
% 31.29/8.34 |
% 31.29/8.34 +-Applying beta-rule and splitting (381), into two cases.
% 31.29/8.34 |-Branch one:
% 31.29/8.34 | (397) all_133_0_41 = 0
% 31.29/8.34 |
% 31.29/8.34 | Equations (397) can reduce 247 to:
% 31.29/8.34 | (243) $false
% 31.29/8.34 |
% 31.29/8.34 |-The branch is then unsatisfiable
% 31.29/8.34 |-Branch two:
% 31.29/8.34 | (247) ~ (all_133_0_41 = 0)
% 31.29/8.34 | (400) ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : (index(status, all_0_14_14) = v4 & index(status, all_0_20_20) = v3 & leq(all_0_20_20, all_0_14_14) = v0 & setIn(all_0_7_7, alive) = v2 & setIn(all_0_17_17, alive) = v1 & ( ~ (v4 = elec_2) | ~ (v3 = elec_2) | ~ (v2 = 0) | ~ (v1 = 0) | v0 = 0))
% 31.29/8.34 |
% 31.29/8.34 | Instantiating (400) with all_473_0_97, all_473_1_98, all_473_2_99, all_473_3_100, all_473_4_101 yields:
% 31.29/8.34 | (401) index(status, all_0_14_14) = all_473_0_97 & index(status, all_0_20_20) = all_473_1_98 & leq(all_0_20_20, all_0_14_14) = all_473_4_101 & setIn(all_0_7_7, alive) = all_473_2_99 & setIn(all_0_17_17, alive) = all_473_3_100 & ( ~ (all_473_0_97 = elec_2) | ~ (all_473_1_98 = elec_2) | ~ (all_473_2_99 = 0) | ~ (all_473_3_100 = 0) | all_473_4_101 = 0)
% 31.29/8.34 |
% 31.29/8.34 | Applying alpha-rule on (401) yields:
% 31.29/8.34 | (402) leq(all_0_20_20, all_0_14_14) = all_473_4_101
% 31.29/8.34 | (403) index(status, all_0_14_14) = all_473_0_97
% 31.29/8.34 | (404) setIn(all_0_17_17, alive) = all_473_3_100
% 31.29/8.34 | (405) setIn(all_0_7_7, alive) = all_473_2_99
% 31.29/8.34 | (406) ~ (all_473_0_97 = elec_2) | ~ (all_473_1_98 = elec_2) | ~ (all_473_2_99 = 0) | ~ (all_473_3_100 = 0) | all_473_4_101 = 0
% 31.29/8.34 | (407) index(status, all_0_20_20) = all_473_1_98
% 31.29/8.34 |
% 31.29/8.34 +-Applying beta-rule and splitting (382), into two cases.
% 31.29/8.34 |-Branch one:
% 31.29/8.34 | (397) all_133_0_41 = 0
% 31.29/8.34 |
% 31.29/8.34 | Equations (397) can reduce 247 to:
% 31.29/8.34 | (243) $false
% 31.29/8.34 |
% 31.29/8.34 |-The branch is then unsatisfiable
% 31.29/8.34 |-Branch two:
% 31.29/8.34 | (247) ~ (all_133_0_41 = 0)
% 31.29/8.34 | (411) ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : (index(status, all_0_14_14) = v4 & index(status, all_0_20_20) = v3 & leq(all_0_20_20, all_0_14_14) = v0 & setIn(all_0_7_7, alive) = v2 & setIn(all_0_18_18, alive) = v1 & ( ~ (v4 = elec_2) | ~ (v3 = elec_2) | ~ (v2 = 0) | ~ (v1 = 0) | v0 = 0))
% 31.29/8.34 |
% 31.29/8.34 | Instantiating (411) with all_478_0_102, all_478_1_103, all_478_2_104, all_478_3_105, all_478_4_106 yields:
% 31.29/8.34 | (412) index(status, all_0_14_14) = all_478_0_102 & index(status, all_0_20_20) = all_478_1_103 & leq(all_0_20_20, all_0_14_14) = all_478_4_106 & setIn(all_0_7_7, alive) = all_478_2_104 & setIn(all_0_18_18, alive) = all_478_3_105 & ( ~ (all_478_0_102 = elec_2) | ~ (all_478_1_103 = elec_2) | ~ (all_478_2_104 = 0) | ~ (all_478_3_105 = 0) | all_478_4_106 = 0)
% 31.29/8.34 |
% 31.29/8.34 | Applying alpha-rule on (412) yields:
% 31.29/8.34 | (413) ~ (all_478_0_102 = elec_2) | ~ (all_478_1_103 = elec_2) | ~ (all_478_2_104 = 0) | ~ (all_478_3_105 = 0) | all_478_4_106 = 0
% 31.29/8.34 | (414) setIn(all_0_7_7, alive) = all_478_2_104
% 31.29/8.34 | (415) setIn(all_0_18_18, alive) = all_478_3_105
% 31.29/8.34 | (416) index(status, all_0_14_14) = all_478_0_102
% 31.29/8.34 | (417) index(status, all_0_20_20) = all_478_1_103
% 31.29/8.34 | (418) leq(all_0_20_20, all_0_14_14) = all_478_4_106
% 31.29/8.34 |
% 31.29/8.34 +-Applying beta-rule and splitting (383), into two cases.
% 31.29/8.34 |-Branch one:
% 31.29/8.34 | (419) all_152_0_44 = 0
% 31.29/8.34 |
% 31.29/8.34 | Equations (419) can reduce 258 to:
% 31.29/8.34 | (243) $false
% 31.29/8.34 |
% 31.29/8.34 |-The branch is then unsatisfiable
% 31.29/8.34 |-Branch two:
% 31.29/8.34 | (258) ~ (all_152_0_44 = 0)
% 31.29/8.34 | (422) ? [v0] : ? [v1] : ? [v2] : ? [v3] : (m_Ack(all_0_7_7, all_0_8_8) = v1 & queue(all_0_14_14) = v2 & elem(v1, v2) = v3 & setIn(all_0_7_7, alive) = v0 & ( ~ (v3 = 0) | ~ (v0 = 0)))
% 31.29/8.34 |
% 31.29/8.34 | Instantiating (422) with all_483_0_107, all_483_1_108, all_483_2_109, all_483_3_110 yields:
% 31.29/8.34 | (423) m_Ack(all_0_7_7, all_0_8_8) = all_483_2_109 & queue(all_0_14_14) = all_483_1_108 & elem(all_483_2_109, all_483_1_108) = all_483_0_107 & setIn(all_0_7_7, alive) = all_483_3_110 & ( ~ (all_483_0_107 = 0) | ~ (all_483_3_110 = 0))
% 31.29/8.34 |
% 31.29/8.34 | Applying alpha-rule on (423) yields:
% 31.29/8.34 | (424) ~ (all_483_0_107 = 0) | ~ (all_483_3_110 = 0)
% 31.29/8.34 | (425) elem(all_483_2_109, all_483_1_108) = all_483_0_107
% 31.29/8.34 | (426) queue(all_0_14_14) = all_483_1_108
% 31.29/8.34 | (427) setIn(all_0_7_7, alive) = all_483_3_110
% 31.29/8.34 | (428) m_Ack(all_0_7_7, all_0_8_8) = all_483_2_109
% 31.29/8.34 |
% 31.29/8.34 | Instantiating formula (86) with ldr, all_0_11_11, all_463_1_69, all_0_11_11 and discharging atoms index(ldr, all_0_11_11) = all_0_11_11, yields:
% 31.29/8.34 | (429) all_463_1_69 = all_0_11_11 | ~ (index(ldr, all_0_11_11) = all_463_1_69)
% 31.29/8.34 |
% 31.29/8.34 | Instantiating formula (86) with status, all_0_11_11, all_463_0_68, norm and discharging atoms index(status, all_0_11_11) = norm, yields:
% 31.29/8.34 | (430) all_463_0_68 = norm | ~ (index(status, all_0_11_11) = all_463_0_68)
% 31.29/8.34 |
% 31.29/8.34 | Instantiating formula (86) with status, all_0_14_14, all_478_0_102, elec_2 and discharging atoms index(status, all_0_14_14) = all_478_0_102, index(status, all_0_14_14) = elec_2, yields:
% 31.29/8.34 | (431) all_478_0_102 = elec_2
% 31.29/8.34 |
% 31.29/8.34 | Instantiating formula (86) with status, all_0_14_14, all_473_0_97, all_478_0_102 and discharging atoms index(status, all_0_14_14) = all_478_0_102, index(status, all_0_14_14) = all_473_0_97, yields:
% 31.29/8.34 | (432) all_478_0_102 = all_473_0_97
% 31.29/8.34 |
% 31.29/8.34 | Instantiating formula (86) with status, all_0_14_14, all_463_5_73, all_473_0_97 and discharging atoms index(status, all_0_14_14) = all_473_0_97, index(status, all_0_14_14) = all_463_5_73, yields:
% 31.29/8.34 | (433) all_473_0_97 = all_463_5_73
% 31.29/8.34 |
% 31.29/8.34 | Instantiating formula (86) with pendack, all_0_14_14, all_463_8_76, all_0_5_5 and discharging atoms index(pendack, all_0_14_14) = all_463_8_76, index(pendack, all_0_14_14) = all_0_5_5, yields:
% 31.29/8.34 | (434) all_463_8_76 = all_0_5_5
% 31.29/8.34 |
% 31.29/8.34 | Instantiating formula (155) with all_463_6_74, nbr_proc yields:
% 31.29/8.34 | (435) all_463_6_74 = 0 | ~ (leq(nbr_proc, nbr_proc) = all_463_6_74)
% 31.29/8.34 |
% 31.29/8.34 | Instantiating formula (139) with all_0_5_5, all_463_7_75, nbr_proc and discharging atoms s(all_0_5_5) = nbr_proc, yields:
% 31.29/8.34 | (436) all_463_7_75 = nbr_proc | ~ (s(all_0_5_5) = all_463_7_75)
% 31.29/8.34 |
% 31.29/8.34 | Instantiating formula (28) with all_463_3_71, nbr_proc, all_0_8_8 and discharging atoms host(all_0_8_8) = all_463_3_71, host(all_0_8_8) = nbr_proc, yields:
% 31.29/8.34 | (437) all_463_3_71 = nbr_proc
% 31.29/8.34 |
% 31.29/8.34 | Instantiating formula (28) with all_463_4_72, all_0_5_5, all_0_9_9 and discharging atoms host(all_0_9_9) = all_463_4_72, host(all_0_9_9) = all_0_5_5, yields:
% 31.29/8.34 | (438) all_463_4_72 = all_0_5_5
% 31.29/8.34 |
% 31.29/8.34 | Instantiating formula (28) with all_463_2_70, all_0_11_11, all_0_12_12 and discharging atoms host(all_0_12_12) = all_463_2_70, host(all_0_12_12) = all_0_11_11, yields:
% 31.29/8.34 | (439) all_463_2_70 = all_0_11_11
% 31.29/8.34 |
% 31.29/8.34 | Instantiating formula (99) with all_0_7_7, alive, all_483_3_110, 0 and discharging atoms setIn(all_0_7_7, alive) = all_483_3_110, setIn(all_0_7_7, alive) = 0, yields:
% 31.29/8.34 | (440) all_483_3_110 = 0
% 31.29/8.34 |
% 31.29/8.34 | Instantiating formula (99) with all_0_7_7, alive, all_478_2_104, all_483_3_110 and discharging atoms setIn(all_0_7_7, alive) = all_483_3_110, setIn(all_0_7_7, alive) = all_478_2_104, yields:
% 31.29/8.34 | (441) all_483_3_110 = all_478_2_104
% 31.29/8.34 |
% 31.29/8.34 | Instantiating formula (99) with all_0_7_7, alive, all_473_2_99, all_478_2_104 and discharging atoms setIn(all_0_7_7, alive) = all_478_2_104, setIn(all_0_7_7, alive) = all_473_2_99, yields:
% 31.29/8.34 | (442) all_478_2_104 = all_473_2_99
% 31.29/8.34 |
% 31.29/8.34 | Instantiating formula (99) with all_0_7_7, alive, all_463_9_77, all_478_2_104 and discharging atoms setIn(all_0_7_7, alive) = all_478_2_104, setIn(all_0_7_7, alive) = all_463_9_77, yields:
% 31.29/8.35 | (443) all_478_2_104 = all_463_9_77
% 31.29/8.35 |
% 31.29/8.35 | Combining equations (441,440) yields a new equation:
% 31.29/8.35 | (444) all_478_2_104 = 0
% 31.29/8.35 |
% 31.29/8.35 | Simplifying 444 yields:
% 31.29/8.35 | (445) all_478_2_104 = 0
% 31.29/8.35 |
% 31.29/8.35 | Combining equations (432,431) yields a new equation:
% 31.29/8.35 | (446) all_473_0_97 = elec_2
% 31.29/8.35 |
% 31.29/8.35 | Simplifying 446 yields:
% 31.29/8.35 | (447) all_473_0_97 = elec_2
% 31.29/8.35 |
% 31.29/8.35 | Combining equations (443,442) yields a new equation:
% 31.29/8.35 | (448) all_473_2_99 = all_463_9_77
% 31.29/8.35 |
% 31.29/8.35 | Combining equations (445,442) yields a new equation:
% 31.29/8.35 | (449) all_473_2_99 = 0
% 31.29/8.35 |
% 31.29/8.35 | Combining equations (433,447) yields a new equation:
% 31.29/8.35 | (450) all_463_5_73 = elec_2
% 31.29/8.35 |
% 31.29/8.35 | Simplifying 450 yields:
% 31.29/8.35 | (451) all_463_5_73 = elec_2
% 31.29/8.35 |
% 31.29/8.35 | Combining equations (448,449) yields a new equation:
% 31.29/8.35 | (452) all_463_9_77 = 0
% 31.29/8.35 |
% 31.29/8.35 | Simplifying 452 yields:
% 31.29/8.35 | (453) all_463_9_77 = 0
% 31.29/8.35 |
% 31.29/8.35 | From (439) and (388) follows:
% 31.29/8.35 | (454) index(ldr, all_0_11_11) = all_463_1_69
% 31.29/8.35 |
% 31.29/8.35 | From (439) and (386) follows:
% 31.29/8.35 | (455) index(status, all_0_11_11) = all_463_0_68
% 31.29/8.35 |
% 31.29/8.35 | From (434) and (387) follows:
% 31.29/8.35 | (456) s(all_0_5_5) = all_463_7_75
% 31.29/8.35 |
% 31.29/8.35 +-Applying beta-rule and splitting (436), into two cases.
% 31.29/8.35 |-Branch one:
% 31.29/8.35 | (457) ~ (s(all_0_5_5) = all_463_7_75)
% 31.29/8.35 |
% 31.29/8.35 | Using (456) and (457) yields:
% 31.29/8.35 | (188) $false
% 31.29/8.35 |
% 31.29/8.35 |-The branch is then unsatisfiable
% 31.29/8.35 |-Branch two:
% 31.29/8.35 | (456) s(all_0_5_5) = all_463_7_75
% 31.29/8.35 | (460) all_463_7_75 = nbr_proc
% 31.29/8.35 |
% 31.29/8.35 | From (460) and (394) follows:
% 31.29/8.35 | (461) leq(nbr_proc, nbr_proc) = all_463_6_74
% 31.29/8.35 |
% 31.29/8.35 +-Applying beta-rule and splitting (430), into two cases.
% 31.29/8.35 |-Branch one:
% 31.29/8.35 | (462) ~ (index(status, all_0_11_11) = all_463_0_68)
% 31.29/8.35 |
% 31.29/8.35 | Using (455) and (462) yields:
% 31.29/8.35 | (188) $false
% 31.29/8.35 |
% 31.29/8.35 |-The branch is then unsatisfiable
% 31.29/8.35 |-Branch two:
% 31.29/8.35 | (455) index(status, all_0_11_11) = all_463_0_68
% 31.29/8.35 | (465) all_463_0_68 = norm
% 31.29/8.35 |
% 31.29/8.35 +-Applying beta-rule and splitting (435), into two cases.
% 31.29/8.35 |-Branch one:
% 31.29/8.35 | (466) ~ (leq(nbr_proc, nbr_proc) = all_463_6_74)
% 31.29/8.35 |
% 31.29/8.35 | Using (461) and (466) yields:
% 31.29/8.35 | (188) $false
% 31.29/8.35 |
% 31.29/8.35 |-The branch is then unsatisfiable
% 31.29/8.35 |-Branch two:
% 31.29/8.35 | (461) leq(nbr_proc, nbr_proc) = all_463_6_74
% 31.29/8.35 | (469) all_463_6_74 = 0
% 31.29/8.35 |
% 31.29/8.35 +-Applying beta-rule and splitting (395), into two cases.
% 31.29/8.35 |-Branch one:
% 31.29/8.35 | (470) ~ (all_463_6_74 = 0)
% 31.29/8.35 |
% 31.29/8.35 | Equations (469) can reduce 470 to:
% 31.29/8.35 | (243) $false
% 31.29/8.35 |
% 31.29/8.35 |-The branch is then unsatisfiable
% 31.29/8.35 |-Branch two:
% 31.29/8.35 | (469) all_463_6_74 = 0
% 31.29/8.35 | (473) ~ (all_463_0_68 = norm) | ~ (all_463_1_69 = all_463_2_70) | ~ (all_463_3_71 = all_463_7_75) | ~ (all_463_4_72 = all_463_8_76) | ~ (all_463_5_73 = elec_2) | ~ (all_463_9_77 = 0)
% 31.29/8.35 |
% 31.29/8.35 +-Applying beta-rule and splitting (429), into two cases.
% 31.29/8.35 |-Branch one:
% 31.29/8.35 | (474) ~ (index(ldr, all_0_11_11) = all_463_1_69)
% 31.29/8.35 |
% 31.29/8.35 | Using (454) and (474) yields:
% 31.29/8.35 | (188) $false
% 31.29/8.35 |
% 31.29/8.35 |-The branch is then unsatisfiable
% 31.29/8.35 |-Branch two:
% 31.29/8.35 | (454) index(ldr, all_0_11_11) = all_463_1_69
% 31.29/8.35 | (477) all_463_1_69 = all_0_11_11
% 31.29/8.35 |
% 31.29/8.35 +-Applying beta-rule and splitting (473), into two cases.
% 31.29/8.35 |-Branch one:
% 31.29/8.35 | (478) ~ (all_463_9_77 = 0)
% 31.29/8.35 |
% 31.29/8.35 | Equations (453) can reduce 478 to:
% 31.29/8.35 | (243) $false
% 31.29/8.35 |
% 31.29/8.35 |-The branch is then unsatisfiable
% 31.29/8.35 |-Branch two:
% 31.29/8.35 | (453) all_463_9_77 = 0
% 31.29/8.35 | (481) ~ (all_463_0_68 = norm) | ~ (all_463_1_69 = all_463_2_70) | ~ (all_463_3_71 = all_463_7_75) | ~ (all_463_4_72 = all_463_8_76) | ~ (all_463_5_73 = elec_2)
% 31.29/8.35 |
% 31.29/8.35 +-Applying beta-rule and splitting (481), into two cases.
% 31.29/8.35 |-Branch one:
% 31.29/8.35 | (482) ~ (all_463_5_73 = elec_2)
% 31.29/8.35 |
% 31.29/8.35 | Equations (451) can reduce 482 to:
% 31.29/8.35 | (243) $false
% 31.29/8.35 |
% 31.29/8.35 |-The branch is then unsatisfiable
% 31.29/8.35 |-Branch two:
% 31.29/8.35 | (451) all_463_5_73 = elec_2
% 31.29/8.35 | (485) ~ (all_463_0_68 = norm) | ~ (all_463_1_69 = all_463_2_70) | ~ (all_463_3_71 = all_463_7_75) | ~ (all_463_4_72 = all_463_8_76)
% 31.29/8.35 |
% 31.29/8.35 +-Applying beta-rule and splitting (485), into two cases.
% 31.29/8.35 |-Branch one:
% 31.29/8.35 | (486) ~ (all_463_0_68 = norm)
% 31.29/8.35 |
% 31.29/8.35 | Equations (465) can reduce 486 to:
% 31.29/8.35 | (243) $false
% 31.29/8.35 |
% 31.29/8.35 |-The branch is then unsatisfiable
% 31.29/8.35 |-Branch two:
% 31.29/8.35 | (465) all_463_0_68 = norm
% 31.29/8.35 | (489) ~ (all_463_1_69 = all_463_2_70) | ~ (all_463_3_71 = all_463_7_75) | ~ (all_463_4_72 = all_463_8_76)
% 31.29/8.35 |
% 31.29/8.35 +-Applying beta-rule and splitting (489), into two cases.
% 31.29/8.35 |-Branch one:
% 31.29/8.35 | (490) ~ (all_463_1_69 = all_463_2_70)
% 31.29/8.35 |
% 31.29/8.35 | Equations (477,439) can reduce 490 to:
% 31.29/8.35 | (243) $false
% 31.29/8.35 |
% 31.29/8.35 |-The branch is then unsatisfiable
% 31.29/8.35 |-Branch two:
% 31.29/8.35 | (492) all_463_1_69 = all_463_2_70
% 31.29/8.35 | (493) ~ (all_463_3_71 = all_463_7_75) | ~ (all_463_4_72 = all_463_8_76)
% 31.29/8.35 |
% 31.29/8.35 +-Applying beta-rule and splitting (493), into two cases.
% 31.29/8.35 |-Branch one:
% 31.29/8.35 | (494) ~ (all_463_3_71 = all_463_7_75)
% 31.29/8.35 |
% 31.29/8.35 | Equations (437,460) can reduce 494 to:
% 31.29/8.35 | (243) $false
% 31.29/8.35 |
% 31.29/8.35 |-The branch is then unsatisfiable
% 31.29/8.35 |-Branch two:
% 31.29/8.35 | (496) all_463_3_71 = all_463_7_75
% 31.29/8.35 | (497) ~ (all_463_4_72 = all_463_8_76)
% 31.29/8.35 |
% 31.29/8.35 | Equations (438,434) can reduce 497 to:
% 31.29/8.35 | (243) $false
% 31.29/8.35 |
% 31.29/8.35 |-The branch is then unsatisfiable
% 31.29/8.35 |-Branch two:
% 31.29/8.35 | (499) ~ (all_0_6_6 = 0)
% 31.29/8.35 | (500) all_0_7_7 = all_0_18_18
% 31.29/8.35 |
% 31.29/8.35 | Equations (500) can reduce 296 to:
% 31.29/8.35 | (243) $false
% 31.29/8.35 |
% 31.29/8.35 |-The branch is then unsatisfiable
% 31.29/8.35 |-Branch two:
% 31.29/8.35 | (502) host(all_0_18_18) = all_0_14_14
% 31.29/8.35 | (249) all_0_14_14 = all_0_20_20
% 31.29/8.35 |
% 31.29/8.35 | Equations (249) can reduce 67 to:
% 31.29/8.35 | (243) $false
% 31.29/8.35 |
% 31.29/8.35 |-The branch is then unsatisfiable
% 31.29/8.35 |-Branch two:
% 31.29/8.35 | (505) ~ (all_0_10_10 = 0)
% 31.29/8.35 | (506) all_0_12_12 = all_0_18_18
% 31.29/8.35 |
% 31.29/8.35 | Equations (506) can reduce 274 to:
% 31.29/8.35 | (243) $false
% 31.29/8.35 |
% 31.29/8.35 |-The branch is then unsatisfiable
% 31.29/8.35 |-Branch two:
% 31.29/8.35 | (508) host(all_0_18_18) = all_0_11_11
% 31.29/8.35 | (260) all_0_11_11 = all_0_20_20
% 31.29/8.35 |
% 31.29/8.35 | Equations (260) can reduce 95 to:
% 31.29/8.35 | (243) $false
% 31.29/8.35 |
% 31.29/8.35 |-The branch is then unsatisfiable
% 31.29/8.35 |-Branch two:
% 31.29/8.35 | (511) ~ (leq(all_0_5_5, all_0_5_5) = 0)
% 31.29/8.35 | (213) ~ (s(all_0_5_5) = nbr_proc)
% 31.29/8.35 |
% 31.29/8.35 | Using (184) and (213) yields:
% 31.29/8.35 | (188) $false
% 31.29/8.35 |
% 31.29/8.35 |-The branch is then unsatisfiable
% 31.29/8.35 |-Branch two:
% 31.29/8.35 | (206) ~ (elem(all_0_3_3, all_0_2_2) = 0)
% 31.29/8.35 | (515) all_0_3_3 = all_0_13_13
% 31.29/8.35 |
% 31.29/8.35 | Equations (515) can reduce 162 to:
% 31.29/8.35 | (243) $false
% 31.29/8.35 |
% 31.29/8.35 |-The branch is then unsatisfiable
% 31.29/8.35 |-Branch two:
% 31.29/8.35 | (187) ~ (elem(all_0_0_0, all_0_2_2) = 0)
% 31.29/8.35 | (518) all_0_0_0 = all_0_13_13
% 31.29/8.35 |
% 31.29/8.35 | Equations (518) can reduce 163 to:
% 31.29/8.35 | (243) $false
% 31.29/8.35 |
% 31.29/8.35 |-The branch is then unsatisfiable
% 31.29/8.35 |-Branch two:
% 31.29/8.35 | (520) ~ (all_0_4_4 = nbr_proc)
% 31.29/8.35 | (521) ? [v0] : ( ~ (v0 = 0) & leq(all_0_4_4, nbr_proc) = v0)
% 31.29/8.35 |
% 31.29/8.35 | Instantiating (521) with all_33_0_116 yields:
% 31.29/8.35 | (522) ~ (all_33_0_116 = 0) & leq(all_0_4_4, nbr_proc) = all_33_0_116
% 31.29/8.35 |
% 31.29/8.35 | Applying alpha-rule on (522) yields:
% 31.29/8.35 | (523) ~ (all_33_0_116 = 0)
% 31.29/8.35 | (524) leq(all_0_4_4, nbr_proc) = all_33_0_116
% 31.29/8.35 |
% 31.29/8.35 | Instantiating formula (35) with all_0_4_4, nbr_proc, 0, all_33_0_116 and discharging atoms leq(all_0_4_4, nbr_proc) = all_33_0_116, leq(all_0_4_4, nbr_proc) = 0, yields:
% 31.29/8.35 | (525) all_33_0_116 = 0
% 31.29/8.36 |
% 31.29/8.36 | Equations (525) can reduce 523 to:
% 31.29/8.36 | (243) $false
% 31.29/8.36 |
% 31.29/8.36 |-The branch is then unsatisfiable
% 31.29/8.36 % SZS output end Proof for theBenchmark
% 31.29/8.36
% 31.29/8.36 7755ms
%------------------------------------------------------------------------------