%------------------------------------------------------------------------------
% File     : SPASS---3.9
% Problem  : SWV419-1.005 : TPTP v8.1.0. Released v3.5.0.
% Transfm  : none
% Format   : tptp
% Command  : run_spass %d %s

% Computer : n013.cluster.edu
% Model    : x86_64 x86_64
% CPU      : Intel(R) Xeon(R) CPU E5-2620 v4 2.10GHz
% Memory   : 8042.1875MB
% OS       : Linux 3.10.0-693.el7.x86_64
% CPULimit : 300s
% WCLimit  : 600s
% DateTime : Wed Jul 20 21:42:45 EDT 2022

% Result   : Unsatisfiable 7.05s 7.26s
% Output   : Refutation 8.58s
% Verified : 
% SZS Type : -

% Comments : 
%------------------------------------------------------------------------------
%----WARNING: Could not form TPTP format derivation
%------------------------------------------------------------------------------
%----ORIGINAL SYSTEM OUTPUT
% 0.04/0.12  % Problem  : SWV419-1.005 : TPTP v8.1.0. Released v3.5.0.
% 0.04/0.13  % Command  : run_spass %d %s
% 0.12/0.34  % Computer : n013.cluster.edu
% 0.12/0.34  % Model    : x86_64 x86_64
% 0.12/0.34  % CPU      : Intel(R) Xeon(R) CPU E5-2620 v4 @ 2.10GHz
% 0.12/0.34  % Memory   : 8042.1875MB
% 0.12/0.34  % OS       : Linux 3.10.0-693.el7.x86_64
% 0.12/0.34  % CPULimit : 300
% 0.12/0.34  % WCLimit  : 600
% 0.12/0.34  % DateTime : Wed Jun 15 20:56:14 EDT 2022
% 0.12/0.34  % CPUTime  : 
% 7.05/7.26  
% 7.05/7.26  SPASS V 3.9 
% 7.05/7.26  SPASS beiseite: Proof found.
% 7.05/7.26  % SZS status Theorem
% 7.05/7.26  Problem: /export/starexec/sandbox/benchmark/theBenchmark.p 
% 7.05/7.26  SPASS derived 75779 clauses, backtracked 24844 clauses, performed 4112 splits and kept 66309 clauses.
% 7.05/7.26  SPASS allocated 109740 KBytes.
% 7.05/7.26  SPASS spent	0:00:06.83 on the problem.
% 7.05/7.26  		0:00:00.04 for the input.
% 7.05/7.26  		0:00:00.00 for the FLOTTER CNF translation.
% 7.05/7.26  		0:00:00.51 for inferences.
% 7.05/7.26  		0:00:00.89 for the backtracking.
% 7.05/7.26  		0:00:04.28 for the reduction.
% 7.05/7.26  
% 7.05/7.26  
% 7.05/7.26  Here is a proof with depth 27, length 8382 :
% 7.05/7.26  % SZS output start Refutation
% 7.05/7.26  1[0:Inp] ||  -> succ(s0,s1)*.
% 7.05/7.26  2[0:Inp] ||  -> succ(s1,s2)*.
% 7.05/7.26  3[0:Inp] ||  -> succ(s2,s3)*.
% 7.05/7.26  4[0:Inp] ||  -> succ(s3,s4)*.
% 7.05/7.26  5[0:Inp] ||  -> last(s4)*.
% 7.05/7.26  6[0:Inp] || succ(u,v)+ -> trans(u,v)*.
% 7.05/7.26  7[0:Inp] || loop+ -> trans(s4,s4) trans(s4,s3) trans(s4,s2) trans(s4,s1) trans(s4,s0)*.
% 7.05/7.26  10[0:Inp] || m_cell_v_token(c_e_h_1,u)*+ -> .
% 7.05/7.26  13[0:Inp] || m_cell_v_token(c_e_h_2,u)*+ -> .
% 7.05/7.26  16[0:Inp] ||  -> m_cell_v_token(c_e_h_3,u)*.
% 7.05/7.26  18[0:Inp] || m_mutex_h_half_v_inp(u,c_a,v)+ -> m_user_v_req(u,c_u,v)*.
% 7.05/7.26  27[0:Inp] || m_and_h_gate_v_in1(u,c_c,v)*+ -> m_mutex_h_half_v_out(u,c_a,v).
% 7.05/7.26  33[0:Inp] ||  -> m_user_v_ack(u,c_u,v)* m_and_h_gate_v_in2(u,c_d,v).
% 7.05/7.26  34[0:Inp] || m_user_v_ack(u,c_u,v)*+ m_and_h_gate_v_in2(u,c_d,v) -> .
% 7.05/7.26  36[0:Inp] || m_c_h_element_v_in1(u,c_e,v)+ -> m_and_h_gate_v_out(u,c_c,v)*.
% 7.05/7.26  40[0:Inp] || m_c_h_element_v_in1(u,c_f,v)+ -> m_and_h_gate_v_out(u,c_d,v)*.
% 7.05/7.26  67[0:Inp] ||  -> m_c_h_element_v_out(u,c_f,v) m_and_h_gate_h_init_v_in1(u,c_m,v)*.
% 7.05/7.26  69[0:Inp] ||  -> m_and_h_gate_h_init_v_out(u,c_n,v) m_and_h_gate_h_init_v_in2(u,c_m,v)*.
% 7.05/7.26  70[0:Inp] || m_and_h_gate_h_init_v_out(u,c_n,v)+ m_and_h_gate_h_init_v_in2(u,c_m,v)* -> .
% 7.05/7.26  71[0:Inp] || m_cell_v_token(u,v)+ -> m_and_h_gate_h_init_v_init_h_out(u,c_m,v)*.
% 7.05/7.26  72[0:Inp] || m_and_h_gate_h_init_v_init_h_out(u,c_m,v)*+ -> m_cell_v_token(u,v).
% 7.05/7.26  73[0:Inp] ||  -> m_c_h_element_v_out(u,c_e,v) m_and_h_gate_h_init_v_in1(u,c_n,v)*.
% 7.05/7.26  74[0:Inp] || m_c_h_element_v_out(u,c_e,v)+ m_and_h_gate_h_init_v_in1(u,c_n,v)* -> .
% 7.05/7.26  75[0:Inp] ||  -> m_and_h_gate_h_init_v_out(u,c_m,v) m_and_h_gate_h_init_v_in2(u,c_n,v)*.
% 7.05/7.26  76[0:Inp] || m_and_h_gate_h_init_v_out(u,c_m,v)+ m_and_h_gate_h_init_v_in2(u,c_n,v)* -> .
% 7.05/7.26  77[0:Inp] ||  -> m_cell_v_token(u,v) m_and_h_gate_h_init_v_init_h_out(u,c_n,v)*.
% 7.05/7.26  78[0:Inp] || m_cell_v_token(u,v) m_and_h_gate_h_init_v_init_h_out(u,c_n,v)*+ -> .
% 7.05/7.26  81[0:Inp] || m_and_h_gate_h_init_v_out(u,c_n,v)*+ -> m_and_h_gate_v_in2(u,c_p,v).
% 7.05/7.26  87[0:Inp] || m_c_h_element_v_out(u,c_e,v)*+ -> m_and_h_gate_v_in1(u,c_r,v).
% 7.05/7.26  88[0:Inp] || m_and_h_gate_v_in1(u,c_r,v)+ -> m_c_h_element_v_out(u,c_e,v)*.
% 7.05/7.26  89[0:Inp] || m_and_h_gate_h_init_v_out(u,c_m,v)*+ -> m_and_h_gate_v_in2(u,c_r,v).
% 7.05/7.26  90[0:Inp] || m_and_h_gate_v_in2(u,c_r,v)+ -> m_and_h_gate_h_init_v_out(u,c_m,v)*.
% 7.05/7.26  96[0:Inp] || m_and_h_gate_v_out(u,c_r,v)*+ -> m_user_v_ack(u,c_u,v).
% 7.05/7.26  97[0:Inp] || m_user_v_ack(u,c_u,v)+ -> m_and_h_gate_v_out(u,c_r,v)*.
% 7.05/7.26  106[0:Inp] || m_user_v_req(u,v,s0)*+ -> .
% 7.05/7.26  112[0:Inp] || m_and_h_gate_h_init_v_init_h_out(u,v,s0)*+ -> m_and_h_gate_h_init_v_out(u,v,s0).
% 7.05/7.26  113[0:Inp] || m_and_h_gate_h_init_v_out(u,v,s0)+ -> m_and_h_gate_h_init_v_init_h_out(u,v,s0)*.
% 7.05/7.26  114[0:Inp] || node9(u,v,w)*+ -> m_and_h_gate_h_init_v_in1(u,v,w).
% 7.05/7.26  115[0:Inp] || node9(u,v,w)*+ -> m_and_h_gate_h_init_v_in2(u,v,w).
% 7.05/7.26  116[0:Inp] || m_and_h_gate_h_init_v_in2(u,v,w) m_and_h_gate_h_init_v_in1(u,v,w) node10(u,v,w,x)*+ -> m_and_h_gate_h_init_v_out(u,v,x).
% 7.05/7.26  117[0:Inp] || m_and_h_gate_h_init_v_out(u,v,w) node10(u,v,x,w)*+ -> node9(u,v,x).
% 7.05/7.26  118[0:Inp] || m_and_h_gate_h_init_v_out(u,v,w) node11(u,v,w,x)*+ -> m_and_h_gate_h_init_v_out(u,v,x).
% 7.05/7.26  119[0:Inp] || m_and_h_gate_h_init_v_out(u,v,w) node11(u,v,x,w)*+ -> m_and_h_gate_h_init_v_out(u,v,x).
% 7.05/7.26  120[0:Inp] || trans(u,v)+ -> node11(w,x,u,v)* node10(w,x,u,v).
% 7.05/7.26  121[0:Inp] || m_mutex_h_half_v_out(u,v,s0)*+ -> .
% 7.05/7.26  123[0:Inp] || m_mutex_h_half_v_out(u,v,w) node12(u,v,x,w)*+ -> m_mutex_h_half_v_inp(u,v,x).
% 7.05/7.26  125[0:Inp] || m_mutex_h_half_v_out(u,v,w) node13(u,v,x,w)*+ -> m_mutex_h_half_v_out(u,v,x).
% 7.05/7.26  126[0:Inp] || trans(u,v)+ -> node13(w,x,u,v)* node12(w,x,u,v).
% 7.05/7.26  128[0:Inp] || m_c_h_element_v_out(u,v,s0)*+ -> .
% 7.05/7.26  129[0:Inp] || m_c_h_element_v_in1(u,v,w) node14(u,v,w,x)*+ -> m_c_h_element_v_out(u,v,x).
% 7.05/7.26  130[0:Inp] || m_c_h_element_v_out(u,v,w) node14(u,v,x,w)*+ -> m_c_h_element_v_in1(u,v,x).
% 7.05/7.26  131[0:Inp] || m_c_h_element_v_out(u,v,w) node15(u,v,w,x)*+ -> m_c_h_element_v_out(u,v,x).
% 7.05/7.26  132[0:Inp] || m_c_h_element_v_out(u,v,w) node15(u,v,x,w)*+ -> m_c_h_element_v_out(u,v,x).
% 7.05/7.26  133[0:Inp] || node16(u,v,w)+ -> m_c_h_element_v_in2(u,v,w)* m_c_h_element_v_in1(u,v,w).
% 7.05/7.26  134[0:Inp] || node16(u,v,w)+ m_c_h_element_v_in2(u,v,w)* m_c_h_element_v_in1(u,v,w) -> .
% 7.05/7.26  135[0:Inp] || node17(u,v,w)+ m_c_h_element_v_in2(u,v,w)* -> m_c_h_element_v_in1(u,v,w).
% 7.05/7.26  136[0:Inp] || node17(u,v,w)+ m_c_h_element_v_in1(u,v,w) -> m_c_h_element_v_in2(u,v,w)*.
% 7.05/7.26  137[0:Inp] || m_c_h_element_v_out(u,v,w) node18(u,v,w,x)*+ -> m_c_h_element_v_out(u,v,x).
% 7.05/7.26  138[0:Inp] || m_c_h_element_v_out(u,v,w) node18(u,v,x,w)*+ -> m_c_h_element_v_out(u,v,x).
% 7.05/7.26  139[0:Inp] || node19(u,v,w,x)+ -> node16(u,v,w) node15(u,v,w,x)* node14(u,v,w,x).
% 7.05/7.26  140[0:Inp] || node19(u,v,w,x)+ -> node17(u,v,w) node18(u,v,w,x)*.
% 7.05/7.26  141[0:Inp] || trans(u,v)+ -> node19(w,x,u,v)*.
% 7.05/7.26  142[0:Inp] || m_and_h_gate_v_out(u,v,s0)*+ -> .
% 7.05/7.26  143[0:Inp] || node20(u,v,w)*+ -> m_and_h_gate_v_in1(u,v,w).
% 7.05/7.26  144[0:Inp] || node20(u,v,w)*+ -> m_and_h_gate_v_in2(u,v,w).
% 7.05/7.26  145[0:Inp] || m_and_h_gate_v_in2(u,v,w) m_and_h_gate_v_in1(u,v,w) node21(u,v,w,x)*+ -> m_and_h_gate_v_out(u,v,x).
% 7.05/7.26  146[0:Inp] || m_and_h_gate_v_out(u,v,w) node21(u,v,x,w)*+ -> node20(u,v,x).
% 7.05/7.26  147[0:Inp] || m_and_h_gate_v_out(u,v,w) node22(u,v,w,x)*+ -> m_and_h_gate_v_out(u,v,x).
% 7.05/7.26  148[0:Inp] || m_and_h_gate_v_out(u,v,w) node22(u,v,x,w)*+ -> m_and_h_gate_v_out(u,v,x).
% 7.05/7.26  149[0:Inp] || trans(u,v)+ -> node22(w,x,u,v)* node21(w,x,u,v).
% 7.05/7.26  150[0:Inp] node23(u) ||  -> m_user_v_ack(c_e_h_1,c_u,u)*.
% 7.05/7.26  151[0:Inp] node23(u) ||  -> m_user_v_ack(c_e_h_2,c_u,u)*.
% 7.05/7.26  152[0:Inp] node24(u) ||  -> m_user_v_ack(c_e_h_1,c_u,u)*.
% 7.05/7.26  153[0:Inp] node24(u) ||  -> m_user_v_ack(c_e_h_3,c_u,u)*.
% 7.05/7.26  154[0:Inp] node25(u) ||  -> m_user_v_ack(c_e_h_2,c_u,u)*.
% 7.05/7.26  155[0:Inp] node25(u) ||  -> m_user_v_ack(c_e_h_3,c_u,u)*.
% 7.05/7.26  156[0:Inp] node26(u) ||  -> node25(u)* node24(u) node23(u).
% 7.05/7.26  157[0:Inp] until27(u) ||  -> xuntil28(u) node26(u)*.
% 7.05/7.26  158[0:Inp] xuntil28(u) || succ(u,v)*+ -> until27(v).
% 7.05/7.26  159[0:Inp] xuntil28(u) last(u) ||  -> loop*.
% 7.05/7.26  160[0:Inp] xuntil28(u) last(u) || trans(u,v)*+ -> until2p29(v).
% 7.05/7.26  161[0:Inp] until2p29(u) ||  -> xuntil2p30(u) node26(u)*.
% 7.05/7.26  162[0:Inp] xuntil2p30(u) || succ(u,v)*+ -> until2p29(v).
% 7.05/7.26  163[0:Inp] xuntil2p30(u) last(u) ||  -> .
% 7.05/7.26  164[0:Inp] ||  -> until27(s0)*.
% 7.05/7.26  166[0:Res:164.0,157.0] ||  -> xuntil28(s0) node26(s0)*.
% 7.05/7.26  167[0:Res:5.0,163.0] xuntil2p30(s4) ||  -> .
% 7.05/7.26  168[0:Res:5.0,159.0] xuntil28(s4) ||  -> loop*.
% 7.05/7.26  170[0:Res:4.0,162.1] xuntil2p30(s3) ||  -> until2p29(s4)*.
% 7.05/7.26  171[0:Res:3.0,162.1] xuntil2p30(s2) ||  -> until2p29(s3)*.
% 7.05/7.26  172[0:Res:2.0,162.1] xuntil2p30(s1) ||  -> until2p29(s2)*.
% 7.05/7.26  173[0:Res:1.0,162.1] xuntil2p30(s0) ||  -> until2p29(s1)*.
% 7.05/7.26  174[0:Res:4.0,158.1] xuntil28(s3) ||  -> until27(s4)*.
% 7.05/7.26  175[0:Res:3.0,158.1] xuntil28(s2) ||  -> until27(s3)*.
% 7.05/7.26  176[0:Res:2.0,158.1] xuntil28(s1) ||  -> until27(s2)*.
% 7.05/7.26  177[0:Res:1.0,158.1] xuntil28(s0) ||  -> until27(s1)*.
% 7.05/7.26  178[0:Res:5.0,160.0] xuntil28(s4) || trans(s4,u)* -> until2p29(u).
% 7.05/7.26  181[0:Res:161.2,167.0] until2p29(s4) ||  -> node26(s4)*.
% 7.05/7.26  196[0:Res:4.0,6.0] ||  -> trans(s3,s4)*.
% 7.05/7.26  197[0:Res:3.0,6.0] ||  -> trans(s2,s3)*.
% 7.05/7.26  198[0:Res:2.0,6.0] ||  -> trans(s1,s2)*.
% 7.05/7.26  199[0:Res:1.0,6.0] ||  -> trans(s0,s1)*.
% 7.05/7.26  202[0:Res:16.0,71.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_3,c_m,u)*.
% 7.05/7.26  216[0:Res:153.1,97.0] node24(u) ||  -> m_and_h_gate_v_out(c_e_h_3,c_r,u)*.
% 7.05/7.26  217[0:Res:155.1,97.0] node25(u) ||  -> m_and_h_gate_v_out(c_e_h_3,c_r,u)*.
% 7.05/7.26  218[0:Res:151.1,97.0] node23(u) ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,u)*.
% 7.05/7.26  219[0:Res:154.1,97.0] node25(u) ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,u)*.
% 7.05/7.26  220[0:Res:150.1,97.0] node23(u) ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,u)*.
% 7.05/7.26  221[0:Res:152.1,97.0] node24(u) ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,u)*.
% 7.05/7.26  222[0:Res:33.0,97.0] ||  -> m_and_h_gate_v_in2(u,c_d,v) m_and_h_gate_v_out(u,c_r,v)*.
% 7.05/7.26  223[0:Res:216.1,142.0] node24(s0) ||  -> .
% 7.05/7.26  225[0:Res:217.1,142.0] node25(s0) ||  -> .
% 7.05/7.26  227[0:SoR:225.0,156.1] node26(s0) ||  -> node23(s0) node24(s0)*.
% 7.05/7.26  228[0:MRR:227.2,223.0] node26(s0) ||  -> node23(s0)*.
% 7.05/7.26  229[0:SoR:228.0,161.2] until2p29(s0) ||  -> node23(s0)* xuntil2p30(s0).
% 7.05/7.26  231[0:SoR:228.0,166.1] ||  -> node23(s0)* xuntil28(s0).
% 7.05/7.26  232[1:Spt:231.1] ||  -> xuntil28(s0)*.
% 7.05/7.26  233[1:MRR:177.0,232.0] ||  -> until27(s1)*.
% 7.05/7.26  234[0:Res:218.1,142.0] node23(s0) ||  -> .
% 7.05/7.26  236[0:MRR:228.1,234.0] node26(s0) ||  -> .
% 7.05/7.26  237[0:MRR:229.1,234.0] until2p29(s0) ||  -> xuntil2p30(s0)*.
% 7.05/7.26  239[0:SoR:236.0,157.2] until27(s0) ||  -> xuntil28(s0)*.
% 7.05/7.26  248[0:Res:77.1,112.0] ||  -> m_cell_v_token(u,s0) m_and_h_gate_h_init_v_out(u,c_n,s0)*.
% 7.05/7.26  249[0:Res:202.0,112.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s0)*.
% 7.05/7.26  269[0:Res:196.0,141.0] ||  -> node19(u,v,s3,s4)*.
% 7.05/7.26  270[0:Res:197.0,141.0] ||  -> node19(u,v,s2,s3)*.
% 7.05/7.26  271[0:Res:198.0,141.0] ||  -> node19(u,v,s1,s2)*.
% 7.05/7.26  272[0:Res:199.0,141.0] ||  -> node19(u,v,s0,s1)*.
% 7.05/7.26  273[0:Res:249.0,76.0] || m_and_h_gate_h_init_v_in2(c_e_h_3,c_n,s0)*+ -> .
% 7.05/7.26  275[0:Res:248.1,70.0] || m_and_h_gate_h_init_v_in2(u,c_m,s0)*+ -> m_cell_v_token(u,s0).
% 7.05/7.26  277[0:Res:153.1,34.0] node24(u) || m_and_h_gate_v_in2(c_e_h_3,c_d,u)*+ -> .
% 7.05/7.26  278[0:Res:155.1,34.0] node25(u) || m_and_h_gate_v_in2(c_e_h_3,c_d,u)*+ -> .
% 7.05/7.26  279[0:Res:151.1,34.0] node23(u) || m_and_h_gate_v_in2(c_e_h_2,c_d,u)*+ -> .
% 7.05/7.26  282[0:Res:152.1,34.0] node24(u) || m_and_h_gate_v_in2(c_e_h_1,c_d,u)*+ -> .
% 7.05/7.26  318[0:Res:196.0,149.0] ||  -> node22(u,v,s3,s4)* node21(u,v,s3,s4).
% 7.05/7.26  319[0:Res:197.0,149.0] ||  -> node22(u,v,s2,s3)* node21(u,v,s2,s3).
% 7.05/7.26  320[0:Res:198.0,149.0] ||  -> node22(u,v,s1,s2)* node21(u,v,s1,s2).
% 7.05/7.26  321[0:Res:199.0,149.0] ||  -> node22(u,v,s0,s1)* node21(u,v,s0,s1).
% 7.05/7.26  325[0:Res:199.0,126.0] ||  -> node13(u,v,s0,s1)* node12(u,v,s0,s1).
% 7.05/7.26  326[0:Res:196.0,120.0] ||  -> node11(u,v,s3,s4)* node10(u,v,s3,s4).
% 7.05/7.26  327[0:Res:197.0,120.0] ||  -> node11(u,v,s2,s3)* node10(u,v,s2,s3).
% 7.05/7.26  328[0:Res:198.0,120.0] ||  -> node11(u,v,s1,s2)* node10(u,v,s1,s2).
% 7.05/7.26  329[0:Res:199.0,120.0] ||  -> node11(u,v,s0,s1)* node10(u,v,s0,s1).
% 7.05/7.26  374[0:Res:325.0,125.1] || m_mutex_h_half_v_out(u,v,s1) -> node12(u,v,s0,s1)* m_mutex_h_half_v_out(u,v,s0).
% 7.05/7.26  375[0:MRR:374.2,121.0] || m_mutex_h_half_v_out(u,v,s1)+ -> node12(u,v,s0,s1)*.
% 7.05/7.26  389[0:Res:326.0,119.1] || m_and_h_gate_h_init_v_out(u,v,s4)+ -> node10(u,v,s3,s4)* m_and_h_gate_h_init_v_out(u,v,s3).
% 7.05/7.26  390[0:Res:327.0,119.1] || m_and_h_gate_h_init_v_out(u,v,s3)+ -> node10(u,v,s2,s3)* m_and_h_gate_h_init_v_out(u,v,s2).
% 7.05/7.26  391[0:Res:328.0,119.1] || m_and_h_gate_h_init_v_out(u,v,s2)+ -> node10(u,v,s1,s2)* m_and_h_gate_h_init_v_out(u,v,s1).
% 7.05/7.26  392[0:Res:329.0,119.1] || m_and_h_gate_h_init_v_out(u,v,s1)+ -> node10(u,v,s0,s1)* m_and_h_gate_h_init_v_out(u,v,s0).
% 7.05/7.26  402[0:Res:328.0,118.1] || m_and_h_gate_h_init_v_out(u,v,s1)+ -> node10(u,v,s1,s2)* m_and_h_gate_h_init_v_out(u,v,s2).
% 7.05/7.26  403[0:Res:329.0,118.1] || m_and_h_gate_h_init_v_out(u,v,s0)+ -> node10(u,v,s0,s1)* m_and_h_gate_h_init_v_out(u,v,s1).
% 7.05/7.26  404[0:Res:248.1,403.0] ||  -> m_cell_v_token(u,s0) node10(u,c_n,s0,s1)* m_and_h_gate_h_init_v_out(u,c_n,s1).
% 7.05/7.26  405[0:Res:249.0,403.0] ||  -> node10(c_e_h_3,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s1).
% 7.05/7.26  408[0:Res:318.0,148.1] || m_and_h_gate_v_out(u,v,s4)+ -> node21(u,v,s3,s4)* m_and_h_gate_v_out(u,v,s3).
% 7.05/7.26  409[0:Res:319.0,148.1] || m_and_h_gate_v_out(u,v,s3)+ -> node21(u,v,s2,s3)* m_and_h_gate_v_out(u,v,s2).
% 7.05/7.26  410[0:Res:320.0,148.1] || m_and_h_gate_v_out(u,v,s2)+ -> node21(u,v,s1,s2)* m_and_h_gate_v_out(u,v,s1).
% 7.05/7.26  411[0:Res:321.0,148.1] || m_and_h_gate_v_out(u,v,s1) -> node21(u,v,s0,s1)* m_and_h_gate_v_out(u,v,s0).
% 7.05/7.26  412[0:MRR:411.2,142.0] || m_and_h_gate_v_out(u,v,s1)+ -> node21(u,v,s0,s1)*.
% 7.05/7.26  413[0:Res:222.1,412.0] ||  -> m_and_h_gate_v_in2(u,c_d,s1) node21(u,c_r,s0,s1)*.
% 7.05/7.26  428[0:Res:269.0,140.0] ||  -> node17(u,v,s3) node18(u,v,s3,s4)*.
% 7.05/7.26  429[0:Res:270.0,140.0] ||  -> node17(u,v,s2) node18(u,v,s2,s3)*.
% 7.05/7.26  430[0:Res:271.0,140.0] ||  -> node17(u,v,s1) node18(u,v,s1,s2)*.
% 7.05/7.26  431[0:Res:272.0,140.0] ||  -> node17(u,v,s0) node18(u,v,s0,s1)*.
% 7.05/7.26  432[0:Res:413.1,146.1] || m_and_h_gate_v_out(u,c_r,s1) -> m_and_h_gate_v_in2(u,c_d,s1) node20(u,c_r,s0)*.
% 7.05/7.26  433[0:MRR:432.0,222.1] ||  -> m_and_h_gate_v_in2(u,c_d,s1) node20(u,c_r,s0)*.
% 7.05/7.26  434[0:Res:433.1,143.0] ||  -> m_and_h_gate_v_in2(u,c_d,s1)* m_and_h_gate_v_in1(u,c_r,s0).
% 7.05/7.26  436[0:Res:434.0,278.1] node25(s1) ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s0)*.
% 7.05/7.26  437[0:Res:434.0,277.1] node24(s1) ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s0)*.
% 7.05/7.26  439[0:Res:434.0,279.1] node23(s1) ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s0)*.
% 7.05/7.26  442[0:SoR:436.0,156.1] node26(s1) ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s0)* node23(s1) node24(s1).
% 7.05/7.26  443[0:MRR:442.3,437.0] node26(s1) ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s0)* node23(s1).
% 7.05/7.26  465[0:SoR:443.0,161.2] until2p29(s1) ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s0)* node23(s1) xuntil2p30(s1).
% 7.05/7.26  466[0:SoR:443.0,157.2] until27(s1) ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s0)* node23(s1) xuntil28(s1).
% 7.05/7.26  467[1:SSi:466.0,233.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s0)* node23(s1) xuntil28(s1).
% 7.05/7.26  468[0:Res:405.0,116.2] || m_and_h_gate_h_init_v_in2(c_e_h_3,c_m,s0)* m_and_h_gate_h_init_v_in1(c_e_h_3,c_m,s0) -> m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s1) m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s1).
% 7.05/7.26  469[0:Res:404.1,116.2] || m_and_h_gate_h_init_v_in2(u,c_n,s0)* m_and_h_gate_h_init_v_in1(u,c_n,s0) -> m_cell_v_token(u,s0) m_and_h_gate_h_init_v_out(u,c_n,s1) m_and_h_gate_h_init_v_out(u,c_n,s1).
% 7.05/7.26  470[0:Obv:468.2] || m_and_h_gate_h_init_v_in2(c_e_h_3,c_m,s0)*+ m_and_h_gate_h_init_v_in1(c_e_h_3,c_m,s0) -> m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s1).
% 7.05/7.26  471[0:Obv:469.3] || m_and_h_gate_h_init_v_in2(u,c_n,s0)*+ m_and_h_gate_h_init_v_in1(u,c_n,s0) -> m_cell_v_token(u,s0) m_and_h_gate_h_init_v_out(u,c_n,s1).
% 7.05/7.26  472[2:Spt:467.1] ||  -> node23(s1)*.
% 7.05/7.26  475[2:MRR:439.0,472.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s0)*.
% 7.05/7.26  479[2:Res:475.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s0)*.
% 7.05/7.26  480[2:MRR:479.0,128.0] ||  -> .
% 7.05/7.26  481[2:Spt:480.0,467.1,472.0] || node23(s1)*+ -> .
% 7.05/7.26  482[2:Spt:480.0,467.0,467.2] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s0)* xuntil28(s1).
% 7.05/7.26  485[2:MRR:465.2,481.0] until2p29(s1) ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s0)* xuntil2p30(s1).
% 7.05/7.26  486[3:Spt:482.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s0)*.
% 7.05/7.26  487[3:Res:486.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_e,s0)*.
% 7.05/7.26  488[3:MRR:487.0,128.0] ||  -> .
% 7.05/7.26  489[3:Spt:488.0,482.0,486.0] || m_and_h_gate_v_in1(c_e_h_3,c_r,s0)*+ -> .
% 7.05/7.26  490[3:Spt:488.0,482.1] ||  -> xuntil28(s1)*.
% 7.05/7.26  491[3:MRR:176.0,490.0] ||  -> until27(s2)*.
% 7.05/7.26  498[3:MRR:485.1,489.0] until2p29(s1) ||  -> xuntil2p30(s1)*.
% 7.05/7.26  503[0:Res:269.0,139.0] ||  -> node16(u,v,s3) node15(u,v,s3,s4)* node14(u,v,s3,s4).
% 7.05/7.26  504[0:Res:270.0,139.0] ||  -> node16(u,v,s2) node15(u,v,s2,s3)* node14(u,v,s2,s3).
% 7.05/7.26  505[0:Res:271.0,139.0] ||  -> node16(u,v,s1) node15(u,v,s1,s2)* node14(u,v,s1,s2).
% 7.05/7.26  506[0:Res:272.0,139.0] ||  -> node16(u,v,s0) node15(u,v,s0,s1)* node14(u,v,s0,s1).
% 7.05/7.26  508[0:Res:428.1,137.1] || m_c_h_element_v_out(u,v,s3)*+ -> node17(u,v,s3) m_c_h_element_v_out(u,v,s4).
% 7.05/7.26  509[0:Res:429.1,138.1] || m_c_h_element_v_out(u,v,s3)+ -> node17(u,v,s2) m_c_h_element_v_out(u,v,s2)*.
% 7.05/7.26  511[0:Res:430.1,138.1] || m_c_h_element_v_out(u,v,s2)+ -> node17(u,v,s1) m_c_h_element_v_out(u,v,s1)*.
% 7.05/7.26  513[0:Res:431.1,138.1] || m_c_h_element_v_out(u,v,s1) -> node17(u,v,s0) m_c_h_element_v_out(u,v,s0)*.
% 7.05/7.26  515[0:MRR:513.2,128.0] || m_c_h_element_v_out(u,v,s1)*+ -> node17(u,v,s0).
% 7.05/7.26  518[0:Res:222.1,408.0] ||  -> m_and_h_gate_v_in2(u,c_d,s4) node21(u,c_r,s3,s4)* m_and_h_gate_v_out(u,c_r,s3).
% 7.05/7.26  521[0:Res:219.1,408.0] node25(s4) ||  -> node21(c_e_h_2,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_2,c_r,s3).
% 7.05/7.26  522[0:Res:218.1,408.0] node23(s4) ||  -> node21(c_e_h_2,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_2,c_r,s3).
% 7.05/7.26  523[0:Res:221.1,408.0] node24(s4) ||  -> node21(c_e_h_1,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_1,c_r,s3).
% 7.05/7.26  524[0:Res:220.1,408.0] node23(s4) ||  -> node21(c_e_h_1,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_1,c_r,s3).
% 7.05/7.26  529[0:Res:222.1,409.0] ||  -> m_and_h_gate_v_in2(u,c_d,s3) node21(u,c_r,s2,s3)* m_and_h_gate_v_out(u,c_r,s2).
% 7.05/7.26  530[0:Res:217.1,409.0] node25(s3) ||  -> node21(c_e_h_3,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_3,c_r,s2).
% 7.05/7.26  531[0:Res:216.1,409.0] node24(s3) ||  -> node21(c_e_h_3,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_3,c_r,s2).
% 7.05/7.26  535[0:Res:220.1,409.0] node23(s3) ||  -> node21(c_e_h_1,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_1,c_r,s2).
% 7.05/7.26  536[0:SoR:521.0,156.1] node26(s4) ||  -> node21(c_e_h_2,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_2,c_r,s3) node23(s4) node24(s4).
% 7.05/7.26  537[0:MRR:536.3,522.0] node26(s4) ||  -> node21(c_e_h_2,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_2,c_r,s3) node24(s4).
% 7.05/7.26  538[0:Res:222.1,410.0] ||  -> m_and_h_gate_v_in2(u,c_d,s2) node21(u,c_r,s1,s2)* m_and_h_gate_v_out(u,c_r,s1).
% 7.05/7.26  545[0:SoR:530.0,156.1] node26(s3) ||  -> node21(c_e_h_3,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_3,c_r,s2) node23(s3) node24(s3).
% 7.05/7.26  546[0:MRR:545.4,531.0] node26(s3) ||  -> node21(c_e_h_3,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_3,c_r,s2) node23(s3).
% 7.05/7.26  579[0:Res:503.1,131.1] || m_c_h_element_v_out(u,v,s3)+ -> node16(u,v,s3) node14(u,v,s3,s4)* m_c_h_element_v_out(u,v,s4).
% 7.05/7.26  582[0:Res:504.1,132.1] || m_c_h_element_v_out(u,v,s3)+ -> node16(u,v,s2) node14(u,v,s2,s3)* m_c_h_element_v_out(u,v,s2).
% 7.05/7.26  586[0:Res:505.1,132.1] || m_c_h_element_v_out(u,v,s2)+ -> node16(u,v,s1) node14(u,v,s1,s2)* m_c_h_element_v_out(u,v,s1).
% 7.05/7.26  588[0:Res:518.1,146.1] || m_and_h_gate_v_out(u,c_r,s4) -> m_and_h_gate_v_in2(u,c_d,s4) m_and_h_gate_v_out(u,c_r,s3) node20(u,c_r,s3)*.
% 7.05/7.26  590[0:MRR:588.0,222.1] ||  -> m_and_h_gate_v_in2(u,c_d,s4) m_and_h_gate_v_out(u,c_r,s3) node20(u,c_r,s3)*.
% 7.05/7.26  591[0:Res:590.2,143.0] ||  -> m_and_h_gate_v_in2(u,c_d,s4) m_and_h_gate_v_out(u,c_r,s3)* m_and_h_gate_v_in1(u,c_r,s3).
% 7.05/7.26  592[0:Res:590.2,144.0] ||  -> m_and_h_gate_v_in2(u,c_d,s4) m_and_h_gate_v_out(u,c_r,s3)* m_and_h_gate_v_in2(u,c_r,s3).
% 7.05/7.26  593[0:Res:506.1,132.1] || m_c_h_element_v_out(u,v,s1) -> node16(u,v,s0) node14(u,v,s0,s1)* m_c_h_element_v_out(u,v,s0).
% 7.05/7.26  595[0:MRR:593.3,128.0] || m_c_h_element_v_out(u,v,s1)+ -> node16(u,v,s0) node14(u,v,s0,s1)*.
% 7.05/7.26  597[0:Res:591.1,409.0] ||  -> m_and_h_gate_v_in2(u,c_d,s4) m_and_h_gate_v_in1(u,c_r,s3) node21(u,c_r,s2,s3)* m_and_h_gate_v_out(u,c_r,s2).
% 7.05/7.26  600[0:Res:592.1,409.0] ||  -> m_and_h_gate_v_in2(u,c_d,s4) m_and_h_gate_v_in2(u,c_r,s3) node21(u,c_r,s2,s3)* m_and_h_gate_v_out(u,c_r,s2).
% 7.05/7.26  606[0:Res:529.1,146.1] || m_and_h_gate_v_out(u,c_r,s3) -> m_and_h_gate_v_in2(u,c_d,s3) m_and_h_gate_v_out(u,c_r,s2) node20(u,c_r,s2)*.
% 7.05/7.26  608[0:MRR:606.0,222.1] ||  -> m_and_h_gate_v_in2(u,c_d,s3) m_and_h_gate_v_out(u,c_r,s2) node20(u,c_r,s2)*.
% 7.05/7.26  610[0:Res:608.2,144.0] ||  -> m_and_h_gate_v_in2(u,c_d,s3) m_and_h_gate_v_out(u,c_r,s2)* m_and_h_gate_v_in2(u,c_r,s2).
% 7.05/7.26  616[0:Res:610.1,96.0] ||  -> m_and_h_gate_v_in2(u,c_d,s3) m_and_h_gate_v_in2(u,c_r,s2) m_user_v_ack(u,c_u,s2)*.
% 7.05/7.26  619[0:Res:538.1,146.1] || m_and_h_gate_v_out(u,c_r,s2) -> m_and_h_gate_v_in2(u,c_d,s2) m_and_h_gate_v_out(u,c_r,s1) node20(u,c_r,s1)*.
% 7.05/7.26  621[0:MRR:619.0,222.1] ||  -> m_and_h_gate_v_in2(u,c_d,s2) m_and_h_gate_v_out(u,c_r,s1) node20(u,c_r,s1)*.
% 7.05/7.26  622[0:Res:616.2,34.0] || m_and_h_gate_v_in2(u,c_d,s2)*+ -> m_and_h_gate_v_in2(u,c_d,s3) m_and_h_gate_v_in2(u,c_r,s2).
% 7.05/7.26  624[0:Res:621.2,143.0] ||  -> m_and_h_gate_v_in2(u,c_d,s2) m_and_h_gate_v_out(u,c_r,s1)* m_and_h_gate_v_in1(u,c_r,s1).
% 7.05/7.26  625[0:Res:621.2,144.0] ||  -> m_and_h_gate_v_in2(u,c_d,s2) m_and_h_gate_v_out(u,c_r,s1)* m_and_h_gate_v_in2(u,c_r,s1).
% 7.05/7.26  627[0:Res:624.1,412.0] ||  -> m_and_h_gate_v_in2(u,c_d,s2) m_and_h_gate_v_in1(u,c_r,s1) node21(u,c_r,s0,s1)*.
% 7.05/7.26  630[0:Res:625.1,412.0] ||  -> m_and_h_gate_v_in2(u,c_d,s2) m_and_h_gate_v_in2(u,c_r,s1) node21(u,c_r,s0,s1)*.
% 7.05/7.26  659[0:Res:627.2,146.1] || m_and_h_gate_v_out(u,c_r,s1) -> m_and_h_gate_v_in2(u,c_d,s2) m_and_h_gate_v_in1(u,c_r,s1) node20(u,c_r,s0)*.
% 7.05/7.26  661[0:MRR:659.0,624.1] ||  -> m_and_h_gate_v_in2(u,c_d,s2) m_and_h_gate_v_in1(u,c_r,s1) node20(u,c_r,s0)*.
% 7.05/7.26  662[0:Res:661.2,143.0] ||  -> m_and_h_gate_v_in2(u,c_d,s2)* m_and_h_gate_v_in1(u,c_r,s1) m_and_h_gate_v_in1(u,c_r,s0).
% 7.05/7.26  663[0:Res:661.2,144.0] ||  -> m_and_h_gate_v_in2(u,c_d,s2)* m_and_h_gate_v_in1(u,c_r,s1) m_and_h_gate_v_in2(u,c_r,s0).
% 7.05/7.26  669[0:Res:662.0,278.1] node25(s2) ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s1) m_and_h_gate_v_in1(c_e_h_3,c_r,s0)*.
% 7.05/7.26  670[0:Res:662.0,277.1] node24(s2) ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s1) m_and_h_gate_v_in1(c_e_h_3,c_r,s0)*.
% 7.05/7.26  672[0:Res:662.0,279.1] node23(s2) ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s1) m_and_h_gate_v_in1(c_e_h_2,c_r,s0)*.
% 7.05/7.26  675[3:MRR:669.2,489.0] node25(s2) ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s1)*.
% 7.05/7.26  676[3:MRR:670.2,489.0] node24(s2) ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s1)*.
% 7.05/7.26  677[3:SoR:675.0,156.1] node26(s2) ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s1)* node23(s2) node24(s2).
% 7.05/7.26  678[3:MRR:677.3,676.0] node26(s2) ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s1)* node23(s2).
% 7.05/7.26  679[3:SoR:678.0,161.2] until2p29(s2) ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s1)* node23(s2) xuntil2p30(s2).
% 7.05/7.26  680[3:SoR:678.0,157.2] until27(s2) ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s1)* node23(s2) xuntil28(s2).
% 7.05/7.26  681[3:SSi:680.0,491.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s1)* node23(s2) xuntil28(s2).
% 7.05/7.26  684[4:Spt:681.1] ||  -> node23(s2)*.
% 7.05/7.26  689[4:MRR:672.0,684.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s1) m_and_h_gate_v_in1(c_e_h_2,c_r,s0)*.
% 7.05/7.26  691[4:Res:689.1,88.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s1) m_c_h_element_v_out(c_e_h_2,c_e,s0)*.
% 7.05/7.26  692[4:MRR:691.1,128.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s1)*.
% 7.05/7.26  693[4:Res:692.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.05/7.26  694[4:Res:693.0,515.0] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.05/7.26  700[4:Res:694.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)*+ -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.05/7.26  741[4:Res:693.0,595.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.05/7.26  861[4:Res:741.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.05/7.26  863[4:MRR:861.0,693.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.05/7.26  864[5:Spt:863.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.05/7.26  866[5:Res:864.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.05/7.26  867[5:MRR:866.0,142.0] ||  -> .
% 7.05/7.26  868[5:Spt:867.0,863.1,864.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0)* -> .
% 7.05/7.26  869[5:Spt:867.0,863.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.05/7.26  870[5:MRR:700.1,868.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> .
% 7.05/7.26  872[5:Res:869.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.05/7.26  873[5:MRR:872.0,872.1,870.0,868.0] ||  -> .
% 7.05/7.26  874[4:Spt:873.0,681.1,684.0] || node23(s2)*+ -> .
% 7.05/7.26  875[4:Spt:873.0,681.0,681.2] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s1)* xuntil28(s2).
% 7.05/7.26  877[4:MRR:679.2,874.0] until2p29(s2) ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s1)* xuntil2p30(s2).
% 7.05/7.26  880[5:Spt:875.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s1)*.
% 7.05/7.26  881[5:Res:880.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_e,s1)*.
% 7.05/7.26  883[5:Res:881.0,595.0] ||  -> node16(c_e_h_3,c_e,s0) node14(c_e_h_3,c_e,s0,s1)*.
% 7.05/7.26  885[5:Res:881.0,515.0] ||  -> node17(c_e_h_3,c_e,s0)*.
% 7.05/7.26  888[5:Res:885.0,135.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_3,c_e,s0).
% 7.05/7.26  889[5:Res:885.0,136.0] || m_c_h_element_v_in1(c_e_h_3,c_e,s0) -> m_c_h_element_v_in2(c_e_h_3,c_e,s0)*.
% 7.05/7.26  901[5:Res:883.1,130.1] || m_c_h_element_v_out(c_e_h_3,c_e,s1)* -> node16(c_e_h_3,c_e,s0) m_c_h_element_v_in1(c_e_h_3,c_e,s0).
% 7.05/7.26  903[5:MRR:901.0,881.0] ||  -> node16(c_e_h_3,c_e,s0) m_c_h_element_v_in1(c_e_h_3,c_e,s0)*.
% 7.05/7.26  904[6:Spt:903.0] ||  -> node16(c_e_h_3,c_e,s0)*.
% 7.05/7.26  905[6:Res:904.0,134.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s0)* m_c_h_element_v_in1(c_e_h_3,c_e,s0) -> .
% 7.05/7.26  906[6:Res:904.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_e,s0)* m_c_h_element_v_in1(c_e_h_3,c_e,s0).
% 7.05/7.26  907[6:MRR:906.0,888.0] ||  -> m_c_h_element_v_in1(c_e_h_3,c_e,s0)*.
% 7.05/7.26  908[6:MRR:889.0,907.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_e,s0)*.
% 7.05/7.26  909[6:MRR:905.0,905.1,908.0,907.0] ||  -> .
% 7.05/7.26  910[6:Spt:909.0,903.0,904.0] || node16(c_e_h_3,c_e,s0)* -> .
% 7.05/7.26  911[6:Spt:909.0,903.1] ||  -> m_c_h_element_v_in1(c_e_h_3,c_e,s0)*.
% 7.05/7.26  914[6:Res:911.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s0)*.
% 7.05/7.26  915[6:MRR:914.0,142.0] ||  -> .
% 7.05/7.26  916[5:Spt:915.0,875.0,880.0] || m_and_h_gate_v_in1(c_e_h_3,c_r,s1)*+ -> .
% 7.05/7.26  917[5:Spt:915.0,875.1] ||  -> xuntil28(s2)*.
% 7.05/7.26  918[5:MRR:175.0,917.0] ||  -> until27(s3)*.
% 7.05/7.26  924[5:MRR:877.1,916.0] until2p29(s2) ||  -> xuntil2p30(s2)*.
% 7.05/7.26  934[0:Res:663.0,622.0] ||  -> m_and_h_gate_v_in1(u,c_r,s1) m_and_h_gate_v_in2(u,c_r,s0) m_and_h_gate_v_in2(u,c_d,s3)* m_and_h_gate_v_in2(u,c_r,s2).
% 7.05/7.26  942[0:Res:69.1,470.0] || m_and_h_gate_h_init_v_in1(c_e_h_3,c_m,s0)*+ -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s1).
% 7.05/7.26  948[6:Spt:942.2] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s1)*.
% 7.05/7.26  952[6:Res:948.0,402.0] ||  -> node10(c_e_h_3,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2).
% 7.05/7.26  956[0:SoR:546.0,161.2] until2p29(s3) ||  -> node21(c_e_h_3,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_3,c_r,s2) node23(s3) xuntil2p30(s3).
% 7.05/7.26  957[0:SoR:546.0,157.2] until27(s3) ||  -> node21(c_e_h_3,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_3,c_r,s2) node23(s3) xuntil28(s3).
% 7.05/7.26  958[5:SSi:957.0,918.0] ||  -> node21(c_e_h_3,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_3,c_r,s2) node23(s3) xuntil28(s3).
% 7.05/7.26  961[6:Res:952.0,116.2] || m_and_h_gate_h_init_v_in2(c_e_h_3,c_m,s1)* m_and_h_gate_h_init_v_in1(c_e_h_3,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2) m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2).
% 7.05/7.26  962[6:Obv:961.2] || m_and_h_gate_h_init_v_in2(c_e_h_3,c_m,s1)*+ m_and_h_gate_h_init_v_in1(c_e_h_3,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2).
% 7.05/7.26  963[7:Spt:958.2] ||  -> node23(s3)*.
% 7.05/7.26  966[7:MRR:535.0,963.0] ||  -> node21(c_e_h_1,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_1,c_r,s2).
% 7.05/7.26  974[8:Spt:966.0] ||  -> node21(c_e_h_1,c_r,s2,s3)*.
% 7.05/7.26  975[8:Res:974.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s3)+ -> node20(c_e_h_1,c_r,s2)*.
% 7.05/7.26  1020[0:Res:75.1,471.0] || m_and_h_gate_h_init_v_in1(u,c_n,s0)*+ -> m_and_h_gate_h_init_v_out(u,c_m,s0) m_cell_v_token(u,s0) m_and_h_gate_h_init_v_out(u,c_n,s1).
% 7.05/7.26  1104[8:Res:220.1,975.0] node23(s3) ||  -> node20(c_e_h_1,c_r,s2)*.
% 7.05/7.26  1107[8:SSi:1104.0,918.0,963.0] ||  -> node20(c_e_h_1,c_r,s2)*.
% 7.05/7.26  1108[8:Res:1107.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.05/7.26  1109[8:Res:1107.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s2)*.
% 7.05/7.26  1115[8:Res:1108.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.05/7.26  1116[8:Res:1109.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.05/7.26  1120[8:Res:1115.0,586.0] ||  -> node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.05/7.26  1122[8:Res:1115.0,511.0] ||  -> node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.05/7.26  1132[8:Res:1116.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.05/7.26  1140[8:Res:1122.1,595.0] ||  -> node17(c_e_h_1,c_e,s1) node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.05/7.26  1142[8:Res:1122.1,515.0] ||  -> node17(c_e_h_1,c_e,s1) node17(c_e_h_1,c_e,s0)*.
% 7.05/7.26  1146[9:Spt:1142.0] ||  -> node17(c_e_h_1,c_e,s1)*.
% 7.05/7.26  1147[9:Res:1146.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.05/7.26  1214[8:Res:1132.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.05/7.26  1216[8:MRR:1214.0,1116.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.05/7.26  1222[8:Res:1216.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.05/7.26  1224[10:Spt:1222.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.05/7.26  1229[10:Res:1224.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.05/7.26  1255[10:Res:1229.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.26  1257[10:MRR:1255.0,1224.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.26  1265[10:Res:1257.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.26  1266[10:Res:1257.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.26  1267[11:Spt:1265.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.05/7.26  1272[11:Res:1267.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.05/7.26  1282[11:Res:1272.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.26  1284[11:MRR:1282.0,10.0] ||  -> .
% 7.05/7.26  1285[11:Spt:1284.0,1265.0,1267.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)* -> .
% 7.05/7.26  1286[11:Spt:1284.0,1265.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.26  1288[11:MRR:1266.0,1285.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.26  1292[11:Res:1288.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.26  1293[11:MRR:1292.0,10.0] ||  -> .
% 7.05/7.26  1294[10:Spt:1293.0,1222.0,1224.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*+ -> .
% 7.05/7.26  1295[10:Spt:1293.0,1222.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.05/7.26  1371[8:Res:1120.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s2) -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.05/7.26  1373[8:MRR:1371.0,1115.0] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.05/7.26  1374[11:Spt:1373.2] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s1)*.
% 7.05/7.26  1376[11:Res:1374.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)*.
% 7.05/7.26  1379[11:Res:1376.0,412.0] ||  -> node21(c_e_h_1,c_c,s0,s1)*.
% 7.05/7.26  1382[0:Res:73.1,1020.0] ||  -> m_c_h_element_v_out(u,c_e,s0) m_and_h_gate_h_init_v_out(u,c_m,s0)* m_cell_v_token(u,s0) m_and_h_gate_h_init_v_out(u,c_n,s1).
% 7.05/7.26  1383[0:MRR:1382.0,128.0] ||  -> m_and_h_gate_h_init_v_out(u,c_m,s0)* m_cell_v_token(u,s0) m_and_h_gate_h_init_v_out(u,c_n,s1).
% 7.05/7.26  1390[11:Res:1379.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s1) -> node20(c_e_h_1,c_c,s0)*.
% 7.05/7.26  1392[11:MRR:1390.0,1376.0] ||  -> node20(c_e_h_1,c_c,s0)*.
% 7.05/7.26  1400[11:Res:1392.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s0)*.
% 7.05/7.26  1402[11:Res:1400.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s0)*.
% 7.05/7.26  1403[11:MRR:1402.0,121.0] ||  -> .
% 7.05/7.26  1404[11:Spt:1403.0,1373.2,1374.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s1)*+ -> .
% 7.05/7.26  1405[11:Spt:1403.0,1373.0,1373.1] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.05/7.26  1406[11:MRR:1147.1,1404.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)*+ -> .
% 7.05/7.26  1408[11:Res:1405.1,595.0] ||  -> node16(c_e_h_1,c_e,s1) node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.05/7.26  1410[11:Res:1405.1,515.0] ||  -> node16(c_e_h_1,c_e,s1) node17(c_e_h_1,c_e,s0)*.
% 7.05/7.26  1421[12:Spt:1410.0] ||  -> node16(c_e_h_1,c_e,s1)*.
% 7.05/7.26  1423[12:Res:1421.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.05/7.26  1424[12:MRR:1423.0,1423.1,1406.0,1404.0] ||  -> .
% 7.05/7.26  1425[12:Spt:1424.0,1410.0,1421.0] || node16(c_e_h_1,c_e,s1)*+ -> .
% 7.05/7.26  1426[12:Spt:1424.0,1410.1] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.05/7.26  1427[12:MRR:1405.0,1425.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.05/7.26  1430[12:MRR:1408.0,1425.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.05/7.26  1431[12:Res:1426.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.05/7.26  1432[12:Res:1426.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.05/7.26  1448[12:Res:1430.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.05/7.26  1450[12:MRR:1448.0,1427.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.05/7.26  1451[13:Spt:1450.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.05/7.26  1452[13:Res:1451.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.05/7.26  1453[13:Res:1451.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.05/7.26  1454[13:MRR:1453.0,1431.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.05/7.26  1455[13:MRR:1432.0,1454.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.05/7.26  1456[13:MRR:1452.0,1452.1,1455.0,1454.0] ||  -> .
% 7.05/7.26  1457[13:Spt:1456.0,1450.0,1451.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.05/7.26  1458[13:Spt:1456.0,1450.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.05/7.26  1461[13:Res:1458.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.05/7.26  1462[13:MRR:1461.0,142.0] ||  -> .
% 7.05/7.26  1463[9:Spt:1462.0,1142.0,1146.0] || node17(c_e_h_1,c_e,s1)*+ -> .
% 7.05/7.26  1464[9:Spt:1462.0,1142.1] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.05/7.26  1465[9:MRR:1122.0,1463.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.05/7.26  1468[9:MRR:1140.0,1463.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.05/7.26  1469[9:Res:1464.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.05/7.26  1470[9:Res:1464.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.05/7.26  1517[9:Res:1468.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.05/7.26  1519[9:MRR:1517.0,1465.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.05/7.26  1520[10:Spt:1519.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.05/7.26  1521[10:Res:1520.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.05/7.26  1522[10:Res:1520.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.05/7.26  1523[10:MRR:1522.0,1469.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.05/7.26  1524[10:MRR:1470.0,1523.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.05/7.26  1525[10:MRR:1521.0,1521.1,1524.0,1523.0] ||  -> .
% 7.05/7.26  1526[10:Spt:1525.0,1519.0,1520.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.05/7.26  1527[10:Spt:1525.0,1519.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.05/7.26  1530[10:Res:1527.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.05/7.26  1531[10:MRR:1530.0,142.0] ||  -> .
% 7.05/7.26  1532[8:Spt:1531.0,966.0,974.0] || node21(c_e_h_1,c_r,s2,s3)*+ -> .
% 7.05/7.26  1533[8:Spt:1531.0,966.1] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2)*.
% 7.05/7.26  1536[8:Res:1533.0,410.0] ||  -> node21(c_e_h_1,c_r,s1,s2)* m_and_h_gate_v_out(c_e_h_1,c_r,s1).
% 7.05/7.26  1537[8:Res:1533.0,96.0] ||  -> m_user_v_ack(c_e_h_1,c_u,s2)*.
% 7.05/7.26  1539[8:Res:1537.0,34.0] || m_and_h_gate_v_in2(c_e_h_1,c_d,s2)*+ -> .
% 7.05/7.26  1548[8:Res:663.0,1539.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s1) m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.05/7.26  1591[8:Res:1536.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s2) -> m_and_h_gate_v_out(c_e_h_1,c_r,s1) node20(c_e_h_1,c_r,s1)*.
% 7.05/7.26  1593[8:MRR:1591.0,1533.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s1) node20(c_e_h_1,c_r,s1)*.
% 7.05/7.26  1626[9:Spt:1548.1] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.05/7.26  1627[9:Res:1626.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.05/7.26  1633[9:Res:1627.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.05/7.26  1635[9:Res:1633.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.26  1637[9:MRR:1635.0,10.0] ||  -> .
% 7.05/7.26  1638[9:Spt:1637.0,1548.1,1626.0] || m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*+ -> .
% 7.05/7.26  1639[9:Spt:1637.0,1548.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s1)*.
% 7.05/7.26  1641[9:Res:1639.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.05/7.26  1643[9:Res:1641.0,595.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.05/7.26  1645[9:Res:1641.0,515.0] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.05/7.26  1648[9:Res:1645.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.05/7.26  1649[9:Res:1645.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.05/7.26  1672[8:Res:1593.1,144.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s1)* m_and_h_gate_v_in2(c_e_h_1,c_r,s1).
% 7.05/7.26  1692[10:Spt:1672.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s1)*.
% 7.05/7.26  1694[10:Res:1692.0,412.0] ||  -> node21(c_e_h_1,c_r,s0,s1)*.
% 7.05/7.26  1698[10:Res:1694.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s1) -> node20(c_e_h_1,c_r,s0)*.
% 7.05/7.26  1700[10:MRR:1698.0,1692.0] ||  -> node20(c_e_h_1,c_r,s0)*.
% 7.05/7.26  1702[10:Res:1700.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.05/7.26  1703[10:MRR:1702.0,1638.0] ||  -> .
% 7.05/7.26  1704[10:Spt:1703.0,1672.0,1692.0] || m_and_h_gate_v_out(c_e_h_1,c_r,s1)*+ -> .
% 7.05/7.26  1705[10:Spt:1703.0,1672.1] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1)*.
% 7.05/7.26  1816[9:Res:1643.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.05/7.26  1818[9:MRR:1816.0,1641.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.05/7.26  1822[11:Spt:1818.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.05/7.26  1823[11:Res:1822.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.05/7.26  1824[11:Res:1822.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.05/7.26  1825[11:MRR:1824.0,1648.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.05/7.26  1826[11:MRR:1649.0,1825.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.05/7.26  1827[11:MRR:1823.0,1823.1,1826.0,1825.0] ||  -> .
% 7.05/7.26  1828[11:Spt:1827.0,1818.0,1822.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.05/7.26  1829[11:Spt:1827.0,1818.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.05/7.26  1832[11:Res:1829.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.05/7.26  1833[11:MRR:1832.0,142.0] ||  -> .
% 7.05/7.26  1834[7:Spt:1833.0,958.2,963.0] || node23(s3)*+ -> .
% 7.05/7.26  1835[7:Spt:1833.0,958.0,958.1,958.3] ||  -> node21(c_e_h_3,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_3,c_r,s2) xuntil28(s3).
% 7.05/7.26  1838[7:MRR:956.3,1834.0] until2p29(s3) ||  -> node21(c_e_h_3,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_3,c_r,s2) xuntil2p30(s3).
% 7.05/7.26  1839[8:Spt:1835.0] ||  -> node21(c_e_h_3,c_r,s2,s3)*.
% 7.05/7.26  1840[8:Res:1839.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_r,s3)+ -> node20(c_e_h_3,c_r,s2)*.
% 7.05/7.26  1841[8:Res:1839.0,145.2] || m_and_h_gate_v_in2(c_e_h_3,c_r,s2) m_and_h_gate_v_in1(c_e_h_3,c_r,s2) -> m_and_h_gate_v_out(c_e_h_3,c_r,s3)*.
% 7.05/7.26  1843[8:Res:217.1,1840.0] node25(s3) ||  -> node20(c_e_h_3,c_r,s2)*.
% 7.05/7.26  1844[8:Res:216.1,1840.0] node24(s3) ||  -> node20(c_e_h_3,c_r,s2)*.
% 7.05/7.26  1845[8:Res:592.1,1840.0] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_d,s4) m_and_h_gate_v_in2(c_e_h_3,c_r,s3) node20(c_e_h_3,c_r,s2)*.
% 7.05/7.26  1846[8:Res:591.1,1840.0] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_d,s4) m_and_h_gate_v_in1(c_e_h_3,c_r,s3) node20(c_e_h_3,c_r,s2)*.
% 7.05/7.26  1847[8:SoR:1843.0,156.1] node26(s3) ||  -> node20(c_e_h_3,c_r,s2)* node23(s3) node24(s3).
% 7.05/7.26  1848[8:MRR:1847.2,1834.0] node26(s3) ||  -> node20(c_e_h_3,c_r,s2)* node24(s3).
% 7.05/7.26  1849[8:MRR:1848.2,1844.0] node26(s3) ||  -> node20(c_e_h_3,c_r,s2)*.
% 7.05/7.26  1850[8:SoR:1849.0,161.2] until2p29(s3) ||  -> node20(c_e_h_3,c_r,s2)* xuntil2p30(s3).
% 7.05/7.26  1851[8:SoR:1849.0,157.2] until27(s3) ||  -> node20(c_e_h_3,c_r,s2)* xuntil28(s3).
% 7.05/7.26  1852[8:SSi:1851.0,918.0] ||  -> node20(c_e_h_3,c_r,s2)* xuntil28(s3).
% 7.05/7.26  1853[9:Spt:1852.0] ||  -> node20(c_e_h_3,c_r,s2)*.
% 7.05/7.26  1854[9:Res:1853.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.05/7.26  1858[9:Res:1854.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_e,s2)*.
% 7.05/7.26  1864[9:Res:1858.0,586.0] ||  -> node16(c_e_h_3,c_e,s1) node14(c_e_h_3,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_3,c_e,s1).
% 7.05/7.26  1866[9:Res:1858.0,511.0] ||  -> node17(c_e_h_3,c_e,s1) m_c_h_element_v_out(c_e_h_3,c_e,s1)*.
% 7.05/7.26  1885[9:Res:1866.1,87.0] ||  -> node17(c_e_h_3,c_e,s1) m_and_h_gate_v_in1(c_e_h_3,c_r,s1)*.
% 7.05/7.26  1886[9:MRR:1885.1,916.0] ||  -> node17(c_e_h_3,c_e,s1)*.
% 7.05/7.26  1888[9:Res:1886.0,135.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_3,c_e,s1).
% 7.05/7.26  1911[0:Res:1383.0,113.0] ||  -> m_cell_v_token(u,s0) m_and_h_gate_h_init_v_out(u,c_n,s1) m_and_h_gate_h_init_v_init_h_out(u,c_m,s0)*.
% 7.05/7.26  1912[0:MRR:1911.0,71.0] ||  -> m_and_h_gate_h_init_v_out(u,c_n,s1) m_and_h_gate_h_init_v_init_h_out(u,c_m,s0)*.
% 7.05/7.26  1913[0:Res:1912.1,72.0] ||  -> m_and_h_gate_h_init_v_out(u,c_n,s1)* m_cell_v_token(u,s0).
% 7.05/7.26  1915[0:Res:1913.0,70.0] || m_and_h_gate_h_init_v_in2(u,c_m,s1)*+ -> m_cell_v_token(u,s0).
% 7.05/7.26  1966[9:Res:1864.1,130.1] || m_c_h_element_v_out(c_e_h_3,c_e,s2) -> node16(c_e_h_3,c_e,s1) m_c_h_element_v_out(c_e_h_3,c_e,s1)* m_c_h_element_v_in1(c_e_h_3,c_e,s1).
% 7.05/7.26  1968[9:MRR:1966.0,1858.0] ||  -> node16(c_e_h_3,c_e,s1) m_c_h_element_v_out(c_e_h_3,c_e,s1)* m_c_h_element_v_in1(c_e_h_3,c_e,s1).
% 7.05/7.26  1969[0:SoR:537.0,161.2] until2p29(s4) ||  -> node21(c_e_h_2,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_2,c_r,s3) node24(s4) xuntil2p30(s4).
% 7.05/7.26  1970[0:SoR:537.0,157.2] until27(s4) ||  -> node21(c_e_h_2,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_2,c_r,s3) node24(s4) xuntil28(s4).
% 7.05/7.26  1971[0:MRR:1969.4,167.0] until2p29(s4) ||  -> node21(c_e_h_2,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_2,c_r,s3) node24(s4).
% 7.05/7.26  1972[10:Spt:1968.2] ||  -> m_c_h_element_v_in1(c_e_h_3,c_e,s1)*.
% 7.05/7.26  1974[10:Res:1972.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1)*.
% 7.05/7.26  1977[10:Res:1974.0,412.0] ||  -> node21(c_e_h_3,c_c,s0,s1)*.
% 7.05/7.26  1989[10:Res:1977.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_c,s1) -> node20(c_e_h_3,c_c,s0)*.
% 7.05/7.26  1991[10:MRR:1989.0,1974.0] ||  -> node20(c_e_h_3,c_c,s0)*.
% 7.05/7.26  1992[10:Res:1991.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_c,s0)*.
% 7.05/7.26  1997[10:Res:1992.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_3,c_a,s0)*.
% 7.05/7.26  1998[10:MRR:1997.0,121.0] ||  -> .
% 7.05/7.26  1999[10:Spt:1998.0,1968.2,1972.0] || m_c_h_element_v_in1(c_e_h_3,c_e,s1)* -> .
% 7.05/7.26  2000[10:Spt:1998.0,1968.0,1968.1] ||  -> node16(c_e_h_3,c_e,s1) m_c_h_element_v_out(c_e_h_3,c_e,s1)*.
% 7.05/7.26  2001[10:MRR:1888.1,1999.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s1)* -> .
% 7.05/7.26  2007[10:Res:2000.1,87.0] ||  -> node16(c_e_h_3,c_e,s1) m_and_h_gate_v_in1(c_e_h_3,c_r,s1)*.
% 7.05/7.26  2008[10:MRR:2007.1,916.0] ||  -> node16(c_e_h_3,c_e,s1)*.
% 7.05/7.26  2011[10:Res:2008.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_e,s1)* m_c_h_element_v_in1(c_e_h_3,c_e,s1).
% 7.05/7.26  2012[10:MRR:2011.0,2011.1,2001.0,1999.0] ||  -> .
% 7.05/7.26  2013[9:Spt:2012.0,1852.0,1853.0] || node20(c_e_h_3,c_r,s2)*+ -> .
% 7.05/7.26  2014[9:Spt:2012.0,1852.1] ||  -> xuntil28(s3)*.
% 7.05/7.26  2015[9:MRR:174.0,2014.0] ||  -> until27(s4)*.
% 7.05/7.26  2016[9:MRR:1970.0,2015.0] ||  -> node21(c_e_h_2,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_2,c_r,s3) node24(s4) xuntil28(s4).
% 7.05/7.26  2025[9:MRR:1840.1,2013.0] || m_and_h_gate_v_out(c_e_h_3,c_r,s3)*+ -> .
% 7.05/7.26  2026[9:MRR:1850.1,2013.0] until2p29(s3) ||  -> xuntil2p30(s3)*.
% 7.05/7.26  2027[9:MRR:1845.2,2013.0] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_d,s4)* m_and_h_gate_v_in2(c_e_h_3,c_r,s3).
% 7.05/7.26  2028[9:MRR:1846.2,2013.0] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_d,s4)* m_and_h_gate_v_in1(c_e_h_3,c_r,s3).
% 7.05/7.26  2031[9:MRR:1841.2,2025.0] || m_and_h_gate_v_in2(c_e_h_3,c_r,s2)*+ m_and_h_gate_v_in1(c_e_h_3,c_r,s2) -> .
% 7.05/7.26  2049[9:Res:2027.0,278.1] node25(s4) ||  -> m_and_h_gate_v_in2(c_e_h_3,c_r,s3)*.
% 7.05/7.26  2050[9:Res:2027.0,277.1] node24(s4) ||  -> m_and_h_gate_v_in2(c_e_h_3,c_r,s3)*.
% 7.05/7.26  2051[9:SoR:2049.0,156.1] node26(s4) ||  -> m_and_h_gate_v_in2(c_e_h_3,c_r,s3)* node23(s4) node24(s4).
% 7.05/7.26  2052[9:MRR:2051.3,2050.0] node26(s4) ||  -> m_and_h_gate_v_in2(c_e_h_3,c_r,s3)* node23(s4).
% 7.05/7.26  2053[9:Res:2028.0,278.1] node25(s4) ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s3)*.
% 7.05/7.26  2054[9:Res:2028.0,277.1] node24(s4) ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s3)*.
% 7.05/7.26  2055[9:SoR:2053.0,156.1] node26(s4) ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s3)* node23(s4) node24(s4).
% 7.05/7.26  2056[9:MRR:2055.3,2054.0] node26(s4) ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s3)* node23(s4).
% 7.05/7.26  2065[9:SoR:2052.0,161.2] until2p29(s4) ||  -> m_and_h_gate_v_in2(c_e_h_3,c_r,s3)* node23(s4) xuntil2p30(s4).
% 7.05/7.26  2066[9:SoR:2052.0,157.2] until27(s4) ||  -> m_and_h_gate_v_in2(c_e_h_3,c_r,s3)* node23(s4) xuntil28(s4).
% 7.05/7.26  2067[9:MRR:2065.3,167.0] until2p29(s4) ||  -> m_and_h_gate_v_in2(c_e_h_3,c_r,s3)* node23(s4).
% 7.05/7.26  2068[9:SSi:2066.0,5.0,2015.0] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_r,s3)* node23(s4) xuntil28(s4).
% 7.05/7.26  2069[10:Spt:2068.0] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_r,s3)*.
% 7.05/7.26  2071[10:Res:2069.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s3)*.
% 7.05/7.26  2077[10:Res:2071.0,390.0] ||  -> node10(c_e_h_3,c_m,s2,s3)* m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2).
% 7.05/7.26  2078[11:Spt:2016.0] ||  -> node21(c_e_h_2,c_r,s3,s4)*.
% 7.05/7.26  2079[11:Res:2078.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_r,s4)+ -> node20(c_e_h_2,c_r,s3)*.
% 7.05/7.26  2083[9:SoR:2056.0,161.2] until2p29(s4) ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s3)* node23(s4) xuntil2p30(s4).
% 7.05/7.26  2084[9:SoR:2056.0,157.2] until27(s4) ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s3)* node23(s4) xuntil28(s4).
% 7.05/7.26  2085[9:MRR:2083.3,167.0] until2p29(s4) ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s3)* node23(s4).
% 7.05/7.26  2086[9:SSi:2084.0,5.0,2015.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s3)* node23(s4) xuntil28(s4).
% 7.05/7.26  2087[12:Spt:2086.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s3)*.
% 7.05/7.26  2090[12:Res:2087.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_e,s3)*.
% 7.05/7.26  2091[0:Res:630.2,146.1] || m_and_h_gate_v_out(u,c_r,s1) -> m_and_h_gate_v_in2(u,c_d,s2) m_and_h_gate_v_in2(u,c_r,s1) node20(u,c_r,s0)*.
% 7.05/7.26  2093[0:MRR:2091.0,625.1] ||  -> m_and_h_gate_v_in2(u,c_d,s2) m_and_h_gate_v_in2(u,c_r,s1) node20(u,c_r,s0)*.
% 7.05/7.26  2098[12:Res:2090.0,582.0] ||  -> node16(c_e_h_3,c_e,s2) node14(c_e_h_3,c_e,s2,s3)* m_c_h_element_v_out(c_e_h_3,c_e,s2).
% 7.05/7.26  2100[12:Res:2090.0,509.0] ||  -> node17(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)*.
% 7.05/7.26  2108[12:Res:2100.1,586.0] ||  -> node17(c_e_h_3,c_e,s2) node16(c_e_h_3,c_e,s1) node14(c_e_h_3,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_3,c_e,s1).
% 7.05/7.26  2110[12:Res:2100.1,511.0] ||  -> node17(c_e_h_3,c_e,s2) node17(c_e_h_3,c_e,s1) m_c_h_element_v_out(c_e_h_3,c_e,s1)*.
% 7.05/7.26  2113[12:Res:2100.1,87.0] ||  -> node17(c_e_h_3,c_e,s2) m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.05/7.26  2121[13:Spt:2113.0] ||  -> node17(c_e_h_3,c_e,s2)*.
% 7.05/7.26  2122[13:Res:2121.0,135.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s2)*+ -> m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.05/7.26  2130[14:Spt:2077.1] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2)*.
% 7.05/7.26  2133[14:Res:2130.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_r,s2)*.
% 7.05/7.26  2136[14:MRR:2031.0,2133.0] || m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*+ -> .
% 7.05/7.26  2144[11:Res:222.1,2079.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_d,s4) node20(c_e_h_2,c_r,s3)*.
% 7.05/7.26  2146[11:Res:218.1,2079.0] node23(s4) ||  -> node20(c_e_h_2,c_r,s3)*.
% 7.05/7.26  2304[0:Res:2093.2,143.0] ||  -> m_and_h_gate_v_in2(u,c_d,s2)* m_and_h_gate_v_in2(u,c_r,s1) m_and_h_gate_v_in1(u,c_r,s0).
% 7.05/7.26  2305[0:Res:2093.2,144.0] ||  -> m_and_h_gate_v_in2(u,c_d,s2)* m_and_h_gate_v_in2(u,c_r,s1) m_and_h_gate_v_in2(u,c_r,s0).
% 7.05/7.26  2328[12:Res:2098.1,130.1] || m_c_h_element_v_out(c_e_h_3,c_e,s3) -> node16(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.05/7.26  2330[12:MRR:2328.0,2090.0] ||  -> node16(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.05/7.26  2331[15:Spt:2330.2] ||  -> m_c_h_element_v_in1(c_e_h_3,c_e,s2)*.
% 7.05/7.26  2333[15:Res:2331.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s2)*.
% 7.05/7.26  2339[15:Res:2333.0,410.0] ||  -> node21(c_e_h_3,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_3,c_c,s1).
% 7.05/7.26  2359[15:Res:2339.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_c,s2) -> m_and_h_gate_v_out(c_e_h_3,c_c,s1) node20(c_e_h_3,c_c,s1)*.
% 7.05/7.26  2361[15:MRR:2359.0,2333.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1) node20(c_e_h_3,c_c,s1)*.
% 7.05/7.26  2362[15:Res:2361.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1)* m_and_h_gate_v_in1(c_e_h_3,c_c,s1).
% 7.05/7.26  2364[16:Spt:2362.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1)*.
% 7.05/7.26  2366[16:Res:2364.0,412.0] ||  -> node21(c_e_h_3,c_c,s0,s1)*.
% 7.05/7.26  2378[16:Res:2366.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_c,s1) -> node20(c_e_h_3,c_c,s0)*.
% 7.05/7.26  2380[16:MRR:2378.0,2364.0] ||  -> node20(c_e_h_3,c_c,s0)*.
% 7.05/7.26  2381[16:Res:2380.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_c,s0)*.
% 7.05/7.26  2388[16:Res:2381.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_3,c_a,s0)*.
% 7.05/7.26  2389[16:MRR:2388.0,121.0] ||  -> .
% 7.05/7.26  2390[16:Spt:2389.0,2362.0,2364.0] || m_and_h_gate_v_out(c_e_h_3,c_c,s1)*+ -> .
% 7.05/7.26  2391[16:Spt:2389.0,2362.1] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_c,s1)*.
% 7.05/7.26  2395[16:Res:2391.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_3,c_a,s1)*.
% 7.05/7.26  2400[16:Res:2395.0,375.0] ||  -> node12(c_e_h_3,c_a,s0,s1)*.
% 7.05/7.26  2407[16:Res:2400.0,123.1] || m_mutex_h_half_v_out(c_e_h_3,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_3,c_a,s0).
% 7.05/7.26  2409[16:MRR:2407.0,2395.0] ||  -> m_mutex_h_half_v_inp(c_e_h_3,c_a,s0)*.
% 7.05/7.26  2418[16:Res:2409.0,18.0] ||  -> m_user_v_req(c_e_h_3,c_u,s0)*.
% 7.05/7.26  2419[16:MRR:2418.0,106.0] ||  -> .
% 7.05/7.26  2420[15:Spt:2419.0,2330.2,2331.0] || m_c_h_element_v_in1(c_e_h_3,c_e,s2)* -> .
% 7.05/7.26  2421[15:Spt:2419.0,2330.0,2330.1] ||  -> node16(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)*.
% 7.05/7.26  2422[15:MRR:2122.1,2420.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s2)* -> .
% 7.05/7.26  2428[15:Res:2421.1,87.0] ||  -> node16(c_e_h_3,c_e,s2) m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.05/7.26  2429[15:MRR:2428.1,2136.0] ||  -> node16(c_e_h_3,c_e,s2)*.
% 7.05/7.26  2432[15:Res:2429.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.05/7.26  2433[15:MRR:2432.0,2432.1,2422.0,2420.0] ||  -> .
% 7.05/7.26  2434[14:Spt:2433.0,2077.1,2130.0] || m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2)*+ -> .
% 7.05/7.26  2435[14:Spt:2433.0,2077.0] ||  -> node10(c_e_h_3,c_m,s2,s3)*.
% 7.05/7.26  2437[14:MRR:962.2,2434.0] || m_and_h_gate_h_init_v_in2(c_e_h_3,c_m,s1)*+ m_and_h_gate_h_init_v_in1(c_e_h_3,c_m,s1) -> .
% 7.05/7.26  2630[14:Res:69.1,2437.0] || m_and_h_gate_h_init_v_in1(c_e_h_3,c_m,s1)*+ -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1).
% 7.05/7.26  2631[14:Res:67.1,2630.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1) m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1)*.
% 7.05/7.26  2633[14:Res:2631.1,81.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1)* m_and_h_gate_v_in2(c_e_h_3,c_p,s1).
% 7.05/7.26  2636[14:Res:2631.1,392.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1) node10(c_e_h_3,c_n,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0).
% 7.05/7.26  2639[15:Spt:2633.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1)*.
% 7.05/7.26  2641[15:Res:2639.0,595.0] ||  -> node16(c_e_h_3,c_f,s0) node14(c_e_h_3,c_f,s0,s1)*.
% 7.05/7.26  2643[15:Res:2639.0,515.0] ||  -> node17(c_e_h_3,c_f,s0)*.
% 7.05/7.26  2646[15:Res:2643.0,135.0] || m_c_h_element_v_in2(c_e_h_3,c_f,s0)* -> m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.26  2647[15:Res:2643.0,136.0] || m_c_h_element_v_in1(c_e_h_3,c_f,s0) -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)*.
% 7.05/7.26  2664[15:Res:2641.1,130.1] || m_c_h_element_v_out(c_e_h_3,c_f,s1)* -> node16(c_e_h_3,c_f,s0) m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.26  2666[15:MRR:2664.0,2639.0] ||  -> node16(c_e_h_3,c_f,s0) m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.26  2667[16:Spt:2666.0] ||  -> node16(c_e_h_3,c_f,s0)*.
% 7.05/7.26  2668[16:Res:2667.0,134.0] || m_c_h_element_v_in2(c_e_h_3,c_f,s0)* m_c_h_element_v_in1(c_e_h_3,c_f,s0) -> .
% 7.05/7.26  2669[16:Res:2667.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)* m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.26  2670[16:MRR:2669.0,2646.0] ||  -> m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.26  2671[16:MRR:2647.0,2670.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)*.
% 7.05/7.26  2672[16:MRR:2668.0,2668.1,2671.0,2670.0] ||  -> .
% 7.05/7.26  2673[16:Spt:2672.0,2666.0,2667.0] || node16(c_e_h_3,c_f,s0)* -> .
% 7.05/7.26  2674[16:Spt:2672.0,2666.1] ||  -> m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.26  2677[16:Res:2674.0,40.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_d,s0)*.
% 7.05/7.26  2678[16:MRR:2677.0,142.0] ||  -> .
% 7.05/7.26  2679[15:Spt:2678.0,2633.0,2639.0] || m_c_h_element_v_out(c_e_h_3,c_f,s1)*+ -> .
% 7.05/7.26  2680[15:Spt:2678.0,2633.1] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_p,s1)*.
% 7.05/7.26  2681[15:MRR:2631.0,2679.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1)*.
% 7.05/7.26  2685[15:MRR:2636.0,2679.0] ||  -> node10(c_e_h_3,c_n,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0).
% 7.05/7.26  2701[15:Res:2685.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1) -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) node9(c_e_h_3,c_n,s0)*.
% 7.05/7.26  2703[15:MRR:2701.0,2681.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) node9(c_e_h_3,c_n,s0)*.
% 7.05/7.26  2705[15:Res:2703.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) m_and_h_gate_h_init_v_in2(c_e_h_3,c_n,s0)*.
% 7.05/7.26  2706[15:MRR:2705.1,273.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0)*.
% 7.05/7.26  2711[15:Res:2706.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_3,c_n,s0)*.
% 7.05/7.26  2717[15:Res:2711.0,78.1] || m_cell_v_token(c_e_h_3,s0)* -> .
% 7.05/7.26  2719[15:MRR:2717.0,16.0] ||  -> .
% 7.05/7.26  2720[13:Spt:2719.0,2113.0,2121.0] || node17(c_e_h_3,c_e,s2)*+ -> .
% 7.05/7.26  2721[13:Spt:2719.0,2113.1] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.05/7.26  2723[13:MRR:2100.0,2720.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_e,s2)*.
% 7.05/7.26  2725[13:MRR:2110.0,2720.0] ||  -> node17(c_e_h_3,c_e,s1) m_c_h_element_v_out(c_e_h_3,c_e,s1)*.
% 7.05/7.26  2726[13:MRR:2108.0,2720.0] ||  -> node16(c_e_h_3,c_e,s1) node14(c_e_h_3,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_3,c_e,s1).
% 7.05/7.26  2784[13:Res:2725.1,87.0] ||  -> node17(c_e_h_3,c_e,s1) m_and_h_gate_v_in1(c_e_h_3,c_r,s1)*.
% 7.05/7.26  2785[13:MRR:2784.1,916.0] ||  -> node17(c_e_h_3,c_e,s1)*.
% 7.05/7.26  2787[13:Res:2785.0,135.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_3,c_e,s1).
% 7.05/7.26  2917[13:Res:2726.1,130.1] || m_c_h_element_v_out(c_e_h_3,c_e,s2) -> node16(c_e_h_3,c_e,s1) m_c_h_element_v_out(c_e_h_3,c_e,s1)* m_c_h_element_v_in1(c_e_h_3,c_e,s1).
% 7.05/7.26  2919[13:MRR:2917.0,2723.0] ||  -> node16(c_e_h_3,c_e,s1) m_c_h_element_v_out(c_e_h_3,c_e,s1)* m_c_h_element_v_in1(c_e_h_3,c_e,s1).
% 7.05/7.26  2920[14:Spt:2919.2] ||  -> m_c_h_element_v_in1(c_e_h_3,c_e,s1)*.
% 7.05/7.26  2922[14:Res:2920.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1)*.
% 7.05/7.26  2926[14:Res:2922.0,412.0] ||  -> node21(c_e_h_3,c_c,s0,s1)*.
% 7.05/7.26  2938[14:Res:2926.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_c,s1) -> node20(c_e_h_3,c_c,s0)*.
% 7.05/7.26  2940[14:MRR:2938.0,2922.0] ||  -> node20(c_e_h_3,c_c,s0)*.
% 7.05/7.26  2941[14:Res:2940.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_c,s0)*.
% 7.05/7.26  2943[14:Res:2941.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_3,c_a,s0)*.
% 7.05/7.26  2944[14:MRR:2943.0,121.0] ||  -> .
% 7.05/7.26  2945[14:Spt:2944.0,2919.2,2920.0] || m_c_h_element_v_in1(c_e_h_3,c_e,s1)*+ -> .
% 7.05/7.26  2946[14:Spt:2944.0,2919.0,2919.1] ||  -> node16(c_e_h_3,c_e,s1) m_c_h_element_v_out(c_e_h_3,c_e,s1)*.
% 7.05/7.26  2947[14:MRR:2787.1,2945.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s1)* -> .
% 7.05/7.26  2953[14:Res:2946.1,87.0] ||  -> node16(c_e_h_3,c_e,s1) m_and_h_gate_v_in1(c_e_h_3,c_r,s1)*.
% 7.05/7.26  2954[14:MRR:2953.1,916.0] ||  -> node16(c_e_h_3,c_e,s1)*.
% 7.05/7.26  2957[14:Res:2954.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_e,s1)* m_c_h_element_v_in1(c_e_h_3,c_e,s1).
% 7.05/7.26  2958[14:MRR:2957.1,2945.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_e,s1)*.
% 7.05/7.26  2959[14:MRR:2958.0,2947.0] ||  -> .
% 7.05/7.26  2960[12:Spt:2959.0,2086.0,2087.0] || m_and_h_gate_v_in1(c_e_h_3,c_r,s3)*+ -> .
% 7.05/7.26  2961[12:Spt:2959.0,2086.1,2086.2] ||  -> node23(s4)* xuntil28(s4).
% 7.05/7.26  2967[12:MRR:2085.1,2960.0] until2p29(s4) ||  -> node23(s4)*.
% 7.05/7.26  2968[13:Spt:2961.1] ||  -> xuntil28(s4)*.
% 7.05/7.26  2969[13:MRR:168.0,2968.0] ||  -> loop*.
% 7.05/7.26  2970[13:MRR:178.0,2968.0] || trans(s4,u)*+ -> until2p29(u).
% 7.05/7.26  2971[13:MRR:7.0,2969.0] ||  -> trans(s4,s4) trans(s4,s3) trans(s4,s2) trans(s4,s1) trans(s4,s0)*.
% 7.05/7.26  2984[13:Res:2971.4,2970.0] ||  -> trans(s4,s4) trans(s4,s3) trans(s4,s2) trans(s4,s1)* until2p29(s0).
% 7.05/7.26  2988[14:Spt:2144.1] ||  -> node20(c_e_h_2,c_r,s3)*.
% 7.05/7.26  2989[14:Res:2988.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s3)*.
% 7.05/7.26  2990[14:Res:2988.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s3)*.
% 7.05/7.26  3014[14:Res:2989.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s3)*.
% 7.05/7.26  3015[14:Res:2990.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s3)*.
% 7.05/7.26  3019[14:Res:3014.0,582.0] ||  -> node16(c_e_h_2,c_e,s2) node14(c_e_h_2,c_e,s2,s3)* m_c_h_element_v_out(c_e_h_2,c_e,s2).
% 7.05/7.26  3021[14:Res:3014.0,509.0] ||  -> node17(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.05/7.26  3031[14:Res:3015.0,390.0] ||  -> node10(c_e_h_2,c_m,s2,s3)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2).
% 7.05/7.26  3039[14:Res:3021.1,586.0] ||  -> node17(c_e_h_2,c_e,s2) node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.05/7.26  3041[14:Res:3021.1,511.0] ||  -> node17(c_e_h_2,c_e,s2) node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.05/7.26  3044[14:Res:3021.1,87.0] ||  -> node17(c_e_h_2,c_e,s2) m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.05/7.26  3053[15:Spt:3044.0] ||  -> node17(c_e_h_2,c_e,s2)*.
% 7.05/7.26  3054[15:Res:3053.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s2)*+ -> m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.05/7.26  3081[14:Res:3031.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s3) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) node9(c_e_h_2,c_m,s2)*.
% 7.05/7.26  3083[14:MRR:3081.0,3015.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) node9(c_e_h_2,c_m,s2)*.
% 7.05/7.26  3084[14:Res:3083.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s2)*.
% 7.05/7.26  3085[14:Res:3083.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s2)*.
% 7.05/7.26  3088[16:Spt:3084.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.05/7.26  3093[16:Res:3088.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.05/7.26  3159[16:Res:3093.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.05/7.26  3161[16:MRR:3159.0,3088.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.05/7.26  3162[16:Res:3161.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.05/7.26  3163[16:Res:3161.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.05/7.26  3164[17:Spt:3162.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.05/7.26  3170[17:Res:3164.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.05/7.26  3232[17:Res:3170.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.26  3234[17:MRR:3232.0,3164.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.26  3235[17:Res:3234.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.26  3236[17:Res:3234.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.26  3237[18:Spt:3235.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.05/7.26  3242[18:Res:3237.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.05/7.26  3248[18:Res:3242.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.26  3250[18:MRR:3248.0,13.0] ||  -> .
% 7.05/7.26  3251[18:Spt:3250.0,3235.0,3237.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*+ -> .
% 7.05/7.26  3252[18:Spt:3250.0,3235.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.26  3254[18:MRR:3236.0,3251.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.26  3261[18:Res:3254.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.26  3262[18:MRR:3261.0,13.0] ||  -> .
% 7.05/7.26  3263[17:Spt:3262.0,3162.0,3164.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)* -> .
% 7.05/7.26  3264[17:Spt:3262.0,3162.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.05/7.26  3266[17:MRR:3163.0,3263.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.05/7.26  3272[17:Res:3266.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.26  3273[17:MRR:3272.0,13.0] ||  -> .
% 7.05/7.26  3274[16:Spt:3273.0,3084.0,3088.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*+ -> .
% 7.05/7.26  3275[16:Spt:3273.0,3084.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s2)*.
% 7.05/7.26  3548[14:Res:3019.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s3) -> node16(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)* m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.05/7.26  3550[14:MRR:3548.0,3014.0] ||  -> node16(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)* m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.05/7.26  3551[17:Spt:3550.2] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s2)*.
% 7.05/7.26  3553[17:Res:3551.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s2)*.
% 7.05/7.26  3559[17:Res:3553.0,410.0] ||  -> node21(c_e_h_2,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_2,c_c,s1).
% 7.05/7.26  3574[17:Res:3559.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s2) -> m_and_h_gate_v_out(c_e_h_2,c_c,s1) node20(c_e_h_2,c_c,s1)*.
% 7.05/7.26  3576[17:MRR:3574.0,3553.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1) node20(c_e_h_2,c_c,s1)*.
% 7.05/7.26  3577[17:Res:3576.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)* m_and_h_gate_v_in1(c_e_h_2,c_c,s1).
% 7.05/7.26  3580[18:Spt:3577.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)*.
% 7.05/7.26  3583[18:Res:3580.0,412.0] ||  -> node21(c_e_h_2,c_c,s0,s1)*.
% 7.05/7.26  3588[18:Res:3583.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s1) -> node20(c_e_h_2,c_c,s0)*.
% 7.05/7.26  3590[18:MRR:3588.0,3580.0] ||  -> node20(c_e_h_2,c_c,s0)*.
% 7.05/7.26  3598[18:Res:3590.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s0)*.
% 7.05/7.26  3600[18:Res:3598.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s0)*.
% 7.05/7.26  3601[18:MRR:3600.0,121.0] ||  -> .
% 7.05/7.26  3602[18:Spt:3601.0,3577.0,3580.0] || m_and_h_gate_v_out(c_e_h_2,c_c,s1)*+ -> .
% 7.05/7.26  3603[18:Spt:3601.0,3577.1] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s1)*.
% 7.05/7.26  3607[18:Res:3603.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s1)*.
% 7.05/7.26  3613[18:Res:3607.0,375.0] ||  -> node12(c_e_h_2,c_a,s0,s1)*.
% 7.05/7.26  3627[18:Res:3613.0,123.1] || m_mutex_h_half_v_out(c_e_h_2,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_2,c_a,s0).
% 7.05/7.26  3629[18:MRR:3627.0,3607.0] ||  -> m_mutex_h_half_v_inp(c_e_h_2,c_a,s0)*.
% 7.05/7.26  3630[18:Res:3629.0,18.0] ||  -> m_user_v_req(c_e_h_2,c_u,s0)*.
% 7.05/7.26  3631[18:MRR:3630.0,106.0] ||  -> .
% 7.05/7.26  3632[17:Spt:3631.0,3550.2,3551.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s2)*+ -> .
% 7.05/7.26  3633[17:Spt:3631.0,3550.0,3550.1] ||  -> node16(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.05/7.26  3634[17:MRR:3054.1,3632.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s2)*+ -> .
% 7.05/7.26  3635[17:Res:3633.1,586.0] ||  -> node16(c_e_h_2,c_e,s2) node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.05/7.26  3637[17:Res:3633.1,511.0] ||  -> node16(c_e_h_2,c_e,s2) node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.05/7.26  3640[17:Res:3633.1,87.0] ||  -> node16(c_e_h_2,c_e,s2) m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.05/7.26  3649[18:Spt:3640.0] ||  -> node16(c_e_h_2,c_e,s2)*.
% 7.05/7.26  3651[18:Res:3649.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s2)* m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.05/7.26  3652[18:MRR:3651.0,3651.1,3634.0,3632.0] ||  -> .
% 7.05/7.26  3653[18:Spt:3652.0,3640.0,3649.0] || node16(c_e_h_2,c_e,s2)*+ -> .
% 7.05/7.26  3654[18:Spt:3652.0,3640.1] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.05/7.26  3655[18:MRR:3633.0,3653.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.05/7.26  3657[18:MRR:3637.0,3653.0] ||  -> node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.05/7.26  3658[18:MRR:3635.0,3653.0] ||  -> node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.05/7.26  3677[18:Res:3657.1,595.0] ||  -> node17(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.05/7.26  3679[18:Res:3657.1,515.0] ||  -> node17(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.05/7.26  3683[19:Spt:3679.0] ||  -> node17(c_e_h_2,c_e,s1)*.
% 7.05/7.26  3684[19:Res:3683.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.05/7.26  3837[18:Res:3658.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s2) -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.05/7.26  3839[18:MRR:3837.0,3655.0] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.05/7.26  3840[20:Spt:3839.2] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s1)*.
% 7.05/7.26  3842[20:Res:3840.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)*.
% 7.05/7.26  3847[20:Res:3842.0,412.0] ||  -> node21(c_e_h_2,c_c,s0,s1)*.
% 7.05/7.26  3866[20:Res:3847.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s1) -> node20(c_e_h_2,c_c,s0)*.
% 7.05/7.26  3868[20:MRR:3866.0,3842.0] ||  -> node20(c_e_h_2,c_c,s0)*.
% 7.05/7.26  3869[20:Res:3868.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s0)*.
% 7.05/7.26  3871[20:Res:3869.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s0)*.
% 7.05/7.26  3872[20:MRR:3871.0,121.0] ||  -> .
% 7.05/7.26  3873[20:Spt:3872.0,3839.2,3840.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s1)*+ -> .
% 7.05/7.26  3874[20:Spt:3872.0,3839.0,3839.1] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.05/7.26  3875[20:MRR:3684.1,3873.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> .
% 7.05/7.26  3879[20:Res:3874.1,595.0] ||  -> node16(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.05/7.26  3881[20:Res:3874.1,515.0] ||  -> node16(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.05/7.26  3885[21:Spt:3881.0] ||  -> node16(c_e_h_2,c_e,s1)*.
% 7.05/7.26  3887[21:Res:3885.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.05/7.26  3888[21:MRR:3887.0,3887.1,3875.0,3873.0] ||  -> .
% 7.05/7.26  3889[21:Spt:3888.0,3881.0,3885.0] || node16(c_e_h_2,c_e,s1)*+ -> .
% 7.05/7.26  3890[21:Spt:3888.0,3881.1] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.05/7.26  3891[21:MRR:3874.0,3889.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.05/7.26  3895[21:MRR:3879.0,3889.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.05/7.26  3897[21:Res:3890.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.05/7.26  3898[21:Res:3890.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.05/7.26  3936[21:Res:3895.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.05/7.26  3938[21:MRR:3936.0,3891.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.05/7.26  3939[22:Spt:3938.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.05/7.26  3940[22:Res:3939.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.05/7.26  3941[22:Res:3939.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.05/7.26  3942[22:MRR:3941.0,3897.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.05/7.26  3943[22:MRR:3898.0,3942.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.05/7.26  3944[22:MRR:3940.0,3940.1,3943.0,3942.0] ||  -> .
% 7.05/7.26  3945[22:Spt:3944.0,3938.0,3939.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.05/7.26  3946[22:Spt:3944.0,3938.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.05/7.26  3949[22:Res:3946.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.05/7.26  3950[22:MRR:3949.0,142.0] ||  -> .
% 7.05/7.26  3951[19:Spt:3950.0,3679.0,3683.0] || node17(c_e_h_2,c_e,s1)*+ -> .
% 7.05/7.26  3952[19:Spt:3950.0,3679.1] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.05/7.26  3953[19:MRR:3657.0,3951.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.05/7.26  3957[19:MRR:3677.0,3951.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.05/7.26  3959[19:Res:3952.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.05/7.26  3960[19:Res:3952.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.05/7.26  3981[19:Res:3957.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.05/7.26  3983[19:MRR:3981.0,3953.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.05/7.26  3984[20:Spt:3983.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.05/7.26  3985[20:Res:3984.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.05/7.26  3986[20:Res:3984.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.05/7.26  3987[20:MRR:3986.0,3959.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.05/7.26  3988[20:MRR:3960.0,3987.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.05/7.26  3989[20:MRR:3985.0,3985.1,3988.0,3987.0] ||  -> .
% 7.05/7.26  3990[20:Spt:3989.0,3983.0,3984.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.05/7.26  3991[20:Spt:3989.0,3983.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.05/7.26  3994[20:Res:3991.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.05/7.26  3995[20:MRR:3994.0,142.0] ||  -> .
% 7.05/7.26  3996[15:Spt:3995.0,3044.0,3053.0] || node17(c_e_h_2,c_e,s2)*+ -> .
% 7.05/7.26  3997[15:Spt:3995.0,3044.1] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.05/7.26  3998[15:MRR:3021.0,3996.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.05/7.26  4001[15:MRR:3041.0,3996.0] ||  -> node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.05/7.26  4002[15:MRR:3039.0,3996.0] ||  -> node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.05/7.26  4079[15:Res:4001.1,595.0] ||  -> node17(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.05/7.26  4081[15:Res:4001.1,515.0] ||  -> node17(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.05/7.26  4083[15:Res:4001.1,87.0] ||  -> node17(c_e_h_2,c_e,s1) m_and_h_gate_v_in1(c_e_h_2,c_r,s1)*.
% 7.05/7.26  4623[16:Spt:4083.0] ||  -> node17(c_e_h_2,c_e,s1)*.
% 7.05/7.26  4624[16:Res:4623.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.05/7.26  4626[17:Spt:3085.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.05/7.26  4631[17:Res:4626.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.05/7.26  4734[17:Res:4631.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.05/7.26  4736[17:MRR:4734.0,4626.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.05/7.26  4739[17:Res:4736.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.05/7.26  4740[17:Res:4736.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.05/7.26  4741[18:Spt:4739.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.05/7.26  4747[18:Res:4741.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.05/7.26  4805[18:Res:4747.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.26  4807[18:MRR:4805.0,4741.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.26  4808[18:Res:4807.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.26  4809[18:Res:4807.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.26  4820[19:Spt:4808.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.05/7.26  4825[19:Res:4820.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.05/7.26  4828[19:Res:4825.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.26  4830[19:MRR:4828.0,13.0] ||  -> .
% 7.05/7.26  4831[19:Spt:4830.0,4808.0,4820.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*+ -> .
% 7.05/7.26  4832[19:Spt:4830.0,4808.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.26  4834[19:MRR:4809.0,4831.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.26  4841[19:Res:4834.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.26  4842[19:MRR:4841.0,13.0] ||  -> .
% 7.05/7.26  4843[18:Spt:4842.0,4739.0,4741.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)* -> .
% 7.05/7.26  4844[18:Spt:4842.0,4739.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.05/7.26  4846[18:MRR:4740.0,4843.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.05/7.26  4852[18:Res:4846.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.26  4853[18:MRR:4852.0,13.0] ||  -> .
% 7.05/7.26  4854[17:Spt:4853.0,3085.0,4626.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*+ -> .
% 7.05/7.26  4855[17:Spt:4853.0,3085.1] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s2)*.
% 7.05/7.26  5139[15:Res:4002.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s2) -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.05/7.26  5141[15:MRR:5139.0,3998.0] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.05/7.26  5142[18:Spt:5141.2] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s1)*.
% 7.05/7.26  5144[18:Res:5142.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)*.
% 7.05/7.26  5156[18:Res:5144.0,412.0] ||  -> node21(c_e_h_2,c_c,s0,s1)*.
% 7.05/7.26  5169[18:Res:5156.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s1) -> node20(c_e_h_2,c_c,s0)*.
% 7.05/7.26  5171[18:MRR:5169.0,5144.0] ||  -> node20(c_e_h_2,c_c,s0)*.
% 7.05/7.26  5172[18:Res:5171.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s0)*.
% 7.05/7.26  5174[18:Res:5172.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s0)*.
% 7.05/7.26  5175[18:MRR:5174.0,121.0] ||  -> .
% 7.05/7.26  5176[18:Spt:5175.0,5141.2,5142.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s1)*+ -> .
% 7.05/7.26  5177[18:Spt:5175.0,5141.0,5141.1] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.05/7.26  5178[18:MRR:4624.1,5176.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> .
% 7.05/7.26  5182[18:Res:5177.1,595.0] ||  -> node16(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.05/7.26  5184[18:Res:5177.1,515.0] ||  -> node16(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.05/7.26  5188[19:Spt:5184.0] ||  -> node16(c_e_h_2,c_e,s1)*.
% 7.05/7.26  5190[19:Res:5188.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.05/7.26  5191[19:MRR:5190.0,5190.1,5178.0,5176.0] ||  -> .
% 7.05/7.26  5192[19:Spt:5191.0,5184.0,5188.0] || node16(c_e_h_2,c_e,s1)*+ -> .
% 7.05/7.26  5193[19:Spt:5191.0,5184.1] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.05/7.26  5194[19:MRR:5177.0,5192.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.05/7.26  5198[19:MRR:5182.0,5192.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.05/7.26  5200[19:Res:5193.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.05/7.26  5201[19:Res:5193.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.05/7.26  5248[19:Res:5198.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.05/7.26  5250[19:MRR:5248.0,5194.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.05/7.26  5251[20:Spt:5250.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.05/7.26  5252[20:Res:5251.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.05/7.26  5253[20:Res:5251.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.05/7.26  5254[20:MRR:5253.0,5200.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.05/7.26  5255[20:MRR:5201.0,5254.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.05/7.26  5256[20:MRR:5252.0,5252.1,5255.0,5254.0] ||  -> .
% 7.05/7.26  5257[20:Spt:5256.0,5250.0,5251.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.05/7.26  5258[20:Spt:5256.0,5250.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.05/7.26  5261[20:Res:5258.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.05/7.26  5262[20:MRR:5261.0,142.0] ||  -> .
% 7.05/7.26  5263[16:Spt:5262.0,4083.0,4623.0] || node17(c_e_h_2,c_e,s1)*+ -> .
% 7.05/7.26  5264[16:Spt:5262.0,4083.1] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s1)*.
% 7.05/7.26  5265[16:MRR:4081.0,5263.0] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.05/7.26  5266[16:MRR:4001.0,5263.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.05/7.26  5269[16:MRR:4079.0,5263.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.05/7.26  5272[16:Res:5265.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.05/7.26  5273[16:Res:5265.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.05/7.26  5409[16:Res:5269.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.05/7.26  5411[16:MRR:5409.0,5266.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.05/7.26  5412[17:Spt:5411.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.05/7.26  5413[17:Res:5412.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.05/7.26  5414[17:Res:5412.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.05/7.26  5415[17:MRR:5414.0,5272.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.05/7.26  5416[17:MRR:5273.0,5415.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.05/7.26  5417[17:MRR:5413.0,5413.1,5416.0,5415.0] ||  -> .
% 7.05/7.26  5418[17:Spt:5417.0,5411.0,5412.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.05/7.26  5419[17:Spt:5417.0,5411.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.05/7.26  5422[17:Res:5419.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.05/7.26  5423[17:MRR:5422.0,142.0] ||  -> .
% 7.05/7.26  5424[14:Spt:5423.0,2144.1,2988.0] || node20(c_e_h_2,c_r,s3)*+ -> .
% 7.05/7.26  5425[14:Spt:5423.0,2144.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_d,s4)*.
% 7.05/7.26  5426[14:MRR:2146.1,5424.0] node23(s4) ||  -> .
% 7.05/7.26  5427[14:MRR:2967.1,5426.0] until2p29(s4) ||  -> .
% 7.05/7.26  5429[14:MRR:170.1,5427.0] xuntil2p30(s3) ||  -> .
% 7.05/7.26  5430[14:MRR:2026.1,5429.0] until2p29(s3) ||  -> .
% 7.05/7.26  5431[14:MRR:171.1,5430.0] xuntil2p30(s2) ||  -> .
% 7.05/7.26  5432[14:MRR:924.1,5431.0] until2p29(s2) ||  -> .
% 7.05/7.26  5433[14:MRR:172.1,5432.0] xuntil2p30(s1) ||  -> .
% 7.05/7.26  5434[14:MRR:498.1,5433.0] until2p29(s1) ||  -> .
% 7.05/7.26  5435[14:MRR:173.1,5434.0] xuntil2p30(s0) ||  -> .
% 7.05/7.26  5436[14:MRR:237.1,5435.0] until2p29(s0) ||  -> .
% 7.05/7.26  5438[14:MRR:2984.4,5436.0] ||  -> trans(s4,s4) trans(s4,s3) trans(s4,s2) trans(s4,s1)*.
% 7.05/7.26  5461[14:Res:5438.3,2970.0] ||  -> trans(s4,s4) trans(s4,s3) trans(s4,s2)* until2p29(s1).
% 7.05/7.26  5462[14:MRR:5461.3,5434.0] ||  -> trans(s4,s4) trans(s4,s3) trans(s4,s2)*.
% 7.05/7.26  5476[14:Res:5462.2,2970.0] ||  -> trans(s4,s4) trans(s4,s3)* until2p29(s2).
% 7.05/7.26  5477[14:MRR:5476.2,5432.0] ||  -> trans(s4,s4) trans(s4,s3)*.
% 7.05/7.26  5485[14:Res:5477.1,2970.0] ||  -> trans(s4,s4)* until2p29(s3).
% 7.05/7.26  5486[14:MRR:5485.1,5430.0] ||  -> trans(s4,s4)*.
% 7.05/7.26  5492[14:Res:5486.0,160.2] xuntil28(s4) last(s4) ||  -> until2p29(s4)*.
% 7.05/7.26  5496[14:SSi:5492.1,5492.0,5.0,2015.0,2968.0,5.0,2015.0,2968.0] ||  -> until2p29(s4)*.
% 7.05/7.26  5497[14:MRR:5496.0,5427.0] ||  -> .
% 7.05/7.26  5498[13:Spt:5497.0,2961.1,2968.0] || xuntil28(s4)*+ -> .
% 7.05/7.26  5499[13:Spt:5497.0,2961.0] ||  -> node23(s4)*.
% 7.05/7.26  5500[13:MRR:2146.0,5499.0] ||  -> node20(c_e_h_2,c_r,s3)*.
% 7.05/7.26  5502[13:Res:5500.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s3)*.
% 7.05/7.26  5503[13:Res:5500.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s3)*.
% 7.05/7.26  5506[13:Res:5502.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s3)*.
% 7.05/7.26  5507[13:Res:5503.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s3)*.
% 7.05/7.26  5511[13:Res:5506.0,582.0] ||  -> node16(c_e_h_2,c_e,s2) node14(c_e_h_2,c_e,s2,s3)* m_c_h_element_v_out(c_e_h_2,c_e,s2).
% 7.05/7.26  5513[13:Res:5506.0,509.0] ||  -> node17(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.05/7.26  5521[13:Res:5507.0,390.0] ||  -> node10(c_e_h_2,c_m,s2,s3)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2).
% 7.05/7.26  5527[13:Res:5513.1,586.0] ||  -> node17(c_e_h_2,c_e,s2) node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.05/7.26  5529[13:Res:5513.1,511.0] ||  -> node17(c_e_h_2,c_e,s2) node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.05/7.26  5532[13:Res:5513.1,87.0] ||  -> node17(c_e_h_2,c_e,s2) m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.05/7.26  5542[14:Spt:5532.0] ||  -> node17(c_e_h_2,c_e,s2)*.
% 7.05/7.26  5543[14:Res:5542.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s2)*+ -> m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.05/7.26  5562[13:Res:5521.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s3) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) node9(c_e_h_2,c_m,s2)*.
% 7.05/7.26  5564[13:MRR:5562.0,5507.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) node9(c_e_h_2,c_m,s2)*.
% 7.05/7.26  5565[13:Res:5564.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s2)*.
% 7.05/7.26  5566[13:Res:5564.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s2)*.
% 7.05/7.26  5567[15:Spt:5565.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.05/7.26  5572[15:Res:5567.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.05/7.26  5645[15:Res:5572.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.05/7.26  5647[15:MRR:5645.0,5567.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.05/7.26  5648[15:Res:5647.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.05/7.26  5649[15:Res:5647.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.05/7.26  5650[16:Spt:5648.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.05/7.26  5655[16:Res:5650.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.05/7.26  5710[16:Res:5655.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.26  5712[16:MRR:5710.0,5650.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.26  5713[16:Res:5712.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.26  5714[16:Res:5712.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.26  5715[17:Spt:5713.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.05/7.26  5720[17:Res:5715.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.05/7.26  5728[17:Res:5720.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.26  5730[17:MRR:5728.0,13.0] ||  -> .
% 7.05/7.26  5731[17:Spt:5730.0,5713.0,5715.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*+ -> .
% 7.05/7.26  5732[17:Spt:5730.0,5713.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.26  5734[17:MRR:5714.0,5731.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.26  5741[17:Res:5734.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.26  5742[17:MRR:5741.0,13.0] ||  -> .
% 7.05/7.26  5743[16:Spt:5742.0,5648.0,5650.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)* -> .
% 7.05/7.26  5744[16:Spt:5742.0,5648.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.05/7.26  5746[16:MRR:5649.0,5743.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.05/7.26  5752[16:Res:5746.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.26  5753[16:MRR:5752.0,13.0] ||  -> .
% 7.05/7.26  5754[15:Spt:5753.0,5565.0,5567.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*+ -> .
% 7.05/7.26  5755[15:Spt:5753.0,5565.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s2)*.
% 7.05/7.26  5888[13:Res:5511.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s3) -> node16(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)* m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.05/7.26  5890[13:MRR:5888.0,5506.0] ||  -> node16(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)* m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.05/7.26  5891[16:Spt:5890.2] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s2)*.
% 7.05/7.26  5893[16:Res:5891.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s2)*.
% 7.05/7.26  5899[16:Res:5893.0,410.0] ||  -> node21(c_e_h_2,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_2,c_c,s1).
% 7.05/7.26  5911[16:Res:5899.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s2) -> m_and_h_gate_v_out(c_e_h_2,c_c,s1) node20(c_e_h_2,c_c,s1)*.
% 7.05/7.26  5913[16:MRR:5911.0,5893.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1) node20(c_e_h_2,c_c,s1)*.
% 7.05/7.26  5914[16:Res:5913.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)* m_and_h_gate_v_in1(c_e_h_2,c_c,s1).
% 7.05/7.26  5924[17:Spt:5914.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)*.
% 7.05/7.26  5926[17:Res:5924.0,412.0] ||  -> node21(c_e_h_2,c_c,s0,s1)*.
% 7.05/7.26  5931[17:Res:5926.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s1) -> node20(c_e_h_2,c_c,s0)*.
% 7.05/7.26  5933[17:MRR:5931.0,5924.0] ||  -> node20(c_e_h_2,c_c,s0)*.
% 7.05/7.26  5937[17:Res:5933.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s0)*.
% 7.05/7.26  5939[17:Res:5937.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s0)*.
% 7.05/7.26  5940[17:MRR:5939.0,121.0] ||  -> .
% 7.05/7.26  5941[17:Spt:5940.0,5914.0,5924.0] || m_and_h_gate_v_out(c_e_h_2,c_c,s1)*+ -> .
% 7.05/7.26  5942[17:Spt:5940.0,5914.1] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s1)*.
% 7.05/7.26  5946[17:Res:5942.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s1)*.
% 7.05/7.26  5951[17:Res:5946.0,375.0] ||  -> node12(c_e_h_2,c_a,s0,s1)*.
% 7.05/7.26  5961[17:Res:5951.0,123.1] || m_mutex_h_half_v_out(c_e_h_2,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_2,c_a,s0).
% 7.05/7.26  5963[17:MRR:5961.0,5946.0] ||  -> m_mutex_h_half_v_inp(c_e_h_2,c_a,s0)*.
% 7.05/7.26  5964[17:Res:5963.0,18.0] ||  -> m_user_v_req(c_e_h_2,c_u,s0)*.
% 7.05/7.26  5965[17:MRR:5964.0,106.0] ||  -> .
% 7.05/7.26  5966[16:Spt:5965.0,5890.2,5891.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s2)*+ -> .
% 7.05/7.26  5967[16:Spt:5965.0,5890.0,5890.1] ||  -> node16(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.05/7.26  5968[16:MRR:5543.1,5966.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s2)*+ -> .
% 7.05/7.26  5969[16:Res:5967.1,586.0] ||  -> node16(c_e_h_2,c_e,s2) node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.05/7.26  5971[16:Res:5967.1,511.0] ||  -> node16(c_e_h_2,c_e,s2) node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.05/7.26  5974[16:Res:5967.1,87.0] ||  -> node16(c_e_h_2,c_e,s2) m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.05/7.26  5979[17:Spt:5974.0] ||  -> node16(c_e_h_2,c_e,s2)*.
% 7.05/7.26  5981[17:Res:5979.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s2)* m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.05/7.26  5982[17:MRR:5981.0,5981.1,5968.0,5966.0] ||  -> .
% 7.05/7.26  5983[17:Spt:5982.0,5974.0,5979.0] || node16(c_e_h_2,c_e,s2)*+ -> .
% 7.05/7.26  5984[17:Spt:5982.0,5974.1] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.05/7.26  5985[17:MRR:5967.0,5983.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.05/7.26  5987[17:MRR:5971.0,5983.0] ||  -> node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.05/7.26  5988[17:MRR:5969.0,5983.0] ||  -> node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.05/7.26  5999[17:Res:5987.1,595.0] ||  -> node17(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.05/7.26  6001[17:Res:5987.1,515.0] ||  -> node17(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6005[18:Spt:6001.0] ||  -> node17(c_e_h_2,c_e,s1)*.
% 7.05/7.26  6006[18:Res:6005.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.05/7.26  6144[17:Res:5988.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s2) -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.05/7.26  6146[17:MRR:6144.0,5985.0] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.05/7.26  6153[19:Spt:6146.2] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s1)*.
% 7.05/7.26  6155[19:Res:6153.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)*.
% 7.05/7.26  6158[19:Res:6155.0,412.0] ||  -> node21(c_e_h_2,c_c,s0,s1)*.
% 7.05/7.26  6170[19:Res:6158.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s1) -> node20(c_e_h_2,c_c,s0)*.
% 7.05/7.26  6172[19:MRR:6170.0,6155.0] ||  -> node20(c_e_h_2,c_c,s0)*.
% 7.05/7.26  6173[19:Res:6172.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s0)*.
% 7.05/7.26  6178[19:Res:6173.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s0)*.
% 7.05/7.26  6179[19:MRR:6178.0,121.0] ||  -> .
% 7.05/7.26  6180[19:Spt:6179.0,6146.2,6153.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s1)*+ -> .
% 7.05/7.26  6181[19:Spt:6179.0,6146.0,6146.1] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.05/7.26  6182[19:MRR:6006.1,6180.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> .
% 7.05/7.26  6184[19:Res:6181.1,595.0] ||  -> node16(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.05/7.26  6186[19:Res:6181.1,515.0] ||  -> node16(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6190[20:Spt:6186.0] ||  -> node16(c_e_h_2,c_e,s1)*.
% 7.05/7.26  6192[20:Res:6190.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.05/7.26  6193[20:MRR:6192.0,6192.1,6182.0,6180.0] ||  -> .
% 7.05/7.26  6194[20:Spt:6193.0,6186.0,6190.0] || node16(c_e_h_2,c_e,s1)*+ -> .
% 7.05/7.26  6195[20:Spt:6193.0,6186.1] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6196[20:MRR:6181.0,6194.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.05/7.26  6199[20:MRR:6184.0,6194.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.05/7.26  6200[20:Res:6195.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.05/7.26  6201[20:Res:6195.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6210[20:Res:6199.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.05/7.26  6212[20:MRR:6210.0,6196.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6216[21:Spt:6212.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6217[21:Res:6216.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.05/7.26  6218[21:Res:6216.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.05/7.26  6219[21:MRR:6218.0,6200.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6220[21:MRR:6201.0,6219.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6221[21:MRR:6217.0,6217.1,6220.0,6219.0] ||  -> .
% 7.05/7.26  6222[21:Spt:6221.0,6212.0,6216.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.05/7.26  6223[21:Spt:6221.0,6212.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6226[21:Res:6223.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.05/7.26  6227[21:MRR:6226.0,142.0] ||  -> .
% 7.05/7.26  6228[18:Spt:6227.0,6001.0,6005.0] || node17(c_e_h_2,c_e,s1)*+ -> .
% 7.05/7.26  6229[18:Spt:6227.0,6001.1] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6230[18:MRR:5987.0,6228.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.05/7.26  6233[18:MRR:5999.0,6228.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.05/7.26  6234[18:Res:6229.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.05/7.26  6235[18:Res:6229.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6247[18:Res:6233.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.05/7.26  6249[18:MRR:6247.0,6230.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6253[19:Spt:6249.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6254[19:Res:6253.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.05/7.26  6255[19:Res:6253.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.05/7.26  6256[19:MRR:6255.0,6234.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6257[19:MRR:6235.0,6256.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6258[19:MRR:6254.0,6254.1,6257.0,6256.0] ||  -> .
% 7.05/7.26  6259[19:Spt:6258.0,6249.0,6253.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.05/7.26  6260[19:Spt:6258.0,6249.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6263[19:Res:6260.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.05/7.26  6264[19:MRR:6263.0,142.0] ||  -> .
% 7.05/7.26  6265[14:Spt:6264.0,5532.0,5542.0] || node17(c_e_h_2,c_e,s2)*+ -> .
% 7.05/7.26  6266[14:Spt:6264.0,5532.1] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.05/7.26  6267[14:MRR:5513.0,6265.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.05/7.26  6269[14:MRR:5529.0,6265.0] ||  -> node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.05/7.26  6270[14:MRR:5527.0,6265.0] ||  -> node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.05/7.26  6302[6:Res:69.1,962.0] || m_and_h_gate_h_init_v_in1(c_e_h_3,c_m,s1)*+ -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1) m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2).
% 7.05/7.26  6325[14:Res:6269.1,595.0] ||  -> node17(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.05/7.26  6327[14:Res:6269.1,515.0] ||  -> node17(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6462[15:Spt:6269.0] ||  -> node17(c_e_h_2,c_e,s1)*.
% 7.05/7.26  6463[15:Res:6462.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.05/7.26  6468[16:Spt:5566.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.05/7.26  6473[16:Res:6468.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.05/7.26  6510[16:Res:6473.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.05/7.26  6512[16:MRR:6510.0,6468.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.05/7.26  6513[16:Res:6512.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.05/7.26  6514[16:Res:6512.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.05/7.26  6515[17:Spt:6513.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.05/7.26  6520[17:Res:6515.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.05/7.26  6533[17:Res:6520.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.26  6535[17:MRR:6533.0,6515.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.26  6536[17:Res:6535.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.26  6537[17:Res:6535.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.26  6538[18:Spt:6536.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.05/7.26  6543[18:Res:6538.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.05/7.26  6550[18:Res:6543.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.26  6552[18:MRR:6550.0,13.0] ||  -> .
% 7.05/7.26  6553[18:Spt:6552.0,6536.0,6538.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)* -> .
% 7.05/7.26  6554[18:Spt:6552.0,6536.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.26  6556[18:MRR:6537.0,6553.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.26  6560[18:Res:6556.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.26  6561[18:MRR:6560.0,13.0] ||  -> .
% 7.05/7.26  6562[17:Spt:6561.0,6513.0,6515.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*+ -> .
% 7.05/7.26  6563[17:Spt:6561.0,6513.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.05/7.26  6565[17:MRR:6514.0,6562.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.05/7.26  6571[17:Res:6565.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.26  6572[17:MRR:6571.0,13.0] ||  -> .
% 7.05/7.26  6573[16:Spt:6572.0,5566.0,6468.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*+ -> .
% 7.05/7.26  6574[16:Spt:6572.0,5566.1] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s2)*.
% 7.05/7.26  6720[14:Res:6270.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s2) -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.05/7.26  6722[14:MRR:6720.0,6267.0] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.05/7.26  6723[17:Spt:6722.2] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s1)*.
% 7.05/7.26  6725[17:Res:6723.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)*.
% 7.05/7.26  6729[17:Res:6725.0,412.0] ||  -> node21(c_e_h_2,c_c,s0,s1)*.
% 7.05/7.26  6739[17:Res:6729.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s1) -> node20(c_e_h_2,c_c,s0)*.
% 7.05/7.26  6741[17:MRR:6739.0,6725.0] ||  -> node20(c_e_h_2,c_c,s0)*.
% 7.05/7.26  6742[17:Res:6741.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s0)*.
% 7.05/7.26  6744[17:Res:6742.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s0)*.
% 7.05/7.26  6745[17:MRR:6744.0,121.0] ||  -> .
% 7.05/7.26  6746[17:Spt:6745.0,6722.2,6723.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s1)*+ -> .
% 7.05/7.26  6747[17:Spt:6745.0,6722.0,6722.1] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.05/7.26  6748[17:MRR:6463.1,6746.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> .
% 7.05/7.26  6750[17:Res:6747.1,595.0] ||  -> node16(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.05/7.26  6752[17:Res:6747.1,515.0] ||  -> node16(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6763[18:Spt:6752.0] ||  -> node16(c_e_h_2,c_e,s1)*.
% 7.05/7.26  6765[18:Res:6763.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.05/7.26  6766[18:MRR:6765.0,6765.1,6748.0,6746.0] ||  -> .
% 7.05/7.26  6767[18:Spt:6766.0,6752.0,6763.0] || node16(c_e_h_2,c_e,s1)*+ -> .
% 7.05/7.26  6768[18:Spt:6766.0,6752.1] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6769[18:MRR:6747.0,6767.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.05/7.26  6772[18:MRR:6750.0,6767.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.05/7.26  6773[18:Res:6768.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.05/7.26  6774[18:Res:6768.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6783[18:Res:6772.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.05/7.26  6785[18:MRR:6783.0,6769.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6786[19:Spt:6785.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6787[19:Res:6786.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.05/7.26  6788[19:Res:6786.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.05/7.26  6789[19:MRR:6788.0,6773.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6790[19:MRR:6774.0,6789.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6791[19:MRR:6787.0,6787.1,6790.0,6789.0] ||  -> .
% 7.05/7.26  6792[19:Spt:6791.0,6785.0,6786.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.05/7.26  6793[19:Spt:6791.0,6785.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6796[19:Res:6793.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.05/7.26  6797[19:MRR:6796.0,142.0] ||  -> .
% 7.05/7.26  6798[15:Spt:6797.0,6269.0,6462.0] || node17(c_e_h_2,c_e,s1)*+ -> .
% 7.05/7.26  6799[15:Spt:6797.0,6269.1] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.05/7.26  6801[15:MRR:6327.0,6798.0] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6803[15:MRR:6325.0,6798.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.05/7.26  6811[15:Res:6801.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.05/7.26  6812[15:Res:6801.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6856[15:Res:6803.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.05/7.26  6858[15:MRR:6856.0,6799.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6864[16:Spt:6858.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6865[16:Res:6864.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.05/7.26  6866[16:Res:6864.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.05/7.26  6867[16:MRR:6866.0,6811.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6868[16:MRR:6812.0,6867.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6869[16:MRR:6865.0,6865.1,6868.0,6867.0] ||  -> .
% 7.05/7.26  6870[16:Spt:6869.0,6858.0,6864.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.05/7.26  6871[16:Spt:6869.0,6858.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.05/7.26  6874[16:Res:6871.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.05/7.26  6875[16:MRR:6874.0,142.0] ||  -> .
% 7.05/7.26  6876[11:Spt:6875.0,2016.0,2078.0] || node21(c_e_h_2,c_r,s3,s4)*+ -> .
% 7.05/7.26  6877[11:Spt:6875.0,2016.1,2016.2,2016.3] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s3)* node24(s4) xuntil28(s4).
% 7.05/7.26  6879[11:MRR:522.1,6876.0] node23(s4) ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s3)*.
% 7.05/7.26  6882[11:MRR:1971.1,6876.0] until2p29(s4) ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s3)* node24(s4).
% 7.05/7.26  6883[12:Spt:6877.2] ||  -> xuntil28(s4)*.
% 7.05/7.26  6884[12:MRR:168.0,6883.0] ||  -> loop*.
% 7.05/7.26  6885[12:MRR:178.0,6883.0] || trans(s4,u)*+ -> until2p29(u).
% 7.05/7.26  6886[12:MRR:7.0,6884.0] ||  -> trans(s4,s4) trans(s4,s3) trans(s4,s2) trans(s4,s1) trans(s4,s0)*.
% 7.05/7.26  6895[12:Res:6886.4,141.0] ||  -> trans(s4,s4) trans(s4,s3) trans(s4,s2) trans(s4,s1) node19(u,v,s4,s0)*.
% 7.05/7.26  6896[12:Res:6886.4,6885.0] ||  -> trans(s4,s4) trans(s4,s3) trans(s4,s2) trans(s4,s1)* until2p29(s0).
% 7.05/7.26  6900[13:Spt:6895.3] ||  -> trans(s4,s1)*.
% 7.05/7.26  6905[13:Res:6900.0,149.0] ||  -> node22(u,v,s4,s1)* node21(u,v,s4,s1).
% 7.05/7.26  6908[13:Res:6900.0,6885.0] ||  -> until2p29(s1)*.
% 7.05/7.26  6909[13:MRR:498.0,6908.0] ||  -> xuntil2p30(s1)*.
% 7.05/7.26  6910[13:MRR:172.0,6909.0] ||  -> until2p29(s2)*.
% 7.05/7.26  6911[13:MRR:924.0,6910.0] ||  -> xuntil2p30(s2)*.
% 7.05/7.26  6912[13:MRR:171.0,6911.0] ||  -> until2p29(s3)*.
% 7.05/7.26  6913[13:MRR:2026.0,6912.0] ||  -> xuntil2p30(s3)*.
% 7.05/7.26  6914[13:MRR:170.0,6913.0] ||  -> until2p29(s4)*.
% 7.05/7.26  6915[13:MRR:181.0,6914.0] ||  -> node26(s4)*.
% 7.05/7.26  6916[13:MRR:2085.0,6914.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s3)* node23(s4).
% 7.05/7.26  6917[13:MRR:6882.0,6914.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s3)* node24(s4).
% 7.05/7.26  6925[14:Spt:6916.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s3)*.
% 7.05/7.26  6928[14:Res:6925.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_e,s3)*.
% 7.05/7.26  6933[14:Res:6928.0,582.0] ||  -> node16(c_e_h_3,c_e,s2) node14(c_e_h_3,c_e,s2,s3)* m_c_h_element_v_out(c_e_h_3,c_e,s2).
% 7.05/7.26  6935[14:Res:6928.0,509.0] ||  -> node17(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)*.
% 7.05/7.26  6944[15:Spt:6917.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s3)*.
% 7.05/7.26  6946[15:Res:6944.0,409.0] ||  -> node21(c_e_h_2,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_2,c_r,s2).
% 7.05/7.26  6964[14:Res:6935.1,87.0] ||  -> node17(c_e_h_3,c_e,s2) m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.05/7.26  6975[13:Res:6905.0,147.1] || m_and_h_gate_v_out(u,v,s4)+ -> node21(u,v,s4,s1)* m_and_h_gate_v_out(u,v,s1).
% 7.05/7.26  6990[15:Res:6946.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_r,s3) -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.05/7.26  6992[15:MRR:6990.0,6944.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.05/7.26  6993[16:Spt:6992.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2)*.
% 7.05/7.26  6996[16:Res:6993.0,96.0] ||  -> m_user_v_ack(c_e_h_2,c_u,s2)*.
% 7.05/7.26  6997[16:Res:6996.0,34.0] || m_and_h_gate_v_in2(c_e_h_2,c_d,s2)*+ -> .
% 7.05/7.26  6999[16:Res:2305.0,6997.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1) m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.05/7.26  7003[17:Spt:6999.1] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.05/7.26  7004[17:Res:7003.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.05/7.26  7009[17:Res:7004.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.05/7.26  7011[17:Res:7009.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.26  7013[17:MRR:7011.0,13.0] ||  -> .
% 7.05/7.26  7014[17:Spt:7013.0,6999.1,7003.0] || m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*+ -> .
% 7.05/7.26  7015[17:Spt:7013.0,6999.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1)*.
% 7.05/7.26  7018[17:Res:7015.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.05/7.26  7025[17:Res:7018.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.05/7.26  7070[17:Res:7025.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.26  7072[17:MRR:7070.0,7018.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.26  7073[17:Res:7072.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.26  7074[17:Res:7072.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.26  7075[18:Spt:7073.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.05/7.26  7078[18:Res:7075.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.05/7.26  7081[18:MRR:7078.0,7014.0] ||  -> .
% 7.05/7.26  7082[18:Spt:7081.0,7073.0,7075.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*+ -> .
% 7.05/7.26  7083[18:Spt:7081.0,7073.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.26  7085[18:MRR:7074.0,7082.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.26  7092[18:Res:7085.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.26  7093[18:MRR:7092.0,13.0] ||  -> .
% 7.05/7.26  7094[16:Spt:7093.0,6992.0,6993.0] || m_and_h_gate_v_out(c_e_h_2,c_r,s2)*+ -> .
% 7.05/7.26  7095[16:Spt:7093.0,6992.1] ||  -> node20(c_e_h_2,c_r,s2)*.
% 7.05/7.26  7099[16:Res:7095.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s2)*.
% 7.05/7.26  7101[16:Res:7099.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.05/7.26  7122[16:Res:7101.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.05/7.26  7155[16:Res:7122.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.05/7.26  7157[16:MRR:7155.0,7101.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.05/7.26  7158[16:Res:7157.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.05/7.26  7159[16:Res:7157.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.05/7.26  7160[17:Spt:7158.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.05/7.26  7165[17:Res:7160.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.05/7.26  7176[17:Res:7165.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.26  7178[17:MRR:7176.0,7160.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.26  7179[17:Res:7178.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.26  7180[17:Res:7178.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.26  7181[18:Spt:7179.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.05/7.26  7186[18:Res:7181.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.05/7.26  7189[18:Res:7186.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.26  7191[18:MRR:7189.0,13.0] ||  -> .
% 7.05/7.26  7192[18:Spt:7191.0,7179.0,7181.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)* -> .
% 7.05/7.26  7193[18:Spt:7191.0,7179.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.26  7195[18:MRR:7180.0,7192.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.26  7199[18:Res:7195.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.26  7200[18:MRR:7199.0,13.0] ||  -> .
% 7.05/7.26  7201[17:Spt:7200.0,7158.0,7160.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*+ -> .
% 7.05/7.26  7202[17:Spt:7200.0,7158.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.05/7.26  7204[17:MRR:7159.0,7201.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.05/7.26  7210[17:Res:7204.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.26  7211[17:MRR:7210.0,13.0] ||  -> .
% 7.05/7.26  7212[15:Spt:7211.0,6917.0,6944.0] || m_and_h_gate_v_out(c_e_h_2,c_r,s3)*+ -> .
% 7.05/7.26  7213[15:Spt:7211.0,6917.1] ||  -> node24(s4)*.
% 7.05/7.26  7214[15:MRR:523.0,7213.0] ||  -> node21(c_e_h_1,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_1,c_r,s3).
% 7.05/7.26  7234[16:Spt:6935.0] ||  -> node17(c_e_h_3,c_e,s2)*.
% 7.05/7.26  7235[16:Res:7234.0,135.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s2)*+ -> m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.05/7.26  7276[17:Spt:6302.2] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2)*.
% 7.05/7.26  7280[17:Res:7276.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_r,s2)*.
% 7.05/7.26  7283[17:MRR:2031.0,7280.0] || m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*+ -> .
% 7.05/7.26  7291[13:Res:221.1,6975.0] node24(s4) ||  -> node21(c_e_h_1,c_r,s4,s1)* m_and_h_gate_v_out(c_e_h_1,c_r,s1).
% 7.05/7.26  7292[13:Res:220.1,6975.0] node23(s4) ||  -> node21(c_e_h_1,c_r,s4,s1)* m_and_h_gate_v_out(c_e_h_1,c_r,s1).
% 7.05/7.26  7294[15:SSi:7291.0,5.0,2015.0,6883.0,6914.0,6915.0,7213.0] ||  -> node21(c_e_h_1,c_r,s4,s1)* m_and_h_gate_v_out(c_e_h_1,c_r,s1).
% 7.05/7.26  7991[14:Res:6933.1,130.1] || m_c_h_element_v_out(c_e_h_3,c_e,s3) -> node16(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.05/7.26  7993[14:MRR:7991.0,6928.0] ||  -> node16(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.05/7.26  7994[18:Spt:7993.2] ||  -> m_c_h_element_v_in1(c_e_h_3,c_e,s2)*.
% 7.05/7.26  7996[18:Res:7994.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s2)*.
% 7.05/7.26  8002[18:Res:7996.0,410.0] ||  -> node21(c_e_h_3,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_3,c_c,s1).
% 7.05/7.26  8015[18:Res:8002.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_c,s2) -> m_and_h_gate_v_out(c_e_h_3,c_c,s1) node20(c_e_h_3,c_c,s1)*.
% 7.05/7.26  8017[18:MRR:8015.0,7996.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1) node20(c_e_h_3,c_c,s1)*.
% 7.05/7.26  8018[18:Res:8017.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1)* m_and_h_gate_v_in1(c_e_h_3,c_c,s1).
% 7.05/7.26  8031[19:Spt:8018.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1)*.
% 7.05/7.26  8034[19:Res:8031.0,412.0] ||  -> node21(c_e_h_3,c_c,s0,s1)*.
% 7.05/7.26  8039[19:Res:8034.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_c,s1) -> node20(c_e_h_3,c_c,s0)*.
% 7.05/7.26  8041[19:MRR:8039.0,8031.0] ||  -> node20(c_e_h_3,c_c,s0)*.
% 7.05/7.26  8050[19:Res:8041.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_c,s0)*.
% 7.05/7.26  8052[19:Res:8050.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_3,c_a,s0)*.
% 7.05/7.26  8053[19:MRR:8052.0,121.0] ||  -> .
% 7.05/7.26  8054[19:Spt:8053.0,8018.0,8031.0] || m_and_h_gate_v_out(c_e_h_3,c_c,s1)*+ -> .
% 7.05/7.26  8055[19:Spt:8053.0,8018.1] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_c,s1)*.
% 7.05/7.26  8059[19:Res:8055.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_3,c_a,s1)*.
% 7.05/7.26  8065[19:Res:8059.0,375.0] ||  -> node12(c_e_h_3,c_a,s0,s1)*.
% 7.05/7.26  8079[19:Res:8065.0,123.1] || m_mutex_h_half_v_out(c_e_h_3,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_3,c_a,s0).
% 7.05/7.26  8081[19:MRR:8079.0,8059.0] ||  -> m_mutex_h_half_v_inp(c_e_h_3,c_a,s0)*.
% 7.05/7.26  8082[19:Res:8081.0,18.0] ||  -> m_user_v_req(c_e_h_3,c_u,s0)*.
% 7.05/7.26  8083[19:MRR:8082.0,106.0] ||  -> .
% 7.05/7.26  8084[18:Spt:8083.0,7993.2,7994.0] || m_c_h_element_v_in1(c_e_h_3,c_e,s2)* -> .
% 7.05/7.26  8085[18:Spt:8083.0,7993.0,7993.1] ||  -> node16(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)*.
% 7.05/7.26  8086[18:MRR:7235.1,8084.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s2)* -> .
% 7.05/7.26  8092[18:Res:8085.1,87.0] ||  -> node16(c_e_h_3,c_e,s2) m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.05/7.26  8093[18:MRR:8092.1,7283.0] ||  -> node16(c_e_h_3,c_e,s2)*.
% 7.05/7.26  8096[18:Res:8093.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.05/7.26  8097[18:MRR:8096.0,8096.1,8086.0,8084.0] ||  -> .
% 7.05/7.26  8098[17:Spt:8097.0,6302.2,7276.0] || m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2)*+ -> .
% 7.05/7.26  8099[17:Spt:8097.0,6302.0,6302.1] || m_and_h_gate_h_init_v_in1(c_e_h_3,c_m,s1)*+ -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1).
% 7.05/7.26  8101[17:Res:67.1,8099.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1) m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1)*.
% 7.05/7.26  8103[17:Res:8101.1,81.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1)* m_and_h_gate_v_in2(c_e_h_3,c_p,s1).
% 7.05/7.26  8107[17:Res:8101.1,392.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1) node10(c_e_h_3,c_n,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0).
% 7.05/7.26  8108[18:Spt:8103.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1)*.
% 7.05/7.26  8112[18:Res:8108.0,595.0] ||  -> node16(c_e_h_3,c_f,s0) node14(c_e_h_3,c_f,s0,s1)*.
% 7.05/7.26  8114[18:Res:8108.0,515.0] ||  -> node17(c_e_h_3,c_f,s0)*.
% 7.05/7.26  8117[18:Res:8114.0,135.0] || m_c_h_element_v_in2(c_e_h_3,c_f,s0)* -> m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.26  8118[18:Res:8114.0,136.0] || m_c_h_element_v_in1(c_e_h_3,c_f,s0) -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)*.
% 7.05/7.26  8147[18:Res:8112.1,130.1] || m_c_h_element_v_out(c_e_h_3,c_f,s1)* -> node16(c_e_h_3,c_f,s0) m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.26  8149[18:MRR:8147.0,8108.0] ||  -> node16(c_e_h_3,c_f,s0) m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.26  8150[19:Spt:8149.0] ||  -> node16(c_e_h_3,c_f,s0)*.
% 7.05/7.26  8151[19:Res:8150.0,134.0] || m_c_h_element_v_in2(c_e_h_3,c_f,s0)* m_c_h_element_v_in1(c_e_h_3,c_f,s0) -> .
% 7.05/7.26  8152[19:Res:8150.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)* m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.26  8153[19:MRR:8152.0,8117.0] ||  -> m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.26  8154[19:MRR:8118.0,8153.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)*.
% 7.05/7.26  8155[19:MRR:8151.0,8151.1,8154.0,8153.0] ||  -> .
% 7.05/7.26  8156[19:Spt:8155.0,8149.0,8150.0] || node16(c_e_h_3,c_f,s0)* -> .
% 7.05/7.26  8157[19:Spt:8155.0,8149.1] ||  -> m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.26  8160[19:Res:8157.0,40.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_d,s0)*.
% 7.05/7.26  8161[19:MRR:8160.0,142.0] ||  -> .
% 7.05/7.26  8162[18:Spt:8161.0,8103.0,8108.0] || m_c_h_element_v_out(c_e_h_3,c_f,s1)*+ -> .
% 7.05/7.26  8163[18:Spt:8161.0,8103.1] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_p,s1)*.
% 7.05/7.26  8164[18:MRR:8101.0,8162.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1)*.
% 7.05/7.26  8169[18:MRR:8107.0,8162.0] ||  -> node10(c_e_h_3,c_n,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0).
% 7.05/7.26  8202[18:Res:8169.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1) -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) node9(c_e_h_3,c_n,s0)*.
% 7.05/7.26  8204[18:MRR:8202.0,8164.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) node9(c_e_h_3,c_n,s0)*.
% 7.05/7.26  8206[18:Res:8204.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) m_and_h_gate_h_init_v_in2(c_e_h_3,c_n,s0)*.
% 7.05/7.26  8207[18:MRR:8206.1,273.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0)*.
% 7.05/7.26  8212[18:Res:8207.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_3,c_n,s0)*.
% 7.05/7.26  8215[18:Res:8212.0,78.1] || m_cell_v_token(c_e_h_3,s0)* -> .
% 7.05/7.26  8217[18:MRR:8215.0,16.0] ||  -> .
% 7.05/7.26  8218[16:Spt:8217.0,6935.0,7234.0] || node17(c_e_h_3,c_e,s2)*+ -> .
% 7.05/7.26  8219[16:Spt:8217.0,6935.1] ||  -> m_c_h_element_v_out(c_e_h_3,c_e,s2)*.
% 7.05/7.26  8220[16:MRR:6964.0,8218.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.05/7.26  8221[16:MRR:2031.1,8220.0] || m_and_h_gate_v_in2(c_e_h_3,c_r,s2)*+ -> .
% 7.05/7.26  8233[17:Spt:7214.1] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s3)*.
% 7.05/7.26  8236[17:Res:8233.0,96.0] ||  -> m_user_v_ack(c_e_h_1,c_u,s3)*.
% 7.05/7.26  8237[17:Res:8236.0,34.0] || m_and_h_gate_v_in2(c_e_h_1,c_d,s3)*+ -> .
% 7.05/7.26  8250[18:Spt:7294.1] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s1)*.
% 7.05/7.26  8253[18:Res:8250.0,412.0] ||  -> node21(c_e_h_1,c_r,s0,s1)*.
% 7.05/7.26  8259[18:Res:8253.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s1) -> node20(c_e_h_1,c_r,s0)*.
% 7.05/7.26  8261[18:MRR:8259.0,8250.0] ||  -> node20(c_e_h_1,c_r,s0)*.
% 7.05/7.26  8262[18:Res:8261.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s0)*.
% 7.05/7.26  8267[18:Res:8262.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s0)*.
% 7.05/7.26  8268[18:MRR:8267.0,128.0] ||  -> .
% 7.05/7.26  8269[18:Spt:8268.0,7294.1,8250.0] || m_and_h_gate_v_out(c_e_h_1,c_r,s1)*+ -> .
% 7.05/7.26  8270[18:Spt:8268.0,7294.0] ||  -> node21(c_e_h_1,c_r,s4,s1)*.
% 7.05/7.26  8282[18:Res:625.1,8269.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_d,s2)* m_and_h_gate_v_in2(c_e_h_1,c_r,s1).
% 7.05/7.26  8292[19:Spt:8282.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_d,s2)*.
% 7.05/7.26  8293[19:Res:8292.0,622.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_d,s3)* m_and_h_gate_v_in2(c_e_h_1,c_r,s2).
% 7.05/7.26  8297[19:MRR:8293.0,8237.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s2)*.
% 7.05/7.26  8299[19:Res:8297.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.05/7.26  8309[19:Res:8299.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.05/7.26  8372[19:Res:8309.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.05/7.26  8374[19:MRR:8372.0,8299.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.05/7.26  8375[19:Res:8374.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.05/7.26  8376[19:Res:8374.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.05/7.26  8384[20:Spt:8375.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.05/7.26  8390[20:Res:8384.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.05/7.26  8443[20:Res:8390.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.26  8445[20:MRR:8443.0,8384.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.26  8446[20:Res:8445.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.26  8447[20:Res:8445.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.26  8448[21:Spt:8446.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.05/7.26  8453[21:Res:8448.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.05/7.26  8459[21:Res:8453.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.26  8461[21:MRR:8459.0,10.0] ||  -> .
% 7.05/7.26  8462[21:Spt:8461.0,8446.0,8448.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)* -> .
% 7.05/7.26  8463[21:Spt:8461.0,8446.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.26  8465[21:MRR:8447.0,8462.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.26  8469[21:Res:8465.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.26  8470[21:MRR:8469.0,10.0] ||  -> .
% 7.05/7.26  8471[20:Spt:8470.0,8375.0,8384.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*+ -> .
% 7.05/7.26  8472[20:Spt:8470.0,8375.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.05/7.26  8474[20:MRR:8376.0,8471.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.05/7.26  8480[20:Res:8474.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.26  8481[20:MRR:8480.0,10.0] ||  -> .
% 7.05/7.26  8482[19:Spt:8481.0,8282.0,8292.0] || m_and_h_gate_v_in2(c_e_h_1,c_d,s2)*+ -> .
% 7.05/7.26  8483[19:Spt:8481.0,8282.1] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1)*.
% 7.05/7.26  8485[19:Res:8483.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.05/7.26  8493[19:Res:8485.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.05/7.26  8610[19:Res:8493.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.26  8612[19:MRR:8610.0,8485.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.26  8622[19:Res:8612.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.26  8623[19:Res:8612.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.26  8624[20:Spt:8622.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.05/7.26  8629[20:Res:8624.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.05/7.26  8632[20:Res:8629.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.26  8634[20:MRR:8632.0,10.0] ||  -> .
% 7.05/7.26  8635[20:Spt:8634.0,8622.0,8624.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)* -> .
% 7.05/7.26  8636[20:Spt:8634.0,8622.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.26  8638[20:MRR:8623.0,8635.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.26  8642[20:Res:8638.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.26  8643[20:MRR:8642.0,10.0] ||  -> .
% 7.05/7.26  8644[17:Spt:8643.0,7214.1,8233.0] || m_and_h_gate_v_out(c_e_h_1,c_r,s3)*+ -> .
% 7.05/7.26  8645[17:Spt:8643.0,7214.0] ||  -> node21(c_e_h_1,c_r,s3,s4)*.
% 7.05/7.26  8654[17:Res:592.1,8644.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_d,s4)* m_and_h_gate_v_in2(c_e_h_1,c_r,s3).
% 7.05/7.26  8660[18:Spt:8654.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_d,s4)*.
% 7.05/7.26  8661[18:Res:8660.0,282.1] node24(s4) ||  -> .
% 7.05/7.26  8663[18:SSi:8661.0,5.0,2015.0,6883.0,6914.0,6915.0,7213.0] ||  -> .
% 7.05/7.26  8664[18:Spt:8663.0,8654.0,8660.0] || m_and_h_gate_v_in2(c_e_h_1,c_d,s4)*+ -> .
% 7.05/7.26  8665[18:Spt:8663.0,8654.1] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s3)*.
% 7.05/7.26  8670[18:Res:8665.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s3)*.
% 7.05/7.26  8682[18:Res:8670.0,390.0] ||  -> node10(c_e_h_1,c_m,s2,s3)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2).
% 7.05/7.26  8741[18:Res:8682.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s3) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) node9(c_e_h_1,c_m,s2)*.
% 7.05/7.26  8743[18:MRR:8741.0,8670.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) node9(c_e_h_1,c_m,s2)*.
% 7.05/7.26  8744[18:Res:8743.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s2)*.
% 7.05/7.26  8746[19:Spt:8744.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.05/7.26  8751[19:Res:8746.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.05/7.26  8771[19:Res:8751.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.05/7.26  8773[19:MRR:8771.0,8746.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.05/7.26  8774[19:Res:8773.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.05/7.26  8775[19:Res:8773.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.05/7.26  8785[20:Spt:8774.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.05/7.26  8791[20:Res:8785.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.05/7.26  8831[20:Res:8791.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.26  8833[20:MRR:8831.0,8785.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.26  8834[20:Res:8833.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.26  8835[20:Res:8833.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.26  8836[21:Spt:8834.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.05/7.26  8841[21:Res:8836.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.05/7.26  8851[21:Res:8841.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.26  8853[21:MRR:8851.0,10.0] ||  -> .
% 7.05/7.26  8854[21:Spt:8853.0,8834.0,8836.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.05/7.26  8855[21:Spt:8853.0,8834.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.26  8857[21:MRR:8835.0,8854.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.26  8864[21:Res:8857.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.26  8865[21:MRR:8864.0,10.0] ||  -> .
% 7.05/7.26  8866[20:Spt:8865.0,8774.0,8785.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)* -> .
% 7.05/7.26  8867[20:Spt:8865.0,8774.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.05/7.26  8869[20:MRR:8775.0,8866.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.05/7.26  8875[20:Res:8869.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.26  8876[20:MRR:8875.0,10.0] ||  -> .
% 7.05/7.26  8877[19:Spt:8876.0,8744.0,8746.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*+ -> .
% 7.05/7.26  8878[19:Spt:8876.0,8744.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s2)*.
% 7.05/7.26  8908[20:Spt:6302.2] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2)*.
% 7.05/7.26  8912[20:Res:8908.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_r,s2)*.
% 7.05/7.26  8915[20:MRR:8912.0,8221.0] ||  -> .
% 7.05/7.26  8916[20:Spt:8915.0,6302.2,8908.0] || m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2)*+ -> .
% 7.05/7.26  8917[20:Spt:8915.0,6302.0,6302.1] || m_and_h_gate_h_init_v_in1(c_e_h_3,c_m,s1)*+ -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1).
% 7.05/7.26  8919[20:Res:67.1,8917.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1) m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1)*.
% 7.05/7.26  8921[20:Res:8919.1,81.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1)* m_and_h_gate_v_in2(c_e_h_3,c_p,s1).
% 7.05/7.26  8925[20:Res:8919.1,392.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1) node10(c_e_h_3,c_n,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0).
% 7.05/7.26  8926[21:Spt:8921.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1)*.
% 7.05/7.26  8930[21:Res:8926.0,595.0] ||  -> node16(c_e_h_3,c_f,s0) node14(c_e_h_3,c_f,s0,s1)*.
% 7.05/7.26  8932[21:Res:8926.0,515.0] ||  -> node17(c_e_h_3,c_f,s0)*.
% 7.05/7.26  8935[21:Res:8932.0,135.0] || m_c_h_element_v_in2(c_e_h_3,c_f,s0)* -> m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.26  8936[21:Res:8932.0,136.0] || m_c_h_element_v_in1(c_e_h_3,c_f,s0) -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)*.
% 7.05/7.26  8962[21:Res:8930.1,130.1] || m_c_h_element_v_out(c_e_h_3,c_f,s1)* -> node16(c_e_h_3,c_f,s0) m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.26  8964[21:MRR:8962.0,8926.0] ||  -> node16(c_e_h_3,c_f,s0) m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.26  8965[22:Spt:8964.0] ||  -> node16(c_e_h_3,c_f,s0)*.
% 7.05/7.26  8966[22:Res:8965.0,134.0] || m_c_h_element_v_in2(c_e_h_3,c_f,s0)* m_c_h_element_v_in1(c_e_h_3,c_f,s0) -> .
% 7.05/7.26  8967[22:Res:8965.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)* m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.26  8968[22:MRR:8967.0,8935.0] ||  -> m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.26  8969[22:MRR:8936.0,8968.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)*.
% 7.05/7.26  8970[22:MRR:8966.0,8966.1,8969.0,8968.0] ||  -> .
% 7.05/7.26  8971[22:Spt:8970.0,8964.0,8965.0] || node16(c_e_h_3,c_f,s0)* -> .
% 7.05/7.26  8972[22:Spt:8970.0,8964.1] ||  -> m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.26  8975[22:Res:8972.0,40.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_d,s0)*.
% 7.05/7.26  8976[22:MRR:8975.0,142.0] ||  -> .
% 7.05/7.26  8977[21:Spt:8976.0,8921.0,8926.0] || m_c_h_element_v_out(c_e_h_3,c_f,s1)*+ -> .
% 7.05/7.26  8978[21:Spt:8976.0,8921.1] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_p,s1)*.
% 7.05/7.26  8979[21:MRR:8919.0,8977.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1)*.
% 7.05/7.26  8984[21:MRR:8925.0,8977.0] ||  -> node10(c_e_h_3,c_n,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0).
% 7.05/7.26  9018[21:Res:8984.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1) -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) node9(c_e_h_3,c_n,s0)*.
% 7.05/7.26  9020[21:MRR:9018.0,8979.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) node9(c_e_h_3,c_n,s0)*.
% 7.05/7.26  9022[21:Res:9020.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) m_and_h_gate_h_init_v_in2(c_e_h_3,c_n,s0)*.
% 7.05/7.26  9023[21:MRR:9022.1,273.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0)*.
% 7.05/7.26  9028[21:Res:9023.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_3,c_n,s0)*.
% 7.05/7.26  9034[21:Res:9028.0,78.1] || m_cell_v_token(c_e_h_3,s0)* -> .
% 7.05/7.26  9036[21:MRR:9034.0,16.0] ||  -> .
% 7.05/7.26  9037[14:Spt:9036.0,6916.0,6925.0] || m_and_h_gate_v_in1(c_e_h_3,c_r,s3)*+ -> .
% 7.05/7.26  9038[14:Spt:9036.0,6916.1] ||  -> node23(s4)*.
% 7.05/7.26  9039[14:MRR:6879.0,9038.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s3)*.
% 7.05/7.26  9045[14:MRR:7292.0,9038.0] ||  -> node21(c_e_h_1,c_r,s4,s1)* m_and_h_gate_v_out(c_e_h_1,c_r,s1).
% 7.05/7.26  9048[14:Res:9039.0,409.0] ||  -> node21(c_e_h_2,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_2,c_r,s2).
% 7.05/7.26  9089[15:Spt:9045.1] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s1)*.
% 7.05/7.26  9092[15:Res:9089.0,412.0] ||  -> node21(c_e_h_1,c_r,s0,s1)*.
% 7.05/7.26  9094[14:Res:9048.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_r,s3) -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.05/7.26  9096[14:MRR:9094.0,9039.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.05/7.26  9099[15:Res:9092.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s1) -> node20(c_e_h_1,c_r,s0)*.
% 7.05/7.26  9101[15:MRR:9099.0,9089.0] ||  -> node20(c_e_h_1,c_r,s0)*.
% 7.05/7.26  9102[15:Res:9101.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s0)*.
% 7.05/7.26  9104[15:Res:9102.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s0)*.
% 7.05/7.26  9105[15:MRR:9104.0,128.0] ||  -> .
% 7.05/7.26  9106[15:Spt:9105.0,9045.1,9089.0] || m_and_h_gate_v_out(c_e_h_1,c_r,s1)*+ -> .
% 7.05/7.26  9107[15:Spt:9105.0,9045.0] ||  -> node21(c_e_h_1,c_r,s4,s1)*.
% 7.05/7.26  9125[14:Res:9096.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2)* m_and_h_gate_v_in1(c_e_h_2,c_r,s2).
% 7.05/7.26  9126[14:Res:9096.1,144.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2)* m_and_h_gate_v_in2(c_e_h_2,c_r,s2).
% 7.05/7.26  9164[16:Spt:9125.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2)*.
% 7.05/7.26  9166[16:Res:9164.0,410.0] ||  -> node21(c_e_h_2,c_r,s1,s2)* m_and_h_gate_v_out(c_e_h_2,c_r,s1).
% 7.05/7.26  9167[16:Res:9164.0,96.0] ||  -> m_user_v_ack(c_e_h_2,c_u,s2)*.
% 7.05/7.26  9168[16:Res:9167.0,34.0] || m_and_h_gate_v_in2(c_e_h_2,c_d,s2)*+ -> .
% 7.05/7.26  9170[16:Res:2305.0,9168.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1) m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.05/7.26  9171[16:Res:2304.0,9168.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1)* m_and_h_gate_v_in1(c_e_h_2,c_r,s0).
% 7.05/7.26  9200[17:Spt:9170.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1)*.
% 7.05/7.26  9201[17:Res:9200.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.05/7.26  9208[17:Res:9201.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.05/7.26  9296[18:Spt:9166.1] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s1)*.
% 7.05/7.26  9299[18:Res:9296.0,412.0] ||  -> node21(c_e_h_2,c_r,s0,s1)*.
% 7.05/7.26  9303[18:Res:9299.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_r,s1) -> node20(c_e_h_2,c_r,s0)*.
% 7.05/7.26  9305[18:MRR:9303.0,9296.0] ||  -> node20(c_e_h_2,c_r,s0)*.
% 7.05/7.26  9306[18:Res:9305.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s0)*.
% 7.05/7.26  9309[18:Res:9306.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s0)*.
% 7.05/7.26  9310[18:MRR:9309.0,128.0] ||  -> .
% 7.05/7.26  9311[18:Spt:9310.0,9166.1,9296.0] || m_and_h_gate_v_out(c_e_h_2,c_r,s1)*+ -> .
% 7.05/7.26  9312[18:Spt:9310.0,9166.0] ||  -> node21(c_e_h_2,c_r,s1,s2)*.
% 7.05/7.26  9369[17:Res:9208.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9371[17:MRR:9369.0,9201.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9374[17:Res:9371.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9375[17:Res:9371.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9376[19:Spt:9374.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9381[19:Res:9376.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9386[19:Res:9381.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.26  9388[19:MRR:9386.0,13.0] ||  -> .
% 7.05/7.26  9389[19:Spt:9388.0,9374.0,9376.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)* -> .
% 7.05/7.26  9390[19:Spt:9388.0,9374.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9392[19:MRR:9375.0,9389.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9396[19:Res:9392.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.26  9397[19:MRR:9396.0,13.0] ||  -> .
% 7.05/7.26  9398[17:Spt:9397.0,9170.0,9200.0] || m_and_h_gate_v_in2(c_e_h_2,c_r,s1)* -> .
% 7.05/7.26  9399[17:Spt:9397.0,9170.1] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.05/7.26  9400[17:MRR:9171.0,9398.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s0)*.
% 7.05/7.26  9402[17:Res:9400.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s0)*.
% 7.05/7.26  9403[17:MRR:9402.0,128.0] ||  -> .
% 7.05/7.26  9404[16:Spt:9403.0,9125.0,9164.0] || m_and_h_gate_v_out(c_e_h_2,c_r,s2)*+ -> .
% 7.05/7.26  9405[16:Spt:9403.0,9125.1] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.05/7.26  9407[16:MRR:9126.0,9404.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s2)*.
% 7.05/7.26  9421[16:Res:9407.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.05/7.26  9437[16:Res:9421.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.05/7.26  9500[16:Res:9437.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.05/7.26  9502[16:MRR:9500.0,9421.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.05/7.26  9507[16:Res:9502.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.05/7.26  9508[16:Res:9502.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.05/7.26  9509[17:Spt:9507.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.05/7.26  9515[17:Res:9509.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.05/7.26  9609[17:Res:9515.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9611[17:MRR:9609.0,9509.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9612[17:Res:9611.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9613[17:Res:9611.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9614[18:Spt:9612.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9619[18:Res:9614.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9630[18:Res:9619.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.26  9632[18:MRR:9630.0,13.0] ||  -> .
% 7.05/7.26  9633[18:Spt:9632.0,9612.0,9614.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*+ -> .
% 7.05/7.26  9634[18:Spt:9632.0,9612.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9636[18:MRR:9613.0,9633.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9643[18:Res:9636.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.26  9644[18:MRR:9643.0,13.0] ||  -> .
% 7.05/7.26  9645[17:Spt:9644.0,9507.0,9509.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)* -> .
% 7.05/7.26  9646[17:Spt:9644.0,9507.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.05/7.26  9648[17:MRR:9508.0,9645.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.05/7.26  9654[17:Res:9648.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.26  9655[17:MRR:9654.0,13.0] ||  -> .
% 7.05/7.26  9656[13:Spt:9655.0,6895.3,6900.0] || trans(s4,s1)*+ -> .
% 7.05/7.26  9657[13:Spt:9655.0,6895.0,6895.1,6895.2,6895.4] ||  -> trans(s4,s4) trans(s4,s3) trans(s4,s2) node19(u,v,s4,s0)*.
% 7.05/7.26  9658[13:MRR:6896.3,9656.0] ||  -> trans(s4,s4) trans(s4,s3) trans(s4,s2)* until2p29(s0).
% 7.05/7.26  9659[13:MRR:6886.3,9656.0] ||  -> trans(s4,s4) trans(s4,s3) trans(s4,s2) trans(s4,s0)*.
% 7.05/7.26  9668[14:Spt:9659.0] ||  -> trans(s4,s4)*.
% 7.05/7.26  9676[14:Res:9668.0,6885.0] ||  -> until2p29(s4)*.
% 7.05/7.26  9677[14:MRR:181.0,9676.0] ||  -> node26(s4)*.
% 7.05/7.26  9678[14:MRR:6882.0,9676.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s3)* node24(s4).
% 7.05/7.26  9687[15:Spt:9678.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s3)*.
% 7.05/7.26  9689[15:Res:9687.0,409.0] ||  -> node21(c_e_h_2,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_2,c_r,s2).
% 7.05/7.26  9760[15:Res:9689.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_r,s3) -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.05/7.26  9762[15:MRR:9760.0,9687.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.05/7.26  9763[16:Spt:9762.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2)*.
% 7.05/7.26  9766[16:Res:9763.0,96.0] ||  -> m_user_v_ack(c_e_h_2,c_u,s2)*.
% 7.05/7.26  9767[16:Res:9766.0,34.0] || m_and_h_gate_v_in2(c_e_h_2,c_d,s2)*+ -> .
% 7.05/7.26  9769[16:Res:2305.0,9767.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1) m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.05/7.26  9773[17:Spt:9769.1] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.05/7.26  9774[17:Res:9773.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9779[17:Res:9774.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9781[17:Res:9779.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.26  9783[17:MRR:9781.0,13.0] ||  -> .
% 7.05/7.26  9784[17:Spt:9783.0,9769.1,9773.0] || m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*+ -> .
% 7.05/7.26  9785[17:Spt:9783.0,9769.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1)*.
% 7.05/7.26  9788[17:Res:9785.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.05/7.26  9795[17:Res:9788.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.05/7.26  9825[17:Res:9795.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9827[17:MRR:9825.0,9788.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9831[17:Res:9827.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9832[17:Res:9827.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9833[18:Spt:9831.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9836[18:Res:9833.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.05/7.26  9839[18:MRR:9836.0,9784.0] ||  -> .
% 7.05/7.26  9840[18:Spt:9839.0,9831.0,9833.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)* -> .
% 7.05/7.26  9841[18:Spt:9839.0,9831.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9843[18:MRR:9832.0,9840.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9847[18:Res:9843.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.26  9848[18:MRR:9847.0,13.0] ||  -> .
% 7.05/7.26  9849[16:Spt:9848.0,9762.0,9763.0] || m_and_h_gate_v_out(c_e_h_2,c_r,s2)*+ -> .
% 7.05/7.26  9850[16:Spt:9848.0,9762.1] ||  -> node20(c_e_h_2,c_r,s2)*.
% 7.05/7.26  9854[16:Res:9850.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s2)*.
% 7.05/7.26  9865[16:Res:9854.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.05/7.26  9881[16:Res:9865.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.05/7.26  9910[16:Res:9881.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.05/7.26  9912[16:MRR:9910.0,9865.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.05/7.26  9917[16:Res:9912.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.05/7.26  9918[16:Res:9912.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.05/7.26  9919[17:Spt:9917.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.05/7.26  9924[17:Res:9919.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.05/7.26  9942[17:Res:9924.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9944[17:MRR:9942.0,9919.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9945[17:Res:9944.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9946[17:Res:9944.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9950[18:Spt:9945.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9955[18:Res:9950.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9958[18:Res:9955.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.26  9960[18:MRR:9958.0,13.0] ||  -> .
% 7.05/7.26  9961[18:Spt:9960.0,9945.0,9950.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*+ -> .
% 7.05/7.26  9962[18:Spt:9960.0,9945.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9964[18:MRR:9946.0,9961.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.26  9971[18:Res:9964.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.26  9972[18:MRR:9971.0,13.0] ||  -> .
% 7.05/7.26  9973[17:Spt:9972.0,9917.0,9919.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)* -> .
% 7.05/7.26  9974[17:Spt:9972.0,9917.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.05/7.26  9976[17:MRR:9918.0,9973.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.05/7.26  9982[17:Res:9976.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.26  9983[17:MRR:9982.0,13.0] ||  -> .
% 7.05/7.26  9984[15:Spt:9983.0,9678.0,9687.0] || m_and_h_gate_v_out(c_e_h_2,c_r,s3)*+ -> .
% 7.05/7.26  9985[15:Spt:9983.0,9678.1] ||  -> node24(s4)*.
% 7.05/7.26  9986[15:MRR:523.0,9985.0] ||  -> node21(c_e_h_1,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_1,c_r,s3).
% 7.05/7.26  9987[15:MRR:2054.0,9985.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s3)*.
% 7.05/7.26  10000[15:Res:9987.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_e,s3)*.
% 7.05/7.26  10011[15:Res:10000.0,582.0] ||  -> node16(c_e_h_3,c_e,s2) node14(c_e_h_3,c_e,s2,s3)* m_c_h_element_v_out(c_e_h_3,c_e,s2).
% 7.05/7.26  10013[15:Res:10000.0,509.0] ||  -> node17(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)*.
% 7.05/7.26  10020[15:Res:9986.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s4)+ -> m_and_h_gate_v_out(c_e_h_1,c_r,s3) node20(c_e_h_1,c_r,s3)*.
% 7.05/7.26  10027[15:Res:10013.1,87.0] ||  -> node17(c_e_h_3,c_e,s2) m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.05/7.26  10036[16:Spt:10027.0] ||  -> node17(c_e_h_3,c_e,s2)*.
% 7.05/7.26  10037[16:Res:10036.0,135.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s2)*+ -> m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.05/7.26  10051[17:Spt:10020.1] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s3)*.
% 7.05/7.26  10053[17:Res:10051.0,409.0] ||  -> node21(c_e_h_1,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_1,c_r,s2).
% 7.05/7.26  10060[17:Res:10053.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s3) -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.05/7.26  10062[17:MRR:10060.0,10051.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.05/7.26  10066[18:Spt:10062.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2)*.
% 7.05/7.26  10069[18:Res:10066.0,96.0] ||  -> m_user_v_ack(c_e_h_1,c_u,s2)*.
% 7.05/7.26  10070[18:Res:10069.0,34.0] || m_and_h_gate_v_in2(c_e_h_1,c_d,s2)*+ -> .
% 7.05/7.26  10072[18:Res:2305.0,10070.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1) m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.05/7.26  10076[19:Spt:10072.1] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.05/7.26  10077[19:Res:10076.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.05/7.26  10082[19:Res:10077.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.05/7.26  10084[19:Res:10082.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.26  10086[19:MRR:10084.0,10.0] ||  -> .
% 7.05/7.26  10087[19:Spt:10086.0,10072.1,10076.0] || m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*+ -> .
% 7.05/7.26  10088[19:Spt:10086.0,10072.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1)*.
% 7.05/7.26  10091[19:Res:10088.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.05/7.26  10098[19:Res:10091.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.05/7.26  10141[19:Res:10098.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.26  10143[19:MRR:10141.0,10091.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.26  10144[19:Res:10143.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.26  10145[19:Res:10143.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.26  10146[20:Spt:10144.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.05/7.26  10149[20:Res:10146.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.05/7.26  10152[20:MRR:10149.0,10087.0] ||  -> .
% 7.05/7.26  10153[20:Spt:10152.0,10144.0,10146.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.05/7.26  10154[20:Spt:10152.0,10144.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.26  10156[20:MRR:10145.0,10153.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.26  10163[20:Res:10156.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.26  10164[20:MRR:10163.0,10.0] ||  -> .
% 7.05/7.26  10165[18:Spt:10164.0,10062.0,10066.0] || m_and_h_gate_v_out(c_e_h_1,c_r,s2)*+ -> .
% 7.05/7.26  10166[18:Spt:10164.0,10062.1] ||  -> node20(c_e_h_1,c_r,s2)*.
% 7.05/7.26  10170[18:Res:10166.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s2)*.
% 7.05/7.26  10172[18:Res:10170.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.05/7.26  10193[18:Res:10172.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.05/7.26  10226[18:Res:10193.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.05/7.26  10228[18:MRR:10226.0,10172.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.05/7.26  10229[18:Res:10228.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.05/7.26  10230[18:Res:10228.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.05/7.26  10231[19:Spt:10229.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.05/7.26  10236[19:Res:10231.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.05/7.26  10253[19:Res:10236.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.26  10255[19:MRR:10253.0,10231.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.26  10259[19:Res:10255.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.26  10260[19:Res:10255.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.26  10261[20:Spt:10259.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.05/7.26  10266[20:Res:10261.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.05/7.26  10270[20:Res:10266.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.26  10272[20:MRR:10270.0,10.0] ||  -> .
% 7.05/7.26  10273[20:Spt:10272.0,10259.0,10261.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)* -> .
% 7.05/7.26  10274[20:Spt:10272.0,10259.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.26  10276[20:MRR:10260.0,10273.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.26  10280[20:Res:10276.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.26  10281[20:MRR:10280.0,10.0] ||  -> .
% 7.05/7.26  10282[19:Spt:10281.0,10229.0,10231.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*+ -> .
% 7.05/7.26  10283[19:Spt:10281.0,10229.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.05/7.26  10285[19:MRR:10230.0,10282.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.05/7.26  10291[19:Res:10285.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.26  10292[19:MRR:10291.0,10.0] ||  -> .
% 7.05/7.26  10293[17:Spt:10292.0,10020.1,10051.0] || m_and_h_gate_v_out(c_e_h_1,c_r,s3)*+ -> .
% 7.05/7.26  10294[17:Spt:10292.0,10020.0,10020.2] || m_and_h_gate_v_out(c_e_h_1,c_r,s4)+ -> node20(c_e_h_1,c_r,s3)*.
% 7.05/7.26  10299[17:Res:221.1,10294.0] node24(s4) ||  -> node20(c_e_h_1,c_r,s3)*.
% 7.05/7.26  10301[17:SSi:10299.0,5.0,2015.0,6883.0,9676.0,9677.0,9985.0] ||  -> node20(c_e_h_1,c_r,s3)*.
% 7.05/7.26  10303[17:Res:10301.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s3)*.
% 7.05/7.26  10307[17:Res:10303.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s3)*.
% 7.05/7.26  10326[17:Res:10307.0,390.0] ||  -> node10(c_e_h_1,c_m,s2,s3)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2).
% 7.05/7.26  10361[17:Res:10326.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s3) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) node9(c_e_h_1,c_m,s2)*.
% 7.05/7.26  10363[17:MRR:10361.0,10307.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) node9(c_e_h_1,c_m,s2)*.
% 7.05/7.26  10364[17:Res:10363.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s2)*.
% 7.05/7.26  10366[18:Spt:10364.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.05/7.26  10371[18:Res:10366.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.05/7.26  10382[18:Res:10371.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.05/7.26  10384[18:MRR:10382.0,10366.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.05/7.26  10385[18:Res:10384.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.05/7.26  10386[18:Res:10384.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.05/7.26  10391[19:Spt:10385.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.05/7.26  10396[19:Res:10391.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.05/7.26  10405[19:Res:10396.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.26  10407[19:MRR:10405.0,10391.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.26  10408[19:Res:10407.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.26  10409[19:Res:10407.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.26  10410[20:Spt:10408.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.05/7.26  10415[20:Res:10410.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.05/7.26  10421[20:Res:10415.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.26  10423[20:MRR:10421.0,10.0] ||  -> .
% 7.05/7.26  10424[20:Spt:10423.0,10408.0,10410.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.05/7.26  10425[20:Spt:10423.0,10408.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.26  10427[20:MRR:10409.0,10424.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.26  10434[20:Res:10427.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.26  10435[20:MRR:10434.0,10.0] ||  -> .
% 7.05/7.26  10436[19:Spt:10435.0,10385.0,10391.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)* -> .
% 7.05/7.26  10437[19:Spt:10435.0,10385.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.05/7.26  10439[19:MRR:10386.0,10436.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.05/7.26  10445[19:Res:10439.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.26  10446[19:MRR:10445.0,10.0] ||  -> .
% 7.05/7.26  10447[18:Spt:10446.0,10364.0,10366.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*+ -> .
% 7.05/7.26  10448[18:Spt:10446.0,10364.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s2)*.
% 7.05/7.26  10464[19:Spt:6302.2] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2)*.
% 7.05/7.26  10468[19:Res:10464.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_r,s2)*.
% 7.05/7.26  10471[19:MRR:2031.0,10468.0] || m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*+ -> .
% 7.05/7.26  10484[15:Res:10011.1,130.1] || m_c_h_element_v_out(c_e_h_3,c_e,s3) -> node16(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.05/7.26  10486[15:MRR:10484.0,10000.0] ||  -> node16(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.05/7.26  10487[20:Spt:10486.2] ||  -> m_c_h_element_v_in1(c_e_h_3,c_e,s2)*.
% 7.05/7.26  10489[20:Res:10487.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s2)*.
% 7.05/7.26  10495[20:Res:10489.0,410.0] ||  -> node21(c_e_h_3,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_3,c_c,s1).
% 7.05/7.26  10518[20:Res:10495.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_c,s2) -> m_and_h_gate_v_out(c_e_h_3,c_c,s1) node20(c_e_h_3,c_c,s1)*.
% 7.05/7.26  10520[20:MRR:10518.0,10489.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1) node20(c_e_h_3,c_c,s1)*.
% 7.05/7.26  10521[20:Res:10520.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1)* m_and_h_gate_v_in1(c_e_h_3,c_c,s1).
% 7.05/7.26  10534[21:Spt:10521.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1)*.
% 7.05/7.26  10536[21:Res:10534.0,412.0] ||  -> node21(c_e_h_3,c_c,s0,s1)*.
% 7.05/7.26  10541[21:Res:10536.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_c,s1) -> node20(c_e_h_3,c_c,s0)*.
% 7.05/7.26  10543[21:MRR:10541.0,10534.0] ||  -> node20(c_e_h_3,c_c,s0)*.
% 7.05/7.26  10554[21:Res:10543.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_c,s0)*.
% 7.05/7.26  10556[21:Res:10554.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_3,c_a,s0)*.
% 7.05/7.26  10557[21:MRR:10556.0,121.0] ||  -> .
% 7.05/7.26  10558[21:Spt:10557.0,10521.0,10534.0] || m_and_h_gate_v_out(c_e_h_3,c_c,s1)*+ -> .
% 7.05/7.26  10559[21:Spt:10557.0,10521.1] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_c,s1)*.
% 7.05/7.26  10563[21:Res:10559.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_3,c_a,s1)*.
% 7.05/7.26  10568[21:Res:10563.0,375.0] ||  -> node12(c_e_h_3,c_a,s0,s1)*.
% 7.05/7.26  10584[21:Res:10568.0,123.1] || m_mutex_h_half_v_out(c_e_h_3,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_3,c_a,s0).
% 7.05/7.26  10586[21:MRR:10584.0,10563.0] ||  -> m_mutex_h_half_v_inp(c_e_h_3,c_a,s0)*.
% 7.05/7.26  10587[21:Res:10586.0,18.0] ||  -> m_user_v_req(c_e_h_3,c_u,s0)*.
% 7.05/7.26  10588[21:MRR:10587.0,106.0] ||  -> .
% 7.05/7.26  10589[20:Spt:10588.0,10486.2,10487.0] || m_c_h_element_v_in1(c_e_h_3,c_e,s2)* -> .
% 7.05/7.26  10590[20:Spt:10588.0,10486.0,10486.1] ||  -> node16(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)*.
% 7.05/7.26  10591[20:MRR:10037.1,10589.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s2)* -> .
% 7.05/7.26  10597[20:Res:10590.1,87.0] ||  -> node16(c_e_h_3,c_e,s2) m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.05/7.26  10598[20:MRR:10597.1,10471.0] ||  -> node16(c_e_h_3,c_e,s2)*.
% 7.05/7.26  10601[20:Res:10598.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.05/7.26  10602[20:MRR:10601.0,10601.1,10591.0,10589.0] ||  -> .
% 7.05/7.26  10603[19:Spt:10602.0,6302.2,10464.0] || m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2)*+ -> .
% 7.05/7.26  10604[19:Spt:10602.0,6302.0,6302.1] || m_and_h_gate_h_init_v_in1(c_e_h_3,c_m,s1)*+ -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1).
% 7.05/7.26  10606[19:Res:67.1,10604.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1) m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1)*.
% 7.05/7.26  10608[19:Res:10606.1,81.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1)* m_and_h_gate_v_in2(c_e_h_3,c_p,s1).
% 7.05/7.26  10611[19:Res:10606.1,392.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1) node10(c_e_h_3,c_n,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0).
% 7.05/7.26  10612[20:Spt:10608.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1)*.
% 7.05/7.26  10614[20:Res:10612.0,595.0] ||  -> node16(c_e_h_3,c_f,s0) node14(c_e_h_3,c_f,s0,s1)*.
% 7.05/7.26  10616[20:Res:10612.0,515.0] ||  -> node17(c_e_h_3,c_f,s0)*.
% 7.05/7.26  10619[20:Res:10616.0,135.0] || m_c_h_element_v_in2(c_e_h_3,c_f,s0)* -> m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.26  10620[20:Res:10616.0,136.0] || m_c_h_element_v_in1(c_e_h_3,c_f,s0) -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)*.
% 7.05/7.26  10640[20:Res:10614.1,130.1] || m_c_h_element_v_out(c_e_h_3,c_f,s1)* -> node16(c_e_h_3,c_f,s0) m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.26  10642[20:MRR:10640.0,10612.0] ||  -> node16(c_e_h_3,c_f,s0) m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.26  10643[21:Spt:10642.0] ||  -> node16(c_e_h_3,c_f,s0)*.
% 7.05/7.26  10644[21:Res:10643.0,134.0] || m_c_h_element_v_in2(c_e_h_3,c_f,s0)* m_c_h_element_v_in1(c_e_h_3,c_f,s0) -> .
% 7.05/7.26  10645[21:Res:10643.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)* m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.26  10646[21:MRR:10645.0,10619.0] ||  -> m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.26  10647[21:MRR:10620.0,10646.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)*.
% 7.05/7.26  10648[21:MRR:10644.0,10644.1,10647.0,10646.0] ||  -> .
% 7.05/7.26  10649[21:Spt:10648.0,10642.0,10643.0] || node16(c_e_h_3,c_f,s0)* -> .
% 7.05/7.26  10650[21:Spt:10648.0,10642.1] ||  -> m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.26  10653[21:Res:10650.0,40.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_d,s0)*.
% 7.05/7.26  10654[21:MRR:10653.0,142.0] ||  -> .
% 7.05/7.26  10655[20:Spt:10654.0,10608.0,10612.0] || m_c_h_element_v_out(c_e_h_3,c_f,s1)*+ -> .
% 7.05/7.26  10656[20:Spt:10654.0,10608.1] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_p,s1)*.
% 7.05/7.26  10657[20:MRR:10606.0,10655.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1)*.
% 7.05/7.26  10661[20:MRR:10611.0,10655.0] ||  -> node10(c_e_h_3,c_n,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0).
% 7.05/7.26  10673[20:Res:10661.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1) -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) node9(c_e_h_3,c_n,s0)*.
% 7.05/7.26  10675[20:MRR:10673.0,10657.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) node9(c_e_h_3,c_n,s0)*.
% 7.05/7.26  10684[20:Res:10675.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) m_and_h_gate_h_init_v_in2(c_e_h_3,c_n,s0)*.
% 7.05/7.26  10685[20:MRR:10684.1,273.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0)*.
% 7.05/7.26  10690[20:Res:10685.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_3,c_n,s0)*.
% 7.05/7.26  10694[20:Res:10690.0,78.1] || m_cell_v_token(c_e_h_3,s0)* -> .
% 7.05/7.26  10696[20:MRR:10694.0,16.0] ||  -> .
% 7.05/7.26  10697[16:Spt:10696.0,10027.0,10036.0] || node17(c_e_h_3,c_e,s2)*+ -> .
% 7.05/7.26  10698[16:Spt:10696.0,10027.1] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.05/7.26  10699[16:MRR:2031.1,10698.0] || m_and_h_gate_v_in2(c_e_h_3,c_r,s2)*+ -> .
% 7.05/7.26  11097[17:Spt:6302.2] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2)*.
% 7.05/7.26  11101[17:Res:11097.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_r,s2)*.
% 7.05/7.26  11104[17:MRR:11101.0,10699.0] ||  -> .
% 7.05/7.26  11105[17:Spt:11104.0,6302.2,11097.0] || m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2)*+ -> .
% 7.05/7.26  11106[17:Spt:11104.0,6302.0,6302.1] || m_and_h_gate_h_init_v_in1(c_e_h_3,c_m,s1)*+ -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1).
% 7.05/7.26  11108[17:Res:67.1,11106.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1) m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1)*.
% 7.05/7.26  11110[17:Res:11108.1,81.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1)* m_and_h_gate_v_in2(c_e_h_3,c_p,s1).
% 7.05/7.26  11113[17:Res:11108.1,392.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1) node10(c_e_h_3,c_n,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0).
% 7.05/7.26  11114[18:Spt:11110.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1)*.
% 7.05/7.26  11116[18:Res:11114.0,595.0] ||  -> node16(c_e_h_3,c_f,s0) node14(c_e_h_3,c_f,s0,s1)*.
% 7.05/7.26  11118[18:Res:11114.0,515.0] ||  -> node17(c_e_h_3,c_f,s0)*.
% 7.05/7.26  11121[18:Res:11118.0,135.0] || m_c_h_element_v_in2(c_e_h_3,c_f,s0)* -> m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.26  11122[18:Res:11118.0,136.0] || m_c_h_element_v_in1(c_e_h_3,c_f,s0) -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)*.
% 7.05/7.26  11151[18:Res:11116.1,130.1] || m_c_h_element_v_out(c_e_h_3,c_f,s1)* -> node16(c_e_h_3,c_f,s0) m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.27  11153[18:MRR:11151.0,11114.0] ||  -> node16(c_e_h_3,c_f,s0) m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.27  11154[19:Spt:11153.0] ||  -> node16(c_e_h_3,c_f,s0)*.
% 7.05/7.27  11155[19:Res:11154.0,134.0] || m_c_h_element_v_in2(c_e_h_3,c_f,s0)* m_c_h_element_v_in1(c_e_h_3,c_f,s0) -> .
% 7.05/7.27  11156[19:Res:11154.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)* m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.27  11157[19:MRR:11156.0,11121.0] ||  -> m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.27  11158[19:MRR:11122.0,11157.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)*.
% 7.05/7.27  11159[19:MRR:11155.0,11155.1,11158.0,11157.0] ||  -> .
% 7.05/7.27  11160[19:Spt:11159.0,11153.0,11154.0] || node16(c_e_h_3,c_f,s0)* -> .
% 7.05/7.27  11161[19:Spt:11159.0,11153.1] ||  -> m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.27  11164[19:Res:11161.0,40.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_d,s0)*.
% 7.05/7.27  11165[19:MRR:11164.0,142.0] ||  -> .
% 7.05/7.27  11166[18:Spt:11165.0,11110.0,11114.0] || m_c_h_element_v_out(c_e_h_3,c_f,s1)*+ -> .
% 7.05/7.27  11167[18:Spt:11165.0,11110.1] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_p,s1)*.
% 7.05/7.27  11168[18:MRR:11108.0,11166.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1)*.
% 7.05/7.27  11172[18:MRR:11113.0,11166.0] ||  -> node10(c_e_h_3,c_n,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0).
% 7.05/7.27  11192[18:Res:11172.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1) -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) node9(c_e_h_3,c_n,s0)*.
% 7.05/7.27  11194[18:MRR:11192.0,11168.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) node9(c_e_h_3,c_n,s0)*.
% 7.05/7.27  11196[18:Res:11194.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) m_and_h_gate_h_init_v_in2(c_e_h_3,c_n,s0)*.
% 7.05/7.27  11197[18:MRR:11196.1,273.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0)*.
% 7.05/7.27  11202[18:Res:11197.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_3,c_n,s0)*.
% 7.05/7.27  11213[18:Res:11202.0,78.1] || m_cell_v_token(c_e_h_3,s0)* -> .
% 7.05/7.27  11215[18:MRR:11213.0,16.0] ||  -> .
% 7.05/7.27  11216[14:Spt:11215.0,9659.0,9668.0] || trans(s4,s4)*+ -> .
% 7.05/7.27  11217[14:Spt:11215.0,9659.1,9659.2,9659.3] ||  -> trans(s4,s3) trans(s4,s2) trans(s4,s0)*.
% 7.05/7.27  11218[14:MRR:9658.0,11216.0] ||  -> trans(s4,s3) trans(s4,s2)* until2p29(s0).
% 7.05/7.27  11224[15:Spt:11217.0] ||  -> trans(s4,s3)*.
% 7.05/7.27  11229[15:Res:11224.0,149.0] ||  -> node22(u,v,s4,s3)* node21(u,v,s4,s3).
% 7.05/7.27  11232[15:Res:11224.0,6885.0] ||  -> until2p29(s3)*.
% 7.05/7.27  11233[15:MRR:2026.0,11232.0] ||  -> xuntil2p30(s3)*.
% 7.05/7.27  11234[15:MRR:170.0,11233.0] ||  -> until2p29(s4)*.
% 7.05/7.27  11235[15:MRR:181.0,11234.0] ||  -> node26(s4)*.
% 7.05/7.27  11236[15:MRR:2085.0,11234.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s3)* node23(s4).
% 7.05/7.27  11237[15:MRR:6882.0,11234.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s3)* node24(s4).
% 7.05/7.27  11243[16:Spt:11236.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s3)*.
% 7.05/7.27  11246[16:Res:11243.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_e,s3)*.
% 7.05/7.27  11253[16:Res:11246.0,582.0] ||  -> node16(c_e_h_3,c_e,s2) node14(c_e_h_3,c_e,s2,s3)* m_c_h_element_v_out(c_e_h_3,c_e,s2).
% 7.05/7.27  11255[16:Res:11246.0,509.0] ||  -> node17(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)*.
% 7.05/7.27  11264[17:Spt:11237.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s3)*.
% 7.05/7.27  11266[17:Res:11264.0,409.0] ||  -> node21(c_e_h_2,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_2,c_r,s2).
% 7.05/7.27  11291[16:Res:11255.1,87.0] ||  -> node17(c_e_h_3,c_e,s2) m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.05/7.27  11307[15:Res:11229.0,147.1] || m_and_h_gate_v_out(u,v,s4)+ -> node21(u,v,s4,s3)* m_and_h_gate_v_out(u,v,s3).
% 7.05/7.27  11320[17:Res:11266.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_r,s3) -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.05/7.27  11322[17:MRR:11320.0,11264.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.05/7.27  11323[18:Spt:11322.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2)*.
% 7.05/7.27  11326[18:Res:11323.0,96.0] ||  -> m_user_v_ack(c_e_h_2,c_u,s2)*.
% 7.05/7.27  11327[18:Res:11326.0,34.0] || m_and_h_gate_v_in2(c_e_h_2,c_d,s2)*+ -> .
% 7.05/7.27  11329[18:Res:2305.0,11327.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1) m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.05/7.27  11333[19:Spt:11329.1] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.05/7.27  11334[19:Res:11333.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.05/7.27  11339[19:Res:11334.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.05/7.27  11341[19:Res:11339.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.27  11343[19:MRR:11341.0,13.0] ||  -> .
% 7.05/7.27  11344[19:Spt:11343.0,11329.1,11333.0] || m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*+ -> .
% 7.05/7.27  11345[19:Spt:11343.0,11329.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1)*.
% 7.05/7.27  11348[19:Res:11345.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.05/7.27  11355[19:Res:11348.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.05/7.27  11387[19:Res:11355.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.27  11389[19:MRR:11387.0,11348.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.27  11399[19:Res:11389.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.27  11400[19:Res:11389.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.27  11401[20:Spt:11399.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.05/7.27  11404[20:Res:11401.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.05/7.27  11407[20:MRR:11404.0,11344.0] ||  -> .
% 7.05/7.27  11408[20:Spt:11407.0,11399.0,11401.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)* -> .
% 7.05/7.27  11409[20:Spt:11407.0,11399.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.27  11411[20:MRR:11400.0,11408.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.27  11415[20:Res:11411.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.27  11416[20:MRR:11415.0,13.0] ||  -> .
% 7.05/7.27  11417[18:Spt:11416.0,11322.0,11323.0] || m_and_h_gate_v_out(c_e_h_2,c_r,s2)*+ -> .
% 7.05/7.27  11418[18:Spt:11416.0,11322.1] ||  -> node20(c_e_h_2,c_r,s2)*.
% 7.05/7.27  11422[18:Res:11418.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s2)*.
% 7.05/7.27  11433[18:Res:11422.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.05/7.27  11449[18:Res:11433.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.05/7.27  11478[18:Res:11449.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.05/7.27  11480[18:MRR:11478.0,11433.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.05/7.27  11485[18:Res:11480.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.05/7.27  11486[18:Res:11480.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.05/7.27  11487[19:Spt:11485.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.05/7.27  11492[19:Res:11487.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.05/7.27  11498[19:Res:11492.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.27  11500[19:MRR:11498.0,11487.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.27  11501[19:Res:11500.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.27  11502[19:Res:11500.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.27  11503[20:Spt:11501.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.05/7.27  11508[20:Res:11503.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.05/7.27  11512[20:Res:11508.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.27  11514[20:MRR:11512.0,13.0] ||  -> .
% 7.05/7.27  11515[20:Spt:11514.0,11501.0,11503.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*+ -> .
% 7.05/7.27  11516[20:Spt:11514.0,11501.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.27  11518[20:MRR:11502.0,11515.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.27  11525[20:Res:11518.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.27  11526[20:MRR:11525.0,13.0] ||  -> .
% 7.05/7.27  11527[19:Spt:11526.0,11485.0,11487.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)* -> .
% 7.05/7.27  11528[19:Spt:11526.0,11485.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.05/7.27  11530[19:MRR:11486.0,11527.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.05/7.27  11536[19:Res:11530.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.27  11537[19:MRR:11536.0,13.0] ||  -> .
% 7.05/7.27  11538[17:Spt:11537.0,11237.0,11264.0] || m_and_h_gate_v_out(c_e_h_2,c_r,s3)*+ -> .
% 7.05/7.27  11539[17:Spt:11537.0,11237.1] ||  -> node24(s4)*.
% 7.05/7.27  11540[17:MRR:523.0,11539.0] ||  -> node21(c_e_h_1,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_1,c_r,s3).
% 7.05/7.27  11560[18:Spt:11255.0] ||  -> node17(c_e_h_3,c_e,s2)*.
% 7.05/7.27  11561[18:Res:11560.0,135.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s2)*+ -> m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.05/7.27  11605[19:Spt:6302.2] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2)*.
% 7.05/7.27  11609[19:Res:11605.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_r,s2)*.
% 7.05/7.27  11612[19:MRR:2031.0,11609.0] || m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*+ -> .
% 7.05/7.27  11636[15:Res:221.1,11307.0] node24(s4) ||  -> node21(c_e_h_1,c_r,s4,s3)* m_and_h_gate_v_out(c_e_h_1,c_r,s3).
% 7.05/7.27  11640[17:SSi:11636.0,5.0,2015.0,6883.0,11234.0,11235.0,11539.0] ||  -> node21(c_e_h_1,c_r,s4,s3)* m_and_h_gate_v_out(c_e_h_1,c_r,s3).
% 7.05/7.27  11644[20:Spt:11640.1] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s3)*.
% 7.05/7.27  11647[20:Res:11644.0,409.0] ||  -> node21(c_e_h_1,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_1,c_r,s2).
% 7.05/7.27  11673[20:Res:11647.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s3) -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.05/7.27  11675[20:MRR:11673.0,11644.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.05/7.27  11676[21:Spt:11675.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2)*.
% 7.05/7.27  11679[21:Res:11676.0,96.0] ||  -> m_user_v_ack(c_e_h_1,c_u,s2)*.
% 7.05/7.27  11680[21:Res:11679.0,34.0] || m_and_h_gate_v_in2(c_e_h_1,c_d,s2)*+ -> .
% 7.05/7.27  11685[21:Res:2305.0,11680.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1) m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.05/7.27  11689[22:Spt:11685.1] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.05/7.27  11690[22:Res:11689.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  11695[22:Res:11690.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  11700[22:Res:11695.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  11702[22:MRR:11700.0,10.0] ||  -> .
% 7.05/7.27  11703[22:Spt:11702.0,11685.1,11689.0] || m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*+ -> .
% 7.05/7.27  11704[22:Spt:11702.0,11685.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1)*.
% 7.05/7.27  11707[22:Res:11704.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.05/7.27  11714[22:Res:11707.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.05/7.27  11754[22:Res:11714.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.27  11756[22:MRR:11754.0,11707.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.27  11757[22:Res:11756.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.27  11758[22:Res:11756.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.27  11764[23:Spt:11757.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  11767[23:Res:11764.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.05/7.27  11770[23:MRR:11767.0,11703.0] ||  -> .
% 7.05/7.27  11771[23:Spt:11770.0,11757.0,11764.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)* -> .
% 7.05/7.27  11772[23:Spt:11770.0,11757.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.27  11774[23:MRR:11758.0,11771.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.27  11778[23:Res:11774.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  11779[23:MRR:11778.0,10.0] ||  -> .
% 7.05/7.27  11780[21:Spt:11779.0,11675.0,11676.0] || m_and_h_gate_v_out(c_e_h_1,c_r,s2)*+ -> .
% 7.05/7.27  11781[21:Spt:11779.0,11675.1] ||  -> node20(c_e_h_1,c_r,s2)*.
% 7.05/7.27  11785[21:Res:11781.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s2)*.
% 7.05/7.27  11796[21:Res:11785.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.05/7.27  11812[21:Res:11796.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.05/7.27  11843[21:Res:11812.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.05/7.27  11845[21:MRR:11843.0,11796.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.05/7.27  11846[21:Res:11845.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.05/7.27  11847[21:Res:11845.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.05/7.27  11850[22:Spt:11846.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.05/7.27  11855[22:Res:11850.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.05/7.27  11868[22:Res:11855.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.27  11870[22:MRR:11868.0,11850.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.27  11871[22:Res:11870.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.27  11872[22:Res:11870.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.27  11873[23:Spt:11871.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  11878[23:Res:11873.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  11884[23:Res:11878.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  11886[23:MRR:11884.0,10.0] ||  -> .
% 7.05/7.27  11887[23:Spt:11886.0,11871.0,11873.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)* -> .
% 7.05/7.27  11888[23:Spt:11886.0,11871.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.27  11890[23:MRR:11872.0,11887.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.27  11894[23:Res:11890.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  11895[23:MRR:11894.0,10.0] ||  -> .
% 7.05/7.27  11896[22:Spt:11895.0,11846.0,11850.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*+ -> .
% 7.05/7.27  11897[22:Spt:11895.0,11846.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.05/7.27  11899[22:MRR:11847.0,11896.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.05/7.27  11905[22:Res:11899.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  11906[22:MRR:11905.0,10.0] ||  -> .
% 7.05/7.27  11907[20:Spt:11906.0,11640.1,11644.0] || m_and_h_gate_v_out(c_e_h_1,c_r,s3)*+ -> .
% 7.05/7.27  11908[20:Spt:11906.0,11640.0] ||  -> node21(c_e_h_1,c_r,s4,s3)*.
% 7.05/7.27  11919[20:Res:592.1,11907.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_d,s4)* m_and_h_gate_v_in2(c_e_h_1,c_r,s3).
% 7.05/7.27  11927[21:Spt:11919.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_d,s4)*.
% 7.05/7.27  11928[21:Res:11927.0,282.1] node24(s4) ||  -> .
% 7.05/7.27  11930[21:SSi:11928.0,5.0,2015.0,6883.0,11234.0,11235.0,11539.0] ||  -> .
% 7.05/7.27  11931[21:Spt:11930.0,11919.0,11927.0] || m_and_h_gate_v_in2(c_e_h_1,c_d,s4)*+ -> .
% 7.05/7.27  11932[21:Spt:11930.0,11919.1] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s3)*.
% 7.05/7.27  11937[21:Res:11932.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s3)*.
% 7.05/7.27  11950[21:Res:11937.0,390.0] ||  -> node10(c_e_h_1,c_m,s2,s3)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2).
% 7.05/7.27  11995[21:Res:11950.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s3) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) node9(c_e_h_1,c_m,s2)*.
% 7.05/7.27  11997[21:MRR:11995.0,11937.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) node9(c_e_h_1,c_m,s2)*.
% 7.05/7.27  12000[21:Res:11997.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s2)*.
% 7.05/7.27  12002[22:Spt:12000.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.05/7.27  12007[22:Res:12002.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.05/7.27  12017[22:Res:12007.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.05/7.27  12019[22:MRR:12017.0,12002.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.05/7.27  12023[22:Res:12019.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.05/7.27  12024[22:Res:12019.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.05/7.27  12025[23:Spt:12023.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.05/7.27  12030[23:Res:12025.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.05/7.27  12038[23:Res:12030.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.27  12040[23:MRR:12038.0,12025.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.27  12041[23:Res:12040.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.27  12042[23:Res:12040.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.27  12043[24:Spt:12041.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  12048[24:Res:12043.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  12051[24:Res:12048.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  12053[24:MRR:12051.0,10.0] ||  -> .
% 7.05/7.27  12054[24:Spt:12053.0,12041.0,12043.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.05/7.27  12055[24:Spt:12053.0,12041.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.27  12057[24:MRR:12042.0,12054.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.27  12064[24:Res:12057.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  12065[24:MRR:12064.0,10.0] ||  -> .
% 7.05/7.27  12066[23:Spt:12065.0,12023.0,12025.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)* -> .
% 7.05/7.27  12067[23:Spt:12065.0,12023.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.05/7.27  12069[23:MRR:12024.0,12066.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.05/7.27  12075[23:Res:12069.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  12076[23:MRR:12075.0,10.0] ||  -> .
% 7.05/7.27  12077[22:Spt:12076.0,12000.0,12002.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*+ -> .
% 7.05/7.27  12078[22:Spt:12076.0,12000.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s2)*.
% 7.05/7.27  12118[16:Res:11253.1,130.1] || m_c_h_element_v_out(c_e_h_3,c_e,s3) -> node16(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.05/7.27  12120[16:MRR:12118.0,11246.0] ||  -> node16(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.05/7.27  12121[23:Spt:12120.2] ||  -> m_c_h_element_v_in1(c_e_h_3,c_e,s2)*.
% 7.05/7.27  12123[23:Res:12121.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s2)*.
% 7.05/7.27  12129[23:Res:12123.0,410.0] ||  -> node21(c_e_h_3,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_3,c_c,s1).
% 7.05/7.27  12141[23:Res:12129.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_c,s2) -> m_and_h_gate_v_out(c_e_h_3,c_c,s1) node20(c_e_h_3,c_c,s1)*.
% 7.05/7.27  12143[23:MRR:12141.0,12123.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1) node20(c_e_h_3,c_c,s1)*.
% 7.05/7.27  12144[23:Res:12143.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1)* m_and_h_gate_v_in1(c_e_h_3,c_c,s1).
% 7.05/7.27  12150[24:Spt:12144.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1)*.
% 7.05/7.27  12152[24:Res:12150.0,412.0] ||  -> node21(c_e_h_3,c_c,s0,s1)*.
% 7.05/7.27  12157[24:Res:12152.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_c,s1) -> node20(c_e_h_3,c_c,s0)*.
% 7.05/7.27  12159[24:MRR:12157.0,12150.0] ||  -> node20(c_e_h_3,c_c,s0)*.
% 7.05/7.27  12169[24:Res:12159.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_c,s0)*.
% 7.05/7.27  12171[24:Res:12169.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_3,c_a,s0)*.
% 7.05/7.27  12172[24:MRR:12171.0,121.0] ||  -> .
% 7.05/7.27  12173[24:Spt:12172.0,12144.0,12150.0] || m_and_h_gate_v_out(c_e_h_3,c_c,s1)*+ -> .
% 7.05/7.27  12174[24:Spt:12172.0,12144.1] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_c,s1)*.
% 7.05/7.27  12178[24:Res:12174.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_3,c_a,s1)*.
% 7.05/7.27  12183[24:Res:12178.0,375.0] ||  -> node12(c_e_h_3,c_a,s0,s1)*.
% 7.05/7.27  12193[24:Res:12183.0,123.1] || m_mutex_h_half_v_out(c_e_h_3,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_3,c_a,s0).
% 7.05/7.27  12195[24:MRR:12193.0,12178.0] ||  -> m_mutex_h_half_v_inp(c_e_h_3,c_a,s0)*.
% 7.05/7.27  12196[24:Res:12195.0,18.0] ||  -> m_user_v_req(c_e_h_3,c_u,s0)*.
% 7.05/7.27  12197[24:MRR:12196.0,106.0] ||  -> .
% 7.05/7.27  12198[23:Spt:12197.0,12120.2,12121.0] || m_c_h_element_v_in1(c_e_h_3,c_e,s2)* -> .
% 7.05/7.27  12199[23:Spt:12197.0,12120.0,12120.1] ||  -> node16(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)*.
% 7.05/7.27  12200[23:MRR:11561.1,12198.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s2)* -> .
% 7.05/7.27  12206[23:Res:12199.1,87.0] ||  -> node16(c_e_h_3,c_e,s2) m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.05/7.27  12207[23:MRR:12206.1,11612.0] ||  -> node16(c_e_h_3,c_e,s2)*.
% 7.05/7.27  12210[23:Res:12207.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.05/7.27  12211[23:MRR:12210.0,12210.1,12200.0,12198.0] ||  -> .
% 7.05/7.27  12212[19:Spt:12211.0,6302.2,11605.0] || m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2)*+ -> .
% 7.05/7.27  12213[19:Spt:12211.0,6302.0,6302.1] || m_and_h_gate_h_init_v_in1(c_e_h_3,c_m,s1)*+ -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1).
% 7.05/7.27  12215[19:Res:67.1,12213.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1) m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1)*.
% 7.05/7.27  12220[19:Res:12215.1,81.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1)* m_and_h_gate_v_in2(c_e_h_3,c_p,s1).
% 7.05/7.27  12223[19:Res:12215.1,392.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1) node10(c_e_h_3,c_n,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0).
% 7.05/7.27  12224[20:Spt:12220.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1)*.
% 7.05/7.27  12226[20:Res:12224.0,595.0] ||  -> node16(c_e_h_3,c_f,s0) node14(c_e_h_3,c_f,s0,s1)*.
% 7.05/7.27  12228[20:Res:12224.0,515.0] ||  -> node17(c_e_h_3,c_f,s0)*.
% 7.05/7.27  12231[20:Res:12228.0,135.0] || m_c_h_element_v_in2(c_e_h_3,c_f,s0)* -> m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.27  12232[20:Res:12228.0,136.0] || m_c_h_element_v_in1(c_e_h_3,c_f,s0) -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)*.
% 7.05/7.27  12308[20:Res:12226.1,130.1] || m_c_h_element_v_out(c_e_h_3,c_f,s1)* -> node16(c_e_h_3,c_f,s0) m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.27  12310[20:MRR:12308.0,12224.0] ||  -> node16(c_e_h_3,c_f,s0) m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.27  12311[21:Spt:12310.0] ||  -> node16(c_e_h_3,c_f,s0)*.
% 7.05/7.27  12312[21:Res:12311.0,134.0] || m_c_h_element_v_in2(c_e_h_3,c_f,s0)* m_c_h_element_v_in1(c_e_h_3,c_f,s0) -> .
% 7.05/7.27  12313[21:Res:12311.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)* m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.27  12314[21:MRR:12313.0,12231.0] ||  -> m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.27  12315[21:MRR:12232.0,12314.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)*.
% 7.05/7.27  12316[21:MRR:12312.0,12312.1,12315.0,12314.0] ||  -> .
% 7.05/7.27  12317[21:Spt:12316.0,12310.0,12311.0] || node16(c_e_h_3,c_f,s0)* -> .
% 7.05/7.27  12318[21:Spt:12316.0,12310.1] ||  -> m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.27  12321[21:Res:12318.0,40.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_d,s0)*.
% 7.05/7.27  12322[21:MRR:12321.0,142.0] ||  -> .
% 7.05/7.27  12323[20:Spt:12322.0,12220.0,12224.0] || m_c_h_element_v_out(c_e_h_3,c_f,s1)*+ -> .
% 7.05/7.27  12324[20:Spt:12322.0,12220.1] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_p,s1)*.
% 7.05/7.27  12325[20:MRR:12215.0,12323.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1)*.
% 7.05/7.27  12329[20:MRR:12223.0,12323.0] ||  -> node10(c_e_h_3,c_n,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0).
% 7.05/7.27  12391[20:Res:12329.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1) -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) node9(c_e_h_3,c_n,s0)*.
% 7.05/7.27  12393[20:MRR:12391.0,12325.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) node9(c_e_h_3,c_n,s0)*.
% 7.05/7.27  12395[20:Res:12393.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) m_and_h_gate_h_init_v_in2(c_e_h_3,c_n,s0)*.
% 7.05/7.27  12396[20:MRR:12395.1,273.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0)*.
% 7.05/7.27  12401[20:Res:12396.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_3,c_n,s0)*.
% 7.05/7.27  12405[20:Res:12401.0,78.1] || m_cell_v_token(c_e_h_3,s0)* -> .
% 7.05/7.27  12407[20:MRR:12405.0,16.0] ||  -> .
% 7.05/7.27  12408[18:Spt:12407.0,11255.0,11560.0] || node17(c_e_h_3,c_e,s2)*+ -> .
% 7.05/7.27  12409[18:Spt:12407.0,11255.1] ||  -> m_c_h_element_v_out(c_e_h_3,c_e,s2)*.
% 7.05/7.27  12410[18:MRR:11291.0,12408.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.05/7.27  12411[18:MRR:2031.1,12410.0] || m_and_h_gate_v_in2(c_e_h_3,c_r,s2)*+ -> .
% 7.05/7.27  12434[19:Spt:11540.1] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s3)*.
% 7.05/7.27  12437[19:Res:12434.0,409.0] ||  -> node21(c_e_h_1,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_1,c_r,s2).
% 7.05/7.27  12464[19:Res:12437.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s3) -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.05/7.27  12466[19:MRR:12464.0,12434.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.05/7.27  12469[20:Spt:12466.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2)*.
% 7.05/7.27  12472[20:Res:12469.0,96.0] ||  -> m_user_v_ack(c_e_h_1,c_u,s2)*.
% 7.05/7.27  12473[20:Res:12472.0,34.0] || m_and_h_gate_v_in2(c_e_h_1,c_d,s2)*+ -> .
% 7.05/7.27  12484[20:Res:2305.0,12473.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1) m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.05/7.27  12488[21:Spt:12484.1] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.05/7.27  12489[21:Res:12488.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  12494[21:Res:12489.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  12499[21:Res:12494.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  12501[21:MRR:12499.0,10.0] ||  -> .
% 7.05/7.27  12502[21:Spt:12501.0,12484.1,12488.0] || m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*+ -> .
% 7.05/7.27  12503[21:Spt:12501.0,12484.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1)*.
% 7.05/7.27  12506[21:Res:12503.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.05/7.27  12513[21:Res:12506.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.05/7.27  12576[21:Res:12513.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.27  12578[21:MRR:12576.0,12506.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.27  12579[21:Res:12578.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.27  12580[21:Res:12578.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.27  12582[22:Spt:12579.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  12585[22:Res:12582.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.05/7.27  12588[22:MRR:12585.0,12502.0] ||  -> .
% 7.05/7.27  12589[22:Spt:12588.0,12579.0,12582.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)* -> .
% 7.05/7.27  12590[22:Spt:12588.0,12579.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.27  12592[22:MRR:12580.0,12589.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.27  12596[22:Res:12592.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  12597[22:MRR:12596.0,10.0] ||  -> .
% 7.05/7.27  12598[20:Spt:12597.0,12466.0,12469.0] || m_and_h_gate_v_out(c_e_h_1,c_r,s2)*+ -> .
% 7.05/7.27  12599[20:Spt:12597.0,12466.1] ||  -> node20(c_e_h_1,c_r,s2)*.
% 7.05/7.27  12603[20:Res:12599.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s2)*.
% 7.05/7.27  12614[20:Res:12603.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.05/7.27  12630[20:Res:12614.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.05/7.27  12671[20:Res:12630.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.05/7.27  12673[20:MRR:12671.0,12614.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.05/7.27  12675[20:Res:12673.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.05/7.27  12676[20:Res:12673.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.05/7.27  12677[21:Spt:12675.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.05/7.27  12682[21:Res:12677.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.05/7.27  12693[21:Res:12682.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.27  12695[21:MRR:12693.0,12677.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.27  12696[21:Res:12695.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.27  12697[21:Res:12695.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.27  12698[22:Spt:12696.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  12703[22:Res:12698.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  12707[22:Res:12703.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  12709[22:MRR:12707.0,10.0] ||  -> .
% 7.05/7.27  12710[22:Spt:12709.0,12696.0,12698.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.05/7.27  12711[22:Spt:12709.0,12696.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.27  12713[22:MRR:12697.0,12710.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.27  12720[22:Res:12713.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  12721[22:MRR:12720.0,10.0] ||  -> .
% 7.05/7.27  12722[21:Spt:12721.0,12675.0,12677.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)* -> .
% 7.05/7.27  12723[21:Spt:12721.0,12675.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.05/7.27  12725[21:MRR:12676.0,12722.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.05/7.27  12731[21:Res:12725.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  12732[21:MRR:12731.0,10.0] ||  -> .
% 7.05/7.27  12733[19:Spt:12732.0,11540.1,12434.0] || m_and_h_gate_v_out(c_e_h_1,c_r,s3)*+ -> .
% 7.05/7.27  12734[19:Spt:12732.0,11540.0] ||  -> node21(c_e_h_1,c_r,s3,s4)*.
% 7.05/7.27  12745[19:Res:592.1,12733.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_d,s4)* m_and_h_gate_v_in2(c_e_h_1,c_r,s3).
% 7.05/7.27  12753[20:Spt:12745.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_d,s4)*.
% 7.05/7.27  12756[20:Res:12753.0,282.1] node24(s4) ||  -> .
% 7.05/7.27  12758[20:SSi:12756.0,5.0,2015.0,6883.0,11234.0,11235.0,11539.0] ||  -> .
% 7.05/7.27  12759[20:Spt:12758.0,12745.0,12753.0] || m_and_h_gate_v_in2(c_e_h_1,c_d,s4)*+ -> .
% 7.05/7.27  12760[20:Spt:12758.0,12745.1] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s3)*.
% 7.05/7.27  12818[21:Spt:2077.1] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2)*.
% 7.05/7.27  12821[21:Res:12818.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_r,s2)*.
% 7.05/7.27  12824[21:MRR:12821.0,12411.0] ||  -> .
% 7.05/7.27  12825[21:Spt:12824.0,2077.1,12818.0] || m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2)*+ -> .
% 7.05/7.27  12826[21:Spt:12824.0,2077.0] ||  -> node10(c_e_h_3,c_m,s2,s3)*.
% 7.05/7.27  12828[21:MRR:6302.2,12825.0] || m_and_h_gate_h_init_v_in1(c_e_h_3,c_m,s1)*+ -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1).
% 7.05/7.27  12877[21:Res:67.1,12828.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1) m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1)*.
% 7.05/7.27  12879[21:Res:12877.1,81.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1)* m_and_h_gate_v_in2(c_e_h_3,c_p,s1).
% 7.05/7.27  12882[21:Res:12877.1,392.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1) node10(c_e_h_3,c_n,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0).
% 7.05/7.27  12883[22:Spt:12879.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1)*.
% 7.05/7.27  12885[22:Res:12883.0,595.0] ||  -> node16(c_e_h_3,c_f,s0) node14(c_e_h_3,c_f,s0,s1)*.
% 7.05/7.27  12887[22:Res:12883.0,515.0] ||  -> node17(c_e_h_3,c_f,s0)*.
% 7.05/7.27  12891[22:Res:12887.0,135.0] || m_c_h_element_v_in2(c_e_h_3,c_f,s0)* -> m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.27  12892[22:Res:12887.0,136.0] || m_c_h_element_v_in1(c_e_h_3,c_f,s0) -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)*.
% 7.05/7.27  12927[22:Res:12885.1,130.1] || m_c_h_element_v_out(c_e_h_3,c_f,s1)* -> node16(c_e_h_3,c_f,s0) m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.27  12929[22:MRR:12927.0,12883.0] ||  -> node16(c_e_h_3,c_f,s0) m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.27  12930[23:Spt:12929.0] ||  -> node16(c_e_h_3,c_f,s0)*.
% 7.05/7.27  12931[23:Res:12930.0,134.0] || m_c_h_element_v_in2(c_e_h_3,c_f,s0)* m_c_h_element_v_in1(c_e_h_3,c_f,s0) -> .
% 7.05/7.27  12932[23:Res:12930.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)* m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.27  12933[23:MRR:12932.0,12891.0] ||  -> m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.27  12934[23:MRR:12892.0,12933.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)*.
% 7.05/7.27  12935[23:MRR:12931.0,12931.1,12934.0,12933.0] ||  -> .
% 7.05/7.27  12936[23:Spt:12935.0,12929.0,12930.0] || node16(c_e_h_3,c_f,s0)* -> .
% 7.05/7.27  12937[23:Spt:12935.0,12929.1] ||  -> m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.27  12940[23:Res:12937.0,40.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_d,s0)*.
% 7.05/7.27  12941[23:MRR:12940.0,142.0] ||  -> .
% 7.05/7.27  12942[22:Spt:12941.0,12879.0,12883.0] || m_c_h_element_v_out(c_e_h_3,c_f,s1)*+ -> .
% 7.05/7.27  12943[22:Spt:12941.0,12879.1] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_p,s1)*.
% 7.05/7.27  12944[22:MRR:12877.0,12942.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1)*.
% 7.05/7.27  12948[22:MRR:12882.0,12942.0] ||  -> node10(c_e_h_3,c_n,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0).
% 7.05/7.27  12974[22:Res:12948.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1) -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) node9(c_e_h_3,c_n,s0)*.
% 7.05/7.27  12976[22:MRR:12974.0,12944.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) node9(c_e_h_3,c_n,s0)*.
% 7.05/7.27  12978[22:Res:12976.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) m_and_h_gate_h_init_v_in2(c_e_h_3,c_n,s0)*.
% 7.05/7.27  12979[22:MRR:12978.1,273.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0)*.
% 7.05/7.27  12993[22:Res:12979.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_3,c_n,s0)*.
% 7.05/7.27  12996[22:Res:12993.0,78.1] || m_cell_v_token(c_e_h_3,s0)* -> .
% 7.05/7.27  12998[22:MRR:12996.0,16.0] ||  -> .
% 7.05/7.27  12999[16:Spt:12998.0,11236.0,11243.0] || m_and_h_gate_v_in1(c_e_h_3,c_r,s3)*+ -> .
% 7.05/7.27  13000[16:Spt:12998.0,11236.1] ||  -> node23(s4)*.
% 7.05/7.27  13001[16:MRR:6879.0,13000.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s3)*.
% 7.05/7.27  13010[16:Res:13001.0,409.0] ||  -> node21(c_e_h_2,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_2,c_r,s2).
% 7.05/7.27  13059[16:Res:13010.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_r,s3) -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.05/7.27  13061[16:MRR:13059.0,13001.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.05/7.27  13069[17:Spt:13061.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2)*.
% 7.05/7.27  13072[17:Res:13069.0,96.0] ||  -> m_user_v_ack(c_e_h_2,c_u,s2)*.
% 7.05/7.27  13073[17:Res:13072.0,34.0] || m_and_h_gate_v_in2(c_e_h_2,c_d,s2)*+ -> .
% 7.05/7.27  13075[17:Res:2305.0,13073.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1) m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.05/7.27  13119[18:Spt:13075.1] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.05/7.27  13120[18:Res:13119.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13129[18:Res:13120.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13133[18:Res:13129.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.27  13135[18:MRR:13133.0,13.0] ||  -> .
% 7.05/7.27  13136[18:Spt:13135.0,13075.1,13119.0] || m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*+ -> .
% 7.05/7.27  13137[18:Spt:13135.0,13075.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1)*.
% 7.05/7.27  13140[18:Res:13137.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.05/7.27  13147[18:Res:13140.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.05/7.27  13279[18:Res:13147.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13281[18:MRR:13279.0,13140.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13282[18:Res:13281.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13283[18:Res:13281.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13301[19:Spt:13282.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13304[19:Res:13301.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.05/7.27  13307[19:MRR:13304.0,13136.0] ||  -> .
% 7.05/7.27  13308[19:Spt:13307.0,13282.0,13301.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*+ -> .
% 7.05/7.27  13309[19:Spt:13307.0,13282.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13311[19:MRR:13283.0,13308.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13318[19:Res:13311.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.27  13319[19:MRR:13318.0,13.0] ||  -> .
% 7.05/7.27  13320[17:Spt:13319.0,13061.0,13069.0] || m_and_h_gate_v_out(c_e_h_2,c_r,s2)*+ -> .
% 7.05/7.27  13321[17:Spt:13319.0,13061.1] ||  -> node20(c_e_h_2,c_r,s2)*.
% 7.05/7.27  13325[17:Res:13321.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s2)*.
% 7.05/7.27  13327[17:Res:13325.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.05/7.27  13348[17:Res:13327.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.05/7.27  13453[17:Res:13348.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.05/7.27  13455[17:MRR:13453.0,13327.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.05/7.27  13463[17:Res:13455.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.05/7.27  13550[18:Spt:13455.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.05/7.27  13555[18:Res:13550.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.05/7.27  13626[18:Res:13555.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13628[18:MRR:13626.0,13550.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13629[18:Res:13628.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13630[18:Res:13628.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13631[19:Spt:13629.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13636[19:Res:13631.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13643[19:Res:13636.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.27  13645[19:MRR:13643.0,13.0] ||  -> .
% 7.05/7.27  13646[19:Spt:13645.0,13629.0,13631.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*+ -> .
% 7.05/7.27  13647[19:Spt:13645.0,13629.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13649[19:MRR:13630.0,13646.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13656[19:Res:13649.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.27  13657[19:MRR:13656.0,13.0] ||  -> .
% 7.05/7.27  13658[18:Spt:13657.0,13455.0,13550.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)* -> .
% 7.05/7.27  13659[18:Spt:13657.0,13455.1] ||  -> node9(c_e_h_2,c_m,s1)*.
% 7.05/7.27  13660[18:MRR:13463.0,13658.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.05/7.27  13667[18:Res:13660.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.27  13668[18:MRR:13667.0,13.0] ||  -> .
% 7.05/7.27  13669[15:Spt:13668.0,11217.0,11224.0] || trans(s4,s3)*+ -> .
% 7.05/7.27  13670[15:Spt:13668.0,11217.1,11217.2] ||  -> trans(s4,s2) trans(s4,s0)*.
% 7.05/7.27  13671[15:MRR:11218.0,13669.0] ||  -> trans(s4,s2)* until2p29(s0).
% 7.05/7.27  13677[16:Spt:13670.0] ||  -> trans(s4,s2)*.
% 7.05/7.27  13685[16:Res:13677.0,6885.0] ||  -> until2p29(s2)*.
% 7.05/7.27  13686[16:MRR:924.0,13685.0] ||  -> xuntil2p30(s2)*.
% 7.05/7.27  13687[16:MRR:171.0,13686.0] ||  -> until2p29(s3)*.
% 7.05/7.27  13688[16:MRR:2026.0,13687.0] ||  -> xuntil2p30(s3)*.
% 7.05/7.27  13689[16:MRR:170.0,13688.0] ||  -> until2p29(s4)*.
% 7.05/7.27  13690[16:MRR:181.0,13689.0] ||  -> node26(s4)*.
% 7.05/7.27  13691[16:MRR:6882.0,13689.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s3)* node24(s4).
% 7.05/7.27  13698[17:Spt:13691.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s3)*.
% 7.05/7.27  13700[17:Res:13698.0,409.0] ||  -> node21(c_e_h_2,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_2,c_r,s2).
% 7.05/7.27  13775[17:Res:13700.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_r,s3) -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.05/7.27  13777[17:MRR:13775.0,13698.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.05/7.27  13778[18:Spt:13777.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2)*.
% 7.05/7.27  13781[18:Res:13778.0,96.0] ||  -> m_user_v_ack(c_e_h_2,c_u,s2)*.
% 7.05/7.27  13782[18:Res:13781.0,34.0] || m_and_h_gate_v_in2(c_e_h_2,c_d,s2)*+ -> .
% 7.05/7.27  13784[18:Res:2305.0,13782.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1) m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.05/7.27  13788[19:Spt:13784.1] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.05/7.27  13789[19:Res:13788.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13794[19:Res:13789.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13796[19:Res:13794.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.27  13798[19:MRR:13796.0,13.0] ||  -> .
% 7.05/7.27  13799[19:Spt:13798.0,13784.1,13788.0] || m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*+ -> .
% 7.05/7.27  13800[19:Spt:13798.0,13784.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1)*.
% 7.05/7.27  13803[19:Res:13800.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.05/7.27  13810[19:Res:13803.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.05/7.27  13840[19:Res:13810.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13842[19:MRR:13840.0,13803.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13843[19:Res:13842.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13844[19:Res:13842.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13845[20:Spt:13843.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13848[20:Res:13845.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.05/7.27  13851[20:MRR:13848.0,13799.0] ||  -> .
% 7.05/7.27  13852[20:Spt:13851.0,13843.0,13845.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)* -> .
% 7.05/7.27  13853[20:Spt:13851.0,13843.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13855[20:MRR:13844.0,13852.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13859[20:Res:13855.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.27  13860[20:MRR:13859.0,13.0] ||  -> .
% 7.05/7.27  13861[18:Spt:13860.0,13777.0,13778.0] || m_and_h_gate_v_out(c_e_h_2,c_r,s2)*+ -> .
% 7.05/7.27  13862[18:Spt:13860.0,13777.1] ||  -> node20(c_e_h_2,c_r,s2)*.
% 7.05/7.27  13866[18:Res:13862.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s2)*.
% 7.05/7.27  13877[18:Res:13866.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.05/7.27  13893[18:Res:13877.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.05/7.27  13922[18:Res:13893.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.05/7.27  13924[18:MRR:13922.0,13877.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.05/7.27  13925[18:Res:13924.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.05/7.27  13926[18:Res:13924.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.05/7.27  13930[19:Spt:13925.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.05/7.27  13935[19:Res:13930.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.05/7.27  13952[19:Res:13935.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13954[19:MRR:13952.0,13930.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13955[19:Res:13954.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13956[19:Res:13954.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13957[20:Spt:13955.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13962[20:Res:13957.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13969[20:Res:13962.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.27  13971[20:MRR:13969.0,13.0] ||  -> .
% 7.05/7.27  13972[20:Spt:13971.0,13955.0,13957.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)* -> .
% 7.05/7.27  13973[20:Spt:13971.0,13955.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13975[20:MRR:13956.0,13972.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.27  13979[20:Res:13975.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.27  13980[20:MRR:13979.0,13.0] ||  -> .
% 7.05/7.27  13981[19:Spt:13980.0,13925.0,13930.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*+ -> .
% 7.05/7.27  13982[19:Spt:13980.0,13925.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.05/7.27  13984[19:MRR:13926.0,13981.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.05/7.27  13990[19:Res:13984.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.27  13991[19:MRR:13990.0,13.0] ||  -> .
% 7.05/7.27  13992[17:Spt:13991.0,13691.0,13698.0] || m_and_h_gate_v_out(c_e_h_2,c_r,s3)*+ -> .
% 7.05/7.27  13993[17:Spt:13991.0,13691.1] ||  -> node24(s4)*.
% 7.05/7.27  13994[17:MRR:523.0,13993.0] ||  -> node21(c_e_h_1,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_1,c_r,s3).
% 7.05/7.27  13995[17:MRR:2054.0,13993.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s3)*.
% 7.05/7.27  14008[17:Res:13995.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_e,s3)*.
% 7.05/7.27  14019[17:Res:14008.0,582.0] ||  -> node16(c_e_h_3,c_e,s2) node14(c_e_h_3,c_e,s2,s3)* m_c_h_element_v_out(c_e_h_3,c_e,s2).
% 7.05/7.27  14021[17:Res:14008.0,509.0] ||  -> node17(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)*.
% 7.05/7.27  14033[17:Res:14021.1,87.0] ||  -> node17(c_e_h_3,c_e,s2) m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.05/7.27  14042[17:Res:13994.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s4)+ -> m_and_h_gate_v_out(c_e_h_1,c_r,s3) node20(c_e_h_1,c_r,s3)*.
% 7.05/7.27  14044[18:Spt:14033.0] ||  -> node17(c_e_h_3,c_e,s2)*.
% 7.05/7.27  14045[18:Res:14044.0,135.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s2)*+ -> m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.05/7.27  14074[19:Spt:14042.1] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s3)*.
% 7.05/7.27  14076[19:Res:14074.0,409.0] ||  -> node21(c_e_h_1,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_1,c_r,s2).
% 7.05/7.27  14090[19:Res:14076.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s3) -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.05/7.27  14092[19:MRR:14090.0,14074.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.05/7.27  14093[20:Spt:14092.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2)*.
% 7.05/7.27  14096[20:Res:14093.0,96.0] ||  -> m_user_v_ack(c_e_h_1,c_u,s2)*.
% 7.05/7.27  14097[20:Res:14096.0,34.0] || m_and_h_gate_v_in2(c_e_h_1,c_d,s2)*+ -> .
% 7.05/7.27  14099[20:Res:2305.0,14097.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1) m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.05/7.27  14103[21:Spt:14099.1] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.05/7.27  14104[21:Res:14103.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  14109[21:Res:14104.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  14111[21:Res:14109.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  14113[21:MRR:14111.0,10.0] ||  -> .
% 7.05/7.27  14114[21:Spt:14113.0,14099.1,14103.0] || m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*+ -> .
% 7.05/7.27  14115[21:Spt:14113.0,14099.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1)*.
% 7.05/7.27  14118[21:Res:14115.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.05/7.27  14125[21:Res:14118.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.05/7.27  14156[21:Res:14125.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.27  14158[21:MRR:14156.0,14118.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.27  14159[21:Res:14158.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.27  14160[21:Res:14158.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.27  14161[22:Spt:14159.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  14164[22:Res:14161.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.05/7.27  14167[22:MRR:14164.0,14114.0] ||  -> .
% 7.05/7.27  14168[22:Spt:14167.0,14159.0,14161.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.05/7.27  14169[22:Spt:14167.0,14159.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.27  14171[22:MRR:14160.0,14168.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.27  14178[22:Res:14171.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  14179[22:MRR:14178.0,10.0] ||  -> .
% 7.05/7.27  14180[20:Spt:14179.0,14092.0,14093.0] || m_and_h_gate_v_out(c_e_h_1,c_r,s2)*+ -> .
% 7.05/7.27  14181[20:Spt:14179.0,14092.1] ||  -> node20(c_e_h_1,c_r,s2)*.
% 7.05/7.27  14185[20:Res:14181.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s2)*.
% 7.05/7.27  14187[20:Res:14185.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.05/7.27  14210[20:Res:14187.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.05/7.27  14259[20:Res:14210.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.05/7.27  14261[20:MRR:14259.0,14187.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.05/7.27  14275[20:Res:14261.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.05/7.27  14276[20:Res:14261.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.05/7.27  14277[21:Spt:14275.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.05/7.27  14282[21:Res:14277.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.05/7.27  14323[21:Res:14282.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.27  14325[21:MRR:14323.0,14277.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.27  14326[21:Res:14325.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.27  14327[21:Res:14325.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.27  14328[22:Spt:14326.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  14333[22:Res:14328.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  14339[22:Res:14333.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  14341[22:MRR:14339.0,10.0] ||  -> .
% 7.05/7.27  14342[22:Spt:14341.0,14326.0,14328.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.05/7.27  14343[22:Spt:14341.0,14326.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.27  14345[22:MRR:14327.0,14342.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.27  14352[22:Res:14345.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  14353[22:MRR:14352.0,10.0] ||  -> .
% 7.05/7.27  14354[21:Spt:14353.0,14275.0,14277.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)* -> .
% 7.05/7.27  14355[21:Spt:14353.0,14275.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.05/7.27  14357[21:MRR:14276.0,14354.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.05/7.27  14363[21:Res:14357.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  14364[21:MRR:14363.0,10.0] ||  -> .
% 7.05/7.27  14365[19:Spt:14364.0,14042.1,14074.0] || m_and_h_gate_v_out(c_e_h_1,c_r,s3)*+ -> .
% 7.05/7.27  14366[19:Spt:14364.0,14042.0,14042.2] || m_and_h_gate_v_out(c_e_h_1,c_r,s4)+ -> node20(c_e_h_1,c_r,s3)*.
% 7.05/7.27  14371[19:Res:221.1,14366.0] node24(s4) ||  -> node20(c_e_h_1,c_r,s3)*.
% 7.05/7.27  14373[19:SSi:14371.0,5.0,2015.0,6883.0,13689.0,13690.0,13993.0] ||  -> node20(c_e_h_1,c_r,s3)*.
% 7.05/7.27  14375[19:Res:14373.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s3)*.
% 7.05/7.27  14384[19:Res:14375.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s3)*.
% 7.05/7.27  14405[19:Res:14384.0,390.0] ||  -> node10(c_e_h_1,c_m,s2,s3)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2).
% 7.05/7.27  14441[19:Res:14405.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s3) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) node9(c_e_h_1,c_m,s2)*.
% 7.05/7.27  14443[19:MRR:14441.0,14384.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) node9(c_e_h_1,c_m,s2)*.
% 7.05/7.27  14444[19:Res:14443.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s2)*.
% 7.05/7.27  14446[20:Spt:14444.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.05/7.27  14452[20:Res:14446.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.05/7.27  14471[20:Res:14452.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.05/7.27  14473[20:MRR:14471.0,14446.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.05/7.27  14474[20:Res:14473.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.05/7.27  14475[20:Res:14473.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.05/7.27  14476[21:Spt:14474.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.05/7.27  14481[21:Res:14476.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.05/7.27  14492[21:Res:14481.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.27  14494[21:MRR:14492.0,14476.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.27  14495[21:Res:14494.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.27  14496[21:Res:14494.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.27  14497[22:Spt:14495.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  14502[22:Res:14497.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  14513[22:Res:14502.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  14515[22:MRR:14513.0,10.0] ||  -> .
% 7.05/7.27  14516[22:Spt:14515.0,14495.0,14497.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.05/7.27  14517[22:Spt:14515.0,14495.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.27  14519[22:MRR:14496.0,14516.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.27  14526[22:Res:14519.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  14527[22:MRR:14526.0,10.0] ||  -> .
% 7.05/7.27  14528[21:Spt:14527.0,14474.0,14476.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)* -> .
% 7.05/7.27  14529[21:Spt:14527.0,14474.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.05/7.27  14531[21:MRR:14475.0,14528.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.05/7.27  14537[21:Res:14531.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  14538[21:MRR:14537.0,10.0] ||  -> .
% 7.05/7.27  14539[20:Spt:14538.0,14444.0,14446.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*+ -> .
% 7.05/7.27  14540[20:Spt:14538.0,14444.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s2)*.
% 7.05/7.27  14603[21:Spt:6302.2] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2)*.
% 7.05/7.27  14607[21:Res:14603.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_r,s2)*.
% 7.05/7.27  14611[21:MRR:2031.0,14607.0] || m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*+ -> .
% 7.05/7.27  14643[17:Res:14019.1,130.1] || m_c_h_element_v_out(c_e_h_3,c_e,s3) -> node16(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.05/7.27  14645[17:MRR:14643.0,14008.0] ||  -> node16(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.05/7.27  14646[22:Spt:14645.2] ||  -> m_c_h_element_v_in1(c_e_h_3,c_e,s2)*.
% 7.05/7.27  14648[22:Res:14646.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s2)*.
% 7.05/7.27  14655[22:Res:14648.0,410.0] ||  -> node21(c_e_h_3,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_3,c_c,s1).
% 7.05/7.27  14686[22:Res:14655.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_c,s2) -> m_and_h_gate_v_out(c_e_h_3,c_c,s1) node20(c_e_h_3,c_c,s1)*.
% 7.05/7.27  14688[22:MRR:14686.0,14648.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1) node20(c_e_h_3,c_c,s1)*.
% 7.05/7.27  14689[22:Res:14688.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1)* m_and_h_gate_v_in1(c_e_h_3,c_c,s1).
% 7.05/7.27  14692[23:Spt:14689.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1)*.
% 7.05/7.27  14694[23:Res:14692.0,412.0] ||  -> node21(c_e_h_3,c_c,s0,s1)*.
% 7.05/7.27  14699[23:Res:14694.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_c,s1) -> node20(c_e_h_3,c_c,s0)*.
% 7.05/7.27  14701[23:MRR:14699.0,14692.0] ||  -> node20(c_e_h_3,c_c,s0)*.
% 7.05/7.27  14706[23:Res:14701.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_c,s0)*.
% 7.05/7.27  14708[23:Res:14706.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_3,c_a,s0)*.
% 7.05/7.27  14709[23:MRR:14708.0,121.0] ||  -> .
% 7.05/7.27  14710[23:Spt:14709.0,14689.0,14692.0] || m_and_h_gate_v_out(c_e_h_3,c_c,s1)*+ -> .
% 7.05/7.27  14711[23:Spt:14709.0,14689.1] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_c,s1)*.
% 7.05/7.27  14715[23:Res:14711.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_3,c_a,s1)*.
% 7.05/7.27  14720[23:Res:14715.0,375.0] ||  -> node12(c_e_h_3,c_a,s0,s1)*.
% 7.05/7.27  14730[23:Res:14720.0,123.1] || m_mutex_h_half_v_out(c_e_h_3,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_3,c_a,s0).
% 7.05/7.27  14732[23:MRR:14730.0,14715.0] ||  -> m_mutex_h_half_v_inp(c_e_h_3,c_a,s0)*.
% 7.05/7.27  14733[23:Res:14732.0,18.0] ||  -> m_user_v_req(c_e_h_3,c_u,s0)*.
% 7.05/7.27  14734[23:MRR:14733.0,106.0] ||  -> .
% 7.05/7.27  14735[22:Spt:14734.0,14645.2,14646.0] || m_c_h_element_v_in1(c_e_h_3,c_e,s2)* -> .
% 7.05/7.27  14736[22:Spt:14734.0,14645.0,14645.1] ||  -> node16(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)*.
% 7.05/7.27  14737[22:MRR:14045.1,14735.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s2)* -> .
% 7.05/7.27  14745[22:Res:14736.1,87.0] ||  -> node16(c_e_h_3,c_e,s2) m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.05/7.27  14746[22:MRR:14745.1,14611.0] ||  -> node16(c_e_h_3,c_e,s2)*.
% 7.05/7.27  14749[22:Res:14746.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.05/7.27  14750[22:MRR:14749.0,14749.1,14737.0,14735.0] ||  -> .
% 7.05/7.27  14751[21:Spt:14750.0,6302.2,14603.0] || m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2)*+ -> .
% 7.05/7.27  14752[21:Spt:14750.0,6302.0,6302.1] || m_and_h_gate_h_init_v_in1(c_e_h_3,c_m,s1)*+ -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1).
% 7.05/7.27  14754[21:Res:67.1,14752.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1) m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1)*.
% 7.05/7.27  14759[21:Res:14754.1,81.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1)* m_and_h_gate_v_in2(c_e_h_3,c_p,s1).
% 7.05/7.27  14762[21:Res:14754.1,392.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1) node10(c_e_h_3,c_n,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0).
% 7.05/7.27  14763[22:Spt:14759.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1)*.
% 7.05/7.27  14765[22:Res:14763.0,595.0] ||  -> node16(c_e_h_3,c_f,s0) node14(c_e_h_3,c_f,s0,s1)*.
% 7.05/7.27  14767[22:Res:14763.0,515.0] ||  -> node17(c_e_h_3,c_f,s0)*.
% 7.05/7.27  14770[22:Res:14767.0,135.0] || m_c_h_element_v_in2(c_e_h_3,c_f,s0)* -> m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.27  14771[22:Res:14767.0,136.0] || m_c_h_element_v_in1(c_e_h_3,c_f,s0) -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)*.
% 7.05/7.27  14796[22:Res:14765.1,130.1] || m_c_h_element_v_out(c_e_h_3,c_f,s1)* -> node16(c_e_h_3,c_f,s0) m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.27  14798[22:MRR:14796.0,14763.0] ||  -> node16(c_e_h_3,c_f,s0) m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.27  14799[23:Spt:14798.0] ||  -> node16(c_e_h_3,c_f,s0)*.
% 7.05/7.27  14800[23:Res:14799.0,134.0] || m_c_h_element_v_in2(c_e_h_3,c_f,s0)* m_c_h_element_v_in1(c_e_h_3,c_f,s0) -> .
% 7.05/7.27  14801[23:Res:14799.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)* m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.27  14802[23:MRR:14801.0,14770.0] ||  -> m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.27  14803[23:MRR:14771.0,14802.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)*.
% 7.05/7.27  14804[23:MRR:14800.0,14800.1,14803.0,14802.0] ||  -> .
% 7.05/7.27  14805[23:Spt:14804.0,14798.0,14799.0] || node16(c_e_h_3,c_f,s0)* -> .
% 7.05/7.27  14806[23:Spt:14804.0,14798.1] ||  -> m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.27  14809[23:Res:14806.0,40.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_d,s0)*.
% 7.05/7.27  14810[23:MRR:14809.0,142.0] ||  -> .
% 7.05/7.27  14811[22:Spt:14810.0,14759.0,14763.0] || m_c_h_element_v_out(c_e_h_3,c_f,s1)*+ -> .
% 7.05/7.27  14812[22:Spt:14810.0,14759.1] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_p,s1)*.
% 7.05/7.27  14813[22:MRR:14754.0,14811.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1)*.
% 7.05/7.27  14817[22:MRR:14762.0,14811.0] ||  -> node10(c_e_h_3,c_n,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0).
% 7.05/7.27  14832[22:Res:14817.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1) -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) node9(c_e_h_3,c_n,s0)*.
% 7.05/7.27  14834[22:MRR:14832.0,14813.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) node9(c_e_h_3,c_n,s0)*.
% 7.05/7.27  14836[22:Res:14834.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) m_and_h_gate_h_init_v_in2(c_e_h_3,c_n,s0)*.
% 7.05/7.27  14837[22:MRR:14836.1,273.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0)*.
% 7.05/7.27  14842[22:Res:14837.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_3,c_n,s0)*.
% 7.05/7.27  14845[22:Res:14842.0,78.1] || m_cell_v_token(c_e_h_3,s0)* -> .
% 7.05/7.27  14847[22:MRR:14845.0,16.0] ||  -> .
% 7.05/7.27  14848[18:Spt:14847.0,14033.0,14044.0] || node17(c_e_h_3,c_e,s2)*+ -> .
% 7.05/7.27  14849[18:Spt:14847.0,14033.1] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.05/7.27  14850[18:MRR:2031.1,14849.0] || m_and_h_gate_v_in2(c_e_h_3,c_r,s2)*+ -> .
% 7.05/7.27  15061[19:Spt:6302.2] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2)*.
% 7.05/7.27  15065[19:Res:15061.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_r,s2)*.
% 7.05/7.27  15069[19:MRR:15065.0,14850.0] ||  -> .
% 7.05/7.27  15070[19:Spt:15069.0,6302.2,15061.0] || m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2)*+ -> .
% 7.05/7.27  15071[19:Spt:15069.0,6302.0,6302.1] || m_and_h_gate_h_init_v_in1(c_e_h_3,c_m,s1)*+ -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1).
% 7.05/7.27  15073[19:Res:67.1,15071.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1) m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1)*.
% 7.05/7.27  15075[19:Res:15073.1,81.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1)* m_and_h_gate_v_in2(c_e_h_3,c_p,s1).
% 7.05/7.27  15078[19:Res:15073.1,392.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1) node10(c_e_h_3,c_n,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0).
% 7.05/7.27  15079[20:Spt:15075.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1)*.
% 7.05/7.27  15081[20:Res:15079.0,595.0] ||  -> node16(c_e_h_3,c_f,s0) node14(c_e_h_3,c_f,s0,s1)*.
% 7.05/7.27  15083[20:Res:15079.0,515.0] ||  -> node17(c_e_h_3,c_f,s0)*.
% 7.05/7.27  15086[20:Res:15083.0,135.0] || m_c_h_element_v_in2(c_e_h_3,c_f,s0)* -> m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.27  15087[20:Res:15083.0,136.0] || m_c_h_element_v_in1(c_e_h_3,c_f,s0) -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)*.
% 7.05/7.27  15103[20:Res:15081.1,130.1] || m_c_h_element_v_out(c_e_h_3,c_f,s1)* -> node16(c_e_h_3,c_f,s0) m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.27  15105[20:MRR:15103.0,15079.0] ||  -> node16(c_e_h_3,c_f,s0) m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.27  15115[21:Spt:15105.0] ||  -> node16(c_e_h_3,c_f,s0)*.
% 7.05/7.27  15116[21:Res:15115.0,134.0] || m_c_h_element_v_in2(c_e_h_3,c_f,s0)* m_c_h_element_v_in1(c_e_h_3,c_f,s0) -> .
% 7.05/7.27  15117[21:Res:15115.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)* m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.27  15118[21:MRR:15117.0,15086.0] ||  -> m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.27  15119[21:MRR:15087.0,15118.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)*.
% 7.05/7.27  15120[21:MRR:15116.0,15116.1,15119.0,15118.0] ||  -> .
% 7.05/7.27  15121[21:Spt:15120.0,15105.0,15115.0] || node16(c_e_h_3,c_f,s0)* -> .
% 7.05/7.27  15122[21:Spt:15120.0,15105.1] ||  -> m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.27  15125[21:Res:15122.0,40.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_d,s0)*.
% 7.05/7.27  15126[21:MRR:15125.0,142.0] ||  -> .
% 7.05/7.27  15127[20:Spt:15126.0,15075.0,15079.0] || m_c_h_element_v_out(c_e_h_3,c_f,s1)*+ -> .
% 7.05/7.27  15128[20:Spt:15126.0,15075.1] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_p,s1)*.
% 7.05/7.27  15129[20:MRR:15073.0,15127.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1)*.
% 7.05/7.27  15133[20:MRR:15078.0,15127.0] ||  -> node10(c_e_h_3,c_n,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0).
% 7.05/7.27  15154[20:Res:15133.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1) -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) node9(c_e_h_3,c_n,s0)*.
% 7.05/7.27  15156[20:MRR:15154.0,15129.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) node9(c_e_h_3,c_n,s0)*.
% 7.05/7.27  15158[20:Res:15156.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) m_and_h_gate_h_init_v_in2(c_e_h_3,c_n,s0)*.
% 7.05/7.27  15159[20:MRR:15158.1,273.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0)*.
% 7.05/7.27  15167[20:Res:15159.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_3,c_n,s0)*.
% 7.05/7.27  15170[20:Res:15167.0,78.1] || m_cell_v_token(c_e_h_3,s0)* -> .
% 7.05/7.27  15172[20:MRR:15170.0,16.0] ||  -> .
% 7.05/7.27  15173[16:Spt:15172.0,13670.0,13677.0] || trans(s4,s2)*+ -> .
% 7.05/7.27  15174[16:Spt:15172.0,13670.1] ||  -> trans(s4,s0)*.
% 7.05/7.27  15175[16:MRR:13671.0,15173.0] ||  -> until2p29(s0)*.
% 7.05/7.27  15176[16:MRR:237.0,15175.0] ||  -> xuntil2p30(s0)*.
% 7.05/7.27  15177[16:MRR:173.0,15176.0] ||  -> until2p29(s1)*.
% 7.05/7.27  15178[16:MRR:498.0,15177.0] ||  -> xuntil2p30(s1)*.
% 7.05/7.27  15179[16:MRR:172.0,15178.0] ||  -> until2p29(s2)*.
% 7.05/7.27  15180[16:MRR:924.0,15179.0] ||  -> xuntil2p30(s2)*.
% 7.05/7.27  15181[16:MRR:171.0,15180.0] ||  -> until2p29(s3)*.
% 7.05/7.27  15182[16:MRR:2026.0,15181.0] ||  -> xuntil2p30(s3)*.
% 7.05/7.27  15183[16:MRR:170.0,15182.0] ||  -> until2p29(s4)*.
% 7.05/7.27  15184[16:MRR:181.0,15183.0] ||  -> node26(s4)*.
% 7.05/7.27  15185[16:MRR:2085.0,15183.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s3)* node23(s4).
% 7.05/7.27  15186[16:MRR:6882.0,15183.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s3)* node24(s4).
% 7.05/7.27  15204[17:Spt:15185.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s3)*.
% 7.05/7.27  15207[17:Res:15204.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_e,s3)*.
% 7.05/7.27  15215[17:Res:15207.0,582.0] ||  -> node16(c_e_h_3,c_e,s2) node14(c_e_h_3,c_e,s2,s3)* m_c_h_element_v_out(c_e_h_3,c_e,s2).
% 7.05/7.27  15217[17:Res:15207.0,509.0] ||  -> node17(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)*.
% 7.05/7.27  15226[18:Spt:15186.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s3)*.
% 7.05/7.27  15228[18:Res:15226.0,409.0] ||  -> node21(c_e_h_2,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_2,c_r,s2).
% 7.05/7.27  15252[17:Res:15217.1,87.0] ||  -> node17(c_e_h_3,c_e,s2) m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.05/7.27  15283[18:Res:15228.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_r,s3) -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.05/7.27  15285[18:MRR:15283.0,15226.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.05/7.27  15286[19:Spt:15285.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2)*.
% 7.05/7.27  15289[19:Res:15286.0,96.0] ||  -> m_user_v_ack(c_e_h_2,c_u,s2)*.
% 7.05/7.27  15290[19:Res:15289.0,34.0] || m_and_h_gate_v_in2(c_e_h_2,c_d,s2)*+ -> .
% 7.05/7.27  15292[19:Res:2305.0,15290.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1) m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.05/7.27  15296[20:Spt:15292.1] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.05/7.27  15297[20:Res:15296.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.05/7.27  15302[20:Res:15297.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.05/7.27  15304[20:Res:15302.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.27  15306[20:MRR:15304.0,13.0] ||  -> .
% 7.05/7.27  15307[20:Spt:15306.0,15292.1,15296.0] || m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*+ -> .
% 7.05/7.27  15308[20:Spt:15306.0,15292.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1)*.
% 7.05/7.27  15311[20:Res:15308.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.05/7.27  15318[20:Res:15311.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.05/7.27  15386[20:Res:15318.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.27  15388[20:MRR:15386.0,15311.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.27  15389[20:Res:15388.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.27  15390[20:Res:15388.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.27  15394[21:Spt:15389.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.05/7.27  15397[21:Res:15394.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.05/7.27  15401[21:MRR:15397.0,15307.0] ||  -> .
% 7.05/7.27  15402[21:Spt:15401.0,15389.0,15394.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)* -> .
% 7.05/7.27  15403[21:Spt:15401.0,15389.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.27  15405[21:MRR:15390.0,15402.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.27  15409[21:Res:15405.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.27  15410[21:MRR:15409.0,13.0] ||  -> .
% 7.05/7.27  15411[19:Spt:15410.0,15285.0,15286.0] || m_and_h_gate_v_out(c_e_h_2,c_r,s2)*+ -> .
% 7.05/7.27  15412[19:Spt:15410.0,15285.1] ||  -> node20(c_e_h_2,c_r,s2)*.
% 7.05/7.27  15416[19:Res:15412.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s2)*.
% 7.05/7.27  15427[19:Res:15416.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.05/7.27  15447[19:Res:15427.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.05/7.27  15483[19:Res:15447.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.05/7.27  15485[19:MRR:15483.0,15427.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.05/7.27  15486[19:Res:15485.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.05/7.27  15487[19:Res:15485.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.05/7.27  15488[20:Spt:15486.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.05/7.27  15493[20:Res:15488.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.05/7.27  15499[20:Res:15493.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.27  15501[20:MRR:15499.0,15488.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.27  15502[20:Res:15501.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.27  15503[20:Res:15501.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.27  15504[21:Spt:15502.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.05/7.27  15510[21:Res:15504.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.05/7.27  15513[21:Res:15510.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.27  15515[21:MRR:15513.0,13.0] ||  -> .
% 7.05/7.27  15516[21:Spt:15515.0,15502.0,15504.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)* -> .
% 7.05/7.27  15517[21:Spt:15515.0,15502.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.27  15519[21:MRR:15503.0,15516.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.27  15523[21:Res:15519.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.27  15524[21:MRR:15523.0,13.0] ||  -> .
% 7.05/7.27  15525[20:Spt:15524.0,15486.0,15488.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*+ -> .
% 7.05/7.27  15526[20:Spt:15524.0,15486.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.05/7.27  15528[20:MRR:15487.0,15525.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.05/7.27  15534[20:Res:15528.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.27  15535[20:MRR:15534.0,13.0] ||  -> .
% 7.05/7.27  15536[18:Spt:15535.0,15186.0,15226.0] || m_and_h_gate_v_out(c_e_h_2,c_r,s3)*+ -> .
% 7.05/7.27  15537[18:Spt:15535.0,15186.1] ||  -> node24(s4)*.
% 7.05/7.27  15539[18:MRR:523.0,15537.0] ||  -> node21(c_e_h_1,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_1,c_r,s3).
% 7.05/7.27  15572[19:Spt:15217.0] ||  -> node17(c_e_h_3,c_e,s2)*.
% 7.05/7.27  15573[19:Res:15572.0,135.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s2)*+ -> m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.05/7.27  15579[18:Res:15539.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s4)+ -> m_and_h_gate_v_out(c_e_h_1,c_r,s3) node20(c_e_h_1,c_r,s3)*.
% 7.05/7.27  15590[20:Spt:6302.2] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2)*.
% 7.05/7.27  15594[20:Res:15590.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_r,s2)*.
% 7.05/7.27  15597[20:MRR:2031.0,15594.0] || m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*+ -> .
% 7.05/7.27  15607[21:Spt:15579.1] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s3)*.
% 7.05/7.27  15609[21:Res:15607.0,409.0] ||  -> node21(c_e_h_1,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_1,c_r,s2).
% 7.05/7.27  15626[21:Res:15609.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s3) -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.05/7.27  15628[21:MRR:15626.0,15607.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.05/7.27  15629[22:Spt:15628.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2)*.
% 7.05/7.27  15632[22:Res:15629.0,96.0] ||  -> m_user_v_ack(c_e_h_1,c_u,s2)*.
% 7.05/7.27  15633[22:Res:15632.0,34.0] || m_and_h_gate_v_in2(c_e_h_1,c_d,s2)*+ -> .
% 7.05/7.27  15646[22:Res:2305.0,15633.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1) m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.05/7.27  15650[23:Spt:15646.1] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.05/7.27  15651[23:Res:15650.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  15657[23:Res:15651.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  15659[23:Res:15657.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  15661[23:MRR:15659.0,10.0] ||  -> .
% 7.05/7.27  15662[23:Spt:15661.0,15646.1,15650.0] || m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*+ -> .
% 7.05/7.27  15663[23:Spt:15661.0,15646.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1)*.
% 7.05/7.27  15666[23:Res:15663.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.05/7.27  15673[23:Res:15666.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.05/7.27  15723[23:Res:15673.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.27  15725[23:MRR:15723.0,15666.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.27  15726[23:Res:15725.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.27  15727[23:Res:15725.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.27  15731[24:Spt:15726.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  15734[24:Res:15731.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.05/7.27  15738[24:MRR:15734.0,15662.0] ||  -> .
% 7.05/7.27  15739[24:Spt:15738.0,15726.0,15731.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)* -> .
% 7.05/7.27  15740[24:Spt:15738.0,15726.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.27  15742[24:MRR:15727.0,15739.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.27  15746[24:Res:15742.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  15747[24:MRR:15746.0,10.0] ||  -> .
% 7.05/7.27  15748[22:Spt:15747.0,15628.0,15629.0] || m_and_h_gate_v_out(c_e_h_1,c_r,s2)*+ -> .
% 7.05/7.27  15749[22:Spt:15747.0,15628.1] ||  -> node20(c_e_h_1,c_r,s2)*.
% 7.05/7.27  15753[22:Res:15749.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s2)*.
% 7.05/7.27  15764[22:Res:15753.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.05/7.27  15780[22:Res:15764.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.05/7.27  15809[22:Res:15780.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.05/7.27  15811[22:MRR:15809.0,15764.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.05/7.27  15812[22:Res:15811.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.05/7.27  15813[22:Res:15811.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.05/7.27  15816[23:Spt:15812.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.05/7.27  15821[23:Res:15816.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.05/7.27  15839[23:Res:15821.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.27  15841[23:MRR:15839.0,15816.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.27  15842[23:Res:15841.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.27  15843[23:Res:15841.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.27  15844[24:Spt:15842.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  15850[24:Res:15844.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  15856[24:Res:15850.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  15858[24:MRR:15856.0,10.0] ||  -> .
% 7.05/7.27  15859[24:Spt:15858.0,15842.0,15844.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)* -> .
% 7.05/7.27  15860[24:Spt:15858.0,15842.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.27  15862[24:MRR:15843.0,15859.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.27  15866[24:Res:15862.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  15867[24:MRR:15866.0,10.0] ||  -> .
% 7.05/7.27  15868[23:Spt:15867.0,15812.0,15816.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*+ -> .
% 7.05/7.27  15869[23:Spt:15867.0,15812.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.05/7.27  15871[23:MRR:15813.0,15868.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.05/7.27  15877[23:Res:15871.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  15878[23:MRR:15877.0,10.0] ||  -> .
% 7.05/7.27  15879[21:Spt:15878.0,15579.1,15607.0] || m_and_h_gate_v_out(c_e_h_1,c_r,s3)*+ -> .
% 7.05/7.27  15880[21:Spt:15878.0,15579.0,15579.2] || m_and_h_gate_v_out(c_e_h_1,c_r,s4)+ -> node20(c_e_h_1,c_r,s3)*.
% 7.05/7.27  15885[21:Res:221.1,15880.0] node24(s4) ||  -> node20(c_e_h_1,c_r,s3)*.
% 7.05/7.27  15887[21:SSi:15885.0,5.0,2015.0,6883.0,15183.0,15184.0,15537.0] ||  -> node20(c_e_h_1,c_r,s3)*.
% 7.05/7.27  15888[21:Res:15887.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s3)*.
% 7.05/7.27  15889[21:Res:15887.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s3)*.
% 7.05/7.27  15892[21:Res:15888.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s3)*.
% 7.05/7.27  15898[21:Res:15889.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s3)*.
% 7.05/7.27  15903[21:Res:15892.0,582.0] ||  -> node16(c_e_h_1,c_e,s2) node14(c_e_h_1,c_e,s2,s3)* m_c_h_element_v_out(c_e_h_1,c_e,s2).
% 7.05/7.27  15919[21:Res:15898.0,390.0] ||  -> node10(c_e_h_1,c_m,s2,s3)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2).
% 7.05/7.27  15948[21:Res:15919.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s3) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) node9(c_e_h_1,c_m,s2)*.
% 7.05/7.27  15950[21:MRR:15948.0,15898.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) node9(c_e_h_1,c_m,s2)*.
% 7.05/7.27  15951[21:Res:15950.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s2)*.
% 7.05/7.27  15953[22:Spt:15951.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.05/7.27  15958[22:Res:15953.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.05/7.27  15964[22:Res:15958.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.05/7.27  15966[22:MRR:15964.0,15953.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.05/7.27  15967[22:Res:15966.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.05/7.27  15968[22:Res:15966.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.05/7.27  15969[23:Spt:15967.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.05/7.27  15974[23:Res:15969.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.05/7.27  15979[23:Res:15974.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.27  15981[23:MRR:15979.0,15969.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.27  15982[23:Res:15981.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.27  15983[23:Res:15981.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.27  15984[24:Spt:15982.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  15990[24:Res:15984.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  15993[24:Res:15990.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  15995[24:MRR:15993.0,10.0] ||  -> .
% 7.05/7.27  15996[24:Spt:15995.0,15982.0,15984.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.05/7.27  15997[24:Spt:15995.0,15982.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.27  15999[24:MRR:15983.0,15996.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.27  16006[24:Res:15999.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  16007[24:MRR:16006.0,10.0] ||  -> .
% 7.05/7.27  16008[23:Spt:16007.0,15967.0,15969.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)* -> .
% 7.05/7.27  16009[23:Spt:16007.0,15967.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.05/7.27  16011[23:MRR:15968.0,16008.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.05/7.27  16017[23:Res:16011.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  16018[23:MRR:16017.0,10.0] ||  -> .
% 7.05/7.27  16019[22:Spt:16018.0,15951.0,15953.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*+ -> .
% 7.05/7.27  16020[22:Spt:16018.0,15951.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s2)*.
% 7.05/7.27  16030[21:Res:15903.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s3) -> node16(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.05/7.27  16032[21:MRR:16030.0,15892.0] ||  -> node16(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.05/7.27  16033[23:Spt:16032.2] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s2)*.
% 7.05/7.27  16035[23:Res:16033.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s2)*.
% 7.05/7.27  16038[23:Res:16035.0,410.0] ||  -> node21(c_e_h_1,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_1,c_c,s1).
% 7.05/7.27  16053[23:Res:16038.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s2) -> m_and_h_gate_v_out(c_e_h_1,c_c,s1) node20(c_e_h_1,c_c,s1)*.
% 7.05/7.27  16055[23:MRR:16053.0,16035.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1) node20(c_e_h_1,c_c,s1)*.
% 7.05/7.27  16058[23:Res:16055.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)* m_and_h_gate_v_in1(c_e_h_1,c_c,s1).
% 7.05/7.27  16060[24:Spt:16058.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)*.
% 7.05/7.27  16062[24:Res:16060.0,412.0] ||  -> node21(c_e_h_1,c_c,s0,s1)*.
% 7.05/7.27  16068[24:Res:16062.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s1) -> node20(c_e_h_1,c_c,s0)*.
% 7.05/7.27  16070[24:MRR:16068.0,16060.0] ||  -> node20(c_e_h_1,c_c,s0)*.
% 7.05/7.27  16071[24:Res:16070.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s0)*.
% 7.05/7.27  16073[24:Res:16071.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s0)*.
% 7.05/7.27  16074[24:MRR:16073.0,121.0] ||  -> .
% 7.05/7.27  16075[24:Spt:16074.0,16058.0,16060.0] || m_and_h_gate_v_out(c_e_h_1,c_c,s1)*+ -> .
% 7.05/7.27  16076[24:Spt:16074.0,16058.1] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s1)*.
% 7.05/7.27  16080[24:Res:16076.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s1)*.
% 7.05/7.27  16085[24:Res:16080.0,375.0] ||  -> node12(c_e_h_1,c_a,s0,s1)*.
% 7.05/7.27  16093[24:Res:16085.0,123.1] || m_mutex_h_half_v_out(c_e_h_1,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_1,c_a,s0).
% 7.05/7.27  16095[24:MRR:16093.0,16080.0] ||  -> m_mutex_h_half_v_inp(c_e_h_1,c_a,s0)*.
% 7.05/7.27  16096[24:Res:16095.0,18.0] ||  -> m_user_v_req(c_e_h_1,c_u,s0)*.
% 7.05/7.27  16097[24:MRR:16096.0,106.0] ||  -> .
% 7.05/7.27  16098[23:Spt:16097.0,16032.2,16033.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s2)*+ -> .
% 7.05/7.27  16099[23:Spt:16097.0,16032.0,16032.1] ||  -> node16(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.05/7.27  16142[17:Res:15215.1,130.1] || m_c_h_element_v_out(c_e_h_3,c_e,s3) -> node16(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.05/7.27  16144[17:MRR:16142.0,15207.0] ||  -> node16(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.05/7.27  16147[24:Spt:16144.2] ||  -> m_c_h_element_v_in1(c_e_h_3,c_e,s2)*.
% 7.05/7.27  16149[24:Res:16147.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s2)*.
% 7.05/7.27  16152[24:Res:16149.0,410.0] ||  -> node21(c_e_h_3,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_3,c_c,s1).
% 7.05/7.27  16166[24:Res:16152.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_c,s2) -> m_and_h_gate_v_out(c_e_h_3,c_c,s1) node20(c_e_h_3,c_c,s1)*.
% 7.05/7.27  16168[24:MRR:16166.0,16149.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1) node20(c_e_h_3,c_c,s1)*.
% 7.05/7.27  16171[24:Res:16168.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1)* m_and_h_gate_v_in1(c_e_h_3,c_c,s1).
% 7.05/7.27  16173[25:Spt:16171.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1)*.
% 7.05/7.27  16175[25:Res:16173.0,412.0] ||  -> node21(c_e_h_3,c_c,s0,s1)*.
% 7.05/7.27  16182[25:Res:16175.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_c,s1) -> node20(c_e_h_3,c_c,s0)*.
% 7.05/7.27  16184[25:MRR:16182.0,16173.0] ||  -> node20(c_e_h_3,c_c,s0)*.
% 7.05/7.27  16185[25:Res:16184.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_c,s0)*.
% 7.05/7.27  16187[25:Res:16185.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_3,c_a,s0)*.
% 7.05/7.27  16188[25:MRR:16187.0,121.0] ||  -> .
% 7.05/7.27  16189[25:Spt:16188.0,16171.0,16173.0] || m_and_h_gate_v_out(c_e_h_3,c_c,s1)*+ -> .
% 7.05/7.27  16190[25:Spt:16188.0,16171.1] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_c,s1)*.
% 7.05/7.27  16194[25:Res:16190.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_3,c_a,s1)*.
% 7.05/7.27  16199[25:Res:16194.0,375.0] ||  -> node12(c_e_h_3,c_a,s0,s1)*.
% 7.05/7.27  16208[25:Res:16199.0,123.1] || m_mutex_h_half_v_out(c_e_h_3,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_3,c_a,s0).
% 7.05/7.27  16210[25:MRR:16208.0,16194.0] ||  -> m_mutex_h_half_v_inp(c_e_h_3,c_a,s0)*.
% 7.05/7.27  16211[25:Res:16210.0,18.0] ||  -> m_user_v_req(c_e_h_3,c_u,s0)*.
% 7.05/7.27  16212[25:MRR:16211.0,106.0] ||  -> .
% 7.05/7.27  16213[24:Spt:16212.0,16144.2,16147.0] || m_c_h_element_v_in1(c_e_h_3,c_e,s2)* -> .
% 7.05/7.27  16214[24:Spt:16212.0,16144.0,16144.1] ||  -> node16(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)*.
% 7.05/7.27  16215[24:MRR:15573.1,16213.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s2)* -> .
% 7.05/7.27  16221[24:Res:16214.1,87.0] ||  -> node16(c_e_h_3,c_e,s2) m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.05/7.27  16222[24:MRR:16221.1,15597.0] ||  -> node16(c_e_h_3,c_e,s2)*.
% 7.05/7.27  16225[24:Res:16222.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.05/7.27  16226[24:MRR:16225.0,16225.1,16215.0,16213.0] ||  -> .
% 7.05/7.27  16227[20:Spt:16226.0,6302.2,15590.0] || m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2)*+ -> .
% 7.05/7.27  16228[20:Spt:16226.0,6302.0,6302.1] || m_and_h_gate_h_init_v_in1(c_e_h_3,c_m,s1)*+ -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1).
% 7.05/7.27  16230[20:Res:67.1,16228.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1) m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1)*.
% 7.05/7.27  16232[20:Res:16230.1,81.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1)* m_and_h_gate_v_in2(c_e_h_3,c_p,s1).
% 7.05/7.27  16235[20:Res:16230.1,392.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1) node10(c_e_h_3,c_n,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0).
% 7.05/7.27  16236[21:Spt:16232.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1)*.
% 7.05/7.27  16238[21:Res:16236.0,595.0] ||  -> node16(c_e_h_3,c_f,s0) node14(c_e_h_3,c_f,s0,s1)*.
% 7.05/7.27  16240[21:Res:16236.0,515.0] ||  -> node17(c_e_h_3,c_f,s0)*.
% 7.05/7.27  16243[21:Res:16240.0,135.0] || m_c_h_element_v_in2(c_e_h_3,c_f,s0)* -> m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.27  16244[21:Res:16240.0,136.0] || m_c_h_element_v_in1(c_e_h_3,c_f,s0) -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)*.
% 7.05/7.27  16260[21:Res:16238.1,130.1] || m_c_h_element_v_out(c_e_h_3,c_f,s1)* -> node16(c_e_h_3,c_f,s0) m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.27  16262[21:MRR:16260.0,16236.0] ||  -> node16(c_e_h_3,c_f,s0) m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.27  16263[22:Spt:16262.0] ||  -> node16(c_e_h_3,c_f,s0)*.
% 7.05/7.27  16264[22:Res:16263.0,134.0] || m_c_h_element_v_in2(c_e_h_3,c_f,s0)* m_c_h_element_v_in1(c_e_h_3,c_f,s0) -> .
% 7.05/7.27  16265[22:Res:16263.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)* m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.27  16266[22:MRR:16265.0,16243.0] ||  -> m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.27  16267[22:MRR:16244.0,16266.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)*.
% 7.05/7.27  16268[22:MRR:16264.0,16264.1,16267.0,16266.0] ||  -> .
% 7.05/7.27  16269[22:Spt:16268.0,16262.0,16263.0] || node16(c_e_h_3,c_f,s0)* -> .
% 7.05/7.27  16270[22:Spt:16268.0,16262.1] ||  -> m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.27  16273[22:Res:16270.0,40.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_d,s0)*.
% 7.05/7.27  16274[22:MRR:16273.0,142.0] ||  -> .
% 7.05/7.27  16275[21:Spt:16274.0,16232.0,16236.0] || m_c_h_element_v_out(c_e_h_3,c_f,s1)*+ -> .
% 7.05/7.27  16276[21:Spt:16274.0,16232.1] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_p,s1)*.
% 7.05/7.27  16277[21:MRR:16230.0,16275.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1)*.
% 7.05/7.27  16281[21:MRR:16235.0,16275.0] ||  -> node10(c_e_h_3,c_n,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0).
% 7.05/7.27  16310[21:Res:16281.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1) -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) node9(c_e_h_3,c_n,s0)*.
% 7.05/7.27  16312[21:MRR:16310.0,16277.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) node9(c_e_h_3,c_n,s0)*.
% 7.05/7.27  16314[21:Res:16312.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) m_and_h_gate_h_init_v_in2(c_e_h_3,c_n,s0)*.
% 7.05/7.27  16315[21:MRR:16314.1,273.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0)*.
% 7.05/7.27  16324[21:Res:16315.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_3,c_n,s0)*.
% 7.05/7.27  16327[21:Res:16324.0,78.1] || m_cell_v_token(c_e_h_3,s0)* -> .
% 7.05/7.27  16329[21:MRR:16327.0,16.0] ||  -> .
% 7.05/7.27  16330[19:Spt:16329.0,15217.0,15572.0] || node17(c_e_h_3,c_e,s2)*+ -> .
% 7.05/7.27  16331[19:Spt:16329.0,15217.1] ||  -> m_c_h_element_v_out(c_e_h_3,c_e,s2)*.
% 7.05/7.27  16332[19:MRR:15252.0,16330.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.05/7.27  16333[19:MRR:2031.1,16332.0] || m_and_h_gate_v_in2(c_e_h_3,c_r,s2)*+ -> .
% 7.05/7.27  16424[20:Spt:6302.2] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2)*.
% 7.05/7.27  16428[20:Res:16424.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_r,s2)*.
% 7.05/7.27  16431[20:MRR:16428.0,16333.0] ||  -> .
% 7.05/7.27  16432[20:Spt:16431.0,6302.2,16424.0] || m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2)*+ -> .
% 7.05/7.27  16433[20:Spt:16431.0,6302.0,6302.1] || m_and_h_gate_h_init_v_in1(c_e_h_3,c_m,s1)*+ -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1).
% 7.05/7.27  16435[20:Res:67.1,16433.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1) m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1)*.
% 7.05/7.27  16439[20:Res:16435.1,81.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1)* m_and_h_gate_v_in2(c_e_h_3,c_p,s1).
% 7.05/7.27  16442[20:Res:16435.1,392.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1) node10(c_e_h_3,c_n,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0).
% 7.05/7.27  16454[21:Spt:16439.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1)*.
% 7.05/7.27  16456[21:Res:16454.0,595.0] ||  -> node16(c_e_h_3,c_f,s0) node14(c_e_h_3,c_f,s0,s1)*.
% 7.05/7.27  16458[21:Res:16454.0,515.0] ||  -> node17(c_e_h_3,c_f,s0)*.
% 7.05/7.27  16464[21:Res:16458.0,135.0] || m_c_h_element_v_in2(c_e_h_3,c_f,s0)* -> m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.27  16465[21:Res:16458.0,136.0] || m_c_h_element_v_in1(c_e_h_3,c_f,s0) -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)*.
% 7.05/7.27  16506[21:Res:16456.1,130.1] || m_c_h_element_v_out(c_e_h_3,c_f,s1)* -> node16(c_e_h_3,c_f,s0) m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.27  16508[21:MRR:16506.0,16454.0] ||  -> node16(c_e_h_3,c_f,s0) m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.27  16512[22:Spt:16508.0] ||  -> node16(c_e_h_3,c_f,s0)*.
% 7.05/7.27  16513[22:Res:16512.0,134.0] || m_c_h_element_v_in2(c_e_h_3,c_f,s0)* m_c_h_element_v_in1(c_e_h_3,c_f,s0) -> .
% 7.05/7.27  16514[22:Res:16512.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)* m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.05/7.27  16515[22:MRR:16514.0,16464.0] ||  -> m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.27  16516[22:MRR:16465.0,16515.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)*.
% 7.05/7.27  16517[22:MRR:16513.0,16513.1,16516.0,16515.0] ||  -> .
% 7.05/7.27  16518[22:Spt:16517.0,16508.0,16512.0] || node16(c_e_h_3,c_f,s0)* -> .
% 7.05/7.27  16519[22:Spt:16517.0,16508.1] ||  -> m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.05/7.27  16522[22:Res:16519.0,40.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_d,s0)*.
% 7.05/7.27  16523[22:MRR:16522.0,142.0] ||  -> .
% 7.05/7.27  16524[21:Spt:16523.0,16439.0,16454.0] || m_c_h_element_v_out(c_e_h_3,c_f,s1)*+ -> .
% 7.05/7.27  16525[21:Spt:16523.0,16439.1] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_p,s1)*.
% 7.05/7.27  16526[21:MRR:16435.0,16524.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1)*.
% 7.05/7.27  16530[21:MRR:16442.0,16524.0] ||  -> node10(c_e_h_3,c_n,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0).
% 7.05/7.27  16555[21:Res:16530.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1) -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) node9(c_e_h_3,c_n,s0)*.
% 7.05/7.27  16557[21:MRR:16555.0,16526.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) node9(c_e_h_3,c_n,s0)*.
% 7.05/7.27  16559[21:Res:16557.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) m_and_h_gate_h_init_v_in2(c_e_h_3,c_n,s0)*.
% 7.05/7.27  16560[21:MRR:16559.1,273.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0)*.
% 7.05/7.27  16569[21:Res:16560.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_3,c_n,s0)*.
% 7.05/7.27  16572[21:Res:16569.0,78.1] || m_cell_v_token(c_e_h_3,s0)* -> .
% 7.05/7.27  16574[21:MRR:16572.0,16.0] ||  -> .
% 7.05/7.27  16575[17:Spt:16574.0,15185.0,15204.0] || m_and_h_gate_v_in1(c_e_h_3,c_r,s3)*+ -> .
% 7.05/7.27  16576[17:Spt:16574.0,15185.1] ||  -> node23(s4)*.
% 7.05/7.27  16577[17:MRR:6879.0,16576.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s3)*.
% 7.05/7.27  16586[17:Res:16577.0,409.0] ||  -> node21(c_e_h_2,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_2,c_r,s2).
% 7.05/7.27  16647[17:Res:16586.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_r,s3) -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.05/7.27  16649[17:MRR:16647.0,16577.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.05/7.27  16650[18:Spt:16649.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2)*.
% 7.05/7.27  16653[18:Res:16650.0,96.0] ||  -> m_user_v_ack(c_e_h_2,c_u,s2)*.
% 7.05/7.27  16657[18:Res:16653.0,34.0] || m_and_h_gate_v_in2(c_e_h_2,c_d,s2)*+ -> .
% 7.05/7.27  16659[18:Res:2305.0,16657.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1) m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.05/7.27  16663[19:Spt:16659.1] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.05/7.27  16664[19:Res:16663.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.05/7.27  16670[19:Res:16664.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.05/7.27  16675[19:Res:16670.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.27  16677[19:MRR:16675.0,13.0] ||  -> .
% 7.05/7.27  16678[19:Spt:16677.0,16659.1,16663.0] || m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*+ -> .
% 7.05/7.27  16679[19:Spt:16677.0,16659.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1)*.
% 7.05/7.27  16682[19:Res:16679.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.05/7.27  16689[19:Res:16682.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.05/7.27  16764[19:Res:16689.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.27  16766[19:MRR:16764.0,16682.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.27  16767[19:Res:16766.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.27  16768[19:Res:16766.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.27  16769[20:Spt:16767.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.05/7.27  16772[20:Res:16769.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.05/7.27  16776[20:MRR:16772.0,16678.0] ||  -> .
% 7.05/7.27  16777[20:Spt:16776.0,16767.0,16769.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*+ -> .
% 7.05/7.27  16778[20:Spt:16776.0,16767.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.27  16780[20:MRR:16768.0,16777.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.27  16787[20:Res:16780.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.27  16788[20:MRR:16787.0,13.0] ||  -> .
% 7.05/7.27  16789[18:Spt:16788.0,16649.0,16650.0] || m_and_h_gate_v_out(c_e_h_2,c_r,s2)*+ -> .
% 7.05/7.27  16790[18:Spt:16788.0,16649.1] ||  -> node20(c_e_h_2,c_r,s2)*.
% 7.05/7.27  16794[18:Res:16790.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s2)*.
% 7.05/7.27  16796[18:Res:16794.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.05/7.27  16817[18:Res:16796.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.05/7.27  16910[18:Res:16817.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.05/7.27  16912[18:MRR:16910.0,16796.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.05/7.27  16914[18:Res:16912.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.05/7.27  17014[19:Spt:16912.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.05/7.27  17019[19:Res:17014.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.05/7.27  17104[19:Res:17019.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.27  17106[19:MRR:17104.0,17014.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.27  17110[19:Res:17106.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.27  17111[19:Res:17106.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.27  17112[20:Spt:17110.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.05/7.27  17118[20:Res:17112.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.05/7.27  17124[20:Res:17118.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.27  17126[20:MRR:17124.0,13.0] ||  -> .
% 7.05/7.27  17127[20:Spt:17126.0,17110.0,17112.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)* -> .
% 7.05/7.27  17128[20:Spt:17126.0,17110.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.27  17130[20:MRR:17111.0,17127.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.27  17134[20:Res:17130.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.27  17135[20:MRR:17134.0,13.0] ||  -> .
% 7.05/7.27  17136[19:Spt:17135.0,16912.0,17014.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)* -> .
% 7.05/7.27  17137[19:Spt:17135.0,16912.1] ||  -> node9(c_e_h_2,c_m,s1)*.
% 7.05/7.27  17138[19:MRR:16914.0,17136.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.05/7.27  17145[19:Res:17138.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.27  17146[19:MRR:17145.0,13.0] ||  -> .
% 7.05/7.27  17147[12:Spt:17146.0,6877.2,6883.0] || xuntil28(s4)*+ -> .
% 7.05/7.27  17148[12:Spt:17146.0,6877.0,6877.1] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s3)* node24(s4).
% 7.05/7.27  17150[13:Spt:17148.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s3)*.
% 7.05/7.27  17152[13:Res:17150.0,409.0] ||  -> node21(c_e_h_2,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_2,c_r,s2).
% 7.05/7.27  17213[13:Res:17152.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_r,s3) -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.05/7.27  17215[13:MRR:17213.0,17150.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.05/7.27  17216[14:Spt:17215.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2)*.
% 7.05/7.27  17219[14:Res:17216.0,96.0] ||  -> m_user_v_ack(c_e_h_2,c_u,s2)*.
% 7.05/7.27  17220[14:Res:17219.0,34.0] || m_and_h_gate_v_in2(c_e_h_2,c_d,s2)*+ -> .
% 7.05/7.27  17222[14:Res:2305.0,17220.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1) m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.05/7.27  17226[15:Spt:17222.1] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.05/7.27  17227[15:Res:17226.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.05/7.27  17232[15:Res:17227.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.05/7.27  17234[15:Res:17232.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.27  17236[15:MRR:17234.0,13.0] ||  -> .
% 7.05/7.27  17237[15:Spt:17236.0,17222.1,17226.0] || m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*+ -> .
% 7.05/7.27  17238[15:Spt:17236.0,17222.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1)*.
% 7.05/7.27  17241[15:Res:17238.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.05/7.27  17248[15:Res:17241.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.05/7.27  17278[15:Res:17248.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.27  17280[15:MRR:17278.0,17241.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.27  17281[15:Res:17280.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.27  17282[15:Res:17280.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.27  17283[16:Spt:17281.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.05/7.27  17286[16:Res:17283.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.05/7.27  17289[16:MRR:17286.0,17237.0] ||  -> .
% 7.05/7.27  17290[16:Spt:17289.0,17281.0,17283.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*+ -> .
% 7.05/7.27  17291[16:Spt:17289.0,17281.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.27  17293[16:MRR:17282.0,17290.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.27  17300[16:Res:17293.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.27  17301[16:MRR:17300.0,13.0] ||  -> .
% 7.05/7.27  17302[14:Spt:17301.0,17215.0,17216.0] || m_and_h_gate_v_out(c_e_h_2,c_r,s2)*+ -> .
% 7.05/7.27  17303[14:Spt:17301.0,17215.1] ||  -> node20(c_e_h_2,c_r,s2)*.
% 7.05/7.27  17307[14:Res:17303.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s2)*.
% 7.05/7.27  17309[14:Res:17307.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.05/7.27  17330[14:Res:17309.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.05/7.27  17363[14:Res:17330.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.05/7.27  17365[14:MRR:17363.0,17309.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.05/7.27  17366[14:Res:17365.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.05/7.27  17367[14:Res:17365.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.05/7.27  17368[15:Spt:17366.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.05/7.27  17373[15:Res:17368.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.05/7.27  17380[15:Res:17373.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.27  17382[15:MRR:17380.0,17368.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.05/7.27  17400[15:Res:17382.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.27  17401[15:Res:17382.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.27  17402[16:Spt:17400.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.05/7.27  17407[16:Res:17402.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.05/7.27  17413[16:Res:17407.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.27  17415[16:MRR:17413.0,13.0] ||  -> .
% 7.05/7.27  17416[16:Spt:17415.0,17400.0,17402.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*+ -> .
% 7.05/7.27  17417[16:Spt:17415.0,17400.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.05/7.27  17419[16:MRR:17401.0,17416.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.05/7.27  17426[16:Res:17419.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.27  17427[16:MRR:17426.0,13.0] ||  -> .
% 7.05/7.27  17428[15:Spt:17427.0,17366.0,17368.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)* -> .
% 7.05/7.27  17429[15:Spt:17427.0,17366.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.05/7.27  17431[15:MRR:17367.0,17428.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.05/7.27  17437[15:Res:17431.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.05/7.27  17438[15:MRR:17437.0,13.0] ||  -> .
% 7.05/7.27  17439[13:Spt:17438.0,17148.0,17150.0] || m_and_h_gate_v_out(c_e_h_2,c_r,s3)*+ -> .
% 7.05/7.27  17440[13:Spt:17438.0,17148.1] ||  -> node24(s4)*.
% 7.05/7.27  17441[13:MRR:523.0,17440.0] ||  -> node21(c_e_h_1,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_1,c_r,s3).
% 7.05/7.27  17442[13:MRR:2054.0,17440.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s3)*.
% 7.05/7.27  17455[13:Res:17442.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_e,s3)*.
% 7.05/7.27  17466[13:Res:17455.0,582.0] ||  -> node16(c_e_h_3,c_e,s2) node14(c_e_h_3,c_e,s2,s3)* m_c_h_element_v_out(c_e_h_3,c_e,s2).
% 7.05/7.27  17468[13:Res:17455.0,509.0] ||  -> node17(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)*.
% 7.05/7.27  17480[13:Res:17468.1,87.0] ||  -> node17(c_e_h_3,c_e,s2) m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.05/7.27  17482[13:Res:17441.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s4)+ -> m_and_h_gate_v_out(c_e_h_1,c_r,s3) node20(c_e_h_1,c_r,s3)*.
% 7.05/7.27  17489[14:Spt:17480.0] ||  -> node17(c_e_h_3,c_e,s2)*.
% 7.05/7.27  17490[14:Res:17489.0,135.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s2)*+ -> m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.05/7.27  17504[15:Spt:17482.1] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s3)*.
% 7.05/7.27  17506[15:Res:17504.0,409.0] ||  -> node21(c_e_h_1,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_1,c_r,s2).
% 7.05/7.27  17521[15:Res:17506.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s3) -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.05/7.27  17523[15:MRR:17521.0,17504.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.05/7.27  17524[16:Spt:17523.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2)*.
% 7.05/7.27  17527[16:Res:17524.0,96.0] ||  -> m_user_v_ack(c_e_h_1,c_u,s2)*.
% 7.05/7.27  17528[16:Res:17527.0,34.0] || m_and_h_gate_v_in2(c_e_h_1,c_d,s2)*+ -> .
% 7.05/7.27  17530[16:Res:2305.0,17528.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1) m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.05/7.27  17534[17:Spt:17530.1] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.05/7.27  17535[17:Res:17534.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  17540[17:Res:17535.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  17542[17:Res:17540.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  17544[17:MRR:17542.0,10.0] ||  -> .
% 7.05/7.27  17545[17:Spt:17544.0,17530.1,17534.0] || m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*+ -> .
% 7.05/7.27  17546[17:Spt:17544.0,17530.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1)*.
% 7.05/7.27  17549[17:Res:17546.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.05/7.27  17556[17:Res:17549.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.05/7.27  17587[17:Res:17556.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.27  17589[17:MRR:17587.0,17549.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.27  17590[17:Res:17589.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.27  17591[17:Res:17589.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.27  17592[18:Spt:17590.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  17595[18:Res:17592.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.05/7.27  17598[18:MRR:17595.0,17545.0] ||  -> .
% 7.05/7.27  17599[18:Spt:17598.0,17590.0,17592.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)* -> .
% 7.05/7.27  17600[18:Spt:17598.0,17590.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.27  17602[18:MRR:17591.0,17599.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.27  17606[18:Res:17602.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  17607[18:MRR:17606.0,10.0] ||  -> .
% 7.05/7.27  17608[16:Spt:17607.0,17523.0,17524.0] || m_and_h_gate_v_out(c_e_h_1,c_r,s2)*+ -> .
% 7.05/7.27  17609[16:Spt:17607.0,17523.1] ||  -> node20(c_e_h_1,c_r,s2)*.
% 7.05/7.27  17613[16:Res:17609.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s2)*.
% 7.05/7.27  17624[16:Res:17613.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.05/7.27  17640[16:Res:17624.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.05/7.27  17669[16:Res:17640.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.05/7.27  17671[16:MRR:17669.0,17624.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.05/7.27  17672[16:Res:17671.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.05/7.27  17673[16:Res:17671.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.05/7.27  17691[17:Spt:17672.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.05/7.27  17696[17:Res:17691.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.05/7.27  17708[17:Res:17696.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.27  17710[17:MRR:17708.0,17691.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.27  17711[17:Res:17710.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.27  17712[17:Res:17710.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.27  17719[18:Spt:17711.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  17724[18:Res:17719.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  17727[18:Res:17724.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  17729[18:MRR:17727.0,10.0] ||  -> .
% 7.05/7.27  17730[18:Spt:17729.0,17711.0,17719.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.05/7.27  17731[18:Spt:17729.0,17711.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.27  17733[18:MRR:17712.0,17730.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.27  17740[18:Res:17733.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  17741[18:MRR:17740.0,10.0] ||  -> .
% 7.05/7.27  17742[17:Spt:17741.0,17672.0,17691.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)* -> .
% 7.05/7.27  17743[17:Spt:17741.0,17672.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.05/7.27  17745[17:MRR:17673.0,17742.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.05/7.27  17751[17:Res:17745.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  17752[17:MRR:17751.0,10.0] ||  -> .
% 7.05/7.27  17753[15:Spt:17752.0,17482.1,17504.0] || m_and_h_gate_v_out(c_e_h_1,c_r,s3)*+ -> .
% 7.05/7.27  17754[15:Spt:17752.0,17482.0,17482.2] || m_and_h_gate_v_out(c_e_h_1,c_r,s4)+ -> node20(c_e_h_1,c_r,s3)*.
% 7.05/7.27  17759[15:Res:221.1,17754.0] node24(s4) ||  -> node20(c_e_h_1,c_r,s3)*.
% 7.05/7.27  17761[15:SSi:17759.0,5.0,2015.0,17440.0] ||  -> node20(c_e_h_1,c_r,s3)*.
% 7.05/7.27  17768[15:Res:17761.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s3)*.
% 7.05/7.27  17776[15:Res:17768.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s3)*.
% 7.05/7.27  17792[15:Res:17776.0,390.0] ||  -> node10(c_e_h_1,c_m,s2,s3)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2).
% 7.05/7.27  17819[15:Res:17792.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s3) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) node9(c_e_h_1,c_m,s2)*.
% 7.05/7.27  17821[15:MRR:17819.0,17776.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) node9(c_e_h_1,c_m,s2)*.
% 7.05/7.27  17822[15:Res:17821.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s2)*.
% 7.05/7.27  17824[16:Spt:17822.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.05/7.27  17829[16:Res:17824.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.05/7.27  17835[16:Res:17829.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.05/7.27  17837[16:MRR:17835.0,17824.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.05/7.27  17838[16:Res:17837.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.05/7.27  17839[16:Res:17837.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.05/7.27  17840[17:Spt:17838.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.05/7.27  17845[17:Res:17840.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.05/7.27  17851[17:Res:17845.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.27  17853[17:MRR:17851.0,17840.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.05/7.27  17854[17:Res:17853.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.27  17855[17:Res:17853.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.27  17856[18:Spt:17854.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  17861[18:Res:17856.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.05/7.27  17864[18:Res:17861.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  17866[18:MRR:17864.0,10.0] ||  -> .
% 7.05/7.27  17867[18:Spt:17866.0,17854.0,17856.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)* -> .
% 7.05/7.27  17868[18:Spt:17866.0,17854.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.05/7.27  17870[18:MRR:17855.0,17867.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.05/7.27  17874[18:Res:17870.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  17875[18:MRR:17874.0,10.0] ||  -> .
% 7.05/7.27  17876[17:Spt:17875.0,17838.0,17840.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*+ -> .
% 7.05/7.27  17877[17:Spt:17875.0,17838.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.05/7.27  17879[17:MRR:17839.0,17876.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.05/7.27  17885[17:Res:17879.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.05/7.27  17886[17:MRR:17885.0,10.0] ||  -> .
% 7.05/7.27  17887[16:Spt:17886.0,17822.0,17824.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*+ -> .
% 7.05/7.27  17888[16:Spt:17886.0,17822.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s2)*.
% 7.05/7.27  17896[13:Res:17466.1,130.1] || m_c_h_element_v_out(c_e_h_3,c_e,s3) -> node16(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.05/7.27  17898[13:MRR:17896.0,17455.0] ||  -> node16(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.05/7.27  17899[17:Spt:6302.2] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2)*.
% 7.05/7.27  17903[17:Res:17899.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_r,s2)*.
% 7.05/7.27  17906[17:MRR:2031.0,17903.0] || m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*+ -> .
% 7.05/7.27  17916[18:Spt:17898.2] ||  -> m_c_h_element_v_in1(c_e_h_3,c_e,s2)*.
% 7.05/7.27  17918[18:Res:17916.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s2)*.
% 7.05/7.27  17924[18:Res:17918.0,410.0] ||  -> node21(c_e_h_3,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_3,c_c,s1).
% 7.05/7.27  17939[18:Res:17924.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_c,s2) -> m_and_h_gate_v_out(c_e_h_3,c_c,s1) node20(c_e_h_3,c_c,s1)*.
% 7.05/7.27  17941[18:MRR:17939.0,17918.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1) node20(c_e_h_3,c_c,s1)*.
% 7.05/7.27  17942[18:Res:17941.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1)* m_and_h_gate_v_in1(c_e_h_3,c_c,s1).
% 7.05/7.27  17944[19:Spt:17942.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1)*.
% 7.05/7.27  17946[19:Res:17944.0,412.0] ||  -> node21(c_e_h_3,c_c,s0,s1)*.
% 7.10/7.27  17957[19:Res:17946.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_c,s1) -> node20(c_e_h_3,c_c,s0)*.
% 7.10/7.27  17959[19:MRR:17957.0,17944.0] ||  -> node20(c_e_h_3,c_c,s0)*.
% 7.10/7.27  17960[19:Res:17959.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_c,s0)*.
% 7.10/7.27  17968[19:Res:17960.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_3,c_a,s0)*.
% 7.10/7.27  17969[19:MRR:17968.0,121.0] ||  -> .
% 7.10/7.27  17970[19:Spt:17969.0,17942.0,17944.0] || m_and_h_gate_v_out(c_e_h_3,c_c,s1)*+ -> .
% 7.10/7.27  17971[19:Spt:17969.0,17942.1] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_c,s1)*.
% 7.10/7.27  17975[19:Res:17971.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_3,c_a,s1)*.
% 7.10/7.27  17980[19:Res:17975.0,375.0] ||  -> node12(c_e_h_3,c_a,s0,s1)*.
% 7.10/7.27  17987[19:Res:17980.0,123.1] || m_mutex_h_half_v_out(c_e_h_3,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_3,c_a,s0).
% 7.10/7.27  17989[19:MRR:17987.0,17975.0] ||  -> m_mutex_h_half_v_inp(c_e_h_3,c_a,s0)*.
% 7.10/7.27  17992[19:Res:17989.0,18.0] ||  -> m_user_v_req(c_e_h_3,c_u,s0)*.
% 7.10/7.27  17993[19:MRR:17992.0,106.0] ||  -> .
% 7.10/7.27  17994[18:Spt:17993.0,17898.2,17916.0] || m_c_h_element_v_in1(c_e_h_3,c_e,s2)* -> .
% 7.10/7.27  17995[18:Spt:17993.0,17898.0,17898.1] ||  -> node16(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)*.
% 7.10/7.27  17996[18:MRR:17490.1,17994.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s2)* -> .
% 7.10/7.27  18002[18:Res:17995.1,87.0] ||  -> node16(c_e_h_3,c_e,s2) m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.10/7.27  18003[18:MRR:18002.1,17906.0] ||  -> node16(c_e_h_3,c_e,s2)*.
% 7.10/7.27  18006[18:Res:18003.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.10/7.27  18007[18:MRR:18006.0,18006.1,17996.0,17994.0] ||  -> .
% 7.10/7.27  18008[17:Spt:18007.0,6302.2,17899.0] || m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2)*+ -> .
% 7.10/7.27  18009[17:Spt:18007.0,6302.0,6302.1] || m_and_h_gate_h_init_v_in1(c_e_h_3,c_m,s1)*+ -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1).
% 7.10/7.27  18011[17:Res:67.1,18009.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1) m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1)*.
% 7.10/7.27  18013[17:Res:18011.1,81.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1)* m_and_h_gate_v_in2(c_e_h_3,c_p,s1).
% 7.10/7.27  18016[17:Res:18011.1,392.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1) node10(c_e_h_3,c_n,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0).
% 7.10/7.27  18017[18:Spt:18013.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1)*.
% 7.10/7.27  18019[18:Res:18017.0,595.0] ||  -> node16(c_e_h_3,c_f,s0) node14(c_e_h_3,c_f,s0,s1)*.
% 7.10/7.27  18021[18:Res:18017.0,515.0] ||  -> node17(c_e_h_3,c_f,s0)*.
% 7.10/7.27  18024[18:Res:18021.0,135.0] || m_c_h_element_v_in2(c_e_h_3,c_f,s0)* -> m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.10/7.27  18025[18:Res:18021.0,136.0] || m_c_h_element_v_in1(c_e_h_3,c_f,s0) -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)*.
% 7.10/7.27  18044[18:Res:18019.1,130.1] || m_c_h_element_v_out(c_e_h_3,c_f,s1)* -> node16(c_e_h_3,c_f,s0) m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.10/7.27  18046[18:MRR:18044.0,18017.0] ||  -> node16(c_e_h_3,c_f,s0) m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.10/7.27  18047[19:Spt:18046.0] ||  -> node16(c_e_h_3,c_f,s0)*.
% 7.10/7.27  18048[19:Res:18047.0,134.0] || m_c_h_element_v_in2(c_e_h_3,c_f,s0)* m_c_h_element_v_in1(c_e_h_3,c_f,s0) -> .
% 7.10/7.27  18049[19:Res:18047.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)* m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.10/7.27  18050[19:MRR:18049.0,18024.0] ||  -> m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.10/7.27  18051[19:MRR:18025.0,18050.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)*.
% 7.10/7.27  18052[19:MRR:18048.0,18048.1,18051.0,18050.0] ||  -> .
% 7.10/7.27  18053[19:Spt:18052.0,18046.0,18047.0] || node16(c_e_h_3,c_f,s0)* -> .
% 7.10/7.27  18054[19:Spt:18052.0,18046.1] ||  -> m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.10/7.27  18057[19:Res:18054.0,40.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_d,s0)*.
% 7.10/7.27  18058[19:MRR:18057.0,142.0] ||  -> .
% 7.10/7.27  18059[18:Spt:18058.0,18013.0,18017.0] || m_c_h_element_v_out(c_e_h_3,c_f,s1)*+ -> .
% 7.10/7.27  18060[18:Spt:18058.0,18013.1] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_p,s1)*.
% 7.10/7.27  18061[18:MRR:18011.0,18059.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1)*.
% 7.10/7.27  18065[18:MRR:18016.0,18059.0] ||  -> node10(c_e_h_3,c_n,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0).
% 7.10/7.27  18077[18:Res:18065.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1) -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) node9(c_e_h_3,c_n,s0)*.
% 7.10/7.27  18079[18:MRR:18077.0,18061.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) node9(c_e_h_3,c_n,s0)*.
% 7.10/7.27  18081[18:Res:18079.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) m_and_h_gate_h_init_v_in2(c_e_h_3,c_n,s0)*.
% 7.10/7.27  18082[18:MRR:18081.1,273.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0)*.
% 7.10/7.27  18092[18:Res:18082.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_3,c_n,s0)*.
% 7.10/7.27  18095[18:Res:18092.0,78.1] || m_cell_v_token(c_e_h_3,s0)* -> .
% 7.10/7.27  18097[18:MRR:18095.0,16.0] ||  -> .
% 7.10/7.27  18098[14:Spt:18097.0,17480.0,17489.0] || node17(c_e_h_3,c_e,s2)*+ -> .
% 7.10/7.27  18099[14:Spt:18097.0,17480.1] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.10/7.27  18100[14:MRR:2031.1,18099.0] || m_and_h_gate_v_in2(c_e_h_3,c_r,s2)*+ -> .
% 7.10/7.27  18200[15:Spt:6302.2] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2)*.
% 7.10/7.27  18204[15:Res:18200.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_r,s2)*.
% 7.10/7.27  18207[15:MRR:18204.0,18100.0] ||  -> .
% 7.10/7.27  18208[15:Spt:18207.0,6302.2,18200.0] || m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s2)*+ -> .
% 7.10/7.27  18209[15:Spt:18207.0,6302.0,6302.1] || m_and_h_gate_h_init_v_in1(c_e_h_3,c_m,s1)*+ -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1).
% 7.10/7.27  18211[15:Res:67.1,18209.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1) m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1)*.
% 7.10/7.27  18218[15:Res:18211.1,81.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1)* m_and_h_gate_v_in2(c_e_h_3,c_p,s1).
% 7.10/7.27  18221[15:Res:18211.1,392.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1) node10(c_e_h_3,c_n,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0).
% 7.10/7.27  18222[16:Spt:18218.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s1)*.
% 7.10/7.27  18224[16:Res:18222.0,595.0] ||  -> node16(c_e_h_3,c_f,s0) node14(c_e_h_3,c_f,s0,s1)*.
% 7.10/7.27  18226[16:Res:18222.0,515.0] ||  -> node17(c_e_h_3,c_f,s0)*.
% 7.10/7.27  18229[16:Res:18226.0,135.0] || m_c_h_element_v_in2(c_e_h_3,c_f,s0)* -> m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.10/7.27  18230[16:Res:18226.0,136.0] || m_c_h_element_v_in1(c_e_h_3,c_f,s0) -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)*.
% 7.10/7.27  18274[16:Res:18224.1,130.1] || m_c_h_element_v_out(c_e_h_3,c_f,s1)* -> node16(c_e_h_3,c_f,s0) m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.10/7.27  18276[16:MRR:18274.0,18222.0] ||  -> node16(c_e_h_3,c_f,s0) m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.10/7.27  18277[17:Spt:18276.0] ||  -> node16(c_e_h_3,c_f,s0)*.
% 7.10/7.27  18278[17:Res:18277.0,134.0] || m_c_h_element_v_in2(c_e_h_3,c_f,s0)* m_c_h_element_v_in1(c_e_h_3,c_f,s0) -> .
% 7.10/7.27  18279[17:Res:18277.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)* m_c_h_element_v_in1(c_e_h_3,c_f,s0).
% 7.10/7.27  18280[17:MRR:18279.0,18229.0] ||  -> m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.10/7.27  18281[17:MRR:18230.0,18280.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_f,s0)*.
% 7.10/7.27  18282[17:MRR:18278.0,18278.1,18281.0,18280.0] ||  -> .
% 7.10/7.27  18283[17:Spt:18282.0,18276.0,18277.0] || node16(c_e_h_3,c_f,s0)* -> .
% 7.10/7.27  18284[17:Spt:18282.0,18276.1] ||  -> m_c_h_element_v_in1(c_e_h_3,c_f,s0)*.
% 7.10/7.27  18287[17:Res:18284.0,40.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_d,s0)*.
% 7.10/7.27  18288[17:MRR:18287.0,142.0] ||  -> .
% 7.10/7.27  18289[16:Spt:18288.0,18218.0,18222.0] || m_c_h_element_v_out(c_e_h_3,c_f,s1)*+ -> .
% 7.10/7.27  18290[16:Spt:18288.0,18218.1] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_p,s1)*.
% 7.10/7.27  18291[16:MRR:18211.0,18289.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1)*.
% 7.10/7.27  18295[16:MRR:18221.0,18289.0] ||  -> node10(c_e_h_3,c_n,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0).
% 7.10/7.27  18318[16:Res:18295.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s1) -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) node9(c_e_h_3,c_n,s0)*.
% 7.10/7.27  18320[16:MRR:18318.0,18291.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) node9(c_e_h_3,c_n,s0)*.
% 7.10/7.27  18326[16:Res:18320.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0) m_and_h_gate_h_init_v_in2(c_e_h_3,c_n,s0)*.
% 7.10/7.27  18327[16:MRR:18326.1,273.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0)*.
% 7.10/7.27  18332[16:Res:18327.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_3,c_n,s0)*.
% 7.10/7.27  18338[16:Res:18332.0,78.1] || m_cell_v_token(c_e_h_3,s0)* -> .
% 7.10/7.27  18340[16:MRR:18338.0,16.0] ||  -> .
% 7.10/7.27  18341[10:Spt:18340.0,2068.0,2069.0] || m_and_h_gate_v_in2(c_e_h_3,c_r,s3)*+ -> .
% 7.10/7.27  18342[10:Spt:18340.0,2068.1,2068.2] ||  -> node23(s4)* xuntil28(s4).
% 7.10/7.27  18344[10:MRR:2050.1,18341.0] node24(s4) ||  -> .
% 7.10/7.27  18347[10:MRR:2067.1,18341.0] until2p29(s4) ||  -> node23(s4)*.
% 7.10/7.27  18348[10:MRR:2016.2,18344.0] ||  -> node21(c_e_h_2,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_2,c_r,s3) xuntil28(s4).
% 7.10/7.27  18350[10:MRR:1971.3,18344.0] until2p29(s4) ||  -> node21(c_e_h_2,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_2,c_r,s3).
% 7.10/7.27  18351[11:Spt:18342.1] ||  -> xuntil28(s4)*.
% 7.10/7.27  18352[11:MRR:168.0,18351.0] ||  -> loop*.
% 7.10/7.27  18353[11:MRR:178.0,18351.0] || trans(s4,u)*+ -> until2p29(u).
% 7.10/7.27  18354[11:MRR:7.0,18352.0] ||  -> trans(s4,s4) trans(s4,s3) trans(s4,s2) trans(s4,s1) trans(s4,s0)*.
% 7.10/7.27  18366[11:Res:18354.4,141.0] ||  -> trans(s4,s4) trans(s4,s3) trans(s4,s2) trans(s4,s1) node19(u,v,s4,s0)*.
% 7.10/7.27  18367[11:Res:18354.4,18353.0] ||  -> trans(s4,s4) trans(s4,s3) trans(s4,s2) trans(s4,s1)* until2p29(s0).
% 7.10/7.27  18374[12:Spt:18366.3] ||  -> trans(s4,s1)*.
% 7.10/7.27  18377[12:Res:18374.0,120.0] ||  -> node11(u,v,s4,s1)* node10(u,v,s4,s1).
% 7.10/7.27  18379[12:Res:18374.0,149.0] ||  -> node22(u,v,s4,s1)* node21(u,v,s4,s1).
% 7.10/7.27  18381[12:Res:18374.0,141.0] ||  -> node19(u,v,s4,s1)*.
% 7.10/7.27  18382[12:Res:18374.0,18353.0] ||  -> until2p29(s1)*.
% 7.10/7.27  18383[12:MRR:498.0,18382.0] ||  -> xuntil2p30(s1)*.
% 7.10/7.27  18384[12:MRR:172.0,18383.0] ||  -> until2p29(s2)*.
% 7.10/7.27  18385[12:MRR:924.0,18384.0] ||  -> xuntil2p30(s2)*.
% 7.10/7.27  18386[12:MRR:171.0,18385.0] ||  -> until2p29(s3)*.
% 7.10/7.27  18387[12:MRR:2026.0,18386.0] ||  -> xuntil2p30(s3)*.
% 7.10/7.27  18388[12:MRR:170.0,18387.0] ||  -> until2p29(s4)*.
% 7.10/7.27  18389[12:MRR:181.0,18388.0] ||  -> node26(s4)*.
% 7.10/7.27  18390[12:MRR:18347.0,18388.0] ||  -> node23(s4)*.
% 7.10/7.27  18394[12:MRR:524.0,18390.0] ||  -> node21(c_e_h_1,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_1,c_r,s3).
% 7.10/7.27  18397[12:Res:18381.0,140.0] ||  -> node17(u,v,s4) node18(u,v,s4,s1)*.
% 7.10/7.27  18401[13:Spt:18394.1] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s3)*.
% 7.10/7.27  18403[13:Res:18401.0,409.0] ||  -> node21(c_e_h_1,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_1,c_r,s2).
% 7.10/7.27  18445[12:Res:18377.0,119.1] || m_and_h_gate_h_init_v_out(u,v,s1)+ -> node10(u,v,s4,s1)* m_and_h_gate_h_init_v_out(u,v,s4).
% 7.10/7.27  18471[12:Res:18379.0,147.1] || m_and_h_gate_v_out(u,v,s4)+ -> node21(u,v,s4,s1)* m_and_h_gate_v_out(u,v,s1).
% 7.10/7.27  18475[13:Res:18403.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s3) -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.10/7.27  18477[13:MRR:18475.0,18401.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.10/7.27  18478[14:Spt:18477.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2)*.
% 7.10/7.27  18481[14:Res:18478.0,96.0] ||  -> m_user_v_ack(c_e_h_1,c_u,s2)*.
% 7.10/7.27  18482[14:Res:18481.0,34.0] || m_and_h_gate_v_in2(c_e_h_1,c_d,s2)*+ -> .
% 7.10/7.27  18484[12:Res:18397.1,138.1] || m_c_h_element_v_out(u,v,s1)*+ -> node17(u,v,s4) m_c_h_element_v_out(u,v,s4).
% 7.10/7.27  18486[14:Res:2305.0,18482.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1) m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.27  18490[15:Spt:18486.1] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.27  18491[15:Res:18490.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.27  18496[15:Res:18491.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.27  18498[15:Res:18496.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.27  18500[15:MRR:18498.0,10.0] ||  -> .
% 7.10/7.27  18501[15:Spt:18500.0,18486.1,18490.0] || m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*+ -> .
% 7.10/7.27  18502[15:Spt:18500.0,18486.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1)*.
% 7.10/7.27  18505[15:Res:18502.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.27  18512[15:Res:18505.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.27  18578[15:Res:18512.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.27  18580[15:MRR:18578.0,18505.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.27  18581[15:Res:18580.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.27  18582[15:Res:18580.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.27  18583[16:Spt:18581.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.27  18586[16:Res:18583.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.27  18589[16:MRR:18586.0,18501.0] ||  -> .
% 7.10/7.27  18590[16:Spt:18589.0,18581.0,18583.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.10/7.27  18591[16:Spt:18589.0,18581.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.27  18593[16:MRR:18582.0,18590.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.27  18600[16:Res:18593.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.27  18601[16:MRR:18600.0,10.0] ||  -> .
% 7.10/7.27  18602[14:Spt:18601.0,18477.0,18478.0] || m_and_h_gate_v_out(c_e_h_1,c_r,s2)*+ -> .
% 7.10/7.27  18603[14:Spt:18601.0,18477.1] ||  -> node20(c_e_h_1,c_r,s2)*.
% 7.10/7.27  18607[14:Res:18603.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s2)*.
% 7.10/7.27  18609[14:Res:18607.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.10/7.27  18630[14:Res:18609.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.10/7.27  18673[14:Res:18630.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.27  18675[14:MRR:18673.0,18609.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.27  18676[14:Res:18675.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.27  18677[14:Res:18675.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.27  18678[15:Spt:18676.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.27  18683[15:Res:18678.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.27  18686[12:Res:1913.0,18445.0] ||  -> m_cell_v_token(u,s0) node10(u,c_n,s4,s1)* m_and_h_gate_h_init_v_out(u,c_n,s4).
% 7.10/7.27  18710[15:Res:18683.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.27  18712[15:MRR:18710.0,18678.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.27  18713[15:Res:18712.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.27  18714[15:Res:18712.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.27  18715[16:Spt:18713.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.27  18720[16:Res:18715.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.27  18737[16:Res:18720.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.27  18739[16:MRR:18737.0,10.0] ||  -> .
% 7.10/7.27  18740[16:Spt:18739.0,18713.0,18715.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.10/7.27  18741[16:Spt:18739.0,18713.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.27  18743[16:MRR:18714.0,18740.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.27  18750[16:Res:18743.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.27  18751[16:MRR:18750.0,10.0] ||  -> .
% 7.10/7.27  18752[15:Spt:18751.0,18676.0,18678.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)* -> .
% 7.10/7.27  18753[15:Spt:18751.0,18676.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.27  18755[15:MRR:18677.0,18752.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.27  18761[15:Res:18755.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.27  18762[15:MRR:18761.0,10.0] ||  -> .
% 7.10/7.27  18763[13:Spt:18762.0,18394.1,18401.0] || m_and_h_gate_v_out(c_e_h_1,c_r,s3)*+ -> .
% 7.10/7.27  18764[13:Spt:18762.0,18394.0] ||  -> node21(c_e_h_1,c_r,s3,s4)*.
% 7.10/7.27  18766[13:Res:18764.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s4)+ -> node20(c_e_h_1,c_r,s3)*.
% 7.10/7.27  18767[13:Res:18764.0,145.2] || m_and_h_gate_v_in2(c_e_h_1,c_r,s3) m_and_h_gate_v_in1(c_e_h_1,c_r,s3) -> m_and_h_gate_v_out(c_e_h_1,c_r,s4)*.
% 7.10/7.27  19054[13:Res:220.1,18766.0] node23(s4) ||  -> node20(c_e_h_1,c_r,s3)*.
% 7.10/7.27  19055[13:SSi:19054.0,5.0,2015.0,18351.0,18388.0,18389.0,18390.0] ||  -> node20(c_e_h_1,c_r,s3)*.
% 7.10/7.27  19056[13:Res:19055.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s3)*.
% 7.10/7.27  19057[13:Res:19055.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s3)*.
% 7.10/7.27  19058[13:MRR:18767.1,19056.0] || m_and_h_gate_v_in2(c_e_h_1,c_r,s3) -> m_and_h_gate_v_out(c_e_h_1,c_r,s4)*.
% 7.10/7.27  19059[13:MRR:19058.0,19057.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s4)*.
% 7.10/7.27  19060[13:Res:19056.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s3)*.
% 7.10/7.27  19061[13:Res:19057.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s3)*.
% 7.10/7.27  19063[13:Res:19059.0,18471.0] ||  -> node21(c_e_h_1,c_r,s4,s1)* m_and_h_gate_v_out(c_e_h_1,c_r,s1).
% 7.10/7.27  19071[13:Res:19060.0,582.0] ||  -> node16(c_e_h_1,c_e,s2) node14(c_e_h_1,c_e,s2,s3)* m_c_h_element_v_out(c_e_h_1,c_e,s2).
% 7.10/7.27  19072[13:Res:19060.0,579.0] ||  -> node16(c_e_h_1,c_e,s3) node14(c_e_h_1,c_e,s3,s4)* m_c_h_element_v_out(c_e_h_1,c_e,s4).
% 7.10/7.27  19073[13:Res:19060.0,509.0] ||  -> node17(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.27  19074[13:Res:19060.0,508.0] ||  -> node17(c_e_h_1,c_e,s3) m_c_h_element_v_out(c_e_h_1,c_e,s4)*.
% 7.10/7.27  19075[13:Res:19060.0,74.0] || m_and_h_gate_h_init_v_in1(c_e_h_1,c_n,s3)*+ -> .
% 7.10/7.27  19081[13:Res:19061.0,390.0] ||  -> node10(c_e_h_1,c_m,s2,s3)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2).
% 7.10/7.27  19121[13:Res:19073.1,586.0] ||  -> node17(c_e_h_1,c_e,s2) node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.27  19123[13:Res:19073.1,511.0] ||  -> node17(c_e_h_1,c_e,s2) node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.27  19133[13:Res:19074.1,87.0] ||  -> node17(c_e_h_1,c_e,s3) m_and_h_gate_v_in1(c_e_h_1,c_r,s4)*.
% 7.10/7.27  19193[13:Res:19081.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s3) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) node9(c_e_h_1,c_m,s2)*.
% 7.10/7.27  19195[13:MRR:19193.0,19061.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) node9(c_e_h_1,c_m,s2)*.
% 7.10/7.27  19197[13:Res:19195.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s2)*.
% 7.10/7.27  19318[12:Res:18686.1,117.1] || m_and_h_gate_h_init_v_out(u,c_n,s1) -> m_cell_v_token(u,s0) m_and_h_gate_h_init_v_out(u,c_n,s4) node9(u,c_n,s4)*.
% 7.10/7.27  19320[12:MRR:19318.0,1913.0] ||  -> m_cell_v_token(u,s0) m_and_h_gate_h_init_v_out(u,c_n,s4) node9(u,c_n,s4)*.
% 7.10/7.27  19321[12:Res:19320.2,114.0] ||  -> m_cell_v_token(u,s0) m_and_h_gate_h_init_v_out(u,c_n,s4) m_and_h_gate_h_init_v_in1(u,c_n,s4)*.
% 7.10/7.27  19619[13:Res:19071.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s3) -> node16(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.27  19621[13:MRR:19619.0,19060.0] ||  -> node16(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.27  19781[13:Res:19072.1,129.1] || m_c_h_element_v_in1(c_e_h_1,c_e,s3) -> node16(c_e_h_1,c_e,s3) m_c_h_element_v_out(c_e_h_1,c_e,s4)* m_c_h_element_v_out(c_e_h_1,c_e,s4)*.
% 7.10/7.27  19782[13:Obv:19781.2] || m_c_h_element_v_in1(c_e_h_1,c_e,s3)+ -> node16(c_e_h_1,c_e,s3) m_c_h_element_v_out(c_e_h_1,c_e,s4)*.
% 7.10/7.27  20009[14:Spt:19195.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.10/7.27  20014[14:Res:20009.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.10/7.27  20020[15:Spt:19074.1] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s4)*.
% 7.10/7.27  20025[15:Res:20020.0,74.0] || m_and_h_gate_h_init_v_in1(c_e_h_1,c_n,s4)*+ -> .
% 7.10/7.27  20026[15:Res:20020.0,87.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s4)*.
% 7.10/7.27  20029[15:Res:19321.2,20025.0] ||  -> m_cell_v_token(c_e_h_1,s0) m_and_h_gate_h_init_v_out(c_e_h_1,c_n,s4)*.
% 7.10/7.27  20030[15:MRR:20029.0,10.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_n,s4)*.
% 7.10/7.27  20031[15:Res:20030.0,70.0] || m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s4)*+ -> .
% 7.10/7.27  20090[13:Res:19063.0,145.2] || m_and_h_gate_v_in2(c_e_h_1,c_r,s4) m_and_h_gate_v_in1(c_e_h_1,c_r,s4) -> m_and_h_gate_v_out(c_e_h_1,c_r,s1)* m_and_h_gate_v_out(c_e_h_1,c_r,s1)*.
% 7.10/7.27  20091[13:Obv:20090.2] || m_and_h_gate_v_in2(c_e_h_1,c_r,s4)+ m_and_h_gate_v_in1(c_e_h_1,c_r,s4) -> m_and_h_gate_v_out(c_e_h_1,c_r,s1)*.
% 7.10/7.27  20092[15:MRR:20091.1,20026.0] || m_and_h_gate_v_in2(c_e_h_1,c_r,s4)+ -> m_and_h_gate_v_out(c_e_h_1,c_r,s1)*.
% 7.10/7.27  20093[14:Res:20014.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.27  20095[14:MRR:20093.0,20009.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.27  20096[14:Res:20095.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.27  20097[14:Res:20095.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.27  20098[16:Spt:20096.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.27  20102[16:Res:20098.0,18445.0] ||  -> node10(c_e_h_1,c_m,s4,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s4).
% 7.10/7.27  20176[16:Res:20102.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s4) node9(c_e_h_1,c_m,s4)*.
% 7.10/7.27  20178[16:MRR:20176.0,20098.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s4) node9(c_e_h_1,c_m,s4)*.
% 7.10/7.27  20179[17:Spt:20178.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s4)*.
% 7.10/7.27  20182[17:Res:20179.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s4)*.
% 7.10/7.27  20185[17:MRR:20092.0,20182.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s1)*.
% 7.10/7.27  20188[17:Res:20185.0,412.0] ||  -> node21(c_e_h_1,c_r,s0,s1)*.
% 7.10/7.27  20199[17:Res:20188.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s1) -> node20(c_e_h_1,c_r,s0)*.
% 7.10/7.27  20201[17:MRR:20199.0,20185.0] ||  -> node20(c_e_h_1,c_r,s0)*.
% 7.10/7.27  20202[17:Res:20201.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s0)*.
% 7.10/7.27  20204[17:Res:20202.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s0)*.
% 7.10/7.27  20205[17:MRR:20204.0,128.0] ||  -> .
% 7.10/7.27  20206[17:Spt:20205.0,20178.0,20179.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s4)* -> .
% 7.10/7.27  20207[17:Spt:20205.0,20178.1] ||  -> node9(c_e_h_1,c_m,s4)*.
% 7.10/7.27  20211[17:Res:20207.0,115.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s4)*.
% 7.10/7.27  20212[17:MRR:20211.0,20031.0] ||  -> .
% 7.10/7.27  20213[16:Spt:20212.0,20096.0,20098.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*+ -> .
% 7.10/7.27  20214[16:Spt:20212.0,20096.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.27  20216[16:MRR:20097.0,20213.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.27  20222[16:Res:20216.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.27  20223[16:MRR:20222.0,10.0] ||  -> .
% 7.10/7.27  20224[15:Spt:20223.0,19074.1,20020.0] || m_c_h_element_v_out(c_e_h_1,c_e,s4)*+ -> .
% 7.10/7.27  20225[15:Spt:20223.0,19074.0] ||  -> node17(c_e_h_1,c_e,s3)*.
% 7.10/7.27  20231[16:Spt:20095.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.27  20237[16:Res:20231.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.27  20295[16:Res:20237.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.27  20297[16:MRR:20295.0,20231.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.27  20298[16:Res:20297.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.27  20299[16:Res:20297.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.27  20302[17:Spt:20298.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.27  20307[17:Res:20302.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.27  20310[17:Res:20307.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.27  20312[17:MRR:20310.0,10.0] ||  -> .
% 7.10/7.27  20313[17:Spt:20312.0,20298.0,20302.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.10/7.27  20314[17:Spt:20312.0,20298.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.27  20316[17:MRR:20299.0,20313.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.27  20323[17:Res:20316.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.27  20324[17:MRR:20323.0,10.0] ||  -> .
% 7.10/7.27  20325[16:Spt:20324.0,20095.0,20231.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)* -> .
% 7.10/7.27  20326[16:Spt:20324.0,20095.1] ||  -> node9(c_e_h_1,c_m,s1)*.
% 7.10/7.27  20327[16:MRR:20097.0,20325.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.27  20334[16:Res:20327.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.27  20335[16:MRR:20334.0,10.0] ||  -> .
% 7.10/7.27  20336[14:Spt:20335.0,19195.0,20009.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*+ -> .
% 7.10/7.27  20337[14:Spt:20335.0,19195.1] ||  -> node9(c_e_h_1,c_m,s2)*.
% 7.10/7.27  20338[14:MRR:19197.0,20336.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s2)*.
% 7.10/7.27  20345[15:Spt:19073.0] ||  -> node17(c_e_h_1,c_e,s2)*.
% 7.10/7.27  20346[15:Res:20345.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s2)*+ -> m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.27  20354[16:Spt:19133.1] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s4)*.
% 7.10/7.27  20356[16:Res:20354.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s4)*.
% 7.10/7.27  20361[16:Res:20356.0,74.0] || m_and_h_gate_h_init_v_in1(c_e_h_1,c_n,s4)*+ -> .
% 7.10/7.27  20364[16:Res:19321.2,20361.0] ||  -> m_cell_v_token(c_e_h_1,s0) m_and_h_gate_h_init_v_out(c_e_h_1,c_n,s4)*.
% 7.10/7.27  20365[16:MRR:20364.0,10.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_n,s4)*.
% 7.10/7.27  20370[16:Res:20365.0,389.0] ||  -> node10(c_e_h_1,c_n,s3,s4)* m_and_h_gate_h_init_v_out(c_e_h_1,c_n,s3).
% 7.10/7.27  20392[16:Res:20370.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_n,s4) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_n,s3) node9(c_e_h_1,c_n,s3)*.
% 7.10/7.27  20394[16:MRR:20392.0,20365.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_n,s3) node9(c_e_h_1,c_n,s3)*.
% 7.10/7.27  20397[16:Res:20394.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_n,s3) m_and_h_gate_h_init_v_in1(c_e_h_1,c_n,s3)*.
% 7.10/7.27  20399[16:MRR:20397.1,19075.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_n,s3)*.
% 7.10/7.27  20404[16:Res:20399.0,390.0] ||  -> node10(c_e_h_1,c_n,s2,s3)* m_and_h_gate_h_init_v_out(c_e_h_1,c_n,s2).
% 7.10/7.27  20412[16:Res:20404.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_n,s3) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_n,s2) node9(c_e_h_1,c_n,s2)*.
% 7.10/7.27  20414[16:MRR:20412.0,20399.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_n,s2) node9(c_e_h_1,c_n,s2)*.
% 7.10/7.27  20418[16:Res:20414.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_n,s2) m_and_h_gate_h_init_v_in1(c_e_h_1,c_n,s2)*.
% 7.10/7.27  20420[17:Spt:20418.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_n,s2)*.
% 7.10/7.27  20421[17:Res:20420.0,70.0] || m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s2)* -> .
% 7.10/7.27  20426[17:MRR:20421.0,20338.0] ||  -> .
% 7.10/7.27  20427[17:Spt:20426.0,20418.0,20420.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_n,s2)*+ -> .
% 7.10/7.27  20428[17:Spt:20426.0,20418.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_n,s2)*.
% 7.10/7.27  20633[18:Spt:19621.2] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s2)*.
% 7.10/7.27  20635[18:Res:20633.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s2)*.
% 7.10/7.27  20651[18:Res:20635.0,410.0] ||  -> node21(c_e_h_1,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_1,c_c,s1).
% 7.10/7.27  20683[18:Res:20651.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s2) -> m_and_h_gate_v_out(c_e_h_1,c_c,s1) node20(c_e_h_1,c_c,s1)*.
% 7.10/7.27  20685[18:MRR:20683.0,20635.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1) node20(c_e_h_1,c_c,s1)*.
% 7.10/7.27  20686[18:Res:20685.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)* m_and_h_gate_v_in1(c_e_h_1,c_c,s1).
% 7.10/7.27  20698[19:Spt:20686.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)*.
% 7.10/7.27  20701[19:Res:20698.0,412.0] ||  -> node21(c_e_h_1,c_c,s0,s1)*.
% 7.10/7.27  20706[19:Res:20701.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s1) -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.27  20708[19:MRR:20706.0,20698.0] ||  -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.27  20716[19:Res:20708.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s0)*.
% 7.10/7.27  20718[19:Res:20716.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s0)*.
% 7.10/7.27  20719[19:MRR:20718.0,121.0] ||  -> .
% 7.10/7.27  20720[19:Spt:20719.0,20686.0,20698.0] || m_and_h_gate_v_out(c_e_h_1,c_c,s1)*+ -> .
% 7.10/7.27  20721[19:Spt:20719.0,20686.1] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s1)*.
% 7.10/7.27  20725[19:Res:20721.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s1)*.
% 7.10/7.27  20731[19:Res:20725.0,375.0] ||  -> node12(c_e_h_1,c_a,s0,s1)*.
% 7.10/7.27  20745[19:Res:20731.0,123.1] || m_mutex_h_half_v_out(c_e_h_1,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_1,c_a,s0).
% 7.10/7.27  20747[19:MRR:20745.0,20725.0] ||  -> m_mutex_h_half_v_inp(c_e_h_1,c_a,s0)*.
% 7.10/7.27  20748[19:Res:20747.0,18.0] ||  -> m_user_v_req(c_e_h_1,c_u,s0)*.
% 7.10/7.27  20749[19:MRR:20748.0,106.0] ||  -> .
% 7.10/7.27  20750[18:Spt:20749.0,19621.2,20633.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s2)* -> .
% 7.10/7.27  20751[18:Spt:20749.0,19621.0,19621.1] ||  -> node16(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.27  20752[18:MRR:20346.1,20750.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s2)* -> .
% 7.10/7.27  20757[18:Res:20751.1,74.0] || m_and_h_gate_h_init_v_in1(c_e_h_1,c_n,s2)* -> node16(c_e_h_1,c_e,s2).
% 7.10/7.27  20759[18:MRR:20757.0,20428.0] ||  -> node16(c_e_h_1,c_e,s2)*.
% 7.10/7.27  20762[18:Res:20759.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.27  20763[18:MRR:20762.0,20762.1,20752.0,20750.0] ||  -> .
% 7.10/7.27  20764[16:Spt:20763.0,19133.1,20354.0] || m_and_h_gate_v_in1(c_e_h_1,c_r,s4)*+ -> .
% 7.10/7.27  20765[16:Spt:20763.0,19133.0] ||  -> node17(c_e_h_1,c_e,s3)*.
% 7.10/7.27  20766[16:Res:20765.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s3)*+ -> m_c_h_element_v_in1(c_e_h_1,c_e,s3).
% 7.10/7.27  20767[16:Res:20765.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s3)+ -> m_c_h_element_v_in2(c_e_h_1,c_e,s3)*.
% 7.10/7.27  20847[17:Spt:19621.2] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s2)*.
% 7.10/7.27  20849[17:Res:20847.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s2)*.
% 7.10/7.27  20855[17:Res:20849.0,410.0] ||  -> node21(c_e_h_1,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_1,c_c,s1).
% 7.10/7.27  20870[17:Res:20855.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s2) -> m_and_h_gate_v_out(c_e_h_1,c_c,s1) node20(c_e_h_1,c_c,s1)*.
% 7.10/7.27  20872[17:MRR:20870.0,20849.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1) node20(c_e_h_1,c_c,s1)*.
% 7.10/7.27  20873[17:Res:20872.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)* m_and_h_gate_v_in1(c_e_h_1,c_c,s1).
% 7.10/7.27  20899[18:Spt:20873.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)*.
% 7.10/7.27  20902[18:Res:20899.0,412.0] ||  -> node21(c_e_h_1,c_c,s0,s1)*.
% 7.10/7.27  20907[18:Res:20902.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s1) -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.27  20909[18:MRR:20907.0,20899.0] ||  -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.27  20929[18:Res:20909.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s0)*.
% 7.10/7.27  20931[18:Res:20929.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s0)*.
% 7.10/7.27  20932[18:MRR:20931.0,121.0] ||  -> .
% 7.10/7.27  20933[18:Spt:20932.0,20873.0,20899.0] || m_and_h_gate_v_out(c_e_h_1,c_c,s1)*+ -> .
% 7.10/7.27  20934[18:Spt:20932.0,20873.1] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s1)*.
% 7.10/7.27  20938[18:Res:20934.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s1)*.
% 7.10/7.27  20944[18:Res:20938.0,375.0] ||  -> node12(c_e_h_1,c_a,s0,s1)*.
% 7.10/7.27  20965[18:Res:20944.0,123.1] || m_mutex_h_half_v_out(c_e_h_1,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_1,c_a,s0).
% 7.10/7.27  20967[18:MRR:20965.0,20938.0] ||  -> m_mutex_h_half_v_inp(c_e_h_1,c_a,s0)*.
% 7.10/7.27  20968[18:Res:20967.0,18.0] ||  -> m_user_v_req(c_e_h_1,c_u,s0)*.
% 7.10/7.27  20969[18:MRR:20968.0,106.0] ||  -> .
% 7.10/7.27  20970[17:Spt:20969.0,19621.2,20847.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.27  20971[17:Spt:20969.0,19621.0,19621.1] ||  -> node16(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.27  20972[17:MRR:20346.1,20970.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.27  20973[17:Res:20971.1,586.0] ||  -> node16(c_e_h_1,c_e,s2) node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.27  20975[17:Res:20971.1,511.0] ||  -> node16(c_e_h_1,c_e,s2) node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.27  20978[17:Res:20971.1,87.0] ||  -> node16(c_e_h_1,c_e,s2) m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.27  21005[18:Spt:20978.0] ||  -> node16(c_e_h_1,c_e,s2)*.
% 7.10/7.27  21007[18:Res:21005.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.27  21008[18:MRR:21007.0,21007.1,20972.0,20970.0] ||  -> .
% 7.10/7.27  21009[18:Spt:21008.0,20978.0,21005.0] || node16(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.27  21010[18:Spt:21008.0,20978.1] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.27  21011[18:MRR:20971.0,21009.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.27  21013[18:MRR:20975.0,21009.0] ||  -> node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.27  21014[18:MRR:20973.0,21009.0] ||  -> node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.27  21047[18:Res:21013.1,595.0] ||  -> node17(c_e_h_1,c_e,s1) node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.27  21049[18:Res:21013.1,515.0] ||  -> node17(c_e_h_1,c_e,s1) node17(c_e_h_1,c_e,s0)*.
% 7.10/7.27  21053[19:Spt:21049.0] ||  -> node17(c_e_h_1,c_e,s1)*.
% 7.10/7.27  21054[19:Res:21053.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.27  21289[20:Spt:19782.1] ||  -> node16(c_e_h_1,c_e,s3)*.
% 7.10/7.27  21290[20:Res:21289.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s3)* m_c_h_element_v_in1(c_e_h_1,c_e,s3) -> .
% 7.10/7.27  21291[20:Res:21289.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s3)* m_c_h_element_v_in1(c_e_h_1,c_e,s3).
% 7.10/7.27  21292[20:MRR:21291.0,20766.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s3)*.
% 7.10/7.27  21293[20:MRR:20767.0,21292.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s3)*.
% 7.10/7.27  21294[20:MRR:21290.0,21290.1,21293.0,21292.0] ||  -> .
% 7.10/7.27  21295[20:Spt:21294.0,19782.1,21289.0] || node16(c_e_h_1,c_e,s3)*+ -> .
% 7.10/7.27  21296[20:Spt:21294.0,19782.0,19782.2] || m_c_h_element_v_in1(c_e_h_1,c_e,s3)+ -> m_c_h_element_v_out(c_e_h_1,c_e,s4)*.
% 7.10/7.27  21927[18:Res:21014.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s2) -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.27  21929[18:MRR:21927.0,21011.0] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.27  21930[21:Spt:21929.2] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s1)*.
% 7.10/7.27  21932[21:Res:21930.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)*.
% 7.10/7.27  21936[21:Res:21932.0,412.0] ||  -> node21(c_e_h_1,c_c,s0,s1)*.
% 7.10/7.27  21953[21:Res:21936.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s1) -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.27  21955[21:MRR:21953.0,21932.0] ||  -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.27  21961[21:Res:21955.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s0)*.
% 7.10/7.27  21963[21:Res:21961.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s0)*.
% 7.10/7.27  21964[21:MRR:21963.0,121.0] ||  -> .
% 7.10/7.27  21965[21:Spt:21964.0,21929.2,21930.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.27  21966[21:Spt:21964.0,21929.0,21929.1] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.27  21967[21:MRR:21054.1,21965.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.27  21969[21:Res:21966.1,18484.0] ||  -> node16(c_e_h_1,c_e,s1) node17(c_e_h_1,c_e,s4) m_c_h_element_v_out(c_e_h_1,c_e,s4)*.
% 7.10/7.27  21971[21:Res:21966.1,595.0] ||  -> node16(c_e_h_1,c_e,s1) node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.27  21973[21:Res:21966.1,515.0] ||  -> node16(c_e_h_1,c_e,s1) node17(c_e_h_1,c_e,s0)*.
% 7.10/7.27  21981[22:Spt:21973.0] ||  -> node16(c_e_h_1,c_e,s1)*.
% 7.10/7.27  21983[22:Res:21981.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.27  21984[22:MRR:21983.0,21983.1,21967.0,21965.0] ||  -> .
% 7.10/7.27  21985[22:Spt:21984.0,21973.0,21981.0] || node16(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.27  21986[22:Spt:21984.0,21973.1] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.10/7.27  21987[22:MRR:21966.0,21985.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.27  21990[22:MRR:21969.0,21985.0] ||  -> node17(c_e_h_1,c_e,s4) m_c_h_element_v_out(c_e_h_1,c_e,s4)*.
% 7.10/7.27  21991[22:MRR:21971.0,21985.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.27  21993[22:Res:21986.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.27  21994[22:Res:21986.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.27  22012[23:Spt:21990.1] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s4)*.
% 7.10/7.27  22018[23:Res:22012.0,87.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s4)*.
% 7.10/7.27  22019[23:MRR:22018.0,20764.0] ||  -> .
% 7.10/7.27  22020[23:Spt:22019.0,21990.1,22012.0] || m_c_h_element_v_out(c_e_h_1,c_e,s4)*+ -> .
% 7.10/7.27  22021[23:Spt:22019.0,21990.0] ||  -> node17(c_e_h_1,c_e,s4)*.
% 7.10/7.27  22035[22:Res:21991.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.27  22037[22:MRR:22035.0,21987.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.27  22038[24:Spt:22037.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.10/7.27  22039[24:Res:22038.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.10/7.27  22040[24:Res:22038.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.27  22041[24:MRR:22040.0,21993.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.27  22042[24:MRR:21994.0,22041.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.27  22043[24:MRR:22039.0,22039.1,22042.0,22041.0] ||  -> .
% 7.10/7.27  22044[24:Spt:22043.0,22037.0,22038.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.10/7.27  22045[24:Spt:22043.0,22037.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.27  22048[24:Res:22045.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.10/7.27  22049[24:MRR:22048.0,142.0] ||  -> .
% 7.10/7.27  22050[19:Spt:22049.0,21049.0,21053.0] || node17(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.27  22051[19:Spt:22049.0,21049.1] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.10/7.27  22052[19:MRR:21013.0,22050.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.27  22056[19:MRR:21047.0,22050.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.27  22058[19:Res:22051.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.27  22059[19:Res:22051.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.27  22074[19:Res:22056.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.27  22076[19:MRR:22074.0,22052.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.27  22081[20:Spt:22076.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.10/7.27  22082[20:Res:22081.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.10/7.27  22083[20:Res:22081.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.27  22084[20:MRR:22083.0,22058.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.27  22085[20:MRR:22059.0,22084.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.27  22086[20:MRR:22082.0,22082.1,22085.0,22084.0] ||  -> .
% 7.10/7.27  22087[20:Spt:22086.0,22076.0,22081.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.10/7.27  22088[20:Spt:22086.0,22076.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.27  22091[20:Res:22088.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.10/7.27  22092[20:MRR:22091.0,142.0] ||  -> .
% 7.10/7.27  22093[15:Spt:22092.0,19073.0,20345.0] || node17(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.27  22094[15:Spt:22092.0,19073.1] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.27  22097[15:MRR:19123.0,22093.0] ||  -> node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.27  22098[15:MRR:19121.0,22093.0] ||  -> node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.27  22132[15:Res:22097.1,595.0] ||  -> node17(c_e_h_1,c_e,s1) node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.27  22134[15:Res:22097.1,515.0] ||  -> node17(c_e_h_1,c_e,s1) node17(c_e_h_1,c_e,s0)*.
% 7.10/7.27  22138[16:Spt:22134.0] ||  -> node17(c_e_h_1,c_e,s1)*.
% 7.10/7.27  22139[16:Res:22138.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.27  22430[15:Res:22098.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s2) -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.27  22432[15:MRR:22430.0,22094.0] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.27  22433[17:Spt:22432.2] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s1)*.
% 7.10/7.27  22435[17:Res:22433.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)*.
% 7.10/7.27  22446[17:Res:22435.0,412.0] ||  -> node21(c_e_h_1,c_c,s0,s1)*.
% 7.10/7.27  22457[17:Res:22446.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s1) -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.27  22459[17:MRR:22457.0,22435.0] ||  -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.27  22460[17:Res:22459.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s0)*.
% 7.10/7.27  22462[17:Res:22460.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s0)*.
% 7.10/7.27  22463[17:MRR:22462.0,121.0] ||  -> .
% 7.10/7.27  22464[17:Spt:22463.0,22432.2,22433.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.27  22465[17:Spt:22463.0,22432.0,22432.1] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.27  22466[17:MRR:22139.1,22464.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.27  22470[17:Res:22465.1,595.0] ||  -> node16(c_e_h_1,c_e,s1) node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.27  22472[17:Res:22465.1,515.0] ||  -> node16(c_e_h_1,c_e,s1) node17(c_e_h_1,c_e,s0)*.
% 7.10/7.27  22483[18:Spt:22472.0] ||  -> node16(c_e_h_1,c_e,s1)*.
% 7.10/7.27  22485[18:Res:22483.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.27  22486[18:MRR:22485.0,22485.1,22466.0,22464.0] ||  -> .
% 7.10/7.27  22487[18:Spt:22486.0,22472.0,22483.0] || node16(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.27  22488[18:Spt:22486.0,22472.1] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.10/7.27  22489[18:MRR:22465.0,22487.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.27  22493[18:MRR:22470.0,22487.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.27  22495[18:Res:22488.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.27  22496[18:Res:22488.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.27  22534[18:Res:22493.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.27  22536[18:MRR:22534.0,22489.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.27  22537[19:Spt:22536.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.10/7.27  22538[19:Res:22537.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.10/7.27  22539[19:Res:22537.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.27  22540[19:MRR:22539.0,22495.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.27  22541[19:MRR:22496.0,22540.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.27  22542[19:MRR:22538.0,22538.1,22541.0,22540.0] ||  -> .
% 7.10/7.27  22543[19:Spt:22542.0,22536.0,22537.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.10/7.27  22544[19:Spt:22542.0,22536.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.27  22547[19:Res:22544.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.10/7.27  22548[19:MRR:22547.0,142.0] ||  -> .
% 7.10/7.27  22549[16:Spt:22548.0,22134.0,22138.0] || node17(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.27  22550[16:Spt:22548.0,22134.1] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.10/7.27  22551[16:MRR:22097.0,22549.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.27  22555[16:MRR:22132.0,22549.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.27  22557[16:Res:22550.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.27  22558[16:Res:22550.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.27  22572[16:Res:22555.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.27  22574[16:MRR:22572.0,22551.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.27  22575[17:Spt:22574.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.10/7.27  22576[17:Res:22575.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.10/7.27  22577[17:Res:22575.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.27  22578[17:MRR:22577.0,22557.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.27  22579[17:MRR:22558.0,22578.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.27  22580[17:MRR:22576.0,22576.1,22579.0,22578.0] ||  -> .
% 7.10/7.27  22581[17:Spt:22580.0,22574.0,22575.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.10/7.27  22582[17:Spt:22580.0,22574.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.27  22585[17:Res:22582.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.10/7.27  22586[17:MRR:22585.0,142.0] ||  -> .
% 7.10/7.27  22587[12:Spt:22586.0,18366.3,18374.0] || trans(s4,s1)*+ -> .
% 7.10/7.27  22588[12:Spt:22586.0,18366.0,18366.1,18366.2,18366.4] ||  -> trans(s4,s4) trans(s4,s3) trans(s4,s2) node19(u,v,s4,s0)*.
% 7.10/7.27  22589[12:MRR:18367.3,22587.0] ||  -> trans(s4,s4) trans(s4,s3) trans(s4,s2)* until2p29(s0).
% 7.10/7.27  22590[12:MRR:18354.3,22587.0] ||  -> trans(s4,s4) trans(s4,s3) trans(s4,s2) trans(s4,s0)*.
% 7.10/7.27  22596[13:Spt:22588.3] ||  -> node19(u,v,s4,s0)*.
% 7.10/7.27  22598[13:Res:22596.0,140.0] ||  -> node17(u,v,s4) node18(u,v,s4,s0)*.
% 7.10/7.27  22599[14:Spt:22590.0] ||  -> trans(s4,s4)*.
% 7.10/7.27  22607[14:Res:22599.0,18353.0] ||  -> until2p29(s4)*.
% 7.10/7.27  22608[14:MRR:18347.0,22607.0] ||  -> node23(s4)*.
% 7.10/7.27  22609[14:MRR:181.0,22607.0] ||  -> node26(s4)*.
% 7.10/7.27  22610[14:MRR:18350.0,22607.0] ||  -> node21(c_e_h_2,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_2,c_r,s3).
% 7.10/7.27  22616[15:Spt:22610.1] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s3)*.
% 7.10/7.27  22618[15:Res:22616.0,409.0] ||  -> node21(c_e_h_2,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_2,c_r,s2).
% 7.10/7.27  22638[15:Res:22618.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_r,s3) -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.10/7.27  22640[15:MRR:22638.0,22616.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.10/7.27  22641[16:Spt:22640.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2)*.
% 7.10/7.27  22644[16:Res:22641.0,96.0] ||  -> m_user_v_ack(c_e_h_2,c_u,s2)*.
% 7.10/7.27  22645[16:Res:22644.0,34.0] || m_and_h_gate_v_in2(c_e_h_2,c_d,s2)*+ -> .
% 7.10/7.27  22649[16:Res:2305.0,22645.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1) m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.10/7.27  22653[17:Spt:22649.1] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.10/7.27  22654[17:Res:22653.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.27  22659[17:Res:22654.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.27  22663[17:Res:22659.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  22665[17:MRR:22663.0,13.0] ||  -> .
% 7.10/7.27  22666[17:Spt:22665.0,22649.1,22653.0] || m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*+ -> .
% 7.10/7.27  22667[17:Spt:22665.0,22649.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1)*.
% 7.10/7.27  22670[17:Res:22667.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.27  22677[17:Res:22670.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.27  22744[13:Res:22598.1,137.1] || m_c_h_element_v_out(u,v,s4) -> node17(u,v,s4) m_c_h_element_v_out(u,v,s0)*.
% 7.10/7.27  22745[13:MRR:22744.2,128.0] || m_c_h_element_v_out(u,v,s4)*+ -> node17(u,v,s4).
% 7.10/7.27  22765[17:Res:22677.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.27  22767[17:MRR:22765.0,22670.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.27  22768[17:Res:22767.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.27  22769[17:Res:22767.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.27  22770[18:Spt:22768.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.27  22773[18:Res:22770.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.10/7.27  22776[18:MRR:22773.0,22666.0] ||  -> .
% 7.10/7.27  22777[18:Spt:22776.0,22768.0,22770.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)* -> .
% 7.10/7.27  22778[18:Spt:22776.0,22768.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.27  22780[18:MRR:22769.0,22777.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.27  22784[18:Res:22780.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  22785[18:MRR:22784.0,13.0] ||  -> .
% 7.10/7.27  22786[16:Spt:22785.0,22640.0,22641.0] || m_and_h_gate_v_out(c_e_h_2,c_r,s2)*+ -> .
% 7.10/7.27  22787[16:Spt:22785.0,22640.1] ||  -> node20(c_e_h_2,c_r,s2)*.
% 7.10/7.27  22791[16:Res:22787.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s2)*.
% 7.10/7.27  22802[16:Res:22791.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.10/7.27  22818[16:Res:22802.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.10/7.27  22885[16:Res:22818.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.27  22887[16:MRR:22885.0,22802.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.27  22888[16:Res:22887.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.27  22889[16:Res:22887.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.27  22890[17:Spt:22888.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.27  22895[17:Res:22890.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.27  22938[17:Res:22895.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.27  22940[17:MRR:22938.0,22890.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.27  22941[17:Res:22940.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.27  22942[17:Res:22940.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.27  22943[18:Spt:22941.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.27  22948[18:Res:22943.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.27  22951[18:Res:22948.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  22953[18:MRR:22951.0,13.0] ||  -> .
% 7.10/7.27  22954[18:Spt:22953.0,22941.0,22943.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)* -> .
% 7.10/7.27  22955[18:Spt:22953.0,22941.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.27  22957[18:MRR:22942.0,22954.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.27  22961[18:Res:22957.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  22962[18:MRR:22961.0,13.0] ||  -> .
% 7.10/7.27  22963[17:Spt:22962.0,22888.0,22890.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*+ -> .
% 7.10/7.27  22964[17:Spt:22962.0,22888.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.27  22966[17:MRR:22889.0,22963.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.27  22972[17:Res:22966.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  22973[17:MRR:22972.0,13.0] ||  -> .
% 7.10/7.27  22974[15:Spt:22973.0,22610.1,22616.0] || m_and_h_gate_v_out(c_e_h_2,c_r,s3)*+ -> .
% 7.10/7.27  22975[15:Spt:22973.0,22610.0] ||  -> node21(c_e_h_2,c_r,s3,s4)*.
% 7.10/7.27  22982[15:Res:592.1,22974.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_d,s4)* m_and_h_gate_v_in2(c_e_h_2,c_r,s3).
% 7.10/7.27  22983[15:Res:591.1,22974.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_d,s4)* m_and_h_gate_v_in1(c_e_h_2,c_r,s3).
% 7.10/7.27  22988[16:Spt:22982.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_d,s4)*.
% 7.10/7.27  22990[16:Res:22988.0,279.1] node23(s4) ||  -> .
% 7.10/7.27  22991[16:SSi:22990.0,5.0,2015.0,18351.0,22607.0,22608.0,22609.0] ||  -> .
% 7.10/7.27  22992[16:Spt:22991.0,22982.0,22988.0] || m_and_h_gate_v_in2(c_e_h_2,c_d,s4)*+ -> .
% 7.10/7.27  22993[16:Spt:22991.0,22982.1] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s3)*.
% 7.10/7.27  22995[16:MRR:22983.0,22992.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s3)*.
% 7.10/7.27  22998[16:Res:22993.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s3)*.
% 7.10/7.27  23000[16:Res:22995.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s3)*.
% 7.10/7.27  23009[16:Res:22998.0,390.0] ||  -> node10(c_e_h_2,c_m,s2,s3)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2).
% 7.10/7.27  23010[16:Res:23000.0,582.0] ||  -> node16(c_e_h_2,c_e,s2) node14(c_e_h_2,c_e,s2,s3)* m_c_h_element_v_out(c_e_h_2,c_e,s2).
% 7.10/7.27  23012[16:Res:23000.0,509.0] ||  -> node17(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.10/7.27  23023[16:Res:23012.1,586.0] ||  -> node17(c_e_h_2,c_e,s2) node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.10/7.27  23025[16:Res:23012.1,511.0] ||  -> node17(c_e_h_2,c_e,s2) node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  23028[16:Res:23012.1,87.0] ||  -> node17(c_e_h_2,c_e,s2) m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.10/7.27  23037[17:Spt:23028.0] ||  -> node17(c_e_h_2,c_e,s2)*.
% 7.10/7.27  23038[17:Res:23037.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s2)*+ -> m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.27  23046[16:Res:23009.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s3) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) node9(c_e_h_2,c_m,s2)*.
% 7.10/7.27  23048[16:MRR:23046.0,22998.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) node9(c_e_h_2,c_m,s2)*.
% 7.10/7.27  23049[16:Res:23048.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s2)*.
% 7.10/7.27  23051[18:Spt:23049.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.10/7.27  23056[18:Res:23051.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.10/7.27  23062[18:Res:23056.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.27  23064[18:MRR:23062.0,23051.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.27  23079[18:Res:23064.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.27  23080[18:Res:23064.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.27  23081[19:Spt:23079.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.27  23086[19:Res:23081.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.27  23172[19:Res:23086.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.27  23174[19:MRR:23172.0,23081.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.27  23175[19:Res:23174.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.27  23176[19:Res:23174.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.27  23177[20:Spt:23175.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.27  23182[20:Res:23177.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.27  23185[20:Res:23182.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  23187[20:MRR:23185.0,13.0] ||  -> .
% 7.10/7.27  23188[20:Spt:23187.0,23175.0,23177.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*+ -> .
% 7.10/7.27  23189[20:Spt:23187.0,23175.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.27  23191[20:MRR:23176.0,23188.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.27  23198[20:Res:23191.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  23199[20:MRR:23198.0,13.0] ||  -> .
% 7.10/7.27  23200[19:Spt:23199.0,23079.0,23081.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)* -> .
% 7.10/7.27  23201[19:Spt:23199.0,23079.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.27  23203[19:MRR:23080.0,23200.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.27  23209[19:Res:23203.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  23210[19:MRR:23209.0,13.0] ||  -> .
% 7.10/7.27  23211[18:Spt:23210.0,23049.0,23051.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*+ -> .
% 7.10/7.27  23212[18:Spt:23210.0,23049.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s2)*.
% 7.10/7.27  23293[16:Res:23010.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s3) -> node16(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)* m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.27  23295[16:MRR:23293.0,23000.0] ||  -> node16(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)* m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.27  23363[19:Spt:23295.2] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s2)*.
% 7.10/7.27  23365[19:Res:23363.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s2)*.
% 7.10/7.27  23368[19:Res:23365.0,410.0] ||  -> node21(c_e_h_2,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_2,c_c,s1).
% 7.10/7.27  23400[19:Res:23368.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s2) -> m_and_h_gate_v_out(c_e_h_2,c_c,s1) node20(c_e_h_2,c_c,s1)*.
% 7.10/7.27  23402[19:MRR:23400.0,23365.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1) node20(c_e_h_2,c_c,s1)*.
% 7.10/7.27  23403[19:Res:23402.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)* m_and_h_gate_v_in1(c_e_h_2,c_c,s1).
% 7.10/7.27  23408[20:Spt:23403.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)*.
% 7.10/7.27  23410[20:Res:23408.0,412.0] ||  -> node21(c_e_h_2,c_c,s0,s1)*.
% 7.10/7.27  23415[20:Res:23410.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s1) -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.27  23417[20:MRR:23415.0,23408.0] ||  -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.27  23427[20:Res:23417.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s0)*.
% 7.10/7.27  23429[20:Res:23427.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s0)*.
% 7.10/7.27  23430[20:MRR:23429.0,121.0] ||  -> .
% 7.10/7.27  23431[20:Spt:23430.0,23403.0,23408.0] || m_and_h_gate_v_out(c_e_h_2,c_c,s1)*+ -> .
% 7.10/7.27  23432[20:Spt:23430.0,23403.1] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s1)*.
% 7.10/7.27  23436[20:Res:23432.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s1)*.
% 7.10/7.27  23441[20:Res:23436.0,375.0] ||  -> node12(c_e_h_2,c_a,s0,s1)*.
% 7.10/7.27  23451[20:Res:23441.0,123.1] || m_mutex_h_half_v_out(c_e_h_2,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_2,c_a,s0).
% 7.10/7.27  23453[20:MRR:23451.0,23436.0] ||  -> m_mutex_h_half_v_inp(c_e_h_2,c_a,s0)*.
% 7.10/7.27  23454[20:Res:23453.0,18.0] ||  -> m_user_v_req(c_e_h_2,c_u,s0)*.
% 7.10/7.27  23455[20:MRR:23454.0,106.0] ||  -> .
% 7.10/7.27  23456[19:Spt:23455.0,23295.2,23363.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s2)*+ -> .
% 7.10/7.27  23457[19:Spt:23455.0,23295.0,23295.1] ||  -> node16(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.10/7.27  23458[19:MRR:23038.1,23456.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s2)*+ -> .
% 7.10/7.27  23459[19:Res:23457.1,586.0] ||  -> node16(c_e_h_2,c_e,s2) node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.10/7.27  23461[19:Res:23457.1,511.0] ||  -> node16(c_e_h_2,c_e,s2) node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  23464[19:Res:23457.1,87.0] ||  -> node16(c_e_h_2,c_e,s2) m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.10/7.27  23466[20:Spt:23464.0] ||  -> node16(c_e_h_2,c_e,s2)*.
% 7.10/7.27  23468[20:Res:23466.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s2)* m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.27  23469[20:MRR:23468.0,23468.1,23458.0,23456.0] ||  -> .
% 7.10/7.27  23470[20:Spt:23469.0,23464.0,23466.0] || node16(c_e_h_2,c_e,s2)*+ -> .
% 7.10/7.27  23471[20:Spt:23469.0,23464.1] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.10/7.27  23472[20:MRR:23457.0,23470.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.10/7.27  23474[20:MRR:23461.0,23470.0] ||  -> node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  23475[20:MRR:23459.0,23470.0] ||  -> node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.10/7.27  23486[20:Res:23474.1,595.0] ||  -> node17(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.27  23488[20:Res:23474.1,515.0] ||  -> node17(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.10/7.27  23492[21:Spt:23488.0] ||  -> node17(c_e_h_2,c_e,s1)*.
% 7.10/7.27  23493[21:Res:23492.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.27  23648[20:Res:23475.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s2) -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.27  23650[20:MRR:23648.0,23472.0] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.27  23651[22:Spt:23650.2] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s1)*.
% 7.10/7.27  23653[22:Res:23651.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)*.
% 7.10/7.27  23664[22:Res:23653.0,412.0] ||  -> node21(c_e_h_2,c_c,s0,s1)*.
% 7.10/7.27  23691[22:Res:23664.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s1) -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.27  23693[22:MRR:23691.0,23653.0] ||  -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.27  23694[22:Res:23693.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s0)*.
% 7.10/7.27  23696[22:Res:23694.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s0)*.
% 7.10/7.27  23697[22:MRR:23696.0,121.0] ||  -> .
% 7.10/7.27  23698[22:Spt:23697.0,23650.2,23651.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.27  23699[22:Spt:23697.0,23650.0,23650.1] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  23700[22:MRR:23493.1,23698.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.27  23702[22:Res:23699.1,595.0] ||  -> node16(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.27  23704[22:Res:23699.1,515.0] ||  -> node16(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.10/7.27  23708[23:Spt:23704.0] ||  -> node16(c_e_h_2,c_e,s1)*.
% 7.10/7.27  23710[23:Res:23708.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.27  23711[23:MRR:23710.0,23710.1,23700.0,23698.0] ||  -> .
% 7.10/7.27  23712[23:Spt:23711.0,23704.0,23708.0] || node16(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.27  23713[23:Spt:23711.0,23704.1] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.10/7.27  23714[23:MRR:23699.0,23712.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  23717[23:MRR:23702.0,23712.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.27  23718[23:Res:23713.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  23719[23:Res:23713.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.27  23728[23:Res:23717.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  23730[23:MRR:23728.0,23714.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  23731[24:Spt:23730.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.10/7.27  23732[24:Res:23731.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.10/7.27  23733[24:Res:23731.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  23734[24:MRR:23733.0,23718.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  23735[24:MRR:23719.0,23734.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.27  23736[24:MRR:23732.0,23732.1,23735.0,23734.0] ||  -> .
% 7.10/7.27  23737[24:Spt:23736.0,23730.0,23731.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.10/7.27  23738[24:Spt:23736.0,23730.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  23741[24:Res:23738.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.10/7.27  23742[24:MRR:23741.0,142.0] ||  -> .
% 7.10/7.27  23743[21:Spt:23742.0,23488.0,23492.0] || node17(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.27  23744[21:Spt:23742.0,23488.1] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.10/7.27  23745[21:MRR:23474.0,23743.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  23748[21:MRR:23486.0,23743.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.27  23749[21:Res:23744.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  23750[21:Res:23744.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.27  23762[21:Res:23748.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  23764[21:MRR:23762.0,23745.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  23765[22:Spt:23764.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.10/7.27  23766[22:Res:23765.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.10/7.27  23767[22:Res:23765.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  23768[22:MRR:23767.0,23749.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  23769[22:MRR:23750.0,23768.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.27  23770[22:MRR:23766.0,23766.1,23769.0,23768.0] ||  -> .
% 7.10/7.27  23771[22:Spt:23770.0,23764.0,23765.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.10/7.27  23772[22:Spt:23770.0,23764.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  23775[22:Res:23772.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.10/7.27  23776[22:MRR:23775.0,142.0] ||  -> .
% 7.10/7.27  23777[17:Spt:23776.0,23028.0,23037.0] || node17(c_e_h_2,c_e,s2)*+ -> .
% 7.10/7.27  23778[17:Spt:23776.0,23028.1] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.10/7.27  23779[17:MRR:23012.0,23777.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.10/7.27  23781[17:MRR:23025.0,23777.0] ||  -> node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  23782[17:MRR:23023.0,23777.0] ||  -> node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.10/7.27  23791[18:Spt:23048.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.10/7.27  23796[18:Res:23791.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.10/7.27  23838[17:Res:23781.1,595.0] ||  -> node17(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.27  23840[17:Res:23781.1,515.0] ||  -> node17(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.10/7.27  23924[18:Res:23796.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.27  23926[18:MRR:23924.0,23791.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.27  23927[17:Res:23782.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s2) -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.27  23929[17:MRR:23927.0,23779.0] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.27  23931[18:Res:23926.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.27  24016[19:Spt:23926.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.27  24021[19:Res:24016.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.27  24107[19:Res:24021.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.27  24109[19:MRR:24107.0,24016.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.27  24110[19:Res:24109.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.27  24111[19:Res:24109.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.27  24115[20:Spt:24110.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.27  24120[20:Res:24115.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.27  24123[20:Res:24120.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  24125[20:MRR:24123.0,13.0] ||  -> .
% 7.10/7.27  24126[20:Spt:24125.0,24110.0,24115.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*+ -> .
% 7.10/7.27  24127[20:Spt:24125.0,24110.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.27  24129[20:MRR:24111.0,24126.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.27  24136[20:Res:24129.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  24137[20:MRR:24136.0,13.0] ||  -> .
% 7.10/7.27  24138[19:Spt:24137.0,23926.0,24016.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)* -> .
% 7.10/7.27  24139[19:Spt:24137.0,23926.1] ||  -> node9(c_e_h_2,c_m,s1)*.
% 7.10/7.27  24140[19:MRR:23931.0,24138.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.27  24147[19:Res:24140.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  24148[19:MRR:24147.0,13.0] ||  -> .
% 7.10/7.27  24149[18:Spt:24148.0,23048.0,23791.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*+ -> .
% 7.10/7.27  24150[18:Spt:24148.0,23048.1] ||  -> node9(c_e_h_2,c_m,s2)*.
% 7.10/7.27  24158[19:Spt:23840.0] ||  -> node17(c_e_h_2,c_e,s1)*.
% 7.10/7.27  24159[19:Res:24158.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.27  24298[20:Spt:23929.2] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s1)*.
% 7.10/7.27  24300[20:Res:24298.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)*.
% 7.10/7.27  24311[20:Res:24300.0,412.0] ||  -> node21(c_e_h_2,c_c,s0,s1)*.
% 7.10/7.27  24331[20:Res:24311.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s1) -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.27  24333[20:MRR:24331.0,24300.0] ||  -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.27  24334[20:Res:24333.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s0)*.
% 7.10/7.27  24345[20:Res:24334.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s0)*.
% 7.10/7.27  24346[20:MRR:24345.0,121.0] ||  -> .
% 7.10/7.27  24347[20:Spt:24346.0,23929.2,24298.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.27  24348[20:Spt:24346.0,23929.0,23929.1] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  24349[20:MRR:24159.1,24347.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.27  24351[20:Res:24348.1,595.0] ||  -> node16(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.27  24353[20:Res:24348.1,515.0] ||  -> node16(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.10/7.27  24357[21:Spt:24353.0] ||  -> node16(c_e_h_2,c_e,s1)*.
% 7.10/7.27  24359[21:Res:24357.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.27  24360[21:MRR:24359.0,24359.1,24349.0,24347.0] ||  -> .
% 7.10/7.27  24361[21:Spt:24360.0,24353.0,24357.0] || node16(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.27  24362[21:Spt:24360.0,24353.1] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.10/7.27  24363[21:MRR:24348.0,24361.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  24366[21:MRR:24351.0,24361.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.27  24367[21:Res:24362.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  24368[21:Res:24362.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.27  24377[21:Res:24366.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  24379[21:MRR:24377.0,24363.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  24380[22:Spt:24379.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.10/7.27  24381[22:Res:24380.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.10/7.27  24382[22:Res:24380.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  24383[22:MRR:24382.0,24367.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  24384[22:MRR:24368.0,24383.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.27  24385[22:MRR:24381.0,24381.1,24384.0,24383.0] ||  -> .
% 7.10/7.27  24386[22:Spt:24385.0,24379.0,24380.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.10/7.27  24387[22:Spt:24385.0,24379.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  24390[22:Res:24387.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.10/7.27  24391[22:MRR:24390.0,142.0] ||  -> .
% 7.10/7.27  24392[19:Spt:24391.0,23840.0,24158.0] || node17(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.27  24393[19:Spt:24391.0,23840.1] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.10/7.27  24395[19:MRR:23781.0,24392.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  24397[19:MRR:23838.0,24392.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.27  24398[19:Res:24393.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  24399[19:Res:24393.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.27  24425[19:Res:24397.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  24427[19:MRR:24425.0,24395.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  24428[20:Spt:24427.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.10/7.27  24429[20:Res:24428.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.10/7.27  24430[20:Res:24428.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  24431[20:MRR:24430.0,24398.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  24432[20:MRR:24399.0,24431.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.27  24433[20:MRR:24429.0,24429.1,24432.0,24431.0] ||  -> .
% 7.10/7.27  24434[20:Spt:24433.0,24427.0,24428.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.10/7.27  24435[20:Spt:24433.0,24427.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  24438[20:Res:24435.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.10/7.27  24439[20:MRR:24438.0,142.0] ||  -> .
% 7.10/7.27  24440[14:Spt:24439.0,22590.0,22599.0] || trans(s4,s4)*+ -> .
% 7.10/7.27  24441[14:Spt:24439.0,22590.1,22590.2,22590.3] ||  -> trans(s4,s3) trans(s4,s2) trans(s4,s0)*.
% 7.10/7.27  24442[14:MRR:22589.0,24440.0] ||  -> trans(s4,s3) trans(s4,s2)* until2p29(s0).
% 7.10/7.27  24448[15:Spt:24441.0] ||  -> trans(s4,s3)*.
% 7.10/7.27  24456[15:Res:24448.0,18353.0] ||  -> until2p29(s3)*.
% 7.10/7.27  24457[15:MRR:2026.0,24456.0] ||  -> xuntil2p30(s3)*.
% 7.10/7.27  24458[15:MRR:170.0,24457.0] ||  -> until2p29(s4)*.
% 7.10/7.27  24459[15:MRR:181.0,24458.0] ||  -> node26(s4)*.
% 7.10/7.27  24460[15:MRR:18347.0,24458.0] ||  -> node23(s4)*.
% 7.10/7.27  24461[15:MRR:18350.0,24458.0] ||  -> node21(c_e_h_2,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_2,c_r,s3).
% 7.10/7.27  24468[16:Spt:24461.0] ||  -> node21(c_e_h_2,c_r,s3,s4)*.
% 7.10/7.27  24469[16:Res:24468.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_r,s4)+ -> node20(c_e_h_2,c_r,s3)*.
% 7.10/7.27  24476[16:Res:218.1,24469.0] node23(s4) ||  -> node20(c_e_h_2,c_r,s3)*.
% 7.10/7.27  24477[16:SSi:24476.0,5.0,2015.0,18351.0,24458.0,24459.0,24460.0] ||  -> node20(c_e_h_2,c_r,s3)*.
% 7.10/7.27  24480[16:Res:24477.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s3)*.
% 7.10/7.27  24481[16:Res:24477.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s3)*.
% 7.10/7.27  24484[16:Res:24480.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s3)*.
% 7.10/7.27  24485[16:Res:24481.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s3)*.
% 7.10/7.27  24491[16:Res:24484.0,582.0] ||  -> node16(c_e_h_2,c_e,s2) node14(c_e_h_2,c_e,s2,s3)* m_c_h_element_v_out(c_e_h_2,c_e,s2).
% 7.10/7.27  24493[16:Res:24484.0,509.0] ||  -> node17(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.10/7.27  24501[16:Res:24485.0,390.0] ||  -> node10(c_e_h_2,c_m,s2,s3)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2).
% 7.10/7.27  24509[16:Res:24493.1,586.0] ||  -> node17(c_e_h_2,c_e,s2) node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.10/7.27  24511[16:Res:24493.1,511.0] ||  -> node17(c_e_h_2,c_e,s2) node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  24514[16:Res:24493.1,87.0] ||  -> node17(c_e_h_2,c_e,s2) m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.10/7.27  24525[17:Spt:24514.0] ||  -> node17(c_e_h_2,c_e,s2)*.
% 7.10/7.27  24526[17:Res:24525.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s2)*+ -> m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.27  24588[16:Res:24501.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s3) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) node9(c_e_h_2,c_m,s2)*.
% 7.10/7.27  24590[16:MRR:24588.0,24485.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) node9(c_e_h_2,c_m,s2)*.
% 7.10/7.27  24591[16:Res:24590.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s2)*.
% 7.10/7.27  24592[16:Res:24590.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s2)*.
% 7.10/7.27  24593[18:Spt:24591.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.10/7.27  24598[18:Res:24593.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.10/7.27  24638[18:Res:24598.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.27  24640[18:MRR:24638.0,24593.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.27  24641[18:Res:24640.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.27  24642[18:Res:24640.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.27  24643[19:Spt:24641.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.27  24648[19:Res:24643.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.27  24670[19:Res:24648.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.27  24672[19:MRR:24670.0,24643.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.27  24673[19:Res:24672.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.27  24674[19:Res:24672.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.27  24675[20:Spt:24673.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.27  24680[20:Res:24675.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.27  24683[20:Res:24680.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  24685[20:MRR:24683.0,13.0] ||  -> .
% 7.10/7.27  24686[20:Spt:24685.0,24673.0,24675.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*+ -> .
% 7.10/7.27  24687[20:Spt:24685.0,24673.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.27  24689[20:MRR:24674.0,24686.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.27  24696[20:Res:24689.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  24697[20:MRR:24696.0,13.0] ||  -> .
% 7.10/7.27  24698[19:Spt:24697.0,24641.0,24643.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)* -> .
% 7.10/7.27  24699[19:Spt:24697.0,24641.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.27  24701[19:MRR:24642.0,24698.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.27  24707[19:Res:24701.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  24708[19:MRR:24707.0,13.0] ||  -> .
% 7.10/7.27  24709[18:Spt:24708.0,24591.0,24593.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*+ -> .
% 7.10/7.27  24710[18:Spt:24708.0,24591.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s2)*.
% 7.10/7.27  24966[16:Res:24491.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s3) -> node16(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)* m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.27  24968[16:MRR:24966.0,24484.0] ||  -> node16(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)* m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.27  24969[19:Spt:24968.2] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s2)*.
% 7.10/7.27  24971[19:Res:24969.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s2)*.
% 7.10/7.27  24974[19:Res:24971.0,410.0] ||  -> node21(c_e_h_2,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_2,c_c,s1).
% 7.10/7.27  24989[19:Res:24974.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s2) -> m_and_h_gate_v_out(c_e_h_2,c_c,s1) node20(c_e_h_2,c_c,s1)*.
% 7.10/7.27  24991[19:MRR:24989.0,24971.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1) node20(c_e_h_2,c_c,s1)*.
% 7.10/7.27  24992[19:Res:24991.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)* m_and_h_gate_v_in1(c_e_h_2,c_c,s1).
% 7.10/7.27  24994[20:Spt:24992.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)*.
% 7.10/7.27  24996[20:Res:24994.0,412.0] ||  -> node21(c_e_h_2,c_c,s0,s1)*.
% 7.10/7.27  25001[20:Res:24996.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s1) -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.27  25003[20:MRR:25001.0,24994.0] ||  -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.27  25004[20:Res:25003.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s0)*.
% 7.10/7.27  25024[20:Res:25004.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s0)*.
% 7.10/7.27  25025[20:MRR:25024.0,121.0] ||  -> .
% 7.10/7.27  25026[20:Spt:25025.0,24992.0,24994.0] || m_and_h_gate_v_out(c_e_h_2,c_c,s1)*+ -> .
% 7.10/7.27  25027[20:Spt:25025.0,24992.1] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s1)*.
% 7.10/7.27  25031[20:Res:25027.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s1)*.
% 7.10/7.27  25036[20:Res:25031.0,375.0] ||  -> node12(c_e_h_2,c_a,s0,s1)*.
% 7.10/7.27  25043[20:Res:25036.0,123.1] || m_mutex_h_half_v_out(c_e_h_2,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_2,c_a,s0).
% 7.10/7.27  25045[20:MRR:25043.0,25031.0] ||  -> m_mutex_h_half_v_inp(c_e_h_2,c_a,s0)*.
% 7.10/7.27  25047[20:Res:25045.0,18.0] ||  -> m_user_v_req(c_e_h_2,c_u,s0)*.
% 7.10/7.27  25048[20:MRR:25047.0,106.0] ||  -> .
% 7.10/7.27  25049[19:Spt:25048.0,24968.2,24969.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s2)*+ -> .
% 7.10/7.27  25050[19:Spt:25048.0,24968.0,24968.1] ||  -> node16(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.10/7.27  25051[19:MRR:24526.1,25049.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s2)*+ -> .
% 7.10/7.27  25052[19:Res:25050.1,586.0] ||  -> node16(c_e_h_2,c_e,s2) node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.10/7.27  25054[19:Res:25050.1,511.0] ||  -> node16(c_e_h_2,c_e,s2) node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  25057[19:Res:25050.1,87.0] ||  -> node16(c_e_h_2,c_e,s2) m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.10/7.27  25059[20:Spt:25057.0] ||  -> node16(c_e_h_2,c_e,s2)*.
% 7.10/7.27  25061[20:Res:25059.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s2)* m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.27  25062[20:MRR:25061.0,25061.1,25051.0,25049.0] ||  -> .
% 7.10/7.27  25063[20:Spt:25062.0,25057.0,25059.0] || node16(c_e_h_2,c_e,s2)*+ -> .
% 7.10/7.27  25064[20:Spt:25062.0,25057.1] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.10/7.27  25065[20:MRR:25050.0,25063.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.10/7.27  25067[20:MRR:25054.0,25063.0] ||  -> node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  25068[20:MRR:25052.0,25063.0] ||  -> node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.10/7.27  25078[20:Res:25067.1,595.0] ||  -> node17(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.27  25080[20:Res:25067.1,515.0] ||  -> node17(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.10/7.27  25084[21:Spt:25080.0] ||  -> node17(c_e_h_2,c_e,s1)*.
% 7.10/7.27  25085[21:Res:25084.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.27  25277[20:Res:25068.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s2) -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.27  25279[20:MRR:25277.0,25065.0] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.27  25284[22:Spt:25279.2] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s1)*.
% 7.10/7.27  25286[22:Res:25284.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)*.
% 7.10/7.27  25289[22:Res:25286.0,412.0] ||  -> node21(c_e_h_2,c_c,s0,s1)*.
% 7.10/7.27  25299[22:Res:25289.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s1) -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.27  25301[22:MRR:25299.0,25286.0] ||  -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.27  25302[22:Res:25301.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s0)*.
% 7.10/7.27  25313[22:Res:25302.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s0)*.
% 7.10/7.27  25314[22:MRR:25313.0,121.0] ||  -> .
% 7.10/7.27  25315[22:Spt:25314.0,25279.2,25284.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.27  25316[22:Spt:25314.0,25279.0,25279.1] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  25317[22:MRR:25085.1,25315.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.27  25319[22:Res:25316.1,595.0] ||  -> node16(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.27  25321[22:Res:25316.1,515.0] ||  -> node16(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.10/7.27  25325[23:Spt:25321.0] ||  -> node16(c_e_h_2,c_e,s1)*.
% 7.10/7.27  25327[23:Res:25325.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.27  25328[23:MRR:25327.0,25327.1,25317.0,25315.0] ||  -> .
% 7.10/7.27  25329[23:Spt:25328.0,25321.0,25325.0] || node16(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.27  25330[23:Spt:25328.0,25321.1] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.10/7.27  25331[23:MRR:25316.0,25329.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  25334[23:MRR:25319.0,25329.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.27  25335[23:Res:25330.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  25336[23:Res:25330.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.27  25345[23:Res:25334.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  25347[23:MRR:25345.0,25331.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  25351[24:Spt:25347.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.10/7.27  25352[24:Res:25351.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.10/7.27  25353[24:Res:25351.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  25354[24:MRR:25353.0,25335.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  25355[24:MRR:25336.0,25354.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.27  25356[24:MRR:25352.0,25352.1,25355.0,25354.0] ||  -> .
% 7.10/7.27  25357[24:Spt:25356.0,25347.0,25351.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.10/7.27  25358[24:Spt:25356.0,25347.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  25361[24:Res:25358.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.10/7.27  25362[24:MRR:25361.0,142.0] ||  -> .
% 7.10/7.27  25363[21:Spt:25362.0,25080.0,25084.0] || node17(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.27  25364[21:Spt:25362.0,25080.1] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.10/7.27  25365[21:MRR:25067.0,25363.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  25368[21:MRR:25078.0,25363.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.27  25369[21:Res:25364.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  25370[21:Res:25364.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.27  25379[21:Res:25368.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  25381[21:MRR:25379.0,25365.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  25382[22:Spt:25381.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.10/7.27  25383[22:Res:25382.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.10/7.27  25384[22:Res:25382.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  25385[22:MRR:25384.0,25369.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  25386[22:MRR:25370.0,25385.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.27  25387[22:MRR:25383.0,25383.1,25386.0,25385.0] ||  -> .
% 7.10/7.27  25388[22:Spt:25387.0,25381.0,25382.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.10/7.27  25389[22:Spt:25387.0,25381.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  25392[22:Res:25389.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.10/7.27  25393[22:MRR:25392.0,142.0] ||  -> .
% 7.10/7.27  25394[17:Spt:25393.0,24514.0,24525.0] || node17(c_e_h_2,c_e,s2)*+ -> .
% 7.10/7.27  25395[17:Spt:25393.0,24514.1] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.10/7.27  25396[17:MRR:24493.0,25394.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.10/7.27  25398[17:MRR:24511.0,25394.0] ||  -> node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  25399[17:MRR:24509.0,25394.0] ||  -> node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.10/7.27  25466[17:Res:25398.1,595.0] ||  -> node17(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.27  25468[17:Res:25398.1,515.0] ||  -> node17(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.10/7.27  25641[18:Spt:25398.0] ||  -> node17(c_e_h_2,c_e,s1)*.
% 7.10/7.27  25642[18:Res:25641.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.27  25661[19:Spt:24592.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.10/7.27  25666[19:Res:25661.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.10/7.27  25803[19:Res:25666.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.27  25805[19:MRR:25803.0,25661.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.27  25807[19:Res:25805.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.27  25921[20:Spt:25805.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.27  25926[20:Res:25921.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.27  25943[20:Res:25926.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.27  25945[20:MRR:25943.0,25921.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.27  25946[20:Res:25945.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.27  25947[20:Res:25945.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.27  25948[21:Spt:25946.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.27  25953[21:Res:25948.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.27  25956[21:Res:25953.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  25958[21:MRR:25956.0,13.0] ||  -> .
% 7.10/7.27  25959[21:Spt:25958.0,25946.0,25948.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)* -> .
% 7.10/7.27  25960[21:Spt:25958.0,25946.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.27  25962[21:MRR:25947.0,25959.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.27  25966[21:Res:25962.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  25967[21:MRR:25966.0,13.0] ||  -> .
% 7.10/7.27  25968[20:Spt:25967.0,25805.0,25921.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*+ -> .
% 7.10/7.27  25969[20:Spt:25967.0,25805.1] ||  -> node9(c_e_h_2,c_m,s1)*.
% 7.10/7.27  25970[20:MRR:25807.0,25968.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.27  25977[20:Res:25970.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  25978[20:MRR:25977.0,13.0] ||  -> .
% 7.10/7.27  25979[19:Spt:25978.0,24592.0,25661.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*+ -> .
% 7.10/7.27  25980[19:Spt:25978.0,24592.1] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s2)*.
% 7.10/7.27  26695[17:Res:25399.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s2) -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.27  26697[17:MRR:26695.0,25396.0] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.27  26698[20:Spt:26697.2] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s1)*.
% 7.10/7.27  26700[20:Res:26698.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)*.
% 7.10/7.27  26711[20:Res:26700.0,412.0] ||  -> node21(c_e_h_2,c_c,s0,s1)*.
% 7.10/7.27  26739[20:Res:26711.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s1) -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.27  26741[20:MRR:26739.0,26700.0] ||  -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.27  26746[20:Res:26741.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s0)*.
% 7.10/7.27  26748[20:Res:26746.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s0)*.
% 7.10/7.27  26749[20:MRR:26748.0,121.0] ||  -> .
% 7.10/7.27  26750[20:Spt:26749.0,26697.2,26698.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.27  26751[20:Spt:26749.0,26697.0,26697.1] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  26752[20:MRR:25642.1,26750.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.27  26754[20:Res:26751.1,595.0] ||  -> node16(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.27  26756[20:Res:26751.1,515.0] ||  -> node16(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.10/7.27  26760[21:Spt:26756.0] ||  -> node16(c_e_h_2,c_e,s1)*.
% 7.10/7.27  26762[21:Res:26760.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.27  26763[21:MRR:26762.0,26762.1,26752.0,26750.0] ||  -> .
% 7.10/7.27  26764[21:Spt:26763.0,26756.0,26760.0] || node16(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.27  26765[21:Spt:26763.0,26756.1] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.10/7.27  26766[21:MRR:26751.0,26764.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  26769[21:MRR:26754.0,26764.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.27  26770[21:Res:26765.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  26771[21:Res:26765.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.27  26781[21:Res:26769.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  26783[21:MRR:26781.0,26766.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  26784[22:Spt:26783.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.10/7.27  26785[22:Res:26784.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.10/7.27  26786[22:Res:26784.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  26787[22:MRR:26786.0,26770.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  26788[22:MRR:26771.0,26787.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.27  26789[22:MRR:26785.0,26785.1,26788.0,26787.0] ||  -> .
% 7.10/7.27  26790[22:Spt:26789.0,26783.0,26784.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.10/7.27  26791[22:Spt:26789.0,26783.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  26794[22:Res:26791.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.10/7.27  26795[22:MRR:26794.0,142.0] ||  -> .
% 7.10/7.27  26796[18:Spt:26795.0,25398.0,25641.0] || node17(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.27  26797[18:Spt:26795.0,25398.1] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  26799[18:MRR:25468.0,26796.0] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.10/7.27  26801[18:MRR:25466.0,26796.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.27  26809[18:Res:26799.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  26810[18:Res:26799.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.27  26883[18:Res:26801.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  26885[18:MRR:26883.0,26797.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  26888[19:Spt:26885.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.10/7.27  26889[19:Res:26888.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.10/7.27  26890[19:Res:26888.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  26891[19:MRR:26890.0,26809.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  26892[19:MRR:26810.0,26891.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.27  26893[19:MRR:26889.0,26889.1,26892.0,26891.0] ||  -> .
% 7.10/7.27  26894[19:Spt:26893.0,26885.0,26888.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.10/7.27  26895[19:Spt:26893.0,26885.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  26898[19:Res:26895.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.10/7.27  26899[19:MRR:26898.0,142.0] ||  -> .
% 7.10/7.27  26900[16:Spt:26899.0,24461.0,24468.0] || node21(c_e_h_2,c_r,s3,s4)*+ -> .
% 7.10/7.27  26901[16:Spt:26899.0,24461.1] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s3)*.
% 7.10/7.27  26906[16:Res:26901.0,409.0] ||  -> node21(c_e_h_2,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_2,c_r,s2).
% 7.10/7.27  26941[16:Res:26906.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_r,s3) -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.10/7.27  26943[16:MRR:26941.0,26901.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.10/7.27  26944[17:Spt:26943.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2)*.
% 7.10/7.27  26947[17:Res:26944.0,96.0] ||  -> m_user_v_ack(c_e_h_2,c_u,s2)*.
% 7.10/7.27  26948[17:Res:26947.0,34.0] || m_and_h_gate_v_in2(c_e_h_2,c_d,s2)*+ -> .
% 7.10/7.27  26953[17:Res:2305.0,26948.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1) m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.10/7.27  26966[18:Spt:26953.1] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.10/7.27  26967[18:Res:26966.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.27  26972[18:Res:26967.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.27  26974[18:Res:26972.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  26976[18:MRR:26974.0,13.0] ||  -> .
% 7.10/7.27  26977[18:Spt:26976.0,26953.1,26966.0] || m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*+ -> .
% 7.10/7.27  26978[18:Spt:26976.0,26953.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1)*.
% 7.10/7.27  26981[18:Res:26978.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.27  26988[18:Res:26981.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.27  27089[18:Res:26988.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.27  27091[18:MRR:27089.0,26981.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.27  27092[18:Res:27091.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.27  27093[18:Res:27091.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.27  27094[19:Spt:27092.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.27  27097[19:Res:27094.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.10/7.27  27100[19:MRR:27097.0,26977.0] ||  -> .
% 7.10/7.27  27101[19:Spt:27100.0,27092.0,27094.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*+ -> .
% 7.10/7.27  27102[19:Spt:27100.0,27092.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.27  27104[19:MRR:27093.0,27101.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.27  27111[19:Res:27104.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  27112[19:MRR:27111.0,13.0] ||  -> .
% 7.10/7.27  27113[17:Spt:27112.0,26943.0,26944.0] || m_and_h_gate_v_out(c_e_h_2,c_r,s2)*+ -> .
% 7.10/7.27  27114[17:Spt:27112.0,26943.1] ||  -> node20(c_e_h_2,c_r,s2)*.
% 7.10/7.27  27118[17:Res:27114.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s2)*.
% 7.10/7.27  27120[17:Res:27118.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.10/7.27  27141[17:Res:27120.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.10/7.27  27242[17:Res:27141.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.27  27244[17:MRR:27242.0,27120.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.27  27246[17:Res:27244.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.27  27349[18:Spt:27244.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.27  27354[18:Res:27349.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.27  27434[18:Res:27354.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.27  27436[18:MRR:27434.0,27349.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.27  27440[18:Res:27436.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.27  27441[18:Res:27436.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.27  27442[19:Spt:27440.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.27  27447[19:Res:27442.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.27  27455[19:Res:27447.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  27457[19:MRR:27455.0,13.0] ||  -> .
% 7.10/7.27  27458[19:Spt:27457.0,27440.0,27442.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)* -> .
% 7.10/7.27  27459[19:Spt:27457.0,27440.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.27  27461[19:MRR:27441.0,27458.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.27  27465[19:Res:27461.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  27466[19:MRR:27465.0,13.0] ||  -> .
% 7.10/7.27  27467[18:Spt:27466.0,27244.0,27349.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)* -> .
% 7.10/7.27  27468[18:Spt:27466.0,27244.1] ||  -> node9(c_e_h_2,c_m,s1)*.
% 7.10/7.27  27469[18:MRR:27246.0,27467.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.27  27476[18:Res:27469.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  27477[18:MRR:27476.0,13.0] ||  -> .
% 7.10/7.27  27478[15:Spt:27477.0,24441.0,24448.0] || trans(s4,s3)*+ -> .
% 7.10/7.27  27479[15:Spt:27477.0,24441.1,24441.2] ||  -> trans(s4,s2) trans(s4,s0)*.
% 7.10/7.27  27480[15:MRR:24442.0,27478.0] ||  -> trans(s4,s2)* until2p29(s0).
% 7.10/7.27  27486[16:Spt:27479.0] ||  -> trans(s4,s2)*.
% 7.10/7.27  27493[16:Res:27486.0,141.0] ||  -> node19(u,v,s4,s2)*.
% 7.10/7.27  27494[16:Res:27486.0,18353.0] ||  -> until2p29(s2)*.
% 7.10/7.27  27495[16:MRR:924.0,27494.0] ||  -> xuntil2p30(s2)*.
% 7.10/7.27  27496[16:MRR:171.0,27495.0] ||  -> until2p29(s3)*.
% 7.10/7.27  27497[16:MRR:2026.0,27496.0] ||  -> xuntil2p30(s3)*.
% 7.10/7.27  27498[16:MRR:170.0,27497.0] ||  -> until2p29(s4)*.
% 7.10/7.27  27499[16:MRR:18347.0,27498.0] ||  -> node23(s4)*.
% 7.10/7.27  27500[16:MRR:181.0,27498.0] ||  -> node26(s4)*.
% 7.10/7.27  27501[16:MRR:18350.0,27498.0] ||  -> node21(c_e_h_2,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_2,c_r,s3).
% 7.10/7.27  27506[16:Res:27493.0,140.0] ||  -> node17(u,v,s4) node18(u,v,s4,s2)*.
% 7.10/7.27  27510[17:Spt:27501.0] ||  -> node21(c_e_h_2,c_r,s3,s4)*.
% 7.10/7.27  27511[17:Res:27510.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_r,s4)+ -> node20(c_e_h_2,c_r,s3)*.
% 7.10/7.27  27572[17:Res:218.1,27511.0] node23(s4) ||  -> node20(c_e_h_2,c_r,s3)*.
% 7.10/7.27  27573[17:SSi:27572.0,5.0,2015.0,18351.0,27498.0,27499.0,27500.0] ||  -> node20(c_e_h_2,c_r,s3)*.
% 7.10/7.27  27574[17:Res:27573.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s3)*.
% 7.10/7.27  27575[17:Res:27573.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s3)*.
% 7.10/7.27  27580[17:Res:27574.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s3)*.
% 7.10/7.27  27581[17:Res:27575.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s3)*.
% 7.10/7.27  27585[17:Res:27580.0,582.0] ||  -> node16(c_e_h_2,c_e,s2) node14(c_e_h_2,c_e,s2,s3)* m_c_h_element_v_out(c_e_h_2,c_e,s2).
% 7.10/7.27  27587[17:Res:27580.0,509.0] ||  -> node17(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.10/7.27  27595[17:Res:27581.0,390.0] ||  -> node10(c_e_h_2,c_m,s2,s3)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2).
% 7.10/7.27  27601[17:Res:27587.1,586.0] ||  -> node17(c_e_h_2,c_e,s2) node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.10/7.27  27603[17:Res:27587.1,511.0] ||  -> node17(c_e_h_2,c_e,s2) node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  27606[17:Res:27587.1,87.0] ||  -> node17(c_e_h_2,c_e,s2) m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.10/7.27  27615[18:Spt:27606.0] ||  -> node17(c_e_h_2,c_e,s2)*.
% 7.10/7.27  27616[18:Res:27615.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s2)*+ -> m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.27  27642[17:Res:27595.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s3) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) node9(c_e_h_2,c_m,s2)*.
% 7.10/7.27  27644[17:MRR:27642.0,27581.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) node9(c_e_h_2,c_m,s2)*.
% 7.10/7.27  27646[17:Res:27644.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s2)*.
% 7.10/7.27  27657[16:Res:27506.1,138.1] || m_c_h_element_v_out(u,v,s2)* -> node17(u,v,s4) m_c_h_element_v_out(u,v,s4).
% 7.10/7.27  27659[16:MRR:27657.2,22745.0] || m_c_h_element_v_out(u,v,s2)*+ -> node17(u,v,s4).
% 7.10/7.27  27759[19:Spt:27644.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.10/7.27  27764[19:Res:27759.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.10/7.27  27769[19:Res:27764.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.27  27771[19:MRR:27769.0,27759.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.27  27772[19:Res:27771.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.27  27773[19:Res:27771.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.27  27775[20:Spt:27772.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.27  27780[20:Res:27775.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.27  27794[20:Res:27780.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.27  27796[20:MRR:27794.0,27775.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.27  27797[20:Res:27796.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.27  27798[20:Res:27796.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.27  27799[21:Spt:27797.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.27  27804[21:Res:27799.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.27  27807[21:Res:27804.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  27809[21:MRR:27807.0,13.0] ||  -> .
% 7.10/7.27  27810[21:Spt:27809.0,27797.0,27799.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)* -> .
% 7.10/7.27  27811[21:Spt:27809.0,27797.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.27  27813[21:MRR:27798.0,27810.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.27  27817[21:Res:27813.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  27818[21:MRR:27817.0,13.0] ||  -> .
% 7.10/7.27  27819[20:Spt:27818.0,27772.0,27775.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*+ -> .
% 7.10/7.27  27820[20:Spt:27818.0,27772.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.27  27822[20:MRR:27773.0,27819.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.27  27828[20:Res:27822.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  27829[20:MRR:27828.0,13.0] ||  -> .
% 7.10/7.27  27830[19:Spt:27829.0,27644.0,27759.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*+ -> .
% 7.10/7.27  27831[19:Spt:27829.0,27644.1] ||  -> node9(c_e_h_2,c_m,s2)*.
% 7.10/7.27  28350[17:Res:27585.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s3) -> node16(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)* m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.27  28352[17:MRR:28350.0,27580.0] ||  -> node16(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)* m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.27  29531[20:Spt:28352.2] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s2)*.
% 7.10/7.27  29533[20:Res:29531.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s2)*.
% 7.10/7.27  29537[20:Res:29533.0,410.0] ||  -> node21(c_e_h_2,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_2,c_c,s1).
% 7.10/7.27  29565[20:Res:29537.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s2) -> m_and_h_gate_v_out(c_e_h_2,c_c,s1) node20(c_e_h_2,c_c,s1)*.
% 7.10/7.27  29567[20:MRR:29565.0,29533.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1) node20(c_e_h_2,c_c,s1)*.
% 7.10/7.27  29568[20:Res:29567.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)* m_and_h_gate_v_in1(c_e_h_2,c_c,s1).
% 7.10/7.27  29570[21:Spt:29568.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)*.
% 7.10/7.27  29572[21:Res:29570.0,412.0] ||  -> node21(c_e_h_2,c_c,s0,s1)*.
% 7.10/7.27  29579[21:Res:29572.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s1) -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.27  29581[21:MRR:29579.0,29570.0] ||  -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.27  29582[21:Res:29581.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s0)*.
% 7.10/7.27  29584[21:Res:29582.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s0)*.
% 7.10/7.27  29585[21:MRR:29584.0,121.0] ||  -> .
% 7.10/7.27  29586[21:Spt:29585.0,29568.0,29570.0] || m_and_h_gate_v_out(c_e_h_2,c_c,s1)*+ -> .
% 7.10/7.27  29587[21:Spt:29585.0,29568.1] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s1)*.
% 7.10/7.27  29591[21:Res:29587.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s1)*.
% 7.10/7.27  29596[21:Res:29591.0,375.0] ||  -> node12(c_e_h_2,c_a,s0,s1)*.
% 7.10/7.27  29605[21:Res:29596.0,123.1] || m_mutex_h_half_v_out(c_e_h_2,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_2,c_a,s0).
% 7.10/7.27  29607[21:MRR:29605.0,29591.0] ||  -> m_mutex_h_half_v_inp(c_e_h_2,c_a,s0)*.
% 7.10/7.27  29608[21:Res:29607.0,18.0] ||  -> m_user_v_req(c_e_h_2,c_u,s0)*.
% 7.10/7.27  29609[21:MRR:29608.0,106.0] ||  -> .
% 7.10/7.27  29610[20:Spt:29609.0,28352.2,29531.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s2)*+ -> .
% 7.10/7.27  29611[20:Spt:29609.0,28352.0,28352.1] ||  -> node16(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.10/7.27  29612[20:MRR:27616.1,29610.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s2)*+ -> .
% 7.10/7.27  29614[20:Res:29611.1,27659.0] ||  -> node16(c_e_h_2,c_e,s2) node17(c_e_h_2,c_e,s4)*.
% 7.10/7.27  29615[20:Res:29611.1,586.0] ||  -> node16(c_e_h_2,c_e,s2) node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.10/7.27  29617[20:Res:29611.1,511.0] ||  -> node16(c_e_h_2,c_e,s2) node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  29622[21:Spt:29614.0] ||  -> node16(c_e_h_2,c_e,s2)*.
% 7.10/7.27  29624[21:Res:29622.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s2)* m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.27  29625[21:MRR:29624.0,29624.1,29612.0,29610.0] ||  -> .
% 7.10/7.27  29626[21:Spt:29625.0,29614.0,29622.0] || node16(c_e_h_2,c_e,s2)*+ -> .
% 7.10/7.27  29627[21:Spt:29625.0,29614.1] ||  -> node17(c_e_h_2,c_e,s4)*.
% 7.10/7.27  29628[21:MRR:29611.0,29626.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.10/7.27  29631[21:MRR:29617.0,29626.0] ||  -> node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  29633[21:MRR:29615.0,29626.0] ||  -> node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.10/7.27  29647[21:Res:29631.1,595.0] ||  -> node17(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.27  29649[21:Res:29631.1,515.0] ||  -> node17(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.10/7.27  29653[22:Spt:29649.0] ||  -> node17(c_e_h_2,c_e,s1)*.
% 7.10/7.27  29654[22:Res:29653.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.27  29844[21:Res:29633.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s2) -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.27  29846[21:MRR:29844.0,29628.0] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.27  29848[23:Spt:29846.2] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s1)*.
% 7.10/7.27  29850[23:Res:29848.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)*.
% 7.10/7.27  29853[23:Res:29850.0,412.0] ||  -> node21(c_e_h_2,c_c,s0,s1)*.
% 7.10/7.27  29866[23:Res:29853.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s1) -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.27  29868[23:MRR:29866.0,29850.0] ||  -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.27  29869[23:Res:29868.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s0)*.
% 7.10/7.27  29875[23:Res:29869.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s0)*.
% 7.10/7.27  29876[23:MRR:29875.0,121.0] ||  -> .
% 7.10/7.27  29877[23:Spt:29876.0,29846.2,29848.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.27  29878[23:Spt:29876.0,29846.0,29846.1] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  29879[23:MRR:29654.1,29877.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.27  29881[23:Res:29878.1,595.0] ||  -> node16(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.27  29883[23:Res:29878.1,515.0] ||  -> node16(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.10/7.27  29887[24:Spt:29883.0] ||  -> node16(c_e_h_2,c_e,s1)*.
% 7.10/7.27  29889[24:Res:29887.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.27  29890[24:MRR:29889.0,29889.1,29879.0,29877.0] ||  -> .
% 7.10/7.27  29891[24:Spt:29890.0,29883.0,29887.0] || node16(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.27  29892[24:Spt:29890.0,29883.1] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.10/7.27  29893[24:MRR:29878.0,29891.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  29896[24:MRR:29881.0,29891.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.27  29897[24:Res:29892.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  29898[24:Res:29892.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.27  29907[24:Res:29896.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  29909[24:MRR:29907.0,29893.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  29914[25:Spt:29909.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.10/7.27  29915[25:Res:29914.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.10/7.27  29916[25:Res:29914.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  29917[25:MRR:29916.0,29897.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  29918[25:MRR:29898.0,29917.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.27  29919[25:MRR:29915.0,29915.1,29918.0,29917.0] ||  -> .
% 7.10/7.27  29920[25:Spt:29919.0,29909.0,29914.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.10/7.27  29921[25:Spt:29919.0,29909.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  29924[25:Res:29921.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.10/7.27  29925[25:MRR:29924.0,142.0] ||  -> .
% 7.10/7.27  29926[22:Spt:29925.0,29649.0,29653.0] || node17(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.27  29927[22:Spt:29925.0,29649.1] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.10/7.27  29928[22:MRR:29631.0,29926.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  29931[22:MRR:29647.0,29926.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.27  29932[22:Res:29927.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  29933[22:Res:29927.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.27  29942[22:Res:29931.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  29944[22:MRR:29942.0,29928.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  29948[23:Spt:29944.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.10/7.27  29949[23:Res:29948.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.10/7.27  29950[23:Res:29948.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  29951[23:MRR:29950.0,29932.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  29952[23:MRR:29933.0,29951.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.27  29953[23:MRR:29949.0,29949.1,29952.0,29951.0] ||  -> .
% 7.10/7.27  29954[23:Spt:29953.0,29944.0,29948.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.10/7.27  29955[23:Spt:29953.0,29944.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  29958[23:Res:29955.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.10/7.27  29959[23:MRR:29958.0,142.0] ||  -> .
% 7.10/7.27  29960[18:Spt:29959.0,27606.0,27615.0] || node17(c_e_h_2,c_e,s2)*+ -> .
% 7.10/7.27  29961[18:Spt:29959.0,27606.1] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.10/7.27  29962[18:MRR:27587.0,29960.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.10/7.27  29964[18:MRR:27603.0,29960.0] ||  -> node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  29965[18:MRR:27601.0,29960.0] ||  -> node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.10/7.27  29978[19:Spt:27646.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.10/7.27  29984[19:Res:29978.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.10/7.27  30005[18:Res:29964.1,595.0] ||  -> node17(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.27  30007[18:Res:29964.1,515.0] ||  -> node17(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.10/7.27  30088[19:Res:29984.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.27  30090[19:MRR:30088.0,29978.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.27  30092[19:Res:30090.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.27  30224[20:Spt:30090.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.27  30229[20:Res:30224.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.27  30294[20:Res:30229.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.27  30296[20:MRR:30294.0,30224.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.27  30297[20:Res:30296.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.27  30298[20:Res:30296.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.27  30299[21:Spt:30297.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.27  30304[21:Res:30299.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.27  30307[21:Res:30304.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  30309[21:MRR:30307.0,13.0] ||  -> .
% 7.10/7.27  30310[21:Spt:30309.0,30297.0,30299.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*+ -> .
% 7.10/7.27  30311[21:Spt:30309.0,30297.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.27  30313[21:MRR:30298.0,30310.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.27  30320[21:Res:30313.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  30321[21:MRR:30320.0,13.0] ||  -> .
% 7.10/7.27  30322[20:Spt:30321.0,30090.0,30224.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)* -> .
% 7.10/7.27  30323[20:Spt:30321.0,30090.1] ||  -> node9(c_e_h_2,c_m,s1)*.
% 7.10/7.27  30324[20:MRR:30092.0,30322.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.27  30331[20:Res:30324.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  30332[20:MRR:30331.0,13.0] ||  -> .
% 7.10/7.27  30333[19:Spt:30332.0,27646.0,29978.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*+ -> .
% 7.10/7.27  30334[19:Spt:30332.0,27646.1] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s2)*.
% 7.10/7.27  30342[20:Spt:29964.0] ||  -> node17(c_e_h_2,c_e,s1)*.
% 7.10/7.27  30343[20:Res:30342.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.27  30962[18:Res:29965.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s2) -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.27  30964[18:MRR:30962.0,29962.0] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.27  30965[21:Spt:30964.2] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s1)*.
% 7.10/7.27  30967[21:Res:30965.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)*.
% 7.10/7.27  30970[21:Res:30967.0,412.0] ||  -> node21(c_e_h_2,c_c,s0,s1)*.
% 7.10/7.27  31000[21:Res:30970.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s1) -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.27  31002[21:MRR:31000.0,30967.0] ||  -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.27  31003[21:Res:31002.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s0)*.
% 7.10/7.27  31005[21:Res:31003.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s0)*.
% 7.10/7.27  31006[21:MRR:31005.0,121.0] ||  -> .
% 7.10/7.27  31007[21:Spt:31006.0,30964.2,30965.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.27  31008[21:Spt:31006.0,30964.0,30964.1] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  31009[21:MRR:30343.1,31007.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.27  31011[21:Res:31008.1,595.0] ||  -> node16(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.27  31013[21:Res:31008.1,515.0] ||  -> node16(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.10/7.27  31017[22:Spt:31013.0] ||  -> node16(c_e_h_2,c_e,s1)*.
% 7.10/7.27  31019[22:Res:31017.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.27  31020[22:MRR:31019.0,31019.1,31009.0,31007.0] ||  -> .
% 7.10/7.27  31021[22:Spt:31020.0,31013.0,31017.0] || node16(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.27  31022[22:Spt:31020.0,31013.1] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.10/7.27  31023[22:MRR:31008.0,31021.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  31026[22:MRR:31011.0,31021.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.27  31027[22:Res:31022.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  31028[22:Res:31022.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.27  31037[22:Res:31026.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  31039[22:MRR:31037.0,31023.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  31040[23:Spt:31039.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.10/7.27  31041[23:Res:31040.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.10/7.27  31042[23:Res:31040.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  31043[23:MRR:31042.0,31027.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  31044[23:MRR:31028.0,31043.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.27  31045[23:MRR:31041.0,31041.1,31044.0,31043.0] ||  -> .
% 7.10/7.27  31046[23:Spt:31045.0,31039.0,31040.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.10/7.27  31047[23:Spt:31045.0,31039.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  31050[23:Res:31047.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.10/7.27  31051[23:MRR:31050.0,142.0] ||  -> .
% 7.10/7.27  31052[20:Spt:31051.0,29964.0,30342.0] || node17(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.27  31053[20:Spt:31051.0,29964.1] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  31055[20:MRR:30007.0,31052.0] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.10/7.27  31057[20:MRR:30005.0,31052.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.27  31065[20:Res:31055.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  31066[20:Res:31055.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.27  31085[20:Res:31057.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  31087[20:MRR:31085.0,31053.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  31088[21:Spt:31087.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.10/7.27  31089[21:Res:31088.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.10/7.27  31090[21:Res:31088.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  31091[21:MRR:31090.0,31065.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  31092[21:MRR:31066.0,31091.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.27  31093[21:MRR:31089.0,31089.1,31092.0,31091.0] ||  -> .
% 7.10/7.27  31094[21:Spt:31093.0,31087.0,31088.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.10/7.27  31095[21:Spt:31093.0,31087.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  31098[21:Res:31095.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.10/7.27  31099[21:MRR:31098.0,142.0] ||  -> .
% 7.10/7.27  31100[17:Spt:31099.0,27501.0,27510.0] || node21(c_e_h_2,c_r,s3,s4)*+ -> .
% 7.10/7.27  31101[17:Spt:31099.0,27501.1] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s3)*.
% 7.10/7.27  31105[17:Res:31101.0,409.0] ||  -> node21(c_e_h_2,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_2,c_r,s2).
% 7.10/7.27  31731[18:Spt:31105.1] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2)*.
% 7.10/7.27  31735[18:Res:31731.0,96.0] ||  -> m_user_v_ack(c_e_h_2,c_u,s2)*.
% 7.10/7.27  31736[18:Res:31735.0,34.0] || m_and_h_gate_v_in2(c_e_h_2,c_d,s2)*+ -> .
% 7.10/7.27  31738[18:Res:2305.0,31736.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1) m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.10/7.27  31742[19:Spt:31738.1] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.10/7.27  31743[19:Res:31742.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.27  31748[19:Res:31743.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.27  31750[19:Res:31748.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  31752[19:MRR:31750.0,13.0] ||  -> .
% 7.10/7.27  31753[19:Spt:31752.0,31738.1,31742.0] || m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*+ -> .
% 7.10/7.27  31754[19:Spt:31752.0,31738.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1)*.
% 7.10/7.27  31757[19:Res:31754.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.27  31764[19:Res:31757.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.27  31799[19:Res:31764.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.27  31801[19:MRR:31799.0,31757.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.27  31802[19:Res:31801.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.27  31803[19:Res:31801.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.27  31805[20:Spt:31802.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.27  31808[20:Res:31805.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.10/7.27  31811[20:MRR:31808.0,31753.0] ||  -> .
% 7.10/7.27  31812[20:Spt:31811.0,31802.0,31805.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)* -> .
% 7.10/7.27  31813[20:Spt:31811.0,31802.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.27  31815[20:MRR:31803.0,31812.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.27  31819[20:Res:31815.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  31820[20:MRR:31819.0,13.0] ||  -> .
% 7.10/7.27  31821[18:Spt:31820.0,31105.1,31731.0] || m_and_h_gate_v_out(c_e_h_2,c_r,s2)*+ -> .
% 7.10/7.27  31822[18:Spt:31820.0,31105.0] ||  -> node21(c_e_h_2,c_r,s2,s3)*.
% 7.10/7.27  31825[18:Res:31822.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_r,s3) -> node20(c_e_h_2,c_r,s2)*.
% 7.10/7.27  31827[18:MRR:31825.0,31101.0] ||  -> node20(c_e_h_2,c_r,s2)*.
% 7.10/7.27  31829[18:Res:31827.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s2)*.
% 7.10/7.27  31840[18:Res:31829.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.10/7.27  31859[18:Res:31840.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.10/7.27  31907[18:Res:31859.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.27  31909[18:MRR:31907.0,31840.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.27  31910[18:Res:31909.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.27  31911[18:Res:31909.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.27  31930[19:Spt:31910.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.27  31935[19:Res:31930.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.27  31982[19:Res:31935.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.27  31984[19:MRR:31982.0,31930.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.27  31992[19:Res:31984.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.27  31993[19:Res:31984.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.27  31994[20:Spt:31992.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.27  31999[20:Res:31994.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.27  32005[20:Res:31999.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  32007[20:MRR:32005.0,13.0] ||  -> .
% 7.10/7.27  32008[20:Spt:32007.0,31992.0,31994.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)* -> .
% 7.10/7.27  32009[20:Spt:32007.0,31992.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.27  32011[20:MRR:31993.0,32008.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.27  32015[20:Res:32011.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  32016[20:MRR:32015.0,13.0] ||  -> .
% 7.10/7.27  32017[19:Spt:32016.0,31910.0,31930.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*+ -> .
% 7.10/7.27  32018[19:Spt:32016.0,31910.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.27  32020[19:MRR:31911.0,32017.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.27  32026[19:Res:32020.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  32027[19:MRR:32026.0,13.0] ||  -> .
% 7.10/7.27  32028[16:Spt:32027.0,27479.0,27486.0] || trans(s4,s2)*+ -> .
% 7.10/7.27  32029[16:Spt:32027.0,27479.1] ||  -> trans(s4,s0)*.
% 7.10/7.27  32030[16:MRR:27480.0,32028.0] ||  -> until2p29(s0)*.
% 7.10/7.27  32031[16:MRR:237.0,32030.0] ||  -> xuntil2p30(s0)*.
% 7.10/7.27  32032[16:MRR:173.0,32031.0] ||  -> until2p29(s1)*.
% 7.10/7.27  32033[16:MRR:498.0,32032.0] ||  -> xuntil2p30(s1)*.
% 7.10/7.27  32034[16:MRR:172.0,32033.0] ||  -> until2p29(s2)*.
% 7.10/7.27  32035[16:MRR:924.0,32034.0] ||  -> xuntil2p30(s2)*.
% 7.10/7.27  32036[16:MRR:171.0,32035.0] ||  -> until2p29(s3)*.
% 7.10/7.27  32037[16:MRR:2026.0,32036.0] ||  -> xuntil2p30(s3)*.
% 7.10/7.27  32038[16:MRR:170.0,32037.0] ||  -> until2p29(s4)*.
% 7.10/7.27  32039[16:MRR:181.0,32038.0] ||  -> node26(s4)*.
% 7.10/7.27  32040[16:MRR:18347.0,32038.0] ||  -> node23(s4)*.
% 7.10/7.27  32041[16:MRR:18350.0,32038.0] ||  -> node21(c_e_h_2,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_2,c_r,s3).
% 7.10/7.27  32059[17:Spt:32041.0] ||  -> node21(c_e_h_2,c_r,s3,s4)*.
% 7.10/7.27  32060[17:Res:32059.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_r,s4)+ -> node20(c_e_h_2,c_r,s3)*.
% 7.10/7.27  32067[17:Res:218.1,32060.0] node23(s4) ||  -> node20(c_e_h_2,c_r,s3)*.
% 7.10/7.27  32068[17:SSi:32067.0,5.0,2015.0,18351.0,32038.0,32039.0,32040.0] ||  -> node20(c_e_h_2,c_r,s3)*.
% 7.10/7.27  32072[17:Res:32068.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s3)*.
% 7.10/7.27  32073[17:Res:32068.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s3)*.
% 7.10/7.27  32076[17:Res:32072.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s3)*.
% 7.10/7.27  32077[17:Res:32073.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s3)*.
% 7.10/7.27  32083[17:Res:32076.0,582.0] ||  -> node16(c_e_h_2,c_e,s2) node14(c_e_h_2,c_e,s2,s3)* m_c_h_element_v_out(c_e_h_2,c_e,s2).
% 7.10/7.27  32085[17:Res:32076.0,509.0] ||  -> node17(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.10/7.27  32093[17:Res:32077.0,390.0] ||  -> node10(c_e_h_2,c_m,s2,s3)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2).
% 7.10/7.27  32102[17:Res:32085.1,586.0] ||  -> node17(c_e_h_2,c_e,s2) node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.10/7.27  32104[17:Res:32085.1,511.0] ||  -> node17(c_e_h_2,c_e,s2) node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  32107[17:Res:32085.1,87.0] ||  -> node17(c_e_h_2,c_e,s2) m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.10/7.27  32119[18:Spt:32107.0] ||  -> node17(c_e_h_2,c_e,s2)*.
% 7.10/7.27  32120[18:Res:32119.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s2)*+ -> m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.27  32202[17:Res:32093.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s3) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) node9(c_e_h_2,c_m,s2)*.
% 7.10/7.27  32204[17:MRR:32202.0,32077.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) node9(c_e_h_2,c_m,s2)*.
% 7.10/7.27  32205[17:Res:32204.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s2)*.
% 7.10/7.27  32206[17:Res:32204.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s2)*.
% 7.10/7.27  32207[19:Spt:32205.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.10/7.27  32212[19:Res:32207.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.10/7.27  32263[19:Res:32212.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.27  32265[19:MRR:32263.0,32207.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.27  32266[19:Res:32265.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.27  32267[19:Res:32265.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.27  32268[20:Spt:32266.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.27  32273[20:Res:32268.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.27  32314[20:Res:32273.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.27  32316[20:MRR:32314.0,32268.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.27  32317[20:Res:32316.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.27  32318[20:Res:32316.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.27  32319[21:Spt:32317.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.27  32325[21:Res:32319.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.27  32328[21:Res:32325.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  32330[21:MRR:32328.0,13.0] ||  -> .
% 7.10/7.27  32331[21:Spt:32330.0,32317.0,32319.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)* -> .
% 7.10/7.27  32332[21:Spt:32330.0,32317.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.27  32334[21:MRR:32318.0,32331.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.27  32338[21:Res:32334.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  32339[21:MRR:32338.0,13.0] ||  -> .
% 7.10/7.27  32340[20:Spt:32339.0,32266.0,32268.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*+ -> .
% 7.10/7.27  32341[20:Spt:32339.0,32266.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.27  32343[20:MRR:32267.0,32340.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.27  32349[20:Res:32343.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.27  32350[20:MRR:32349.0,13.0] ||  -> .
% 7.10/7.27  32351[19:Spt:32350.0,32205.0,32207.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*+ -> .
% 7.10/7.27  32352[19:Spt:32350.0,32205.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s2)*.
% 7.10/7.27  32498[17:Res:32083.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s3) -> node16(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)* m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.27  32500[17:MRR:32498.0,32076.0] ||  -> node16(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)* m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.27  32501[20:Spt:32500.2] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s2)*.
% 7.10/7.27  32503[20:Res:32501.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s2)*.
% 7.10/7.27  32506[20:Res:32503.0,410.0] ||  -> node21(c_e_h_2,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_2,c_c,s1).
% 7.10/7.27  32524[20:Res:32506.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s2) -> m_and_h_gate_v_out(c_e_h_2,c_c,s1) node20(c_e_h_2,c_c,s1)*.
% 7.10/7.27  32526[20:MRR:32524.0,32503.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1) node20(c_e_h_2,c_c,s1)*.
% 7.10/7.27  32527[20:Res:32526.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)* m_and_h_gate_v_in1(c_e_h_2,c_c,s1).
% 7.10/7.27  32529[21:Spt:32527.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)*.
% 7.10/7.27  32531[21:Res:32529.0,412.0] ||  -> node21(c_e_h_2,c_c,s0,s1)*.
% 7.10/7.27  32539[21:Res:32531.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s1) -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.27  32541[21:MRR:32539.0,32529.0] ||  -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.27  32542[21:Res:32541.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s0)*.
% 7.10/7.27  32544[21:Res:32542.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s0)*.
% 7.10/7.27  32545[21:MRR:32544.0,121.0] ||  -> .
% 7.10/7.27  32546[21:Spt:32545.0,32527.0,32529.0] || m_and_h_gate_v_out(c_e_h_2,c_c,s1)*+ -> .
% 7.10/7.27  32547[21:Spt:32545.0,32527.1] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s1)*.
% 7.10/7.27  32551[21:Res:32547.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s1)*.
% 7.10/7.27  32556[21:Res:32551.0,375.0] ||  -> node12(c_e_h_2,c_a,s0,s1)*.
% 7.10/7.27  32565[21:Res:32556.0,123.1] || m_mutex_h_half_v_out(c_e_h_2,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_2,c_a,s0).
% 7.10/7.27  32567[21:MRR:32565.0,32551.0] ||  -> m_mutex_h_half_v_inp(c_e_h_2,c_a,s0)*.
% 7.10/7.27  32568[21:Res:32567.0,18.0] ||  -> m_user_v_req(c_e_h_2,c_u,s0)*.
% 7.10/7.27  32569[21:MRR:32568.0,106.0] ||  -> .
% 7.10/7.27  32570[20:Spt:32569.0,32500.2,32501.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s2)*+ -> .
% 7.10/7.27  32571[20:Spt:32569.0,32500.0,32500.1] ||  -> node16(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.10/7.27  32572[20:MRR:32120.1,32570.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s2)*+ -> .
% 7.10/7.27  32573[20:Res:32571.1,586.0] ||  -> node16(c_e_h_2,c_e,s2) node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.10/7.27  32575[20:Res:32571.1,511.0] ||  -> node16(c_e_h_2,c_e,s2) node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  32578[20:Res:32571.1,87.0] ||  -> node16(c_e_h_2,c_e,s2) m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.10/7.27  32580[21:Spt:32578.0] ||  -> node16(c_e_h_2,c_e,s2)*.
% 7.10/7.27  32582[21:Res:32580.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s2)* m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.27  32583[21:MRR:32582.0,32582.1,32572.0,32570.0] ||  -> .
% 7.10/7.27  32584[21:Spt:32583.0,32578.0,32580.0] || node16(c_e_h_2,c_e,s2)*+ -> .
% 7.10/7.27  32585[21:Spt:32583.0,32578.1] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.10/7.27  32586[21:MRR:32571.0,32584.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.10/7.27  32588[21:MRR:32575.0,32584.0] ||  -> node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  32589[21:MRR:32573.0,32584.0] ||  -> node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.10/7.27  32602[21:Res:32588.1,595.0] ||  -> node17(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.27  32604[21:Res:32588.1,515.0] ||  -> node17(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.10/7.27  32608[22:Spt:32604.0] ||  -> node17(c_e_h_2,c_e,s1)*.
% 7.10/7.27  32609[22:Res:32608.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.27  32748[21:Res:32589.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s2) -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.27  32750[21:MRR:32748.0,32586.0] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.27  32751[23:Spt:32750.2] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s1)*.
% 7.10/7.27  32753[23:Res:32751.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)*.
% 7.10/7.27  32763[23:Res:32753.0,412.0] ||  -> node21(c_e_h_2,c_c,s0,s1)*.
% 7.10/7.27  32777[23:Res:32763.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s1) -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.27  32779[23:MRR:32777.0,32753.0] ||  -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.27  32780[23:Res:32779.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s0)*.
% 7.10/7.27  32782[23:Res:32780.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s0)*.
% 7.10/7.27  32783[23:MRR:32782.0,121.0] ||  -> .
% 7.10/7.27  32784[23:Spt:32783.0,32750.2,32751.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.27  32785[23:Spt:32783.0,32750.0,32750.1] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  32786[23:MRR:32609.1,32784.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.27  32788[23:Res:32785.1,595.0] ||  -> node16(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.27  32790[23:Res:32785.1,515.0] ||  -> node16(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.10/7.27  32801[24:Spt:32790.0] ||  -> node16(c_e_h_2,c_e,s1)*.
% 7.10/7.27  32803[24:Res:32801.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.27  32804[24:MRR:32803.0,32803.1,32786.0,32784.0] ||  -> .
% 7.10/7.27  32805[24:Spt:32804.0,32790.0,32801.0] || node16(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.27  32806[24:Spt:32804.0,32790.1] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.10/7.27  32807[24:MRR:32785.0,32805.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  32810[24:MRR:32788.0,32805.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.27  32811[24:Res:32806.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  32812[24:Res:32806.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.27  32821[24:Res:32810.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  32823[24:MRR:32821.0,32807.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  32824[25:Spt:32823.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.10/7.27  32825[25:Res:32824.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.10/7.27  32826[25:Res:32824.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  32827[25:MRR:32826.0,32811.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  32828[25:MRR:32812.0,32827.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.27  32829[25:MRR:32825.0,32825.1,32828.0,32827.0] ||  -> .
% 7.10/7.27  32830[25:Spt:32829.0,32823.0,32824.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.10/7.27  32831[25:Spt:32829.0,32823.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  32834[25:Res:32831.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.10/7.27  32835[25:MRR:32834.0,142.0] ||  -> .
% 7.10/7.27  32836[22:Spt:32835.0,32604.0,32608.0] || node17(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.27  32837[22:Spt:32835.0,32604.1] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.10/7.27  32838[22:MRR:32588.0,32836.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  32841[22:MRR:32602.0,32836.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.27  32842[22:Res:32837.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  32843[22:Res:32837.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.27  32855[22:Res:32841.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  32857[22:MRR:32855.0,32838.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  32858[23:Spt:32857.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.10/7.27  32859[23:Res:32858.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.10/7.27  32860[23:Res:32858.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.27  32861[23:MRR:32860.0,32842.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  32862[23:MRR:32843.0,32861.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.27  32863[23:MRR:32859.0,32859.1,32862.0,32861.0] ||  -> .
% 7.10/7.27  32864[23:Spt:32863.0,32857.0,32858.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.10/7.27  32865[23:Spt:32863.0,32857.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.27  32868[23:Res:32865.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.10/7.27  32869[23:MRR:32868.0,142.0] ||  -> .
% 7.10/7.27  32870[18:Spt:32869.0,32107.0,32119.0] || node17(c_e_h_2,c_e,s2)*+ -> .
% 7.10/7.27  32871[18:Spt:32869.0,32107.1] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.10/7.27  32872[18:MRR:32085.0,32870.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.10/7.27  32874[18:MRR:32104.0,32870.0] ||  -> node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.27  32875[18:MRR:32102.0,32870.0] ||  -> node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.10/7.27  32962[18:Res:32874.1,595.0] ||  -> node17(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.27  32964[18:Res:32874.1,515.0] ||  -> node17(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.10/7.27  33538[19:Spt:32874.0] ||  -> node17(c_e_h_2,c_e,s1)*.
% 7.10/7.27  33539[19:Res:33538.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.27  33550[20:Spt:32206.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.10/7.27  33555[20:Res:33550.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.10/7.27  33570[20:Res:33555.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.27  33572[20:MRR:33570.0,33550.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.27  33573[20:Res:33572.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.28  33574[20:Res:33572.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.28  33575[21:Spt:33573.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.28  33580[21:Res:33575.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.28  33593[21:Res:33580.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  33595[21:MRR:33593.0,33575.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  33596[21:Res:33595.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.28  33597[21:Res:33595.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.28  33598[22:Spt:33596.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  33604[22:Res:33598.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  33607[22:Res:33604.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  33609[22:MRR:33607.0,13.0] ||  -> .
% 7.10/7.28  33610[22:Spt:33609.0,33596.0,33598.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)* -> .
% 7.10/7.28  33611[22:Spt:33609.0,33596.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.28  33613[22:MRR:33597.0,33610.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.28  33617[22:Res:33613.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  33618[22:MRR:33617.0,13.0] ||  -> .
% 7.10/7.28  33619[21:Spt:33618.0,33573.0,33575.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*+ -> .
% 7.10/7.28  33620[21:Spt:33618.0,33573.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.28  33622[21:MRR:33574.0,33619.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.28  33628[21:Res:33622.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  33629[21:MRR:33628.0,13.0] ||  -> .
% 7.10/7.28  33630[20:Spt:33629.0,32206.0,33550.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*+ -> .
% 7.10/7.28  33631[20:Spt:33629.0,32206.1] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s2)*.
% 7.10/7.28  33801[18:Res:32875.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s2) -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.28  33803[18:MRR:33801.0,32872.0] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.28  33804[21:Spt:33803.2] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s1)*.
% 7.10/7.28  33806[21:Res:33804.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)*.
% 7.10/7.28  33809[21:Res:33806.0,412.0] ||  -> node21(c_e_h_2,c_c,s0,s1)*.
% 7.10/7.28  33821[21:Res:33809.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s1) -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.28  33823[21:MRR:33821.0,33806.0] ||  -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.28  33827[21:Res:33823.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s0)*.
% 7.10/7.28  33829[21:Res:33827.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s0)*.
% 7.10/7.28  33830[21:MRR:33829.0,121.0] ||  -> .
% 7.10/7.28  33831[21:Spt:33830.0,33803.2,33804.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.28  33832[21:Spt:33830.0,33803.0,33803.1] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.28  33833[21:MRR:33539.1,33831.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.28  33835[21:Res:33832.1,595.0] ||  -> node16(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.28  33837[21:Res:33832.1,515.0] ||  -> node16(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.10/7.28  33844[22:Spt:33837.0] ||  -> node16(c_e_h_2,c_e,s1)*.
% 7.10/7.28  33846[22:Res:33844.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.28  33847[22:MRR:33846.0,33846.1,33833.0,33831.0] ||  -> .
% 7.10/7.28  33848[22:Spt:33847.0,33837.0,33844.0] || node16(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.28  33849[22:Spt:33847.0,33837.1] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.10/7.28  33850[22:MRR:33832.0,33848.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.28  33853[22:MRR:33835.0,33848.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.28  33854[22:Res:33849.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.28  33855[22:Res:33849.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.28  33867[22:Res:33853.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.28  33869[22:MRR:33867.0,33850.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.28  33870[23:Spt:33869.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.10/7.28  33871[23:Res:33870.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.10/7.28  33872[23:Res:33870.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.28  33873[23:MRR:33872.0,33854.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.28  33874[23:MRR:33855.0,33873.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.28  33875[23:MRR:33871.0,33871.1,33874.0,33873.0] ||  -> .
% 7.10/7.28  33876[23:Spt:33875.0,33869.0,33870.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.10/7.28  33877[23:Spt:33875.0,33869.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.28  33880[23:Res:33877.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.10/7.28  33881[23:MRR:33880.0,142.0] ||  -> .
% 7.10/7.28  33882[19:Spt:33881.0,32874.0,33538.0] || node17(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.28  33883[19:Spt:33881.0,32874.1] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.28  33884[19:MRR:32964.0,33882.0] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.10/7.28  33887[19:MRR:32962.0,33882.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.28  33894[19:Res:33884.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.28  33895[19:Res:33884.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.28  33984[19:Res:33887.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.28  33986[19:MRR:33984.0,33883.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.28  33987[20:Spt:33986.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.10/7.28  33988[20:Res:33987.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.10/7.28  33989[20:Res:33987.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.28  33990[20:MRR:33989.0,33894.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.28  33991[20:MRR:33895.0,33990.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.28  33992[20:MRR:33988.0,33988.1,33991.0,33990.0] ||  -> .
% 7.10/7.28  33993[20:Spt:33992.0,33986.0,33987.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.10/7.28  33994[20:Spt:33992.0,33986.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.28  33997[20:Res:33994.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.10/7.28  33998[20:MRR:33997.0,142.0] ||  -> .
% 7.10/7.28  33999[17:Spt:33998.0,32041.0,32059.0] || node21(c_e_h_2,c_r,s3,s4)*+ -> .
% 7.10/7.28  34000[17:Spt:33998.0,32041.1] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s3)*.
% 7.10/7.28  34005[17:Res:34000.0,409.0] ||  -> node21(c_e_h_2,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_2,c_r,s2).
% 7.10/7.28  34056[17:Res:34005.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_r,s3) -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.10/7.28  34058[17:MRR:34056.0,34000.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.10/7.28  34059[18:Spt:34058.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2)*.
% 7.10/7.28  34062[18:Res:34059.0,96.0] ||  -> m_user_v_ack(c_e_h_2,c_u,s2)*.
% 7.10/7.28  34063[18:Res:34062.0,34.0] || m_and_h_gate_v_in2(c_e_h_2,c_d,s2)*+ -> .
% 7.10/7.28  34065[18:Res:2305.0,34063.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1) m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.10/7.28  34069[19:Spt:34065.1] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.10/7.28  34070[19:Res:34069.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  34076[19:Res:34070.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  34081[19:Res:34076.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  34083[19:MRR:34081.0,13.0] ||  -> .
% 7.10/7.28  34084[19:Spt:34083.0,34065.1,34069.0] || m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*+ -> .
% 7.10/7.28  34085[19:Spt:34083.0,34065.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1)*.
% 7.10/7.28  34088[19:Res:34085.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.28  34095[19:Res:34088.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.28  34199[19:Res:34095.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  34201[19:MRR:34199.0,34088.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  34223[19:Res:34201.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.28  34224[19:Res:34201.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.28  34228[20:Spt:34223.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  34231[20:Res:34228.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.10/7.28  34235[20:MRR:34231.0,34084.0] ||  -> .
% 7.10/7.28  34236[20:Spt:34235.0,34223.0,34228.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)* -> .
% 7.10/7.28  34237[20:Spt:34235.0,34223.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.28  34239[20:MRR:34224.0,34236.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.28  34243[20:Res:34239.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  34244[20:MRR:34243.0,13.0] ||  -> .
% 7.10/7.28  34245[18:Spt:34244.0,34058.0,34059.0] || m_and_h_gate_v_out(c_e_h_2,c_r,s2)*+ -> .
% 7.10/7.28  34246[18:Spt:34244.0,34058.1] ||  -> node20(c_e_h_2,c_r,s2)*.
% 7.10/7.28  34250[18:Res:34246.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s2)*.
% 7.10/7.28  34261[18:Res:34250.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.10/7.28  34277[18:Res:34261.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.10/7.28  34373[18:Res:34277.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.28  34375[18:MRR:34373.0,34261.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.28  34394[18:Res:34375.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.28  34479[19:Spt:34375.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.28  34484[19:Res:34479.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.28  34573[19:Res:34484.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  34575[19:MRR:34573.0,34479.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  34579[19:Res:34575.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.28  34580[19:Res:34575.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.28  34581[20:Spt:34579.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  34587[20:Res:34581.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  34593[20:Res:34587.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  34595[20:MRR:34593.0,13.0] ||  -> .
% 7.10/7.28  34596[20:Spt:34595.0,34579.0,34581.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)* -> .
% 7.10/7.28  34597[20:Spt:34595.0,34579.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.28  34599[20:MRR:34580.0,34596.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.28  34603[20:Res:34599.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  34604[20:MRR:34603.0,13.0] ||  -> .
% 7.10/7.28  34605[19:Spt:34604.0,34375.0,34479.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)* -> .
% 7.10/7.28  34606[19:Spt:34604.0,34375.1] ||  -> node9(c_e_h_2,c_m,s1)*.
% 7.10/7.28  34607[19:MRR:34394.0,34605.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.28  34614[19:Res:34607.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  34615[19:MRR:34614.0,13.0] ||  -> .
% 7.10/7.28  34616[13:Spt:34615.0,22588.0,22588.1,22588.2] ||  -> trans(s4,s4) trans(s4,s3) trans(s4,s2)*.
% 7.10/7.28  34624[13:Res:34616.2,18353.0] ||  -> trans(s4,s4) trans(s4,s3)* until2p29(s2).
% 7.10/7.28  34625[14:Spt:34624.2] ||  -> until2p29(s2)*.
% 7.10/7.28  34626[14:MRR:924.0,34625.0] ||  -> xuntil2p30(s2)*.
% 7.10/7.28  34627[14:MRR:171.0,34626.0] ||  -> until2p29(s3)*.
% 7.10/7.28  34628[14:MRR:2026.0,34627.0] ||  -> xuntil2p30(s3)*.
% 7.10/7.28  34629[14:MRR:170.0,34628.0] ||  -> until2p29(s4)*.
% 7.10/7.28  34630[14:MRR:181.0,34629.0] ||  -> node26(s4)*.
% 7.10/7.28  34631[14:MRR:18347.0,34629.0] ||  -> node23(s4)*.
% 7.10/7.28  34635[14:MRR:524.0,34631.0] ||  -> node21(c_e_h_1,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_1,c_r,s3).
% 7.10/7.28  34640[15:Spt:34635.0] ||  -> node21(c_e_h_1,c_r,s3,s4)*.
% 7.10/7.28  34641[15:Res:34640.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s4)+ -> node20(c_e_h_1,c_r,s3)*.
% 7.10/7.28  34703[15:Res:220.1,34641.0] node23(s4) ||  -> node20(c_e_h_1,c_r,s3)*.
% 7.10/7.28  34704[15:SSi:34703.0,5.0,2015.0,18351.0,34629.0,34630.0,34631.0] ||  -> node20(c_e_h_1,c_r,s3)*.
% 7.10/7.28  34705[15:Res:34704.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s3)*.
% 7.10/7.28  34706[15:Res:34704.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s3)*.
% 7.10/7.28  34709[15:Res:34705.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s3)*.
% 7.10/7.28  34710[15:Res:34706.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s3)*.
% 7.10/7.28  34714[15:Res:34709.0,582.0] ||  -> node16(c_e_h_1,c_e,s2) node14(c_e_h_1,c_e,s2,s3)* m_c_h_element_v_out(c_e_h_1,c_e,s2).
% 7.10/7.28  34716[15:Res:34709.0,509.0] ||  -> node17(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.28  34724[15:Res:34710.0,390.0] ||  -> node10(c_e_h_1,c_m,s2,s3)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2).
% 7.10/7.28  34730[15:Res:34716.1,586.0] ||  -> node17(c_e_h_1,c_e,s2) node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.28  34732[15:Res:34716.1,511.0] ||  -> node17(c_e_h_1,c_e,s2) node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  34735[15:Res:34716.1,87.0] ||  -> node17(c_e_h_1,c_e,s2) m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.28  34742[16:Spt:34735.0] ||  -> node17(c_e_h_1,c_e,s2)*.
% 7.10/7.28  34743[16:Res:34742.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s2)*+ -> m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.28  34773[15:Res:34724.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s3) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) node9(c_e_h_1,c_m,s2)*.
% 7.10/7.28  34775[15:MRR:34773.0,34710.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) node9(c_e_h_1,c_m,s2)*.
% 7.10/7.28  34777[15:Res:34775.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s2)*.
% 7.10/7.28  34889[17:Spt:34775.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.10/7.28  34894[17:Res:34889.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.10/7.28  34899[17:Res:34894.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  34901[17:MRR:34899.0,34889.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  34902[17:Res:34901.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.28  34903[17:Res:34901.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  34904[18:Spt:34902.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.28  34909[18:Res:34904.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.28  34914[18:Res:34909.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  34916[18:MRR:34914.0,34904.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  34919[18:Res:34916.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  34920[18:Res:34916.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  34921[19:Spt:34919.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  34926[19:Res:34921.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  34929[19:Res:34926.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  34931[19:MRR:34929.0,10.0] ||  -> .
% 7.10/7.28  34932[19:Spt:34931.0,34919.0,34921.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)* -> .
% 7.10/7.28  34933[19:Spt:34931.0,34919.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  34935[19:MRR:34920.0,34932.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  34939[19:Res:34935.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  34940[19:MRR:34939.0,10.0] ||  -> .
% 7.10/7.28  34941[18:Spt:34940.0,34902.0,34904.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*+ -> .
% 7.10/7.28  34942[18:Spt:34940.0,34902.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.28  34944[18:MRR:34903.0,34941.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  34950[18:Res:34944.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  34951[18:MRR:34950.0,10.0] ||  -> .
% 7.10/7.28  34952[17:Spt:34951.0,34775.0,34889.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*+ -> .
% 7.10/7.28  34953[17:Spt:34951.0,34775.1] ||  -> node9(c_e_h_1,c_m,s2)*.
% 7.10/7.28  35266[15:Res:34714.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s3) -> node16(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.28  35268[15:MRR:35266.0,34709.0] ||  -> node16(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.28  55277[18:Spt:35268.2] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s2)*.
% 7.10/7.28  55279[18:Res:55277.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s2)*.
% 7.10/7.28  55282[18:Res:55279.0,410.0] ||  -> node21(c_e_h_1,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_1,c_c,s1).
% 7.10/7.28  55356[18:Res:55282.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s2) -> m_and_h_gate_v_out(c_e_h_1,c_c,s1) node20(c_e_h_1,c_c,s1)*.
% 7.10/7.28  55358[18:MRR:55356.0,55279.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1) node20(c_e_h_1,c_c,s1)*.
% 7.10/7.28  55359[18:Res:55358.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)* m_and_h_gate_v_in1(c_e_h_1,c_c,s1).
% 7.10/7.28  55361[19:Spt:55359.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)*.
% 7.10/7.28  55363[19:Res:55361.0,412.0] ||  -> node21(c_e_h_1,c_c,s0,s1)*.
% 7.10/7.28  55373[19:Res:55363.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s1) -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  55375[19:MRR:55373.0,55361.0] ||  -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  55376[19:Res:55375.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s0)*.
% 7.10/7.28  55378[19:Res:55376.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s0)*.
% 7.10/7.28  55379[19:MRR:55378.0,121.0] ||  -> .
% 7.10/7.28  55380[19:Spt:55379.0,55359.0,55361.0] || m_and_h_gate_v_out(c_e_h_1,c_c,s1)*+ -> .
% 7.10/7.28  55381[19:Spt:55379.0,55359.1] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s1)*.
% 7.10/7.28  55385[19:Res:55381.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s1)*.
% 7.10/7.28  55390[19:Res:55385.0,375.0] ||  -> node12(c_e_h_1,c_a,s0,s1)*.
% 7.10/7.28  55405[19:Res:55390.0,123.1] || m_mutex_h_half_v_out(c_e_h_1,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_1,c_a,s0).
% 7.10/7.28  55407[19:MRR:55405.0,55385.0] ||  -> m_mutex_h_half_v_inp(c_e_h_1,c_a,s0)*.
% 7.10/7.28  55408[19:Res:55407.0,18.0] ||  -> m_user_v_req(c_e_h_1,c_u,s0)*.
% 7.10/7.28  55409[19:MRR:55408.0,106.0] ||  -> .
% 7.10/7.28  55410[18:Spt:55409.0,35268.2,55277.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.28  55411[18:Spt:55409.0,35268.0,35268.1] ||  -> node16(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.28  55412[18:MRR:34743.1,55410.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.28  55413[18:Res:55411.1,586.0] ||  -> node16(c_e_h_1,c_e,s2) node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.28  55415[18:Res:55411.1,511.0] ||  -> node16(c_e_h_1,c_e,s2) node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  55418[18:Res:55411.1,87.0] ||  -> node16(c_e_h_1,c_e,s2) m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.28  55420[19:Spt:55418.0] ||  -> node16(c_e_h_1,c_e,s2)*.
% 7.10/7.28  55422[19:Res:55420.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.28  55423[19:MRR:55422.0,55422.1,55412.0,55410.0] ||  -> .
% 7.10/7.28  55424[19:Spt:55423.0,55418.0,55420.0] || node16(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.28  55425[19:Spt:55423.0,55418.1] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.28  55426[19:MRR:55411.0,55424.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.28  55428[19:MRR:55415.0,55424.0] ||  -> node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  55429[19:MRR:55413.0,55424.0] ||  -> node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.28  55440[19:Res:55428.1,595.0] ||  -> node17(c_e_h_1,c_e,s1) node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  55442[19:Res:55428.1,515.0] ||  -> node17(c_e_h_1,c_e,s1) node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  55446[20:Spt:55442.0] ||  -> node17(c_e_h_1,c_e,s1)*.
% 7.10/7.28  55447[20:Res:55446.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  55477[19:Res:55429.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s2) -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  55479[19:MRR:55477.0,55426.0] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  55511[21:Spt:55479.2] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s1)*.
% 7.10/7.28  55513[21:Res:55511.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)*.
% 7.10/7.28  55516[21:Res:55513.0,412.0] ||  -> node21(c_e_h_1,c_c,s0,s1)*.
% 7.10/7.28  55529[21:Res:55516.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s1) -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  55531[21:MRR:55529.0,55513.0] ||  -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  55536[21:Res:55531.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s0)*.
% 7.10/7.28  55538[21:Res:55536.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s0)*.
% 7.10/7.28  55539[21:MRR:55538.0,121.0] ||  -> .
% 7.10/7.28  55540[21:Spt:55539.0,55479.2,55511.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  55541[21:Spt:55539.0,55479.0,55479.1] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  55542[21:MRR:55447.1,55540.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  55544[21:Res:55541.1,595.0] ||  -> node16(c_e_h_1,c_e,s1) node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  55546[21:Res:55541.1,515.0] ||  -> node16(c_e_h_1,c_e,s1) node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  55554[22:Spt:55546.0] ||  -> node16(c_e_h_1,c_e,s1)*.
% 7.10/7.28  55556[22:Res:55554.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  55557[22:MRR:55556.0,55556.1,55542.0,55540.0] ||  -> .
% 7.10/7.28  55558[22:Spt:55557.0,55546.0,55554.0] || node16(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  55559[22:Spt:55557.0,55546.1] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  55560[22:MRR:55541.0,55558.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  55563[22:MRR:55544.0,55558.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  55564[22:Res:55559.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  55565[22:Res:55559.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  55578[22:Res:55563.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  55580[22:MRR:55578.0,55560.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  55581[23:Spt:55580.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.10/7.28  55582[23:Res:55581.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.10/7.28  55583[23:Res:55581.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  55584[23:MRR:55583.0,55564.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  55585[23:MRR:55565.0,55584.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  55586[23:MRR:55582.0,55582.1,55585.0,55584.0] ||  -> .
% 7.10/7.28  55587[23:Spt:55586.0,55580.0,55581.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.10/7.28  55588[23:Spt:55586.0,55580.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  55591[23:Res:55588.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.10/7.28  55592[23:MRR:55591.0,142.0] ||  -> .
% 7.10/7.28  55593[20:Spt:55592.0,55442.0,55446.0] || node17(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  55594[20:Spt:55592.0,55442.1] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  55595[20:MRR:55428.0,55593.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  55598[20:MRR:55440.0,55593.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  55599[20:Res:55594.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  55600[20:Res:55594.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  55609[20:Res:55598.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  55611[20:MRR:55609.0,55595.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  55613[21:Spt:55611.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.10/7.28  55614[21:Res:55613.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.10/7.28  55615[21:Res:55613.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  55616[21:MRR:55615.0,55599.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  55617[21:MRR:55600.0,55616.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  55618[21:MRR:55614.0,55614.1,55617.0,55616.0] ||  -> .
% 7.10/7.28  55619[21:Spt:55618.0,55611.0,55613.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.10/7.28  55620[21:Spt:55618.0,55611.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  55623[21:Res:55620.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.10/7.28  55624[21:MRR:55623.0,142.0] ||  -> .
% 7.10/7.28  55625[16:Spt:55624.0,34735.0,34742.0] || node17(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.28  55626[16:Spt:55624.0,34735.1] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.28  55627[16:MRR:34716.0,55625.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.28  55629[16:MRR:34732.0,55625.0] ||  -> node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  55630[16:MRR:34730.0,55625.0] ||  -> node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.28  55645[17:Spt:34777.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.10/7.28  55650[17:Res:55645.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.10/7.28  55670[16:Res:55629.1,595.0] ||  -> node17(c_e_h_1,c_e,s1) node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  55672[16:Res:55629.1,515.0] ||  -> node17(c_e_h_1,c_e,s1) node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  55729[17:Res:55650.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  55731[17:MRR:55729.0,55645.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  55732[17:Res:55731.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.28  55733[17:Res:55731.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  55753[18:Spt:55732.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.28  55758[18:Res:55753.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.28  55838[16:Res:55630.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s2) -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  55840[16:MRR:55838.0,55627.0] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  55889[18:Res:55758.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  55891[18:MRR:55889.0,55753.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  55918[18:Res:55891.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  55919[18:Res:55891.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  55920[19:Spt:55918.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  55925[19:Res:55920.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  55940[19:Res:55925.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  55942[19:MRR:55940.0,10.0] ||  -> .
% 7.10/7.28  55943[19:Spt:55942.0,55918.0,55920.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.10/7.28  55944[19:Spt:55942.0,55918.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  55946[19:MRR:55919.0,55943.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  55954[19:Res:55946.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  55955[19:MRR:55954.0,10.0] ||  -> .
% 7.10/7.28  55956[18:Spt:55955.0,55732.0,55753.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)* -> .
% 7.10/7.28  55957[18:Spt:55955.0,55732.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.28  55959[18:MRR:55733.0,55956.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  55967[18:Res:55959.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  55968[18:MRR:55967.0,10.0] ||  -> .
% 7.10/7.28  55969[17:Spt:55968.0,34777.0,55645.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*+ -> .
% 7.10/7.28  55970[17:Spt:55968.0,34777.1] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s2)*.
% 7.10/7.28  55978[18:Spt:55629.0] ||  -> node17(c_e_h_1,c_e,s1)*.
% 7.10/7.28  55979[18:Res:55978.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  55980[18:Res:55978.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s1)+ -> m_c_h_element_v_in2(c_e_h_1,c_e,s1)*.
% 7.10/7.28  57771[19:Spt:55840.0] ||  -> node16(c_e_h_1,c_e,s1)*.
% 7.10/7.28  57772[19:Res:57771.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1) -> .
% 7.10/7.28  57773[19:Res:57771.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  57774[19:MRR:57773.0,55979.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s1)*.
% 7.10/7.28  57775[19:MRR:55980.0,57774.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s1)*.
% 7.10/7.28  57776[19:MRR:57772.0,57772.1,57775.0,57774.0] ||  -> .
% 7.10/7.28  57777[19:Spt:57776.0,55840.0,57771.0] || node16(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  57778[19:Spt:57776.0,55840.1,55840.2] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  57780[20:Spt:57778.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  57782[20:Res:57780.0,595.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  57784[20:Res:57780.0,515.0] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  57787[20:Res:57784.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  57788[20:Res:57784.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  58109[20:Res:57782.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  58111[20:MRR:58109.0,57780.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  58112[21:Spt:58111.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.10/7.28  58113[21:Res:58112.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.10/7.28  58114[21:Res:58112.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  58115[21:MRR:58114.0,57787.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  58116[21:MRR:57788.0,58115.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  58117[21:MRR:58113.0,58113.1,58116.0,58115.0] ||  -> .
% 7.10/7.28  58118[21:Spt:58117.0,58111.0,58112.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.10/7.28  58119[21:Spt:58117.0,58111.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  58122[21:Res:58119.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.10/7.28  58123[21:MRR:58122.0,142.0] ||  -> .
% 7.10/7.28  58124[20:Spt:58123.0,57778.0,57780.0] || m_c_h_element_v_out(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  58125[20:Spt:58123.0,57778.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s1)*.
% 7.10/7.28  58128[20:Res:58125.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)*.
% 7.10/7.28  58131[20:Res:58128.0,412.0] ||  -> node21(c_e_h_1,c_c,s0,s1)*.
% 7.10/7.28  58142[20:Res:58131.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s1) -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  58144[20:MRR:58142.0,58128.0] ||  -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  58145[20:Res:58144.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s0)*.
% 7.10/7.28  58147[20:Res:58145.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s0)*.
% 7.10/7.28  58148[20:MRR:58147.0,121.0] ||  -> .
% 7.10/7.28  58149[18:Spt:58148.0,55629.0,55978.0] || node17(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  58150[18:Spt:58148.0,55629.1] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  58152[18:MRR:55672.0,58149.0] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  58154[18:MRR:55670.0,58149.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  58162[18:Res:58152.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  58163[18:Res:58152.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  58227[18:Res:58154.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  58229[18:MRR:58227.0,58150.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  58230[19:Spt:58229.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.10/7.28  58231[19:Res:58230.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.10/7.28  58232[19:Res:58230.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  58233[19:MRR:58232.0,58162.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  58234[19:MRR:58163.0,58233.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  58235[19:MRR:58231.0,58231.1,58234.0,58233.0] ||  -> .
% 7.10/7.28  58236[19:Spt:58235.0,58229.0,58230.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.10/7.28  58237[19:Spt:58235.0,58229.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  58240[19:Res:58237.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.10/7.28  58241[19:MRR:58240.0,142.0] ||  -> .
% 7.10/7.28  58242[15:Spt:58241.0,34635.0,34640.0] || node21(c_e_h_1,c_r,s3,s4)*+ -> .
% 7.10/7.28  58243[15:Spt:58241.0,34635.1] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s3)*.
% 7.10/7.28  58262[15:Res:58243.0,409.0] ||  -> node21(c_e_h_1,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_1,c_r,s2).
% 7.10/7.28  58327[15:Res:58262.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s3) -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.10/7.28  58329[15:MRR:58327.0,58243.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.10/7.28  58614[16:Spt:58329.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2)*.
% 7.10/7.28  58617[16:Res:58614.0,96.0] ||  -> m_user_v_ack(c_e_h_1,c_u,s2)*.
% 7.10/7.28  58618[16:Res:58617.0,34.0] || m_and_h_gate_v_in2(c_e_h_1,c_d,s2)*+ -> .
% 7.10/7.28  58629[16:Res:2305.0,58618.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1) m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.28  58641[17:Spt:58629.1] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.28  58642[17:Res:58641.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  58647[17:Res:58642.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  58649[17:Res:58647.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  58651[17:MRR:58649.0,10.0] ||  -> .
% 7.10/7.28  58652[17:Spt:58651.0,58629.1,58641.0] || m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*+ -> .
% 7.10/7.28  58653[17:Spt:58651.0,58629.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1)*.
% 7.10/7.28  58656[17:Res:58653.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.28  58663[17:Res:58656.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.28  58700[17:Res:58663.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  58702[17:MRR:58700.0,58656.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  58703[17:Res:58702.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  58704[17:Res:58702.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  58707[18:Spt:58703.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  58710[18:Res:58707.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.28  58713[18:MRR:58710.0,58652.0] ||  -> .
% 7.10/7.28  58714[18:Spt:58713.0,58703.0,58707.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)* -> .
% 7.10/7.28  58715[18:Spt:58713.0,58703.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  58717[18:MRR:58704.0,58714.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  58722[18:Res:58717.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  58723[18:MRR:58722.0,10.0] ||  -> .
% 7.10/7.28  58724[16:Spt:58723.0,58329.0,58614.0] || m_and_h_gate_v_out(c_e_h_1,c_r,s2)*+ -> .
% 7.10/7.28  58725[16:Spt:58723.0,58329.1] ||  -> node20(c_e_h_1,c_r,s2)*.
% 7.10/7.28  58729[16:Res:58725.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s2)*.
% 7.10/7.28  58740[16:Res:58729.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.10/7.28  58769[16:Res:58740.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.10/7.28  58806[16:Res:58769.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  58808[16:MRR:58806.0,58740.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  58809[16:Res:58808.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.28  58810[16:Res:58808.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  58811[17:Spt:58809.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.28  58816[17:Res:58811.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.28  58829[17:Res:58816.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  58831[17:MRR:58829.0,58811.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  58834[17:Res:58831.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  58835[17:Res:58831.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  58836[18:Spt:58834.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  58841[18:Res:58836.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  58846[18:Res:58841.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  58848[18:MRR:58846.0,10.0] ||  -> .
% 7.10/7.28  58849[18:Spt:58848.0,58834.0,58836.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)* -> .
% 7.10/7.28  58850[18:Spt:58848.0,58834.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  58852[18:MRR:58835.0,58849.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  58857[18:Res:58852.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  58858[18:MRR:58857.0,10.0] ||  -> .
% 7.10/7.28  58859[17:Spt:58858.0,58809.0,58811.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*+ -> .
% 7.10/7.28  58860[17:Spt:58858.0,58809.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.28  58862[17:MRR:58810.0,58859.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  58875[17:Res:58862.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  58876[17:MRR:58875.0,10.0] ||  -> .
% 7.10/7.28  58877[14:Spt:58876.0,34624.2,34625.0] || until2p29(s2)*+ -> .
% 7.10/7.28  58878[14:Spt:58876.0,34624.0,34624.1] ||  -> trans(s4,s4) trans(s4,s3)*.
% 7.10/7.28  58890[14:Res:58878.1,18353.0] ||  -> trans(s4,s4)* until2p29(s3).
% 7.10/7.28  58893[15:Spt:58890.1] ||  -> until2p29(s3)*.
% 7.10/7.28  58894[15:MRR:2026.0,58893.0] ||  -> xuntil2p30(s3)*.
% 7.10/7.28  58895[15:MRR:170.0,58894.0] ||  -> until2p29(s4)*.
% 7.10/7.28  58896[15:MRR:18347.0,58895.0] ||  -> node23(s4)*.
% 7.10/7.28  58897[15:MRR:181.0,58895.0] ||  -> node26(s4)*.
% 7.10/7.28  58900[15:MRR:524.0,58896.0] ||  -> node21(c_e_h_1,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_1,c_r,s3).
% 7.10/7.28  58934[16:Spt:58900.0] ||  -> node21(c_e_h_1,c_r,s3,s4)*.
% 7.10/7.28  58935[16:Res:58934.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s4)+ -> node20(c_e_h_1,c_r,s3)*.
% 7.10/7.28  58953[16:Res:220.1,58935.0] node23(s4) ||  -> node20(c_e_h_1,c_r,s3)*.
% 7.10/7.28  58954[16:SSi:58953.0,5.0,2015.0,18351.0,58895.0,58896.0,58897.0] ||  -> node20(c_e_h_1,c_r,s3)*.
% 7.10/7.28  58955[16:Res:58954.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s3)*.
% 7.10/7.28  58956[16:Res:58954.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s3)*.
% 7.10/7.28  58959[16:Res:58955.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s3)*.
% 7.10/7.28  58960[16:Res:58956.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s3)*.
% 7.10/7.28  58964[16:Res:58959.0,582.0] ||  -> node16(c_e_h_1,c_e,s2) node14(c_e_h_1,c_e,s2,s3)* m_c_h_element_v_out(c_e_h_1,c_e,s2).
% 7.10/7.28  58966[16:Res:58959.0,509.0] ||  -> node17(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.28  58974[16:Res:58960.0,390.0] ||  -> node10(c_e_h_1,c_m,s2,s3)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2).
% 7.10/7.28  58996[16:Res:58966.1,586.0] ||  -> node17(c_e_h_1,c_e,s2) node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.28  58998[16:Res:58966.1,511.0] ||  -> node17(c_e_h_1,c_e,s2) node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  59001[16:Res:58966.1,87.0] ||  -> node17(c_e_h_1,c_e,s2) m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.28  59008[17:Spt:59001.0] ||  -> node17(c_e_h_1,c_e,s2)*.
% 7.10/7.28  59009[17:Res:59008.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s2)*+ -> m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.28  59086[16:Res:58974.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s3) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) node9(c_e_h_1,c_m,s2)*.
% 7.10/7.28  59088[16:MRR:59086.0,58960.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) node9(c_e_h_1,c_m,s2)*.
% 7.10/7.28  59089[16:Res:59088.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s2)*.
% 7.10/7.28  59091[18:Spt:59089.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.10/7.28  59096[18:Res:59091.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.10/7.28  59126[18:Res:59096.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  59128[18:MRR:59126.0,59091.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  59129[18:Res:59128.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.28  59130[18:Res:59128.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  59131[19:Spt:59129.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.28  59136[19:Res:59131.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.28  59160[19:Res:59136.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  59162[19:MRR:59160.0,59131.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  59163[19:Res:59162.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  59164[19:Res:59162.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  59165[20:Spt:59163.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  59170[20:Res:59165.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  59173[20:Res:59170.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  59175[20:MRR:59173.0,10.0] ||  -> .
% 7.10/7.28  59176[20:Spt:59175.0,59163.0,59165.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.10/7.28  59177[20:Spt:59175.0,59163.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  59179[20:MRR:59164.0,59176.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  59187[20:Res:59179.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  59188[20:MRR:59187.0,10.0] ||  -> .
% 7.10/7.28  59189[19:Spt:59188.0,59129.0,59131.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)* -> .
% 7.10/7.28  59190[19:Spt:59188.0,59129.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.28  59192[19:MRR:59130.0,59189.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  59200[19:Res:59192.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  59201[19:MRR:59200.0,10.0] ||  -> .
% 7.10/7.28  59202[18:Spt:59201.0,59089.0,59091.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*+ -> .
% 7.10/7.28  59203[18:Spt:59201.0,59089.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s2)*.
% 7.10/7.28  59306[16:Res:58964.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s3) -> node16(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.28  59308[16:MRR:59306.0,58959.0] ||  -> node16(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.28  59313[19:Spt:59308.2] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s2)*.
% 7.10/7.28  59315[19:Res:59313.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s2)*.
% 7.10/7.28  59321[19:Res:59315.0,410.0] ||  -> node21(c_e_h_1,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_1,c_c,s1).
% 7.10/7.28  59342[19:Res:59321.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s2) -> m_and_h_gate_v_out(c_e_h_1,c_c,s1) node20(c_e_h_1,c_c,s1)*.
% 7.10/7.28  59344[19:MRR:59342.0,59315.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1) node20(c_e_h_1,c_c,s1)*.
% 7.10/7.28  59345[19:Res:59344.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)* m_and_h_gate_v_in1(c_e_h_1,c_c,s1).
% 7.10/7.28  59350[20:Spt:59345.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)*.
% 7.10/7.28  59352[20:Res:59350.0,412.0] ||  -> node21(c_e_h_1,c_c,s0,s1)*.
% 7.10/7.28  59357[20:Res:59352.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s1) -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  59359[20:MRR:59357.0,59350.0] ||  -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  59361[20:Res:59359.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s0)*.
% 7.10/7.28  59363[20:Res:59361.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s0)*.
% 7.10/7.28  59364[20:MRR:59363.0,121.0] ||  -> .
% 7.10/7.28  59365[20:Spt:59364.0,59345.0,59350.0] || m_and_h_gate_v_out(c_e_h_1,c_c,s1)*+ -> .
% 7.10/7.28  59366[20:Spt:59364.0,59345.1] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s1)*.
% 7.10/7.28  59370[20:Res:59366.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s1)*.
% 7.10/7.28  59377[20:Res:59370.0,375.0] ||  -> node12(c_e_h_1,c_a,s0,s1)*.
% 7.10/7.28  59384[20:Res:59377.0,123.1] || m_mutex_h_half_v_out(c_e_h_1,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_1,c_a,s0).
% 7.10/7.28  59386[20:MRR:59384.0,59370.0] ||  -> m_mutex_h_half_v_inp(c_e_h_1,c_a,s0)*.
% 7.10/7.28  59387[20:Res:59386.0,18.0] ||  -> m_user_v_req(c_e_h_1,c_u,s0)*.
% 7.10/7.28  59388[20:MRR:59387.0,106.0] ||  -> .
% 7.10/7.28  59389[19:Spt:59388.0,59308.2,59313.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.28  59390[19:Spt:59388.0,59308.0,59308.1] ||  -> node16(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.28  59391[19:MRR:59009.1,59389.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.28  59392[19:Res:59390.1,586.0] ||  -> node16(c_e_h_1,c_e,s2) node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.28  59394[19:Res:59390.1,511.0] ||  -> node16(c_e_h_1,c_e,s2) node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  59397[19:Res:59390.1,87.0] ||  -> node16(c_e_h_1,c_e,s2) m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.28  59402[20:Spt:59397.0] ||  -> node16(c_e_h_1,c_e,s2)*.
% 7.10/7.28  59404[20:Res:59402.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.28  59405[20:MRR:59404.0,59404.1,59391.0,59389.0] ||  -> .
% 7.10/7.28  59406[20:Spt:59405.0,59397.0,59402.0] || node16(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.28  59407[20:Spt:59405.0,59397.1] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.28  59408[20:MRR:59390.0,59406.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.28  59410[20:MRR:59394.0,59406.0] ||  -> node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  59411[20:MRR:59392.0,59406.0] ||  -> node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.28  59430[20:Res:59410.1,595.0] ||  -> node17(c_e_h_1,c_e,s1) node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  59432[20:Res:59410.1,515.0] ||  -> node17(c_e_h_1,c_e,s1) node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  59436[21:Spt:59432.0] ||  -> node17(c_e_h_1,c_e,s1)*.
% 7.10/7.28  59437[21:Res:59436.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  59546[20:Res:59411.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s2) -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  59548[20:MRR:59546.0,59408.0] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  59549[22:Spt:59548.2] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s1)*.
% 7.10/7.28  59551[22:Res:59549.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)*.
% 7.10/7.28  59554[22:Res:59551.0,412.0] ||  -> node21(c_e_h_1,c_c,s0,s1)*.
% 7.10/7.28  59572[22:Res:59554.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s1) -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  59574[22:MRR:59572.0,59551.0] ||  -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  59575[22:Res:59574.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s0)*.
% 7.10/7.28  59577[22:Res:59575.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s0)*.
% 7.10/7.28  59578[22:MRR:59577.0,121.0] ||  -> .
% 7.10/7.28  59579[22:Spt:59578.0,59548.2,59549.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  59580[22:Spt:59578.0,59548.0,59548.1] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  59581[22:MRR:59437.1,59579.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  59583[22:Res:59580.1,595.0] ||  -> node16(c_e_h_1,c_e,s1) node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  59585[22:Res:59580.1,515.0] ||  -> node16(c_e_h_1,c_e,s1) node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  59592[23:Spt:59585.0] ||  -> node16(c_e_h_1,c_e,s1)*.
% 7.10/7.28  59594[23:Res:59592.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  59595[23:MRR:59594.0,59594.1,59581.0,59579.0] ||  -> .
% 7.10/7.28  59596[23:Spt:59595.0,59585.0,59592.0] || node16(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  59597[23:Spt:59595.0,59585.1] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  59598[23:MRR:59580.0,59596.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  59601[23:MRR:59583.0,59596.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  59602[23:Res:59597.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  59603[23:Res:59597.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  59612[23:Res:59601.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  59614[23:MRR:59612.0,59598.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  59624[24:Spt:59614.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.10/7.28  59625[24:Res:59624.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.10/7.28  59626[24:Res:59624.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  59627[24:MRR:59626.0,59602.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  59628[24:MRR:59603.0,59627.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  59629[24:MRR:59625.0,59625.1,59628.0,59627.0] ||  -> .
% 7.10/7.28  59630[24:Spt:59629.0,59614.0,59624.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.10/7.28  59631[24:Spt:59629.0,59614.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  59634[24:Res:59631.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.10/7.28  59635[24:MRR:59634.0,142.0] ||  -> .
% 7.10/7.28  59636[21:Spt:59635.0,59432.0,59436.0] || node17(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  59637[21:Spt:59635.0,59432.1] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  59638[21:MRR:59410.0,59636.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  59641[21:MRR:59430.0,59636.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  59642[21:Res:59637.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  59643[21:Res:59637.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  59656[21:Res:59641.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  59658[21:MRR:59656.0,59638.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  59659[22:Spt:59658.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.10/7.28  59660[22:Res:59659.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.10/7.28  59661[22:Res:59659.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  59662[22:MRR:59661.0,59642.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  59663[22:MRR:59643.0,59662.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  59664[22:MRR:59660.0,59660.1,59663.0,59662.0] ||  -> .
% 7.10/7.28  59665[22:Spt:59664.0,59658.0,59659.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.10/7.28  59666[22:Spt:59664.0,59658.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  59669[22:Res:59666.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.10/7.28  59670[22:MRR:59669.0,142.0] ||  -> .
% 7.10/7.28  59671[17:Spt:59670.0,59001.0,59008.0] || node17(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.28  59672[17:Spt:59670.0,59001.1] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.28  59673[17:MRR:58966.0,59671.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.28  59675[17:MRR:58998.0,59671.0] ||  -> node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  59676[17:MRR:58996.0,59671.0] ||  -> node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.28  59818[17:Res:59676.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s2) -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  59820[17:MRR:59818.0,59673.0] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  59867[18:Spt:59675.1] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  59869[18:Res:59867.0,595.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  59871[18:Res:59867.0,515.0] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  59874[18:Res:59871.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  59875[18:Res:59871.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  59907[18:Res:59869.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  59909[18:MRR:59907.0,59867.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  59910[19:Spt:59909.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.10/7.28  59911[19:Res:59910.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.10/7.28  59912[19:Res:59910.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  59913[19:MRR:59912.0,59874.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  59914[19:MRR:59875.0,59913.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  59915[19:MRR:59911.0,59911.1,59914.0,59913.0] ||  -> .
% 7.10/7.28  59916[19:Spt:59915.0,59909.0,59910.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.10/7.28  59917[19:Spt:59915.0,59909.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  59920[19:Res:59917.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.10/7.28  59921[19:MRR:59920.0,142.0] ||  -> .
% 7.10/7.28  59922[18:Spt:59921.0,59675.1,59867.0] || m_c_h_element_v_out(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  59923[18:Spt:59921.0,59675.0] ||  -> node17(c_e_h_1,c_e,s1)*.
% 7.10/7.28  59924[18:MRR:59820.1,59922.0] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_in1(c_e_h_1,c_e,s1)*.
% 7.10/7.28  59926[18:Res:59923.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  59927[18:Res:59923.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s1) -> m_c_h_element_v_in2(c_e_h_1,c_e,s1)*.
% 7.10/7.28  59951[19:Spt:59924.0] ||  -> node16(c_e_h_1,c_e,s1)*.
% 7.10/7.28  59952[19:Res:59951.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1) -> .
% 7.10/7.28  59953[19:Res:59951.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  59954[19:MRR:59953.0,59926.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s1)*.
% 7.10/7.28  59955[19:MRR:59927.0,59954.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s1)*.
% 7.10/7.28  59956[19:MRR:59952.0,59952.1,59955.0,59954.0] ||  -> .
% 7.10/7.28  59957[19:Spt:59956.0,59924.0,59951.0] || node16(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  59958[19:Spt:59956.0,59924.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s1)*.
% 7.10/7.28  59961[19:Res:59958.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)*.
% 7.10/7.28  59964[19:Res:59961.0,412.0] ||  -> node21(c_e_h_1,c_c,s0,s1)*.
% 7.10/7.28  59975[19:Res:59964.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s1) -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  59977[19:MRR:59975.0,59961.0] ||  -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  59978[19:Res:59977.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s0)*.
% 7.10/7.28  59980[19:Res:59978.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s0)*.
% 7.10/7.28  59981[19:MRR:59980.0,121.0] ||  -> .
% 7.10/7.28  59982[16:Spt:59981.0,58900.0,58934.0] || node21(c_e_h_1,c_r,s3,s4)*+ -> .
% 7.10/7.28  59983[16:Spt:59981.0,58900.1] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s3)*.
% 7.10/7.28  59986[16:Res:59983.0,409.0] ||  -> node21(c_e_h_1,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_1,c_r,s2).
% 7.10/7.28  60035[16:Res:59986.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s3) -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.10/7.28  60037[16:MRR:60035.0,59983.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.10/7.28  60038[17:Spt:60037.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2)*.
% 7.10/7.28  60041[17:Res:60038.0,96.0] ||  -> m_user_v_ack(c_e_h_1,c_u,s2)*.
% 7.10/7.28  60042[17:Res:60041.0,34.0] || m_and_h_gate_v_in2(c_e_h_1,c_d,s2)*+ -> .
% 7.10/7.28  60044[17:Res:2305.0,60042.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1) m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.28  60048[18:Spt:60044.1] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.28  60049[18:Res:60048.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  60056[18:Res:60049.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  60058[18:Res:60056.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  60060[18:MRR:60058.0,10.0] ||  -> .
% 7.10/7.28  60061[18:Spt:60060.0,60044.1,60048.0] || m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*+ -> .
% 7.10/7.28  60062[18:Spt:60060.0,60044.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1)*.
% 7.10/7.28  60065[18:Res:60062.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.28  60072[18:Res:60065.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.28  60178[18:Res:60072.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  60180[18:MRR:60178.0,60065.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  60181[18:Res:60180.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  60182[18:Res:60180.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  60183[19:Spt:60181.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  60186[19:Res:60183.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.28  60189[19:MRR:60186.0,60061.0] ||  -> .
% 7.10/7.28  60190[19:Spt:60189.0,60181.0,60183.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.10/7.28  60191[19:Spt:60189.0,60181.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  60193[19:MRR:60182.0,60190.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  60201[19:Res:60193.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  60202[19:MRR:60201.0,10.0] ||  -> .
% 7.10/7.28  60203[17:Spt:60202.0,60037.0,60038.0] || m_and_h_gate_v_out(c_e_h_1,c_r,s2)*+ -> .
% 7.10/7.28  60204[17:Spt:60202.0,60037.1] ||  -> node20(c_e_h_1,c_r,s2)*.
% 7.10/7.28  60207[17:Res:60204.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.28  60208[17:Res:60204.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s2)*.
% 7.10/7.28  60209[17:Res:60207.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.28  60210[17:Res:60208.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.10/7.28  60212[17:Res:60209.0,586.0] ||  -> node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.28  60231[17:Res:60210.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.10/7.28  60311[17:Res:60231.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  60313[17:MRR:60311.0,60210.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  60314[17:Res:60313.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.28  60315[17:Res:60313.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  60316[17:Res:60212.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s2) -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  60318[17:MRR:60316.0,60209.0] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  60319[18:Spt:60314.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.28  60324[18:Res:60319.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.28  60353[18:Res:60324.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  60355[18:MRR:60353.0,60319.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  60356[19:Spt:60318.2] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s1)*.
% 7.10/7.28  60358[19:Res:60356.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)*.
% 7.10/7.28  60361[19:Res:60358.0,412.0] ||  -> node21(c_e_h_1,c_c,s0,s1)*.
% 7.10/7.28  60373[19:Res:60361.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s1) -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  60375[19:MRR:60373.0,60358.0] ||  -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  60376[19:Res:60375.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s0)*.
% 7.10/7.28  60378[19:Res:60376.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s0)*.
% 7.10/7.28  60379[19:MRR:60378.0,121.0] ||  -> .
% 7.10/7.28  60380[19:Spt:60379.0,60318.2,60356.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  60381[19:Spt:60379.0,60318.0,60318.1] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  60390[18:Res:60355.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  60391[18:Res:60355.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  60424[20:Spt:60390.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  60429[20:Res:60424.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  60432[20:Res:60429.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  60434[20:MRR:60432.0,10.0] ||  -> .
% 7.10/7.28  60435[20:Spt:60434.0,60390.0,60424.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.10/7.28  60436[20:Spt:60434.0,60390.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  60438[20:MRR:60391.0,60435.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  60446[20:Res:60438.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  60447[20:MRR:60446.0,10.0] ||  -> .
% 7.10/7.28  60448[18:Spt:60447.0,60314.0,60319.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)* -> .
% 7.10/7.28  60449[18:Spt:60447.0,60314.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.28  60451[18:MRR:60315.0,60448.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  60459[18:Res:60451.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  60460[18:MRR:60459.0,10.0] ||  -> .
% 7.10/7.28  60461[15:Spt:60460.0,58890.1,58893.0] || until2p29(s3)*+ -> .
% 7.10/7.28  60462[15:Spt:60460.0,58890.0] ||  -> trans(s4,s4)*.
% 7.10/7.28  60472[15:Res:60462.0,18353.0] ||  -> until2p29(s4)*.
% 7.10/7.28  60473[15:MRR:181.0,60472.0] ||  -> node26(s4)*.
% 7.10/7.28  60474[15:MRR:18347.0,60472.0] ||  -> node23(s4)*.
% 7.10/7.28  60475[15:MRR:18350.0,60472.0] ||  -> node21(c_e_h_2,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_2,c_r,s3).
% 7.10/7.28  60517[16:Spt:60475.0] ||  -> node21(c_e_h_2,c_r,s3,s4)*.
% 7.10/7.28  60518[16:Res:60517.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_r,s4)+ -> node20(c_e_h_2,c_r,s3)*.
% 7.10/7.28  60585[16:Res:218.1,60518.0] node23(s4) ||  -> node20(c_e_h_2,c_r,s3)*.
% 7.10/7.28  60586[16:SSi:60585.0,5.0,2015.0,18351.0,60472.0,60473.0,60474.0] ||  -> node20(c_e_h_2,c_r,s3)*.
% 7.10/7.28  60587[16:Res:60586.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s3)*.
% 7.10/7.28  60588[16:Res:60586.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s3)*.
% 7.10/7.28  60591[16:Res:60587.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s3)*.
% 7.10/7.28  60592[16:Res:60588.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s3)*.
% 7.10/7.28  60596[16:Res:60591.0,582.0] ||  -> node16(c_e_h_2,c_e,s2) node14(c_e_h_2,c_e,s2,s3)* m_c_h_element_v_out(c_e_h_2,c_e,s2).
% 7.10/7.28  60598[16:Res:60591.0,509.0] ||  -> node17(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.10/7.28  60606[16:Res:60592.0,390.0] ||  -> node10(c_e_h_2,c_m,s2,s3)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2).
% 7.10/7.28  60633[16:Res:60598.1,87.0] ||  -> node17(c_e_h_2,c_e,s2) m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.10/7.28  60640[17:Spt:60633.1] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.10/7.28  60641[17:Res:60640.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.10/7.28  60644[17:Res:60641.0,586.0] ||  -> node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.10/7.28  60646[17:Res:60641.0,511.0] ||  -> node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.28  60655[17:Res:60646.1,595.0] ||  -> node17(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.28  60657[17:Res:60646.1,515.0] ||  -> node17(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.10/7.28  60663[18:Spt:60657.0] ||  -> node17(c_e_h_2,c_e,s1)*.
% 7.10/7.28  60664[18:Res:60663.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.28  60693[16:Res:60606.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s3) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) node9(c_e_h_2,c_m,s2)*.
% 7.10/7.28  60695[16:MRR:60693.0,60592.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) node9(c_e_h_2,c_m,s2)*.
% 7.10/7.28  60810[19:Spt:60695.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.10/7.28  60815[19:Res:60810.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.10/7.28  60826[19:Res:60815.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.28  60828[19:MRR:60826.0,60810.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.28  60829[19:Res:60828.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.28  60830[19:Res:60828.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.28  60831[20:Spt:60829.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.28  60836[20:Res:60831.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.28  60850[20:Res:60836.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  60852[20:MRR:60850.0,60831.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  60853[20:Res:60852.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.28  60854[20:Res:60852.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.28  60855[21:Spt:60853.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  60860[21:Res:60855.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  60863[21:Res:60860.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  60865[21:MRR:60863.0,13.0] ||  -> .
% 7.10/7.28  60866[21:Spt:60865.0,60853.0,60855.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*+ -> .
% 7.10/7.28  60867[21:Spt:60865.0,60853.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.28  60869[21:MRR:60854.0,60866.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.28  60877[21:Res:60869.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  60878[21:MRR:60877.0,13.0] ||  -> .
% 7.10/7.28  60879[20:Spt:60878.0,60829.0,60831.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)* -> .
% 7.10/7.28  60880[20:Spt:60878.0,60829.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.28  60882[20:MRR:60830.0,60879.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.28  60890[20:Res:60882.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  60891[20:MRR:60890.0,13.0] ||  -> .
% 7.10/7.28  60892[19:Spt:60891.0,60695.0,60810.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*+ -> .
% 7.10/7.28  60893[19:Spt:60891.0,60695.1] ||  -> node9(c_e_h_2,c_m,s2)*.
% 7.10/7.28  61058[17:Res:60644.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s2) -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.28  61060[17:MRR:61058.0,60641.0] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.28  61061[20:Spt:61060.2] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s1)*.
% 7.10/7.28  61063[20:Res:61061.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)*.
% 7.10/7.28  61066[20:Res:61063.0,412.0] ||  -> node21(c_e_h_2,c_c,s0,s1)*.
% 7.10/7.28  61075[20:Res:61066.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s1) -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.28  61077[20:MRR:61075.0,61063.0] ||  -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.28  61078[20:Res:61077.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s0)*.
% 7.10/7.28  61080[20:Res:61078.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s0)*.
% 7.10/7.28  61081[20:MRR:61080.0,121.0] ||  -> .
% 7.10/7.28  61082[20:Spt:61081.0,61060.2,61061.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.28  61083[20:Spt:61081.0,61060.0,61060.1] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.28  61084[20:MRR:60664.1,61082.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.28  61086[20:Res:61083.1,595.0] ||  -> node16(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.28  61088[20:Res:61083.1,515.0] ||  -> node16(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.10/7.28  61092[21:Spt:61088.0] ||  -> node16(c_e_h_2,c_e,s1)*.
% 7.10/7.28  61094[21:Res:61092.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.28  61095[21:MRR:61094.0,61094.1,61084.0,61082.0] ||  -> .
% 7.10/7.28  61096[21:Spt:61095.0,61088.0,61092.0] || node16(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.28  61097[21:Spt:61095.0,61088.1] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.10/7.28  61098[21:MRR:61083.0,61096.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.28  61101[21:MRR:61086.0,61096.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.28  61102[21:Res:61097.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.28  61103[21:Res:61097.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.28  61112[21:Res:61101.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.28  61114[21:MRR:61112.0,61098.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.28  61115[22:Spt:61114.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.10/7.28  61116[22:Res:61115.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.10/7.28  61117[22:Res:61115.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.28  61118[22:MRR:61117.0,61102.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.28  61119[22:MRR:61103.0,61118.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.28  61120[22:MRR:61116.0,61116.1,61119.0,61118.0] ||  -> .
% 7.10/7.28  61121[22:Spt:61120.0,61114.0,61115.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.10/7.28  61122[22:Spt:61120.0,61114.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.28  61125[22:Res:61122.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.10/7.28  61126[22:MRR:61125.0,142.0] ||  -> .
% 7.10/7.28  61127[18:Spt:61126.0,60657.0,60663.0] || node17(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.28  61128[18:Spt:61126.0,60657.1] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.10/7.28  61129[18:MRR:60646.0,61127.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.28  61132[18:MRR:60655.0,61127.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.28  61133[18:Res:61128.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.28  61134[18:Res:61128.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.28  61170[18:Res:61132.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.28  61172[18:MRR:61170.0,61129.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.28  61173[19:Spt:61172.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.10/7.28  61174[19:Res:61173.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.10/7.28  61175[19:Res:61173.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.28  61176[19:MRR:61175.0,61133.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.28  61177[19:MRR:61134.0,61176.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.28  61178[19:MRR:61174.0,61174.1,61177.0,61176.0] ||  -> .
% 7.10/7.28  61179[19:Spt:61178.0,61172.0,61173.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.10/7.28  61180[19:Spt:61178.0,61172.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.28  61183[19:Res:61180.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.10/7.28  61184[19:MRR:61183.0,142.0] ||  -> .
% 7.10/7.28  61185[17:Spt:61184.0,60633.1,60640.0] || m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*+ -> .
% 7.10/7.28  61186[17:Spt:61184.0,60633.0] ||  -> node17(c_e_h_2,c_e,s2)*.
% 7.10/7.28  61191[17:Res:61186.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s2)*+ -> m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.28  61335[18:Spt:60695.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.10/7.28  61340[18:Res:61335.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.10/7.28  61346[18:Res:61340.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.28  61348[18:MRR:61346.0,61335.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.28  61349[18:Res:61348.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.28  61350[18:Res:61348.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.28  61351[19:Spt:61349.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.28  61356[19:Res:61351.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.28  61362[19:Res:61356.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  61364[19:MRR:61362.0,61351.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  61365[19:Res:61364.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.28  61366[19:Res:61364.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.28  61367[20:Spt:61365.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  61372[20:Res:61367.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  61375[20:Res:61372.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  61377[20:MRR:61375.0,13.0] ||  -> .
% 7.10/7.28  61378[20:Spt:61377.0,61365.0,61367.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*+ -> .
% 7.10/7.28  61379[20:Spt:61377.0,61365.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.28  61381[20:MRR:61366.0,61378.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.28  61389[20:Res:61381.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  61390[20:MRR:61389.0,13.0] ||  -> .
% 7.10/7.28  61391[19:Spt:61390.0,61349.0,61351.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)* -> .
% 7.10/7.28  61392[19:Spt:61390.0,61349.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.28  61394[19:MRR:61350.0,61391.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.28  61402[19:Res:61394.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  61403[19:MRR:61402.0,13.0] ||  -> .
% 7.10/7.28  61404[18:Spt:61403.0,60695.0,61335.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*+ -> .
% 7.10/7.28  61405[18:Spt:61403.0,60695.1] ||  -> node9(c_e_h_2,c_m,s2)*.
% 7.10/7.28  61559[16:Res:60596.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s3) -> node16(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)* m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.28  61561[16:MRR:61559.0,60591.0] ||  -> node16(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)* m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.28  61562[19:Spt:61561.2] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s2)*.
% 7.10/7.28  61564[19:Res:61562.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s2)*.
% 7.10/7.28  61567[19:Res:61564.0,410.0] ||  -> node21(c_e_h_2,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_2,c_c,s1).
% 7.10/7.28  61579[19:Res:61567.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s2) -> m_and_h_gate_v_out(c_e_h_2,c_c,s1) node20(c_e_h_2,c_c,s1)*.
% 7.10/7.28  61581[19:MRR:61579.0,61564.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1) node20(c_e_h_2,c_c,s1)*.
% 7.10/7.28  61582[19:Res:61581.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)* m_and_h_gate_v_in1(c_e_h_2,c_c,s1).
% 7.10/7.28  61584[20:Spt:61582.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)*.
% 7.10/7.28  61586[20:Res:61584.0,412.0] ||  -> node21(c_e_h_2,c_c,s0,s1)*.
% 7.10/7.28  61594[20:Res:61586.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s1) -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.28  61596[20:MRR:61594.0,61584.0] ||  -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.28  61597[20:Res:61596.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s0)*.
% 7.10/7.28  61599[20:Res:61597.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s0)*.
% 7.10/7.28  61600[20:MRR:61599.0,121.0] ||  -> .
% 7.10/7.28  61601[20:Spt:61600.0,61582.0,61584.0] || m_and_h_gate_v_out(c_e_h_2,c_c,s1)*+ -> .
% 7.10/7.28  61602[20:Spt:61600.0,61582.1] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s1)*.
% 7.10/7.28  61606[20:Res:61602.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s1)*.
% 7.10/7.28  61614[20:Res:61606.0,375.0] ||  -> node12(c_e_h_2,c_a,s0,s1)*.
% 7.10/7.28  61630[20:Res:61614.0,123.1] || m_mutex_h_half_v_out(c_e_h_2,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_2,c_a,s0).
% 7.10/7.28  61632[20:MRR:61630.0,61606.0] ||  -> m_mutex_h_half_v_inp(c_e_h_2,c_a,s0)*.
% 7.10/7.28  61633[20:Res:61632.0,18.0] ||  -> m_user_v_req(c_e_h_2,c_u,s0)*.
% 7.10/7.28  61634[20:MRR:61633.0,106.0] ||  -> .
% 7.10/7.28  61635[19:Spt:61634.0,61561.2,61562.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s2)* -> .
% 7.10/7.28  61636[19:Spt:61634.0,61561.0,61561.1] ||  -> node16(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.10/7.28  61637[19:MRR:61191.1,61635.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s2)* -> .
% 7.10/7.28  61643[19:Res:61636.1,87.0] ||  -> node16(c_e_h_2,c_e,s2) m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.10/7.28  61644[19:MRR:61643.1,61185.0] ||  -> node16(c_e_h_2,c_e,s2)*.
% 7.10/7.28  61647[19:Res:61644.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s2)* m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.28  61648[19:MRR:61647.0,61647.1,61637.0,61635.0] ||  -> .
% 7.10/7.28  61649[16:Spt:61648.0,60475.0,60517.0] || node21(c_e_h_2,c_r,s3,s4)*+ -> .
% 7.10/7.28  61650[16:Spt:61648.0,60475.1] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s3)*.
% 7.10/7.28  61653[16:Res:61650.0,409.0] ||  -> node21(c_e_h_2,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_2,c_r,s2).
% 7.10/7.28  61672[16:Res:61653.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_r,s3) -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.10/7.28  61674[16:MRR:61672.0,61650.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.10/7.28  62065[17:Spt:61674.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2)*.
% 7.10/7.28  62068[17:Res:62065.0,96.0] ||  -> m_user_v_ack(c_e_h_2,c_u,s2)*.
% 7.10/7.28  62069[17:Res:62068.0,34.0] || m_and_h_gate_v_in2(c_e_h_2,c_d,s2)*+ -> .
% 7.10/7.28  62071[17:Res:2305.0,62069.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1) m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.10/7.28  62082[18:Spt:62071.1] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.10/7.28  62083[18:Res:62082.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  62088[18:Res:62083.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  62090[18:Res:62088.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  62092[18:MRR:62090.0,13.0] ||  -> .
% 7.10/7.28  62093[18:Spt:62092.0,62071.1,62082.0] || m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*+ -> .
% 7.10/7.28  62094[18:Spt:62092.0,62071.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1)*.
% 7.10/7.28  62097[18:Res:62094.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.28  62104[18:Res:62097.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.28  62142[18:Res:62104.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  62144[18:MRR:62142.0,62097.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  62145[18:Res:62144.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.28  62146[18:Res:62144.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.28  62147[19:Spt:62145.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  62150[19:Res:62147.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.10/7.28  62153[19:MRR:62150.0,62093.0] ||  -> .
% 7.10/7.28  62154[19:Spt:62153.0,62145.0,62147.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*+ -> .
% 7.10/7.28  62155[19:Spt:62153.0,62145.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.28  62157[19:MRR:62146.0,62154.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.28  62165[19:Res:62157.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  62166[19:MRR:62165.0,13.0] ||  -> .
% 7.10/7.28  62167[17:Spt:62166.0,61674.0,62065.0] || m_and_h_gate_v_out(c_e_h_2,c_r,s2)*+ -> .
% 7.10/7.28  62168[17:Spt:62166.0,61674.1] ||  -> node20(c_e_h_2,c_r,s2)*.
% 7.10/7.28  62172[17:Res:62168.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s2)*.
% 7.10/7.28  62174[17:Res:62172.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.10/7.28  62195[17:Res:62174.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.10/7.28  62238[17:Res:62195.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.28  62240[17:MRR:62238.0,62174.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.28  62260[17:Res:62240.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.28  62261[17:Res:62240.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.28  62262[18:Spt:62260.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.28  62267[18:Res:62262.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.28  62278[18:Res:62267.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  62280[18:MRR:62278.0,62262.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  62281[18:Res:62280.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.28  62282[18:Res:62280.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.28  62283[19:Spt:62281.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  62288[19:Res:62283.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  62291[19:Res:62288.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  62293[19:MRR:62291.0,13.0] ||  -> .
% 7.10/7.28  62294[19:Spt:62293.0,62281.0,62283.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)* -> .
% 7.10/7.28  62295[19:Spt:62293.0,62281.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.28  62297[19:MRR:62282.0,62294.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.28  62302[19:Res:62297.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  62303[19:MRR:62302.0,13.0] ||  -> .
% 7.10/7.28  62304[18:Spt:62303.0,62260.0,62262.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*+ -> .
% 7.10/7.28  62305[18:Spt:62303.0,62260.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.28  62307[18:MRR:62261.0,62304.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.28  62320[18:Res:62307.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  62321[18:MRR:62320.0,13.0] ||  -> .
% 7.10/7.28  62322[11:Spt:62321.0,18342.1,18351.0] || xuntil28(s4)*+ -> .
% 7.10/7.28  62323[11:Spt:62321.0,18342.0] ||  -> node23(s4)*.
% 7.10/7.28  62324[11:MRR:18348.2,62322.0] ||  -> node21(c_e_h_2,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_2,c_r,s3).
% 7.10/7.28  62361[12:Spt:62324.0] ||  -> node21(c_e_h_2,c_r,s3,s4)*.
% 7.10/7.28  62362[12:Res:62361.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_r,s4)+ -> node20(c_e_h_2,c_r,s3)*.
% 7.10/7.28  62369[12:Res:218.1,62362.0] node23(s4) ||  -> node20(c_e_h_2,c_r,s3)*.
% 7.10/7.28  62370[12:SSi:62369.0,5.0,2015.0,62323.0] ||  -> node20(c_e_h_2,c_r,s3)*.
% 7.10/7.28  62371[12:Res:62370.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s3)*.
% 7.10/7.28  62372[12:Res:62370.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s3)*.
% 7.10/7.28  62375[12:Res:62371.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s3)*.
% 7.10/7.28  62376[12:Res:62372.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s3)*.
% 7.10/7.28  62380[12:Res:62375.0,582.0] ||  -> node16(c_e_h_2,c_e,s2) node14(c_e_h_2,c_e,s2,s3)* m_c_h_element_v_out(c_e_h_2,c_e,s2).
% 7.10/7.28  62382[12:Res:62375.0,509.0] ||  -> node17(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.10/7.28  62390[12:Res:62376.0,390.0] ||  -> node10(c_e_h_2,c_m,s2,s3)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2).
% 7.10/7.28  62412[12:Res:62382.1,586.0] ||  -> node17(c_e_h_2,c_e,s2) node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.10/7.28  62414[12:Res:62382.1,511.0] ||  -> node17(c_e_h_2,c_e,s2) node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.28  62417[12:Res:62382.1,87.0] ||  -> node17(c_e_h_2,c_e,s2) m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.10/7.28  62424[13:Spt:62417.0] ||  -> node17(c_e_h_2,c_e,s2)*.
% 7.10/7.28  62425[13:Res:62424.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s2)*+ -> m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.28  62497[12:Res:62390.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s3) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) node9(c_e_h_2,c_m,s2)*.
% 7.10/7.28  62499[12:MRR:62497.0,62376.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) node9(c_e_h_2,c_m,s2)*.
% 7.10/7.28  62500[12:Res:62499.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s2)*.
% 7.10/7.28  62501[12:Res:62499.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s2)*.
% 7.10/7.28  62502[14:Spt:62500.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.10/7.28  62507[14:Res:62502.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.10/7.28  62530[14:Res:62507.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.28  62532[14:MRR:62530.0,62502.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.28  62533[14:Res:62532.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.28  62534[14:Res:62532.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.28  62535[15:Spt:62533.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.28  62540[15:Res:62535.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.28  62562[15:Res:62540.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  62564[15:MRR:62562.0,62535.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  62565[15:Res:62564.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.28  62566[15:Res:62564.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.28  62567[16:Spt:62565.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  62572[16:Res:62567.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  62583[16:Res:62572.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  62585[16:MRR:62583.0,13.0] ||  -> .
% 7.10/7.28  62586[16:Spt:62585.0,62565.0,62567.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)* -> .
% 7.10/7.28  62587[16:Spt:62585.0,62565.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.28  62589[16:MRR:62566.0,62586.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.28  62594[16:Res:62589.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  62595[16:MRR:62594.0,13.0] ||  -> .
% 7.10/7.28  62596[15:Spt:62595.0,62533.0,62535.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*+ -> .
% 7.10/7.28  62597[15:Spt:62595.0,62533.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.28  62599[15:MRR:62534.0,62596.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.28  62612[15:Res:62599.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  62613[15:MRR:62612.0,13.0] ||  -> .
% 7.10/7.28  62614[14:Spt:62613.0,62500.0,62502.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*+ -> .
% 7.10/7.28  62615[14:Spt:62613.0,62500.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s2)*.
% 7.10/7.28  62703[12:Res:62380.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s3) -> node16(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)* m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.28  62705[12:MRR:62703.0,62375.0] ||  -> node16(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)* m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.28  62706[15:Spt:62705.2] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s2)*.
% 7.10/7.28  62708[15:Res:62706.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s2)*.
% 7.10/7.28  62714[15:Res:62708.0,410.0] ||  -> node21(c_e_h_2,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_2,c_c,s1).
% 7.10/7.28  62729[15:Res:62714.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s2) -> m_and_h_gate_v_out(c_e_h_2,c_c,s1) node20(c_e_h_2,c_c,s1)*.
% 7.10/7.28  62731[15:MRR:62729.0,62708.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1) node20(c_e_h_2,c_c,s1)*.
% 7.10/7.28  62732[15:Res:62731.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)* m_and_h_gate_v_in1(c_e_h_2,c_c,s1).
% 7.10/7.28  62734[16:Spt:62732.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)*.
% 7.10/7.28  62736[16:Res:62734.0,412.0] ||  -> node21(c_e_h_2,c_c,s0,s1)*.
% 7.10/7.28  62759[16:Res:62736.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s1) -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.28  62761[16:MRR:62759.0,62734.0] ||  -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.28  62765[16:Res:62761.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s0)*.
% 7.10/7.28  62772[16:Res:62765.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s0)*.
% 7.10/7.28  62773[16:MRR:62772.0,121.0] ||  -> .
% 7.10/7.28  62774[16:Spt:62773.0,62732.0,62734.0] || m_and_h_gate_v_out(c_e_h_2,c_c,s1)*+ -> .
% 7.10/7.28  62775[16:Spt:62773.0,62732.1] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s1)*.
% 7.10/7.28  62779[16:Res:62775.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s1)*.
% 7.10/7.28  62787[16:Res:62779.0,375.0] ||  -> node12(c_e_h_2,c_a,s0,s1)*.
% 7.10/7.28  62794[16:Res:62787.0,123.1] || m_mutex_h_half_v_out(c_e_h_2,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_2,c_a,s0).
% 7.10/7.28  62796[16:MRR:62794.0,62779.0] ||  -> m_mutex_h_half_v_inp(c_e_h_2,c_a,s0)*.
% 7.10/7.28  62797[16:Res:62796.0,18.0] ||  -> m_user_v_req(c_e_h_2,c_u,s0)*.
% 7.10/7.28  62798[16:MRR:62797.0,106.0] ||  -> .
% 7.10/7.28  62799[15:Spt:62798.0,62705.2,62706.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s2)*+ -> .
% 7.10/7.28  62800[15:Spt:62798.0,62705.0,62705.1] ||  -> node16(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.10/7.28  62801[15:MRR:62425.1,62799.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s2)*+ -> .
% 7.10/7.28  62802[15:Res:62800.1,586.0] ||  -> node16(c_e_h_2,c_e,s2) node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.10/7.28  62804[15:Res:62800.1,511.0] ||  -> node16(c_e_h_2,c_e,s2) node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.28  62807[15:Res:62800.1,87.0] ||  -> node16(c_e_h_2,c_e,s2) m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.10/7.28  62809[16:Spt:62807.0] ||  -> node16(c_e_h_2,c_e,s2)*.
% 7.10/7.28  62811[16:Res:62809.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s2)* m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.28  62812[16:MRR:62811.0,62811.1,62801.0,62799.0] ||  -> .
% 7.10/7.28  62813[16:Spt:62812.0,62807.0,62809.0] || node16(c_e_h_2,c_e,s2)*+ -> .
% 7.10/7.28  62814[16:Spt:62812.0,62807.1] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.10/7.28  62815[16:MRR:62800.0,62813.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.10/7.28  62817[16:MRR:62804.0,62813.0] ||  -> node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.28  62818[16:MRR:62802.0,62813.0] ||  -> node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.10/7.28  62829[16:Res:62817.1,595.0] ||  -> node17(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.28  62831[16:Res:62817.1,515.0] ||  -> node17(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.10/7.28  62835[17:Spt:62831.0] ||  -> node17(c_e_h_2,c_e,s1)*.
% 7.10/7.28  62836[17:Res:62835.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.28  62975[16:Res:62818.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s2) -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.28  62977[16:MRR:62975.0,62815.0] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.28  62978[18:Spt:62977.2] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s1)*.
% 7.10/7.28  62980[18:Res:62978.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)*.
% 7.10/7.28  62986[18:Res:62980.0,412.0] ||  -> node21(c_e_h_2,c_c,s0,s1)*.
% 7.10/7.28  63013[18:Res:62986.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s1) -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.28  63015[18:MRR:63013.0,62980.0] ||  -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.28  63016[18:Res:63015.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s0)*.
% 7.10/7.28  63027[18:Res:63016.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s0)*.
% 7.10/7.28  63028[18:MRR:63027.0,121.0] ||  -> .
% 7.10/7.28  63029[18:Spt:63028.0,62977.2,62978.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.28  63030[18:Spt:63028.0,62977.0,62977.1] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.28  63031[18:MRR:62836.1,63029.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.28  63033[18:Res:63030.1,595.0] ||  -> node16(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.28  63035[18:Res:63030.1,515.0] ||  -> node16(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63039[19:Spt:63035.0] ||  -> node16(c_e_h_2,c_e,s1)*.
% 7.10/7.28  63041[19:Res:63039.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.28  63042[19:MRR:63041.0,63041.1,63031.0,63029.0] ||  -> .
% 7.10/7.28  63043[19:Spt:63042.0,63035.0,63039.0] || node16(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.28  63044[19:Spt:63042.0,63035.1] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63045[19:MRR:63030.0,63043.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.28  63048[19:MRR:63033.0,63043.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.28  63049[19:Res:63044.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.28  63050[19:Res:63044.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63059[19:Res:63048.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.28  63061[19:MRR:63059.0,63045.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63062[20:Spt:63061.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63063[20:Res:63062.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.10/7.28  63064[20:Res:63062.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.28  63065[20:MRR:63064.0,63049.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63066[20:MRR:63050.0,63065.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63067[20:MRR:63063.0,63063.1,63066.0,63065.0] ||  -> .
% 7.10/7.28  63068[20:Spt:63067.0,63061.0,63062.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.10/7.28  63069[20:Spt:63067.0,63061.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63072[20:Res:63069.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.10/7.28  63073[20:MRR:63072.0,142.0] ||  -> .
% 7.10/7.28  63074[17:Spt:63073.0,62831.0,62835.0] || node17(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.28  63075[17:Spt:63073.0,62831.1] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63076[17:MRR:62817.0,63074.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.28  63079[17:MRR:62829.0,63074.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.28  63080[17:Res:63075.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.28  63081[17:Res:63075.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63091[17:Res:63079.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.28  63093[17:MRR:63091.0,63076.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63094[18:Spt:63093.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63095[18:Res:63094.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.10/7.28  63096[18:Res:63094.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.28  63097[18:MRR:63096.0,63080.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63098[18:MRR:63081.0,63097.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63099[18:MRR:63095.0,63095.1,63098.0,63097.0] ||  -> .
% 7.10/7.28  63100[18:Spt:63099.0,63093.0,63094.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.10/7.28  63101[18:Spt:63099.0,63093.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63104[18:Res:63101.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.10/7.28  63105[18:MRR:63104.0,142.0] ||  -> .
% 7.10/7.28  63106[13:Spt:63105.0,62417.0,62424.0] || node17(c_e_h_2,c_e,s2)*+ -> .
% 7.10/7.28  63107[13:Spt:63105.0,62417.1] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.10/7.28  63108[13:MRR:62382.0,63106.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.10/7.28  63110[13:MRR:62414.0,63106.0] ||  -> node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.28  63111[13:MRR:62412.0,63106.0] ||  -> node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.10/7.28  63155[13:Res:63110.1,595.0] ||  -> node17(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.28  63157[13:Res:63110.1,515.0] ||  -> node17(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63335[14:Spt:63110.0] ||  -> node17(c_e_h_2,c_e,s1)*.
% 7.10/7.28  63336[14:Res:63335.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.28  63344[15:Spt:62501.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.10/7.28  63349[15:Res:63344.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.10/7.28  63364[15:Res:63349.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.28  63366[15:MRR:63364.0,63344.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.28  63367[15:Res:63366.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.28  63368[15:Res:63366.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.28  63369[16:Spt:63367.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.28  63374[16:Res:63369.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.28  63388[16:Res:63374.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  63390[16:MRR:63388.0,63369.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  63391[16:Res:63390.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.28  63392[16:Res:63390.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.28  63393[17:Spt:63391.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  63398[17:Res:63393.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  63404[17:Res:63398.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  63406[17:MRR:63404.0,13.0] ||  -> .
% 7.10/7.28  63407[17:Spt:63406.0,63391.0,63393.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)* -> .
% 7.10/7.28  63408[17:Spt:63406.0,63391.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.28  63410[17:MRR:63392.0,63407.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.28  63415[17:Res:63410.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  63416[17:MRR:63415.0,13.0] ||  -> .
% 7.10/7.28  63417[16:Spt:63416.0,63367.0,63369.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*+ -> .
% 7.10/7.28  63418[16:Spt:63416.0,63367.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.28  63420[16:MRR:63368.0,63417.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.28  63433[16:Res:63420.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  63434[16:MRR:63433.0,13.0] ||  -> .
% 7.10/7.28  63435[15:Spt:63434.0,62501.0,63344.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*+ -> .
% 7.10/7.28  63436[15:Spt:63434.0,62501.1] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s2)*.
% 7.10/7.28  63592[13:Res:63111.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s2) -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.28  63594[13:MRR:63592.0,63108.0] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.28  63595[16:Spt:63594.2] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s1)*.
% 7.10/7.28  63597[16:Res:63595.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)*.
% 7.10/7.28  63600[16:Res:63597.0,412.0] ||  -> node21(c_e_h_2,c_c,s0,s1)*.
% 7.10/7.28  63609[16:Res:63600.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s1) -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.28  63611[16:MRR:63609.0,63597.0] ||  -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.28  63612[16:Res:63611.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s0)*.
% 7.10/7.28  63614[16:Res:63612.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s0)*.
% 7.10/7.28  63615[16:MRR:63614.0,121.0] ||  -> .
% 7.10/7.28  63616[16:Spt:63615.0,63594.2,63595.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.28  63617[16:Spt:63615.0,63594.0,63594.1] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.28  63618[16:MRR:63336.1,63616.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.28  63620[16:Res:63617.1,595.0] ||  -> node16(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.28  63622[16:Res:63617.1,515.0] ||  -> node16(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63626[17:Spt:63622.0] ||  -> node16(c_e_h_2,c_e,s1)*.
% 7.10/7.28  63628[17:Res:63626.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.28  63629[17:MRR:63628.0,63628.1,63618.0,63616.0] ||  -> .
% 7.10/7.28  63630[17:Spt:63629.0,63622.0,63626.0] || node16(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.28  63631[17:Spt:63629.0,63622.1] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63632[17:MRR:63617.0,63630.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.28  63635[17:MRR:63620.0,63630.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.28  63636[17:Res:63631.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.28  63637[17:Res:63631.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63646[17:Res:63635.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.28  63648[17:MRR:63646.0,63632.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63649[18:Spt:63648.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63650[18:Res:63649.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.10/7.28  63651[18:Res:63649.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.28  63652[18:MRR:63651.0,63636.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63653[18:MRR:63637.0,63652.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63654[18:MRR:63650.0,63650.1,63653.0,63652.0] ||  -> .
% 7.10/7.28  63655[18:Spt:63654.0,63648.0,63649.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.10/7.28  63656[18:Spt:63654.0,63648.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63659[18:Res:63656.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.10/7.28  63660[18:MRR:63659.0,142.0] ||  -> .
% 7.10/7.28  63661[14:Spt:63660.0,63110.0,63335.0] || node17(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.28  63662[14:Spt:63660.0,63110.1] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.28  63664[14:MRR:63157.0,63661.0] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63666[14:MRR:63155.0,63661.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.28  63674[14:Res:63664.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.28  63675[14:Res:63664.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63706[14:Res:63666.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.28  63708[14:MRR:63706.0,63662.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63709[15:Spt:63708.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63710[15:Res:63709.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.10/7.28  63711[15:Res:63709.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.28  63712[15:MRR:63711.0,63674.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63713[15:MRR:63675.0,63712.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63714[15:MRR:63710.0,63710.1,63713.0,63712.0] ||  -> .
% 7.10/7.28  63715[15:Spt:63714.0,63708.0,63709.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.10/7.28  63716[15:Spt:63714.0,63708.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.28  63719[15:Res:63716.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.10/7.28  63720[15:MRR:63719.0,142.0] ||  -> .
% 7.10/7.28  63721[12:Spt:63720.0,62324.0,62361.0] || node21(c_e_h_2,c_r,s3,s4)*+ -> .
% 7.10/7.28  63722[12:Spt:63720.0,62324.1] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s3)*.
% 7.10/7.28  63725[12:Res:63722.0,409.0] ||  -> node21(c_e_h_2,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_2,c_r,s2).
% 7.10/7.28  63774[12:Res:63725.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_r,s3) -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.10/7.28  63776[12:MRR:63774.0,63722.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.10/7.28  63777[13:Spt:63776.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2)*.
% 7.10/7.28  63780[13:Res:63777.0,96.0] ||  -> m_user_v_ack(c_e_h_2,c_u,s2)*.
% 7.10/7.28  63781[13:Res:63780.0,34.0] || m_and_h_gate_v_in2(c_e_h_2,c_d,s2)*+ -> .
% 7.10/7.28  63786[13:Res:2305.0,63781.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1) m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.10/7.28  63790[14:Spt:63786.1] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.10/7.28  63791[14:Res:63790.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  63796[14:Res:63791.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  63801[14:Res:63796.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  63803[14:MRR:63801.0,13.0] ||  -> .
% 7.10/7.28  63804[14:Spt:63803.0,63786.1,63790.0] || m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*+ -> .
% 7.10/7.28  63805[14:Spt:63803.0,63786.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1)*.
% 7.10/7.28  63808[14:Res:63805.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.28  63815[14:Res:63808.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.28  63915[14:Res:63815.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  63917[14:MRR:63915.0,63808.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  63918[14:Res:63917.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.28  63919[14:Res:63917.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.28  63920[15:Spt:63918.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  63923[15:Res:63920.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.10/7.28  63926[15:MRR:63923.0,63804.0] ||  -> .
% 7.10/7.28  63927[15:Spt:63926.0,63918.0,63920.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*+ -> .
% 7.10/7.28  63928[15:Spt:63926.0,63918.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.28  63930[15:MRR:63919.0,63927.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.28  63938[15:Res:63930.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  63939[15:MRR:63938.0,13.0] ||  -> .
% 7.10/7.28  63940[13:Spt:63939.0,63776.0,63777.0] || m_and_h_gate_v_out(c_e_h_2,c_r,s2)*+ -> .
% 7.10/7.28  63941[13:Spt:63939.0,63776.1] ||  -> node20(c_e_h_2,c_r,s2)*.
% 7.10/7.28  63945[13:Res:63941.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s2)*.
% 7.10/7.28  63947[13:Res:63945.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.10/7.28  63968[13:Res:63947.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.10/7.28  64066[13:Res:63968.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.28  64068[13:MRR:64066.0,63947.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.28  64089[13:Res:64068.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.28  64167[14:Spt:64068.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.28  64172[14:Res:64167.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.28  64245[14:Res:64172.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  64247[14:MRR:64245.0,64167.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  64248[14:Res:64247.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.28  64249[14:Res:64247.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.28  64253[15:Spt:64248.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  64258[15:Res:64253.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  64261[15:Res:64258.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  64263[15:MRR:64261.0,13.0] ||  -> .
% 7.10/7.28  64264[15:Spt:64263.0,64248.0,64253.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*+ -> .
% 7.10/7.28  64265[15:Spt:64263.0,64248.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.28  64267[15:MRR:64249.0,64264.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.28  64275[15:Res:64267.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  64276[15:MRR:64275.0,13.0] ||  -> .
% 7.10/7.28  64277[14:Spt:64276.0,64068.0,64167.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)* -> .
% 7.10/7.28  64278[14:Spt:64276.0,64068.1] ||  -> node9(c_e_h_2,c_m,s1)*.
% 7.10/7.28  64279[14:MRR:64089.0,64277.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.28  64288[14:Res:64279.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  64289[14:MRR:64288.0,13.0] ||  -> .
% 7.10/7.28  64290[8:Spt:64289.0,1835.0,1839.0] || node21(c_e_h_3,c_r,s2,s3)*+ -> .
% 7.10/7.28  64291[8:Spt:64289.0,1835.1,1835.2] ||  -> m_and_h_gate_v_out(c_e_h_3,c_r,s2)* xuntil28(s3).
% 7.10/7.28  64295[8:MRR:1838.1,64290.0] until2p29(s3) ||  -> m_and_h_gate_v_out(c_e_h_3,c_r,s2)* xuntil2p30(s3).
% 7.10/7.28  64308[9:Spt:64291.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_r,s2)*.
% 7.10/7.28  64311[9:Res:64308.0,96.0] ||  -> m_user_v_ack(c_e_h_3,c_u,s2)*.
% 7.10/7.28  64313[9:Res:64311.0,34.0] || m_and_h_gate_v_in2(c_e_h_3,c_d,s2)*+ -> .
% 7.10/7.28  64315[8:Res:600.2,64290.0] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_d,s4) m_and_h_gate_v_in2(c_e_h_3,c_r,s3) m_and_h_gate_v_out(c_e_h_3,c_r,s2)*.
% 7.10/7.28  64316[8:Res:597.2,64290.0] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_d,s4) m_and_h_gate_v_in1(c_e_h_3,c_r,s3) m_and_h_gate_v_out(c_e_h_3,c_r,s2)*.
% 7.10/7.28  64327[9:Res:662.0,64313.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s1) m_and_h_gate_v_in1(c_e_h_3,c_r,s0)*.
% 7.10/7.28  64328[9:MRR:64327.0,64327.1,916.0,489.0] ||  -> .
% 7.10/7.28  64329[9:Spt:64328.0,64291.0,64308.0] || m_and_h_gate_v_out(c_e_h_3,c_r,s2)*+ -> .
% 7.10/7.28  64330[9:Spt:64328.0,64291.1] ||  -> xuntil28(s3)*.
% 7.10/7.28  64331[9:MRR:174.0,64330.0] ||  -> until27(s4)*.
% 7.10/7.28  64332[9:MRR:1970.0,64331.0] ||  -> node21(c_e_h_2,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_2,c_r,s3) node24(s4) xuntil28(s4).
% 7.10/7.28  64341[9:MRR:64295.1,64329.0] until2p29(s3) ||  -> xuntil2p30(s3)*.
% 7.10/7.28  64342[9:MRR:64315.2,64329.0] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_d,s4)* m_and_h_gate_v_in2(c_e_h_3,c_r,s3).
% 7.10/7.28  64343[9:MRR:64316.2,64329.0] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_d,s4)* m_and_h_gate_v_in1(c_e_h_3,c_r,s3).
% 7.10/7.28  64369[10:Spt:64342.0] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_d,s4)*.
% 7.10/7.28  64370[10:Res:64369.0,278.1] node25(s4) ||  -> .
% 7.10/7.28  64371[10:Res:64369.0,277.1] node24(s4) ||  -> .
% 7.10/7.28  64373[10:MRR:1971.3,64371.0] until2p29(s4) ||  -> node21(c_e_h_2,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_2,c_r,s3).
% 7.10/7.28  64375[10:SoR:64370.0,156.1] node26(s4) ||  -> node23(s4) node24(s4)*.
% 7.10/7.28  64376[10:MRR:64375.2,64371.0] node26(s4) ||  -> node23(s4)*.
% 7.10/7.28  64377[10:SoR:64376.0,161.2] until2p29(s4) ||  -> node23(s4)* xuntil2p30(s4).
% 7.10/7.28  64378[10:SoR:64376.0,157.2] until27(s4) ||  -> node23(s4)* xuntil28(s4).
% 7.10/7.28  64379[10:MRR:64377.2,167.0] until2p29(s4) ||  -> node23(s4)*.
% 7.10/7.28  64380[10:SSi:64378.0,5.0,64331.0] ||  -> node23(s4)* xuntil28(s4).
% 7.10/7.28  64381[11:Spt:64380.1] ||  -> xuntil28(s4)*.
% 7.10/7.28  64382[11:MRR:168.0,64381.0] ||  -> loop*.
% 7.10/7.28  64383[11:MRR:178.0,64381.0] || trans(s4,u)*+ -> until2p29(u).
% 7.10/7.28  64384[11:MRR:7.0,64382.0] ||  -> trans(s4,s4) trans(s4,s3) trans(s4,s2) trans(s4,s1) trans(s4,s0)*.
% 7.10/7.28  64390[11:Res:64384.4,160.2] xuntil28(s4) last(s4) ||  -> trans(s4,s4) trans(s4,s3) trans(s4,s2) trans(s4,s1)* until2p29(s0).
% 7.10/7.28  64392[11:SSi:64390.1,64390.0,5.0,64331.0,64381.0,5.0,64331.0,64381.0] ||  -> trans(s4,s4) trans(s4,s3) trans(s4,s2) trans(s4,s1)* until2p29(s0).
% 7.10/7.28  64397[12:Spt:64392.0] ||  -> trans(s4,s4)*.
% 7.10/7.28  64405[12:Res:64397.0,64383.0] ||  -> until2p29(s4)*.
% 7.10/7.28  64406[12:MRR:181.0,64405.0] ||  -> node26(s4)*.
% 7.10/7.28  64407[12:MRR:64379.0,64405.0] ||  -> node23(s4)*.
% 7.10/7.28  64412[12:MRR:524.0,64407.0] ||  -> node21(c_e_h_1,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_1,c_r,s3).
% 7.10/7.28  64452[13:Spt:64412.0] ||  -> node21(c_e_h_1,c_r,s3,s4)*.
% 7.10/7.28  64453[13:Res:64452.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s4)+ -> node20(c_e_h_1,c_r,s3)*.
% 7.10/7.28  64528[13:Res:220.1,64453.0] node23(s4) ||  -> node20(c_e_h_1,c_r,s3)*.
% 7.10/7.28  64529[13:SSi:64528.0,5.0,64331.0,64381.0,64405.0,64406.0,64407.0] ||  -> node20(c_e_h_1,c_r,s3)*.
% 7.10/7.28  64532[13:Res:64529.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s3)*.
% 7.10/7.28  64533[13:Res:64529.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s3)*.
% 7.10/7.28  64536[13:Res:64532.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s3)*.
% 7.10/7.28  64537[13:Res:64533.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s3)*.
% 7.10/7.28  64541[13:Res:64536.0,582.0] ||  -> node16(c_e_h_1,c_e,s2) node14(c_e_h_1,c_e,s2,s3)* m_c_h_element_v_out(c_e_h_1,c_e,s2).
% 7.10/7.28  64543[13:Res:64536.0,509.0] ||  -> node17(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.28  64551[13:Res:64537.0,390.0] ||  -> node10(c_e_h_1,c_m,s2,s3)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2).
% 7.10/7.28  64573[13:Res:64543.1,586.0] ||  -> node17(c_e_h_1,c_e,s2) node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.28  64575[13:Res:64543.1,511.0] ||  -> node17(c_e_h_1,c_e,s2) node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  64578[13:Res:64543.1,87.0] ||  -> node17(c_e_h_1,c_e,s2) m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.28  64585[14:Spt:64578.0] ||  -> node17(c_e_h_1,c_e,s2)*.
% 7.10/7.28  64586[14:Res:64585.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s2)*+ -> m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.28  64612[13:Res:64551.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s3) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) node9(c_e_h_1,c_m,s2)*.
% 7.10/7.28  64614[13:MRR:64612.0,64537.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) node9(c_e_h_1,c_m,s2)*.
% 7.10/7.28  64616[13:Res:64614.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s2)*.
% 7.10/7.28  64713[15:Spt:64614.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.10/7.28  64718[15:Res:64713.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.10/7.28  64723[15:Res:64718.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  64725[15:MRR:64723.0,64713.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  64726[15:Res:64725.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.28  64727[15:Res:64725.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  64728[16:Spt:64726.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.28  64733[16:Res:64728.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.28  64739[16:Res:64733.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  64741[16:MRR:64739.0,64728.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  64742[16:Res:64741.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  64743[16:Res:64741.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  64744[17:Spt:64742.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  64749[17:Res:64744.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  64752[17:Res:64749.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  64754[17:MRR:64752.0,10.0] ||  -> .
% 7.10/7.28  64755[17:Spt:64754.0,64742.0,64744.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.10/7.28  64756[17:Spt:64754.0,64742.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  64758[17:MRR:64743.0,64755.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  64766[17:Res:64758.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  64767[17:MRR:64766.0,10.0] ||  -> .
% 7.10/7.28  64768[16:Spt:64767.0,64726.0,64728.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)* -> .
% 7.10/7.28  64769[16:Spt:64767.0,64726.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.28  64771[16:MRR:64727.0,64768.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  64779[16:Res:64771.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  64780[16:MRR:64779.0,10.0] ||  -> .
% 7.10/7.28  64781[15:Spt:64780.0,64614.0,64713.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*+ -> .
% 7.10/7.28  64782[15:Spt:64780.0,64614.1] ||  -> node9(c_e_h_1,c_m,s2)*.
% 7.10/7.28  64799[13:Res:64541.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s3) -> node16(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.28  64801[13:MRR:64799.0,64536.0] ||  -> node16(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.28  64817[16:Spt:64801.2] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s2)*.
% 7.10/7.28  64819[16:Res:64817.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s2)*.
% 7.10/7.28  64831[16:Res:64819.0,410.0] ||  -> node21(c_e_h_1,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_1,c_c,s1).
% 7.10/7.28  64847[16:Res:64831.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s2) -> m_and_h_gate_v_out(c_e_h_1,c_c,s1) node20(c_e_h_1,c_c,s1)*.
% 7.10/7.28  64849[16:MRR:64847.0,64819.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1) node20(c_e_h_1,c_c,s1)*.
% 7.10/7.28  64850[16:Res:64849.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)* m_and_h_gate_v_in1(c_e_h_1,c_c,s1).
% 7.10/7.28  64852[17:Spt:64850.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)*.
% 7.10/7.28  64854[17:Res:64852.0,412.0] ||  -> node21(c_e_h_1,c_c,s0,s1)*.
% 7.10/7.28  64859[17:Res:64854.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s1) -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  64861[17:MRR:64859.0,64852.0] ||  -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  64862[17:Res:64861.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s0)*.
% 7.10/7.28  64864[17:Res:64862.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s0)*.
% 7.10/7.28  64865[17:MRR:64864.0,121.0] ||  -> .
% 7.10/7.28  64866[17:Spt:64865.0,64850.0,64852.0] || m_and_h_gate_v_out(c_e_h_1,c_c,s1)*+ -> .
% 7.10/7.28  64867[17:Spt:64865.0,64850.1] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s1)*.
% 7.10/7.28  64871[17:Res:64867.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s1)*.
% 7.10/7.28  64878[17:Res:64871.0,375.0] ||  -> node12(c_e_h_1,c_a,s0,s1)*.
% 7.10/7.28  64885[17:Res:64878.0,123.1] || m_mutex_h_half_v_out(c_e_h_1,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_1,c_a,s0).
% 7.10/7.28  64887[17:MRR:64885.0,64871.0] ||  -> m_mutex_h_half_v_inp(c_e_h_1,c_a,s0)*.
% 7.10/7.28  64888[17:Res:64887.0,18.0] ||  -> m_user_v_req(c_e_h_1,c_u,s0)*.
% 7.10/7.28  64889[17:MRR:64888.0,106.0] ||  -> .
% 7.10/7.28  64890[16:Spt:64889.0,64801.2,64817.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.28  64891[16:Spt:64889.0,64801.0,64801.1] ||  -> node16(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.28  64892[16:MRR:64586.1,64890.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.28  64893[16:Res:64891.1,586.0] ||  -> node16(c_e_h_1,c_e,s2) node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.28  64895[16:Res:64891.1,511.0] ||  -> node16(c_e_h_1,c_e,s2) node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  64898[16:Res:64891.1,87.0] ||  -> node16(c_e_h_1,c_e,s2) m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.28  64900[17:Spt:64898.0] ||  -> node16(c_e_h_1,c_e,s2)*.
% 7.10/7.28  64902[17:Res:64900.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.28  64903[17:MRR:64902.0,64902.1,64892.0,64890.0] ||  -> .
% 7.10/7.28  64904[17:Spt:64903.0,64898.0,64900.0] || node16(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.28  64905[17:Spt:64903.0,64898.1] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.28  64906[17:MRR:64891.0,64904.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.28  64908[17:MRR:64895.0,64904.0] ||  -> node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  64909[17:MRR:64893.0,64904.0] ||  -> node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.28  64922[17:Res:64908.1,595.0] ||  -> node17(c_e_h_1,c_e,s1) node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  64924[17:Res:64908.1,515.0] ||  -> node17(c_e_h_1,c_e,s1) node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  64928[18:Spt:64924.0] ||  -> node17(c_e_h_1,c_e,s1)*.
% 7.10/7.28  64929[18:Res:64928.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  65047[17:Res:64909.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s2) -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  65049[17:MRR:65047.0,64906.0] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  65050[19:Spt:65049.2] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s1)*.
% 7.10/7.28  65052[19:Res:65050.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)*.
% 7.10/7.28  65055[19:Res:65052.0,412.0] ||  -> node21(c_e_h_1,c_c,s0,s1)*.
% 7.10/7.28  65064[19:Res:65055.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s1) -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  65066[19:MRR:65064.0,65052.0] ||  -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  65067[19:Res:65066.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s0)*.
% 7.10/7.28  65069[19:Res:65067.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s0)*.
% 7.10/7.28  65070[19:MRR:65069.0,121.0] ||  -> .
% 7.10/7.28  65071[19:Spt:65070.0,65049.2,65050.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  65072[19:Spt:65070.0,65049.0,65049.1] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  65073[19:MRR:64929.1,65071.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  65075[19:Res:65072.1,595.0] ||  -> node16(c_e_h_1,c_e,s1) node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  65077[19:Res:65072.1,515.0] ||  -> node16(c_e_h_1,c_e,s1) node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  65081[20:Spt:65077.0] ||  -> node16(c_e_h_1,c_e,s1)*.
% 7.10/7.28  65083[20:Res:65081.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  65084[20:MRR:65083.0,65083.1,65073.0,65071.0] ||  -> .
% 7.10/7.28  65085[20:Spt:65084.0,65077.0,65081.0] || node16(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  65086[20:Spt:65084.0,65077.1] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  65087[20:MRR:65072.0,65085.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  65090[20:MRR:65075.0,65085.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  65091[20:Res:65086.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  65092[20:Res:65086.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  65101[20:Res:65090.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  65103[20:MRR:65101.0,65087.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  65104[21:Spt:65103.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.10/7.28  65105[21:Res:65104.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.10/7.28  65106[21:Res:65104.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  65107[21:MRR:65106.0,65091.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  65108[21:MRR:65092.0,65107.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  65109[21:MRR:65105.0,65105.1,65108.0,65107.0] ||  -> .
% 7.10/7.28  65110[21:Spt:65109.0,65103.0,65104.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.10/7.28  65111[21:Spt:65109.0,65103.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  65114[21:Res:65111.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.10/7.28  65115[21:MRR:65114.0,142.0] ||  -> .
% 7.10/7.28  65116[18:Spt:65115.0,64924.0,64928.0] || node17(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  65117[18:Spt:65115.0,64924.1] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  65118[18:MRR:64908.0,65116.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  65121[18:MRR:64922.0,65116.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  65122[18:Res:65117.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  65123[18:Res:65117.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  65138[18:Res:65121.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  65140[18:MRR:65138.0,65118.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  65141[19:Spt:65140.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.10/7.28  65142[19:Res:65141.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.10/7.28  65143[19:Res:65141.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  65144[19:MRR:65143.0,65122.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  65145[19:MRR:65123.0,65144.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  65146[19:MRR:65142.0,65142.1,65145.0,65144.0] ||  -> .
% 7.10/7.28  65147[19:Spt:65146.0,65140.0,65141.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.10/7.28  65148[19:Spt:65146.0,65140.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  65151[19:Res:65148.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.10/7.28  65152[19:MRR:65151.0,142.0] ||  -> .
% 7.10/7.28  65153[14:Spt:65152.0,64578.0,64585.0] || node17(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.28  65154[14:Spt:65152.0,64578.1] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.28  65155[14:MRR:64543.0,65153.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.28  65157[14:MRR:64575.0,65153.0] ||  -> node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  65158[14:MRR:64573.0,65153.0] ||  -> node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.28  65167[15:Spt:64616.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.10/7.28  65172[15:Res:65167.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.10/7.28  65214[15:Res:65172.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  65216[15:MRR:65214.0,65167.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  65217[15:Res:65216.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.28  65218[15:Res:65216.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  65219[16:Spt:65217.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.28  65224[16:Res:65219.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.28  65263[14:Res:65158.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s2) -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  65265[14:MRR:65263.0,65155.0] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  65276[16:Res:65224.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  65278[16:MRR:65276.0,65219.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  65279[16:Res:65278.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  65280[16:Res:65278.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  65281[17:Spt:65279.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  65286[17:Res:65281.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  65289[17:Res:65286.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  65291[17:MRR:65289.0,10.0] ||  -> .
% 7.10/7.28  65292[17:Spt:65291.0,65279.0,65281.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.10/7.28  65293[17:Spt:65291.0,65279.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  65295[17:MRR:65280.0,65292.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  65303[17:Res:65295.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  65304[17:MRR:65303.0,10.0] ||  -> .
% 7.10/7.28  65305[16:Spt:65304.0,65217.0,65219.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)* -> .
% 7.10/7.28  65306[16:Spt:65304.0,65217.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.28  65308[16:MRR:65218.0,65305.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  65316[16:Res:65308.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  65317[16:MRR:65316.0,10.0] ||  -> .
% 7.10/7.28  65318[15:Spt:65317.0,64616.0,65167.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*+ -> .
% 7.10/7.28  65319[15:Spt:65317.0,64616.1] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s2)*.
% 7.10/7.28  65327[16:Spt:65157.1] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  65329[16:Res:65327.0,595.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  65331[16:Res:65327.0,515.0] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  65335[16:Res:65331.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  65336[16:Res:65331.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  65360[16:Res:65329.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  65362[16:MRR:65360.0,65327.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  65363[17:Spt:65362.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.10/7.28  65364[17:Res:65363.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.10/7.28  65365[17:Res:65363.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  65366[17:MRR:65365.0,65335.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  65367[17:MRR:65336.0,65366.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  65368[17:MRR:65364.0,65364.1,65367.0,65366.0] ||  -> .
% 7.10/7.28  65369[17:Spt:65368.0,65362.0,65363.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.10/7.28  65370[17:Spt:65368.0,65362.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  65373[17:Res:65370.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.10/7.28  65374[17:MRR:65373.0,142.0] ||  -> .
% 7.10/7.28  65375[16:Spt:65374.0,65157.1,65327.0] || m_c_h_element_v_out(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  65376[16:Spt:65374.0,65157.0] ||  -> node17(c_e_h_1,c_e,s1)*.
% 7.10/7.28  65377[16:MRR:65265.1,65375.0] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_in1(c_e_h_1,c_e,s1)*.
% 7.10/7.28  65379[16:Res:65376.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  65380[16:Res:65376.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s1) -> m_c_h_element_v_in2(c_e_h_1,c_e,s1)*.
% 7.10/7.28  65394[17:Spt:65377.0] ||  -> node16(c_e_h_1,c_e,s1)*.
% 7.10/7.28  65395[17:Res:65394.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1) -> .
% 7.10/7.28  65396[17:Res:65394.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  65397[17:MRR:65396.0,65379.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s1)*.
% 7.10/7.28  65398[17:MRR:65380.0,65397.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s1)*.
% 7.10/7.28  65399[17:MRR:65395.0,65395.1,65398.0,65397.0] ||  -> .
% 7.10/7.28  65400[17:Spt:65399.0,65377.0,65394.0] || node16(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  65401[17:Spt:65399.0,65377.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s1)*.
% 7.10/7.28  65404[17:Res:65401.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)*.
% 7.10/7.28  65407[17:Res:65404.0,412.0] ||  -> node21(c_e_h_1,c_c,s0,s1)*.
% 7.10/7.28  65421[17:Res:65407.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s1) -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  65423[17:MRR:65421.0,65404.0] ||  -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  65424[17:Res:65423.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s0)*.
% 7.10/7.28  65426[17:Res:65424.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s0)*.
% 7.10/7.28  65427[17:MRR:65426.0,121.0] ||  -> .
% 7.10/7.28  65428[13:Spt:65427.0,64412.0,64452.0] || node21(c_e_h_1,c_r,s3,s4)*+ -> .
% 7.10/7.28  65429[13:Spt:65427.0,64412.1] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s3)*.
% 7.10/7.28  65432[13:Res:65429.0,409.0] ||  -> node21(c_e_h_1,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_1,c_r,s2).
% 7.10/7.28  65451[13:Res:65432.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s3) -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.10/7.28  65453[13:MRR:65451.0,65429.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.10/7.28  65817[14:Spt:65453.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2)*.
% 7.10/7.28  65820[14:Res:65817.0,96.0] ||  -> m_user_v_ack(c_e_h_1,c_u,s2)*.
% 7.10/7.28  65821[14:Res:65820.0,34.0] || m_and_h_gate_v_in2(c_e_h_1,c_d,s2)*+ -> .
% 7.10/7.28  65823[14:Res:2305.0,65821.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1) m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.28  65827[15:Spt:65823.1] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.28  65828[15:Res:65827.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  65833[15:Res:65828.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  65835[15:Res:65833.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  65837[15:MRR:65835.0,10.0] ||  -> .
% 7.10/7.28  65838[15:Spt:65837.0,65823.1,65827.0] || m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*+ -> .
% 7.10/7.28  65839[15:Spt:65837.0,65823.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1)*.
% 7.10/7.28  65842[15:Res:65839.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.28  65849[15:Res:65842.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.28  65881[15:Res:65849.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  65883[15:MRR:65881.0,65842.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  65884[15:Res:65883.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  65885[15:Res:65883.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  65886[16:Spt:65884.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  65889[16:Res:65886.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.28  65892[16:MRR:65889.0,65838.0] ||  -> .
% 7.10/7.28  65893[16:Spt:65892.0,65884.0,65886.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.10/7.28  65894[16:Spt:65892.0,65884.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  65896[16:MRR:65885.0,65893.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  65904[16:Res:65896.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  65905[16:MRR:65904.0,10.0] ||  -> .
% 7.10/7.28  65906[14:Spt:65905.0,65453.0,65817.0] || m_and_h_gate_v_out(c_e_h_1,c_r,s2)*+ -> .
% 7.10/7.28  65907[14:Spt:65905.0,65453.1] ||  -> node20(c_e_h_1,c_r,s2)*.
% 7.10/7.28  65911[14:Res:65907.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s2)*.
% 7.10/7.28  65913[14:Res:65911.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.10/7.28  65934[14:Res:65913.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.10/7.28  65989[14:Res:65934.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  65991[14:MRR:65989.0,65913.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  65992[14:Res:65991.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.28  65993[14:Res:65991.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  65997[15:Spt:65992.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.28  66002[15:Res:65997.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.28  66015[15:Res:66002.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  66017[15:MRR:66015.0,65997.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  66018[15:Res:66017.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  66019[15:Res:66017.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  66020[16:Spt:66018.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  66025[16:Res:66020.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  66028[16:Res:66025.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  66030[16:MRR:66028.0,10.0] ||  -> .
% 7.10/7.28  66031[16:Spt:66030.0,66018.0,66020.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.10/7.28  66032[16:Spt:66030.0,66018.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  66034[16:MRR:66019.0,66031.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  66042[16:Res:66034.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  66043[16:MRR:66042.0,10.0] ||  -> .
% 7.10/7.28  66044[15:Spt:66043.0,65992.0,65997.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)* -> .
% 7.10/7.28  66045[15:Spt:66043.0,65992.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.28  66047[15:MRR:65993.0,66044.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  66055[15:Res:66047.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  66056[15:MRR:66055.0,10.0] ||  -> .
% 7.10/7.28  66057[12:Spt:66056.0,64392.0,64397.0] || trans(s4,s4)*+ -> .
% 7.10/7.28  66058[12:Spt:66056.0,64392.1,64392.2,64392.3,64392.4] ||  -> trans(s4,s3) trans(s4,s2) trans(s4,s1)* until2p29(s0).
% 7.10/7.28  66066[13:Spt:66058.3] ||  -> until2p29(s0)*.
% 7.10/7.28  66067[13:MRR:237.0,66066.0] ||  -> xuntil2p30(s0)*.
% 7.10/7.28  66068[13:MRR:173.0,66067.0] ||  -> until2p29(s1)*.
% 7.10/7.28  66069[13:MRR:498.0,66068.0] ||  -> xuntil2p30(s1)*.
% 7.10/7.28  66070[13:MRR:172.0,66069.0] ||  -> until2p29(s2)*.
% 7.10/7.28  66071[13:MRR:924.0,66070.0] ||  -> xuntil2p30(s2)*.
% 7.10/7.28  66072[13:MRR:171.0,66071.0] ||  -> until2p29(s3)*.
% 7.10/7.28  66073[13:MRR:64341.0,66072.0] ||  -> xuntil2p30(s3)*.
% 7.10/7.28  66074[13:MRR:170.0,66073.0] ||  -> until2p29(s4)*.
% 7.10/7.28  66075[13:MRR:64379.0,66074.0] ||  -> node23(s4)*.
% 7.10/7.28  66076[13:MRR:181.0,66074.0] ||  -> node26(s4)*.
% 7.10/7.28  66077[13:MRR:64373.0,66074.0] ||  -> node21(c_e_h_2,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_2,c_r,s3).
% 7.10/7.28  66124[14:Spt:66077.0] ||  -> node21(c_e_h_2,c_r,s3,s4)*.
% 7.10/7.28  66125[14:Res:66124.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_r,s4)+ -> node20(c_e_h_2,c_r,s3)*.
% 7.10/7.28  66134[14:Res:218.1,66125.0] node23(s4) ||  -> node20(c_e_h_2,c_r,s3)*.
% 7.10/7.28  66135[14:SSi:66134.0,5.0,64331.0,64381.0,66074.0,66075.0,66076.0] ||  -> node20(c_e_h_2,c_r,s3)*.
% 7.10/7.28  66136[14:Res:66135.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s3)*.
% 7.10/7.28  66137[14:Res:66135.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s3)*.
% 7.10/7.28  66140[14:Res:66136.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s3)*.
% 7.10/7.28  66143[14:Res:66137.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s3)*.
% 7.10/7.28  66147[14:Res:66140.0,582.0] ||  -> node16(c_e_h_2,c_e,s2) node14(c_e_h_2,c_e,s2,s3)* m_c_h_element_v_out(c_e_h_2,c_e,s2).
% 7.10/7.28  66149[14:Res:66140.0,509.0] ||  -> node17(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.10/7.28  66157[14:Res:66143.0,390.0] ||  -> node10(c_e_h_2,c_m,s2,s3)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2).
% 7.10/7.28  66188[14:Res:66149.1,87.0] ||  -> node17(c_e_h_2,c_e,s2) m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.10/7.28  66195[15:Spt:66188.1] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.10/7.28  66196[15:Res:66195.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.10/7.28  66199[15:Res:66196.0,586.0] ||  -> node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.10/7.28  66201[15:Res:66196.0,511.0] ||  -> node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.28  66210[15:Res:66201.1,595.0] ||  -> node17(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.28  66212[15:Res:66201.1,515.0] ||  -> node17(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.10/7.28  66218[16:Spt:66212.0] ||  -> node17(c_e_h_2,c_e,s1)*.
% 7.10/7.28  66219[16:Res:66218.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.28  66322[14:Res:66157.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s3) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) node9(c_e_h_2,c_m,s2)*.
% 7.10/7.28  66324[14:MRR:66322.0,66143.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) node9(c_e_h_2,c_m,s2)*.
% 7.10/7.28  66325[14:Res:66324.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s2)*.
% 7.10/7.28  66326[14:Res:66324.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s2)*.
% 7.10/7.28  66327[17:Spt:66325.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.10/7.28  66332[17:Res:66327.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.10/7.28  66373[17:Res:66332.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.28  66375[17:MRR:66373.0,66327.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.28  66376[17:Res:66375.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.28  66377[17:Res:66375.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.28  66378[18:Spt:66376.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.28  66383[18:Res:66378.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.28  66440[18:Res:66383.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  66442[18:MRR:66440.0,66378.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  66443[18:Res:66442.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.28  66444[18:Res:66442.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.28  66445[19:Spt:66443.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  66450[19:Res:66445.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  66453[19:Res:66450.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  66455[19:MRR:66453.0,13.0] ||  -> .
% 7.10/7.28  66456[19:Spt:66455.0,66443.0,66445.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*+ -> .
% 7.10/7.28  66457[19:Spt:66455.0,66443.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.28  66459[19:MRR:66444.0,66456.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.28  66467[19:Res:66459.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  66468[19:MRR:66467.0,13.0] ||  -> .
% 7.10/7.28  66469[18:Spt:66468.0,66376.0,66378.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)* -> .
% 7.10/7.28  66470[18:Spt:66468.0,66376.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.28  66472[18:MRR:66377.0,66469.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.28  66480[18:Res:66472.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  66481[18:MRR:66480.0,13.0] ||  -> .
% 7.10/7.28  66482[17:Spt:66481.0,66325.0,66327.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*+ -> .
% 7.10/7.28  66483[17:Spt:66481.0,66325.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s2)*.
% 7.10/7.28  66858[15:Res:66199.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s2) -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.28  66860[15:MRR:66858.0,66196.0] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.28  66861[18:Spt:66860.2] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s1)*.
% 7.10/7.28  66863[18:Res:66861.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)*.
% 7.10/7.28  66866[18:Res:66863.0,412.0] ||  -> node21(c_e_h_2,c_c,s0,s1)*.
% 7.10/7.28  66875[18:Res:66866.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s1) -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.28  66877[18:MRR:66875.0,66863.0] ||  -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.28  66907[18:Res:66877.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s0)*.
% 7.10/7.28  66909[18:Res:66907.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s0)*.
% 7.10/7.28  66910[18:MRR:66909.0,121.0] ||  -> .
% 7.10/7.28  66911[18:Spt:66910.0,66860.2,66861.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.28  66912[18:Spt:66910.0,66860.0,66860.1] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.28  66913[18:MRR:66219.1,66911.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.28  66915[18:Res:66912.1,595.0] ||  -> node16(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.28  66917[18:Res:66912.1,515.0] ||  -> node16(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.10/7.28  66943[19:Spt:66917.0] ||  -> node16(c_e_h_2,c_e,s1)*.
% 7.10/7.28  66945[19:Res:66943.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.28  66946[19:MRR:66945.0,66945.1,66913.0,66911.0] ||  -> .
% 7.10/7.28  66947[19:Spt:66946.0,66917.0,66943.0] || node16(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.28  66948[19:Spt:66946.0,66917.1] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.10/7.28  66949[19:MRR:66912.0,66947.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.28  66952[19:MRR:66915.0,66947.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.28  66953[19:Res:66948.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.28  66954[19:Res:66948.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.28  66970[19:Res:66952.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.28  66972[19:MRR:66970.0,66949.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.28  66973[20:Spt:66972.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.10/7.28  66974[20:Res:66973.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.10/7.28  66975[20:Res:66973.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.28  66976[20:MRR:66975.0,66953.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.28  66977[20:MRR:66954.0,66976.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.28  66978[20:MRR:66974.0,66974.1,66977.0,66976.0] ||  -> .
% 7.10/7.28  66979[20:Spt:66978.0,66972.0,66973.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.10/7.28  66980[20:Spt:66978.0,66972.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.28  66983[20:Res:66980.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.10/7.28  66984[20:MRR:66983.0,142.0] ||  -> .
% 7.10/7.28  66985[16:Spt:66984.0,66212.0,66218.0] || node17(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.28  66986[16:Spt:66984.0,66212.1] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.10/7.28  66987[16:MRR:66201.0,66985.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.28  66990[16:MRR:66210.0,66985.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.28  66991[16:Res:66986.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.28  66992[16:Res:66986.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.28  67091[16:Res:66990.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.28  67093[16:MRR:67091.0,66987.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.28  67094[17:Spt:67093.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.10/7.28  67095[17:Res:67094.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.10/7.28  67096[17:Res:67094.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.28  67097[17:MRR:67096.0,66991.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.28  67098[17:MRR:66992.0,67097.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.28  67099[17:MRR:67095.0,67095.1,67098.0,67097.0] ||  -> .
% 7.10/7.28  67100[17:Spt:67099.0,67093.0,67094.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.10/7.28  67101[17:Spt:67099.0,67093.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.28  67104[17:Res:67101.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.10/7.28  67105[17:MRR:67104.0,142.0] ||  -> .
% 7.10/7.28  67106[15:Spt:67105.0,66188.1,66195.0] || m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*+ -> .
% 7.10/7.28  67107[15:Spt:67105.0,66188.0] ||  -> node17(c_e_h_2,c_e,s2)*.
% 7.10/7.28  67112[15:Res:67107.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s2)*+ -> m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.28  67120[16:Spt:66326.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.10/7.28  67125[16:Res:67120.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.10/7.28  67453[16:Res:67125.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.28  67455[16:MRR:67453.0,67120.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.28  67457[16:Res:67455.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.28  67520[17:Spt:67455.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.28  67525[17:Res:67520.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.28  67679[17:Res:67525.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  67681[17:MRR:67679.0,67520.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  67683[17:Res:67681.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.28  67716[18:Spt:67681.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  67721[18:Res:67716.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  67724[18:Res:67721.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  67726[18:MRR:67724.0,13.0] ||  -> .
% 7.10/7.28  67727[18:Spt:67726.0,67681.0,67716.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)* -> .
% 7.10/7.28  67728[18:Spt:67726.0,67681.1] ||  -> node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  67729[18:MRR:67683.0,67727.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.28  67735[18:Res:67729.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  67736[18:MRR:67735.0,13.0] ||  -> .
% 7.10/7.28  67737[17:Spt:67736.0,67455.0,67520.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)* -> .
% 7.10/7.28  67738[17:Spt:67736.0,67455.1] ||  -> node9(c_e_h_2,c_m,s1)*.
% 7.10/7.28  67739[17:MRR:67457.0,67737.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.28  67748[17:Res:67739.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  67749[17:MRR:67748.0,13.0] ||  -> .
% 7.10/7.28  67750[16:Spt:67749.0,66326.0,67120.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*+ -> .
% 7.10/7.28  67751[16:Spt:67749.0,66326.1] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s2)*.
% 7.10/7.28  68525[14:Res:66147.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s3) -> node16(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)* m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.28  68527[14:MRR:68525.0,66140.0] ||  -> node16(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)* m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.28  68528[17:Spt:68527.2] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s2)*.
% 7.10/7.28  68530[17:Res:68528.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s2)*.
% 7.10/7.28  68534[17:Res:68530.0,410.0] ||  -> node21(c_e_h_2,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_2,c_c,s1).
% 7.10/7.28  68547[17:Res:68534.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s2) -> m_and_h_gate_v_out(c_e_h_2,c_c,s1) node20(c_e_h_2,c_c,s1)*.
% 7.10/7.28  68549[17:MRR:68547.0,68530.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1) node20(c_e_h_2,c_c,s1)*.
% 7.10/7.28  68550[17:Res:68549.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)* m_and_h_gate_v_in1(c_e_h_2,c_c,s1).
% 7.10/7.28  68552[18:Spt:68550.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)*.
% 7.10/7.28  68554[18:Res:68552.0,412.0] ||  -> node21(c_e_h_2,c_c,s0,s1)*.
% 7.10/7.28  68563[18:Res:68554.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s1) -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.28  68565[18:MRR:68563.0,68552.0] ||  -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.28  68566[18:Res:68565.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s0)*.
% 7.10/7.28  68572[18:Res:68566.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s0)*.
% 7.10/7.28  68573[18:MRR:68572.0,121.0] ||  -> .
% 7.10/7.28  68574[18:Spt:68573.0,68550.0,68552.0] || m_and_h_gate_v_out(c_e_h_2,c_c,s1)*+ -> .
% 7.10/7.28  68575[18:Spt:68573.0,68550.1] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s1)*.
% 7.10/7.28  68579[18:Res:68575.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s1)*.
% 7.10/7.28  68585[18:Res:68579.0,375.0] ||  -> node12(c_e_h_2,c_a,s0,s1)*.
% 7.10/7.28  68594[18:Res:68585.0,123.1] || m_mutex_h_half_v_out(c_e_h_2,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_2,c_a,s0).
% 7.10/7.28  68596[18:MRR:68594.0,68579.0] ||  -> m_mutex_h_half_v_inp(c_e_h_2,c_a,s0)*.
% 7.10/7.28  68600[18:Res:68596.0,18.0] ||  -> m_user_v_req(c_e_h_2,c_u,s0)*.
% 7.10/7.28  68601[18:MRR:68600.0,106.0] ||  -> .
% 7.10/7.28  68602[17:Spt:68601.0,68527.2,68528.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s2)* -> .
% 7.10/7.28  68603[17:Spt:68601.0,68527.0,68527.1] ||  -> node16(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.10/7.28  68604[17:MRR:67112.1,68602.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s2)* -> .
% 7.10/7.28  68610[17:Res:68603.1,87.0] ||  -> node16(c_e_h_2,c_e,s2) m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.10/7.28  68611[17:MRR:68610.1,67106.0] ||  -> node16(c_e_h_2,c_e,s2)*.
% 7.10/7.28  68614[17:Res:68611.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s2)* m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.28  68615[17:MRR:68614.0,68614.1,68604.0,68602.0] ||  -> .
% 7.10/7.28  68616[14:Spt:68615.0,66077.0,66124.0] || node21(c_e_h_2,c_r,s3,s4)*+ -> .
% 7.10/7.28  68617[14:Spt:68615.0,66077.1] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s3)*.
% 7.10/7.28  68622[14:Res:68617.0,409.0] ||  -> node21(c_e_h_2,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_2,c_r,s2).
% 7.10/7.28  68673[14:Res:68622.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_r,s3) -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.10/7.28  68675[14:MRR:68673.0,68617.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.10/7.28  68676[15:Spt:68675.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2)*.
% 7.10/7.28  68679[15:Res:68676.0,96.0] ||  -> m_user_v_ack(c_e_h_2,c_u,s2)*.
% 7.10/7.28  68683[15:Res:68679.0,34.0] || m_and_h_gate_v_in2(c_e_h_2,c_d,s2)*+ -> .
% 7.10/7.28  68685[15:Res:2305.0,68683.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1) m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.10/7.28  68714[16:Spt:68685.1] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.10/7.28  68715[16:Res:68714.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  68720[16:Res:68715.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  68726[16:Res:68720.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  68728[16:MRR:68726.0,13.0] ||  -> .
% 7.10/7.28  68729[16:Spt:68728.0,68685.1,68714.0] || m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*+ -> .
% 7.10/7.28  68730[16:Spt:68728.0,68685.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1)*.
% 7.10/7.28  68733[16:Res:68730.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.28  68740[16:Res:68733.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.28  68832[16:Res:68740.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  68834[16:MRR:68832.0,68733.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  68835[16:Res:68834.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.28  68836[16:Res:68834.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.28  68837[17:Spt:68835.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  68840[17:Res:68837.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.10/7.28  68843[17:MRR:68840.0,68729.0] ||  -> .
% 7.10/7.28  68844[17:Spt:68843.0,68835.0,68837.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*+ -> .
% 7.10/7.28  68845[17:Spt:68843.0,68835.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.28  68847[17:MRR:68836.0,68844.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.28  68855[17:Res:68847.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  68856[17:MRR:68855.0,13.0] ||  -> .
% 7.10/7.28  68857[15:Spt:68856.0,68675.0,68676.0] || m_and_h_gate_v_out(c_e_h_2,c_r,s2)*+ -> .
% 7.10/7.28  68858[15:Spt:68856.0,68675.1] ||  -> node20(c_e_h_2,c_r,s2)*.
% 7.10/7.28  68862[15:Res:68858.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s2)*.
% 7.10/7.28  68864[15:Res:68862.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.10/7.28  68885[15:Res:68864.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.10/7.28  69019[15:Res:68885.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.28  69021[15:MRR:69019.0,68864.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.28  69023[15:Res:69021.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.28  69171[16:Spt:69021.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.28  69176[16:Res:69171.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.28  69274[16:Res:69176.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  69276[16:MRR:69274.0,69171.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.28  69277[16:Res:69276.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.28  69278[16:Res:69276.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.28  69300[17:Spt:69277.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  69305[17:Res:69300.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.28  69311[17:Res:69305.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  69313[17:MRR:69311.0,13.0] ||  -> .
% 7.10/7.28  69314[17:Spt:69313.0,69277.0,69300.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)* -> .
% 7.10/7.28  69315[17:Spt:69313.0,69277.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.28  69317[17:MRR:69278.0,69314.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.28  69322[17:Res:69317.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  69323[17:MRR:69322.0,13.0] ||  -> .
% 7.10/7.28  69324[16:Spt:69323.0,69021.0,69171.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*+ -> .
% 7.10/7.28  69325[16:Spt:69323.0,69021.1] ||  -> node9(c_e_h_2,c_m,s1)*.
% 7.10/7.28  69326[16:MRR:69023.0,69324.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.28  69340[16:Res:69326.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.28  69341[16:MRR:69340.0,13.0] ||  -> .
% 7.10/7.28  69342[13:Spt:69341.0,66058.3,66066.0] || until2p29(s0)*+ -> .
% 7.10/7.28  69343[13:Spt:69341.0,66058.0,66058.1,66058.2] ||  -> trans(s4,s3) trans(s4,s2) trans(s4,s1)*.
% 7.10/7.28  69351[13:Res:69343.2,64383.0] ||  -> trans(s4,s3) trans(s4,s2)* until2p29(s1).
% 7.10/7.28  69354[14:Spt:69351.2] ||  -> until2p29(s1)*.
% 7.10/7.28  69355[14:MRR:498.0,69354.0] ||  -> xuntil2p30(s1)*.
% 7.10/7.28  69356[14:MRR:172.0,69355.0] ||  -> until2p29(s2)*.
% 7.10/7.28  69357[14:MRR:924.0,69356.0] ||  -> xuntil2p30(s2)*.
% 7.10/7.28  69358[14:MRR:171.0,69357.0] ||  -> until2p29(s3)*.
% 7.10/7.28  69359[14:MRR:64341.0,69358.0] ||  -> xuntil2p30(s3)*.
% 7.10/7.28  69360[14:MRR:170.0,69359.0] ||  -> until2p29(s4)*.
% 7.10/7.28  69361[14:MRR:181.0,69360.0] ||  -> node26(s4)*.
% 7.10/7.28  69362[14:MRR:64379.0,69360.0] ||  -> node23(s4)*.
% 7.10/7.28  69367[14:MRR:524.0,69362.0] ||  -> node21(c_e_h_1,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_1,c_r,s3).
% 7.10/7.28  69400[15:Spt:69367.0] ||  -> node21(c_e_h_1,c_r,s3,s4)*.
% 7.10/7.28  69401[15:Res:69400.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s4)+ -> node20(c_e_h_1,c_r,s3)*.
% 7.10/7.28  69408[15:Res:220.1,69401.0] node23(s4) ||  -> node20(c_e_h_1,c_r,s3)*.
% 7.10/7.28  69409[15:SSi:69408.0,5.0,64331.0,64381.0,69360.0,69361.0,69362.0] ||  -> node20(c_e_h_1,c_r,s3)*.
% 7.10/7.28  69410[15:Res:69409.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s3)*.
% 7.10/7.28  69411[15:Res:69409.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s3)*.
% 7.10/7.28  69414[15:Res:69410.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s3)*.
% 7.10/7.28  69424[15:Res:69411.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s3)*.
% 7.10/7.28  69428[15:Res:69414.0,582.0] ||  -> node16(c_e_h_1,c_e,s2) node14(c_e_h_1,c_e,s2,s3)* m_c_h_element_v_out(c_e_h_1,c_e,s2).
% 7.10/7.28  69430[15:Res:69414.0,509.0] ||  -> node17(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.28  69438[15:Res:69424.0,390.0] ||  -> node10(c_e_h_1,c_m,s2,s3)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2).
% 7.10/7.28  69462[15:Res:69430.1,586.0] ||  -> node17(c_e_h_1,c_e,s2) node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.28  69464[15:Res:69430.1,511.0] ||  -> node17(c_e_h_1,c_e,s2) node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  69467[15:Res:69430.1,87.0] ||  -> node17(c_e_h_1,c_e,s2) m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.28  69474[16:Spt:69467.0] ||  -> node17(c_e_h_1,c_e,s2)*.
% 7.10/7.28  69475[16:Res:69474.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s2)*+ -> m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.28  69546[15:Res:69438.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s3) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) node9(c_e_h_1,c_m,s2)*.
% 7.10/7.28  69548[15:MRR:69546.0,69424.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) node9(c_e_h_1,c_m,s2)*.
% 7.10/7.28  69549[15:Res:69548.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s2)*.
% 7.10/7.28  69550[15:Res:69548.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s2)*.
% 7.10/7.28  69551[17:Spt:69549.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.10/7.28  69556[17:Res:69551.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.10/7.28  69589[17:Res:69556.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  69591[17:MRR:69589.0,69551.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  69592[17:Res:69591.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.28  69593[17:Res:69591.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  69594[18:Spt:69592.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.28  69599[18:Res:69594.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.28  69654[18:Res:69599.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  69656[18:MRR:69654.0,69594.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  69657[18:Res:69656.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  69658[18:Res:69656.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  69659[19:Spt:69657.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  69664[19:Res:69659.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  69677[19:Res:69664.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  69679[19:MRR:69677.0,10.0] ||  -> .
% 7.10/7.28  69680[19:Spt:69679.0,69657.0,69659.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)* -> .
% 7.10/7.28  69681[19:Spt:69679.0,69657.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  69683[19:MRR:69658.0,69680.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  69688[19:Res:69683.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  69689[19:MRR:69688.0,10.0] ||  -> .
% 7.10/7.28  69690[18:Spt:69689.0,69592.0,69594.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*+ -> .
% 7.10/7.28  69691[18:Spt:69689.0,69592.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.28  69693[18:MRR:69593.0,69690.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  69706[18:Res:69693.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  69707[18:MRR:69706.0,10.0] ||  -> .
% 7.10/7.28  69708[17:Spt:69707.0,69549.0,69551.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*+ -> .
% 7.10/7.28  69709[17:Spt:69707.0,69549.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s2)*.
% 7.10/7.28  70074[15:Res:69428.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s3) -> node16(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.28  70076[15:MRR:70074.0,69414.0] ||  -> node16(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.28  70077[18:Spt:70076.2] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s2)*.
% 7.10/7.28  70079[18:Res:70077.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s2)*.
% 7.10/7.28  70092[18:Res:70079.0,410.0] ||  -> node21(c_e_h_1,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_1,c_c,s1).
% 7.10/7.28  70127[18:Res:70092.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s2) -> m_and_h_gate_v_out(c_e_h_1,c_c,s1) node20(c_e_h_1,c_c,s1)*.
% 7.10/7.28  70129[18:MRR:70127.0,70079.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1) node20(c_e_h_1,c_c,s1)*.
% 7.10/7.28  70134[18:Res:70129.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)* m_and_h_gate_v_in1(c_e_h_1,c_c,s1).
% 7.10/7.28  70136[19:Spt:70134.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)*.
% 7.10/7.28  70138[19:Res:70136.0,412.0] ||  -> node21(c_e_h_1,c_c,s0,s1)*.
% 7.10/7.28  70150[19:Res:70138.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s1) -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  70152[19:MRR:70150.0,70136.0] ||  -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  70153[19:Res:70152.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s0)*.
% 7.10/7.28  70155[19:Res:70153.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s0)*.
% 7.10/7.28  70156[19:MRR:70155.0,121.0] ||  -> .
% 7.10/7.28  70157[19:Spt:70156.0,70134.0,70136.0] || m_and_h_gate_v_out(c_e_h_1,c_c,s1)*+ -> .
% 7.10/7.28  70158[19:Spt:70156.0,70134.1] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s1)*.
% 7.10/7.28  70162[19:Res:70158.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s1)*.
% 7.10/7.28  70169[19:Res:70162.0,375.0] ||  -> node12(c_e_h_1,c_a,s0,s1)*.
% 7.10/7.28  70183[19:Res:70169.0,123.1] || m_mutex_h_half_v_out(c_e_h_1,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_1,c_a,s0).
% 7.10/7.28  70185[19:MRR:70183.0,70162.0] ||  -> m_mutex_h_half_v_inp(c_e_h_1,c_a,s0)*.
% 7.10/7.28  70186[19:Res:70185.0,18.0] ||  -> m_user_v_req(c_e_h_1,c_u,s0)*.
% 7.10/7.28  70187[19:MRR:70186.0,106.0] ||  -> .
% 7.10/7.28  70188[18:Spt:70187.0,70076.2,70077.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.28  70189[18:Spt:70187.0,70076.0,70076.1] ||  -> node16(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.28  70190[18:MRR:69475.1,70188.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.28  70193[18:Res:70189.1,586.0] ||  -> node16(c_e_h_1,c_e,s2) node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.28  70195[18:Res:70189.1,511.0] ||  -> node16(c_e_h_1,c_e,s2) node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  70198[18:Res:70189.1,87.0] ||  -> node16(c_e_h_1,c_e,s2) m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.28  70209[19:Spt:70198.0] ||  -> node16(c_e_h_1,c_e,s2)*.
% 7.10/7.28  70211[19:Res:70209.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.28  70212[19:MRR:70211.0,70211.1,70190.0,70188.0] ||  -> .
% 7.10/7.28  70213[19:Spt:70212.0,70198.0,70209.0] || node16(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.28  70214[19:Spt:70212.0,70198.1] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.28  70215[19:MRR:70189.0,70213.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.28  70218[19:MRR:70195.0,70213.0] ||  -> node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  70220[19:MRR:70193.0,70213.0] ||  -> node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.28  70240[19:Res:70218.1,595.0] ||  -> node17(c_e_h_1,c_e,s1) node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  70242[19:Res:70218.1,515.0] ||  -> node17(c_e_h_1,c_e,s1) node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  70246[20:Spt:70242.0] ||  -> node17(c_e_h_1,c_e,s1)*.
% 7.10/7.28  70247[20:Res:70246.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  70434[19:Res:70220.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s2) -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  70436[19:MRR:70434.0,70215.0] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  70437[21:Spt:70436.2] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s1)*.
% 7.10/7.28  70439[21:Res:70437.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)*.
% 7.10/7.28  70444[21:Res:70439.0,412.0] ||  -> node21(c_e_h_1,c_c,s0,s1)*.
% 7.10/7.28  70482[21:Res:70444.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s1) -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  70484[21:MRR:70482.0,70439.0] ||  -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  70485[21:Res:70484.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s0)*.
% 7.10/7.28  70487[21:Res:70485.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s0)*.
% 7.10/7.28  70488[21:MRR:70487.0,121.0] ||  -> .
% 7.10/7.28  70489[21:Spt:70488.0,70436.2,70437.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  70490[21:Spt:70488.0,70436.0,70436.1] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  70491[21:MRR:70247.1,70489.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  70493[21:Res:70490.1,595.0] ||  -> node16(c_e_h_1,c_e,s1) node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  70495[21:Res:70490.1,515.0] ||  -> node16(c_e_h_1,c_e,s1) node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  70510[22:Spt:70495.0] ||  -> node16(c_e_h_1,c_e,s1)*.
% 7.10/7.28  70512[22:Res:70510.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  70513[22:MRR:70512.0,70512.1,70491.0,70489.0] ||  -> .
% 7.10/7.28  70514[22:Spt:70513.0,70495.0,70510.0] || node16(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  70515[22:Spt:70513.0,70495.1] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  70516[22:MRR:70490.0,70514.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  70519[22:MRR:70493.0,70514.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  70520[22:Res:70515.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  70521[22:Res:70515.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  70530[22:Res:70519.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  70532[22:MRR:70530.0,70516.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  70533[23:Spt:70532.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.10/7.28  70534[23:Res:70533.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.10/7.28  70535[23:Res:70533.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  70536[23:MRR:70535.0,70520.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  70537[23:MRR:70521.0,70536.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  70538[23:MRR:70534.0,70534.1,70537.0,70536.0] ||  -> .
% 7.10/7.28  70539[23:Spt:70538.0,70532.0,70533.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.10/7.28  70540[23:Spt:70538.0,70532.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  70543[23:Res:70540.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.10/7.28  70544[23:MRR:70543.0,142.0] ||  -> .
% 7.10/7.28  70545[20:Spt:70544.0,70242.0,70246.0] || node17(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  70546[20:Spt:70544.0,70242.1] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  70547[20:MRR:70218.0,70545.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  70550[20:MRR:70240.0,70545.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  70551[20:Res:70546.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  70552[20:Res:70546.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  70561[20:Res:70550.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  70563[20:MRR:70561.0,70547.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  70564[21:Spt:70563.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.10/7.28  70565[21:Res:70564.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.10/7.28  70566[21:Res:70564.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  70567[21:MRR:70566.0,70551.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  70568[21:MRR:70552.0,70567.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  70569[21:MRR:70565.0,70565.1,70568.0,70567.0] ||  -> .
% 7.10/7.28  70570[21:Spt:70569.0,70563.0,70564.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.10/7.28  70571[21:Spt:70569.0,70563.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  70574[21:Res:70571.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.10/7.28  70575[21:MRR:70574.0,142.0] ||  -> .
% 7.10/7.28  70576[16:Spt:70575.0,69467.0,69474.0] || node17(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.28  70577[16:Spt:70575.0,69467.1] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.28  70578[16:MRR:69430.0,70576.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.28  70580[16:MRR:69464.0,70576.0] ||  -> node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  70581[16:MRR:69462.0,70576.0] ||  -> node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.28  70632[16:Res:70580.1,595.0] ||  -> node17(c_e_h_1,c_e,s1) node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  70634[16:Res:70580.1,515.0] ||  -> node17(c_e_h_1,c_e,s1) node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  70636[16:Res:70580.1,87.0] ||  -> node17(c_e_h_1,c_e,s1) m_and_h_gate_v_in1(c_e_h_1,c_r,s1)*.
% 7.10/7.28  71436[17:Spt:70636.0] ||  -> node17(c_e_h_1,c_e,s1)*.
% 7.10/7.28  71437[17:Res:71436.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  71439[18:Spt:69550.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.10/7.28  71445[18:Res:71439.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.10/7.28  71523[18:Res:71445.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  71525[18:MRR:71523.0,71439.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  71527[18:Res:71525.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  71690[19:Spt:71525.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.28  71695[19:Res:71690.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.28  71716[19:Res:71695.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  71718[19:MRR:71716.0,71690.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  71719[19:Res:71718.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  71720[19:Res:71718.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  71721[20:Spt:71719.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  71726[20:Res:71721.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  71729[20:Res:71726.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  71731[20:MRR:71729.0,10.0] ||  -> .
% 7.10/7.28  71732[20:Spt:71731.0,71719.0,71721.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.10/7.28  71733[20:Spt:71731.0,71719.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  71735[20:MRR:71720.0,71732.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  71743[20:Res:71735.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  71744[20:MRR:71743.0,10.0] ||  -> .
% 7.10/7.28  71745[19:Spt:71744.0,71525.0,71690.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)* -> .
% 7.10/7.28  71746[19:Spt:71744.0,71525.1] ||  -> node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  71747[19:MRR:71527.0,71745.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  71756[19:Res:71747.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  71757[19:MRR:71756.0,10.0] ||  -> .
% 7.10/7.28  71758[18:Spt:71757.0,69550.0,71439.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*+ -> .
% 7.10/7.28  71759[18:Spt:71757.0,69550.1] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s2)*.
% 7.10/7.28  72489[16:Res:70581.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s2) -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  72491[16:MRR:72489.0,70578.0] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  74329[19:Spt:72491.2] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s1)*.
% 7.10/7.28  74331[19:Res:74329.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)*.
% 7.10/7.28  74334[19:Res:74331.0,412.0] ||  -> node21(c_e_h_1,c_c,s0,s1)*.
% 7.10/7.28  74350[19:Res:74334.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s1) -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  74352[19:MRR:74350.0,74331.0] ||  -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  74353[19:Res:74352.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s0)*.
% 7.10/7.28  74362[19:Res:74353.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s0)*.
% 7.10/7.28  74363[19:MRR:74362.0,121.0] ||  -> .
% 7.10/7.28  74364[19:Spt:74363.0,72491.2,74329.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  74365[19:Spt:74363.0,72491.0,72491.1] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  74366[19:MRR:71437.1,74364.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  74368[19:Res:74365.1,595.0] ||  -> node16(c_e_h_1,c_e,s1) node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  74370[19:Res:74365.1,515.0] ||  -> node16(c_e_h_1,c_e,s1) node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  74374[20:Spt:74370.0] ||  -> node16(c_e_h_1,c_e,s1)*.
% 7.10/7.28  74376[20:Res:74374.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  74377[20:MRR:74376.0,74376.1,74366.0,74364.0] ||  -> .
% 7.10/7.28  74378[20:Spt:74377.0,74370.0,74374.0] || node16(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  74379[20:Spt:74377.0,74370.1] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  74380[20:MRR:74365.0,74378.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  74383[20:MRR:74368.0,74378.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  74384[20:Res:74379.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  74385[20:Res:74379.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  74394[20:Res:74383.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  74396[20:MRR:74394.0,74380.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  74404[21:Spt:74396.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.10/7.28  74405[21:Res:74404.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.10/7.28  74406[21:Res:74404.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  74407[21:MRR:74406.0,74384.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  74408[21:MRR:74385.0,74407.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  74409[21:MRR:74405.0,74405.1,74408.0,74407.0] ||  -> .
% 7.10/7.28  74410[21:Spt:74409.0,74396.0,74404.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.10/7.28  74411[21:Spt:74409.0,74396.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  74414[21:Res:74411.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.10/7.28  74415[21:MRR:74414.0,142.0] ||  -> .
% 7.10/7.28  74416[17:Spt:74415.0,70636.0,71436.0] || node17(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  74417[17:Spt:74415.0,70636.1] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s1)*.
% 7.10/7.28  74418[17:MRR:70634.0,74416.0] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  74419[17:MRR:70580.0,74416.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  74421[17:MRR:70632.0,74416.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  74423[17:Res:74418.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  74424[17:Res:74418.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  74578[17:Res:74421.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  74580[17:MRR:74578.0,74419.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  74581[18:Spt:74580.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.10/7.28  74582[18:Res:74581.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.10/7.28  74583[18:Res:74581.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  74584[18:MRR:74583.0,74423.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  74585[18:MRR:74424.0,74584.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  74586[18:MRR:74582.0,74582.1,74585.0,74584.0] ||  -> .
% 7.10/7.28  74587[18:Spt:74586.0,74580.0,74581.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.10/7.28  74588[18:Spt:74586.0,74580.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  74591[18:Res:74588.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.10/7.28  74592[18:MRR:74591.0,142.0] ||  -> .
% 7.10/7.28  74593[15:Spt:74592.0,69367.0,69400.0] || node21(c_e_h_1,c_r,s3,s4)*+ -> .
% 7.10/7.28  74594[15:Spt:74592.0,69367.1] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s3)*.
% 7.10/7.28  74597[15:Res:74594.0,409.0] ||  -> node21(c_e_h_1,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_1,c_r,s2).
% 7.10/7.28  74646[15:Res:74597.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s3) -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.10/7.28  74648[15:MRR:74646.0,74594.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.10/7.28  74649[16:Spt:74648.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2)*.
% 7.10/7.28  74652[16:Res:74649.0,96.0] ||  -> m_user_v_ack(c_e_h_1,c_u,s2)*.
% 7.10/7.28  74653[16:Res:74652.0,34.0] || m_and_h_gate_v_in2(c_e_h_1,c_d,s2)*+ -> .
% 7.10/7.28  74655[16:Res:2305.0,74653.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1) m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.28  74659[17:Spt:74655.1] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.28  74660[17:Res:74659.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  74665[17:Res:74660.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  74667[17:Res:74665.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  74669[17:MRR:74667.0,10.0] ||  -> .
% 7.10/7.28  74670[17:Spt:74669.0,74655.1,74659.0] || m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*+ -> .
% 7.10/7.28  74671[17:Spt:74669.0,74655.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1)*.
% 7.10/7.28  74674[17:Res:74671.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.28  74681[17:Res:74674.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.28  74787[17:Res:74681.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  74789[17:MRR:74787.0,74674.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  74790[17:Res:74789.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  74791[17:Res:74789.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  74792[18:Spt:74790.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  74795[18:Res:74792.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.28  74798[18:MRR:74795.0,74670.0] ||  -> .
% 7.10/7.28  74799[18:Spt:74798.0,74790.0,74792.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.10/7.28  74800[18:Spt:74798.0,74790.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  74802[18:MRR:74791.0,74799.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  74810[18:Res:74802.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  74811[18:MRR:74810.0,10.0] ||  -> .
% 7.10/7.28  74812[16:Spt:74811.0,74648.0,74649.0] || m_and_h_gate_v_out(c_e_h_1,c_r,s2)*+ -> .
% 7.10/7.28  74813[16:Spt:74811.0,74648.1] ||  -> node20(c_e_h_1,c_r,s2)*.
% 7.10/7.28  74817[16:Res:74813.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s2)*.
% 7.10/7.28  74819[16:Res:74817.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.10/7.28  74840[16:Res:74819.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.10/7.28  74926[16:Res:74840.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  74928[16:MRR:74926.0,74819.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  74929[16:Res:74928.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.28  74930[16:Res:74928.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  74941[17:Spt:74929.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.28  74946[17:Res:74941.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.28  74970[17:Res:74946.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  74972[17:MRR:74970.0,74941.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  74973[17:Res:74972.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  74974[17:Res:74972.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  74975[18:Spt:74973.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  74980[18:Res:74975.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  74983[18:Res:74980.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  74985[18:MRR:74983.0,10.0] ||  -> .
% 7.10/7.28  74986[18:Spt:74985.0,74973.0,74975.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.10/7.28  74987[18:Spt:74985.0,74973.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  74989[18:MRR:74974.0,74986.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  74997[18:Res:74989.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  74998[18:MRR:74997.0,10.0] ||  -> .
% 7.10/7.28  74999[17:Spt:74998.0,74929.0,74941.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)* -> .
% 7.10/7.28  75000[17:Spt:74998.0,74929.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.28  75002[17:MRR:74930.0,74999.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  75010[17:Res:75002.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  75011[17:MRR:75010.0,10.0] ||  -> .
% 7.10/7.28  75012[14:Spt:75011.0,69351.2,69354.0] || until2p29(s1)*+ -> .
% 7.10/7.28  75013[14:Spt:75011.0,69351.0,69351.1] ||  -> trans(s4,s3) trans(s4,s2)*.
% 7.10/7.28  75023[14:Res:75013.1,64383.0] ||  -> trans(s4,s3)* until2p29(s2).
% 7.10/7.28  75026[15:Spt:75023.1] ||  -> until2p29(s2)*.
% 7.10/7.28  75027[15:MRR:924.0,75026.0] ||  -> xuntil2p30(s2)*.
% 7.10/7.28  75028[15:MRR:171.0,75027.0] ||  -> until2p29(s3)*.
% 7.10/7.28  75029[15:MRR:64341.0,75028.0] ||  -> xuntil2p30(s3)*.
% 7.10/7.28  75030[15:MRR:170.0,75029.0] ||  -> until2p29(s4)*.
% 7.10/7.28  75031[15:MRR:64379.0,75030.0] ||  -> node23(s4)*.
% 7.10/7.28  75032[15:MRR:181.0,75030.0] ||  -> node26(s4)*.
% 7.10/7.28  75034[15:MRR:524.0,75031.0] ||  -> node21(c_e_h_1,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_1,c_r,s3).
% 7.10/7.28  75069[16:Spt:75034.0] ||  -> node21(c_e_h_1,c_r,s3,s4)*.
% 7.10/7.28  75070[16:Res:75069.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s4)+ -> node20(c_e_h_1,c_r,s3)*.
% 7.10/7.28  75088[16:Res:220.1,75070.0] node23(s4) ||  -> node20(c_e_h_1,c_r,s3)*.
% 7.10/7.28  75089[16:SSi:75088.0,5.0,64331.0,64381.0,75030.0,75031.0,75032.0] ||  -> node20(c_e_h_1,c_r,s3)*.
% 7.10/7.28  75090[16:Res:75089.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s3)*.
% 7.10/7.28  75091[16:Res:75089.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s3)*.
% 7.10/7.28  75094[16:Res:75090.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s3)*.
% 7.10/7.28  75095[16:Res:75091.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s3)*.
% 7.10/7.28  75099[16:Res:75094.0,582.0] ||  -> node16(c_e_h_1,c_e,s2) node14(c_e_h_1,c_e,s2,s3)* m_c_h_element_v_out(c_e_h_1,c_e,s2).
% 7.10/7.28  75101[16:Res:75094.0,509.0] ||  -> node17(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.28  75109[16:Res:75095.0,390.0] ||  -> node10(c_e_h_1,c_m,s2,s3)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2).
% 7.10/7.28  75131[16:Res:75101.1,586.0] ||  -> node17(c_e_h_1,c_e,s2) node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.28  75133[16:Res:75101.1,511.0] ||  -> node17(c_e_h_1,c_e,s2) node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  75136[16:Res:75101.1,87.0] ||  -> node17(c_e_h_1,c_e,s2) m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.28  75143[17:Spt:75136.0] ||  -> node17(c_e_h_1,c_e,s2)*.
% 7.10/7.28  75144[17:Res:75143.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s2)*+ -> m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.28  75221[16:Res:75109.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s3) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) node9(c_e_h_1,c_m,s2)*.
% 7.10/7.28  75223[16:MRR:75221.0,75095.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) node9(c_e_h_1,c_m,s2)*.
% 7.10/7.28  75224[16:Res:75223.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s2)*.
% 7.10/7.28  75225[16:Res:75223.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s2)*.
% 7.10/7.28  75226[18:Spt:75224.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.10/7.28  75231[18:Res:75226.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.10/7.28  75263[18:Res:75231.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  75265[18:MRR:75263.0,75226.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  75266[18:Res:75265.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.28  75267[18:Res:75265.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  75268[19:Spt:75266.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.28  75273[19:Res:75268.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.28  75328[19:Res:75273.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  75330[19:MRR:75328.0,75268.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  75331[19:Res:75330.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  75332[19:Res:75330.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  75333[20:Spt:75331.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  75338[20:Res:75333.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  75341[20:Res:75338.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  75343[20:MRR:75341.0,10.0] ||  -> .
% 7.10/7.28  75344[20:Spt:75343.0,75331.0,75333.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.10/7.28  75345[20:Spt:75343.0,75331.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  75347[20:MRR:75332.0,75344.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  75355[20:Res:75347.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  75356[20:MRR:75355.0,10.0] ||  -> .
% 7.10/7.28  75357[19:Spt:75356.0,75266.0,75268.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)* -> .
% 7.10/7.28  75358[19:Spt:75356.0,75266.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.28  75360[19:MRR:75267.0,75357.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  75368[19:Res:75360.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  75369[19:MRR:75368.0,10.0] ||  -> .
% 7.10/7.28  75370[18:Spt:75369.0,75224.0,75226.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*+ -> .
% 7.10/7.28  75371[18:Spt:75369.0,75224.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s2)*.
% 7.10/7.28  75530[16:Res:75099.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s3) -> node16(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.28  75532[16:MRR:75530.0,75094.0] ||  -> node16(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.28  75545[19:Spt:75532.2] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s2)*.
% 7.10/7.28  75547[19:Res:75545.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s2)*.
% 7.10/7.28  75550[19:Res:75547.0,410.0] ||  -> node21(c_e_h_1,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_1,c_c,s1).
% 7.10/7.28  75565[19:Res:75550.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s2) -> m_and_h_gate_v_out(c_e_h_1,c_c,s1) node20(c_e_h_1,c_c,s1)*.
% 7.10/7.28  75567[19:MRR:75565.0,75547.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1) node20(c_e_h_1,c_c,s1)*.
% 7.10/7.28  75571[19:Res:75567.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)* m_and_h_gate_v_in1(c_e_h_1,c_c,s1).
% 7.10/7.28  75573[20:Spt:75571.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)*.
% 7.10/7.28  75575[20:Res:75573.0,412.0] ||  -> node21(c_e_h_1,c_c,s0,s1)*.
% 7.10/7.28  75583[20:Res:75575.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s1) -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  75585[20:MRR:75583.0,75573.0] ||  -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  75586[20:Res:75585.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s0)*.
% 7.10/7.28  75588[20:Res:75586.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s0)*.
% 7.10/7.28  75589[20:MRR:75588.0,121.0] ||  -> .
% 7.10/7.28  75590[20:Spt:75589.0,75571.0,75573.0] || m_and_h_gate_v_out(c_e_h_1,c_c,s1)*+ -> .
% 7.10/7.28  75591[20:Spt:75589.0,75571.1] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s1)*.
% 7.10/7.28  75595[20:Res:75591.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s1)*.
% 7.10/7.28  75602[20:Res:75595.0,375.0] ||  -> node12(c_e_h_1,c_a,s0,s1)*.
% 7.10/7.28  75612[20:Res:75602.0,123.1] || m_mutex_h_half_v_out(c_e_h_1,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_1,c_a,s0).
% 7.10/7.28  75614[20:MRR:75612.0,75595.0] ||  -> m_mutex_h_half_v_inp(c_e_h_1,c_a,s0)*.
% 7.10/7.28  75615[20:Res:75614.0,18.0] ||  -> m_user_v_req(c_e_h_1,c_u,s0)*.
% 7.10/7.28  75616[20:MRR:75615.0,106.0] ||  -> .
% 7.10/7.28  75617[19:Spt:75616.0,75532.2,75545.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.28  75618[19:Spt:75616.0,75532.0,75532.1] ||  -> node16(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.28  75619[19:MRR:75144.1,75617.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.28  75620[19:Res:75618.1,586.0] ||  -> node16(c_e_h_1,c_e,s2) node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.28  75622[19:Res:75618.1,511.0] ||  -> node16(c_e_h_1,c_e,s2) node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  75625[19:Res:75618.1,87.0] ||  -> node16(c_e_h_1,c_e,s2) m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.28  75634[20:Spt:75625.0] ||  -> node16(c_e_h_1,c_e,s2)*.
% 7.10/7.28  75636[20:Res:75634.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.28  75637[20:MRR:75636.0,75636.1,75619.0,75617.0] ||  -> .
% 7.10/7.28  75638[20:Spt:75637.0,75625.0,75634.0] || node16(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.28  75639[20:Spt:75637.0,75625.1] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.28  75640[20:MRR:75618.0,75638.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.28  75642[20:MRR:75622.0,75638.0] ||  -> node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  75643[20:MRR:75620.0,75638.0] ||  -> node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.28  75676[20:Res:75642.1,595.0] ||  -> node17(c_e_h_1,c_e,s1) node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  75678[20:Res:75642.1,515.0] ||  -> node17(c_e_h_1,c_e,s1) node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  75685[21:Spt:75678.0] ||  -> node17(c_e_h_1,c_e,s1)*.
% 7.10/7.28  75686[21:Res:75685.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  75863[20:Res:75643.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s2) -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  75865[20:MRR:75863.0,75640.0] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  75866[22:Spt:75865.2] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s1)*.
% 7.10/7.28  75868[22:Res:75866.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)*.
% 7.10/7.28  75871[22:Res:75868.0,412.0] ||  -> node21(c_e_h_1,c_c,s0,s1)*.
% 7.10/7.28  75880[22:Res:75871.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s1) -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  75882[22:MRR:75880.0,75868.0] ||  -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  75883[22:Res:75882.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s0)*.
% 7.10/7.28  75885[22:Res:75883.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s0)*.
% 7.10/7.28  75886[22:MRR:75885.0,121.0] ||  -> .
% 7.10/7.28  75887[22:Spt:75886.0,75865.2,75866.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  75888[22:Spt:75886.0,75865.0,75865.1] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  75889[22:MRR:75686.1,75887.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  75891[22:Res:75888.1,595.0] ||  -> node16(c_e_h_1,c_e,s1) node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  75893[22:Res:75888.1,515.0] ||  -> node16(c_e_h_1,c_e,s1) node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  75897[23:Spt:75893.0] ||  -> node16(c_e_h_1,c_e,s1)*.
% 7.10/7.28  75899[23:Res:75897.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  75900[23:MRR:75899.0,75899.1,75889.0,75887.0] ||  -> .
% 7.10/7.28  75901[23:Spt:75900.0,75893.0,75897.0] || node16(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  75902[23:Spt:75900.0,75893.1] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  75903[23:MRR:75888.0,75901.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  75906[23:MRR:75891.0,75901.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  75907[23:Res:75902.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  75908[23:Res:75902.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  75917[23:Res:75906.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  75919[23:MRR:75917.0,75903.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  75920[24:Spt:75919.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.10/7.28  75921[24:Res:75920.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.10/7.28  75922[24:Res:75920.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  75923[24:MRR:75922.0,75907.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  75924[24:MRR:75908.0,75923.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  75925[24:MRR:75921.0,75921.1,75924.0,75923.0] ||  -> .
% 7.10/7.28  75926[24:Spt:75925.0,75919.0,75920.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.10/7.28  75927[24:Spt:75925.0,75919.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  75930[24:Res:75927.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.10/7.28  75931[24:MRR:75930.0,142.0] ||  -> .
% 7.10/7.28  75932[21:Spt:75931.0,75678.0,75685.0] || node17(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  75933[21:Spt:75931.0,75678.1] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  75934[21:MRR:75642.0,75932.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  75937[21:MRR:75676.0,75932.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  75938[21:Res:75933.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  75939[21:Res:75933.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  75948[21:Res:75937.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  75950[21:MRR:75948.0,75934.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  75951[22:Spt:75950.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.10/7.28  75952[22:Res:75951.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.10/7.28  75953[22:Res:75951.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  75954[22:MRR:75953.0,75938.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  75955[22:MRR:75939.0,75954.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  75956[22:MRR:75952.0,75952.1,75955.0,75954.0] ||  -> .
% 7.10/7.28  75957[22:Spt:75956.0,75950.0,75951.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.10/7.28  75958[22:Spt:75956.0,75950.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  75961[22:Res:75958.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.10/7.28  75962[22:MRR:75961.0,142.0] ||  -> .
% 7.10/7.28  75963[17:Spt:75962.0,75136.0,75143.0] || node17(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.28  75964[17:Spt:75962.0,75136.1] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.28  75965[17:MRR:75101.0,75963.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.28  75967[17:MRR:75133.0,75963.0] ||  -> node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  75968[17:MRR:75131.0,75963.0] ||  -> node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.28  76029[17:Res:75967.1,595.0] ||  -> node17(c_e_h_1,c_e,s1) node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  76031[17:Res:75967.1,515.0] ||  -> node17(c_e_h_1,c_e,s1) node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  76116[17:Res:75968.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s2) -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  76118[17:MRR:76116.0,75965.0] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  76237[18:Spt:75967.0] ||  -> node17(c_e_h_1,c_e,s1)*.
% 7.10/7.28  76238[18:Res:76237.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  76249[19:Spt:75225.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.10/7.28  76254[19:Res:76249.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.10/7.28  76346[19:Res:76254.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  76348[19:MRR:76346.0,76249.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  76349[19:Res:76348.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.28  76350[19:Res:76348.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  76351[20:Spt:76349.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.28  76356[20:Res:76351.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.28  76433[20:Res:76356.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  76435[20:MRR:76433.0,76351.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  76440[20:Res:76435.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  76441[20:Res:76435.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  76442[21:Spt:76440.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  76447[21:Res:76442.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  76454[21:Res:76447.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  76456[21:MRR:76454.0,10.0] ||  -> .
% 7.10/7.28  76457[21:Spt:76456.0,76440.0,76442.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)* -> .
% 7.10/7.28  76458[21:Spt:76456.0,76440.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  76460[21:MRR:76441.0,76457.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  76465[21:Res:76460.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  76466[21:MRR:76465.0,10.0] ||  -> .
% 7.10/7.28  76467[20:Spt:76466.0,76349.0,76351.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*+ -> .
% 7.10/7.28  76468[20:Spt:76466.0,76349.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.28  76470[20:MRR:76350.0,76467.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  76483[20:Res:76470.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  76484[20:MRR:76483.0,10.0] ||  -> .
% 7.10/7.28  76485[19:Spt:76484.0,75225.0,76249.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*+ -> .
% 7.10/7.28  76486[19:Spt:76484.0,75225.1] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s2)*.
% 7.10/7.28  76696[20:Spt:76118.2] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s1)*.
% 7.10/7.28  76698[20:Res:76696.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)*.
% 7.10/7.28  76713[20:Res:76698.0,412.0] ||  -> node21(c_e_h_1,c_c,s0,s1)*.
% 7.10/7.28  76722[20:Res:76713.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s1) -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  76724[20:MRR:76722.0,76698.0] ||  -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  76725[20:Res:76724.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s0)*.
% 7.10/7.28  76727[20:Res:76725.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s0)*.
% 7.10/7.28  76728[20:MRR:76727.0,121.0] ||  -> .
% 7.10/7.28  76729[20:Spt:76728.0,76118.2,76696.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  76730[20:Spt:76728.0,76118.0,76118.1] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  76731[20:MRR:76238.1,76729.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  76733[20:Res:76730.1,595.0] ||  -> node16(c_e_h_1,c_e,s1) node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  76735[20:Res:76730.1,515.0] ||  -> node16(c_e_h_1,c_e,s1) node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  76769[21:Spt:76735.0] ||  -> node16(c_e_h_1,c_e,s1)*.
% 7.10/7.28  76771[21:Res:76769.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  76772[21:MRR:76771.0,76771.1,76731.0,76729.0] ||  -> .
% 7.10/7.28  76773[21:Spt:76772.0,76735.0,76769.0] || node16(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  76774[21:Spt:76772.0,76735.1] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  76775[21:MRR:76730.0,76773.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  76778[21:MRR:76733.0,76773.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  76779[21:Res:76774.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  76780[21:Res:76774.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  76842[21:Res:76778.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  76844[21:MRR:76842.0,76775.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  76845[22:Spt:76844.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.10/7.28  76846[22:Res:76845.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.10/7.28  76847[22:Res:76845.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  76848[22:MRR:76847.0,76779.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  76849[22:MRR:76780.0,76848.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  76850[22:MRR:76846.0,76846.1,76849.0,76848.0] ||  -> .
% 7.10/7.28  76851[22:Spt:76850.0,76844.0,76845.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.10/7.28  76852[22:Spt:76850.0,76844.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  76855[22:Res:76852.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.10/7.28  76856[22:MRR:76855.0,142.0] ||  -> .
% 7.10/7.28  76857[18:Spt:76856.0,75967.0,76237.0] || node17(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  76858[18:Spt:76856.0,75967.1] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  76860[18:MRR:76031.0,76857.0] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  76862[18:MRR:76029.0,76857.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  76870[18:Res:76860.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  76871[18:Res:76860.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  76948[18:Res:76862.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  76950[18:MRR:76948.0,76858.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  76969[19:Spt:76950.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.10/7.28  76970[19:Res:76969.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.10/7.28  76971[19:Res:76969.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  76972[19:MRR:76971.0,76870.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  76973[19:MRR:76871.0,76972.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  76974[19:MRR:76970.0,76970.1,76973.0,76972.0] ||  -> .
% 7.10/7.28  76975[19:Spt:76974.0,76950.0,76969.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.10/7.28  76976[19:Spt:76974.0,76950.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  76979[19:Res:76976.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.10/7.28  76980[19:MRR:76979.0,142.0] ||  -> .
% 7.10/7.28  76981[16:Spt:76980.0,75034.0,75069.0] || node21(c_e_h_1,c_r,s3,s4)*+ -> .
% 7.10/7.28  76982[16:Spt:76980.0,75034.1] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s3)*.
% 7.10/7.28  76985[16:Res:76982.0,409.0] ||  -> node21(c_e_h_1,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_1,c_r,s2).
% 7.10/7.28  77037[16:Res:76985.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s3) -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.10/7.28  77039[16:MRR:77037.0,76982.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.10/7.28  77048[17:Spt:77039.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2)*.
% 7.10/7.28  77051[17:Res:77048.0,96.0] ||  -> m_user_v_ack(c_e_h_1,c_u,s2)*.
% 7.10/7.28  77052[17:Res:77051.0,34.0] || m_and_h_gate_v_in2(c_e_h_1,c_d,s2)*+ -> .
% 7.10/7.28  77054[17:Res:2305.0,77052.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1) m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.28  77060[18:Spt:77054.1] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.28  77061[18:Res:77060.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  77066[18:Res:77061.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  77068[18:Res:77066.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  77070[18:MRR:77068.0,10.0] ||  -> .
% 7.10/7.28  77071[18:Spt:77070.0,77054.1,77060.0] || m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*+ -> .
% 7.10/7.28  77072[18:Spt:77070.0,77054.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1)*.
% 7.10/7.28  77075[18:Res:77072.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.28  77082[18:Res:77075.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.28  77199[18:Res:77082.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  77201[18:MRR:77199.0,77075.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  77202[18:Res:77201.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  77203[18:Res:77201.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  77214[19:Spt:77202.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  77217[19:Res:77214.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.28  77220[19:MRR:77217.0,77071.0] ||  -> .
% 7.10/7.28  77221[19:Spt:77220.0,77202.0,77214.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)* -> .
% 7.10/7.28  77222[19:Spt:77220.0,77202.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  77224[19:MRR:77203.0,77221.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  77229[19:Res:77224.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  77230[19:MRR:77229.0,10.0] ||  -> .
% 7.10/7.28  77231[17:Spt:77230.0,77039.0,77048.0] || m_and_h_gate_v_out(c_e_h_1,c_r,s2)*+ -> .
% 7.10/7.28  77232[17:Spt:77230.0,77039.1] ||  -> node20(c_e_h_1,c_r,s2)*.
% 7.10/7.28  77236[17:Res:77232.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s2)*.
% 7.10/7.28  77247[17:Res:77236.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.10/7.28  77267[17:Res:77247.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.10/7.28  77351[17:Res:77267.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  77353[17:MRR:77351.0,77247.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  77355[17:Res:77353.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  77456[18:Spt:77353.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.28  77461[18:Res:77456.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.28  77550[18:Res:77461.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  77552[18:MRR:77550.0,77456.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  77553[18:Res:77552.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  77554[18:Res:77552.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  77558[19:Spt:77553.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  77563[19:Res:77558.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  77566[19:Res:77563.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  77568[19:MRR:77566.0,10.0] ||  -> .
% 7.10/7.28  77569[19:Spt:77568.0,77553.0,77558.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.10/7.28  77570[19:Spt:77568.0,77553.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  77572[19:MRR:77554.0,77569.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  77580[19:Res:77572.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  77581[19:MRR:77580.0,10.0] ||  -> .
% 7.10/7.28  77582[18:Spt:77581.0,77353.0,77456.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)* -> .
% 7.10/7.28  77583[18:Spt:77581.0,77353.1] ||  -> node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  77584[18:MRR:77355.0,77582.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  77593[18:Res:77584.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  77594[18:MRR:77593.0,10.0] ||  -> .
% 7.10/7.28  77595[15:Spt:77594.0,75023.1,75026.0] || until2p29(s2)*+ -> .
% 7.10/7.28  77596[15:Spt:77594.0,75023.0] ||  -> trans(s4,s3)*.
% 7.10/7.28  77603[15:Res:77596.0,149.0] ||  -> node22(u,v,s4,s3)* node21(u,v,s4,s3).
% 7.10/7.28  77606[15:Res:77596.0,64383.0] ||  -> until2p29(s3)*.
% 7.10/7.28  77607[15:MRR:64341.0,77606.0] ||  -> xuntil2p30(s3)*.
% 7.10/7.28  77608[15:MRR:170.0,77607.0] ||  -> until2p29(s4)*.
% 7.10/7.28  77609[15:MRR:181.0,77608.0] ||  -> node26(s4)*.
% 7.10/7.28  77610[15:MRR:64379.0,77608.0] ||  -> node23(s4)*.
% 7.10/7.28  77615[15:MRR:524.0,77610.0] ||  -> node21(c_e_h_1,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_1,c_r,s3).
% 7.10/7.28  77650[16:Spt:77615.0] ||  -> node21(c_e_h_1,c_r,s3,s4)*.
% 7.10/7.28  77651[16:Res:77650.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s4)+ -> node20(c_e_h_1,c_r,s3)*.
% 7.10/7.28  77652[16:Res:77650.0,145.2] || m_and_h_gate_v_in2(c_e_h_1,c_r,s3) m_and_h_gate_v_in1(c_e_h_1,c_r,s3) -> m_and_h_gate_v_out(c_e_h_1,c_r,s4)*.
% 7.10/7.28  77658[16:Res:220.1,77651.0] node23(s4) ||  -> node20(c_e_h_1,c_r,s3)*.
% 7.10/7.28  77659[16:SSi:77658.0,5.0,64331.0,64381.0,77608.0,77609.0,77610.0] ||  -> node20(c_e_h_1,c_r,s3)*.
% 7.10/7.28  77660[16:Res:77659.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s3)*.
% 7.10/7.28  77661[16:Res:77659.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s3)*.
% 7.10/7.28  77662[16:MRR:77652.1,77660.0] || m_and_h_gate_v_in2(c_e_h_1,c_r,s3) -> m_and_h_gate_v_out(c_e_h_1,c_r,s4)*.
% 7.10/7.28  77663[16:MRR:77662.0,77661.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s4)*.
% 7.10/7.28  77664[16:Res:77660.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s3)*.
% 7.10/7.28  77665[16:Res:77661.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s3)*.
% 7.10/7.28  77669[16:Res:77664.0,582.0] ||  -> node16(c_e_h_1,c_e,s2) node14(c_e_h_1,c_e,s2,s3)* m_c_h_element_v_out(c_e_h_1,c_e,s2).
% 7.10/7.28  77671[16:Res:77664.0,509.0] ||  -> node17(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.28  77679[16:Res:77665.0,390.0] ||  -> node10(c_e_h_1,c_m,s2,s3)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2).
% 7.10/7.28  77701[16:Res:77671.1,586.0] ||  -> node17(c_e_h_1,c_e,s2) node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.28  77703[16:Res:77671.1,511.0] ||  -> node17(c_e_h_1,c_e,s2) node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  77706[16:Res:77671.1,87.0] ||  -> node17(c_e_h_1,c_e,s2) m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.28  77713[17:Spt:77706.0] ||  -> node17(c_e_h_1,c_e,s2)*.
% 7.10/7.28  77714[17:Res:77713.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s2)*+ -> m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.28  77785[16:Res:77679.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s3) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) node9(c_e_h_1,c_m,s2)*.
% 7.10/7.28  77787[16:MRR:77785.0,77665.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) node9(c_e_h_1,c_m,s2)*.
% 7.10/7.28  77788[16:Res:77787.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s2)*.
% 7.10/7.28  77792[18:Spt:77788.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.10/7.28  77797[18:Res:77792.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.10/7.28  77827[15:Res:77603.0,147.1] || m_and_h_gate_v_out(u,v,s4)+ -> node21(u,v,s4,s3)* m_and_h_gate_v_out(u,v,s3).
% 7.10/7.28  77828[18:Res:77797.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  77830[18:MRR:77828.0,77792.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  77833[18:Res:77830.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.28  77834[18:Res:77830.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  77835[19:Spt:77833.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.28  77840[19:Res:77835.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.28  77865[19:Res:77840.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  77867[19:MRR:77865.0,77835.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  77891[19:Res:77867.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  77892[19:Res:77867.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  77893[20:Spt:77891.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  77898[20:Res:77893.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  77911[20:Res:77898.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  77913[20:MRR:77911.0,10.0] ||  -> .
% 7.10/7.28  77914[20:Spt:77913.0,77891.0,77893.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)* -> .
% 7.10/7.28  77915[20:Spt:77913.0,77891.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  77917[20:MRR:77892.0,77914.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  77922[20:Res:77917.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  77923[20:MRR:77922.0,10.0] ||  -> .
% 7.10/7.28  77924[19:Spt:77923.0,77833.0,77835.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*+ -> .
% 7.10/7.28  77925[19:Spt:77923.0,77833.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.28  77927[19:MRR:77834.0,77924.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  77940[19:Res:77927.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  77941[19:MRR:77940.0,10.0] ||  -> .
% 7.10/7.28  77942[18:Spt:77941.0,77788.0,77792.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*+ -> .
% 7.10/7.28  77943[18:Spt:77941.0,77788.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s2)*.
% 7.10/7.28  78066[16:Res:77663.0,77827.0] ||  -> node21(c_e_h_1,c_r,s4,s3)* m_and_h_gate_v_out(c_e_h_1,c_r,s3).
% 7.10/7.28  78088[16:Res:77669.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s3) -> node16(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.28  78090[16:MRR:78088.0,77664.0] ||  -> node16(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.28  84865[19:Spt:78066.1] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s3)*.
% 7.10/7.28  84868[19:Res:84865.0,409.0] ||  -> node21(c_e_h_1,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_1,c_r,s2).
% 7.10/7.28  84945[19:Res:84868.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s3) -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.10/7.28  84947[19:MRR:84945.0,84865.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.10/7.28  84948[20:Spt:84947.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2)*.
% 7.10/7.28  84951[20:Res:84948.0,96.0] ||  -> m_user_v_ack(c_e_h_1,c_u,s2)*.
% 7.10/7.28  84952[20:Res:84951.0,34.0] || m_and_h_gate_v_in2(c_e_h_1,c_d,s2)*+ -> .
% 7.10/7.28  84954[20:Res:2305.0,84952.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1) m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.28  84958[21:Spt:84954.1] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.28  84959[21:Res:84958.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  84964[21:Res:84959.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  84966[21:Res:84964.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  84968[21:MRR:84966.0,10.0] ||  -> .
% 7.10/7.28  84969[21:Spt:84968.0,84954.1,84958.0] || m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*+ -> .
% 7.10/7.28  84970[21:Spt:84968.0,84954.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1)*.
% 7.10/7.28  84973[21:Res:84970.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.28  84980[21:Res:84973.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.28  85032[21:Res:84980.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  85034[21:MRR:85032.0,84973.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  85035[21:Res:85034.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  85036[21:Res:85034.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  85037[22:Spt:85035.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  85040[22:Res:85037.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.28  85043[22:MRR:85040.0,84969.0] ||  -> .
% 7.10/7.28  85044[22:Spt:85043.0,85035.0,85037.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.10/7.28  85045[22:Spt:85043.0,85035.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  85047[22:MRR:85036.0,85044.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  85055[22:Res:85047.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  85056[22:MRR:85055.0,10.0] ||  -> .
% 7.10/7.28  85057[20:Spt:85056.0,84947.0,84948.0] || m_and_h_gate_v_out(c_e_h_1,c_r,s2)* -> .
% 7.10/7.28  85058[20:Spt:85056.0,84947.1] ||  -> node20(c_e_h_1,c_r,s2)*.
% 7.10/7.28  85062[20:Res:85058.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s2)*.
% 7.10/7.28  85064[20:Res:85062.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.10/7.28  85066[20:MRR:85064.0,77942.0] ||  -> .
% 7.10/7.28  85067[19:Spt:85066.0,78066.1,84865.0] || m_and_h_gate_v_out(c_e_h_1,c_r,s3)*+ -> .
% 7.10/7.28  85068[19:Spt:85066.0,78066.0] ||  -> node21(c_e_h_1,c_r,s4,s3)*.
% 7.10/7.28  85305[20:Spt:78090.2] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s2)*.
% 7.10/7.28  85307[20:Res:85305.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s2)*.
% 7.10/7.28  85310[20:Res:85307.0,410.0] ||  -> node21(c_e_h_1,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_1,c_c,s1).
% 7.10/7.28  85377[20:Res:85310.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s2) -> m_and_h_gate_v_out(c_e_h_1,c_c,s1) node20(c_e_h_1,c_c,s1)*.
% 7.10/7.28  85379[20:MRR:85377.0,85307.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1) node20(c_e_h_1,c_c,s1)*.
% 7.10/7.28  85383[20:Res:85379.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)* m_and_h_gate_v_in1(c_e_h_1,c_c,s1).
% 7.10/7.28  85385[21:Spt:85383.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)*.
% 7.10/7.28  85387[21:Res:85385.0,412.0] ||  -> node21(c_e_h_1,c_c,s0,s1)*.
% 7.10/7.28  85393[21:Res:85387.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s1) -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  85395[21:MRR:85393.0,85385.0] ||  -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  85396[21:Res:85395.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s0)*.
% 7.10/7.28  85398[21:Res:85396.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s0)*.
% 7.10/7.28  85399[21:MRR:85398.0,121.0] ||  -> .
% 7.10/7.28  85400[21:Spt:85399.0,85383.0,85385.0] || m_and_h_gate_v_out(c_e_h_1,c_c,s1)*+ -> .
% 7.10/7.28  85401[21:Spt:85399.0,85383.1] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s1)*.
% 7.10/7.28  85405[21:Res:85401.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s1)*.
% 7.10/7.28  85412[21:Res:85405.0,375.0] ||  -> node12(c_e_h_1,c_a,s0,s1)*.
% 7.10/7.28  85419[21:Res:85412.0,123.1] || m_mutex_h_half_v_out(c_e_h_1,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_1,c_a,s0).
% 7.10/7.28  85421[21:MRR:85419.0,85405.0] ||  -> m_mutex_h_half_v_inp(c_e_h_1,c_a,s0)*.
% 7.10/7.28  85422[21:Res:85421.0,18.0] ||  -> m_user_v_req(c_e_h_1,c_u,s0)*.
% 7.10/7.28  85423[21:MRR:85422.0,106.0] ||  -> .
% 7.10/7.28  85424[20:Spt:85423.0,78090.2,85305.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.28  85425[20:Spt:85423.0,78090.0,78090.1] ||  -> node16(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.28  85426[20:MRR:77714.1,85424.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.28  85427[20:Res:85425.1,586.0] ||  -> node16(c_e_h_1,c_e,s2) node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.28  85429[20:Res:85425.1,511.0] ||  -> node16(c_e_h_1,c_e,s2) node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  86100[21:Spt:85425.0] ||  -> node16(c_e_h_1,c_e,s2)*.
% 7.10/7.28  86102[21:Res:86100.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.28  86103[21:MRR:86102.0,86102.1,85426.0,85424.0] ||  -> .
% 7.10/7.28  86104[21:Spt:86103.0,85425.0,86100.0] || node16(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.28  86105[21:Spt:86103.0,85425.1] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.28  86108[21:MRR:85429.0,86104.0] ||  -> node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  86109[21:MRR:85427.0,86104.0] ||  -> node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.28  86119[21:Res:86108.1,595.0] ||  -> node17(c_e_h_1,c_e,s1) node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  86121[21:Res:86108.1,515.0] ||  -> node17(c_e_h_1,c_e,s1) node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  86125[22:Spt:86121.0] ||  -> node17(c_e_h_1,c_e,s1)*.
% 7.10/7.28  86126[22:Res:86125.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  86128[21:Res:86109.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s2) -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  86130[21:MRR:86128.0,86105.0] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  86141[23:Spt:86130.2] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s1)*.
% 7.10/7.28  86143[23:Res:86141.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)*.
% 7.10/7.28  86146[23:Res:86143.0,412.0] ||  -> node21(c_e_h_1,c_c,s0,s1)*.
% 7.10/7.28  86159[23:Res:86146.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s1) -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  86161[23:MRR:86159.0,86143.0] ||  -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  86166[23:Res:86161.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s0)*.
% 7.10/7.28  86168[23:Res:86166.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s0)*.
% 7.10/7.28  86169[23:MRR:86168.0,121.0] ||  -> .
% 7.10/7.28  86170[23:Spt:86169.0,86130.2,86141.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  86171[23:Spt:86169.0,86130.0,86130.1] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  86172[23:MRR:86126.1,86170.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  86174[23:Res:86171.1,595.0] ||  -> node16(c_e_h_1,c_e,s1) node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  86176[23:Res:86171.1,515.0] ||  -> node16(c_e_h_1,c_e,s1) node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  86194[24:Spt:86176.0] ||  -> node16(c_e_h_1,c_e,s1)*.
% 7.10/7.28  86196[24:Res:86194.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  86197[24:MRR:86196.0,86196.1,86172.0,86170.0] ||  -> .
% 7.10/7.28  86198[24:Spt:86197.0,86176.0,86194.0] || node16(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  86199[24:Spt:86197.0,86176.1] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  86200[24:MRR:86171.0,86198.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  86203[24:MRR:86174.0,86198.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  86204[24:Res:86199.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  86205[24:Res:86199.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  86228[24:Res:86203.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  86230[24:MRR:86228.0,86200.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  86231[25:Spt:86230.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.10/7.28  86232[25:Res:86231.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.10/7.28  86233[25:Res:86231.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  86234[25:MRR:86233.0,86204.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  86235[25:MRR:86205.0,86234.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  86236[25:MRR:86232.0,86232.1,86235.0,86234.0] ||  -> .
% 7.10/7.28  86237[25:Spt:86236.0,86230.0,86231.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.10/7.28  86238[25:Spt:86236.0,86230.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  86241[25:Res:86238.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.10/7.28  86242[25:MRR:86241.0,142.0] ||  -> .
% 7.10/7.28  86243[22:Spt:86242.0,86121.0,86125.0] || node17(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  86244[22:Spt:86242.0,86121.1] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  86245[22:MRR:86108.0,86243.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  86248[22:MRR:86119.0,86243.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  86249[22:Res:86244.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  86250[22:Res:86244.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  86259[22:Res:86248.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  86261[22:MRR:86259.0,86245.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  86262[23:Spt:86261.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.10/7.28  86263[23:Res:86262.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.10/7.28  86264[23:Res:86262.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  86265[23:MRR:86264.0,86249.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  86266[23:MRR:86250.0,86265.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  86267[23:MRR:86263.0,86263.1,86266.0,86265.0] ||  -> .
% 7.10/7.28  86268[23:Spt:86267.0,86261.0,86262.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.10/7.28  86269[23:Spt:86267.0,86261.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  86272[23:Res:86269.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.10/7.28  86273[23:MRR:86272.0,142.0] ||  -> .
% 7.10/7.28  86274[17:Spt:86273.0,77706.0,77713.0] || node17(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.28  86275[17:Spt:86273.0,77706.1] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.28  86276[17:MRR:77671.0,86274.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.28  86278[17:MRR:77703.0,86274.0] ||  -> node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  86279[17:MRR:77701.0,86274.0] ||  -> node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.28  86329[17:Res:86278.1,87.0] ||  -> node17(c_e_h_1,c_e,s1) m_and_h_gate_v_in1(c_e_h_1,c_r,s1)*.
% 7.10/7.28  86456[17:Res:86279.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s2) -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  86458[17:MRR:86456.0,86276.0] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  86786[18:Spt:86329.1] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s1)*.
% 7.10/7.28  86787[18:Res:86786.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  86789[18:Res:86787.0,595.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  86791[18:Res:86787.0,515.0] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  86794[18:Res:86791.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  86795[18:Res:86791.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  86856[18:Res:86789.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  86858[18:MRR:86856.0,86787.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  86859[19:Spt:86858.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.10/7.28  86860[19:Res:86859.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.10/7.28  86861[19:Res:86859.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  86862[19:MRR:86861.0,86794.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  86863[19:MRR:86795.0,86862.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  86864[19:MRR:86860.0,86860.1,86863.0,86862.0] ||  -> .
% 7.10/7.28  86865[19:Spt:86864.0,86858.0,86859.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.10/7.28  86866[19:Spt:86864.0,86858.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  86869[19:Res:86866.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.10/7.28  86870[19:MRR:86869.0,142.0] ||  -> .
% 7.10/7.28  86871[18:Spt:86870.0,86329.1,86786.0] || m_and_h_gate_v_in1(c_e_h_1,c_r,s1)*+ -> .
% 7.10/7.28  86872[18:Spt:86870.0,86329.0] ||  -> node17(c_e_h_1,c_e,s1)*.
% 7.10/7.28  86877[18:Res:86872.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  86879[19:Spt:77788.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.10/7.28  86884[19:Res:86879.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.10/7.28  86935[19:Res:86884.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  86937[19:MRR:86935.0,86879.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  86938[19:Res:86937.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.28  86939[19:Res:86937.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  86940[20:Spt:86938.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.28  86945[20:Res:86940.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.28  86997[20:Res:86945.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  86999[20:MRR:86997.0,86940.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  87000[20:Res:86999.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  87001[20:Res:86999.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  87002[21:Spt:87000.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  87007[21:Res:87002.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  87011[21:Res:87007.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  87013[21:MRR:87011.0,10.0] ||  -> .
% 7.10/7.28  87014[21:Spt:87013.0,87000.0,87002.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)* -> .
% 7.10/7.28  87015[21:Spt:87013.0,87000.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  87017[21:MRR:87001.0,87014.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  87022[21:Res:87017.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  87023[21:MRR:87022.0,10.0] ||  -> .
% 7.10/7.28  87024[20:Spt:87023.0,86938.0,86940.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*+ -> .
% 7.10/7.28  87025[20:Spt:87023.0,86938.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.28  87027[20:MRR:86939.0,87024.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  87040[20:Res:87027.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  87041[20:MRR:87040.0,10.0] ||  -> .
% 7.10/7.28  87042[19:Spt:87041.0,77788.0,86879.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*+ -> .
% 7.10/7.28  87043[19:Spt:87041.0,77788.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s2)*.
% 7.10/7.28  87276[20:Spt:78066.1] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s3)*.
% 7.10/7.28  87280[20:Res:87276.0,96.0] ||  -> m_user_v_ack(c_e_h_1,c_u,s3)*.
% 7.10/7.28  87281[20:Res:87280.0,34.0] || m_and_h_gate_v_in2(c_e_h_1,c_d,s3)*+ -> .
% 7.10/7.28  87288[20:Res:934.2,87281.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s1) m_and_h_gate_v_in2(c_e_h_1,c_r,s0)* m_and_h_gate_v_in2(c_e_h_1,c_r,s2).
% 7.10/7.28  87291[20:MRR:87288.0,86871.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)* m_and_h_gate_v_in2(c_e_h_1,c_r,s2).
% 7.10/7.28  87293[21:Spt:87291.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.28  87294[21:Res:87293.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  87299[21:Res:87294.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  87301[21:Res:87299.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  87303[21:MRR:87301.0,10.0] ||  -> .
% 7.10/7.28  87304[21:Spt:87303.0,87291.0,87293.0] || m_and_h_gate_v_in2(c_e_h_1,c_r,s0)* -> .
% 7.10/7.28  87305[21:Spt:87303.0,87291.1] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s2)*.
% 7.10/7.28  87308[21:Res:87305.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.10/7.28  87310[21:MRR:87308.0,87042.0] ||  -> .
% 7.10/7.28  87311[20:Spt:87310.0,78066.1,87276.0] || m_and_h_gate_v_out(c_e_h_1,c_r,s3)*+ -> .
% 7.10/7.28  87312[20:Spt:87310.0,78066.0] ||  -> node21(c_e_h_1,c_r,s4,s3)*.
% 7.10/7.28  87326[21:Spt:86458.2] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s1)*.
% 7.10/7.28  87328[21:Res:87326.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)*.
% 7.10/7.28  87331[21:Res:87328.0,412.0] ||  -> node21(c_e_h_1,c_c,s0,s1)*.
% 7.10/7.28  87340[21:Res:87331.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s1) -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  87342[21:MRR:87340.0,87328.0] ||  -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  87343[21:Res:87342.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s0)*.
% 7.10/7.28  87345[21:Res:87343.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s0)*.
% 7.10/7.28  87346[21:MRR:87345.0,121.0] ||  -> .
% 7.10/7.28  87347[21:Spt:87346.0,86458.2,87326.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s1)* -> .
% 7.10/7.28  87348[21:Spt:87346.0,86458.0,86458.1] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  87349[21:MRR:86877.1,87347.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)* -> .
% 7.10/7.28  87355[21:Res:87348.1,87.0] ||  -> node16(c_e_h_1,c_e,s1) m_and_h_gate_v_in1(c_e_h_1,c_r,s1)*.
% 7.10/7.28  87356[21:MRR:87355.1,86871.0] ||  -> node16(c_e_h_1,c_e,s1)*.
% 7.10/7.28  87359[21:Res:87356.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  87360[21:MRR:87359.0,87359.1,87349.0,87347.0] ||  -> .
% 7.10/7.28  87361[16:Spt:87360.0,77615.0,77650.0] || node21(c_e_h_1,c_r,s3,s4)*+ -> .
% 7.10/7.28  87362[16:Spt:87360.0,77615.1] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s3)*.
% 7.10/7.28  87367[16:Res:87362.0,409.0] ||  -> node21(c_e_h_1,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_1,c_r,s2).
% 7.10/7.28  87418[16:Res:87367.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s3) -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.10/7.28  87420[16:MRR:87418.0,87362.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.10/7.28  87421[17:Spt:87420.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2)*.
% 7.10/7.28  87424[17:Res:87421.0,96.0] ||  -> m_user_v_ack(c_e_h_1,c_u,s2)*.
% 7.10/7.28  87425[17:Res:87424.0,34.0] || m_and_h_gate_v_in2(c_e_h_1,c_d,s2)*+ -> .
% 7.10/7.28  87427[17:Res:2305.0,87425.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1) m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.28  87431[18:Spt:87427.1] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.28  87432[18:Res:87431.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  87437[18:Res:87432.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  87442[18:Res:87437.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  87444[18:MRR:87442.0,10.0] ||  -> .
% 7.10/7.28  87445[18:Spt:87444.0,87427.1,87431.0] || m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*+ -> .
% 7.10/7.28  87446[18:Spt:87444.0,87427.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1)*.
% 7.10/7.28  87449[18:Res:87446.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.28  87456[18:Res:87449.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.28  87581[18:Res:87456.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  87583[18:MRR:87581.0,87449.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  87584[18:Res:87583.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  87585[18:Res:87583.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  87586[19:Spt:87584.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  87589[19:Res:87586.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.28  87592[19:MRR:87589.0,87445.0] ||  -> .
% 7.10/7.28  87593[19:Spt:87592.0,87584.0,87586.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.10/7.28  87594[19:Spt:87592.0,87584.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  87596[19:MRR:87585.0,87593.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  87604[19:Res:87596.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  87605[19:MRR:87604.0,10.0] ||  -> .
% 7.10/7.28  87606[17:Spt:87605.0,87420.0,87421.0] || m_and_h_gate_v_out(c_e_h_1,c_r,s2)*+ -> .
% 7.10/7.28  87607[17:Spt:87605.0,87420.1] ||  -> node20(c_e_h_1,c_r,s2)*.
% 7.10/7.28  87611[17:Res:87607.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s2)*.
% 7.10/7.28  87613[17:Res:87611.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.10/7.28  87634[17:Res:87613.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.10/7.28  87794[17:Res:87634.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  87796[17:MRR:87794.0,87613.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  87811[17:Res:87796.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  87901[18:Spt:87796.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.28  87906[18:Res:87901.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.28  88065[18:Res:87906.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  88067[18:MRR:88065.0,87901.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  88068[18:Res:88067.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  88069[18:Res:88067.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  88073[19:Spt:88068.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  88078[19:Res:88073.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  88081[19:Res:88078.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  88083[19:MRR:88081.0,10.0] ||  -> .
% 7.10/7.28  88084[19:Spt:88083.0,88068.0,88073.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.10/7.28  88085[19:Spt:88083.0,88068.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  88087[19:MRR:88069.0,88084.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  88095[19:Res:88087.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  88096[19:MRR:88095.0,10.0] ||  -> .
% 7.10/7.28  88097[18:Spt:88096.0,87796.0,87901.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)* -> .
% 7.10/7.28  88098[18:Spt:88096.0,87796.1] ||  -> node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  88099[18:MRR:87811.0,88097.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  88108[18:Res:88099.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  88109[18:MRR:88108.0,10.0] ||  -> .
% 7.10/7.28  88110[11:Spt:88109.0,64380.1,64381.0] || xuntil28(s4)*+ -> .
% 7.10/7.28  88111[11:Spt:88109.0,64380.0] ||  -> node23(s4)*.
% 7.10/7.28  88113[11:MRR:524.0,88111.0] ||  -> node21(c_e_h_1,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_1,c_r,s3).
% 7.10/7.28  88152[12:Spt:88113.0] ||  -> node21(c_e_h_1,c_r,s3,s4)*.
% 7.10/7.28  88153[12:Res:88152.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s4)+ -> node20(c_e_h_1,c_r,s3)*.
% 7.10/7.28  88220[12:Res:220.1,88153.0] node23(s4) ||  -> node20(c_e_h_1,c_r,s3)*.
% 7.10/7.28  88221[12:SSi:88220.0,5.0,64331.0,88111.0] ||  -> node20(c_e_h_1,c_r,s3)*.
% 7.10/7.28  88222[12:Res:88221.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s3)*.
% 7.10/7.28  88223[12:Res:88221.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s3)*.
% 7.10/7.28  88226[12:Res:88222.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s3)*.
% 7.10/7.28  88227[12:Res:88223.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s3)*.
% 7.10/7.28  88231[12:Res:88226.0,582.0] ||  -> node16(c_e_h_1,c_e,s2) node14(c_e_h_1,c_e,s2,s3)* m_c_h_element_v_out(c_e_h_1,c_e,s2).
% 7.10/7.28  88233[12:Res:88226.0,509.0] ||  -> node17(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.28  88241[12:Res:88227.0,390.0] ||  -> node10(c_e_h_1,c_m,s2,s3)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2).
% 7.10/7.28  88263[12:Res:88233.1,586.0] ||  -> node17(c_e_h_1,c_e,s2) node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.28  88265[12:Res:88233.1,511.0] ||  -> node17(c_e_h_1,c_e,s2) node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  88268[12:Res:88233.1,87.0] ||  -> node17(c_e_h_1,c_e,s2) m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.28  88275[13:Spt:88268.0] ||  -> node17(c_e_h_1,c_e,s2)*.
% 7.10/7.28  88276[13:Res:88275.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s2)*+ -> m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.28  88303[12:Res:88241.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s3) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) node9(c_e_h_1,c_m,s2)*.
% 7.10/7.28  88305[12:MRR:88303.0,88227.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) node9(c_e_h_1,c_m,s2)*.
% 7.10/7.28  88307[12:Res:88305.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s2)*.
% 7.10/7.28  88401[14:Spt:88305.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.10/7.28  88406[14:Res:88401.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.10/7.28  88411[14:Res:88406.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  88413[14:MRR:88411.0,88401.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.28  88414[14:Res:88413.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.28  88415[14:Res:88413.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  88416[15:Spt:88414.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.28  88421[15:Res:88416.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.28  88427[15:Res:88421.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  88429[15:MRR:88427.0,88416.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.28  88430[15:Res:88429.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  88431[15:Res:88429.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  88432[16:Spt:88430.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  88437[16:Res:88432.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.28  88440[16:Res:88437.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  88442[16:MRR:88440.0,10.0] ||  -> .
% 7.10/7.28  88443[16:Spt:88442.0,88430.0,88432.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.10/7.28  88444[16:Spt:88442.0,88430.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.28  88446[16:MRR:88431.0,88443.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.28  88454[16:Res:88446.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  88455[16:MRR:88454.0,10.0] ||  -> .
% 7.10/7.28  88456[15:Spt:88455.0,88414.0,88416.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)* -> .
% 7.10/7.28  88457[15:Spt:88455.0,88414.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.28  88459[15:MRR:88415.0,88456.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.28  88467[15:Res:88459.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.28  88468[15:MRR:88467.0,10.0] ||  -> .
% 7.10/7.28  88469[14:Spt:88468.0,88305.0,88401.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*+ -> .
% 7.10/7.28  88470[14:Spt:88468.0,88305.1] ||  -> node9(c_e_h_1,c_m,s2)*.
% 7.10/7.28  88487[12:Res:88231.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s3) -> node16(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.28  88489[12:MRR:88487.0,88226.0] ||  -> node16(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.28  88505[15:Spt:88489.2] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s2)*.
% 7.10/7.28  88507[15:Res:88505.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s2)*.
% 7.10/7.28  88519[15:Res:88507.0,410.0] ||  -> node21(c_e_h_1,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_1,c_c,s1).
% 7.10/7.28  88535[15:Res:88519.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s2) -> m_and_h_gate_v_out(c_e_h_1,c_c,s1) node20(c_e_h_1,c_c,s1)*.
% 7.10/7.28  88537[15:MRR:88535.0,88507.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1) node20(c_e_h_1,c_c,s1)*.
% 7.10/7.28  88538[15:Res:88537.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)* m_and_h_gate_v_in1(c_e_h_1,c_c,s1).
% 7.10/7.28  88540[16:Spt:88538.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)*.
% 7.10/7.28  88542[16:Res:88540.0,412.0] ||  -> node21(c_e_h_1,c_c,s0,s1)*.
% 7.10/7.28  88547[16:Res:88542.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s1) -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  88549[16:MRR:88547.0,88540.0] ||  -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  88550[16:Res:88549.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s0)*.
% 7.10/7.28  88552[16:Res:88550.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s0)*.
% 7.10/7.28  88553[16:MRR:88552.0,121.0] ||  -> .
% 7.10/7.28  88554[16:Spt:88553.0,88538.0,88540.0] || m_and_h_gate_v_out(c_e_h_1,c_c,s1)*+ -> .
% 7.10/7.28  88555[16:Spt:88553.0,88538.1] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s1)*.
% 7.10/7.28  88559[16:Res:88555.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s1)*.
% 7.10/7.28  88566[16:Res:88559.0,375.0] ||  -> node12(c_e_h_1,c_a,s0,s1)*.
% 7.10/7.28  88573[16:Res:88566.0,123.1] || m_mutex_h_half_v_out(c_e_h_1,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_1,c_a,s0).
% 7.10/7.28  88575[16:MRR:88573.0,88559.0] ||  -> m_mutex_h_half_v_inp(c_e_h_1,c_a,s0)*.
% 7.10/7.28  88576[16:Res:88575.0,18.0] ||  -> m_user_v_req(c_e_h_1,c_u,s0)*.
% 7.10/7.28  88577[16:MRR:88576.0,106.0] ||  -> .
% 7.10/7.28  88578[15:Spt:88577.0,88489.2,88505.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.28  88579[15:Spt:88577.0,88489.0,88489.1] ||  -> node16(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.28  88580[15:MRR:88276.1,88578.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.28  88581[15:Res:88579.1,586.0] ||  -> node16(c_e_h_1,c_e,s2) node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.28  88583[15:Res:88579.1,511.0] ||  -> node16(c_e_h_1,c_e,s2) node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  88586[15:Res:88579.1,87.0] ||  -> node16(c_e_h_1,c_e,s2) m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.28  88588[16:Spt:88586.0] ||  -> node16(c_e_h_1,c_e,s2)*.
% 7.10/7.28  88590[16:Res:88588.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.28  88591[16:MRR:88590.0,88590.1,88580.0,88578.0] ||  -> .
% 7.10/7.28  88592[16:Spt:88591.0,88586.0,88588.0] || node16(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.28  88593[16:Spt:88591.0,88586.1] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.28  88594[16:MRR:88579.0,88592.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.28  88596[16:MRR:88583.0,88592.0] ||  -> node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  88597[16:MRR:88581.0,88592.0] ||  -> node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.28  88610[16:Res:88596.1,595.0] ||  -> node17(c_e_h_1,c_e,s1) node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  88612[16:Res:88596.1,515.0] ||  -> node17(c_e_h_1,c_e,s1) node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  88616[17:Spt:88612.0] ||  -> node17(c_e_h_1,c_e,s1)*.
% 7.10/7.28  88617[17:Res:88616.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  88735[16:Res:88597.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s2) -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  88737[16:MRR:88735.0,88594.0] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  88738[18:Spt:88737.2] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s1)*.
% 7.10/7.28  88740[18:Res:88738.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)*.
% 7.10/7.28  88743[18:Res:88740.0,412.0] ||  -> node21(c_e_h_1,c_c,s0,s1)*.
% 7.10/7.28  88752[18:Res:88743.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s1) -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  88754[18:MRR:88752.0,88740.0] ||  -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.28  88755[18:Res:88754.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s0)*.
% 7.10/7.28  88757[18:Res:88755.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s0)*.
% 7.10/7.28  88758[18:MRR:88757.0,121.0] ||  -> .
% 7.10/7.28  88759[18:Spt:88758.0,88737.2,88738.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  88760[18:Spt:88758.0,88737.0,88737.1] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  88761[18:MRR:88617.1,88759.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  88763[18:Res:88760.1,595.0] ||  -> node16(c_e_h_1,c_e,s1) node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  88765[18:Res:88760.1,515.0] ||  -> node16(c_e_h_1,c_e,s1) node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  88769[19:Spt:88765.0] ||  -> node16(c_e_h_1,c_e,s1)*.
% 7.10/7.28  88771[19:Res:88769.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.28  88772[19:MRR:88771.0,88771.1,88761.0,88759.0] ||  -> .
% 7.10/7.28  88773[19:Spt:88772.0,88765.0,88769.0] || node16(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  88774[19:Spt:88772.0,88765.1] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  88775[19:MRR:88760.0,88773.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  88778[19:MRR:88763.0,88773.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.28  88779[19:Res:88774.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  88780[19:Res:88774.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  88789[19:Res:88778.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  88791[19:MRR:88789.0,88775.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  88792[20:Spt:88791.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.10/7.28  88793[20:Res:88792.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.10/7.28  88794[20:Res:88792.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.28  88795[20:MRR:88794.0,88779.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  88796[20:MRR:88780.0,88795.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.28  88797[20:MRR:88793.0,88793.1,88796.0,88795.0] ||  -> .
% 7.10/7.28  88798[20:Spt:88797.0,88791.0,88792.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.10/7.28  88799[20:Spt:88797.0,88791.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.28  88802[20:Res:88799.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.10/7.28  88803[20:MRR:88802.0,142.0] ||  -> .
% 7.10/7.28  88804[17:Spt:88803.0,88612.0,88616.0] || node17(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.28  88805[17:Spt:88803.0,88612.1] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.10/7.28  88806[17:MRR:88596.0,88804.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.28  88809[17:MRR:88610.0,88804.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.29  88810[17:Res:88805.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.29  88811[17:Res:88805.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.29  88826[17:Res:88809.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.29  88828[17:MRR:88826.0,88806.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.29  88829[18:Spt:88828.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.10/7.29  88830[18:Res:88829.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.10/7.29  88831[18:Res:88829.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.29  88832[18:MRR:88831.0,88810.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.29  88833[18:MRR:88811.0,88832.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.29  88834[18:MRR:88830.0,88830.1,88833.0,88832.0] ||  -> .
% 7.10/7.29  88835[18:Spt:88834.0,88828.0,88829.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.10/7.29  88836[18:Spt:88834.0,88828.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.29  88839[18:Res:88836.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.10/7.29  88840[18:MRR:88839.0,142.0] ||  -> .
% 7.10/7.29  88841[13:Spt:88840.0,88268.0,88275.0] || node17(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.29  88842[13:Spt:88840.0,88268.1] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.29  88843[13:MRR:88233.0,88841.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.29  88845[13:MRR:88265.0,88841.0] ||  -> node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.29  88846[13:MRR:88263.0,88841.0] ||  -> node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.29  88855[14:Spt:88307.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.10/7.29  88860[14:Res:88855.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.10/7.29  88902[14:Res:88860.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.29  88904[14:MRR:88902.0,88855.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.29  88905[14:Res:88904.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.29  88906[14:Res:88904.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.29  88907[15:Spt:88905.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.29  88912[15:Res:88907.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.29  88951[13:Res:88846.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s2) -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.29  88953[13:MRR:88951.0,88843.0] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.29  88964[15:Res:88912.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.29  88966[15:MRR:88964.0,88907.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.29  88967[15:Res:88966.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.29  88968[15:Res:88966.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.29  88969[16:Spt:88967.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.29  88974[16:Res:88969.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.29  88977[16:Res:88974.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.29  88979[16:MRR:88977.0,10.0] ||  -> .
% 7.10/7.29  88980[16:Spt:88979.0,88967.0,88969.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.10/7.29  88981[16:Spt:88979.0,88967.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.29  88983[16:MRR:88968.0,88980.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.29  88991[16:Res:88983.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.29  88992[16:MRR:88991.0,10.0] ||  -> .
% 7.10/7.29  88993[15:Spt:88992.0,88905.0,88907.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)* -> .
% 7.10/7.29  88994[15:Spt:88992.0,88905.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.29  88996[15:MRR:88906.0,88993.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.29  89004[15:Res:88996.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.29  89005[15:MRR:89004.0,10.0] ||  -> .
% 7.10/7.29  89006[14:Spt:89005.0,88307.0,88855.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*+ -> .
% 7.10/7.29  89007[14:Spt:89005.0,88307.1] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s2)*.
% 7.10/7.29  89015[15:Spt:88845.1] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.29  89017[15:Res:89015.0,595.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.29  89019[15:Res:89015.0,515.0] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.10/7.29  89023[15:Res:89019.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.29  89024[15:Res:89019.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.29  89048[15:Res:89017.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.29  89050[15:MRR:89048.0,89015.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.29  89051[16:Spt:89050.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.10/7.29  89052[16:Res:89051.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.10/7.29  89053[16:Res:89051.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.29  89054[16:MRR:89053.0,89023.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.29  89055[16:MRR:89024.0,89054.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.29  89056[16:MRR:89052.0,89052.1,89055.0,89054.0] ||  -> .
% 7.10/7.29  89057[16:Spt:89056.0,89050.0,89051.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.10/7.29  89058[16:Spt:89056.0,89050.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.29  89061[16:Res:89058.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.10/7.29  89062[16:MRR:89061.0,142.0] ||  -> .
% 7.10/7.29  89063[15:Spt:89062.0,88845.1,89015.0] || m_c_h_element_v_out(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.29  89064[15:Spt:89062.0,88845.0] ||  -> node17(c_e_h_1,c_e,s1)*.
% 7.10/7.29  89065[15:MRR:88953.1,89063.0] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_in1(c_e_h_1,c_e,s1)*.
% 7.10/7.29  89067[15:Res:89064.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.29  89068[15:Res:89064.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s1) -> m_c_h_element_v_in2(c_e_h_1,c_e,s1)*.
% 7.10/7.29  89082[16:Spt:89065.0] ||  -> node16(c_e_h_1,c_e,s1)*.
% 7.10/7.29  89083[16:Res:89082.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1) -> .
% 7.10/7.29  89084[16:Res:89082.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.29  89085[16:MRR:89084.0,89067.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s1)*.
% 7.10/7.29  89086[16:MRR:89068.0,89085.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s1)*.
% 7.10/7.29  89087[16:MRR:89083.0,89083.1,89086.0,89085.0] ||  -> .
% 7.10/7.29  89088[16:Spt:89087.0,89065.0,89082.0] || node16(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.29  89089[16:Spt:89087.0,89065.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s1)*.
% 7.10/7.29  89092[16:Res:89089.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)*.
% 7.10/7.29  89095[16:Res:89092.0,412.0] ||  -> node21(c_e_h_1,c_c,s0,s1)*.
% 7.10/7.29  89109[16:Res:89095.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s1) -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.29  89111[16:MRR:89109.0,89092.0] ||  -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.29  89112[16:Res:89111.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s0)*.
% 7.10/7.29  89114[16:Res:89112.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s0)*.
% 7.10/7.29  89115[16:MRR:89114.0,121.0] ||  -> .
% 7.10/7.29  89116[12:Spt:89115.0,88113.0,88152.0] || node21(c_e_h_1,c_r,s3,s4)*+ -> .
% 7.10/7.29  89117[12:Spt:89115.0,88113.1] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s3)*.
% 7.10/7.29  89120[12:Res:89117.0,409.0] ||  -> node21(c_e_h_1,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_1,c_r,s2).
% 7.10/7.29  89139[12:Res:89120.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s3) -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.10/7.29  89141[12:MRR:89139.0,89117.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.10/7.29  89505[13:Spt:89141.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2)*.
% 7.10/7.29  89508[13:Res:89505.0,96.0] ||  -> m_user_v_ack(c_e_h_1,c_u,s2)*.
% 7.10/7.29  89509[13:Res:89508.0,34.0] || m_and_h_gate_v_in2(c_e_h_1,c_d,s2)*+ -> .
% 7.10/7.29  89511[13:Res:2305.0,89509.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1) m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.29  89515[14:Spt:89511.1] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.29  89516[14:Res:89515.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.29  89521[14:Res:89516.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.29  89523[14:Res:89521.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.29  89525[14:MRR:89523.0,10.0] ||  -> .
% 7.10/7.29  89526[14:Spt:89525.0,89511.1,89515.0] || m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*+ -> .
% 7.10/7.29  89527[14:Spt:89525.0,89511.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1)*.
% 7.10/7.29  89530[14:Res:89527.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.29  89537[14:Res:89530.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.29  89569[14:Res:89537.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.29  89571[14:MRR:89569.0,89530.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.29  89572[14:Res:89571.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.29  89573[14:Res:89571.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.29  89574[15:Spt:89572.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.29  89577[15:Res:89574.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.29  89580[15:MRR:89577.0,89526.0] ||  -> .
% 7.10/7.29  89581[15:Spt:89580.0,89572.0,89574.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.10/7.29  89582[15:Spt:89580.0,89572.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.29  89584[15:MRR:89573.0,89581.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.29  89592[15:Res:89584.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.29  89593[15:MRR:89592.0,10.0] ||  -> .
% 7.10/7.29  89594[13:Spt:89593.0,89141.0,89505.0] || m_and_h_gate_v_out(c_e_h_1,c_r,s2)*+ -> .
% 7.10/7.29  89595[13:Spt:89593.0,89141.1] ||  -> node20(c_e_h_1,c_r,s2)*.
% 7.10/7.29  89599[13:Res:89595.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s2)*.
% 7.10/7.29  89601[13:Res:89599.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.10/7.29  89622[13:Res:89601.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.10/7.29  89677[13:Res:89622.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.29  89679[13:MRR:89677.0,89601.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.29  89680[13:Res:89679.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.29  89681[13:Res:89679.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.29  89685[14:Spt:89680.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.29  89690[14:Res:89685.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.29  89703[14:Res:89690.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.29  89705[14:MRR:89703.0,89685.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.29  89706[14:Res:89705.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.29  89707[14:Res:89705.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.29  89708[15:Spt:89706.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.29  89713[15:Res:89708.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.29  89716[15:Res:89713.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.29  89718[15:MRR:89716.0,10.0] ||  -> .
% 7.10/7.29  89719[15:Spt:89718.0,89706.0,89708.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*+ -> .
% 7.10/7.29  89720[15:Spt:89718.0,89706.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.29  89722[15:MRR:89707.0,89719.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.29  89730[15:Res:89722.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.29  89731[15:MRR:89730.0,10.0] ||  -> .
% 7.10/7.29  89732[14:Spt:89731.0,89680.0,89685.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)* -> .
% 7.10/7.29  89733[14:Spt:89731.0,89680.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.29  89735[14:MRR:89681.0,89732.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.29  89743[14:Res:89735.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.29  89744[14:MRR:89743.0,10.0] ||  -> .
% 7.10/7.29  89745[10:Spt:89744.0,64342.0,64369.0] || m_and_h_gate_v_in2(c_e_h_3,c_d,s4)*+ -> .
% 7.10/7.29  89746[10:Spt:89744.0,64342.1] ||  -> m_and_h_gate_v_in2(c_e_h_3,c_r,s3)*.
% 7.10/7.29  89747[10:MRR:64343.0,89745.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s3)*.
% 7.10/7.29  89750[10:Res:89747.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_e,s3)*.
% 7.10/7.29  89772[10:Res:89750.0,582.0] ||  -> node16(c_e_h_3,c_e,s2) node14(c_e_h_3,c_e,s2,s3)* m_c_h_element_v_out(c_e_h_3,c_e,s2).
% 7.10/7.29  89774[10:Res:89750.0,509.0] ||  -> node17(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)*.
% 7.10/7.29  89781[10:Res:89774.1,586.0] ||  -> node17(c_e_h_3,c_e,s2) node16(c_e_h_3,c_e,s1) node14(c_e_h_3,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_3,c_e,s1).
% 7.10/7.29  89783[10:Res:89774.1,511.0] ||  -> node17(c_e_h_3,c_e,s2) node17(c_e_h_3,c_e,s1) m_c_h_element_v_out(c_e_h_3,c_e,s1)*.
% 7.10/7.29  89786[10:Res:89774.1,87.0] ||  -> node17(c_e_h_3,c_e,s2) m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.10/7.29  89793[11:Spt:89786.0] ||  -> node17(c_e_h_3,c_e,s2)*.
% 7.10/7.29  89794[11:Res:89793.0,135.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s2)*+ -> m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.10/7.29  89795[11:Res:89793.0,136.0] || m_c_h_element_v_in1(c_e_h_3,c_e,s2)+ -> m_c_h_element_v_in2(c_e_h_3,c_e,s2)*.
% 7.10/7.29  89835[12:Spt:64332.0] ||  -> node21(c_e_h_2,c_r,s3,s4)*.
% 7.10/7.29  89836[12:Res:89835.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_r,s4)+ -> node20(c_e_h_2,c_r,s3)*.
% 7.10/7.29  89838[12:Res:222.1,89836.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_d,s4) node20(c_e_h_2,c_r,s3)*.
% 7.10/7.29  89839[12:Res:219.1,89836.0] node25(s4) ||  -> node20(c_e_h_2,c_r,s3)*.
% 7.10/7.29  89840[12:Res:218.1,89836.0] node23(s4) ||  -> node20(c_e_h_2,c_r,s3)*.
% 7.10/7.29  89852[12:SoR:89839.0,156.1] node26(s4) ||  -> node20(c_e_h_2,c_r,s3)* node23(s4) node24(s4).
% 7.10/7.29  89853[12:MRR:89852.2,89840.0] node26(s4) ||  -> node20(c_e_h_2,c_r,s3)* node24(s4).
% 7.10/7.29  89854[13:Spt:89838.1] ||  -> node20(c_e_h_2,c_r,s3)*.
% 7.10/7.29  89855[13:Res:89854.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s3)*.
% 7.10/7.29  89856[13:Res:89854.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s3)*.
% 7.10/7.29  89859[13:Res:89855.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s3)*.
% 7.10/7.29  89860[13:Res:89856.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s3)*.
% 7.10/7.29  89864[13:Res:89859.0,582.0] ||  -> node16(c_e_h_2,c_e,s2) node14(c_e_h_2,c_e,s2,s3)* m_c_h_element_v_out(c_e_h_2,c_e,s2).
% 7.10/7.29  89866[13:Res:89859.0,509.0] ||  -> node17(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.10/7.29  89874[13:Res:89860.0,390.0] ||  -> node10(c_e_h_2,c_m,s2,s3)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2).
% 7.10/7.29  89901[13:Res:89866.1,87.0] ||  -> node17(c_e_h_2,c_e,s2) m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.10/7.29  89908[10:Res:89772.1,130.1] || m_c_h_element_v_out(c_e_h_3,c_e,s3) -> node16(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.10/7.29  89910[10:MRR:89908.0,89750.0] ||  -> node16(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.10/7.29  89911[14:Spt:89901.1] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.10/7.29  89912[14:Res:89911.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.10/7.29  89913[14:Res:89912.0,586.0] ||  -> node16(c_e_h_2,c_e,s1) node14(c_e_h_2,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_2,c_e,s1).
% 7.10/7.29  89915[14:Res:89912.0,511.0] ||  -> node17(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.29  89927[14:Res:89915.1,595.0] ||  -> node17(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.29  89929[14:Res:89915.1,515.0] ||  -> node17(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.10/7.29  89933[15:Spt:89929.0] ||  -> node17(c_e_h_2,c_e,s1)*.
% 7.10/7.29  89934[15:Res:89933.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.29  89939[13:Res:89874.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s3) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) node9(c_e_h_2,c_m,s2)*.
% 7.10/7.29  89941[13:MRR:89939.0,89860.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) node9(c_e_h_2,c_m,s2)*.
% 7.10/7.29  89942[16:Spt:89910.2] ||  -> m_c_h_element_v_in1(c_e_h_3,c_e,s2)*.
% 7.10/7.29  89944[16:Res:89942.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s2)*.
% 7.10/7.29  89947[16:Res:89944.0,410.0] ||  -> node21(c_e_h_3,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_3,c_c,s1).
% 7.10/7.29  89965[13:Res:89941.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s2)*.
% 7.10/7.29  89989[16:Res:89947.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_c,s2) -> m_and_h_gate_v_out(c_e_h_3,c_c,s1) node20(c_e_h_3,c_c,s1)*.
% 7.10/7.29  89991[16:MRR:89989.0,89944.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1) node20(c_e_h_3,c_c,s1)*.
% 7.10/7.29  89992[16:Res:89991.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1)* m_and_h_gate_v_in1(c_e_h_3,c_c,s1).
% 7.10/7.29  89994[17:Spt:89992.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1)*.
% 7.10/7.29  89996[17:Res:89994.0,412.0] ||  -> node21(c_e_h_3,c_c,s0,s1)*.
% 7.10/7.29  90001[17:Res:89996.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_c,s1) -> node20(c_e_h_3,c_c,s0)*.
% 7.10/7.29  90003[17:MRR:90001.0,89994.0] ||  -> node20(c_e_h_3,c_c,s0)*.
% 7.10/7.29  90004[17:Res:90003.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_c,s0)*.
% 7.10/7.29  90006[17:Res:90004.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_3,c_a,s0)*.
% 7.10/7.29  90007[17:MRR:90006.0,121.0] ||  -> .
% 7.10/7.29  90008[17:Spt:90007.0,89992.0,89994.0] || m_and_h_gate_v_out(c_e_h_3,c_c,s1)*+ -> .
% 7.10/7.29  90009[17:Spt:90007.0,89992.1] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_c,s1)*.
% 7.10/7.29  90013[17:Res:90009.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_3,c_a,s1)*.
% 7.10/7.29  90020[17:Res:90013.0,375.0] ||  -> node12(c_e_h_3,c_a,s0,s1)*.
% 7.10/7.29  90027[17:Res:90020.0,123.1] || m_mutex_h_half_v_out(c_e_h_3,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_3,c_a,s0).
% 7.10/7.29  90029[17:MRR:90027.0,90013.0] ||  -> m_mutex_h_half_v_inp(c_e_h_3,c_a,s0)*.
% 7.10/7.29  90030[17:Res:90029.0,18.0] ||  -> m_user_v_req(c_e_h_3,c_u,s0)*.
% 7.10/7.29  90031[17:MRR:90030.0,106.0] ||  -> .
% 7.10/7.29  90032[16:Spt:90031.0,89910.2,89942.0] || m_c_h_element_v_in1(c_e_h_3,c_e,s2)*+ -> .
% 7.10/7.29  90033[16:Spt:90031.0,89910.0,89910.1] ||  -> node16(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)*.
% 7.10/7.29  90034[16:MRR:89794.1,90032.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s2)*+ -> .
% 7.10/7.29  90040[16:Res:90033.1,87.0] ||  -> node16(c_e_h_3,c_e,s2) m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.10/7.29  90045[17:Spt:89941.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.10/7.29  90050[17:Res:90045.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.10/7.29  90065[18:Spt:90040.0] ||  -> node16(c_e_h_3,c_e,s2)*.
% 7.10/7.29  90067[18:Res:90065.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.10/7.29  90068[18:MRR:90067.0,90067.1,90034.0,90032.0] ||  -> .
% 7.10/7.29  90069[18:Spt:90068.0,90040.0,90065.0] || node16(c_e_h_3,c_e,s2)*+ -> .
% 7.10/7.29  90070[18:Spt:90068.0,90040.1] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.10/7.29  90101[17:Res:90050.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.29  90103[17:MRR:90101.0,90045.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.29  90104[17:Res:90103.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.29  90105[17:Res:90103.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.29  90106[19:Spt:90104.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.29  90111[19:Res:90106.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.29  90126[19:Res:90111.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.29  90128[19:MRR:90126.0,90106.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.29  90129[19:Res:90128.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.29  90130[19:Res:90128.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.29  90131[20:Spt:90129.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.29  90136[20:Res:90131.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.29  90139[20:Res:90136.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.29  90141[20:MRR:90139.0,13.0] ||  -> .
% 7.10/7.29  90142[20:Spt:90141.0,90129.0,90131.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)* -> .
% 7.10/7.29  90143[20:Spt:90141.0,90129.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.29  90145[20:MRR:90130.0,90142.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.29  90150[20:Res:90145.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.29  90151[20:MRR:90150.0,13.0] ||  -> .
% 7.10/7.29  90152[19:Spt:90151.0,90104.0,90106.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*+ -> .
% 7.10/7.29  90153[19:Spt:90151.0,90104.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.29  90155[19:MRR:90105.0,90152.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.29  90168[19:Res:90155.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.29  90169[19:MRR:90168.0,13.0] ||  -> .
% 7.10/7.29  90170[17:Spt:90169.0,89941.0,90045.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*+ -> .
% 7.10/7.29  90171[17:Spt:90169.0,89941.1] ||  -> node9(c_e_h_2,c_m,s2)*.
% 7.10/7.29  90179[18:Spt:90033.0] ||  -> node16(c_e_h_3,c_e,s2)*.
% 7.10/7.29  90181[18:Res:90179.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.10/7.29  90182[18:MRR:90181.0,90181.1,90034.0,90032.0] ||  -> .
% 7.10/7.29  90183[18:Spt:90182.0,90033.0,90179.0] || node16(c_e_h_3,c_e,s2)*+ -> .
% 7.10/7.29  90184[18:Spt:90182.0,90033.1] ||  -> m_c_h_element_v_out(c_e_h_3,c_e,s2)*.
% 7.10/7.29  90213[14:Res:89913.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s2) -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.29  90215[14:MRR:90213.0,89912.0] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.29  90216[19:Spt:90215.2] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s1)*.
% 7.10/7.29  90218[19:Res:90216.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)*.
% 7.10/7.29  90221[19:Res:90218.0,412.0] ||  -> node21(c_e_h_2,c_c,s0,s1)*.
% 7.10/7.29  90239[19:Res:90221.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s1) -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.29  90241[19:MRR:90239.0,90218.0] ||  -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.29  90242[19:Res:90241.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s0)*.
% 7.10/7.29  90244[19:Res:90242.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s0)*.
% 7.10/7.29  90245[19:MRR:90244.0,121.0] ||  -> .
% 7.10/7.29  90246[19:Spt:90245.0,90215.2,90216.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.29  90247[19:Spt:90245.0,90215.0,90215.1] ||  -> node16(c_e_h_2,c_e,s1) m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.29  90248[19:MRR:89934.1,90246.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.29  90250[19:Res:90247.1,595.0] ||  -> node16(c_e_h_2,c_e,s1) node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.29  90252[19:Res:90247.1,515.0] ||  -> node16(c_e_h_2,c_e,s1) node17(c_e_h_2,c_e,s0)*.
% 7.10/7.29  90259[20:Spt:90252.0] ||  -> node16(c_e_h_2,c_e,s1)*.
% 7.10/7.29  90261[20:Res:90259.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s1)* m_c_h_element_v_in1(c_e_h_2,c_e,s1).
% 7.10/7.29  90262[20:MRR:90261.0,90261.1,90248.0,90246.0] ||  -> .
% 7.10/7.29  90263[20:Spt:90262.0,90252.0,90259.0] || node16(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.29  90264[20:Spt:90262.0,90252.1] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.10/7.29  90265[20:MRR:90247.0,90263.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.29  90268[20:MRR:90250.0,90263.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.29  90269[20:Res:90264.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.29  90270[20:Res:90264.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.29  90288[20:Res:90268.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.29  90290[20:MRR:90288.0,90265.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.29  90291[21:Spt:90290.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.10/7.29  90292[21:Res:90291.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.10/7.29  90293[21:Res:90291.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.29  90294[21:MRR:90293.0,90269.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.29  90295[21:MRR:90270.0,90294.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.29  90296[21:MRR:90292.0,90292.1,90295.0,90294.0] ||  -> .
% 7.10/7.29  90297[21:Spt:90296.0,90290.0,90291.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.10/7.29  90298[21:Spt:90296.0,90290.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.29  90301[21:Res:90298.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.10/7.29  90302[21:MRR:90301.0,142.0] ||  -> .
% 7.10/7.29  90303[15:Spt:90302.0,89929.0,89933.0] || node17(c_e_h_2,c_e,s1)*+ -> .
% 7.10/7.29  90304[15:Spt:90302.0,89929.1] ||  -> node17(c_e_h_2,c_e,s0)*.
% 7.10/7.29  90305[15:MRR:89915.0,90303.0] ||  -> m_c_h_element_v_out(c_e_h_2,c_e,s1)*.
% 7.10/7.29  90308[15:MRR:89927.0,90303.0] ||  -> node16(c_e_h_2,c_e,s0) node14(c_e_h_2,c_e,s0,s1)*.
% 7.10/7.29  90309[15:Res:90304.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.29  90310[15:Res:90304.0,136.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.29  90340[16:Spt:89910.0] ||  -> node16(c_e_h_3,c_e,s2)*.
% 7.10/7.29  90341[16:Res:90340.0,134.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2) -> .
% 7.10/7.29  90342[16:Res:90340.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.10/7.29  90343[16:MRR:90342.0,89794.0] ||  -> m_c_h_element_v_in1(c_e_h_3,c_e,s2)*.
% 7.10/7.29  90344[16:MRR:89795.0,90343.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_e,s2)*.
% 7.10/7.29  90345[16:MRR:90341.0,90341.1,90344.0,90343.0] ||  -> .
% 7.10/7.29  90346[16:Spt:90345.0,89910.0,90340.0] || node16(c_e_h_3,c_e,s2)*+ -> .
% 7.10/7.29  90347[16:Spt:90345.0,89910.1,89910.2] ||  -> m_c_h_element_v_out(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.10/7.29  90377[15:Res:90308.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s1)* -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.29  90379[15:MRR:90377.0,90305.0] ||  -> node16(c_e_h_2,c_e,s0) m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.29  90380[17:Spt:90379.0] ||  -> node16(c_e_h_2,c_e,s0)*.
% 7.10/7.29  90381[17:Res:90380.0,134.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0) -> .
% 7.10/7.29  90382[17:Res:90380.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)* m_c_h_element_v_in1(c_e_h_2,c_e,s0).
% 7.10/7.29  90383[17:MRR:90382.0,90309.0] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.29  90384[17:MRR:90310.0,90383.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s0)*.
% 7.10/7.29  90385[17:MRR:90381.0,90381.1,90384.0,90383.0] ||  -> .
% 7.10/7.29  90386[17:Spt:90385.0,90379.0,90380.0] || node16(c_e_h_2,c_e,s0)* -> .
% 7.10/7.29  90387[17:Spt:90385.0,90379.1] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s0)*.
% 7.10/7.29  90390[17:Res:90387.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s0)*.
% 7.10/7.29  90391[17:MRR:90390.0,142.0] ||  -> .
% 7.10/7.29  90392[14:Spt:90391.0,89901.1,89911.0] || m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*+ -> .
% 7.10/7.29  90393[14:Spt:90391.0,89901.0] ||  -> node17(c_e_h_2,c_e,s2)*.
% 7.10/7.29  90398[14:Res:90393.0,135.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s2)*+ -> m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.29  90400[15:Spt:89965.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.10/7.29  90405[15:Res:90400.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.10/7.29  90420[15:Res:90405.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.29  90422[15:MRR:90420.0,90400.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.29  90423[15:Res:90422.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.29  90424[15:Res:90422.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.29  90425[16:Spt:90423.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.29  90430[16:Res:90425.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.29  90438[16:Res:90430.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.29  90440[16:MRR:90438.0,90425.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.29  90441[16:Res:90440.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.29  90442[16:Res:90440.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.29  90443[17:Spt:90441.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.29  90448[17:Res:90443.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.29  90454[17:Res:90448.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.29  90456[17:MRR:90454.0,13.0] ||  -> .
% 7.10/7.29  90457[17:Spt:90456.0,90441.0,90443.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)* -> .
% 7.10/7.29  90458[17:Spt:90456.0,90441.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.29  90460[17:MRR:90442.0,90457.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.29  90465[17:Res:90460.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.29  90466[17:MRR:90465.0,13.0] ||  -> .
% 7.10/7.29  90467[16:Spt:90466.0,90423.0,90425.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*+ -> .
% 7.10/7.29  90468[16:Spt:90466.0,90423.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.29  90470[16:MRR:90424.0,90467.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.29  90483[16:Res:90470.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.29  90484[16:MRR:90483.0,13.0] ||  -> .
% 7.10/7.29  90485[15:Spt:90484.0,89965.0,90400.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*+ -> .
% 7.10/7.29  90486[15:Spt:90484.0,89965.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s2)*.
% 7.10/7.29  90497[16:Spt:89910.2] ||  -> m_c_h_element_v_in1(c_e_h_3,c_e,s2)*.
% 7.10/7.29  90499[16:Res:90497.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s2)*.
% 7.10/7.29  90511[16:Res:90499.0,410.0] ||  -> node21(c_e_h_3,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_3,c_c,s1).
% 7.10/7.29  90526[16:Res:90511.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_c,s2) -> m_and_h_gate_v_out(c_e_h_3,c_c,s1) node20(c_e_h_3,c_c,s1)*.
% 7.10/7.29  90528[16:MRR:90526.0,90499.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1) node20(c_e_h_3,c_c,s1)*.
% 7.10/7.29  90529[16:Res:90528.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1)* m_and_h_gate_v_in1(c_e_h_3,c_c,s1).
% 7.10/7.29  90531[17:Spt:90529.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1)*.
% 7.10/7.29  90533[17:Res:90531.0,412.0] ||  -> node21(c_e_h_3,c_c,s0,s1)*.
% 7.10/7.29  90538[17:Res:90533.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_c,s1) -> node20(c_e_h_3,c_c,s0)*.
% 7.10/7.29  90540[17:MRR:90538.0,90531.0] ||  -> node20(c_e_h_3,c_c,s0)*.
% 7.10/7.29  90541[17:Res:90540.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_c,s0)*.
% 7.10/7.29  90543[17:Res:90541.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_3,c_a,s0)*.
% 7.10/7.29  90544[17:MRR:90543.0,121.0] ||  -> .
% 7.10/7.29  90545[17:Spt:90544.0,90529.0,90531.0] || m_and_h_gate_v_out(c_e_h_3,c_c,s1)*+ -> .
% 7.10/7.29  90546[17:Spt:90544.0,90529.1] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_c,s1)*.
% 7.10/7.29  90550[17:Res:90546.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_3,c_a,s1)*.
% 7.10/7.29  90557[17:Res:90550.0,375.0] ||  -> node12(c_e_h_3,c_a,s0,s1)*.
% 7.10/7.29  90564[17:Res:90557.0,123.1] || m_mutex_h_half_v_out(c_e_h_3,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_3,c_a,s0).
% 7.10/7.29  90566[17:MRR:90564.0,90550.0] ||  -> m_mutex_h_half_v_inp(c_e_h_3,c_a,s0)*.
% 7.10/7.29  90567[17:Res:90566.0,18.0] ||  -> m_user_v_req(c_e_h_3,c_u,s0)*.
% 7.10/7.29  90568[17:MRR:90567.0,106.0] ||  -> .
% 7.10/7.29  90569[16:Spt:90568.0,89910.2,90497.0] || m_c_h_element_v_in1(c_e_h_3,c_e,s2)*+ -> .
% 7.10/7.29  90570[16:Spt:90568.0,89910.0,89910.1] ||  -> node16(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)*.
% 7.10/7.29  90571[16:MRR:89794.1,90569.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s2)*+ -> .
% 7.10/7.29  90577[16:Res:90570.1,87.0] ||  -> node16(c_e_h_3,c_e,s2) m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.10/7.29  90579[17:Spt:90577.0] ||  -> node16(c_e_h_3,c_e,s2)*.
% 7.10/7.29  90581[17:Res:90579.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.10/7.29  90582[17:MRR:90581.0,90581.1,90571.0,90569.0] ||  -> .
% 7.10/7.29  90583[17:Spt:90582.0,90577.0,90579.0] || node16(c_e_h_3,c_e,s2)*+ -> .
% 7.10/7.29  90584[17:Spt:90582.0,90577.1] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.10/7.29  90630[13:Res:89864.1,130.1] || m_c_h_element_v_out(c_e_h_2,c_e,s3) -> node16(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)* m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.29  90632[13:MRR:90630.0,89859.0] ||  -> node16(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)* m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.29  90633[18:Spt:90632.2] ||  -> m_c_h_element_v_in1(c_e_h_2,c_e,s2)*.
% 7.10/7.29  90635[18:Res:90633.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s2)*.
% 7.10/7.29  90638[18:Res:90635.0,410.0] ||  -> node21(c_e_h_2,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_2,c_c,s1).
% 7.10/7.29  90650[18:Res:90638.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s2) -> m_and_h_gate_v_out(c_e_h_2,c_c,s1) node20(c_e_h_2,c_c,s1)*.
% 7.10/7.29  90652[18:MRR:90650.0,90635.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1) node20(c_e_h_2,c_c,s1)*.
% 7.10/7.29  90653[18:Res:90652.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)* m_and_h_gate_v_in1(c_e_h_2,c_c,s1).
% 7.10/7.29  90655[19:Spt:90653.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_c,s1)*.
% 7.10/7.29  90657[19:Res:90655.0,412.0] ||  -> node21(c_e_h_2,c_c,s0,s1)*.
% 7.10/7.29  90662[19:Res:90657.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_c,s1) -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.29  90664[19:MRR:90662.0,90655.0] ||  -> node20(c_e_h_2,c_c,s0)*.
% 7.10/7.29  90665[19:Res:90664.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s0)*.
% 7.10/7.29  90667[19:Res:90665.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s0)*.
% 7.10/7.29  90668[19:MRR:90667.0,121.0] ||  -> .
% 7.10/7.29  90669[19:Spt:90668.0,90653.0,90655.0] || m_and_h_gate_v_out(c_e_h_2,c_c,s1)*+ -> .
% 7.10/7.29  90670[19:Spt:90668.0,90653.1] ||  -> m_and_h_gate_v_in1(c_e_h_2,c_c,s1)*.
% 7.10/7.29  90674[19:Res:90670.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_2,c_a,s1)*.
% 7.10/7.29  90682[19:Res:90674.0,375.0] ||  -> node12(c_e_h_2,c_a,s0,s1)*.
% 7.10/7.29  90689[19:Res:90682.0,123.1] || m_mutex_h_half_v_out(c_e_h_2,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_2,c_a,s0).
% 7.10/7.29  90691[19:MRR:90689.0,90674.0] ||  -> m_mutex_h_half_v_inp(c_e_h_2,c_a,s0)*.
% 7.10/7.29  90692[19:Res:90691.0,18.0] ||  -> m_user_v_req(c_e_h_2,c_u,s0)*.
% 7.10/7.29  90693[19:MRR:90692.0,106.0] ||  -> .
% 7.10/7.29  90694[18:Spt:90693.0,90632.2,90633.0] || m_c_h_element_v_in1(c_e_h_2,c_e,s2)*+ -> .
% 7.10/7.29  90695[18:Spt:90693.0,90632.0,90632.1] ||  -> node16(c_e_h_2,c_e,s2) m_c_h_element_v_out(c_e_h_2,c_e,s2)*.
% 7.10/7.29  90696[18:MRR:90398.1,90694.0] || m_c_h_element_v_in2(c_e_h_2,c_e,s2)* -> .
% 7.10/7.29  90702[18:Res:90695.1,87.0] ||  -> node16(c_e_h_2,c_e,s2) m_and_h_gate_v_in1(c_e_h_2,c_r,s2)*.
% 7.10/7.29  90703[18:MRR:90702.1,90392.0] ||  -> node16(c_e_h_2,c_e,s2)*.
% 7.10/7.29  90706[18:Res:90703.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s2)* m_c_h_element_v_in1(c_e_h_2,c_e,s2).
% 7.10/7.29  90707[18:MRR:90706.1,90694.0] ||  -> m_c_h_element_v_in2(c_e_h_2,c_e,s2)*.
% 7.10/7.29  90708[18:MRR:90707.0,90696.0] ||  -> .
% 7.10/7.29  90709[13:Spt:90708.0,89838.1,89854.0] || node20(c_e_h_2,c_r,s3)*+ -> .
% 7.10/7.29  90710[13:Spt:90708.0,89838.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_d,s4)*.
% 7.10/7.29  90714[13:MRR:89853.1,90709.0] node26(s4) ||  -> node24(s4)*.
% 7.10/7.29  90724[13:SoR:90714.0,157.2] until27(s4) ||  -> node24(s4)* xuntil28(s4).
% 7.10/7.29  90726[13:SSi:90724.0,5.0,64331.0] ||  -> node24(s4)* xuntil28(s4).
% 7.10/7.29  90727[14:Spt:90726.0] ||  -> node24(s4)*.
% 7.10/7.29  90728[14:MRR:523.0,90727.0] ||  -> node21(c_e_h_1,c_r,s3,s4)* m_and_h_gate_v_out(c_e_h_1,c_r,s3).
% 7.10/7.29  90748[15:Spt:90728.0] ||  -> node21(c_e_h_1,c_r,s3,s4)*.
% 7.10/7.29  90749[15:Res:90748.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s4)+ -> node20(c_e_h_1,c_r,s3)*.
% 7.10/7.29  90752[15:Res:221.1,90749.0] node24(s4) ||  -> node20(c_e_h_1,c_r,s3)*.
% 7.10/7.29  90754[15:SSi:90752.0,5.0,64331.0,90727.0] ||  -> node20(c_e_h_1,c_r,s3)*.
% 7.10/7.29  90755[15:Res:90754.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s3)*.
% 7.10/7.29  90756[15:Res:90754.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s3)*.
% 7.10/7.29  90761[15:Res:90755.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s3)*.
% 7.10/7.29  90762[15:Res:90756.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s3)*.
% 7.10/7.29  90766[15:Res:90761.0,582.0] ||  -> node16(c_e_h_1,c_e,s2) node14(c_e_h_1,c_e,s2,s3)* m_c_h_element_v_out(c_e_h_1,c_e,s2).
% 7.10/7.29  90768[15:Res:90761.0,509.0] ||  -> node17(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.29  90792[15:Res:90762.0,390.0] ||  -> node10(c_e_h_1,c_m,s2,s3)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2).
% 7.10/7.29  90801[15:Res:90768.1,87.0] ||  -> node17(c_e_h_1,c_e,s2) m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.29  90808[16:Spt:90801.1] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.29  90809[16:Res:90808.0,88.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.29  90810[16:Res:90809.0,586.0] ||  -> node16(c_e_h_1,c_e,s1) node14(c_e_h_1,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_1,c_e,s1).
% 7.10/7.29  90812[16:Res:90809.0,511.0] ||  -> node17(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.29  90824[16:Res:90812.1,595.0] ||  -> node17(c_e_h_1,c_e,s1) node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.29  90826[16:Res:90812.1,515.0] ||  -> node17(c_e_h_1,c_e,s1) node17(c_e_h_1,c_e,s0)*.
% 7.10/7.29  90830[17:Spt:90826.0] ||  -> node17(c_e_h_1,c_e,s1)*.
% 7.10/7.29  90831[17:Res:90830.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.29  90833[15:Res:90792.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s3) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) node9(c_e_h_1,c_m,s2)*.
% 7.10/7.29  90835[15:MRR:90833.0,90762.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) node9(c_e_h_1,c_m,s2)*.
% 7.10/7.29  90836[15:Res:90835.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s2)*.
% 7.10/7.29  90837[15:Res:90835.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s2)*.
% 7.10/7.29  90838[18:Spt:90836.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.10/7.29  90843[18:Res:90838.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.10/7.29  90859[18:Res:90843.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.29  90861[18:MRR:90859.0,90838.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.29  90865[18:Res:90861.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.29  90866[18:Res:90861.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.29  90867[19:Spt:90865.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.29  90872[19:Res:90867.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.29  90912[19:Res:90872.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.29  90914[19:MRR:90912.0,90867.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.29  90915[19:Res:90914.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.29  90916[19:Res:90914.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.29  90917[20:Spt:90915.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.29  90922[20:Res:90917.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.29  90934[20:Res:90922.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.29  90936[20:MRR:90934.0,10.0] ||  -> .
% 7.10/7.29  90937[20:Spt:90936.0,90915.0,90917.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)* -> .
% 7.10/7.29  90938[20:Spt:90936.0,90915.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.29  90940[20:MRR:90916.0,90937.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.29  90945[20:Res:90940.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.29  90946[20:MRR:90945.0,10.0] ||  -> .
% 7.10/7.29  90947[19:Spt:90946.0,90865.0,90867.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*+ -> .
% 7.10/7.29  90948[19:Spt:90946.0,90865.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.29  90950[19:MRR:90866.0,90947.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.29  90963[19:Res:90950.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.29  90964[19:MRR:90963.0,10.0] ||  -> .
% 7.10/7.29  90965[18:Spt:90964.0,90836.0,90838.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*+ -> .
% 7.10/7.29  90966[18:Spt:90964.0,90836.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s2)*.
% 7.10/7.29  90974[19:Spt:89910.2] ||  -> m_c_h_element_v_in1(c_e_h_3,c_e,s2)*.
% 7.10/7.29  90976[19:Res:90974.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s2)*.
% 7.10/7.29  90979[19:Res:90976.0,410.0] ||  -> node21(c_e_h_3,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_3,c_c,s1).
% 7.10/7.29  90997[19:Res:90979.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_c,s2) -> m_and_h_gate_v_out(c_e_h_3,c_c,s1) node20(c_e_h_3,c_c,s1)*.
% 7.10/7.29  90999[19:MRR:90997.0,90976.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1) node20(c_e_h_3,c_c,s1)*.
% 7.10/7.29  91000[19:Res:90999.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1)* m_and_h_gate_v_in1(c_e_h_3,c_c,s1).
% 7.10/7.29  91002[20:Spt:91000.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1)*.
% 7.10/7.29  91004[20:Res:91002.0,412.0] ||  -> node21(c_e_h_3,c_c,s0,s1)*.
% 7.10/7.29  91018[20:Res:91004.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_c,s1) -> node20(c_e_h_3,c_c,s0)*.
% 7.10/7.29  91020[20:MRR:91018.0,91002.0] ||  -> node20(c_e_h_3,c_c,s0)*.
% 7.10/7.29  91021[20:Res:91020.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_c,s0)*.
% 7.10/7.29  91023[20:Res:91021.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_3,c_a,s0)*.
% 7.10/7.29  91024[20:MRR:91023.0,121.0] ||  -> .
% 7.10/7.29  91025[20:Spt:91024.0,91000.0,91002.0] || m_and_h_gate_v_out(c_e_h_3,c_c,s1)*+ -> .
% 7.10/7.29  91026[20:Spt:91024.0,91000.1] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_c,s1)*.
% 7.10/7.29  91030[20:Res:91026.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_3,c_a,s1)*.
% 7.10/7.29  91037[20:Res:91030.0,375.0] ||  -> node12(c_e_h_3,c_a,s0,s1)*.
% 7.10/7.29  91047[20:Res:91037.0,123.1] || m_mutex_h_half_v_out(c_e_h_3,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_3,c_a,s0).
% 7.10/7.29  91049[20:MRR:91047.0,91030.0] ||  -> m_mutex_h_half_v_inp(c_e_h_3,c_a,s0)*.
% 7.10/7.29  91050[20:Res:91049.0,18.0] ||  -> m_user_v_req(c_e_h_3,c_u,s0)*.
% 7.10/7.29  91051[20:MRR:91050.0,106.0] ||  -> .
% 7.10/7.29  91052[19:Spt:91051.0,89910.2,90974.0] || m_c_h_element_v_in1(c_e_h_3,c_e,s2)*+ -> .
% 7.10/7.29  91053[19:Spt:91051.0,89910.0,89910.1] ||  -> node16(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)*.
% 7.10/7.29  91054[19:MRR:89794.1,91052.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s2)*+ -> .
% 7.10/7.29  91060[19:Res:91053.1,87.0] ||  -> node16(c_e_h_3,c_e,s2) m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.10/7.29  91062[20:Spt:91060.0] ||  -> node16(c_e_h_3,c_e,s2)*.
% 7.10/7.29  91064[20:Res:91062.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.10/7.29  91065[20:MRR:91064.0,91064.1,91054.0,91052.0] ||  -> .
% 7.10/7.29  91066[20:Spt:91065.0,91060.0,91062.0] || node16(c_e_h_3,c_e,s2)*+ -> .
% 7.10/7.29  91067[20:Spt:91065.0,91060.1] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.10/7.29  91126[16:Res:90810.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s2) -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.29  91128[16:MRR:91126.0,90809.0] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.29  91129[21:Spt:91128.2] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s1)*.
% 7.10/7.29  91131[21:Res:91129.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)*.
% 7.10/7.29  91134[21:Res:91131.0,412.0] ||  -> node21(c_e_h_1,c_c,s0,s1)*.
% 7.10/7.29  91143[21:Res:91134.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s1) -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.29  91145[21:MRR:91143.0,91131.0] ||  -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.29  91146[21:Res:91145.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s0)*.
% 7.10/7.29  91148[21:Res:91146.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s0)*.
% 7.10/7.29  91149[21:MRR:91148.0,121.0] ||  -> .
% 7.10/7.29  91150[21:Spt:91149.0,91128.2,91129.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.29  91151[21:Spt:91149.0,91128.0,91128.1] ||  -> node16(c_e_h_1,c_e,s1) m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.29  91152[21:MRR:90831.1,91150.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.29  91154[21:Res:91151.1,595.0] ||  -> node16(c_e_h_1,c_e,s1) node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.29  91156[21:Res:91151.1,515.0] ||  -> node16(c_e_h_1,c_e,s1) node17(c_e_h_1,c_e,s0)*.
% 7.10/7.29  91160[22:Spt:91156.0] ||  -> node16(c_e_h_1,c_e,s1)*.
% 7.10/7.29  91162[22:Res:91160.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s1)* m_c_h_element_v_in1(c_e_h_1,c_e,s1).
% 7.10/7.29  91163[22:MRR:91162.0,91162.1,91152.0,91150.0] ||  -> .
% 7.10/7.29  91164[22:Spt:91163.0,91156.0,91160.0] || node16(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.29  91165[22:Spt:91163.0,91156.1] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.10/7.29  91166[22:MRR:91151.0,91164.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.29  91169[22:MRR:91154.0,91164.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.29  91170[22:Res:91165.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.29  91171[22:Res:91165.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.29  91180[22:Res:91169.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.29  91182[22:MRR:91180.0,91166.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.29  91183[23:Spt:91182.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.10/7.29  91184[23:Res:91183.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.10/7.29  91185[23:Res:91183.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.29  91186[23:MRR:91185.0,91170.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.29  91187[23:MRR:91171.0,91186.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.29  91188[23:MRR:91184.0,91184.1,91187.0,91186.0] ||  -> .
% 7.10/7.29  91189[23:Spt:91188.0,91182.0,91183.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.10/7.29  91190[23:Spt:91188.0,91182.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.29  91193[23:Res:91190.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.10/7.29  91194[23:MRR:91193.0,142.0] ||  -> .
% 7.10/7.29  91195[17:Spt:91194.0,90826.0,90830.0] || node17(c_e_h_1,c_e,s1)*+ -> .
% 7.10/7.29  91196[17:Spt:91194.0,90826.1] ||  -> node17(c_e_h_1,c_e,s0)*.
% 7.10/7.29  91197[17:MRR:90812.0,91195.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s1)*.
% 7.10/7.29  91200[17:MRR:90824.0,91195.0] ||  -> node16(c_e_h_1,c_e,s0) node14(c_e_h_1,c_e,s0,s1)*.
% 7.10/7.29  91201[17:Res:91196.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* -> m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.29  91202[17:Res:91196.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.29  91233[17:Res:91200.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s1)* -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.29  91235[17:MRR:91233.0,91197.0] ||  -> node16(c_e_h_1,c_e,s0) m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.29  91238[18:Spt:91235.0] ||  -> node16(c_e_h_1,c_e,s0)*.
% 7.10/7.29  91239[18:Res:91238.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0) -> .
% 7.10/7.29  91240[18:Res:91238.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)* m_c_h_element_v_in1(c_e_h_1,c_e,s0).
% 7.10/7.29  91241[18:MRR:91240.0,91201.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.29  91242[18:MRR:91202.0,91241.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s0)*.
% 7.10/7.29  91243[18:MRR:91239.0,91239.1,91242.0,91241.0] ||  -> .
% 7.10/7.29  91244[18:Spt:91243.0,91235.0,91238.0] || node16(c_e_h_1,c_e,s0)* -> .
% 7.10/7.29  91245[18:Spt:91243.0,91235.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s0)*.
% 7.10/7.29  91248[18:Res:91245.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s0)*.
% 7.10/7.29  91249[18:MRR:91248.0,142.0] ||  -> .
% 7.10/7.29  91250[16:Spt:91249.0,90801.1,90808.0] || m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*+ -> .
% 7.10/7.29  91251[16:Spt:91249.0,90801.0] ||  -> node17(c_e_h_1,c_e,s2)*.
% 7.10/7.29  91256[16:Res:91251.0,135.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s2)*+ -> m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.29  91257[16:Res:91251.0,136.0] || m_c_h_element_v_in1(c_e_h_1,c_e,s2)+ -> m_c_h_element_v_in2(c_e_h_1,c_e,s2)*.
% 7.10/7.29  91258[17:Spt:90837.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.10/7.29  91263[17:Res:91258.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.10/7.29  91275[17:Res:91263.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.29  91277[17:MRR:91275.0,91258.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.29  91278[17:Res:91277.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.29  91279[17:Res:91277.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.29  91280[18:Spt:91278.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.29  91285[18:Res:91280.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.29  91291[15:Res:90766.1,130.1] || m_c_h_element_v_out(c_e_h_1,c_e,s3) -> node16(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.29  91293[15:MRR:91291.0,90761.0] ||  -> node16(c_e_h_1,c_e,s2) m_c_h_element_v_out(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.29  91294[18:Res:91285.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.29  91296[18:MRR:91294.0,91280.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.29  91297[18:Res:91296.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.29  91298[18:Res:91296.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.29  91299[19:Spt:91297.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.29  91304[19:Res:91299.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.29  91307[19:Res:91304.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.29  91309[19:MRR:91307.0,10.0] ||  -> .
% 7.10/7.29  91310[19:Spt:91309.0,91297.0,91299.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)* -> .
% 7.10/7.29  91311[19:Spt:91309.0,91297.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.29  91313[19:MRR:91298.0,91310.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.29  91318[19:Res:91313.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.29  91319[19:MRR:91318.0,10.0] ||  -> .
% 7.10/7.29  91320[18:Spt:91319.0,91278.0,91280.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*+ -> .
% 7.10/7.29  91321[18:Spt:91319.0,91278.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s1)*.
% 7.10/7.29  91323[18:MRR:91279.0,91320.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.29  91336[18:Res:91323.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.29  91337[18:MRR:91336.0,10.0] ||  -> .
% 7.10/7.29  91338[17:Spt:91337.0,90837.0,91258.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*+ -> .
% 7.10/7.29  91339[17:Spt:91337.0,90837.1] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s2)*.
% 7.10/7.29  91350[18:Spt:89910.2] ||  -> m_c_h_element_v_in1(c_e_h_3,c_e,s2)*.
% 7.10/7.29  91352[18:Res:91350.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s2)*.
% 7.10/7.29  91355[18:Res:91352.0,410.0] ||  -> node21(c_e_h_3,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_3,c_c,s1).
% 7.10/7.29  91393[18:Res:91355.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_c,s2) -> m_and_h_gate_v_out(c_e_h_3,c_c,s1) node20(c_e_h_3,c_c,s1)*.
% 7.10/7.29  91395[18:MRR:91393.0,91352.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1) node20(c_e_h_3,c_c,s1)*.
% 7.10/7.29  91396[18:Res:91395.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1)* m_and_h_gate_v_in1(c_e_h_3,c_c,s1).
% 7.10/7.29  91401[19:Spt:91396.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1)*.
% 7.10/7.29  91403[19:Res:91401.0,412.0] ||  -> node21(c_e_h_3,c_c,s0,s1)*.
% 7.10/7.29  91408[19:Res:91403.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_c,s1) -> node20(c_e_h_3,c_c,s0)*.
% 7.10/7.29  91410[19:MRR:91408.0,91401.0] ||  -> node20(c_e_h_3,c_c,s0)*.
% 7.10/7.29  91420[19:Res:91410.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_c,s0)*.
% 7.10/7.29  91422[19:Res:91420.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_3,c_a,s0)*.
% 7.10/7.29  91423[19:MRR:91422.0,121.0] ||  -> .
% 7.10/7.29  91424[19:Spt:91423.0,91396.0,91401.0] || m_and_h_gate_v_out(c_e_h_3,c_c,s1)*+ -> .
% 7.10/7.29  91425[19:Spt:91423.0,91396.1] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_c,s1)*.
% 7.10/7.29  91429[19:Res:91425.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_3,c_a,s1)*.
% 7.10/7.29  91436[19:Res:91429.0,375.0] ||  -> node12(c_e_h_3,c_a,s0,s1)*.
% 7.10/7.29  91446[19:Res:91436.0,123.1] || m_mutex_h_half_v_out(c_e_h_3,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_3,c_a,s0).
% 7.10/7.29  91448[19:MRR:91446.0,91429.0] ||  -> m_mutex_h_half_v_inp(c_e_h_3,c_a,s0)*.
% 7.10/7.29  91449[19:Res:91448.0,18.0] ||  -> m_user_v_req(c_e_h_3,c_u,s0)*.
% 7.10/7.29  91450[19:MRR:91449.0,106.0] ||  -> .
% 7.10/7.29  91451[18:Spt:91450.0,89910.2,91350.0] || m_c_h_element_v_in1(c_e_h_3,c_e,s2)*+ -> .
% 7.10/7.29  91452[18:Spt:91450.0,89910.0,89910.1] ||  -> node16(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)*.
% 7.10/7.29  91453[18:MRR:89794.1,91451.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s2)*+ -> .
% 7.10/7.29  91459[18:Res:91452.1,87.0] ||  -> node16(c_e_h_3,c_e,s2) m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.10/7.29  91464[19:Spt:91459.0] ||  -> node16(c_e_h_3,c_e,s2)*.
% 7.10/7.29  91466[19:Res:91464.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.10/7.29  91467[19:MRR:91466.0,91466.1,91453.0,91451.0] ||  -> .
% 7.10/7.29  91468[19:Spt:91467.0,91459.0,91464.0] || node16(c_e_h_3,c_e,s2)*+ -> .
% 7.10/7.29  91469[19:Spt:91467.0,91459.1] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.10/7.29  91482[20:Spt:91293.0] ||  -> node16(c_e_h_1,c_e,s2)*.
% 7.10/7.29  91483[20:Res:91482.0,134.0] || m_c_h_element_v_in2(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2) -> .
% 7.10/7.29  91484[20:Res:91482.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.29  91485[20:MRR:91484.0,91256.0] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s2)*.
% 7.10/7.29  91486[20:MRR:91257.0,91485.0] ||  -> m_c_h_element_v_in2(c_e_h_1,c_e,s2)*.
% 7.10/7.29  91487[20:MRR:91483.0,91483.1,91486.0,91485.0] ||  -> .
% 7.10/7.29  91488[20:Spt:91487.0,91293.0,91482.0] || node16(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.29  91489[20:Spt:91487.0,91293.1,91293.2] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s2)* m_c_h_element_v_in1(c_e_h_1,c_e,s2).
% 7.10/7.29  91491[21:Spt:91489.0] ||  -> m_c_h_element_v_out(c_e_h_1,c_e,s2)*.
% 7.10/7.29  91497[21:Res:91491.0,87.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_r,s2)*.
% 7.10/7.29  91498[21:MRR:91497.0,91250.0] ||  -> .
% 7.10/7.29  91499[21:Spt:91498.0,91489.0,91491.0] || m_c_h_element_v_out(c_e_h_1,c_e,s2)*+ -> .
% 7.10/7.29  91500[21:Spt:91498.0,91489.1] ||  -> m_c_h_element_v_in1(c_e_h_1,c_e,s2)*.
% 7.10/7.29  91503[21:Res:91500.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s2)*.
% 7.10/7.29  91506[21:Res:91503.0,410.0] ||  -> node21(c_e_h_1,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_1,c_c,s1).
% 7.10/7.29  91542[21:Res:91506.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s2) -> m_and_h_gate_v_out(c_e_h_1,c_c,s1) node20(c_e_h_1,c_c,s1)*.
% 7.10/7.29  91544[21:MRR:91542.0,91503.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1) node20(c_e_h_1,c_c,s1)*.
% 7.10/7.29  91545[21:Res:91544.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)* m_and_h_gate_v_in1(c_e_h_1,c_c,s1).
% 7.10/7.29  91547[22:Spt:91545.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_c,s1)*.
% 7.10/7.29  91549[22:Res:91547.0,412.0] ||  -> node21(c_e_h_1,c_c,s0,s1)*.
% 7.10/7.29  91563[22:Res:91549.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_c,s1) -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.29  91565[22:MRR:91563.0,91547.0] ||  -> node20(c_e_h_1,c_c,s0)*.
% 7.10/7.29  91566[22:Res:91565.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s0)*.
% 7.10/7.29  91568[22:Res:91566.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s0)*.
% 7.10/7.29  91569[22:MRR:91568.0,121.0] ||  -> .
% 7.10/7.29  91570[22:Spt:91569.0,91545.0,91547.0] || m_and_h_gate_v_out(c_e_h_1,c_c,s1)*+ -> .
% 7.10/7.29  91571[22:Spt:91569.0,91545.1] ||  -> m_and_h_gate_v_in1(c_e_h_1,c_c,s1)*.
% 7.10/7.29  91575[22:Res:91571.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_1,c_a,s1)*.
% 7.10/7.29  91580[22:Res:91575.0,375.0] ||  -> node12(c_e_h_1,c_a,s0,s1)*.
% 7.10/7.29  91589[22:Res:91580.0,123.1] || m_mutex_h_half_v_out(c_e_h_1,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_1,c_a,s0).
% 7.10/7.29  91591[22:MRR:91589.0,91575.0] ||  -> m_mutex_h_half_v_inp(c_e_h_1,c_a,s0)*.
% 7.10/7.29  91595[22:Res:91591.0,18.0] ||  -> m_user_v_req(c_e_h_1,c_u,s0)*.
% 7.10/7.29  91596[22:MRR:91595.0,106.0] ||  -> .
% 7.10/7.29  91597[15:Spt:91596.0,90728.0,90748.0] || node21(c_e_h_1,c_r,s3,s4)*+ -> .
% 7.10/7.29  91598[15:Spt:91596.0,90728.1] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s3)*.
% 7.10/7.29  91601[15:Res:91598.0,409.0] ||  -> node21(c_e_h_1,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_1,c_r,s2).
% 7.10/7.29  91636[15:Res:91601.0,146.1] || m_and_h_gate_v_out(c_e_h_1,c_r,s3) -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.10/7.29  91638[15:MRR:91636.0,91598.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2) node20(c_e_h_1,c_r,s2)*.
% 7.10/7.29  91639[16:Spt:91638.0] ||  -> m_and_h_gate_v_out(c_e_h_1,c_r,s2)*.
% 7.10/7.29  91642[16:Res:91639.0,96.0] ||  -> m_user_v_ack(c_e_h_1,c_u,s2)*.
% 7.10/7.29  91643[16:Res:91642.0,34.0] || m_and_h_gate_v_in2(c_e_h_1,c_d,s2)*+ -> .
% 7.10/7.29  91645[16:Res:2305.0,91643.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1) m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.29  91649[17:Spt:91645.1] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.29  91650[17:Res:91649.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.29  91658[17:Res:91650.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.29  91660[17:Res:91658.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.29  91662[17:MRR:91660.0,10.0] ||  -> .
% 7.10/7.29  91663[17:Spt:91662.0,91645.1,91649.0] || m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*+ -> .
% 7.10/7.29  91664[17:Spt:91662.0,91645.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s1)*.
% 7.10/7.29  91667[17:Res:91664.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.29  91674[17:Res:91667.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.29  91727[17:Res:91674.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.29  91729[17:MRR:91727.0,91667.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.29  91730[17:Res:91729.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.29  91731[17:Res:91729.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.29  91735[18:Spt:91730.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.29  91738[18:Res:91735.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s0)*.
% 7.10/7.29  91741[18:MRR:91738.0,91663.0] ||  -> .
% 7.10/7.29  91742[18:Spt:91741.0,91730.0,91735.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)* -> .
% 7.10/7.29  91743[18:Spt:91741.0,91730.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.29  91745[18:MRR:91731.0,91742.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.29  91750[18:Res:91745.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.29  91751[18:MRR:91750.0,10.0] ||  -> .
% 7.10/7.29  91752[16:Spt:91751.0,91638.0,91639.0] || m_and_h_gate_v_out(c_e_h_1,c_r,s2)*+ -> .
% 7.10/7.29  91753[16:Spt:91751.0,91638.1] ||  -> node20(c_e_h_1,c_r,s2)*.
% 7.10/7.29  91757[16:Res:91753.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_1,c_r,s2)*.
% 7.10/7.29  91768[16:Res:91757.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2)*.
% 7.10/7.29  91788[16:Res:91768.0,391.0] ||  -> node10(c_e_h_1,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1).
% 7.10/7.29  91820[16:Res:91788.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.29  91822[16:MRR:91820.0,91768.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) node9(c_e_h_1,c_m,s1)*.
% 7.10/7.29  91824[16:Res:91822.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.29  91825[17:Spt:89910.2] ||  -> m_c_h_element_v_in1(c_e_h_3,c_e,s2)*.
% 7.10/7.29  91827[17:Res:91825.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s2)*.
% 7.10/7.29  91830[17:Res:91827.0,410.0] ||  -> node21(c_e_h_3,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_3,c_c,s1).
% 7.10/7.29  91869[17:Res:91830.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_c,s2) -> m_and_h_gate_v_out(c_e_h_3,c_c,s1) node20(c_e_h_3,c_c,s1)*.
% 7.10/7.29  91871[17:MRR:91869.0,91827.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1) node20(c_e_h_3,c_c,s1)*.
% 7.10/7.29  91875[17:Res:91871.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1)* m_and_h_gate_v_in1(c_e_h_3,c_c,s1).
% 7.10/7.29  91877[18:Spt:91875.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1)*.
% 7.10/7.29  91879[18:Res:91877.0,412.0] ||  -> node21(c_e_h_3,c_c,s0,s1)*.
% 7.10/7.29  91884[18:Res:91879.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_c,s1) -> node20(c_e_h_3,c_c,s0)*.
% 7.10/7.29  91886[18:MRR:91884.0,91877.0] ||  -> node20(c_e_h_3,c_c,s0)*.
% 7.10/7.29  91887[18:Res:91886.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_c,s0)*.
% 7.10/7.29  91889[18:Res:91887.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_3,c_a,s0)*.
% 7.10/7.29  91890[18:MRR:91889.0,121.0] ||  -> .
% 7.10/7.29  91891[18:Spt:91890.0,91875.0,91877.0] || m_and_h_gate_v_out(c_e_h_3,c_c,s1)*+ -> .
% 7.10/7.29  91892[18:Spt:91890.0,91875.1] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_c,s1)*.
% 7.10/7.29  91896[18:Res:91892.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_3,c_a,s1)*.
% 7.10/7.29  91904[18:Res:91896.0,375.0] ||  -> node12(c_e_h_3,c_a,s0,s1)*.
% 7.10/7.29  91911[18:Res:91904.0,123.1] || m_mutex_h_half_v_out(c_e_h_3,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_3,c_a,s0).
% 7.10/7.29  91913[18:MRR:91911.0,91896.0] ||  -> m_mutex_h_half_v_inp(c_e_h_3,c_a,s0)*.
% 7.10/7.29  91914[18:Res:91913.0,18.0] ||  -> m_user_v_req(c_e_h_3,c_u,s0)*.
% 7.10/7.29  91915[18:MRR:91914.0,106.0] ||  -> .
% 7.10/7.29  91916[17:Spt:91915.0,89910.2,91825.0] || m_c_h_element_v_in1(c_e_h_3,c_e,s2)*+ -> .
% 7.10/7.29  91917[17:Spt:91915.0,89910.0,89910.1] ||  -> node16(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)*.
% 7.10/7.29  91918[17:MRR:89794.1,91916.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s2)*+ -> .
% 7.10/7.29  91924[17:Res:91917.1,87.0] ||  -> node16(c_e_h_3,c_e,s2) m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.10/7.29  91929[18:Spt:91822.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)*.
% 7.10/7.29  91934[18:Res:91929.0,392.0] ||  -> node10(c_e_h_1,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0).
% 7.10/7.29  91950[19:Spt:91924.0] ||  -> node16(c_e_h_3,c_e,s2)*.
% 7.10/7.29  91952[19:Res:91950.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.10/7.29  91953[19:MRR:91952.0,91952.1,91918.0,91916.0] ||  -> .
% 7.10/7.29  91954[19:Spt:91953.0,91924.0,91950.0] || node16(c_e_h_3,c_e,s2)*+ -> .
% 7.10/7.29  91955[19:Spt:91953.0,91924.1] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.10/7.29  91978[18:Res:91934.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.29  91980[18:MRR:91978.0,91929.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) node9(c_e_h_1,c_m,s0)*.
% 7.10/7.29  91984[18:Res:91980.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.29  91985[18:Res:91980.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.29  91986[20:Spt:91984.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)*.
% 7.10/7.29  91991[20:Res:91986.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_1,c_m,s0)*.
% 7.10/7.29  91994[20:Res:91991.0,72.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.29  91996[20:MRR:91994.0,10.0] ||  -> .
% 7.10/7.29  91997[20:Spt:91996.0,91984.0,91986.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s0)* -> .
% 7.10/7.29  91998[20:Spt:91996.0,91984.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_1,c_m,s0)*.
% 7.10/7.29  92000[20:MRR:91985.0,91997.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s0)*.
% 7.10/7.29  92005[20:Res:92000.0,275.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.29  92006[20:MRR:92005.0,10.0] ||  -> .
% 7.10/7.29  92007[18:Spt:92006.0,91822.0,91929.0] || m_and_h_gate_h_init_v_out(c_e_h_1,c_m,s1)* -> .
% 7.10/7.29  92008[18:Spt:92006.0,91822.1] ||  -> node9(c_e_h_1,c_m,s1)*.
% 7.10/7.29  92009[18:MRR:91824.0,92007.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_1,c_m,s1)*.
% 7.10/7.29  92018[18:Res:92009.0,1915.0] ||  -> m_cell_v_token(c_e_h_1,s0)*.
% 7.10/7.29  92019[18:MRR:92018.0,10.0] ||  -> .
% 7.10/7.29  92020[14:Spt:92019.0,90726.0,90727.0] || node24(s4)*+ -> .
% 7.10/7.29  92021[14:Spt:92019.0,90726.1] ||  -> xuntil28(s4)*.
% 7.10/7.29  92022[14:MRR:168.0,92021.0] ||  -> loop*.
% 7.10/7.29  92023[14:MRR:178.0,92021.0] || trans(s4,u)*+ -> until2p29(u).
% 7.10/7.29  92024[14:MRR:7.0,92022.0] ||  -> trans(s4,s4) trans(s4,s3) trans(s4,s2) trans(s4,s1) trans(s4,s0)*.
% 7.10/7.29  92025[14:MRR:90714.1,92020.0] node26(s4) ||  -> .
% 7.10/7.29  92026[14:MRR:181.1,92025.0] until2p29(s4) ||  -> .
% 7.10/7.29  92027[14:MRR:170.1,92026.0] xuntil2p30(s3) ||  -> .
% 7.10/7.29  92028[14:MRR:64341.1,92027.0] until2p29(s3) ||  -> .
% 7.10/7.29  92029[14:MRR:171.1,92028.0] xuntil2p30(s2) ||  -> .
% 7.10/7.29  92030[14:MRR:924.1,92029.0] until2p29(s2) ||  -> .
% 7.10/7.29  92031[14:MRR:172.1,92030.0] xuntil2p30(s1) ||  -> .
% 7.10/7.29  92032[14:MRR:498.1,92031.0] until2p29(s1) ||  -> .
% 7.10/7.29  92033[14:MRR:173.1,92032.0] xuntil2p30(s0) ||  -> .
% 7.10/7.29  92034[14:MRR:237.1,92033.0] until2p29(s0) ||  -> .
% 7.10/7.29  92042[14:Res:92024.4,160.2] xuntil28(s4) last(s4) ||  -> trans(s4,s4) trans(s4,s3) trans(s4,s2) trans(s4,s1)* until2p29(s0).
% 7.10/7.29  92044[14:SSi:92042.1,92042.0,5.0,64331.0,92021.0,5.0,64331.0,92021.0] ||  -> trans(s4,s4) trans(s4,s3) trans(s4,s2) trans(s4,s1)* until2p29(s0).
% 7.10/7.29  92045[14:MRR:92044.4,92034.0] ||  -> trans(s4,s4) trans(s4,s3) trans(s4,s2) trans(s4,s1)*.
% 7.10/7.29  92053[14:Res:92045.3,92023.0] ||  -> trans(s4,s4) trans(s4,s3) trans(s4,s2)* until2p29(s1).
% 7.10/7.29  92054[14:MRR:92053.3,92032.0] ||  -> trans(s4,s4) trans(s4,s3) trans(s4,s2)*.
% 7.10/7.29  92062[14:Res:92054.2,92023.0] ||  -> trans(s4,s4) trans(s4,s3)* until2p29(s2).
% 7.10/7.29  92063[14:MRR:92062.2,92030.0] ||  -> trans(s4,s4) trans(s4,s3)*.
% 7.10/7.29  92071[14:Res:92063.1,92023.0] ||  -> trans(s4,s4)* until2p29(s3).
% 7.10/7.29  92072[14:MRR:92071.1,92028.0] ||  -> trans(s4,s4)*.
% 7.10/7.29  92078[14:Res:92072.0,160.2] xuntil28(s4) last(s4) ||  -> until2p29(s4)*.
% 7.10/7.29  92082[14:SSi:92078.1,92078.0,5.0,64331.0,92021.0,5.0,64331.0,92021.0] ||  -> until2p29(s4)*.
% 7.10/7.29  92083[14:MRR:92082.0,92026.0] ||  -> .
% 7.10/7.29  92084[12:Spt:92083.0,64332.0,89835.0] || node21(c_e_h_2,c_r,s3,s4)*+ -> .
% 7.10/7.29  92085[12:Spt:92083.0,64332.1,64332.2,64332.3] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s3)* node24(s4) xuntil28(s4).
% 7.10/7.29  92091[13:Spt:92085.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s3)*.
% 7.10/7.29  92093[13:Res:92091.0,409.0] ||  -> node21(c_e_h_2,c_r,s2,s3)* m_and_h_gate_v_out(c_e_h_2,c_r,s2).
% 7.10/7.29  92131[13:Res:92093.0,146.1] || m_and_h_gate_v_out(c_e_h_2,c_r,s3) -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.10/7.29  92133[13:MRR:92131.0,92091.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2) node20(c_e_h_2,c_r,s2)*.
% 7.10/7.29  92134[14:Spt:92133.0] ||  -> m_and_h_gate_v_out(c_e_h_2,c_r,s2)*.
% 7.10/7.29  92137[14:Res:92134.0,96.0] ||  -> m_user_v_ack(c_e_h_2,c_u,s2)*.
% 7.10/7.29  92138[14:Res:92137.0,34.0] || m_and_h_gate_v_in2(c_e_h_2,c_d,s2)*+ -> .
% 7.10/7.29  92140[14:Res:2305.0,92138.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1) m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.10/7.29  92144[15:Spt:92140.1] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.10/7.29  92145[15:Res:92144.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.29  92150[15:Res:92145.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.29  92152[15:Res:92150.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.29  92154[15:MRR:92152.0,13.0] ||  -> .
% 7.10/7.29  92155[15:Spt:92154.0,92140.1,92144.0] || m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*+ -> .
% 7.10/7.29  92156[15:Spt:92154.0,92140.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s1)*.
% 7.10/7.29  92159[15:Res:92156.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.29  92166[15:Res:92159.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.29  92197[15:Res:92166.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.29  92199[15:MRR:92197.0,92159.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.29  92200[15:Res:92199.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.29  92201[15:Res:92199.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.29  92202[16:Spt:92200.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.29  92205[16:Res:92202.0,89.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s0)*.
% 7.10/7.29  92208[16:MRR:92205.0,92155.0] ||  -> .
% 7.10/7.29  92209[16:Spt:92208.0,92200.0,92202.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*+ -> .
% 7.10/7.29  92210[16:Spt:92208.0,92200.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.29  92212[16:MRR:92201.0,92209.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.29  92220[16:Res:92212.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.29  92221[16:MRR:92220.0,13.0] ||  -> .
% 7.10/7.29  92222[14:Spt:92221.0,92133.0,92134.0] || m_and_h_gate_v_out(c_e_h_2,c_r,s2)*+ -> .
% 7.10/7.29  92223[14:Spt:92221.0,92133.1] ||  -> node20(c_e_h_2,c_r,s2)*.
% 7.10/7.29  92227[14:Res:92223.0,144.0] ||  -> m_and_h_gate_v_in2(c_e_h_2,c_r,s2)*.
% 7.10/7.29  92229[14:Res:92227.0,90.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2)*.
% 7.10/7.29  92250[14:Res:92229.0,391.0] ||  -> node10(c_e_h_2,c_m,s1,s2)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1).
% 7.10/7.29  92287[14:Res:92250.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s2) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.29  92289[14:MRR:92287.0,92229.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) node9(c_e_h_2,c_m,s1)*.
% 7.10/7.29  92290[14:Res:92289.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.29  92291[14:Res:92289.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.29  92292[15:Spt:92290.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*.
% 7.10/7.29  92297[15:Res:92292.0,392.0] ||  -> node10(c_e_h_2,c_m,s0,s1)* m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0).
% 7.10/7.29  92305[15:Res:92297.0,117.1] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1) -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.29  92307[15:MRR:92305.0,92292.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) node9(c_e_h_2,c_m,s0)*.
% 7.10/7.29  92308[15:Res:92307.1,114.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.29  92309[15:Res:92307.1,115.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0) m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.29  92310[16:Spt:92308.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)*.
% 7.10/7.29  92315[16:Res:92310.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_2,c_m,s0)*.
% 7.10/7.29  92320[16:Res:92315.0,72.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.29  92322[16:MRR:92320.0,13.0] ||  -> .
% 7.10/7.29  92323[16:Spt:92322.0,92308.0,92310.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s0)* -> .
% 7.10/7.29  92324[16:Spt:92322.0,92308.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s0)*.
% 7.10/7.29  92326[16:MRR:92309.0,92323.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s0)*.
% 7.10/7.29  92331[16:Res:92326.0,275.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.29  92332[16:MRR:92331.0,13.0] ||  -> .
% 7.10/7.29  92333[15:Spt:92332.0,92290.0,92292.0] || m_and_h_gate_h_init_v_out(c_e_h_2,c_m,s1)*+ -> .
% 7.10/7.29  92334[15:Spt:92332.0,92290.1] ||  -> m_and_h_gate_h_init_v_in1(c_e_h_2,c_m,s1)*.
% 7.10/7.29  92336[15:MRR:92291.0,92333.0] ||  -> m_and_h_gate_h_init_v_in2(c_e_h_2,c_m,s1)*.
% 7.10/7.29  92349[15:Res:92336.0,1915.0] ||  -> m_cell_v_token(c_e_h_2,s0)*.
% 7.10/7.29  92350[15:MRR:92349.0,13.0] ||  -> .
% 7.10/7.29  92351[13:Spt:92350.0,92085.0,92091.0] || m_and_h_gate_v_out(c_e_h_2,c_r,s3)*+ -> .
% 7.10/7.29  92352[13:Spt:92350.0,92085.1,92085.2] ||  -> node24(s4)* xuntil28(s4).
% 7.10/7.29  92424[14:Spt:89910.2] ||  -> m_c_h_element_v_in1(c_e_h_3,c_e,s2)*.
% 7.10/7.29  92426[14:Res:92424.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s2)*.
% 7.10/7.29  92429[14:Res:92426.0,410.0] ||  -> node21(c_e_h_3,c_c,s1,s2)* m_and_h_gate_v_out(c_e_h_3,c_c,s1).
% 7.10/7.29  92441[14:Res:92429.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_c,s2) -> m_and_h_gate_v_out(c_e_h_3,c_c,s1) node20(c_e_h_3,c_c,s1)*.
% 7.10/7.29  92443[14:MRR:92441.0,92426.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1) node20(c_e_h_3,c_c,s1)*.
% 7.10/7.29  92444[14:Res:92443.1,143.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1)* m_and_h_gate_v_in1(c_e_h_3,c_c,s1).
% 7.10/7.29  92460[15:Spt:92444.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1)*.
% 7.10/7.29  92462[15:Res:92460.0,412.0] ||  -> node21(c_e_h_3,c_c,s0,s1)*.
% 7.10/7.29  92470[15:Res:92462.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_c,s1) -> node20(c_e_h_3,c_c,s0)*.
% 7.10/7.29  92472[15:MRR:92470.0,92460.0] ||  -> node20(c_e_h_3,c_c,s0)*.
% 7.10/7.29  92473[15:Res:92472.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_c,s0)*.
% 7.10/7.29  92475[15:Res:92473.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_3,c_a,s0)*.
% 7.10/7.29  92476[15:MRR:92475.0,121.0] ||  -> .
% 7.10/7.29  92477[15:Spt:92476.0,92444.0,92460.0] || m_and_h_gate_v_out(c_e_h_3,c_c,s1)*+ -> .
% 7.10/7.29  92478[15:Spt:92476.0,92444.1] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_c,s1)*.
% 7.10/7.29  92482[15:Res:92478.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_3,c_a,s1)*.
% 7.10/7.29  92489[15:Res:92482.0,375.0] ||  -> node12(c_e_h_3,c_a,s0,s1)*.
% 7.10/7.29  92499[15:Res:92489.0,123.1] || m_mutex_h_half_v_out(c_e_h_3,c_a,s1)* -> m_mutex_h_half_v_inp(c_e_h_3,c_a,s0).
% 7.10/7.29  92501[15:MRR:92499.0,92482.0] ||  -> m_mutex_h_half_v_inp(c_e_h_3,c_a,s0)*.
% 7.10/7.29  92502[15:Res:92501.0,18.0] ||  -> m_user_v_req(c_e_h_3,c_u,s0)*.
% 7.10/7.29  92503[15:MRR:92502.0,106.0] ||  -> .
% 7.10/7.29  92504[14:Spt:92503.0,89910.2,92424.0] || m_c_h_element_v_in1(c_e_h_3,c_e,s2)*+ -> .
% 7.10/7.29  92505[14:Spt:92503.0,89910.0,89910.1] ||  -> node16(c_e_h_3,c_e,s2) m_c_h_element_v_out(c_e_h_3,c_e,s2)*.
% 7.10/7.29  92506[14:MRR:89794.1,92504.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s2)*+ -> .
% 7.10/7.29  92507[14:Res:92505.1,586.0] ||  -> node16(c_e_h_3,c_e,s2) node16(c_e_h_3,c_e,s1) node14(c_e_h_3,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_3,c_e,s1).
% 7.10/7.29  92509[14:Res:92505.1,511.0] ||  -> node16(c_e_h_3,c_e,s2) node17(c_e_h_3,c_e,s1) m_c_h_element_v_out(c_e_h_3,c_e,s1)*.
% 7.10/7.29  92512[14:Res:92505.1,87.0] ||  -> node16(c_e_h_3,c_e,s2) m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.10/7.29  92514[15:Spt:92512.0] ||  -> node16(c_e_h_3,c_e,s2)*.
% 7.10/7.29  92516[15:Res:92514.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_e,s2)* m_c_h_element_v_in1(c_e_h_3,c_e,s2).
% 7.10/7.29  92517[15:MRR:92516.0,92516.1,92506.0,92504.0] ||  -> .
% 7.10/7.29  92518[15:Spt:92517.0,92512.0,92514.0] || node16(c_e_h_3,c_e,s2)*+ -> .
% 7.10/7.29  92519[15:Spt:92517.0,92512.1] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.10/7.29  92520[15:MRR:92505.0,92518.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_e,s2)*.
% 7.10/7.29  92522[15:MRR:92509.0,92518.0] ||  -> node17(c_e_h_3,c_e,s1) m_c_h_element_v_out(c_e_h_3,c_e,s1)*.
% 7.10/7.29  92523[15:MRR:92507.0,92518.0] ||  -> node16(c_e_h_3,c_e,s1) node14(c_e_h_3,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_3,c_e,s1).
% 7.10/7.29  92540[15:Res:92522.1,87.0] ||  -> node17(c_e_h_3,c_e,s1) m_and_h_gate_v_in1(c_e_h_3,c_r,s1)*.
% 7.10/7.29  92541[15:MRR:92540.1,916.0] ||  -> node17(c_e_h_3,c_e,s1)*.
% 7.10/7.29  92543[15:Res:92541.0,135.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_3,c_e,s1).
% 7.10/7.29  92894[15:Res:92523.1,130.1] || m_c_h_element_v_out(c_e_h_3,c_e,s2) -> node16(c_e_h_3,c_e,s1) m_c_h_element_v_out(c_e_h_3,c_e,s1)* m_c_h_element_v_in1(c_e_h_3,c_e,s1).
% 7.10/7.29  92896[15:MRR:92894.0,92520.0] ||  -> node16(c_e_h_3,c_e,s1) m_c_h_element_v_out(c_e_h_3,c_e,s1)* m_c_h_element_v_in1(c_e_h_3,c_e,s1).
% 7.10/7.29  92897[16:Spt:92896.2] ||  -> m_c_h_element_v_in1(c_e_h_3,c_e,s1)*.
% 7.10/7.29  92899[16:Res:92897.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1)*.
% 7.10/7.29  92902[16:Res:92899.0,412.0] ||  -> node21(c_e_h_3,c_c,s0,s1)*.
% 7.10/7.29  92921[16:Res:92902.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_c,s1) -> node20(c_e_h_3,c_c,s0)*.
% 7.10/7.29  92923[16:MRR:92921.0,92899.0] ||  -> node20(c_e_h_3,c_c,s0)*.
% 7.10/7.29  92924[16:Res:92923.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_c,s0)*.
% 7.10/7.29  92926[16:Res:92924.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_3,c_a,s0)*.
% 7.10/7.29  92927[16:MRR:92926.0,121.0] ||  -> .
% 7.10/7.29  92928[16:Spt:92927.0,92896.2,92897.0] || m_c_h_element_v_in1(c_e_h_3,c_e,s1)*+ -> .
% 7.10/7.29  92929[16:Spt:92927.0,92896.0,92896.1] ||  -> node16(c_e_h_3,c_e,s1) m_c_h_element_v_out(c_e_h_3,c_e,s1)*.
% 7.10/7.29  92930[16:MRR:92543.1,92928.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s1)* -> .
% 7.10/7.29  92936[16:Res:92929.1,87.0] ||  -> node16(c_e_h_3,c_e,s1) m_and_h_gate_v_in1(c_e_h_3,c_r,s1)*.
% 7.10/7.29  92937[16:MRR:92936.1,916.0] ||  -> node16(c_e_h_3,c_e,s1)*.
% 7.10/7.29  92940[16:Res:92937.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_e,s1)* m_c_h_element_v_in1(c_e_h_3,c_e,s1).
% 7.10/7.29  92941[16:MRR:92940.1,92928.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_e,s1)*.
% 7.10/7.29  92942[16:MRR:92941.0,92930.0] ||  -> .
% 7.10/7.29  92943[11:Spt:92942.0,89786.0,89793.0] || node17(c_e_h_3,c_e,s2)*+ -> .
% 7.10/7.29  92944[11:Spt:92942.0,89786.1] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_r,s2)*.
% 7.10/7.29  92945[11:MRR:89774.0,92943.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_e,s2)*.
% 7.10/7.29  92947[11:MRR:89783.0,92943.0] ||  -> node17(c_e_h_3,c_e,s1) m_c_h_element_v_out(c_e_h_3,c_e,s1)*.
% 7.10/7.29  92948[11:MRR:89781.0,92943.0] ||  -> node16(c_e_h_3,c_e,s1) node14(c_e_h_3,c_e,s1,s2)* m_c_h_element_v_out(c_e_h_3,c_e,s1).
% 7.10/7.29  92965[11:Res:92947.1,87.0] ||  -> node17(c_e_h_3,c_e,s1) m_and_h_gate_v_in1(c_e_h_3,c_r,s1)*.
% 7.10/7.29  92966[11:MRR:92965.1,916.0] ||  -> node17(c_e_h_3,c_e,s1)*.
% 7.10/7.29  92968[11:Res:92966.0,135.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s1)*+ -> m_c_h_element_v_in1(c_e_h_3,c_e,s1).
% 7.10/7.29  93106[11:Res:92948.1,130.1] || m_c_h_element_v_out(c_e_h_3,c_e,s2) -> node16(c_e_h_3,c_e,s1) m_c_h_element_v_out(c_e_h_3,c_e,s1)* m_c_h_element_v_in1(c_e_h_3,c_e,s1).
% 7.10/7.29  93108[11:MRR:93106.0,92945.0] ||  -> node16(c_e_h_3,c_e,s1) m_c_h_element_v_out(c_e_h_3,c_e,s1)* m_c_h_element_v_in1(c_e_h_3,c_e,s1).
% 7.10/7.29  93202[12:Spt:93108.2] ||  -> m_c_h_element_v_in1(c_e_h_3,c_e,s1)*.
% 7.10/7.29  93204[12:Res:93202.0,36.0] ||  -> m_and_h_gate_v_out(c_e_h_3,c_c,s1)*.
% 7.10/7.29  93207[12:Res:93204.0,412.0] ||  -> node21(c_e_h_3,c_c,s0,s1)*.
% 7.10/7.29  93216[12:Res:93207.0,146.1] || m_and_h_gate_v_out(c_e_h_3,c_c,s1) -> node20(c_e_h_3,c_c,s0)*.
% 7.10/7.29  93218[12:MRR:93216.0,93204.0] ||  -> node20(c_e_h_3,c_c,s0)*.
% 7.10/7.29  93219[12:Res:93218.0,143.0] ||  -> m_and_h_gate_v_in1(c_e_h_3,c_c,s0)*.
% 7.10/7.29  93221[12:Res:93219.0,27.0] ||  -> m_mutex_h_half_v_out(c_e_h_3,c_a,s0)*.
% 7.10/7.29  93222[12:MRR:93221.0,121.0] ||  -> .
% 7.10/7.29  93223[12:Spt:93222.0,93108.2,93202.0] || m_c_h_element_v_in1(c_e_h_3,c_e,s1)* -> .
% 7.10/7.29  93224[12:Spt:93222.0,93108.0,93108.1] ||  -> node16(c_e_h_3,c_e,s1) m_c_h_element_v_out(c_e_h_3,c_e,s1)*.
% 7.10/7.29  93225[12:MRR:92968.1,93223.0] || m_c_h_element_v_in2(c_e_h_3,c_e,s1)* -> .
% 8.58/8.75  93231[12:Res:93224.1,87.0] ||  -> node16(c_e_h_3,c_e,s1) m_and_h_gate_v_in1(c_e_h_3,c_r,s1)*.
% 8.58/8.75  93232[12:MRR:93231.1,916.0] ||  -> node16(c_e_h_3,c_e,s1)*.
% 8.58/8.75  93235[12:Res:93232.0,133.0] ||  -> m_c_h_element_v_in2(c_e_h_3,c_e,s1)* m_c_h_element_v_in1(c_e_h_3,c_e,s1).
% 8.58/8.75  93236[12:MRR:93235.0,93235.1,93225.0,93223.0] ||  -> .
% 8.58/8.75  93237[6:Spt:93236.0,942.2,948.0] || m_and_h_gate_h_init_v_out(c_e_h_3,c_m,s1)*+ -> .
% 8.58/8.75  93238[6:Spt:93236.0,942.0,942.1] || m_and_h_gate_h_init_v_in1(c_e_h_3,c_m,s0)*+ -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0).
% 8.58/8.75  93241[6:Res:67.1,93238.0] ||  -> m_c_h_element_v_out(c_e_h_3,c_f,s0) m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0)*.
% 8.58/8.75  93242[6:MRR:93241.0,128.0] ||  -> m_and_h_gate_h_init_v_out(c_e_h_3,c_n,s0)*.
% 8.58/8.75  93247[6:Res:93242.0,113.0] ||  -> m_and_h_gate_h_init_v_init_h_out(c_e_h_3,c_n,s0)*.
% 8.58/8.75  93254[6:Res:93247.0,78.1] || m_cell_v_token(c_e_h_3,s0)* -> .
% 8.58/8.75  93256[6:MRR:93254.0,16.0] ||  -> .
% 8.58/8.75  93257[1:Spt:93256.0,231.1,232.0] || xuntil28(s0)* -> .
% 8.58/8.75  93258[1:Spt:93256.0,231.0] ||  -> node23(s0)*.
% 8.58/8.75  93262[0:SSi:239.0,164.0] ||  -> xuntil28(s0)*.
% 8.58/8.75  93263[1:MRR:93262.0,93257.0] ||  -> .
% 8.58/8.75  % SZS output end Refutation
% 8.58/8.75  Formulae used in the proof : bound1 bound2 bound3 bound4 bound5 bound6 bound7 m_main_3 m_main_6 m_main_9 m_cell_2 m_cell_11 m_cell_17 m_cell_18 m_cell_20 m_cell_24 m_cell_51 m_cell_53 m_cell_54 m_cell_55 m_cell_56 m_cell_57 m_cell_58 m_cell_59 m_cell_60 m_cell_61 m_cell_62 m_cell_65 m_cell_71 m_cell_72 m_cell_73 m_cell_74 m_cell_80 m_cell_81 m_user_1 m_and_h_gate_h_init_1 m_and_h_gate_h_init_2 m_and_h_gate_h_init_3 m_and_h_gate_h_init_4 m_and_h_gate_h_init_5 m_and_h_gate_h_init_6 m_and_h_gate_h_init_7 m_and_h_gate_h_init_8 m_and_h_gate_h_init_9 m_mutex_h_half_1 m_mutex_h_half_3 m_mutex_h_half_5 m_mutex_h_half_6 m_c_h_element_1 m_c_h_element_2 m_c_h_element_3 m_c_h_element_4 m_c_h_element_5 m_c_h_element_6 m_c_h_element_7 m_c_h_element_8 m_c_h_element_9 m_c_h_element_10 m_c_h_element_11 m_c_h_element_12 m_c_h_element_13 m_c_h_element_14 m_and_h_gate_1 m_and_h_gate_2 m_and_h_gate_3 m_and_h_gate_4 m_and_h_gate_5 m_and_h_gate_6 m_and_h_gate_7 m_and_h_gate_8 prpty1 prpty2 prpty3 prpty4 prpty5 prpty6 prpty7 prpty8 prpty9 prpty10 prpty11 prpty12 prpty13 prpty14 prpty15
% 8.58/8.75  
%------------------------------------------------------------------------------