TSTP Solution File: RNG118+1 by ePrincess---1.0
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- Process Solution
%------------------------------------------------------------------------------
% File : ePrincess---1.0
% Problem : RNG118+1 : TPTP v8.1.0. Released v4.0.0.
% Transfm : none
% Format : tptp:raw
% Command : ePrincess-casc -timeout=%d %s
% Computer : n024.cluster.edu
% Model : x86_64 x86_64
% CPU : Intel(R) Xeon(R) CPU E5-2620 v4 2.10GHz
% Memory : 8042.1875MB
% OS : Linux 3.10.0-693.el7.x86_64
% CPULimit : 300s
% WCLimit : 600s
% DateTime : Mon Jul 18 20:25:25 EDT 2022
% Result : Theorem 24.78s 7.24s
% Output : Proof 40.82s
% Verified :
% SZS Type : -
% Comments :
%------------------------------------------------------------------------------
%----WARNING: Could not form TPTP format derivation
%------------------------------------------------------------------------------
%----ORIGINAL SYSTEM OUTPUT
% 0.06/0.12 % Problem : RNG118+1 : TPTP v8.1.0. Released v4.0.0.
% 0.06/0.12 % Command : ePrincess-casc -timeout=%d %s
% 0.12/0.33 % Computer : n024.cluster.edu
% 0.12/0.33 % Model : x86_64 x86_64
% 0.12/0.33 % CPU : Intel(R) Xeon(R) CPU E5-2620 v4 @ 2.10GHz
% 0.12/0.33 % Memory : 8042.1875MB
% 0.12/0.33 % OS : Linux 3.10.0-693.el7.x86_64
% 0.12/0.33 % CPULimit : 300
% 0.12/0.33 % WCLimit : 600
% 0.12/0.33 % DateTime : Mon May 30 16:28:51 EDT 2022
% 0.12/0.33 % CPUTime :
% 0.49/0.61 ____ _
% 0.49/0.61 ___ / __ \_____(_)___ ________ __________
% 0.49/0.61 / _ \/ /_/ / ___/ / __ \/ ___/ _ \/ ___/ ___/
% 0.49/0.61 / __/ ____/ / / / / / / /__/ __(__ |__ )
% 0.49/0.61 \___/_/ /_/ /_/_/ /_/\___/\___/____/____/
% 0.49/0.61
% 0.49/0.61 A Theorem Prover for First-Order Logic
% 0.49/0.61 (ePrincess v.1.0)
% 0.49/0.61
% 0.49/0.61 (c) Philipp Rümmer, 2009-2015
% 0.49/0.61 (c) Peter Backeman, 2014-2015
% 0.49/0.61 (contributions by Angelo Brillout, Peter Baumgartner)
% 0.49/0.61 Free software under GNU Lesser General Public License (LGPL).
% 0.49/0.61 Bug reports to peter@backeman.se
% 0.49/0.61
% 0.49/0.61 For more information, visit http://user.uu.se/~petba168/breu/
% 0.49/0.61
% 0.49/0.61 Loading /export/starexec/sandbox/benchmark/theBenchmark.p ...
% 0.67/0.68 Prover 0: Options: -triggersInConjecture -genTotalityAxioms -tightFunctionScopes -clausifier=simple -reverseFunctionalityPropagation +boolFunsAsPreds -triggerStrategy=allMaximal -resolutionMethod=nonUnifying +ignoreQuantifiers -generateTriggers=all
% 1.84/1.04 Prover 0: Preprocessing ...
% 3.58/1.50 Prover 0: Constructing countermodel ...
% 19.66/5.97 Prover 1: Options: +triggersInConjecture -genTotalityAxioms -tightFunctionScopes -clausifier=simple +reverseFunctionalityPropagation -boolFunsAsPreds -triggerStrategy=maximal -resolutionMethod=normal +ignoreQuantifiers -generateTriggers=all
% 20.12/6.08 Prover 1: Preprocessing ...
% 21.10/6.27 Prover 1: Constructing countermodel ...
% 24.78/7.23 Prover 1: proved (1256ms)
% 24.78/7.23 Prover 0: stopped
% 24.78/7.23
% 24.78/7.24 No countermodel exists, formula is valid
% 24.78/7.24 % SZS status Theorem for theBenchmark
% 24.78/7.24
% 24.78/7.24 Generating proof ... found it (size 289)
% 39.72/11.93
% 39.72/11.93 % SZS output start Proof for theBenchmark
% 39.72/11.93 Assumed formulas after preprocessing and simplification:
% 39.72/11.93 | (0) ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ? [v8] : ? [v9] : ? [v10] : ? [v11] : ( ~ (v11 = sz00) & ~ (v6 = 0) & ~ (xu = sz00) & ~ (sz10 = sz00) & slsdtgt0(xb) = v2 & slsdtgt0(xa) = v1 & aGcdOfAnd0(xc, xa, xb) = 0 & aDivisorOf0(xu, xb) = v5 & aDivisorOf0(xu, xa) = v4 & doDivides0(xu, xb) = v6 & doDivides0(xu, xa) = 0 & sbrdtbr0(xu) = v3 & aIdeal0(xI) = 0 & sdtpldt1(v1, v2) = xI & aElementOf0(v11, xI) = 0 & aElementOf0(xu, xI) = 0 & aElementOf0(xb, v2) = 0 & aElementOf0(xa, v1) = 0 & aElementOf0(sz00, v2) = 0 & aElementOf0(sz00, v1) = 0 & sdtasdt0(xb, v8) = v10 & sdtasdt0(xa, v7) = v9 & sdtpldt0(v9, v10) = xu & smndt0(sz10) = v0 & aElement0(v8) = 0 & aElement0(v7) = 0 & aElement0(xb) = 0 & aElement0(xa) = 0 & aElement0(sz10) = 0 & aElement0(sz00) = 0 & ! [v12] : ! [v13] : ! [v14] : ! [v15] : ! [v16] : ! [v17] : ! [v18] : ! [v19] : (v17 = 0 | ~ (sdtpldt1(v12, v13) = v14) | ~ (aSet0(v14) = v15) | ~ (aElementOf0(v16, v14) = v17) | ~ (sdtpldt0(v18, v19) = v16) | ? [v20] : ? [v21] : ((aSet0(v13) = v21 & aSet0(v12) = v20 & ( ~ (v21 = 0) | ~ (v20 = 0))) | (aElementOf0(v19, v13) = v21 & aElementOf0(v18, v12) = v20 & ( ~ (v21 = 0) | ~ (v20 = 0))))) & ! [v12] : ! [v13] : ! [v14] : ! [v15] : ! [v16] : ! [v17] : (v16 = 0 | ~ (slsdtgt0(v12) = v13) | ~ (aSet0(v13) = v14) | ~ (aElementOf0(v15, v13) = v16) | ~ (sdtasdt0(v12, v17) = v15) | ? [v18] : (( ~ (v18 = 0) & aElement0(v17) = v18) | ( ~ (v18 = 0) & aElement0(v12) = v18))) & ! [v12] : ! [v13] : ! [v14] : ! [v15] : ! [v16] : ! [v17] : ( ~ (sdtasasdt0(v12, v13) = v14) | ~ (aSet0(v14) = v15) | ~ (aElementOf0(v16, v12) = v17) | ? [v18] : ? [v19] : ((aSet0(v13) = v19 & aSet0(v12) = v18 & ( ~ (v19 = 0) | ~ (v18 = 0))) | (aElementOf0(v16, v14) = v18 & aElementOf0(v16, v13) = v19 & ( ~ (v18 = 0) | (v19 = 0 & v17 = 0))))) & ! [v12] : ! [v13] : ! [v14] : ! [v15] : ! [v16] : ! [v17] : ( ~ (aElementOf0(v16, v14) = v17) | ~ (sdtpldt0(v12, v15) = v16) | ~ (smndt0(v13) = v15) | ? [v18] : ? [v19] : ? [v20] : ? [v21] : (sdteqdtlpzmzozddtrp0(v12, v13, v14) = v21 & aIdeal0(v14) = v20 & aElement0(v13) = v19 & aElement0(v12) = v18 & ( ~ (v20 = 0) | ~ (v19 = 0) | ~ (v18 = 0) | (( ~ (v21 = 0) | v17 = 0) & ( ~ (v17 = 0) | v21 = 0))))) & ! [v12] : ! [v13] : ! [v14] : ! [v15] : ! [v16] : ! [v17] : ( ~ (sdtasdt0(v12, v14) = v16) | ~ (sdtasdt0(v12, v13) = v15) | ~ (sdtpldt0(v15, v16) = v17) | ? [v18] : ? [v19] : ? [v20] : ? [v21] : ? [v22] : ? [v23] : ? [v24] : ? [v25] : ? [v26] : (sdtasdt0(v21, v12) = v23 & sdtasdt0(v14, v12) = v25 & sdtasdt0(v13, v12) = v24 & sdtasdt0(v12, v21) = v22 & sdtpldt0(v24, v25) = v26 & sdtpldt0(v13, v14) = v21 & aElement0(v14) = v20 & aElement0(v13) = v19 & aElement0(v12) = v18 & ( ~ (v20 = 0) | ~ (v19 = 0) | ~ (v18 = 0) | (v26 = v23 & v22 = v17)))) & ! [v12] : ! [v13] : ! [v14] : ! [v15] : ! [v16] : (v16 = 0 | ~ (aGcdOfAnd0(v14, v12, v13) = 0) | ~ (doDivides0(v15, v14) = v16) | ~ (aElement0(v13) = 0) | ~ (aElement0(v12) = 0) | ? [v17] : ? [v18] : (aDivisorOf0(v15, v13) = v18 & aDivisorOf0(v15, v12) = v17 & ( ~ (v18 = 0) | ~ (v17 = 0)))) & ! [v12] : ! [v13] : ! [v14] : ! [v15] : ! [v16] : (v16 = 0 | ~ (aIdeal0(v12) = 0) | ~ (aElementOf0(v15, v12) = v16) | ~ (aElementOf0(v13, v12) = 0) | ~ (sdtasdt0(v14, v13) = v15) | ? [v17] : ( ~ (v17 = 0) & aElement0(v14) = v17)) & ! [v12] : ! [v13] : ! [v14] : ! [v15] : ! [v16] : (v16 = 0 | ~ (aIdeal0(v12) = 0) | ~ (aElementOf0(v15, v12) = v16) | ~ (aElementOf0(v13, v12) = 0) | ~ (sdtpldt0(v13, v14) = v15) | ? [v17] : ( ~ (v17 = 0) & aElementOf0(v14, v12) = v17)) & ! [v12] : ! [v13] : ! [v14] : ! [v15] : ! [v16] : (v13 = v12 | ~ (aGcdOfAnd0(v16, v15, v14) = v13) | ~ (aGcdOfAnd0(v16, v15, v14) = v12)) & ! [v12] : ! [v13] : ! [v14] : ! [v15] : ! [v16] : (v13 = v12 | ~ (sdteqdtlpzmzozddtrp0(v16, v15, v14) = v13) | ~ (sdteqdtlpzmzozddtrp0(v16, v15, v14) = v12)) & ! [v12] : ! [v13] : ! [v14] : ! [v15] : ! [v16] : ( ~ (sdtasasdt0(v12, v13) = v14) | ~ (aSet0(v14) = v15) | ~ (aElementOf0(v16, v12) = 0) | ? [v17] : ? [v18] : ((aSet0(v13) = v18 & aSet0(v12) = v17 & ( ~ (v18 = 0) | ~ (v17 = 0))) | (aElementOf0(v16, v14) = v18 & aElementOf0(v16, v13) = v17 & ( ~ (v17 = 0) | v18 = 0)))) & ! [v12] : ! [v13] : ! [v14] : ! [v15] : ! [v16] : ( ~ (sdtpldt1(v12, v13) = v14) | ~ (aSet0(v14) = v15) | ~ (aElementOf0(v16, v14) = 0) | ? [v17] : ? [v18] : ? [v19] : ? [v20] : ? [v21] : ((v21 = v16 & v20 = 0 & v19 = 0 & aElementOf0(v18, v13) = 0 & aElementOf0(v17, v12) = 0 & sdtpldt0(v17, v18) = v16) | (aSet0(v13) = v18 & aSet0(v12) = v17 & ( ~ (v18 = 0) | ~ (v17 = 0))))) & ! [v12] : ! [v13] : ! [v14] : ! [v15] : ! [v16] : ( ~ (sdtpldt1(v12, v13) = v14) | ~ (aElement0(v16) = 0) | ~ (aElement0(v15) = 0) | ? [v17] : ? [v18] : ? [v19] : ? [v20] : ((v20 = 0 & v19 = 0 & v18 = 0 & sdteqdtlpzmzozddtrp0(v17, v16, v13) = 0 & sdteqdtlpzmzozddtrp0(v17, v15, v12) = 0 & aElement0(v17) = 0) | (v18 = 0 & ~ (v19 = 0) & aElementOf0(v17, v14) = v19 & aElement0(v17) = 0) | (aIdeal0(v13) = v18 & aIdeal0(v12) = v17 & ( ~ (v18 = 0) | ~ (v17 = 0))))) & ! [v12] : ! [v13] : ! [v14] : ! [v15] : ! [v16] : ( ~ (sdtasdt0(v15, v14) = v16) | ~ (sdtasdt0(v12, v13) = v15) | ? [v17] : ? [v18] : ? [v19] : ? [v20] : ? [v21] : (sdtasdt0(v13, v14) = v20 & sdtasdt0(v12, v20) = v21 & aElement0(v14) = v19 & aElement0(v13) = v18 & aElement0(v12) = v17 & ( ~ (v19 = 0) | ~ (v18 = 0) | ~ (v17 = 0) | v21 = v16))) & ! [v12] : ! [v13] : ! [v14] : ! [v15] : ! [v16] : ( ~ (sdtpldt0(v15, v14) = v16) | ~ (sdtpldt0(v12, v13) = v15) | ? [v17] : ? [v18] : ? [v19] : ? [v20] : ? [v21] : (sdtpldt0(v13, v14) = v20 & sdtpldt0(v12, v20) = v21 & aElement0(v14) = v19 & aElement0(v13) = v18 & aElement0(v12) = v17 & ( ~ (v19 = 0) | ~ (v18 = 0) | ~ (v17 = 0) | v21 = v16))) & ! [v12] : ! [v13] : ! [v14] : ! [v15] : (v15 = v14 | ~ (sdtasasdt0(v12, v13) = v14) | ~ (aSet0(v15) = 0) | ? [v16] : ? [v17] : ? [v18] : ? [v19] : ((aSet0(v13) = v17 & aSet0(v12) = v16 & ( ~ (v17 = 0) | ~ (v16 = 0))) | (aElementOf0(v16, v15) = v17 & aElementOf0(v16, v13) = v19 & aElementOf0(v16, v12) = v18 & ( ~ (v19 = 0) | ~ (v18 = 0) | ~ (v17 = 0)) & (v17 = 0 | (v19 = 0 & v18 = 0))))) & ! [v12] : ! [v13] : ! [v14] : ! [v15] : (v15 = v14 | ~ (sdtpldt1(v12, v13) = v14) | ~ (aSet0(v15) = 0) | ? [v16] : ? [v17] : ? [v18] : ? [v19] : ? [v20] : ? [v21] : ? [v22] : ((aSet0(v13) = v17 & aSet0(v12) = v16 & ( ~ (v17 = 0) | ~ (v16 = 0))) | (aElementOf0(v16, v15) = v17 & ( ~ (v17 = 0) | ! [v23] : ! [v24] : ( ~ (sdtpldt0(v23, v24) = v16) | ? [v25] : ? [v26] : (aElementOf0(v24, v13) = v26 & aElementOf0(v23, v12) = v25 & ( ~ (v26 = 0) | ~ (v25 = 0))))) & (v17 = 0 | (v22 = v16 & v21 = 0 & v20 = 0 & aElementOf0(v19, v13) = 0 & aElementOf0(v18, v12) = 0 & sdtpldt0(v18, v19) = v16))))) & ! [v12] : ! [v13] : ! [v14] : ! [v15] : (v15 = 0 | ~ (aGcdOfAnd0(v14, v12, v13) = v15) | ~ (aElement0(v13) = 0) | ~ (aElement0(v12) = 0) | ? [v16] : ? [v17] : ? [v18] : ? [v19] : ((v18 = 0 & v17 = 0 & ~ (v19 = 0) & aDivisorOf0(v16, v13) = 0 & aDivisorOf0(v16, v12) = 0 & doDivides0(v16, v14) = v19) | (aDivisorOf0(v14, v13) = v17 & aDivisorOf0(v14, v12) = v16 & ( ~ (v17 = 0) | ~ (v16 = 0))))) & ! [v12] : ! [v13] : ! [v14] : ! [v15] : (v15 = 0 | ~ (sdtasasdt0(v12, v13) = v14) | ~ (aSet0(v14) = v15) | ? [v16] : ? [v17] : (aSet0(v13) = v17 & aSet0(v12) = v16 & ( ~ (v17 = 0) | ~ (v16 = 0)))) & ! [v12] : ! [v13] : ! [v14] : ! [v15] : (v15 = 0 | ~ (sdtpldt1(v12, v13) = v14) | ~ (aSet0(v14) = v15) | ? [v16] : ? [v17] : (aSet0(v13) = v17 & aSet0(v12) = v16 & ( ~ (v17 = 0) | ~ (v16 = 0)))) & ! [v12] : ! [v13] : ! [v14] : ! [v15] : (v14 = 0 | ~ (doDivides0(v12, v13) = v14) | ~ (sdtasdt0(v12, v15) = v13) | ? [v16] : ? [v17] : (( ~ (v16 = 0) & aElement0(v15) = v16) | (aElement0(v13) = v17 & aElement0(v12) = v16 & ( ~ (v17 = 0) | ~ (v16 = 0))))) & ! [v12] : ! [v13] : ! [v14] : ! [v15] : (v13 = v12 | ~ (misRelativelyPrime0(v15, v14) = v13) | ~ (misRelativelyPrime0(v15, v14) = v12)) & ! [v12] : ! [v13] : ! [v14] : ! [v15] : (v13 = v12 | ~ (aDivisorOf0(v15, v14) = v13) | ~ (aDivisorOf0(v15, v14) = v12)) & ! [v12] : ! [v13] : ! [v14] : ! [v15] : (v13 = v12 | ~ (doDivides0(v15, v14) = v13) | ~ (doDivides0(v15, v14) = v12)) & ! [v12] : ! [v13] : ! [v14] : ! [v15] : (v13 = v12 | ~ (iLess0(v15, v14) = v13) | ~ (iLess0(v15, v14) = v12)) & ! [v12] : ! [v13] : ! [v14] : ! [v15] : (v13 = v12 | ~ (sdtasasdt0(v15, v14) = v13) | ~ (sdtasasdt0(v15, v14) = v12)) & ! [v12] : ! [v13] : ! [v14] : ! [v15] : (v13 = v12 | ~ (sdtpldt1(v15, v14) = v13) | ~ (sdtpldt1(v15, v14) = v12)) & ! [v12] : ! [v13] : ! [v14] : ! [v15] : (v13 = v12 | ~ (aElementOf0(v15, v14) = v13) | ~ (aElementOf0(v15, v14) = v12)) & ! [v12] : ! [v13] : ! [v14] : ! [v15] : (v13 = v12 | ~ (sdtasdt0(v15, v14) = v13) | ~ (sdtasdt0(v15, v14) = v12)) & ! [v12] : ! [v13] : ! [v14] : ! [v15] : (v13 = v12 | ~ (sdtpldt0(v15, v14) = v13) | ~ (sdtpldt0(v15, v14) = v12)) & ! [v12] : ! [v13] : ! [v14] : ! [v15] : ( ~ (slsdtgt0(v12) = v13) | ~ (aSet0(v13) = v14) | ~ (aElementOf0(v15, v13) = 0) | ? [v16] : ? [v17] : ? [v18] : ((v18 = v15 & v17 = 0 & sdtasdt0(v12, v16) = v15 & aElement0(v16) = 0) | ( ~ (v16 = 0) & aElement0(v12) = v16))) & ! [v12] : ! [v13] : ! [v14] : (v14 = v13 | ~ (slsdtgt0(v12) = v13) | ~ (aSet0(v14) = 0) | ? [v15] : ? [v16] : ? [v17] : ? [v18] : ? [v19] : (( ~ (v15 = 0) & aElement0(v12) = v15) | (aElementOf0(v15, v14) = v16 & ( ~ (v16 = 0) | ! [v20] : ( ~ (sdtasdt0(v12, v20) = v15) | ? [v21] : ( ~ (v21 = 0) & aElement0(v20) = v21))) & (v16 = 0 | (v19 = v15 & v18 = 0 & sdtasdt0(v12, v17) = v15 & aElement0(v17) = 0))))) & ! [v12] : ! [v13] : ! [v14] : (v14 = 0 | ~ (slsdtgt0(v12) = v13) | ~ (aSet0(v13) = v14) | ? [v15] : ( ~ (v15 = 0) & aElement0(v12) = v15)) & ! [v12] : ! [v13] : ! [v14] : (v13 = v12 | ~ (slsdtgt0(v14) = v13) | ~ (slsdtgt0(v14) = v12)) & ! [v12] : ! [v13] : ! [v14] : (v13 = v12 | ~ (sbrdtbr0(v14) = v13) | ~ (sbrdtbr0(v14) = v12)) & ! [v12] : ! [v13] : ! [v14] : (v13 = v12 | ~ (aNaturalNumber0(v14) = v13) | ~ (aNaturalNumber0(v14) = v12)) & ! [v12] : ! [v13] : ! [v14] : (v13 = v12 | ~ (aIdeal0(v14) = v13) | ~ (aIdeal0(v14) = v12)) & ! [v12] : ! [v13] : ! [v14] : (v13 = v12 | ~ (aSet0(v14) = v13) | ~ (aSet0(v14) = v12)) & ! [v12] : ! [v13] : ! [v14] : (v13 = v12 | ~ (smndt0(v14) = v13) | ~ (smndt0(v14) = v12)) & ! [v12] : ! [v13] : ! [v14] : (v13 = v12 | ~ (aElement0(v14) = v13) | ~ (aElement0(v14) = v12)) & ! [v12] : ! [v13] : ! [v14] : (v13 = sz00 | ~ (sbrdtbr0(v13) = v14) | ~ (aElement0(v12) = 0) | ? [v15] : ? [v16] : ? [v17] : ? [v18] : ? [v19] : ? [v20] : ? [v21] : ? [v22] : ((v20 = v12 & v18 = 0 & v17 = 0 & iLess0(v21, v14) = v22 & sbrdtbr0(v16) = v21 & sdtasdt0(v15, v13) = v19 & sdtpldt0(v19, v16) = v12 & aElement0(v16) = 0 & aElement0(v15) = 0 & (v22 = 0 | v16 = sz00)) | ( ~ (v15 = 0) & aElement0(v13) = v15))) & ! [v12] : ! [v13] : ! [v14] : ( ~ (aGcdOfAnd0(v14, v12, v13) = 0) | ~ (aElement0(v13) = 0) | ~ (aElement0(v12) = 0) | (aDivisorOf0(v14, v13) = 0 & aDivisorOf0(v14, v12) = 0)) & ! [v12] : ! [v13] : ! [v14] : ( ~ (aGcdOfAnd0(sz10, v12, v13) = v14) | ? [v15] : ? [v16] : ? [v17] : (misRelativelyPrime0(v12, v13) = v17 & aElement0(v13) = v16 & aElement0(v12) = v15 & ( ~ (v16 = 0) | ~ (v15 = 0) | (( ~ (v17 = 0) | v14 = 0) & ( ~ (v14 = 0) | v17 = 0))))) & ! [v12] : ! [v13] : ! [v14] : ( ~ (doDivides0(v13, v12) = v14) | ~ (aElement0(v12) = 0) | ? [v15] : ? [v16] : (aDivisorOf0(v13, v12) = v15 & aElement0(v13) = v16 & ( ~ (v15 = 0) | (v16 = 0 & v14 = 0)))) & ! [v12] : ! [v13] : ! [v14] : ( ~ (sdtasasdt0(v12, v13) = v14) | ? [v15] : ? [v16] : ? [v17] : (aIdeal0(v14) = v17 & aIdeal0(v13) = v16 & aIdeal0(v12) = v15 & ( ~ (v16 = 0) | ~ (v15 = 0) | v17 = 0))) & ! [v12] : ! [v13] : ! [v14] : ( ~ (sdtpldt1(v12, v13) = v14) | ? [v15] : ? [v16] : ? [v17] : (aIdeal0(v14) = v17 & aIdeal0(v13) = v16 & aIdeal0(v12) = v15 & ( ~ (v16 = 0) | ~ (v15 = 0) | v17 = 0))) & ! [v12] : ! [v13] : ! [v14] : ( ~ (sdtasdt0(v12, v13) = v14) | ? [v15] : ? [v16] : ? [v17] : (sdtasdt0(v13, v12) = v17 & aElement0(v13) = v16 & aElement0(v12) = v15 & ( ~ (v16 = 0) | ~ (v15 = 0) | v17 = v14))) & ! [v12] : ! [v13] : ! [v14] : ( ~ (sdtasdt0(v12, v13) = v14) | ? [v15] : ? [v16] : ? [v17] : (aElement0(v14) = v17 & aElement0(v13) = v16 & aElement0(v12) = v15 & ( ~ (v16 = 0) | ~ (v15 = 0) | v17 = 0))) & ! [v12] : ! [v13] : ! [v14] : ( ~ (sdtasdt0(v12, xu) = v14) | ~ (sdtpldt0(v14, v13) = xb) | ? [v15] : ? [v16] : ? [v17] : ? [v18] : (iLess0(v17, v3) = v18 & sbrdtbr0(v13) = v17 & aElement0(v13) = v16 & aElement0(v12) = v15 & ( ~ (v16 = 0) | ~ (v15 = 0) | ( ~ (v18 = 0) & ~ (v13 = sz00))))) & ! [v12] : ! [v13] : ! [v14] : ( ~ (sdtpldt0(v13, v12) = v14) | ~ (smndt0(v12) = v13) | ? [v15] : ? [v16] : (sdtpldt0(v12, v13) = v16 & aElement0(v12) = v15 & ( ~ (v15 = 0) | (v16 = sz00 & v14 = sz00)))) & ! [v12] : ! [v13] : ! [v14] : ( ~ (sdtpldt0(v12, v13) = v14) | ? [v15] : ? [v16] : ? [v17] : (sdtpldt0(v13, v12) = v17 & aElement0(v13) = v16 & aElement0(v12) = v15 & ( ~ (v16 = 0) | ~ (v15 = 0) | v17 = v14))) & ! [v12] : ! [v13] : ! [v14] : ( ~ (sdtpldt0(v12, v13) = v14) | ? [v15] : ? [v16] : ? [v17] : (aElement0(v14) = v17 & aElement0(v13) = v16 & aElement0(v12) = v15 & ( ~ (v16 = 0) | ~ (v15 = 0) | v17 = 0))) & ! [v12] : ! [v13] : (v13 = v12 | ~ (aSet0(v13) = 0) | ~ (aSet0(v12) = 0) | ? [v14] : ? [v15] : ? [v16] : ((v15 = 0 & ~ (v16 = 0) & aElementOf0(v14, v13) = v16 & aElementOf0(v14, v12) = 0) | (v15 = 0 & ~ (v16 = 0) & aElementOf0(v14, v13) = 0 & aElementOf0(v14, v12) = v16))) & ! [v12] : ! [v13] : (v13 = sz00 | v12 = sz00 | ~ (sdtasdt0(v12, v13) = sz00) | ? [v14] : ? [v15] : (aElement0(v13) = v15 & aElement0(v12) = v14 & ( ~ (v15 = 0) | ~ (v14 = 0)))) & ! [v12] : ! [v13] : (v13 = 0 | ~ (aIdeal0(v12) = v13) | ? [v14] : ? [v15] : ? [v16] : ? [v17] : ? [v18] : ? [v19] : ((v15 = 0 & aElementOf0(v14, v12) = 0 & ((v17 = 0 & ~ (v19 = 0) & aElementOf0(v18, v12) = v19 & aElementOf0(v16, v12) = 0 & sdtpldt0(v14, v16) = v18) | (v17 = 0 & ~ (v19 = 0) & aElementOf0(v18, v12) = v19 & sdtasdt0(v16, v14) = v18 & aElement0(v16) = 0))) | ( ~ (v14 = 0) & aSet0(v12) = v14))) & ! [v12] : ! [v13] : (v12 = sz00 | ~ (sbrdtbr0(v12) = v13) | ? [v14] : ? [v15] : (aNaturalNumber0(v13) = v15 & aElement0(v12) = v14 & ( ~ (v14 = 0) | v15 = 0))) & ! [v12] : ! [v13] : ( ~ (slsdtgt0(v12) = v13) | ? [v14] : ? [v15] : (aIdeal0(v13) = v15 & aElement0(v12) = v14 & ( ~ (v14 = 0) | v15 = 0))) & ! [v12] : ! [v13] : ( ~ (doDivides0(v13, v12) = 0) | ~ (aElement0(v12) = 0) | ? [v14] : ? [v15] : (aDivisorOf0(v13, v12) = v15 & aElement0(v13) = v14 & ( ~ (v14 = 0) | v15 = 0))) & ! [v12] : ! [v13] : ( ~ (doDivides0(v12, v13) = 0) | ? [v14] : ? [v15] : ? [v16] : ((v16 = v13 & v15 = 0 & sdtasdt0(v12, v14) = v13 & aElement0(v14) = 0) | (aElement0(v13) = v15 & aElement0(v12) = v14 & ( ~ (v15 = 0) | ~ (v14 = 0))))) & ! [v12] : ! [v13] : ( ~ (aSet0(v12) = 0) | ~ (aElementOf0(v13, v12) = 0) | aElement0(v13) = 0) & ! [v12] : ! [v13] : ( ~ (sdtasdt0(v0, v12) = v13) | ? [v14] : ? [v15] : ? [v16] : (sdtasdt0(v12, v0) = v16 & smndt0(v12) = v15 & aElement0(v12) = v14 & ( ~ (v14 = 0) | (v16 = v13 & v15 = v13)))) & ! [v12] : ! [v13] : ( ~ (sdtasdt0(sz10, v12) = v13) | ? [v14] : ? [v15] : (sdtasdt0(v12, sz10) = v15 & aElement0(v12) = v14 & ( ~ (v14 = 0) | (v15 = v12 & v13 = v12)))) & ! [v12] : ! [v13] : ( ~ (sdtasdt0(sz00, v12) = v13) | ? [v14] : ? [v15] : (sdtasdt0(v12, sz00) = v15 & aElement0(v12) = v14 & ( ~ (v14 = 0) | (v15 = sz00 & v13 = sz00)))) & ! [v12] : ! [v13] : ( ~ (sdtpldt0(sz00, v12) = v13) | ? [v14] : ? [v15] : (sdtpldt0(v12, sz00) = v15 & aElement0(v12) = v14 & ( ~ (v14 = 0) | (v15 = v12 & v13 = v12)))) & ! [v12] : ! [v13] : ( ~ (smndt0(v12) = v13) | ? [v14] : ? [v15] : (aElement0(v13) = v15 & aElement0(v12) = v14 & ( ~ (v14 = 0) | v15 = 0))) & ! [v12] : (v12 = sz00 | ~ (aElementOf0(v12, xI) = 0) | ? [v13] : ? [v14] : ( ~ (v14 = 0) & iLess0(v13, v3) = v14 & sbrdtbr0(v12) = v13)) & ! [v12] : ( ~ (aIdeal0(v12) = 0) | aSet0(v12) = 0) & ( ~ (v5 = 0) | ~ (v4 = 0)) & ( ~ (xb = sz00) | ~ (xa = sz00)))
% 40.07/12.01 | Instantiating (0) with all_0_0_0, all_0_1_1, all_0_2_2, all_0_3_3, all_0_4_4, all_0_5_5, all_0_6_6, all_0_7_7, all_0_8_8, all_0_9_9, all_0_10_10, all_0_11_11 yields:
% 40.07/12.01 | (1) ~ (all_0_0_0 = sz00) & ~ (all_0_5_5 = 0) & ~ (xu = sz00) & ~ (sz10 = sz00) & slsdtgt0(xb) = all_0_9_9 & slsdtgt0(xa) = all_0_10_10 & aGcdOfAnd0(xc, xa, xb) = 0 & aDivisorOf0(xu, xb) = all_0_6_6 & aDivisorOf0(xu, xa) = all_0_7_7 & doDivides0(xu, xb) = all_0_5_5 & doDivides0(xu, xa) = 0 & sbrdtbr0(xu) = all_0_8_8 & aIdeal0(xI) = 0 & sdtpldt1(all_0_10_10, all_0_9_9) = xI & aElementOf0(all_0_0_0, xI) = 0 & aElementOf0(xu, xI) = 0 & aElementOf0(xb, all_0_9_9) = 0 & aElementOf0(xa, all_0_10_10) = 0 & aElementOf0(sz00, all_0_9_9) = 0 & aElementOf0(sz00, all_0_10_10) = 0 & sdtasdt0(xb, all_0_3_3) = all_0_1_1 & sdtasdt0(xa, all_0_4_4) = all_0_2_2 & sdtpldt0(all_0_2_2, all_0_1_1) = xu & smndt0(sz10) = all_0_11_11 & aElement0(all_0_3_3) = 0 & aElement0(all_0_4_4) = 0 & aElement0(xb) = 0 & aElement0(xa) = 0 & aElement0(sz10) = 0 & aElement0(sz00) = 0 & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ! [v6] : ! [v7] : (v5 = 0 | ~ (sdtpldt1(v0, v1) = v2) | ~ (aSet0(v2) = v3) | ~ (aElementOf0(v4, v2) = v5) | ~ (sdtpldt0(v6, v7) = v4) | ? [v8] : ? [v9] : ((aSet0(v1) = v9 & aSet0(v0) = v8 & ( ~ (v9 = 0) | ~ (v8 = 0))) | (aElementOf0(v7, v1) = v9 & aElementOf0(v6, v0) = v8 & ( ~ (v9 = 0) | ~ (v8 = 0))))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : (v4 = 0 | ~ (slsdtgt0(v0) = v1) | ~ (aSet0(v1) = v2) | ~ (aElementOf0(v3, v1) = v4) | ~ (sdtasdt0(v0, v5) = v3) | ? [v6] : (( ~ (v6 = 0) & aElement0(v5) = v6) | ( ~ (v6 = 0) & aElement0(v0) = v6))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ( ~ (sdtasasdt0(v0, v1) = v2) | ~ (aSet0(v2) = v3) | ~ (aElementOf0(v4, v0) = v5) | ? [v6] : ? [v7] : ((aSet0(v1) = v7 & aSet0(v0) = v6 & ( ~ (v7 = 0) | ~ (v6 = 0))) | (aElementOf0(v4, v2) = v6 & aElementOf0(v4, v1) = v7 & ( ~ (v6 = 0) | (v7 = 0 & v5 = 0))))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ( ~ (aElementOf0(v4, v2) = v5) | ~ (sdtpldt0(v0, v3) = v4) | ~ (smndt0(v1) = v3) | ? [v6] : ? [v7] : ? [v8] : ? [v9] : (sdteqdtlpzmzozddtrp0(v0, v1, v2) = v9 & aIdeal0(v2) = v8 & aElement0(v1) = v7 & aElement0(v0) = v6 & ( ~ (v8 = 0) | ~ (v7 = 0) | ~ (v6 = 0) | (( ~ (v9 = 0) | v5 = 0) & ( ~ (v5 = 0) | v9 = 0))))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ( ~ (sdtasdt0(v0, v2) = v4) | ~ (sdtasdt0(v0, v1) = v3) | ~ (sdtpldt0(v3, v4) = v5) | ? [v6] : ? [v7] : ? [v8] : ? [v9] : ? [v10] : ? [v11] : ? [v12] : ? [v13] : ? [v14] : (sdtasdt0(v9, v0) = v11 & sdtasdt0(v2, v0) = v13 & sdtasdt0(v1, v0) = v12 & sdtasdt0(v0, v9) = v10 & sdtpldt0(v12, v13) = v14 & sdtpldt0(v1, v2) = v9 & aElement0(v2) = v8 & aElement0(v1) = v7 & aElement0(v0) = v6 & ( ~ (v8 = 0) | ~ (v7 = 0) | ~ (v6 = 0) | (v14 = v11 & v10 = v5)))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : (v4 = 0 | ~ (aGcdOfAnd0(v2, v0, v1) = 0) | ~ (doDivides0(v3, v2) = v4) | ~ (aElement0(v1) = 0) | ~ (aElement0(v0) = 0) | ? [v5] : ? [v6] : (aDivisorOf0(v3, v1) = v6 & aDivisorOf0(v3, v0) = v5 & ( ~ (v6 = 0) | ~ (v5 = 0)))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : (v4 = 0 | ~ (aIdeal0(v0) = 0) | ~ (aElementOf0(v3, v0) = v4) | ~ (aElementOf0(v1, v0) = 0) | ~ (sdtasdt0(v2, v1) = v3) | ? [v5] : ( ~ (v5 = 0) & aElement0(v2) = v5)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : (v4 = 0 | ~ (aIdeal0(v0) = 0) | ~ (aElementOf0(v3, v0) = v4) | ~ (aElementOf0(v1, v0) = 0) | ~ (sdtpldt0(v1, v2) = v3) | ? [v5] : ( ~ (v5 = 0) & aElementOf0(v2, v0) = v5)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : (v1 = v0 | ~ (aGcdOfAnd0(v4, v3, v2) = v1) | ~ (aGcdOfAnd0(v4, v3, v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : (v1 = v0 | ~ (sdteqdtlpzmzozddtrp0(v4, v3, v2) = v1) | ~ (sdteqdtlpzmzozddtrp0(v4, v3, v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (sdtasasdt0(v0, v1) = v2) | ~ (aSet0(v2) = v3) | ~ (aElementOf0(v4, v0) = 0) | ? [v5] : ? [v6] : ((aSet0(v1) = v6 & aSet0(v0) = v5 & ( ~ (v6 = 0) | ~ (v5 = 0))) | (aElementOf0(v4, v2) = v6 & aElementOf0(v4, v1) = v5 & ( ~ (v5 = 0) | v6 = 0)))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (sdtpldt1(v0, v1) = v2) | ~ (aSet0(v2) = v3) | ~ (aElementOf0(v4, v2) = 0) | ? [v5] : ? [v6] : ? [v7] : ? [v8] : ? [v9] : ((v9 = v4 & v8 = 0 & v7 = 0 & aElementOf0(v6, v1) = 0 & aElementOf0(v5, v0) = 0 & sdtpldt0(v5, v6) = v4) | (aSet0(v1) = v6 & aSet0(v0) = v5 & ( ~ (v6 = 0) | ~ (v5 = 0))))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (sdtpldt1(v0, v1) = v2) | ~ (aElement0(v4) = 0) | ~ (aElement0(v3) = 0) | ? [v5] : ? [v6] : ? [v7] : ? [v8] : ((v8 = 0 & v7 = 0 & v6 = 0 & sdteqdtlpzmzozddtrp0(v5, v4, v1) = 0 & sdteqdtlpzmzozddtrp0(v5, v3, v0) = 0 & aElement0(v5) = 0) | (v6 = 0 & ~ (v7 = 0) & aElementOf0(v5, v2) = v7 & aElement0(v5) = 0) | (aIdeal0(v1) = v6 & aIdeal0(v0) = v5 & ( ~ (v6 = 0) | ~ (v5 = 0))))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (sdtasdt0(v3, v2) = v4) | ~ (sdtasdt0(v0, v1) = v3) | ? [v5] : ? [v6] : ? [v7] : ? [v8] : ? [v9] : (sdtasdt0(v1, v2) = v8 & sdtasdt0(v0, v8) = v9 & aElement0(v2) = v7 & aElement0(v1) = v6 & aElement0(v0) = v5 & ( ~ (v7 = 0) | ~ (v6 = 0) | ~ (v5 = 0) | v9 = v4))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (sdtpldt0(v3, v2) = v4) | ~ (sdtpldt0(v0, v1) = v3) | ? [v5] : ? [v6] : ? [v7] : ? [v8] : ? [v9] : (sdtpldt0(v1, v2) = v8 & sdtpldt0(v0, v8) = v9 & aElement0(v2) = v7 & aElement0(v1) = v6 & aElement0(v0) = v5 & ( ~ (v7 = 0) | ~ (v6 = 0) | ~ (v5 = 0) | v9 = v4))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v3 = v2 | ~ (sdtasasdt0(v0, v1) = v2) | ~ (aSet0(v3) = 0) | ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((aSet0(v1) = v5 & aSet0(v0) = v4 & ( ~ (v5 = 0) | ~ (v4 = 0))) | (aElementOf0(v4, v3) = v5 & aElementOf0(v4, v1) = v7 & aElementOf0(v4, v0) = v6 & ( ~ (v7 = 0) | ~ (v6 = 0) | ~ (v5 = 0)) & (v5 = 0 | (v7 = 0 & v6 = 0))))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v3 = v2 | ~ (sdtpldt1(v0, v1) = v2) | ~ (aSet0(v3) = 0) | ? [v4] : ? [v5] : ? [v6] : ? [v7] : ? [v8] : ? [v9] : ? [v10] : ((aSet0(v1) = v5 & aSet0(v0) = v4 & ( ~ (v5 = 0) | ~ (v4 = 0))) | (aElementOf0(v4, v3) = v5 & ( ~ (v5 = 0) | ! [v11] : ! [v12] : ( ~ (sdtpldt0(v11, v12) = v4) | ? [v13] : ? [v14] : (aElementOf0(v12, v1) = v14 & aElementOf0(v11, v0) = v13 & ( ~ (v14 = 0) | ~ (v13 = 0))))) & (v5 = 0 | (v10 = v4 & v9 = 0 & v8 = 0 & aElementOf0(v7, v1) = 0 & aElementOf0(v6, v0) = 0 & sdtpldt0(v6, v7) = v4))))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v3 = 0 | ~ (aGcdOfAnd0(v2, v0, v1) = v3) | ~ (aElement0(v1) = 0) | ~ (aElement0(v0) = 0) | ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v6 = 0 & v5 = 0 & ~ (v7 = 0) & aDivisorOf0(v4, v1) = 0 & aDivisorOf0(v4, v0) = 0 & doDivides0(v4, v2) = v7) | (aDivisorOf0(v2, v1) = v5 & aDivisorOf0(v2, v0) = v4 & ( ~ (v5 = 0) | ~ (v4 = 0))))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v3 = 0 | ~ (sdtasasdt0(v0, v1) = v2) | ~ (aSet0(v2) = v3) | ? [v4] : ? [v5] : (aSet0(v1) = v5 & aSet0(v0) = v4 & ( ~ (v5 = 0) | ~ (v4 = 0)))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v3 = 0 | ~ (sdtpldt1(v0, v1) = v2) | ~ (aSet0(v2) = v3) | ? [v4] : ? [v5] : (aSet0(v1) = v5 & aSet0(v0) = v4 & ( ~ (v5 = 0) | ~ (v4 = 0)))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v2 = 0 | ~ (doDivides0(v0, v1) = v2) | ~ (sdtasdt0(v0, v3) = v1) | ? [v4] : ? [v5] : (( ~ (v4 = 0) & aElement0(v3) = v4) | (aElement0(v1) = v5 & aElement0(v0) = v4 & ( ~ (v5 = 0) | ~ (v4 = 0))))) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (misRelativelyPrime0(v3, v2) = v1) | ~ (misRelativelyPrime0(v3, v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (aDivisorOf0(v3, v2) = v1) | ~ (aDivisorOf0(v3, v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (doDivides0(v3, v2) = v1) | ~ (doDivides0(v3, v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (iLess0(v3, v2) = v1) | ~ (iLess0(v3, v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (sdtasasdt0(v3, v2) = v1) | ~ (sdtasasdt0(v3, v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (sdtpldt1(v3, v2) = v1) | ~ (sdtpldt1(v3, v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (aElementOf0(v3, v2) = v1) | ~ (aElementOf0(v3, v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (sdtasdt0(v3, v2) = v1) | ~ (sdtasdt0(v3, v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (sdtpldt0(v3, v2) = v1) | ~ (sdtpldt0(v3, v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (slsdtgt0(v0) = v1) | ~ (aSet0(v1) = v2) | ~ (aElementOf0(v3, v1) = 0) | ? [v4] : ? [v5] : ? [v6] : ((v6 = v3 & v5 = 0 & sdtasdt0(v0, v4) = v3 & aElement0(v4) = 0) | ( ~ (v4 = 0) & aElement0(v0) = v4))) & ! [v0] : ! [v1] : ! [v2] : (v2 = v1 | ~ (slsdtgt0(v0) = v1) | ~ (aSet0(v2) = 0) | ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : (( ~ (v3 = 0) & aElement0(v0) = v3) | (aElementOf0(v3, v2) = v4 & ( ~ (v4 = 0) | ! [v8] : ( ~ (sdtasdt0(v0, v8) = v3) | ? [v9] : ( ~ (v9 = 0) & aElement0(v8) = v9))) & (v4 = 0 | (v7 = v3 & v6 = 0 & sdtasdt0(v0, v5) = v3 & aElement0(v5) = 0))))) & ! [v0] : ! [v1] : ! [v2] : (v2 = 0 | ~ (slsdtgt0(v0) = v1) | ~ (aSet0(v1) = v2) | ? [v3] : ( ~ (v3 = 0) & aElement0(v0) = v3)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (slsdtgt0(v2) = v1) | ~ (slsdtgt0(v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (sbrdtbr0(v2) = v1) | ~ (sbrdtbr0(v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (aNaturalNumber0(v2) = v1) | ~ (aNaturalNumber0(v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (aIdeal0(v2) = v1) | ~ (aIdeal0(v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (aSet0(v2) = v1) | ~ (aSet0(v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (smndt0(v2) = v1) | ~ (smndt0(v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (aElement0(v2) = v1) | ~ (aElement0(v2) = v0)) & ! [v0] : ! [v1] : ! [v2] : (v1 = sz00 | ~ (sbrdtbr0(v1) = v2) | ~ (aElement0(v0) = 0) | ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ? [v8] : ? [v9] : ? [v10] : ((v8 = v0 & v6 = 0 & v5 = 0 & iLess0(v9, v2) = v10 & sbrdtbr0(v4) = v9 & sdtasdt0(v3, v1) = v7 & sdtpldt0(v7, v4) = v0 & aElement0(v4) = 0 & aElement0(v3) = 0 & (v10 = 0 | v4 = sz00)) | ( ~ (v3 = 0) & aElement0(v1) = v3))) & ! [v0] : ! [v1] : ! [v2] : ( ~ (aGcdOfAnd0(v2, v0, v1) = 0) | ~ (aElement0(v1) = 0) | ~ (aElement0(v0) = 0) | (aDivisorOf0(v2, v1) = 0 & aDivisorOf0(v2, v0) = 0)) & ! [v0] : ! [v1] : ! [v2] : ( ~ (aGcdOfAnd0(sz10, v0, v1) = v2) | ? [v3] : ? [v4] : ? [v5] : (misRelativelyPrime0(v0, v1) = v5 & aElement0(v1) = v4 & aElement0(v0) = v3 & ( ~ (v4 = 0) | ~ (v3 = 0) | (( ~ (v5 = 0) | v2 = 0) & ( ~ (v2 = 0) | v5 = 0))))) & ! [v0] : ! [v1] : ! [v2] : ( ~ (doDivides0(v1, v0) = v2) | ~ (aElement0(v0) = 0) | ? [v3] : ? [v4] : (aDivisorOf0(v1, v0) = v3 & aElement0(v1) = v4 & ( ~ (v3 = 0) | (v4 = 0 & v2 = 0)))) & ! [v0] : ! [v1] : ! [v2] : ( ~ (sdtasasdt0(v0, v1) = v2) | ? [v3] : ? [v4] : ? [v5] : (aIdeal0(v2) = v5 & aIdeal0(v1) = v4 & aIdeal0(v0) = v3 & ( ~ (v4 = 0) | ~ (v3 = 0) | v5 = 0))) & ! [v0] : ! [v1] : ! [v2] : ( ~ (sdtpldt1(v0, v1) = v2) | ? [v3] : ? [v4] : ? [v5] : (aIdeal0(v2) = v5 & aIdeal0(v1) = v4 & aIdeal0(v0) = v3 & ( ~ (v4 = 0) | ~ (v3 = 0) | v5 = 0))) & ! [v0] : ! [v1] : ! [v2] : ( ~ (sdtasdt0(v0, v1) = v2) | ? [v3] : ? [v4] : ? [v5] : (sdtasdt0(v1, v0) = v5 & aElement0(v1) = v4 & aElement0(v0) = v3 & ( ~ (v4 = 0) | ~ (v3 = 0) | v5 = v2))) & ! [v0] : ! [v1] : ! [v2] : ( ~ (sdtasdt0(v0, v1) = v2) | ? [v3] : ? [v4] : ? [v5] : (aElement0(v2) = v5 & aElement0(v1) = v4 & aElement0(v0) = v3 & ( ~ (v4 = 0) | ~ (v3 = 0) | v5 = 0))) & ! [v0] : ! [v1] : ! [v2] : ( ~ (sdtasdt0(v0, xu) = v2) | ~ (sdtpldt0(v2, v1) = xb) | ? [v3] : ? [v4] : ? [v5] : ? [v6] : (iLess0(v5, all_0_8_8) = v6 & sbrdtbr0(v1) = v5 & aElement0(v1) = v4 & aElement0(v0) = v3 & ( ~ (v4 = 0) | ~ (v3 = 0) | ( ~ (v6 = 0) & ~ (v1 = sz00))))) & ! [v0] : ! [v1] : ! [v2] : ( ~ (sdtpldt0(v1, v0) = v2) | ~ (smndt0(v0) = v1) | ? [v3] : ? [v4] : (sdtpldt0(v0, v1) = v4 & aElement0(v0) = v3 & ( ~ (v3 = 0) | (v4 = sz00 & v2 = sz00)))) & ! [v0] : ! [v1] : ! [v2] : ( ~ (sdtpldt0(v0, v1) = v2) | ? [v3] : ? [v4] : ? [v5] : (sdtpldt0(v1, v0) = v5 & aElement0(v1) = v4 & aElement0(v0) = v3 & ( ~ (v4 = 0) | ~ (v3 = 0) | v5 = v2))) & ! [v0] : ! [v1] : ! [v2] : ( ~ (sdtpldt0(v0, v1) = v2) | ? [v3] : ? [v4] : ? [v5] : (aElement0(v2) = v5 & aElement0(v1) = v4 & aElement0(v0) = v3 & ( ~ (v4 = 0) | ~ (v3 = 0) | v5 = 0))) & ! [v0] : ! [v1] : (v1 = v0 | ~ (aSet0(v1) = 0) | ~ (aSet0(v0) = 0) | ? [v2] : ? [v3] : ? [v4] : ((v3 = 0 & ~ (v4 = 0) & aElementOf0(v2, v1) = v4 & aElementOf0(v2, v0) = 0) | (v3 = 0 & ~ (v4 = 0) & aElementOf0(v2, v1) = 0 & aElementOf0(v2, v0) = v4))) & ! [v0] : ! [v1] : (v1 = sz00 | v0 = sz00 | ~ (sdtasdt0(v0, v1) = sz00) | ? [v2] : ? [v3] : (aElement0(v1) = v3 & aElement0(v0) = v2 & ( ~ (v3 = 0) | ~ (v2 = 0)))) & ! [v0] : ! [v1] : (v1 = 0 | ~ (aIdeal0(v0) = v1) | ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v3 = 0 & aElementOf0(v2, v0) = 0 & ((v5 = 0 & ~ (v7 = 0) & aElementOf0(v6, v0) = v7 & aElementOf0(v4, v0) = 0 & sdtpldt0(v2, v4) = v6) | (v5 = 0 & ~ (v7 = 0) & aElementOf0(v6, v0) = v7 & sdtasdt0(v4, v2) = v6 & aElement0(v4) = 0))) | ( ~ (v2 = 0) & aSet0(v0) = v2))) & ! [v0] : ! [v1] : (v0 = sz00 | ~ (sbrdtbr0(v0) = v1) | ? [v2] : ? [v3] : (aNaturalNumber0(v1) = v3 & aElement0(v0) = v2 & ( ~ (v2 = 0) | v3 = 0))) & ! [v0] : ! [v1] : ( ~ (slsdtgt0(v0) = v1) | ? [v2] : ? [v3] : (aIdeal0(v1) = v3 & aElement0(v0) = v2 & ( ~ (v2 = 0) | v3 = 0))) & ! [v0] : ! [v1] : ( ~ (doDivides0(v1, v0) = 0) | ~ (aElement0(v0) = 0) | ? [v2] : ? [v3] : (aDivisorOf0(v1, v0) = v3 & aElement0(v1) = v2 & ( ~ (v2 = 0) | v3 = 0))) & ! [v0] : ! [v1] : ( ~ (doDivides0(v0, v1) = 0) | ? [v2] : ? [v3] : ? [v4] : ((v4 = v1 & v3 = 0 & sdtasdt0(v0, v2) = v1 & aElement0(v2) = 0) | (aElement0(v1) = v3 & aElement0(v0) = v2 & ( ~ (v3 = 0) | ~ (v2 = 0))))) & ! [v0] : ! [v1] : ( ~ (aSet0(v0) = 0) | ~ (aElementOf0(v1, v0) = 0) | aElement0(v1) = 0) & ! [v0] : ! [v1] : ( ~ (sdtasdt0(all_0_11_11, v0) = v1) | ? [v2] : ? [v3] : ? [v4] : (sdtasdt0(v0, all_0_11_11) = v4 & smndt0(v0) = v3 & aElement0(v0) = v2 & ( ~ (v2 = 0) | (v4 = v1 & v3 = v1)))) & ! [v0] : ! [v1] : ( ~ (sdtasdt0(sz10, v0) = v1) | ? [v2] : ? [v3] : (sdtasdt0(v0, sz10) = v3 & aElement0(v0) = v2 & ( ~ (v2 = 0) | (v3 = v0 & v1 = v0)))) & ! [v0] : ! [v1] : ( ~ (sdtasdt0(sz00, v0) = v1) | ? [v2] : ? [v3] : (sdtasdt0(v0, sz00) = v3 & aElement0(v0) = v2 & ( ~ (v2 = 0) | (v3 = sz00 & v1 = sz00)))) & ! [v0] : ! [v1] : ( ~ (sdtpldt0(sz00, v0) = v1) | ? [v2] : ? [v3] : (sdtpldt0(v0, sz00) = v3 & aElement0(v0) = v2 & ( ~ (v2 = 0) | (v3 = v0 & v1 = v0)))) & ! [v0] : ! [v1] : ( ~ (smndt0(v0) = v1) | ? [v2] : ? [v3] : (aElement0(v1) = v3 & aElement0(v0) = v2 & ( ~ (v2 = 0) | v3 = 0))) & ! [v0] : (v0 = sz00 | ~ (aElementOf0(v0, xI) = 0) | ? [v1] : ? [v2] : ( ~ (v2 = 0) & iLess0(v1, all_0_8_8) = v2 & sbrdtbr0(v0) = v1)) & ! [v0] : ( ~ (aIdeal0(v0) = 0) | aSet0(v0) = 0) & ( ~ (all_0_6_6 = 0) | ~ (all_0_7_7 = 0)) & ( ~ (xb = sz00) | ~ (xa = sz00))
% 40.25/12.03 |
% 40.25/12.03 | Applying alpha-rule on (1) yields:
% 40.25/12.03 | (2) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (sdtpldt0(v3, v2) = v4) | ~ (sdtpldt0(v0, v1) = v3) | ? [v5] : ? [v6] : ? [v7] : ? [v8] : ? [v9] : (sdtpldt0(v1, v2) = v8 & sdtpldt0(v0, v8) = v9 & aElement0(v2) = v7 & aElement0(v1) = v6 & aElement0(v0) = v5 & ( ~ (v7 = 0) | ~ (v6 = 0) | ~ (v5 = 0) | v9 = v4)))
% 40.25/12.03 | (3) ! [v0] : ! [v1] : ( ~ (sdtpldt0(sz00, v0) = v1) | ? [v2] : ? [v3] : (sdtpldt0(v0, sz00) = v3 & aElement0(v0) = v2 & ( ~ (v2 = 0) | (v3 = v0 & v1 = v0))))
% 40.25/12.03 | (4) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (misRelativelyPrime0(v3, v2) = v1) | ~ (misRelativelyPrime0(v3, v2) = v0))
% 40.25/12.03 | (5) aElementOf0(all_0_0_0, xI) = 0
% 40.25/12.03 | (6) sdtasdt0(xa, all_0_4_4) = all_0_2_2
% 40.25/12.03 | (7) sdtpldt0(all_0_2_2, all_0_1_1) = xu
% 40.25/12.03 | (8) ~ (all_0_5_5 = 0)
% 40.25/12.03 | (9) ! [v0] : ! [v1] : (v1 = v0 | ~ (aSet0(v1) = 0) | ~ (aSet0(v0) = 0) | ? [v2] : ? [v3] : ? [v4] : ((v3 = 0 & ~ (v4 = 0) & aElementOf0(v2, v1) = v4 & aElementOf0(v2, v0) = 0) | (v3 = 0 & ~ (v4 = 0) & aElementOf0(v2, v1) = 0 & aElementOf0(v2, v0) = v4)))
% 40.25/12.03 | (10) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (aIdeal0(v2) = v1) | ~ (aIdeal0(v2) = v0))
% 40.25/12.04 | (11) sdtasdt0(xb, all_0_3_3) = all_0_1_1
% 40.25/12.04 | (12) ! [v0] : ! [v1] : ! [v2] : ( ~ (sdtasdt0(v0, v1) = v2) | ? [v3] : ? [v4] : ? [v5] : (aElement0(v2) = v5 & aElement0(v1) = v4 & aElement0(v0) = v3 & ( ~ (v4 = 0) | ~ (v3 = 0) | v5 = 0)))
% 40.25/12.04 | (13) ~ (all_0_0_0 = sz00)
% 40.25/12.04 | (14) ! [v0] : ! [v1] : ! [v2] : (v2 = v1 | ~ (slsdtgt0(v0) = v1) | ~ (aSet0(v2) = 0) | ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : (( ~ (v3 = 0) & aElement0(v0) = v3) | (aElementOf0(v3, v2) = v4 & ( ~ (v4 = 0) | ! [v8] : ( ~ (sdtasdt0(v0, v8) = v3) | ? [v9] : ( ~ (v9 = 0) & aElement0(v8) = v9))) & (v4 = 0 | (v7 = v3 & v6 = 0 & sdtasdt0(v0, v5) = v3 & aElement0(v5) = 0)))))
% 40.25/12.04 | (15) smndt0(sz10) = all_0_11_11
% 40.25/12.04 | (16) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (aElementOf0(v3, v2) = v1) | ~ (aElementOf0(v3, v2) = v0))
% 40.25/12.04 | (17) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : (v4 = 0 | ~ (aIdeal0(v0) = 0) | ~ (aElementOf0(v3, v0) = v4) | ~ (aElementOf0(v1, v0) = 0) | ~ (sdtpldt0(v1, v2) = v3) | ? [v5] : ( ~ (v5 = 0) & aElementOf0(v2, v0) = v5))
% 40.25/12.04 | (18) ! [v0] : ! [v1] : (v0 = sz00 | ~ (sbrdtbr0(v0) = v1) | ? [v2] : ? [v3] : (aNaturalNumber0(v1) = v3 & aElement0(v0) = v2 & ( ~ (v2 = 0) | v3 = 0)))
% 40.25/12.04 | (19) ! [v0] : ! [v1] : ! [v2] : ( ~ (sdtpldt0(v1, v0) = v2) | ~ (smndt0(v0) = v1) | ? [v3] : ? [v4] : (sdtpldt0(v0, v1) = v4 & aElement0(v0) = v3 & ( ~ (v3 = 0) | (v4 = sz00 & v2 = sz00))))
% 40.25/12.04 | (20) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ( ~ (slsdtgt0(v0) = v1) | ~ (aSet0(v1) = v2) | ~ (aElementOf0(v3, v1) = 0) | ? [v4] : ? [v5] : ? [v6] : ((v6 = v3 & v5 = 0 & sdtasdt0(v0, v4) = v3 & aElement0(v4) = 0) | ( ~ (v4 = 0) & aElement0(v0) = v4)))
% 40.25/12.04 | (21) ~ (all_0_6_6 = 0) | ~ (all_0_7_7 = 0)
% 40.25/12.04 | (22) ! [v0] : ! [v1] : ( ~ (aSet0(v0) = 0) | ~ (aElementOf0(v1, v0) = 0) | aElement0(v1) = 0)
% 40.25/12.04 | (23) ! [v0] : ! [v1] : (v1 = 0 | ~ (aIdeal0(v0) = v1) | ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v3 = 0 & aElementOf0(v2, v0) = 0 & ((v5 = 0 & ~ (v7 = 0) & aElementOf0(v6, v0) = v7 & aElementOf0(v4, v0) = 0 & sdtpldt0(v2, v4) = v6) | (v5 = 0 & ~ (v7 = 0) & aElementOf0(v6, v0) = v7 & sdtasdt0(v4, v2) = v6 & aElement0(v4) = 0))) | ( ~ (v2 = 0) & aSet0(v0) = v2)))
% 40.39/12.04 | (24) aElement0(xa) = 0
% 40.39/12.04 | (25) ! [v0] : (v0 = sz00 | ~ (aElementOf0(v0, xI) = 0) | ? [v1] : ? [v2] : ( ~ (v2 = 0) & iLess0(v1, all_0_8_8) = v2 & sbrdtbr0(v0) = v1))
% 40.39/12.04 | (26) aElement0(all_0_4_4) = 0
% 40.39/12.04 | (27) ! [v0] : ! [v1] : ! [v2] : ( ~ (sdtpldt0(v0, v1) = v2) | ? [v3] : ? [v4] : ? [v5] : (sdtpldt0(v1, v0) = v5 & aElement0(v1) = v4 & aElement0(v0) = v3 & ( ~ (v4 = 0) | ~ (v3 = 0) | v5 = v2)))
% 40.39/12.04 | (28) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (doDivides0(v3, v2) = v1) | ~ (doDivides0(v3, v2) = v0))
% 40.39/12.04 | (29) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ! [v6] : ! [v7] : (v5 = 0 | ~ (sdtpldt1(v0, v1) = v2) | ~ (aSet0(v2) = v3) | ~ (aElementOf0(v4, v2) = v5) | ~ (sdtpldt0(v6, v7) = v4) | ? [v8] : ? [v9] : ((aSet0(v1) = v9 & aSet0(v0) = v8 & ( ~ (v9 = 0) | ~ (v8 = 0))) | (aElementOf0(v7, v1) = v9 & aElementOf0(v6, v0) = v8 & ( ~ (v9 = 0) | ~ (v8 = 0)))))
% 40.39/12.04 | (30) doDivides0(xu, xa) = 0
% 40.39/12.04 | (31) ! [v0] : ! [v1] : ! [v2] : ( ~ (aGcdOfAnd0(sz10, v0, v1) = v2) | ? [v3] : ? [v4] : ? [v5] : (misRelativelyPrime0(v0, v1) = v5 & aElement0(v1) = v4 & aElement0(v0) = v3 & ( ~ (v4 = 0) | ~ (v3 = 0) | (( ~ (v5 = 0) | v2 = 0) & ( ~ (v2 = 0) | v5 = 0)))))
% 40.39/12.04 | (32) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (iLess0(v3, v2) = v1) | ~ (iLess0(v3, v2) = v0))
% 40.39/12.04 | (33) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (aDivisorOf0(v3, v2) = v1) | ~ (aDivisorOf0(v3, v2) = v0))
% 40.39/12.04 | (34) aElement0(sz00) = 0
% 40.39/12.04 | (35) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (sbrdtbr0(v2) = v1) | ~ (sbrdtbr0(v2) = v0))
% 40.39/12.04 | (36) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v3 = v2 | ~ (sdtpldt1(v0, v1) = v2) | ~ (aSet0(v3) = 0) | ? [v4] : ? [v5] : ? [v6] : ? [v7] : ? [v8] : ? [v9] : ? [v10] : ((aSet0(v1) = v5 & aSet0(v0) = v4 & ( ~ (v5 = 0) | ~ (v4 = 0))) | (aElementOf0(v4, v3) = v5 & ( ~ (v5 = 0) | ! [v11] : ! [v12] : ( ~ (sdtpldt0(v11, v12) = v4) | ? [v13] : ? [v14] : (aElementOf0(v12, v1) = v14 & aElementOf0(v11, v0) = v13 & ( ~ (v14 = 0) | ~ (v13 = 0))))) & (v5 = 0 | (v10 = v4 & v9 = 0 & v8 = 0 & aElementOf0(v7, v1) = 0 & aElementOf0(v6, v0) = 0 & sdtpldt0(v6, v7) = v4)))))
% 40.39/12.04 | (37) ~ (sz10 = sz00)
% 40.39/12.04 | (38) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : (v4 = 0 | ~ (aIdeal0(v0) = 0) | ~ (aElementOf0(v3, v0) = v4) | ~ (aElementOf0(v1, v0) = 0) | ~ (sdtasdt0(v2, v1) = v3) | ? [v5] : ( ~ (v5 = 0) & aElement0(v2) = v5))
% 40.39/12.04 | (39) aElementOf0(sz00, all_0_10_10) = 0
% 40.39/12.04 | (40) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (sdtpldt1(v3, v2) = v1) | ~ (sdtpldt1(v3, v2) = v0))
% 40.39/12.04 | (41) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ( ~ (aElementOf0(v4, v2) = v5) | ~ (sdtpldt0(v0, v3) = v4) | ~ (smndt0(v1) = v3) | ? [v6] : ? [v7] : ? [v8] : ? [v9] : (sdteqdtlpzmzozddtrp0(v0, v1, v2) = v9 & aIdeal0(v2) = v8 & aElement0(v1) = v7 & aElement0(v0) = v6 & ( ~ (v8 = 0) | ~ (v7 = 0) | ~ (v6 = 0) | (( ~ (v9 = 0) | v5 = 0) & ( ~ (v5 = 0) | v9 = 0)))))
% 40.39/12.04 | (42) ! [v0] : ! [v1] : (v1 = sz00 | v0 = sz00 | ~ (sdtasdt0(v0, v1) = sz00) | ? [v2] : ? [v3] : (aElement0(v1) = v3 & aElement0(v0) = v2 & ( ~ (v3 = 0) | ~ (v2 = 0))))
% 40.39/12.05 | (43) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : (v4 = 0 | ~ (slsdtgt0(v0) = v1) | ~ (aSet0(v1) = v2) | ~ (aElementOf0(v3, v1) = v4) | ~ (sdtasdt0(v0, v5) = v3) | ? [v6] : (( ~ (v6 = 0) & aElement0(v5) = v6) | ( ~ (v6 = 0) & aElement0(v0) = v6)))
% 40.39/12.05 | (44) sbrdtbr0(xu) = all_0_8_8
% 40.39/12.05 | (45) aDivisorOf0(xu, xb) = all_0_6_6
% 40.39/12.05 | (46) aElement0(xb) = 0
% 40.39/12.05 | (47) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : (v1 = v0 | ~ (aGcdOfAnd0(v4, v3, v2) = v1) | ~ (aGcdOfAnd0(v4, v3, v2) = v0))
% 40.39/12.05 | (48) ! [v0] : ! [v1] : ( ~ (doDivides0(v0, v1) = 0) | ? [v2] : ? [v3] : ? [v4] : ((v4 = v1 & v3 = 0 & sdtasdt0(v0, v2) = v1 & aElement0(v2) = 0) | (aElement0(v1) = v3 & aElement0(v0) = v2 & ( ~ (v3 = 0) | ~ (v2 = 0)))))
% 40.39/12.05 | (49) aElementOf0(sz00, all_0_9_9) = 0
% 40.39/12.05 | (50) ! [v0] : ! [v1] : ! [v2] : ( ~ (sdtasasdt0(v0, v1) = v2) | ? [v3] : ? [v4] : ? [v5] : (aIdeal0(v2) = v5 & aIdeal0(v1) = v4 & aIdeal0(v0) = v3 & ( ~ (v4 = 0) | ~ (v3 = 0) | v5 = 0)))
% 40.39/12.05 | (51) ! [v0] : ! [v1] : ( ~ (slsdtgt0(v0) = v1) | ? [v2] : ? [v3] : (aIdeal0(v1) = v3 & aElement0(v0) = v2 & ( ~ (v2 = 0) | v3 = 0)))
% 40.39/12.05 | (52) ! [v0] : ! [v1] : ( ~ (sdtasdt0(all_0_11_11, v0) = v1) | ? [v2] : ? [v3] : ? [v4] : (sdtasdt0(v0, all_0_11_11) = v4 & smndt0(v0) = v3 & aElement0(v0) = v2 & ( ~ (v2 = 0) | (v4 = v1 & v3 = v1))))
% 40.39/12.05 | (53) ! [v0] : ! [v1] : ! [v2] : ( ~ (sdtpldt0(v0, v1) = v2) | ? [v3] : ? [v4] : ? [v5] : (aElement0(v2) = v5 & aElement0(v1) = v4 & aElement0(v0) = v3 & ( ~ (v4 = 0) | ~ (v3 = 0) | v5 = 0)))
% 40.39/12.05 | (54) ! [v0] : ! [v1] : ! [v2] : (v2 = 0 | ~ (slsdtgt0(v0) = v1) | ~ (aSet0(v1) = v2) | ? [v3] : ( ~ (v3 = 0) & aElement0(v0) = v3))
% 40.39/12.05 | (55) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (aElement0(v2) = v1) | ~ (aElement0(v2) = v0))
% 40.39/12.05 | (56) aElementOf0(xu, xI) = 0
% 40.39/12.05 | (57) aIdeal0(xI) = 0
% 40.39/12.05 | (58) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (aNaturalNumber0(v2) = v1) | ~ (aNaturalNumber0(v2) = v0))
% 40.39/12.05 | (59) ~ (xu = sz00)
% 40.39/12.05 | (60) ! [v0] : ! [v1] : ! [v2] : (v1 = sz00 | ~ (sbrdtbr0(v1) = v2) | ~ (aElement0(v0) = 0) | ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ? [v8] : ? [v9] : ? [v10] : ((v8 = v0 & v6 = 0 & v5 = 0 & iLess0(v9, v2) = v10 & sbrdtbr0(v4) = v9 & sdtasdt0(v3, v1) = v7 & sdtpldt0(v7, v4) = v0 & aElement0(v4) = 0 & aElement0(v3) = 0 & (v10 = 0 | v4 = sz00)) | ( ~ (v3 = 0) & aElement0(v1) = v3)))
% 40.39/12.05 | (61) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ( ~ (sdtasasdt0(v0, v1) = v2) | ~ (aSet0(v2) = v3) | ~ (aElementOf0(v4, v0) = v5) | ? [v6] : ? [v7] : ((aSet0(v1) = v7 & aSet0(v0) = v6 & ( ~ (v7 = 0) | ~ (v6 = 0))) | (aElementOf0(v4, v2) = v6 & aElementOf0(v4, v1) = v7 & ( ~ (v6 = 0) | (v7 = 0 & v5 = 0)))))
% 40.39/12.05 | (62) aElement0(all_0_3_3) = 0
% 40.39/12.05 | (63) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : (v1 = v0 | ~ (sdteqdtlpzmzozddtrp0(v4, v3, v2) = v1) | ~ (sdteqdtlpzmzozddtrp0(v4, v3, v2) = v0))
% 40.39/12.05 | (64) slsdtgt0(xb) = all_0_9_9
% 40.39/12.05 | (65) ! [v0] : ! [v1] : ( ~ (smndt0(v0) = v1) | ? [v2] : ? [v3] : (aElement0(v1) = v3 & aElement0(v0) = v2 & ( ~ (v2 = 0) | v3 = 0)))
% 40.39/12.05 | (66) ! [v0] : ! [v1] : ! [v2] : ( ~ (sdtasdt0(v0, v1) = v2) | ? [v3] : ? [v4] : ? [v5] : (sdtasdt0(v1, v0) = v5 & aElement0(v1) = v4 & aElement0(v0) = v3 & ( ~ (v4 = 0) | ~ (v3 = 0) | v5 = v2)))
% 40.39/12.05 | (67) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (sdtpldt1(v0, v1) = v2) | ~ (aElement0(v4) = 0) | ~ (aElement0(v3) = 0) | ? [v5] : ? [v6] : ? [v7] : ? [v8] : ((v8 = 0 & v7 = 0 & v6 = 0 & sdteqdtlpzmzozddtrp0(v5, v4, v1) = 0 & sdteqdtlpzmzozddtrp0(v5, v3, v0) = 0 & aElement0(v5) = 0) | (v6 = 0 & ~ (v7 = 0) & aElementOf0(v5, v2) = v7 & aElement0(v5) = 0) | (aIdeal0(v1) = v6 & aIdeal0(v0) = v5 & ( ~ (v6 = 0) | ~ (v5 = 0)))))
% 40.39/12.05 | (68) ! [v0] : ! [v1] : ! [v2] : ( ~ (doDivides0(v1, v0) = v2) | ~ (aElement0(v0) = 0) | ? [v3] : ? [v4] : (aDivisorOf0(v1, v0) = v3 & aElement0(v1) = v4 & ( ~ (v3 = 0) | (v4 = 0 & v2 = 0))))
% 40.39/12.05 | (69) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (sdtpldt1(v0, v1) = v2) | ~ (aSet0(v2) = v3) | ~ (aElementOf0(v4, v2) = 0) | ? [v5] : ? [v6] : ? [v7] : ? [v8] : ? [v9] : ((v9 = v4 & v8 = 0 & v7 = 0 & aElementOf0(v6, v1) = 0 & aElementOf0(v5, v0) = 0 & sdtpldt0(v5, v6) = v4) | (aSet0(v1) = v6 & aSet0(v0) = v5 & ( ~ (v6 = 0) | ~ (v5 = 0)))))
% 40.39/12.05 | (70) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (slsdtgt0(v2) = v1) | ~ (slsdtgt0(v2) = v0))
% 40.39/12.05 | (71) aElement0(sz10) = 0
% 40.39/12.05 | (72) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v2 = 0 | ~ (doDivides0(v0, v1) = v2) | ~ (sdtasdt0(v0, v3) = v1) | ? [v4] : ? [v5] : (( ~ (v4 = 0) & aElement0(v3) = v4) | (aElement0(v1) = v5 & aElement0(v0) = v4 & ( ~ (v5 = 0) | ~ (v4 = 0)))))
% 40.39/12.05 | (73) ! [v0] : ! [v1] : ( ~ (sdtasdt0(sz00, v0) = v1) | ? [v2] : ? [v3] : (sdtasdt0(v0, sz00) = v3 & aElement0(v0) = v2 & ( ~ (v2 = 0) | (v3 = sz00 & v1 = sz00))))
% 40.39/12.05 | (74) aElementOf0(xb, all_0_9_9) = 0
% 40.39/12.05 | (75) ! [v0] : ! [v1] : ! [v2] : ( ~ (aGcdOfAnd0(v2, v0, v1) = 0) | ~ (aElement0(v1) = 0) | ~ (aElement0(v0) = 0) | (aDivisorOf0(v2, v1) = 0 & aDivisorOf0(v2, v0) = 0))
% 40.39/12.05 | (76) sdtpldt1(all_0_10_10, all_0_9_9) = xI
% 40.39/12.05 | (77) ! [v0] : ! [v1] : ! [v2] : ( ~ (sdtpldt1(v0, v1) = v2) | ? [v3] : ? [v4] : ? [v5] : (aIdeal0(v2) = v5 & aIdeal0(v1) = v4 & aIdeal0(v0) = v3 & ( ~ (v4 = 0) | ~ (v3 = 0) | v5 = 0)))
% 40.39/12.06 | (78) ! [v0] : ! [v1] : ( ~ (doDivides0(v1, v0) = 0) | ~ (aElement0(v0) = 0) | ? [v2] : ? [v3] : (aDivisorOf0(v1, v0) = v3 & aElement0(v1) = v2 & ( ~ (v2 = 0) | v3 = 0)))
% 40.39/12.06 | (79) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (aSet0(v2) = v1) | ~ (aSet0(v2) = v0))
% 40.39/12.06 | (80) ! [v0] : ! [v1] : ( ~ (sdtasdt0(sz10, v0) = v1) | ? [v2] : ? [v3] : (sdtasdt0(v0, sz10) = v3 & aElement0(v0) = v2 & ( ~ (v2 = 0) | (v3 = v0 & v1 = v0))))
% 40.39/12.06 | (81) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : (v4 = 0 | ~ (aGcdOfAnd0(v2, v0, v1) = 0) | ~ (doDivides0(v3, v2) = v4) | ~ (aElement0(v1) = 0) | ~ (aElement0(v0) = 0) | ? [v5] : ? [v6] : (aDivisorOf0(v3, v1) = v6 & aDivisorOf0(v3, v0) = v5 & ( ~ (v6 = 0) | ~ (v5 = 0))))
% 40.39/12.06 | (82) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v3 = v2 | ~ (sdtasasdt0(v0, v1) = v2) | ~ (aSet0(v3) = 0) | ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((aSet0(v1) = v5 & aSet0(v0) = v4 & ( ~ (v5 = 0) | ~ (v4 = 0))) | (aElementOf0(v4, v3) = v5 & aElementOf0(v4, v1) = v7 & aElementOf0(v4, v0) = v6 & ( ~ (v7 = 0) | ~ (v6 = 0) | ~ (v5 = 0)) & (v5 = 0 | (v7 = 0 & v6 = 0)))))
% 40.39/12.06 | (83) ! [v0] : ! [v1] : ! [v2] : (v1 = v0 | ~ (smndt0(v2) = v1) | ~ (smndt0(v2) = v0))
% 40.39/12.06 | (84) ! [v0] : ! [v1] : ! [v2] : ( ~ (sdtasdt0(v0, xu) = v2) | ~ (sdtpldt0(v2, v1) = xb) | ? [v3] : ? [v4] : ? [v5] : ? [v6] : (iLess0(v5, all_0_8_8) = v6 & sbrdtbr0(v1) = v5 & aElement0(v1) = v4 & aElement0(v0) = v3 & ( ~ (v4 = 0) | ~ (v3 = 0) | ( ~ (v6 = 0) & ~ (v1 = sz00)))))
% 40.39/12.06 | (85) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v3 = 0 | ~ (sdtpldt1(v0, v1) = v2) | ~ (aSet0(v2) = v3) | ? [v4] : ? [v5] : (aSet0(v1) = v5 & aSet0(v0) = v4 & ( ~ (v5 = 0) | ~ (v4 = 0))))
% 40.39/12.06 | (86) slsdtgt0(xa) = all_0_10_10
% 40.39/12.06 | (87) aElementOf0(xa, all_0_10_10) = 0
% 40.39/12.06 | (88) aGcdOfAnd0(xc, xa, xb) = 0
% 40.39/12.06 | (89) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v3 = 0 | ~ (aGcdOfAnd0(v2, v0, v1) = v3) | ~ (aElement0(v1) = 0) | ~ (aElement0(v0) = 0) | ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v6 = 0 & v5 = 0 & ~ (v7 = 0) & aDivisorOf0(v4, v1) = 0 & aDivisorOf0(v4, v0) = 0 & doDivides0(v4, v2) = v7) | (aDivisorOf0(v2, v1) = v5 & aDivisorOf0(v2, v0) = v4 & ( ~ (v5 = 0) | ~ (v4 = 0)))))
% 40.39/12.06 | (90) doDivides0(xu, xb) = all_0_5_5
% 40.39/12.06 | (91) aDivisorOf0(xu, xa) = all_0_7_7
% 40.39/12.06 | (92) ! [v0] : ( ~ (aIdeal0(v0) = 0) | aSet0(v0) = 0)
% 40.39/12.06 | (93) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (sdtasasdt0(v0, v1) = v2) | ~ (aSet0(v2) = v3) | ~ (aElementOf0(v4, v0) = 0) | ? [v5] : ? [v6] : ((aSet0(v1) = v6 & aSet0(v0) = v5 & ( ~ (v6 = 0) | ~ (v5 = 0))) | (aElementOf0(v4, v2) = v6 & aElementOf0(v4, v1) = v5 & ( ~ (v5 = 0) | v6 = 0))))
% 40.39/12.06 | (94) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ( ~ (sdtasdt0(v3, v2) = v4) | ~ (sdtasdt0(v0, v1) = v3) | ? [v5] : ? [v6] : ? [v7] : ? [v8] : ? [v9] : (sdtasdt0(v1, v2) = v8 & sdtasdt0(v0, v8) = v9 & aElement0(v2) = v7 & aElement0(v1) = v6 & aElement0(v0) = v5 & ( ~ (v7 = 0) | ~ (v6 = 0) | ~ (v5 = 0) | v9 = v4)))
% 40.39/12.06 | (95) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (sdtasdt0(v3, v2) = v1) | ~ (sdtasdt0(v3, v2) = v0))
% 40.39/12.06 | (96) ! [v0] : ! [v1] : ! [v2] : ! [v3] : ! [v4] : ! [v5] : ( ~ (sdtasdt0(v0, v2) = v4) | ~ (sdtasdt0(v0, v1) = v3) | ~ (sdtpldt0(v3, v4) = v5) | ? [v6] : ? [v7] : ? [v8] : ? [v9] : ? [v10] : ? [v11] : ? [v12] : ? [v13] : ? [v14] : (sdtasdt0(v9, v0) = v11 & sdtasdt0(v2, v0) = v13 & sdtasdt0(v1, v0) = v12 & sdtasdt0(v0, v9) = v10 & sdtpldt0(v12, v13) = v14 & sdtpldt0(v1, v2) = v9 & aElement0(v2) = v8 & aElement0(v1) = v7 & aElement0(v0) = v6 & ( ~ (v8 = 0) | ~ (v7 = 0) | ~ (v6 = 0) | (v14 = v11 & v10 = v5))))
% 40.39/12.06 | (97) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (sdtpldt0(v3, v2) = v1) | ~ (sdtpldt0(v3, v2) = v0))
% 40.39/12.06 | (98) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v1 = v0 | ~ (sdtasasdt0(v3, v2) = v1) | ~ (sdtasasdt0(v3, v2) = v0))
% 40.39/12.06 | (99) ! [v0] : ! [v1] : ! [v2] : ! [v3] : (v3 = 0 | ~ (sdtasasdt0(v0, v1) = v2) | ~ (aSet0(v2) = v3) | ? [v4] : ? [v5] : (aSet0(v1) = v5 & aSet0(v0) = v4 & ( ~ (v5 = 0) | ~ (v4 = 0))))
% 40.39/12.06 | (100) ~ (xb = sz00) | ~ (xa = sz00)
% 40.39/12.06 |
% 40.39/12.06 | Instantiating formula (51) with all_0_9_9, xb and discharging atoms slsdtgt0(xb) = all_0_9_9, yields:
% 40.39/12.06 | (101) ? [v0] : ? [v1] : (aIdeal0(all_0_9_9) = v1 & aElement0(xb) = v0 & ( ~ (v0 = 0) | v1 = 0))
% 40.39/12.06 |
% 40.39/12.06 | Instantiating formula (51) with all_0_10_10, xa and discharging atoms slsdtgt0(xa) = all_0_10_10, yields:
% 40.39/12.06 | (102) ? [v0] : ? [v1] : (aIdeal0(all_0_10_10) = v1 & aElement0(xa) = v0 & ( ~ (v0 = 0) | v1 = 0))
% 40.39/12.06 |
% 40.39/12.06 | Instantiating formula (48) with xa, xu and discharging atoms doDivides0(xu, xa) = 0, yields:
% 40.39/12.06 | (103) ? [v0] : ? [v1] : ? [v2] : ((v2 = xa & v1 = 0 & sdtasdt0(xu, v0) = xa & aElement0(v0) = 0) | (aElement0(xu) = v0 & aElement0(xa) = v1 & ( ~ (v1 = 0) | ~ (v0 = 0))))
% 40.39/12.06 |
% 40.39/12.06 | Instantiating formula (18) with all_0_8_8, xu and discharging atoms sbrdtbr0(xu) = all_0_8_8, yields:
% 40.39/12.06 | (104) xu = sz00 | ? [v0] : ? [v1] : (aNaturalNumber0(all_0_8_8) = v1 & aElement0(xu) = v0 & ( ~ (v0 = 0) | v1 = 0))
% 40.39/12.06 |
% 40.39/12.06 | Instantiating formula (25) with xu and discharging atoms aElementOf0(xu, xI) = 0, yields:
% 40.39/12.06 | (105) xu = sz00 | ? [v0] : ? [v1] : ( ~ (v1 = 0) & iLess0(v0, all_0_8_8) = v1 & sbrdtbr0(xu) = v0)
% 40.39/12.07 |
% 40.39/12.07 | Instantiating formula (66) with all_0_1_1, all_0_3_3, xb and discharging atoms sdtasdt0(xb, all_0_3_3) = all_0_1_1, yields:
% 40.39/12.07 | (106) ? [v0] : ? [v1] : ? [v2] : (sdtasdt0(all_0_3_3, xb) = v2 & aElement0(all_0_3_3) = v1 & aElement0(xb) = v0 & ( ~ (v1 = 0) | ~ (v0 = 0) | v2 = all_0_1_1))
% 40.39/12.07 |
% 40.39/12.07 | Instantiating formula (12) with all_0_1_1, all_0_3_3, xb and discharging atoms sdtasdt0(xb, all_0_3_3) = all_0_1_1, yields:
% 40.39/12.07 | (107) ? [v0] : ? [v1] : ? [v2] : (aElement0(all_0_1_1) = v2 & aElement0(all_0_3_3) = v1 & aElement0(xb) = v0 & ( ~ (v1 = 0) | ~ (v0 = 0) | v2 = 0))
% 40.39/12.07 |
% 40.39/12.07 | Instantiating formula (66) with all_0_2_2, all_0_4_4, xa and discharging atoms sdtasdt0(xa, all_0_4_4) = all_0_2_2, yields:
% 40.39/12.07 | (108) ? [v0] : ? [v1] : ? [v2] : (sdtasdt0(all_0_4_4, xa) = v2 & aElement0(all_0_4_4) = v1 & aElement0(xa) = v0 & ( ~ (v1 = 0) | ~ (v0 = 0) | v2 = all_0_2_2))
% 40.39/12.07 |
% 40.39/12.07 | Instantiating formula (12) with all_0_2_2, all_0_4_4, xa and discharging atoms sdtasdt0(xa, all_0_4_4) = all_0_2_2, yields:
% 40.39/12.07 | (109) ? [v0] : ? [v1] : ? [v2] : (aElement0(all_0_2_2) = v2 & aElement0(all_0_4_4) = v1 & aElement0(xa) = v0 & ( ~ (v1 = 0) | ~ (v0 = 0) | v2 = 0))
% 40.39/12.07 |
% 40.39/12.07 | Instantiating formula (27) with xu, all_0_1_1, all_0_2_2 and discharging atoms sdtpldt0(all_0_2_2, all_0_1_1) = xu, yields:
% 40.39/12.07 | (110) ? [v0] : ? [v1] : ? [v2] : (sdtpldt0(all_0_1_1, all_0_2_2) = v2 & aElement0(all_0_1_1) = v1 & aElement0(all_0_2_2) = v0 & ( ~ (v1 = 0) | ~ (v0 = 0) | v2 = xu))
% 40.39/12.07 |
% 40.39/12.07 | Instantiating formula (53) with xu, all_0_1_1, all_0_2_2 and discharging atoms sdtpldt0(all_0_2_2, all_0_1_1) = xu, yields:
% 40.39/12.07 | (111) ? [v0] : ? [v1] : ? [v2] : (aElement0(all_0_1_1) = v1 & aElement0(all_0_2_2) = v0 & aElement0(xu) = v2 & ( ~ (v1 = 0) | ~ (v0 = 0) | v2 = 0))
% 40.39/12.07 |
% 40.39/12.07 | Instantiating formula (65) with all_0_11_11, sz10 and discharging atoms smndt0(sz10) = all_0_11_11, yields:
% 40.39/12.07 | (112) ? [v0] : ? [v1] : (aElement0(all_0_11_11) = v1 & aElement0(sz10) = v0 & ( ~ (v0 = 0) | v1 = 0))
% 40.39/12.07 |
% 40.39/12.07 | Instantiating formula (60) with all_0_8_8, xu, all_0_3_3 and discharging atoms sbrdtbr0(xu) = all_0_8_8, aElement0(all_0_3_3) = 0, yields:
% 40.39/12.07 | (113) xu = sz00 | ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = all_0_3_3 & v3 = 0 & v2 = 0 & iLess0(v6, all_0_8_8) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, xu) = v4 & sdtpldt0(v4, v1) = all_0_3_3 & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(xu) = v0))
% 40.39/12.07 |
% 40.39/12.07 | Instantiating formula (68) with all_0_5_5, xu, xb and discharging atoms doDivides0(xu, xb) = all_0_5_5, aElement0(xb) = 0, yields:
% 40.39/12.07 | (114) ? [v0] : ? [v1] : (aDivisorOf0(xu, xb) = v0 & aElement0(xu) = v1 & ( ~ (v0 = 0) | (v1 = 0 & all_0_5_5 = 0)))
% 40.39/12.07 |
% 40.39/12.07 | Instantiating formula (78) with xu, xa and discharging atoms doDivides0(xu, xa) = 0, aElement0(xa) = 0, yields:
% 40.39/12.07 | (115) ? [v0] : ? [v1] : (aDivisorOf0(xu, xa) = v1 & aElement0(xu) = v0 & ( ~ (v0 = 0) | v1 = 0))
% 40.39/12.07 |
% 40.39/12.07 | Instantiating formula (68) with 0, xu, xa and discharging atoms doDivides0(xu, xa) = 0, aElement0(xa) = 0, yields:
% 40.39/12.07 | (116) ? [v0] : ? [v1] : (aDivisorOf0(xu, xa) = v0 & aElement0(xu) = v1 & ( ~ (v0 = 0) | v1 = 0))
% 40.39/12.07 |
% 40.39/12.07 | Instantiating formula (60) with all_0_8_8, xu, all_0_4_4 and discharging atoms sbrdtbr0(xu) = all_0_8_8, aElement0(all_0_4_4) = 0, yields:
% 40.39/12.07 | (117) xu = sz00 | ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = all_0_4_4 & v3 = 0 & v2 = 0 & iLess0(v6, all_0_8_8) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, xu) = v4 & sdtpldt0(v4, v1) = all_0_4_4 & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(xu) = v0))
% 40.39/12.07 |
% 40.39/12.07 | Instantiating formula (60) with all_0_8_8, xu, xb and discharging atoms sbrdtbr0(xu) = all_0_8_8, aElement0(xb) = 0, yields:
% 40.39/12.07 | (118) xu = sz00 | ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = xb & v3 = 0 & v2 = 0 & iLess0(v6, all_0_8_8) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, xu) = v4 & sdtpldt0(v4, v1) = xb & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(xu) = v0))
% 40.39/12.07 |
% 40.39/12.07 | Instantiating formula (60) with all_0_8_8, xu, xa and discharging atoms sbrdtbr0(xu) = all_0_8_8, aElement0(xa) = 0, yields:
% 40.39/12.07 | (119) xu = sz00 | ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = xa & v3 = 0 & v2 = 0 & iLess0(v6, all_0_8_8) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, xu) = v4 & sdtpldt0(v4, v1) = xa & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(xu) = v0))
% 40.39/12.07 |
% 40.39/12.07 | Instantiating formula (60) with all_0_8_8, xu, sz10 and discharging atoms sbrdtbr0(xu) = all_0_8_8, aElement0(sz10) = 0, yields:
% 40.39/12.07 | (120) xu = sz00 | ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = sz10 & v3 = 0 & v2 = 0 & iLess0(v6, all_0_8_8) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, xu) = v4 & sdtpldt0(v4, v1) = sz10 & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(xu) = v0))
% 40.39/12.07 |
% 40.39/12.07 | Instantiating formula (60) with all_0_8_8, xu, sz00 and discharging atoms sbrdtbr0(xu) = all_0_8_8, aElement0(sz00) = 0, yields:
% 40.39/12.07 | (121) xu = sz00 | ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = sz00 & v3 = 0 & v2 = 0 & iLess0(v6, all_0_8_8) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, xu) = v4 & sdtpldt0(v4, v1) = sz00 & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(xu) = v0))
% 40.39/12.08 |
% 40.39/12.08 | Instantiating (107) with all_9_0_12, all_9_1_13, all_9_2_14 yields:
% 40.39/12.08 | (122) aElement0(all_0_1_1) = all_9_0_12 & aElement0(all_0_3_3) = all_9_1_13 & aElement0(xb) = all_9_2_14 & ( ~ (all_9_1_13 = 0) | ~ (all_9_2_14 = 0) | all_9_0_12 = 0)
% 40.39/12.08 |
% 40.39/12.08 | Applying alpha-rule on (122) yields:
% 40.39/12.08 | (123) aElement0(all_0_1_1) = all_9_0_12
% 40.39/12.08 | (124) aElement0(all_0_3_3) = all_9_1_13
% 40.39/12.08 | (125) aElement0(xb) = all_9_2_14
% 40.39/12.08 | (126) ~ (all_9_1_13 = 0) | ~ (all_9_2_14 = 0) | all_9_0_12 = 0
% 40.39/12.08 |
% 40.39/12.08 | Instantiating (116) with all_31_0_95, all_31_1_96 yields:
% 40.39/12.08 | (127) aDivisorOf0(xu, xa) = all_31_1_96 & aElement0(xu) = all_31_0_95 & ( ~ (all_31_1_96 = 0) | all_31_0_95 = 0)
% 40.39/12.08 |
% 40.39/12.08 | Applying alpha-rule on (127) yields:
% 40.39/12.08 | (128) aDivisorOf0(xu, xa) = all_31_1_96
% 40.39/12.08 | (129) aElement0(xu) = all_31_0_95
% 40.39/12.08 | (130) ~ (all_31_1_96 = 0) | all_31_0_95 = 0
% 40.39/12.08 |
% 40.39/12.08 | Instantiating (106) with all_35_0_105, all_35_1_106, all_35_2_107 yields:
% 40.39/12.08 | (131) sdtasdt0(all_0_3_3, xb) = all_35_0_105 & aElement0(all_0_3_3) = all_35_1_106 & aElement0(xb) = all_35_2_107 & ( ~ (all_35_1_106 = 0) | ~ (all_35_2_107 = 0) | all_35_0_105 = all_0_1_1)
% 40.39/12.08 |
% 40.39/12.08 | Applying alpha-rule on (131) yields:
% 40.39/12.08 | (132) sdtasdt0(all_0_3_3, xb) = all_35_0_105
% 40.39/12.08 | (133) aElement0(all_0_3_3) = all_35_1_106
% 40.39/12.08 | (134) aElement0(xb) = all_35_2_107
% 40.39/12.08 | (135) ~ (all_35_1_106 = 0) | ~ (all_35_2_107 = 0) | all_35_0_105 = all_0_1_1
% 40.39/12.08 |
% 40.39/12.08 | Instantiating (103) with all_47_0_143, all_47_1_144, all_47_2_145 yields:
% 40.39/12.08 | (136) (all_47_0_143 = xa & all_47_1_144 = 0 & sdtasdt0(xu, all_47_2_145) = xa & aElement0(all_47_2_145) = 0) | (aElement0(xu) = all_47_2_145 & aElement0(xa) = all_47_1_144 & ( ~ (all_47_1_144 = 0) | ~ (all_47_2_145 = 0)))
% 40.39/12.08 |
% 40.39/12.08 | Instantiating (102) with all_50_0_154, all_50_1_155 yields:
% 40.39/12.08 | (137) aIdeal0(all_0_10_10) = all_50_0_154 & aElement0(xa) = all_50_1_155 & ( ~ (all_50_1_155 = 0) | all_50_0_154 = 0)
% 40.39/12.08 |
% 40.39/12.08 | Applying alpha-rule on (137) yields:
% 40.39/12.08 | (138) aIdeal0(all_0_10_10) = all_50_0_154
% 40.39/12.08 | (139) aElement0(xa) = all_50_1_155
% 40.39/12.08 | (140) ~ (all_50_1_155 = 0) | all_50_0_154 = 0
% 40.39/12.08 |
% 40.39/12.08 | Instantiating (115) with all_52_0_156, all_52_1_157 yields:
% 40.39/12.08 | (141) aDivisorOf0(xu, xa) = all_52_0_156 & aElement0(xu) = all_52_1_157 & ( ~ (all_52_1_157 = 0) | all_52_0_156 = 0)
% 40.39/12.08 |
% 40.39/12.08 | Applying alpha-rule on (141) yields:
% 40.39/12.08 | (142) aDivisorOf0(xu, xa) = all_52_0_156
% 40.39/12.08 | (143) aElement0(xu) = all_52_1_157
% 40.39/12.08 | (144) ~ (all_52_1_157 = 0) | all_52_0_156 = 0
% 40.39/12.08 |
% 40.39/12.08 | Instantiating (114) with all_56_0_166, all_56_1_167 yields:
% 40.39/12.08 | (145) aDivisorOf0(xu, xb) = all_56_1_167 & aElement0(xu) = all_56_0_166 & ( ~ (all_56_1_167 = 0) | (all_56_0_166 = 0 & all_0_5_5 = 0))
% 40.39/12.08 |
% 40.39/12.08 | Applying alpha-rule on (145) yields:
% 40.39/12.08 | (146) aDivisorOf0(xu, xb) = all_56_1_167
% 40.39/12.08 | (147) aElement0(xu) = all_56_0_166
% 40.39/12.08 | (148) ~ (all_56_1_167 = 0) | (all_56_0_166 = 0 & all_0_5_5 = 0)
% 40.39/12.08 |
% 40.39/12.08 | Instantiating (112) with all_58_0_168, all_58_1_169 yields:
% 40.39/12.08 | (149) aElement0(all_0_11_11) = all_58_0_168 & aElement0(sz10) = all_58_1_169 & ( ~ (all_58_1_169 = 0) | all_58_0_168 = 0)
% 40.39/12.08 |
% 40.39/12.08 | Applying alpha-rule on (149) yields:
% 40.39/12.08 | (150) aElement0(all_0_11_11) = all_58_0_168
% 40.39/12.08 | (151) aElement0(sz10) = all_58_1_169
% 40.39/12.08 | (152) ~ (all_58_1_169 = 0) | all_58_0_168 = 0
% 40.39/12.08 |
% 40.39/12.08 | Instantiating (101) with all_60_0_170, all_60_1_171 yields:
% 40.39/12.08 | (153) aIdeal0(all_0_9_9) = all_60_0_170 & aElement0(xb) = all_60_1_171 & ( ~ (all_60_1_171 = 0) | all_60_0_170 = 0)
% 40.39/12.08 |
% 40.39/12.08 | Applying alpha-rule on (153) yields:
% 40.39/12.08 | (154) aIdeal0(all_0_9_9) = all_60_0_170
% 40.39/12.08 | (155) aElement0(xb) = all_60_1_171
% 40.39/12.08 | (156) ~ (all_60_1_171 = 0) | all_60_0_170 = 0
% 40.39/12.08 |
% 40.39/12.08 | Instantiating (111) with all_62_0_172, all_62_1_173, all_62_2_174 yields:
% 40.39/12.08 | (157) aElement0(all_0_1_1) = all_62_1_173 & aElement0(all_0_2_2) = all_62_2_174 & aElement0(xu) = all_62_0_172 & ( ~ (all_62_1_173 = 0) | ~ (all_62_2_174 = 0) | all_62_0_172 = 0)
% 40.39/12.08 |
% 40.39/12.08 | Applying alpha-rule on (157) yields:
% 40.39/12.08 | (158) aElement0(all_0_1_1) = all_62_1_173
% 40.39/12.08 | (159) aElement0(all_0_2_2) = all_62_2_174
% 40.39/12.08 | (160) aElement0(xu) = all_62_0_172
% 40.39/12.08 | (161) ~ (all_62_1_173 = 0) | ~ (all_62_2_174 = 0) | all_62_0_172 = 0
% 40.39/12.08 |
% 40.39/12.08 | Instantiating (110) with all_64_0_175, all_64_1_176, all_64_2_177 yields:
% 40.39/12.08 | (162) sdtpldt0(all_0_1_1, all_0_2_2) = all_64_0_175 & aElement0(all_0_1_1) = all_64_1_176 & aElement0(all_0_2_2) = all_64_2_177 & ( ~ (all_64_1_176 = 0) | ~ (all_64_2_177 = 0) | all_64_0_175 = xu)
% 40.39/12.08 |
% 40.39/12.08 | Applying alpha-rule on (162) yields:
% 40.39/12.08 | (163) sdtpldt0(all_0_1_1, all_0_2_2) = all_64_0_175
% 40.39/12.08 | (164) aElement0(all_0_1_1) = all_64_1_176
% 40.39/12.08 | (165) aElement0(all_0_2_2) = all_64_2_177
% 40.39/12.08 | (166) ~ (all_64_1_176 = 0) | ~ (all_64_2_177 = 0) | all_64_0_175 = xu
% 40.39/12.08 |
% 40.39/12.08 | Instantiating (109) with all_68_0_186, all_68_1_187, all_68_2_188 yields:
% 40.39/12.08 | (167) aElement0(all_0_2_2) = all_68_0_186 & aElement0(all_0_4_4) = all_68_1_187 & aElement0(xa) = all_68_2_188 & ( ~ (all_68_1_187 = 0) | ~ (all_68_2_188 = 0) | all_68_0_186 = 0)
% 40.39/12.08 |
% 40.39/12.08 | Applying alpha-rule on (167) yields:
% 40.39/12.08 | (168) aElement0(all_0_2_2) = all_68_0_186
% 40.39/12.08 | (169) aElement0(all_0_4_4) = all_68_1_187
% 40.39/12.08 | (170) aElement0(xa) = all_68_2_188
% 40.39/12.08 | (171) ~ (all_68_1_187 = 0) | ~ (all_68_2_188 = 0) | all_68_0_186 = 0
% 40.39/12.08 |
% 40.39/12.08 | Instantiating (108) with all_70_0_189, all_70_1_190, all_70_2_191 yields:
% 40.39/12.08 | (172) sdtasdt0(all_0_4_4, xa) = all_70_0_189 & aElement0(all_0_4_4) = all_70_1_190 & aElement0(xa) = all_70_2_191 & ( ~ (all_70_1_190 = 0) | ~ (all_70_2_191 = 0) | all_70_0_189 = all_0_2_2)
% 40.39/12.08 |
% 40.39/12.08 | Applying alpha-rule on (172) yields:
% 40.39/12.08 | (173) sdtasdt0(all_0_4_4, xa) = all_70_0_189
% 40.39/12.08 | (174) aElement0(all_0_4_4) = all_70_1_190
% 40.39/12.08 | (175) aElement0(xa) = all_70_2_191
% 40.39/12.08 | (176) ~ (all_70_1_190 = 0) | ~ (all_70_2_191 = 0) | all_70_0_189 = all_0_2_2
% 40.39/12.08 |
% 40.39/12.08 +-Applying beta-rule and splitting (120), into two cases.
% 40.39/12.08 |-Branch one:
% 40.39/12.08 | (177) xu = sz00
% 40.39/12.08 |
% 40.39/12.08 | Equations (177) can reduce 59 to:
% 40.39/12.08 | (178) $false
% 40.39/12.08 |
% 40.39/12.08 |-The branch is then unsatisfiable
% 40.39/12.08 |-Branch two:
% 40.39/12.08 | (59) ~ (xu = sz00)
% 40.39/12.08 | (180) ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = sz10 & v3 = 0 & v2 = 0 & iLess0(v6, all_0_8_8) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, xu) = v4 & sdtpldt0(v4, v1) = sz10 & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(xu) = v0))
% 40.39/12.09 |
% 40.39/12.09 | Instantiating (180) with all_80_0_192, all_80_1_193, all_80_2_194, all_80_3_195, all_80_4_196, all_80_5_197, all_80_6_198, all_80_7_199 yields:
% 40.39/12.09 | (181) (all_80_2_194 = sz10 & all_80_4_196 = 0 & all_80_5_197 = 0 & iLess0(all_80_1_193, all_0_8_8) = all_80_0_192 & sbrdtbr0(all_80_6_198) = all_80_1_193 & sdtasdt0(all_80_7_199, xu) = all_80_3_195 & sdtpldt0(all_80_3_195, all_80_6_198) = sz10 & aElement0(all_80_6_198) = 0 & aElement0(all_80_7_199) = 0 & (all_80_0_192 = 0 | all_80_6_198 = sz00)) | ( ~ (all_80_7_199 = 0) & aElement0(xu) = all_80_7_199)
% 40.39/12.09 |
% 40.39/12.09 +-Applying beta-rule and splitting (105), into two cases.
% 40.39/12.09 |-Branch one:
% 40.39/12.09 | (177) xu = sz00
% 40.39/12.09 |
% 40.39/12.09 | Equations (177) can reduce 59 to:
% 40.39/12.09 | (178) $false
% 40.39/12.09 |
% 40.39/12.09 |-The branch is then unsatisfiable
% 40.39/12.09 |-Branch two:
% 40.39/12.09 | (59) ~ (xu = sz00)
% 40.39/12.09 | (185) ? [v0] : ? [v1] : ( ~ (v1 = 0) & iLess0(v0, all_0_8_8) = v1 & sbrdtbr0(xu) = v0)
% 40.39/12.09 |
% 40.39/12.09 +-Applying beta-rule and splitting (113), into two cases.
% 40.39/12.09 |-Branch one:
% 40.39/12.09 | (177) xu = sz00
% 40.39/12.09 |
% 40.39/12.09 | Equations (177) can reduce 59 to:
% 40.39/12.09 | (178) $false
% 40.39/12.09 |
% 40.39/12.09 |-The branch is then unsatisfiable
% 40.39/12.09 |-Branch two:
% 40.39/12.09 | (59) ~ (xu = sz00)
% 40.39/12.09 | (189) ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = all_0_3_3 & v3 = 0 & v2 = 0 & iLess0(v6, all_0_8_8) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, xu) = v4 & sdtpldt0(v4, v1) = all_0_3_3 & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(xu) = v0))
% 40.39/12.09 |
% 40.39/12.09 | Instantiating (189) with all_89_0_202, all_89_1_203, all_89_2_204, all_89_3_205, all_89_4_206, all_89_5_207, all_89_6_208, all_89_7_209 yields:
% 40.39/12.09 | (190) (all_89_2_204 = all_0_3_3 & all_89_4_206 = 0 & all_89_5_207 = 0 & iLess0(all_89_1_203, all_0_8_8) = all_89_0_202 & sbrdtbr0(all_89_6_208) = all_89_1_203 & sdtasdt0(all_89_7_209, xu) = all_89_3_205 & sdtpldt0(all_89_3_205, all_89_6_208) = all_0_3_3 & aElement0(all_89_6_208) = 0 & aElement0(all_89_7_209) = 0 & (all_89_0_202 = 0 | all_89_6_208 = sz00)) | ( ~ (all_89_7_209 = 0) & aElement0(xu) = all_89_7_209)
% 40.39/12.09 |
% 40.39/12.09 +-Applying beta-rule and splitting (121), into two cases.
% 40.39/12.09 |-Branch one:
% 40.39/12.09 | (177) xu = sz00
% 40.39/12.09 |
% 40.39/12.09 | Equations (177) can reduce 59 to:
% 40.39/12.09 | (178) $false
% 40.39/12.09 |
% 40.39/12.09 |-The branch is then unsatisfiable
% 40.39/12.09 |-Branch two:
% 40.39/12.09 | (59) ~ (xu = sz00)
% 40.39/12.09 | (194) ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = sz00 & v3 = 0 & v2 = 0 & iLess0(v6, all_0_8_8) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, xu) = v4 & sdtpldt0(v4, v1) = sz00 & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(xu) = v0))
% 40.39/12.09 |
% 40.39/12.09 +-Applying beta-rule and splitting (118), into two cases.
% 40.39/12.09 |-Branch one:
% 40.39/12.09 | (177) xu = sz00
% 40.39/12.09 |
% 40.39/12.09 | Equations (177) can reduce 59 to:
% 40.39/12.09 | (178) $false
% 40.39/12.09 |
% 40.39/12.09 |-The branch is then unsatisfiable
% 40.39/12.09 |-Branch two:
% 40.39/12.09 | (59) ~ (xu = sz00)
% 40.39/12.09 | (198) ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = xb & v3 = 0 & v2 = 0 & iLess0(v6, all_0_8_8) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, xu) = v4 & sdtpldt0(v4, v1) = xb & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(xu) = v0))
% 40.39/12.09 |
% 40.39/12.09 | Instantiating (198) with all_97_0_218, all_97_1_219, all_97_2_220, all_97_3_221, all_97_4_222, all_97_5_223, all_97_6_224, all_97_7_225 yields:
% 40.39/12.09 | (199) (all_97_2_220 = xb & all_97_4_222 = 0 & all_97_5_223 = 0 & iLess0(all_97_1_219, all_0_8_8) = all_97_0_218 & sbrdtbr0(all_97_6_224) = all_97_1_219 & sdtasdt0(all_97_7_225, xu) = all_97_3_221 & sdtpldt0(all_97_3_221, all_97_6_224) = xb & aElement0(all_97_6_224) = 0 & aElement0(all_97_7_225) = 0 & (all_97_0_218 = 0 | all_97_6_224 = sz00)) | ( ~ (all_97_7_225 = 0) & aElement0(xu) = all_97_7_225)
% 40.39/12.09 |
% 40.39/12.09 +-Applying beta-rule and splitting (104), into two cases.
% 40.39/12.09 |-Branch one:
% 40.39/12.09 | (177) xu = sz00
% 40.39/12.09 |
% 40.39/12.09 | Equations (177) can reduce 59 to:
% 40.39/12.09 | (178) $false
% 40.39/12.09 |
% 40.39/12.09 |-The branch is then unsatisfiable
% 40.39/12.09 |-Branch two:
% 40.39/12.09 | (59) ~ (xu = sz00)
% 40.39/12.09 | (203) ? [v0] : ? [v1] : (aNaturalNumber0(all_0_8_8) = v1 & aElement0(xu) = v0 & ( ~ (v0 = 0) | v1 = 0))
% 40.39/12.09 |
% 40.39/12.09 | Instantiating (203) with all_101_0_226, all_101_1_227 yields:
% 40.39/12.09 | (204) aNaturalNumber0(all_0_8_8) = all_101_0_226 & aElement0(xu) = all_101_1_227 & ( ~ (all_101_1_227 = 0) | all_101_0_226 = 0)
% 40.39/12.09 |
% 40.39/12.09 | Applying alpha-rule on (204) yields:
% 40.39/12.09 | (205) aNaturalNumber0(all_0_8_8) = all_101_0_226
% 40.39/12.09 | (206) aElement0(xu) = all_101_1_227
% 40.39/12.09 | (207) ~ (all_101_1_227 = 0) | all_101_0_226 = 0
% 40.39/12.09 |
% 40.39/12.09 +-Applying beta-rule and splitting (119), into two cases.
% 40.39/12.09 |-Branch one:
% 40.39/12.09 | (177) xu = sz00
% 40.39/12.09 |
% 40.39/12.09 | Equations (177) can reduce 59 to:
% 40.39/12.09 | (178) $false
% 40.39/12.09 |
% 40.39/12.09 |-The branch is then unsatisfiable
% 40.39/12.09 |-Branch two:
% 40.39/12.09 | (59) ~ (xu = sz00)
% 40.39/12.09 | (211) ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = xa & v3 = 0 & v2 = 0 & iLess0(v6, all_0_8_8) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, xu) = v4 & sdtpldt0(v4, v1) = xa & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(xu) = v0))
% 40.39/12.09 |
% 40.39/12.09 | Instantiating (211) with all_106_0_228, all_106_1_229, all_106_2_230, all_106_3_231, all_106_4_232, all_106_5_233, all_106_6_234, all_106_7_235 yields:
% 40.39/12.09 | (212) (all_106_2_230 = xa & all_106_4_232 = 0 & all_106_5_233 = 0 & iLess0(all_106_1_229, all_0_8_8) = all_106_0_228 & sbrdtbr0(all_106_6_234) = all_106_1_229 & sdtasdt0(all_106_7_235, xu) = all_106_3_231 & sdtpldt0(all_106_3_231, all_106_6_234) = xa & aElement0(all_106_6_234) = 0 & aElement0(all_106_7_235) = 0 & (all_106_0_228 = 0 | all_106_6_234 = sz00)) | ( ~ (all_106_7_235 = 0) & aElement0(xu) = all_106_7_235)
% 40.39/12.09 |
% 40.39/12.09 +-Applying beta-rule and splitting (117), into two cases.
% 40.39/12.09 |-Branch one:
% 40.39/12.09 | (177) xu = sz00
% 40.39/12.09 |
% 40.39/12.09 | Equations (177) can reduce 59 to:
% 40.39/12.09 | (178) $false
% 40.39/12.09 |
% 40.39/12.09 |-The branch is then unsatisfiable
% 40.39/12.09 |-Branch two:
% 40.39/12.09 | (59) ~ (xu = sz00)
% 40.39/12.09 | (216) ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = all_0_4_4 & v3 = 0 & v2 = 0 & iLess0(v6, all_0_8_8) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, xu) = v4 & sdtpldt0(v4, v1) = all_0_4_4 & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(xu) = v0))
% 40.39/12.09 |
% 40.39/12.09 | Instantiating (216) with all_110_0_236, all_110_1_237, all_110_2_238, all_110_3_239, all_110_4_240, all_110_5_241, all_110_6_242, all_110_7_243 yields:
% 40.39/12.09 | (217) (all_110_2_238 = all_0_4_4 & all_110_4_240 = 0 & all_110_5_241 = 0 & iLess0(all_110_1_237, all_0_8_8) = all_110_0_236 & sbrdtbr0(all_110_6_242) = all_110_1_237 & sdtasdt0(all_110_7_243, xu) = all_110_3_239 & sdtpldt0(all_110_3_239, all_110_6_242) = all_0_4_4 & aElement0(all_110_6_242) = 0 & aElement0(all_110_7_243) = 0 & (all_110_0_236 = 0 | all_110_6_242 = sz00)) | ( ~ (all_110_7_243 = 0) & aElement0(xu) = all_110_7_243)
% 40.39/12.09 |
% 40.39/12.09 | Instantiating formula (55) with all_0_1_1, all_62_1_173, all_64_1_176 and discharging atoms aElement0(all_0_1_1) = all_64_1_176, aElement0(all_0_1_1) = all_62_1_173, yields:
% 40.39/12.09 | (218) all_64_1_176 = all_62_1_173
% 40.39/12.09 |
% 40.39/12.09 | Instantiating formula (55) with all_0_1_1, all_9_0_12, all_64_1_176 and discharging atoms aElement0(all_0_1_1) = all_64_1_176, aElement0(all_0_1_1) = all_9_0_12, yields:
% 40.39/12.09 | (219) all_64_1_176 = all_9_0_12
% 40.39/12.09 |
% 40.39/12.09 | Instantiating formula (55) with all_0_2_2, all_64_2_177, all_68_0_186 and discharging atoms aElement0(all_0_2_2) = all_68_0_186, aElement0(all_0_2_2) = all_64_2_177, yields:
% 40.39/12.09 | (220) all_68_0_186 = all_64_2_177
% 40.39/12.09 |
% 40.39/12.09 | Instantiating formula (55) with all_0_2_2, all_62_2_174, all_68_0_186 and discharging atoms aElement0(all_0_2_2) = all_68_0_186, aElement0(all_0_2_2) = all_62_2_174, yields:
% 40.39/12.09 | (221) all_68_0_186 = all_62_2_174
% 40.39/12.09 |
% 40.39/12.09 | Instantiating formula (55) with all_0_3_3, all_35_1_106, 0 and discharging atoms aElement0(all_0_3_3) = all_35_1_106, aElement0(all_0_3_3) = 0, yields:
% 40.39/12.09 | (222) all_35_1_106 = 0
% 40.39/12.09 |
% 40.39/12.09 | Instantiating formula (55) with all_0_3_3, all_9_1_13, all_35_1_106 and discharging atoms aElement0(all_0_3_3) = all_35_1_106, aElement0(all_0_3_3) = all_9_1_13, yields:
% 40.39/12.09 | (223) all_35_1_106 = all_9_1_13
% 40.39/12.09 |
% 40.39/12.09 | Instantiating formula (55) with all_0_4_4, all_70_1_190, 0 and discharging atoms aElement0(all_0_4_4) = all_70_1_190, aElement0(all_0_4_4) = 0, yields:
% 40.39/12.09 | (224) all_70_1_190 = 0
% 40.39/12.09 |
% 40.39/12.09 | Instantiating formula (55) with all_0_4_4, all_68_1_187, all_70_1_190 and discharging atoms aElement0(all_0_4_4) = all_70_1_190, aElement0(all_0_4_4) = all_68_1_187, yields:
% 40.39/12.09 | (225) all_70_1_190 = all_68_1_187
% 40.39/12.09 |
% 40.39/12.09 | Instantiating formula (55) with xu, all_62_0_172, all_101_1_227 and discharging atoms aElement0(xu) = all_101_1_227, aElement0(xu) = all_62_0_172, yields:
% 40.39/12.09 | (226) all_101_1_227 = all_62_0_172
% 40.39/12.09 |
% 40.39/12.09 | Instantiating formula (55) with xu, all_56_0_166, all_62_0_172 and discharging atoms aElement0(xu) = all_62_0_172, aElement0(xu) = all_56_0_166, yields:
% 40.39/12.09 | (227) all_62_0_172 = all_56_0_166
% 40.39/12.09 |
% 40.39/12.09 | Instantiating formula (55) with xu, all_52_1_157, all_101_1_227 and discharging atoms aElement0(xu) = all_101_1_227, aElement0(xu) = all_52_1_157, yields:
% 40.39/12.09 | (228) all_101_1_227 = all_52_1_157
% 40.39/12.09 |
% 40.39/12.09 | Instantiating formula (55) with xu, all_31_0_95, all_56_0_166 and discharging atoms aElement0(xu) = all_56_0_166, aElement0(xu) = all_31_0_95, yields:
% 40.39/12.09 | (229) all_56_0_166 = all_31_0_95
% 40.39/12.09 |
% 40.39/12.09 | Instantiating formula (55) with xb, all_60_1_171, 0 and discharging atoms aElement0(xb) = all_60_1_171, aElement0(xb) = 0, yields:
% 40.39/12.09 | (230) all_60_1_171 = 0
% 40.39/12.09 |
% 40.39/12.09 | Instantiating formula (55) with xb, all_35_2_107, all_60_1_171 and discharging atoms aElement0(xb) = all_60_1_171, aElement0(xb) = all_35_2_107, yields:
% 40.39/12.09 | (231) all_60_1_171 = all_35_2_107
% 40.39/12.09 |
% 40.39/12.09 | Instantiating formula (55) with xb, all_9_2_14, all_60_1_171 and discharging atoms aElement0(xb) = all_60_1_171, aElement0(xb) = all_9_2_14, yields:
% 40.39/12.09 | (232) all_60_1_171 = all_9_2_14
% 40.39/12.09 |
% 40.39/12.09 | Instantiating formula (55) with xa, all_68_2_188, 0 and discharging atoms aElement0(xa) = all_68_2_188, aElement0(xa) = 0, yields:
% 40.39/12.09 | (233) all_68_2_188 = 0
% 40.39/12.09 |
% 40.39/12.09 | Instantiating formula (55) with xa, all_68_2_188, all_70_2_191 and discharging atoms aElement0(xa) = all_70_2_191, aElement0(xa) = all_68_2_188, yields:
% 40.39/12.09 | (234) all_70_2_191 = all_68_2_188
% 40.39/12.09 |
% 40.39/12.09 | Instantiating formula (55) with xa, all_50_1_155, all_70_2_191 and discharging atoms aElement0(xa) = all_70_2_191, aElement0(xa) = all_50_1_155, yields:
% 40.39/12.09 | (235) all_70_2_191 = all_50_1_155
% 40.39/12.09 |
% 40.39/12.09 | Instantiating formula (55) with sz10, all_58_1_169, 0 and discharging atoms aElement0(sz10) = all_58_1_169, aElement0(sz10) = 0, yields:
% 40.39/12.09 | (236) all_58_1_169 = 0
% 40.39/12.09 |
% 40.39/12.09 | Combining equations (226,228) yields a new equation:
% 40.39/12.09 | (237) all_62_0_172 = all_52_1_157
% 40.39/12.09 |
% 40.39/12.09 | Simplifying 237 yields:
% 40.39/12.09 | (238) all_62_0_172 = all_52_1_157
% 40.39/12.09 |
% 40.39/12.09 | Combining equations (224,225) yields a new equation:
% 40.39/12.09 | (239) all_68_1_187 = 0
% 40.39/12.09 |
% 40.39/12.09 | Combining equations (234,235) yields a new equation:
% 40.39/12.09 | (240) all_68_2_188 = all_50_1_155
% 40.39/12.09 |
% 40.39/12.09 | Simplifying 240 yields:
% 40.39/12.09 | (241) all_68_2_188 = all_50_1_155
% 40.39/12.09 |
% 40.39/12.09 | Combining equations (221,220) yields a new equation:
% 40.39/12.09 | (242) all_64_2_177 = all_62_2_174
% 40.39/12.09 |
% 40.39/12.10 | Combining equations (241,233) yields a new equation:
% 40.39/12.10 | (243) all_50_1_155 = 0
% 40.39/12.10 |
% 40.39/12.10 | Simplifying 243 yields:
% 40.39/12.10 | (244) all_50_1_155 = 0
% 40.39/12.10 |
% 40.39/12.10 | Combining equations (218,219) yields a new equation:
% 40.39/12.10 | (245) all_62_1_173 = all_9_0_12
% 40.39/12.10 |
% 40.39/12.10 | Simplifying 245 yields:
% 40.39/12.10 | (246) all_62_1_173 = all_9_0_12
% 40.39/12.10 |
% 40.39/12.10 | Combining equations (227,238) yields a new equation:
% 40.39/12.10 | (247) all_56_0_166 = all_52_1_157
% 40.39/12.10 |
% 40.39/12.10 | Simplifying 247 yields:
% 40.39/12.10 | (248) all_56_0_166 = all_52_1_157
% 40.39/12.10 |
% 40.39/12.10 | Combining equations (230,231) yields a new equation:
% 40.39/12.10 | (249) all_35_2_107 = 0
% 40.39/12.10 |
% 40.39/12.10 | Combining equations (232,231) yields a new equation:
% 40.39/12.10 | (250) all_35_2_107 = all_9_2_14
% 40.39/12.10 |
% 40.39/12.10 | Combining equations (229,248) yields a new equation:
% 40.39/12.10 | (251) all_52_1_157 = all_31_0_95
% 40.39/12.10 |
% 40.39/12.10 | Combining equations (223,222) yields a new equation:
% 40.39/12.10 | (252) all_9_1_13 = 0
% 40.39/12.10 |
% 40.39/12.10 | Simplifying 252 yields:
% 40.39/12.10 | (253) all_9_1_13 = 0
% 40.39/12.10 |
% 40.39/12.10 | Combining equations (250,249) yields a new equation:
% 40.39/12.10 | (254) all_9_2_14 = 0
% 40.39/12.10 |
% 40.39/12.10 | Simplifying 254 yields:
% 40.39/12.10 | (255) all_9_2_14 = 0
% 40.39/12.10 |
% 40.39/12.10 | Combining equations (251,238) yields a new equation:
% 40.39/12.10 | (256) all_62_0_172 = all_31_0_95
% 40.39/12.10 |
% 40.39/12.10 | Combining equations (242,220) yields a new equation:
% 40.39/12.10 | (221) all_68_0_186 = all_62_2_174
% 40.39/12.10 |
% 40.39/12.10 | From (246) and (158) follows:
% 40.39/12.10 | (123) aElement0(all_0_1_1) = all_9_0_12
% 40.39/12.10 |
% 40.39/12.10 | From (242) and (165) follows:
% 40.39/12.10 | (159) aElement0(all_0_2_2) = all_62_2_174
% 40.39/12.10 |
% 40.39/12.10 | From (251) and (143) follows:
% 40.39/12.10 | (129) aElement0(xu) = all_31_0_95
% 40.39/12.10 |
% 40.39/12.10 | From (244) and (139) follows:
% 40.39/12.10 | (24) aElement0(xa) = 0
% 40.39/12.10 |
% 40.39/12.10 +-Applying beta-rule and splitting (171), into two cases.
% 40.39/12.10 |-Branch one:
% 40.39/12.10 | (262) ~ (all_68_1_187 = 0)
% 40.39/12.10 |
% 40.39/12.10 | Equations (239) can reduce 262 to:
% 40.39/12.10 | (178) $false
% 40.39/12.10 |
% 40.39/12.10 |-The branch is then unsatisfiable
% 40.39/12.10 |-Branch two:
% 40.39/12.10 | (239) all_68_1_187 = 0
% 40.39/12.10 | (265) ~ (all_68_2_188 = 0) | all_68_0_186 = 0
% 40.39/12.10 |
% 40.39/12.10 +-Applying beta-rule and splitting (265), into two cases.
% 40.39/12.10 |-Branch one:
% 40.39/12.10 | (266) ~ (all_68_2_188 = 0)
% 40.39/12.10 |
% 40.39/12.10 | Equations (233) can reduce 266 to:
% 40.39/12.10 | (178) $false
% 40.39/12.10 |
% 40.39/12.10 |-The branch is then unsatisfiable
% 40.39/12.10 |-Branch two:
% 40.39/12.10 | (233) all_68_2_188 = 0
% 40.39/12.10 | (269) all_68_0_186 = 0
% 40.39/12.10 |
% 40.39/12.10 | Combining equations (269,221) yields a new equation:
% 40.39/12.10 | (270) all_62_2_174 = 0
% 40.39/12.10 |
% 40.39/12.10 | From (270) and (159) follows:
% 40.39/12.10 | (271) aElement0(all_0_2_2) = 0
% 40.39/12.10 |
% 40.39/12.10 +-Applying beta-rule and splitting (126), into two cases.
% 40.39/12.10 |-Branch one:
% 40.39/12.10 | (272) ~ (all_9_1_13 = 0)
% 40.39/12.10 |
% 40.39/12.10 | Equations (253) can reduce 272 to:
% 40.39/12.10 | (178) $false
% 40.39/12.10 |
% 40.39/12.10 |-The branch is then unsatisfiable
% 40.39/12.10 |-Branch two:
% 40.39/12.10 | (253) all_9_1_13 = 0
% 40.39/12.10 | (275) ~ (all_9_2_14 = 0) | all_9_0_12 = 0
% 40.39/12.10 |
% 40.39/12.10 +-Applying beta-rule and splitting (152), into two cases.
% 40.39/12.10 |-Branch one:
% 40.39/12.10 | (276) ~ (all_58_1_169 = 0)
% 40.39/12.10 |
% 40.39/12.10 | Equations (236) can reduce 276 to:
% 40.39/12.10 | (178) $false
% 40.39/12.10 |
% 40.39/12.10 |-The branch is then unsatisfiable
% 40.39/12.10 |-Branch two:
% 40.39/12.10 | (236) all_58_1_169 = 0
% 40.39/12.10 | (279) all_58_0_168 = 0
% 40.39/12.10 |
% 40.39/12.10 | From (279) and (150) follows:
% 40.39/12.10 | (280) aElement0(all_0_11_11) = 0
% 40.39/12.10 |
% 40.39/12.10 +-Applying beta-rule and splitting (275), into two cases.
% 40.39/12.10 |-Branch one:
% 40.39/12.10 | (281) ~ (all_9_2_14 = 0)
% 40.39/12.10 |
% 40.39/12.10 | Equations (255) can reduce 281 to:
% 40.39/12.10 | (178) $false
% 40.39/12.10 |
% 40.39/12.10 |-The branch is then unsatisfiable
% 40.39/12.10 |-Branch two:
% 40.39/12.10 | (255) all_9_2_14 = 0
% 40.39/12.10 | (284) all_9_0_12 = 0
% 40.39/12.10 |
% 40.39/12.10 | Combining equations (284,246) yields a new equation:
% 40.39/12.10 | (285) all_62_1_173 = 0
% 40.39/12.10 |
% 40.39/12.10 | From (284) and (123) follows:
% 40.39/12.10 | (286) aElement0(all_0_1_1) = 0
% 40.39/12.10 |
% 40.39/12.10 +-Applying beta-rule and splitting (161), into two cases.
% 40.39/12.10 |-Branch one:
% 40.39/12.10 | (287) ~ (all_62_1_173 = 0)
% 40.39/12.10 |
% 40.39/12.10 | Equations (285) can reduce 287 to:
% 40.39/12.10 | (178) $false
% 40.39/12.10 |
% 40.39/12.10 |-The branch is then unsatisfiable
% 40.39/12.10 |-Branch two:
% 40.39/12.10 | (285) all_62_1_173 = 0
% 40.39/12.10 | (290) ~ (all_62_2_174 = 0) | all_62_0_172 = 0
% 40.39/12.10 |
% 40.39/12.10 +-Applying beta-rule and splitting (290), into two cases.
% 40.39/12.10 |-Branch one:
% 40.39/12.10 | (291) ~ (all_62_2_174 = 0)
% 40.39/12.10 |
% 40.39/12.10 | Equations (270) can reduce 291 to:
% 40.39/12.10 | (178) $false
% 40.39/12.10 |
% 40.39/12.10 |-The branch is then unsatisfiable
% 40.39/12.10 |-Branch two:
% 40.39/12.10 | (270) all_62_2_174 = 0
% 40.39/12.10 | (294) all_62_0_172 = 0
% 40.39/12.10 |
% 40.39/12.10 | Combining equations (256,294) yields a new equation:
% 40.39/12.10 | (295) all_31_0_95 = 0
% 40.39/12.10 |
% 40.39/12.10 | Simplifying 295 yields:
% 40.39/12.10 | (296) all_31_0_95 = 0
% 40.39/12.10 |
% 40.39/12.10 | From (296) and (129) follows:
% 40.39/12.10 | (297) aElement0(xu) = 0
% 40.39/12.10 |
% 40.39/12.10 +-Applying beta-rule and splitting (181), into two cases.
% 40.39/12.10 |-Branch one:
% 40.39/12.10 | (298) all_80_2_194 = sz10 & all_80_4_196 = 0 & all_80_5_197 = 0 & iLess0(all_80_1_193, all_0_8_8) = all_80_0_192 & sbrdtbr0(all_80_6_198) = all_80_1_193 & sdtasdt0(all_80_7_199, xu) = all_80_3_195 & sdtpldt0(all_80_3_195, all_80_6_198) = sz10 & aElement0(all_80_6_198) = 0 & aElement0(all_80_7_199) = 0 & (all_80_0_192 = 0 | all_80_6_198 = sz00)
% 40.39/12.10 |
% 40.39/12.10 | Applying alpha-rule on (298) yields:
% 40.39/12.10 | (299) aElement0(all_80_7_199) = 0
% 40.39/12.10 | (300) all_80_5_197 = 0
% 40.39/12.10 | (301) aElement0(all_80_6_198) = 0
% 40.39/12.10 | (302) all_80_4_196 = 0
% 40.39/12.10 | (303) all_80_2_194 = sz10
% 40.39/12.10 | (304) sdtasdt0(all_80_7_199, xu) = all_80_3_195
% 40.39/12.10 | (305) sdtpldt0(all_80_3_195, all_80_6_198) = sz10
% 40.39/12.10 | (306) sbrdtbr0(all_80_6_198) = all_80_1_193
% 40.39/12.10 | (307) iLess0(all_80_1_193, all_0_8_8) = all_80_0_192
% 40.39/12.10 | (308) all_80_0_192 = 0 | all_80_6_198 = sz00
% 40.39/12.10 |
% 40.39/12.10 +-Applying beta-rule and splitting (212), into two cases.
% 40.39/12.10 |-Branch one:
% 40.39/12.10 | (309) all_106_2_230 = xa & all_106_4_232 = 0 & all_106_5_233 = 0 & iLess0(all_106_1_229, all_0_8_8) = all_106_0_228 & sbrdtbr0(all_106_6_234) = all_106_1_229 & sdtasdt0(all_106_7_235, xu) = all_106_3_231 & sdtpldt0(all_106_3_231, all_106_6_234) = xa & aElement0(all_106_6_234) = 0 & aElement0(all_106_7_235) = 0 & (all_106_0_228 = 0 | all_106_6_234 = sz00)
% 40.39/12.10 |
% 40.39/12.10 | Applying alpha-rule on (309) yields:
% 40.39/12.10 | (310) aElement0(all_106_7_235) = 0
% 40.39/12.10 | (311) sdtpldt0(all_106_3_231, all_106_6_234) = xa
% 40.39/12.10 | (312) sbrdtbr0(all_106_6_234) = all_106_1_229
% 40.39/12.10 | (313) all_106_5_233 = 0
% 40.39/12.10 | (314) all_106_4_232 = 0
% 40.39/12.10 | (315) all_106_2_230 = xa
% 40.39/12.10 | (316) iLess0(all_106_1_229, all_0_8_8) = all_106_0_228
% 40.39/12.10 | (317) all_106_0_228 = 0 | all_106_6_234 = sz00
% 40.39/12.10 | (318) aElement0(all_106_6_234) = 0
% 40.39/12.10 | (319) sdtasdt0(all_106_7_235, xu) = all_106_3_231
% 40.39/12.10 |
% 40.39/12.10 +-Applying beta-rule and splitting (136), into two cases.
% 40.39/12.10 |-Branch one:
% 40.39/12.10 | (320) all_47_0_143 = xa & all_47_1_144 = 0 & sdtasdt0(xu, all_47_2_145) = xa & aElement0(all_47_2_145) = 0
% 40.39/12.10 |
% 40.39/12.10 | Applying alpha-rule on (320) yields:
% 40.39/12.10 | (321) all_47_0_143 = xa
% 40.39/12.10 | (322) all_47_1_144 = 0
% 40.39/12.10 | (323) sdtasdt0(xu, all_47_2_145) = xa
% 40.39/12.10 | (324) aElement0(all_47_2_145) = 0
% 40.39/12.10 |
% 40.39/12.10 +-Applying beta-rule and splitting (199), into two cases.
% 40.39/12.10 |-Branch one:
% 40.39/12.10 | (325) all_97_2_220 = xb & all_97_4_222 = 0 & all_97_5_223 = 0 & iLess0(all_97_1_219, all_0_8_8) = all_97_0_218 & sbrdtbr0(all_97_6_224) = all_97_1_219 & sdtasdt0(all_97_7_225, xu) = all_97_3_221 & sdtpldt0(all_97_3_221, all_97_6_224) = xb & aElement0(all_97_6_224) = 0 & aElement0(all_97_7_225) = 0 & (all_97_0_218 = 0 | all_97_6_224 = sz00)
% 40.39/12.10 |
% 40.39/12.10 | Applying alpha-rule on (325) yields:
% 40.39/12.10 | (326) iLess0(all_97_1_219, all_0_8_8) = all_97_0_218
% 40.39/12.10 | (327) aElement0(all_97_7_225) = 0
% 40.39/12.10 | (328) sdtpldt0(all_97_3_221, all_97_6_224) = xb
% 40.39/12.10 | (329) all_97_0_218 = 0 | all_97_6_224 = sz00
% 40.39/12.10 | (330) all_97_2_220 = xb
% 40.39/12.10 | (331) all_97_4_222 = 0
% 40.39/12.10 | (332) sdtasdt0(all_97_7_225, xu) = all_97_3_221
% 40.39/12.10 | (333) aElement0(all_97_6_224) = 0
% 40.39/12.10 | (334) sbrdtbr0(all_97_6_224) = all_97_1_219
% 40.39/12.10 | (335) all_97_5_223 = 0
% 40.39/12.10 |
% 40.39/12.10 +-Applying beta-rule and splitting (217), into two cases.
% 40.39/12.10 |-Branch one:
% 40.39/12.10 | (336) all_110_2_238 = all_0_4_4 & all_110_4_240 = 0 & all_110_5_241 = 0 & iLess0(all_110_1_237, all_0_8_8) = all_110_0_236 & sbrdtbr0(all_110_6_242) = all_110_1_237 & sdtasdt0(all_110_7_243, xu) = all_110_3_239 & sdtpldt0(all_110_3_239, all_110_6_242) = all_0_4_4 & aElement0(all_110_6_242) = 0 & aElement0(all_110_7_243) = 0 & (all_110_0_236 = 0 | all_110_6_242 = sz00)
% 40.39/12.10 |
% 40.39/12.10 | Applying alpha-rule on (336) yields:
% 40.39/12.10 | (337) iLess0(all_110_1_237, all_0_8_8) = all_110_0_236
% 40.39/12.10 | (338) all_110_4_240 = 0
% 40.39/12.10 | (339) all_110_5_241 = 0
% 40.39/12.10 | (340) all_110_2_238 = all_0_4_4
% 40.39/12.10 | (341) all_110_0_236 = 0 | all_110_6_242 = sz00
% 40.39/12.10 | (342) aElement0(all_110_6_242) = 0
% 40.39/12.10 | (343) sdtasdt0(all_110_7_243, xu) = all_110_3_239
% 40.39/12.10 | (344) sdtpldt0(all_110_3_239, all_110_6_242) = all_0_4_4
% 40.39/12.10 | (345) aElement0(all_110_7_243) = 0
% 40.39/12.10 | (346) sbrdtbr0(all_110_6_242) = all_110_1_237
% 40.39/12.10 |
% 40.39/12.10 +-Applying beta-rule and splitting (190), into two cases.
% 40.39/12.10 |-Branch one:
% 40.39/12.10 | (347) all_89_2_204 = all_0_3_3 & all_89_4_206 = 0 & all_89_5_207 = 0 & iLess0(all_89_1_203, all_0_8_8) = all_89_0_202 & sbrdtbr0(all_89_6_208) = all_89_1_203 & sdtasdt0(all_89_7_209, xu) = all_89_3_205 & sdtpldt0(all_89_3_205, all_89_6_208) = all_0_3_3 & aElement0(all_89_6_208) = 0 & aElement0(all_89_7_209) = 0 & (all_89_0_202 = 0 | all_89_6_208 = sz00)
% 40.39/12.10 |
% 40.39/12.10 | Applying alpha-rule on (347) yields:
% 40.39/12.10 | (348) aElement0(all_89_6_208) = 0
% 40.39/12.10 | (349) all_89_0_202 = 0 | all_89_6_208 = sz00
% 40.39/12.11 | (350) sdtpldt0(all_89_3_205, all_89_6_208) = all_0_3_3
% 40.39/12.11 | (351) iLess0(all_89_1_203, all_0_8_8) = all_89_0_202
% 40.39/12.11 | (352) sbrdtbr0(all_89_6_208) = all_89_1_203
% 40.39/12.11 | (353) sdtasdt0(all_89_7_209, xu) = all_89_3_205
% 40.39/12.11 | (354) all_89_2_204 = all_0_3_3
% 40.39/12.11 | (355) all_89_5_207 = 0
% 40.39/12.11 | (356) aElement0(all_89_7_209) = 0
% 40.39/12.11 | (357) all_89_4_206 = 0
% 40.39/12.11 |
% 40.39/12.11 | Instantiating formula (66) with all_97_3_221, xu, all_97_7_225 and discharging atoms sdtasdt0(all_97_7_225, xu) = all_97_3_221, yields:
% 40.39/12.11 | (358) ? [v0] : ? [v1] : ? [v2] : (sdtasdt0(xu, all_97_7_225) = v2 & aElement0(all_97_7_225) = v0 & aElement0(xu) = v1 & ( ~ (v1 = 0) | ~ (v0 = 0) | v2 = all_97_3_221))
% 40.39/12.11 |
% 40.39/12.11 | Instantiating formula (12) with all_97_3_221, xu, all_97_7_225 and discharging atoms sdtasdt0(all_97_7_225, xu) = all_97_3_221, yields:
% 40.39/12.11 | (359) ? [v0] : ? [v1] : ? [v2] : (aElement0(all_97_3_221) = v2 & aElement0(all_97_7_225) = v0 & aElement0(xu) = v1 & ( ~ (v1 = 0) | ~ (v0 = 0) | v2 = 0))
% 40.39/12.11 |
% 40.39/12.11 | Instantiating formula (84) with all_97_3_221, all_97_6_224, all_97_7_225 and discharging atoms sdtasdt0(all_97_7_225, xu) = all_97_3_221, sdtpldt0(all_97_3_221, all_97_6_224) = xb, yields:
% 40.39/12.11 | (360) ? [v0] : ? [v1] : ? [v2] : ? [v3] : (iLess0(v2, all_0_8_8) = v3 & sbrdtbr0(all_97_6_224) = v2 & aElement0(all_97_6_224) = v1 & aElement0(all_97_7_225) = v0 & ( ~ (v1 = 0) | ~ (v0 = 0) | ( ~ (v3 = 0) & ~ (all_97_6_224 = sz00))))
% 40.39/12.11 |
% 40.39/12.11 | Instantiating formula (27) with xb, all_97_6_224, all_97_3_221 and discharging atoms sdtpldt0(all_97_3_221, all_97_6_224) = xb, yields:
% 40.39/12.11 | (361) ? [v0] : ? [v1] : ? [v2] : (sdtpldt0(all_97_6_224, all_97_3_221) = v2 & aElement0(all_97_3_221) = v0 & aElement0(all_97_6_224) = v1 & ( ~ (v1 = 0) | ~ (v0 = 0) | v2 = xb))
% 40.39/12.11 |
% 40.39/12.11 | Instantiating formula (53) with xb, all_97_6_224, all_97_3_221 and discharging atoms sdtpldt0(all_97_3_221, all_97_6_224) = xb, yields:
% 40.39/12.11 | (362) ? [v0] : ? [v1] : ? [v2] : (aElement0(all_97_3_221) = v0 & aElement0(all_97_6_224) = v1 & aElement0(xb) = v2 & ( ~ (v1 = 0) | ~ (v0 = 0) | v2 = 0))
% 40.39/12.11 |
% 40.39/12.11 | Instantiating formula (60) with all_97_1_219, all_97_6_224, all_110_6_242 and discharging atoms sbrdtbr0(all_97_6_224) = all_97_1_219, aElement0(all_110_6_242) = 0, yields:
% 40.39/12.11 | (363) all_97_6_224 = sz00 | ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = all_110_6_242 & v3 = 0 & v2 = 0 & iLess0(v6, all_97_1_219) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, all_97_6_224) = v4 & sdtpldt0(v4, v1) = all_110_6_242 & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(all_97_6_224) = v0))
% 40.39/12.11 |
% 40.39/12.11 | Instantiating formula (60) with all_97_1_219, all_97_6_224, all_110_7_243 and discharging atoms sbrdtbr0(all_97_6_224) = all_97_1_219, aElement0(all_110_7_243) = 0, yields:
% 40.39/12.11 | (364) all_97_6_224 = sz00 | ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = all_110_7_243 & v3 = 0 & v2 = 0 & iLess0(v6, all_97_1_219) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, all_97_6_224) = v4 & sdtpldt0(v4, v1) = all_110_7_243 & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(all_97_6_224) = v0))
% 40.39/12.11 |
% 40.39/12.11 | Instantiating formula (60) with all_97_1_219, all_97_6_224, all_106_6_234 and discharging atoms sbrdtbr0(all_97_6_224) = all_97_1_219, aElement0(all_106_6_234) = 0, yields:
% 40.39/12.11 | (365) all_97_6_224 = sz00 | ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = all_106_6_234 & v3 = 0 & v2 = 0 & iLess0(v6, all_97_1_219) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, all_97_6_224) = v4 & sdtpldt0(v4, v1) = all_106_6_234 & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(all_97_6_224) = v0))
% 40.39/12.11 |
% 40.39/12.11 | Instantiating formula (60) with all_97_1_219, all_97_6_224, all_106_7_235 and discharging atoms sbrdtbr0(all_97_6_224) = all_97_1_219, aElement0(all_106_7_235) = 0, yields:
% 40.39/12.11 | (366) all_97_6_224 = sz00 | ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = all_106_7_235 & v3 = 0 & v2 = 0 & iLess0(v6, all_97_1_219) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, all_97_6_224) = v4 & sdtpldt0(v4, v1) = all_106_7_235 & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(all_97_6_224) = v0))
% 40.39/12.11 |
% 40.39/12.11 | Instantiating formula (60) with all_97_1_219, all_97_6_224, all_97_6_224 and discharging atoms sbrdtbr0(all_97_6_224) = all_97_1_219, aElement0(all_97_6_224) = 0, yields:
% 40.39/12.11 | (367) all_97_6_224 = sz00 | ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = all_97_6_224 & v3 = 0 & v2 = 0 & iLess0(v6, all_97_1_219) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, all_97_6_224) = v4 & sdtpldt0(v4, v1) = all_97_6_224 & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(all_97_6_224) = v0))
% 40.39/12.11 |
% 40.39/12.11 | Instantiating formula (60) with all_97_1_219, all_97_6_224, all_89_6_208 and discharging atoms sbrdtbr0(all_97_6_224) = all_97_1_219, aElement0(all_89_6_208) = 0, yields:
% 40.39/12.11 | (368) all_97_6_224 = sz00 | ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = all_89_6_208 & v3 = 0 & v2 = 0 & iLess0(v6, all_97_1_219) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, all_97_6_224) = v4 & sdtpldt0(v4, v1) = all_89_6_208 & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(all_97_6_224) = v0))
% 40.39/12.11 |
% 40.39/12.11 | Instantiating formula (60) with all_97_1_219, all_97_6_224, all_80_6_198 and discharging atoms sbrdtbr0(all_97_6_224) = all_97_1_219, aElement0(all_80_6_198) = 0, yields:
% 40.39/12.11 | (369) all_97_6_224 = sz00 | ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = all_80_6_198 & v3 = 0 & v2 = 0 & iLess0(v6, all_97_1_219) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, all_97_6_224) = v4 & sdtpldt0(v4, v1) = all_80_6_198 & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(all_97_6_224) = v0))
% 40.39/12.11 |
% 40.39/12.11 | Instantiating formula (60) with all_97_1_219, all_97_6_224, all_47_2_145 and discharging atoms sbrdtbr0(all_97_6_224) = all_97_1_219, aElement0(all_47_2_145) = 0, yields:
% 40.39/12.11 | (370) all_97_6_224 = sz00 | ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = all_47_2_145 & v3 = 0 & v2 = 0 & iLess0(v6, all_97_1_219) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, all_97_6_224) = v4 & sdtpldt0(v4, v1) = all_47_2_145 & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(all_97_6_224) = v0))
% 40.39/12.11 |
% 40.39/12.11 | Instantiating formula (60) with all_97_1_219, all_97_6_224, all_0_1_1 and discharging atoms sbrdtbr0(all_97_6_224) = all_97_1_219, aElement0(all_0_1_1) = 0, yields:
% 40.39/12.11 | (371) all_97_6_224 = sz00 | ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = all_0_1_1 & v3 = 0 & v2 = 0 & iLess0(v6, all_97_1_219) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, all_97_6_224) = v4 & sdtpldt0(v4, v1) = all_0_1_1 & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(all_97_6_224) = v0))
% 40.39/12.11 |
% 40.39/12.11 | Instantiating formula (60) with all_97_1_219, all_97_6_224, all_0_2_2 and discharging atoms sbrdtbr0(all_97_6_224) = all_97_1_219, aElement0(all_0_2_2) = 0, yields:
% 40.39/12.11 | (372) all_97_6_224 = sz00 | ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = all_0_2_2 & v3 = 0 & v2 = 0 & iLess0(v6, all_97_1_219) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, all_97_6_224) = v4 & sdtpldt0(v4, v1) = all_0_2_2 & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(all_97_6_224) = v0))
% 40.39/12.11 |
% 40.39/12.11 | Instantiating formula (60) with all_97_1_219, all_97_6_224, all_0_11_11 and discharging atoms sbrdtbr0(all_97_6_224) = all_97_1_219, aElement0(all_0_11_11) = 0, yields:
% 40.39/12.11 | (373) all_97_6_224 = sz00 | ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = all_0_11_11 & v3 = 0 & v2 = 0 & iLess0(v6, all_97_1_219) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, all_97_6_224) = v4 & sdtpldt0(v4, v1) = all_0_11_11 & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(all_97_6_224) = v0))
% 40.39/12.11 |
% 40.39/12.11 | Instantiating formula (60) with all_97_1_219, all_97_6_224, xu and discharging atoms sbrdtbr0(all_97_6_224) = all_97_1_219, aElement0(xu) = 0, yields:
% 40.39/12.11 | (374) all_97_6_224 = sz00 | ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = xu & v3 = 0 & v2 = 0 & iLess0(v6, all_97_1_219) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, all_97_6_224) = v4 & sdtpldt0(v4, v1) = xu & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(all_97_6_224) = v0))
% 40.39/12.11 |
% 40.39/12.11 | Instantiating (359) with all_660_0_1989, all_660_1_1990, all_660_2_1991 yields:
% 40.39/12.11 | (375) aElement0(all_97_3_221) = all_660_0_1989 & aElement0(all_97_7_225) = all_660_2_1991 & aElement0(xu) = all_660_1_1990 & ( ~ (all_660_1_1990 = 0) | ~ (all_660_2_1991 = 0) | all_660_0_1989 = 0)
% 40.39/12.11 |
% 40.39/12.11 | Applying alpha-rule on (375) yields:
% 40.39/12.11 | (376) aElement0(all_97_3_221) = all_660_0_1989
% 40.39/12.11 | (377) aElement0(all_97_7_225) = all_660_2_1991
% 40.39/12.11 | (378) aElement0(xu) = all_660_1_1990
% 40.39/12.11 | (379) ~ (all_660_1_1990 = 0) | ~ (all_660_2_1991 = 0) | all_660_0_1989 = 0
% 40.39/12.11 |
% 40.39/12.11 | Instantiating (358) with all_662_0_1992, all_662_1_1993, all_662_2_1994 yields:
% 40.39/12.11 | (380) sdtasdt0(xu, all_97_7_225) = all_662_0_1992 & aElement0(all_97_7_225) = all_662_2_1994 & aElement0(xu) = all_662_1_1993 & ( ~ (all_662_1_1993 = 0) | ~ (all_662_2_1994 = 0) | all_662_0_1992 = all_97_3_221)
% 40.39/12.11 |
% 40.39/12.11 | Applying alpha-rule on (380) yields:
% 40.39/12.11 | (381) sdtasdt0(xu, all_97_7_225) = all_662_0_1992
% 40.39/12.11 | (382) aElement0(all_97_7_225) = all_662_2_1994
% 40.39/12.11 | (383) aElement0(xu) = all_662_1_1993
% 40.39/12.11 | (384) ~ (all_662_1_1993 = 0) | ~ (all_662_2_1994 = 0) | all_662_0_1992 = all_97_3_221
% 40.39/12.11 |
% 40.39/12.11 | Instantiating (362) with all_680_0_2029, all_680_1_2030, all_680_2_2031 yields:
% 40.39/12.11 | (385) aElement0(all_97_3_221) = all_680_2_2031 & aElement0(all_97_6_224) = all_680_1_2030 & aElement0(xb) = all_680_0_2029 & ( ~ (all_680_1_2030 = 0) | ~ (all_680_2_2031 = 0) | all_680_0_2029 = 0)
% 40.39/12.11 |
% 40.39/12.11 | Applying alpha-rule on (385) yields:
% 40.39/12.11 | (386) aElement0(all_97_3_221) = all_680_2_2031
% 40.39/12.11 | (387) aElement0(all_97_6_224) = all_680_1_2030
% 40.39/12.11 | (388) aElement0(xb) = all_680_0_2029
% 40.39/12.11 | (389) ~ (all_680_1_2030 = 0) | ~ (all_680_2_2031 = 0) | all_680_0_2029 = 0
% 40.39/12.11 |
% 40.39/12.11 | Instantiating (361) with all_682_0_2032, all_682_1_2033, all_682_2_2034 yields:
% 40.39/12.11 | (390) sdtpldt0(all_97_6_224, all_97_3_221) = all_682_0_2032 & aElement0(all_97_3_221) = all_682_2_2034 & aElement0(all_97_6_224) = all_682_1_2033 & ( ~ (all_682_1_2033 = 0) | ~ (all_682_2_2034 = 0) | all_682_0_2032 = xb)
% 40.39/12.11 |
% 40.39/12.11 | Applying alpha-rule on (390) yields:
% 40.39/12.11 | (391) sdtpldt0(all_97_6_224, all_97_3_221) = all_682_0_2032
% 40.39/12.11 | (392) aElement0(all_97_3_221) = all_682_2_2034
% 40.39/12.11 | (393) aElement0(all_97_6_224) = all_682_1_2033
% 40.39/12.11 | (394) ~ (all_682_1_2033 = 0) | ~ (all_682_2_2034 = 0) | all_682_0_2032 = xb
% 40.39/12.11 |
% 40.39/12.11 | Instantiating (360) with all_703_0_2111, all_703_1_2112, all_703_2_2113, all_703_3_2114 yields:
% 40.39/12.11 | (395) iLess0(all_703_1_2112, all_0_8_8) = all_703_0_2111 & sbrdtbr0(all_97_6_224) = all_703_1_2112 & aElement0(all_97_6_224) = all_703_2_2113 & aElement0(all_97_7_225) = all_703_3_2114 & ( ~ (all_703_2_2113 = 0) | ~ (all_703_3_2114 = 0) | ( ~ (all_703_0_2111 = 0) & ~ (all_97_6_224 = sz00)))
% 40.39/12.11 |
% 40.39/12.11 | Applying alpha-rule on (395) yields:
% 40.39/12.11 | (396) sbrdtbr0(all_97_6_224) = all_703_1_2112
% 40.39/12.11 | (397) aElement0(all_97_7_225) = all_703_3_2114
% 40.39/12.11 | (398) aElement0(all_97_6_224) = all_703_2_2113
% 40.39/12.11 | (399) iLess0(all_703_1_2112, all_0_8_8) = all_703_0_2111
% 40.39/12.11 | (400) ~ (all_703_2_2113 = 0) | ~ (all_703_3_2114 = 0) | ( ~ (all_703_0_2111 = 0) & ~ (all_97_6_224 = sz00))
% 40.39/12.11 |
% 40.39/12.11 | Instantiating formula (32) with all_97_1_219, all_0_8_8, all_703_0_2111, all_97_0_218 and discharging atoms iLess0(all_97_1_219, all_0_8_8) = all_97_0_218, yields:
% 40.39/12.11 | (401) all_703_0_2111 = all_97_0_218 | ~ (iLess0(all_97_1_219, all_0_8_8) = all_703_0_2111)
% 40.39/12.11 |
% 40.39/12.11 | Instantiating formula (35) with all_97_6_224, all_703_1_2112, all_97_1_219 and discharging atoms sbrdtbr0(all_97_6_224) = all_703_1_2112, sbrdtbr0(all_97_6_224) = all_97_1_219, yields:
% 40.39/12.12 | (402) all_703_1_2112 = all_97_1_219
% 40.39/12.12 |
% 40.39/12.12 | Instantiating formula (55) with all_97_6_224, all_703_2_2113, 0 and discharging atoms aElement0(all_97_6_224) = all_703_2_2113, aElement0(all_97_6_224) = 0, yields:
% 40.39/12.12 | (403) all_703_2_2113 = 0
% 40.39/12.12 |
% 40.39/12.12 | Instantiating formula (55) with all_97_6_224, all_682_1_2033, all_703_2_2113 and discharging atoms aElement0(all_97_6_224) = all_703_2_2113, aElement0(all_97_6_224) = all_682_1_2033, yields:
% 40.39/12.12 | (404) all_703_2_2113 = all_682_1_2033
% 40.39/12.12 |
% 40.39/12.12 | Instantiating formula (55) with all_97_6_224, all_680_1_2030, all_703_2_2113 and discharging atoms aElement0(all_97_6_224) = all_703_2_2113, aElement0(all_97_6_224) = all_680_1_2030, yields:
% 40.39/12.12 | (405) all_703_2_2113 = all_680_1_2030
% 40.39/12.12 |
% 40.39/12.12 | Instantiating formula (55) with all_97_7_225, all_662_2_1994, 0 and discharging atoms aElement0(all_97_7_225) = all_662_2_1994, aElement0(all_97_7_225) = 0, yields:
% 40.39/12.12 | (406) all_662_2_1994 = 0
% 40.39/12.12 |
% 40.39/12.12 | Instantiating formula (55) with all_97_7_225, all_662_2_1994, all_703_3_2114 and discharging atoms aElement0(all_97_7_225) = all_703_3_2114, aElement0(all_97_7_225) = all_662_2_1994, yields:
% 40.39/12.12 | (407) all_703_3_2114 = all_662_2_1994
% 40.39/12.12 |
% 40.39/12.12 | Instantiating formula (55) with all_97_7_225, all_660_2_1991, all_703_3_2114 and discharging atoms aElement0(all_97_7_225) = all_703_3_2114, aElement0(all_97_7_225) = all_660_2_1991, yields:
% 40.39/12.12 | (408) all_703_3_2114 = all_660_2_1991
% 40.39/12.12 |
% 40.39/12.12 | Combining equations (403,404) yields a new equation:
% 40.39/12.12 | (409) all_682_1_2033 = 0
% 40.39/12.12 |
% 40.39/12.12 | Combining equations (405,404) yields a new equation:
% 40.39/12.12 | (410) all_682_1_2033 = all_680_1_2030
% 40.39/12.12 |
% 40.39/12.12 | Combining equations (407,408) yields a new equation:
% 40.39/12.12 | (411) all_662_2_1994 = all_660_2_1991
% 40.39/12.12 |
% 40.39/12.12 | Simplifying 411 yields:
% 40.39/12.12 | (412) all_662_2_1994 = all_660_2_1991
% 40.39/12.12 |
% 40.39/12.12 | Combining equations (409,410) yields a new equation:
% 40.39/12.12 | (413) all_680_1_2030 = 0
% 40.39/12.12 |
% 40.39/12.12 | Combining equations (406,412) yields a new equation:
% 40.39/12.12 | (414) all_660_2_1991 = 0
% 40.39/12.12 |
% 40.39/12.12 | Combining equations (413,410) yields a new equation:
% 40.39/12.12 | (409) all_682_1_2033 = 0
% 40.39/12.12 |
% 40.39/12.12 | Combining equations (414,408) yields a new equation:
% 40.39/12.12 | (416) all_703_3_2114 = 0
% 40.39/12.12 |
% 40.39/12.12 | Combining equations (409,404) yields a new equation:
% 40.39/12.12 | (403) all_703_2_2113 = 0
% 40.39/12.12 |
% 40.39/12.12 | From (402) and (399) follows:
% 40.39/12.12 | (418) iLess0(all_97_1_219, all_0_8_8) = all_703_0_2111
% 40.39/12.12 |
% 40.39/12.12 +-Applying beta-rule and splitting (400), into two cases.
% 40.39/12.12 |-Branch one:
% 40.39/12.12 | (419) ~ (all_703_2_2113 = 0)
% 40.39/12.12 |
% 40.39/12.12 | Equations (403) can reduce 419 to:
% 40.39/12.12 | (178) $false
% 40.39/12.12 |
% 40.39/12.12 |-The branch is then unsatisfiable
% 40.39/12.12 |-Branch two:
% 40.39/12.12 | (403) all_703_2_2113 = 0
% 40.39/12.12 | (422) ~ (all_703_3_2114 = 0) | ( ~ (all_703_0_2111 = 0) & ~ (all_97_6_224 = sz00))
% 40.39/12.12 |
% 40.39/12.12 +-Applying beta-rule and splitting (422), into two cases.
% 40.39/12.12 |-Branch one:
% 40.39/12.12 | (423) ~ (all_703_3_2114 = 0)
% 40.39/12.12 |
% 40.39/12.12 | Equations (416) can reduce 423 to:
% 40.39/12.12 | (178) $false
% 40.39/12.12 |
% 40.39/12.12 |-The branch is then unsatisfiable
% 40.39/12.12 |-Branch two:
% 40.39/12.12 | (416) all_703_3_2114 = 0
% 40.39/12.12 | (426) ~ (all_703_0_2111 = 0) & ~ (all_97_6_224 = sz00)
% 40.39/12.12 |
% 40.39/12.12 | Applying alpha-rule on (426) yields:
% 40.39/12.12 | (427) ~ (all_703_0_2111 = 0)
% 40.39/12.12 | (428) ~ (all_97_6_224 = sz00)
% 40.39/12.12 |
% 40.39/12.12 +-Applying beta-rule and splitting (363), into two cases.
% 40.39/12.12 |-Branch one:
% 40.39/12.12 | (429) all_97_6_224 = sz00
% 40.39/12.12 |
% 40.39/12.12 | Equations (429) can reduce 428 to:
% 40.39/12.12 | (178) $false
% 40.39/12.12 |
% 40.39/12.12 |-The branch is then unsatisfiable
% 40.39/12.12 |-Branch two:
% 40.39/12.12 | (428) ~ (all_97_6_224 = sz00)
% 40.39/12.12 | (432) ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = all_110_6_242 & v3 = 0 & v2 = 0 & iLess0(v6, all_97_1_219) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, all_97_6_224) = v4 & sdtpldt0(v4, v1) = all_110_6_242 & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(all_97_6_224) = v0))
% 40.39/12.12 |
% 40.39/12.12 +-Applying beta-rule and splitting (372), into two cases.
% 40.39/12.12 |-Branch one:
% 40.39/12.12 | (429) all_97_6_224 = sz00
% 40.39/12.12 |
% 40.39/12.12 | Equations (429) can reduce 428 to:
% 40.39/12.12 | (178) $false
% 40.39/12.12 |
% 40.39/12.12 |-The branch is then unsatisfiable
% 40.39/12.12 |-Branch two:
% 40.39/12.12 | (428) ~ (all_97_6_224 = sz00)
% 40.39/12.12 | (436) ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = all_0_2_2 & v3 = 0 & v2 = 0 & iLess0(v6, all_97_1_219) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, all_97_6_224) = v4 & sdtpldt0(v4, v1) = all_0_2_2 & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(all_97_6_224) = v0))
% 40.39/12.12 |
% 40.39/12.12 +-Applying beta-rule and splitting (373), into two cases.
% 40.39/12.12 |-Branch one:
% 40.39/12.12 | (429) all_97_6_224 = sz00
% 40.39/12.12 |
% 40.39/12.12 | Equations (429) can reduce 428 to:
% 40.39/12.12 | (178) $false
% 40.39/12.12 |
% 40.39/12.12 |-The branch is then unsatisfiable
% 40.39/12.12 |-Branch two:
% 40.39/12.12 | (428) ~ (all_97_6_224 = sz00)
% 40.39/12.12 | (440) ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = all_0_11_11 & v3 = 0 & v2 = 0 & iLess0(v6, all_97_1_219) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, all_97_6_224) = v4 & sdtpldt0(v4, v1) = all_0_11_11 & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(all_97_6_224) = v0))
% 40.39/12.12 |
% 40.39/12.12 +-Applying beta-rule and splitting (371), into two cases.
% 40.39/12.12 |-Branch one:
% 40.39/12.12 | (429) all_97_6_224 = sz00
% 40.39/12.12 |
% 40.39/12.12 | Equations (429) can reduce 428 to:
% 40.39/12.12 | (178) $false
% 40.39/12.12 |
% 40.39/12.12 |-The branch is then unsatisfiable
% 40.39/12.12 |-Branch two:
% 40.39/12.12 | (428) ~ (all_97_6_224 = sz00)
% 40.39/12.12 | (444) ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = all_0_1_1 & v3 = 0 & v2 = 0 & iLess0(v6, all_97_1_219) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, all_97_6_224) = v4 & sdtpldt0(v4, v1) = all_0_1_1 & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(all_97_6_224) = v0))
% 40.39/12.12 |
% 40.39/12.12 +-Applying beta-rule and splitting (365), into two cases.
% 40.39/12.12 |-Branch one:
% 40.39/12.12 | (429) all_97_6_224 = sz00
% 40.39/12.12 |
% 40.39/12.12 | Equations (429) can reduce 428 to:
% 40.39/12.12 | (178) $false
% 40.39/12.12 |
% 40.39/12.12 |-The branch is then unsatisfiable
% 40.39/12.12 |-Branch two:
% 40.39/12.12 | (428) ~ (all_97_6_224 = sz00)
% 40.39/12.12 | (448) ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = all_106_6_234 & v3 = 0 & v2 = 0 & iLess0(v6, all_97_1_219) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, all_97_6_224) = v4 & sdtpldt0(v4, v1) = all_106_6_234 & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(all_97_6_224) = v0))
% 40.39/12.12 |
% 40.39/12.12 +-Applying beta-rule and splitting (374), into two cases.
% 40.39/12.12 |-Branch one:
% 40.39/12.12 | (429) all_97_6_224 = sz00
% 40.39/12.12 |
% 40.39/12.12 | Equations (429) can reduce 428 to:
% 40.39/12.12 | (178) $false
% 40.39/12.12 |
% 40.39/12.12 |-The branch is then unsatisfiable
% 40.39/12.12 |-Branch two:
% 40.39/12.12 | (428) ~ (all_97_6_224 = sz00)
% 40.39/12.12 | (452) ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = xu & v3 = 0 & v2 = 0 & iLess0(v6, all_97_1_219) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, all_97_6_224) = v4 & sdtpldt0(v4, v1) = xu & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(all_97_6_224) = v0))
% 40.39/12.12 |
% 40.39/12.12 +-Applying beta-rule and splitting (369), into two cases.
% 40.39/12.12 |-Branch one:
% 40.39/12.12 | (429) all_97_6_224 = sz00
% 40.39/12.12 |
% 40.39/12.12 | Equations (429) can reduce 428 to:
% 40.39/12.12 | (178) $false
% 40.39/12.12 |
% 40.39/12.12 |-The branch is then unsatisfiable
% 40.39/12.12 |-Branch two:
% 40.39/12.12 | (428) ~ (all_97_6_224 = sz00)
% 40.39/12.12 | (456) ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = all_80_6_198 & v3 = 0 & v2 = 0 & iLess0(v6, all_97_1_219) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, all_97_6_224) = v4 & sdtpldt0(v4, v1) = all_80_6_198 & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(all_97_6_224) = v0))
% 40.39/12.12 |
% 40.39/12.12 +-Applying beta-rule and splitting (366), into two cases.
% 40.39/12.12 |-Branch one:
% 40.39/12.12 | (429) all_97_6_224 = sz00
% 40.39/12.12 |
% 40.39/12.12 | Equations (429) can reduce 428 to:
% 40.39/12.12 | (178) $false
% 40.39/12.12 |
% 40.39/12.12 |-The branch is then unsatisfiable
% 40.39/12.12 |-Branch two:
% 40.39/12.12 | (428) ~ (all_97_6_224 = sz00)
% 40.39/12.12 | (460) ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = all_106_7_235 & v3 = 0 & v2 = 0 & iLess0(v6, all_97_1_219) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, all_97_6_224) = v4 & sdtpldt0(v4, v1) = all_106_7_235 & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(all_97_6_224) = v0))
% 40.39/12.12 |
% 40.39/12.12 +-Applying beta-rule and splitting (370), into two cases.
% 40.39/12.12 |-Branch one:
% 40.39/12.12 | (429) all_97_6_224 = sz00
% 40.39/12.12 |
% 40.39/12.12 | Equations (429) can reduce 428 to:
% 40.39/12.12 | (178) $false
% 40.39/12.12 |
% 40.39/12.12 |-The branch is then unsatisfiable
% 40.39/12.12 |-Branch two:
% 40.39/12.12 | (428) ~ (all_97_6_224 = sz00)
% 40.39/12.12 | (464) ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = all_47_2_145 & v3 = 0 & v2 = 0 & iLess0(v6, all_97_1_219) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, all_97_6_224) = v4 & sdtpldt0(v4, v1) = all_47_2_145 & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(all_97_6_224) = v0))
% 40.39/12.12 |
% 40.39/12.12 +-Applying beta-rule and splitting (368), into two cases.
% 40.39/12.12 |-Branch one:
% 40.39/12.12 | (429) all_97_6_224 = sz00
% 40.39/12.12 |
% 40.39/12.12 | Equations (429) can reduce 428 to:
% 40.39/12.12 | (178) $false
% 40.39/12.12 |
% 40.39/12.12 |-The branch is then unsatisfiable
% 40.39/12.12 |-Branch two:
% 40.39/12.12 | (428) ~ (all_97_6_224 = sz00)
% 40.39/12.12 | (468) ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = all_89_6_208 & v3 = 0 & v2 = 0 & iLess0(v6, all_97_1_219) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, all_97_6_224) = v4 & sdtpldt0(v4, v1) = all_89_6_208 & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(all_97_6_224) = v0))
% 40.39/12.12 |
% 40.39/12.12 +-Applying beta-rule and splitting (367), into two cases.
% 40.39/12.12 |-Branch one:
% 40.39/12.12 | (429) all_97_6_224 = sz00
% 40.39/12.12 |
% 40.39/12.13 | Equations (429) can reduce 428 to:
% 40.39/12.13 | (178) $false
% 40.39/12.13 |
% 40.39/12.13 |-The branch is then unsatisfiable
% 40.39/12.13 |-Branch two:
% 40.39/12.13 | (428) ~ (all_97_6_224 = sz00)
% 40.39/12.13 | (472) ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = all_97_6_224 & v3 = 0 & v2 = 0 & iLess0(v6, all_97_1_219) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, all_97_6_224) = v4 & sdtpldt0(v4, v1) = all_97_6_224 & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(all_97_6_224) = v0))
% 40.39/12.13 |
% 40.39/12.13 +-Applying beta-rule and splitting (364), into two cases.
% 40.39/12.13 |-Branch one:
% 40.39/12.13 | (429) all_97_6_224 = sz00
% 40.39/12.13 |
% 40.39/12.13 | Equations (429) can reduce 428 to:
% 40.39/12.13 | (178) $false
% 40.39/12.13 |
% 40.39/12.13 |-The branch is then unsatisfiable
% 40.39/12.13 |-Branch two:
% 40.39/12.13 | (428) ~ (all_97_6_224 = sz00)
% 40.39/12.13 | (476) ? [v0] : ? [v1] : ? [v2] : ? [v3] : ? [v4] : ? [v5] : ? [v6] : ? [v7] : ((v5 = all_110_7_243 & v3 = 0 & v2 = 0 & iLess0(v6, all_97_1_219) = v7 & sbrdtbr0(v1) = v6 & sdtasdt0(v0, all_97_6_224) = v4 & sdtpldt0(v4, v1) = all_110_7_243 & aElement0(v1) = 0 & aElement0(v0) = 0 & (v7 = 0 | v1 = sz00)) | ( ~ (v0 = 0) & aElement0(all_97_6_224) = v0))
% 40.39/12.13 |
% 40.39/12.13 +-Applying beta-rule and splitting (329), into two cases.
% 40.39/12.13 |-Branch one:
% 40.39/12.13 | (429) all_97_6_224 = sz00
% 40.39/12.13 |
% 40.39/12.13 | Equations (429) can reduce 428 to:
% 40.39/12.13 | (178) $false
% 40.39/12.13 |
% 40.39/12.13 |-The branch is then unsatisfiable
% 40.39/12.13 |-Branch two:
% 40.39/12.13 | (428) ~ (all_97_6_224 = sz00)
% 40.39/12.13 | (480) all_97_0_218 = 0
% 40.39/12.13 |
% 40.39/12.13 +-Applying beta-rule and splitting (401), into two cases.
% 40.39/12.13 |-Branch one:
% 40.39/12.13 | (481) ~ (iLess0(all_97_1_219, all_0_8_8) = all_703_0_2111)
% 40.82/12.13 |
% 40.82/12.13 | Using (418) and (481) yields:
% 40.82/12.13 | (482) $false
% 40.82/12.13 |
% 40.82/12.13 |-The branch is then unsatisfiable
% 40.82/12.13 |-Branch two:
% 40.82/12.13 | (418) iLess0(all_97_1_219, all_0_8_8) = all_703_0_2111
% 40.82/12.13 | (484) all_703_0_2111 = all_97_0_218
% 40.82/12.13 |
% 40.82/12.13 | Combining equations (480,484) yields a new equation:
% 40.82/12.13 | (485) all_703_0_2111 = 0
% 40.82/12.13 |
% 40.82/12.13 | Equations (485) can reduce 427 to:
% 40.82/12.13 | (178) $false
% 40.82/12.13 |
% 40.82/12.13 |-The branch is then unsatisfiable
% 40.82/12.13 |-Branch two:
% 40.82/12.13 | (487) ~ (all_89_7_209 = 0) & aElement0(xu) = all_89_7_209
% 40.82/12.13 |
% 40.82/12.13 | Applying alpha-rule on (487) yields:
% 40.82/12.13 | (488) ~ (all_89_7_209 = 0)
% 40.82/12.13 | (489) aElement0(xu) = all_89_7_209
% 40.82/12.13 |
% 40.82/12.13 | Instantiating formula (55) with xu, all_89_7_209, 0 and discharging atoms aElement0(xu) = all_89_7_209, aElement0(xu) = 0, yields:
% 40.82/12.13 | (490) all_89_7_209 = 0
% 40.82/12.13 |
% 40.82/12.13 | Equations (490) can reduce 488 to:
% 40.82/12.13 | (178) $false
% 40.82/12.13 |
% 40.82/12.13 |-The branch is then unsatisfiable
% 40.82/12.13 |-Branch two:
% 40.82/12.13 | (492) ~ (all_110_7_243 = 0) & aElement0(xu) = all_110_7_243
% 40.82/12.13 |
% 40.82/12.13 | Applying alpha-rule on (492) yields:
% 40.82/12.13 | (493) ~ (all_110_7_243 = 0)
% 40.82/12.13 | (494) aElement0(xu) = all_110_7_243
% 40.82/12.13 |
% 40.82/12.13 | Instantiating formula (55) with xu, all_110_7_243, 0 and discharging atoms aElement0(xu) = all_110_7_243, aElement0(xu) = 0, yields:
% 40.82/12.13 | (495) all_110_7_243 = 0
% 40.82/12.13 |
% 40.82/12.13 | Equations (495) can reduce 493 to:
% 40.82/12.13 | (178) $false
% 40.82/12.13 |
% 40.82/12.13 |-The branch is then unsatisfiable
% 40.82/12.13 |-Branch two:
% 40.82/12.13 | (497) ~ (all_97_7_225 = 0) & aElement0(xu) = all_97_7_225
% 40.82/12.13 |
% 40.82/12.13 | Applying alpha-rule on (497) yields:
% 40.82/12.13 | (498) ~ (all_97_7_225 = 0)
% 40.82/12.13 | (499) aElement0(xu) = all_97_7_225
% 40.82/12.13 |
% 40.82/12.13 | Instantiating formula (55) with xu, all_97_7_225, 0 and discharging atoms aElement0(xu) = all_97_7_225, aElement0(xu) = 0, yields:
% 40.82/12.13 | (500) all_97_7_225 = 0
% 40.82/12.13 |
% 40.82/12.13 | Equations (500) can reduce 498 to:
% 40.82/12.13 | (178) $false
% 40.82/12.13 |
% 40.82/12.13 |-The branch is then unsatisfiable
% 40.82/12.13 |-Branch two:
% 40.82/12.13 | (502) aElement0(xu) = all_47_2_145 & aElement0(xa) = all_47_1_144 & ( ~ (all_47_1_144 = 0) | ~ (all_47_2_145 = 0))
% 40.82/12.13 |
% 40.82/12.13 | Applying alpha-rule on (502) yields:
% 40.82/12.13 | (503) aElement0(xu) = all_47_2_145
% 40.82/12.13 | (504) aElement0(xa) = all_47_1_144
% 40.82/12.13 | (505) ~ (all_47_1_144 = 0) | ~ (all_47_2_145 = 0)
% 40.82/12.13 |
% 40.82/12.13 | Instantiating formula (55) with xu, all_47_2_145, 0 and discharging atoms aElement0(xu) = all_47_2_145, aElement0(xu) = 0, yields:
% 40.82/12.13 | (506) all_47_2_145 = 0
% 40.82/12.13 |
% 40.82/12.13 | Instantiating formula (55) with xa, all_47_1_144, 0 and discharging atoms aElement0(xa) = all_47_1_144, aElement0(xa) = 0, yields:
% 40.82/12.13 | (322) all_47_1_144 = 0
% 40.82/12.13 |
% 40.82/12.13 +-Applying beta-rule and splitting (505), into two cases.
% 40.82/12.13 |-Branch one:
% 40.82/12.13 | (508) ~ (all_47_1_144 = 0)
% 40.82/12.13 |
% 40.82/12.13 | Equations (322) can reduce 508 to:
% 40.82/12.13 | (178) $false
% 40.82/12.13 |
% 40.82/12.13 |-The branch is then unsatisfiable
% 40.82/12.13 |-Branch two:
% 40.82/12.13 | (322) all_47_1_144 = 0
% 40.82/12.13 | (511) ~ (all_47_2_145 = 0)
% 40.82/12.13 |
% 40.82/12.13 | Equations (506) can reduce 511 to:
% 40.82/12.13 | (178) $false
% 40.82/12.13 |
% 40.82/12.13 |-The branch is then unsatisfiable
% 40.82/12.13 |-Branch two:
% 40.82/12.13 | (513) ~ (all_106_7_235 = 0) & aElement0(xu) = all_106_7_235
% 40.82/12.13 |
% 40.82/12.13 | Applying alpha-rule on (513) yields:
% 40.82/12.13 | (514) ~ (all_106_7_235 = 0)
% 40.82/12.13 | (515) aElement0(xu) = all_106_7_235
% 40.82/12.13 |
% 40.82/12.13 | Instantiating formula (55) with xu, all_106_7_235, 0 and discharging atoms aElement0(xu) = all_106_7_235, aElement0(xu) = 0, yields:
% 40.82/12.13 | (516) all_106_7_235 = 0
% 40.82/12.13 |
% 40.82/12.13 | Equations (516) can reduce 514 to:
% 40.82/12.13 | (178) $false
% 40.82/12.13 |
% 40.82/12.13 |-The branch is then unsatisfiable
% 40.82/12.13 |-Branch two:
% 40.82/12.13 | (518) ~ (all_80_7_199 = 0) & aElement0(xu) = all_80_7_199
% 40.82/12.13 |
% 40.82/12.13 | Applying alpha-rule on (518) yields:
% 40.82/12.13 | (519) ~ (all_80_7_199 = 0)
% 40.82/12.13 | (520) aElement0(xu) = all_80_7_199
% 40.82/12.13 |
% 40.82/12.13 | Instantiating formula (55) with xu, all_80_7_199, 0 and discharging atoms aElement0(xu) = all_80_7_199, aElement0(xu) = 0, yields:
% 40.82/12.13 | (521) all_80_7_199 = 0
% 40.82/12.13 |
% 40.82/12.13 | Equations (521) can reduce 519 to:
% 40.82/12.13 | (178) $false
% 40.82/12.13 |
% 40.82/12.13 |-The branch is then unsatisfiable
% 40.82/12.13 % SZS output end Proof for theBenchmark
% 40.82/12.13
% 40.82/12.13 11505ms
%------------------------------------------------------------------------------