TSTP Solution File: RNG114+4 by Princess---230619

View Problem - Process Solution

%------------------------------------------------------------------------------
% File     : Princess---230619
% Problem  : RNG114+4 : TPTP v8.1.2. Released v4.0.0.
% Transfm  : none
% Format   : tptp
% Command  : princess -inputFormat=tptp +threads -portfolio=casc +printProof -timeoutSec=%d %s

% Computer : n006.cluster.edu
% Model    : x86_64 x86_64
% CPU      : Intel(R) Xeon(R) CPU E5-2620 v4 2.10GHz
% Memory   : 8042.1875MB
% OS       : Linux 3.10.0-693.el7.x86_64
% CPULimit : 300s
% WCLimit  : 300s
% DateTime : Thu Aug 31 13:57:58 EDT 2023

% Result   : Theorem 51.78s 7.60s
% Output   : Proof 62.12s
% Verified : 
% SZS Type : -

% Comments : 
%------------------------------------------------------------------------------
%----WARNING: Could not form TPTP format derivation
%------------------------------------------------------------------------------
%----ORIGINAL SYSTEM OUTPUT
% 0.00/0.12  % Problem  : RNG114+4 : TPTP v8.1.2. Released v4.0.0.
% 0.00/0.13  % Command  : princess -inputFormat=tptp +threads -portfolio=casc +printProof -timeoutSec=%d %s
% 0.12/0.34  % Computer : n006.cluster.edu
% 0.12/0.34  % Model    : x86_64 x86_64
% 0.12/0.34  % CPU      : Intel(R) Xeon(R) CPU E5-2620 v4 @ 2.10GHz
% 0.12/0.34  % Memory   : 8042.1875MB
% 0.12/0.34  % OS       : Linux 3.10.0-693.el7.x86_64
% 0.12/0.34  % CPULimit : 300
% 0.12/0.34  % WCLimit  : 300
% 0.12/0.34  % DateTime : Sun Aug 27 02:22:37 EDT 2023
% 0.12/0.34  % CPUTime  : 
% 0.19/0.60  ________       _____
% 0.19/0.60  ___  __ \_________(_)________________________________
% 0.19/0.60  __  /_/ /_  ___/_  /__  __ \  ___/  _ \_  ___/_  ___/
% 0.19/0.60  _  ____/_  /   _  / _  / / / /__ /  __/(__  )_(__  )
% 0.19/0.60  /_/     /_/    /_/  /_/ /_/\___/ \___//____/ /____/
% 0.19/0.60  
% 0.19/0.60  A Theorem Prover for First-Order Logic modulo Linear Integer Arithmetic
% 0.19/0.60  (2023-06-19)
% 0.19/0.60  
% 0.19/0.60  (c) Philipp Rümmer, 2009-2023
% 0.19/0.60  Contributors: Peter Backeman, Peter Baumgartner, Angelo Brillout, Zafer Esen,
% 0.19/0.60                Amanda Stjerna.
% 0.19/0.60  Free software under BSD-3-Clause.
% 0.19/0.60  
% 0.19/0.60  For more information, visit http://www.philipp.ruemmer.org/princess.shtml
% 0.19/0.60  
% 0.19/0.60  Loading /export/starexec/sandbox/benchmark/theBenchmark.p ...
% 0.19/0.61  Running up to 7 provers in parallel.
% 0.19/0.64  Prover 0: Options:  +triggersInConjecture +genTotalityAxioms +tightFunctionScopes -clausifier=simple -reverseFunctionalityPropagation -boolFunsAsPreds -triggerStrategy=allUni -realRatSaturationRounds=0 -ignoreQuantifiers -constructProofs=never -generateTriggers=all -randomSeed=1042961893
% 0.19/0.64  Prover 2: Options:  +triggersInConjecture +genTotalityAxioms -tightFunctionScopes -clausifier=simple +reverseFunctionalityPropagation +boolFunsAsPreds -triggerStrategy=allMinimalAndEmpty -realRatSaturationRounds=1 -ignoreQuantifiers -constructProofs=never -generateTriggers=all -randomSeed=-1065072994
% 0.19/0.64  Prover 1: Options:  +triggersInConjecture -genTotalityAxioms -tightFunctionScopes -clausifier=none -reverseFunctionalityPropagation -boolFunsAsPreds -triggerStrategy=maximal -realRatSaturationRounds=0 +ignoreQuantifiers -constructProofs=always -generateTriggers=all -randomSeed=-1571432423
% 0.19/0.64  Prover 3: Options:  +triggersInConjecture -genTotalityAxioms -tightFunctionScopes -clausifier=none -reverseFunctionalityPropagation -boolFunsAsPreds -triggerStrategy=maximal -realRatSaturationRounds=1 +ignoreQuantifiers -constructProofs=never -generateTriggers=all -randomSeed=1922548996
% 0.19/0.64  Prover 4: Options:  +triggersInConjecture -genTotalityAxioms -tightFunctionScopes -clausifier=simple -reverseFunctionalityPropagation -boolFunsAsPreds -triggerStrategy=allUni -realRatSaturationRounds=0 +ignoreQuantifiers -constructProofs=always -generateTriggers=all -randomSeed=1868514696
% 0.19/0.64  Prover 5: Options:  +triggersInConjecture -genTotalityAxioms +tightFunctionScopes -clausifier=none +reverseFunctionalityPropagation +boolFunsAsPreds -triggerStrategy=allMaximal -realRatSaturationRounds=1 -ignoreQuantifiers -constructProofs=never -generateTriggers=complete -randomSeed=1259561288
% 0.19/0.64  Prover 6: Options:  -triggersInConjecture -genTotalityAxioms +tightFunctionScopes -clausifier=none +reverseFunctionalityPropagation -boolFunsAsPreds -triggerStrategy=maximalOutermost -realRatSaturationRounds=0 -ignoreQuantifiers -constructProofs=never -generateTriggers=all -randomSeed=-1399714365
% 3.65/1.24  Prover 1: Preprocessing ...
% 4.04/1.27  Prover 4: Preprocessing ...
% 4.04/1.29  Prover 3: Preprocessing ...
% 4.04/1.29  Prover 0: Preprocessing ...
% 4.04/1.29  Prover 2: Preprocessing ...
% 4.04/1.29  Prover 6: Preprocessing ...
% 4.04/1.31  Prover 5: Preprocessing ...
% 10.12/2.19  Prover 1: Constructing countermodel ...
% 10.12/2.19  Prover 3: Constructing countermodel ...
% 10.12/2.22  Prover 6: Proving ...
% 10.12/2.23  Prover 5: Proving ...
% 11.03/2.31  Prover 2: Proving ...
% 13.07/2.53  Prover 4: Constructing countermodel ...
% 13.83/2.67  Prover 0: Proving ...
% 51.78/7.59  Prover 3: proved (6969ms)
% 51.78/7.59  
% 51.78/7.60  % SZS status Theorem for /export/starexec/sandbox/benchmark/theBenchmark.p
% 51.78/7.60  
% 51.78/7.60  Prover 6: stopped
% 51.78/7.60  Prover 5: stopped
% 51.78/7.62  Prover 2: stopped
% 51.78/7.63  Prover 0: stopped
% 51.78/7.64  Prover 7: Options:  +triggersInConjecture -genTotalityAxioms +tightFunctionScopes -clausifier=simple +reverseFunctionalityPropagation +boolFunsAsPreds -triggerStrategy=allUni -realRatSaturationRounds=1 +ignoreQuantifiers -constructProofs=always -generateTriggers=all -randomSeed=-236303470
% 51.78/7.64  Prover 8: Options:  +triggersInConjecture +genTotalityAxioms -tightFunctionScopes -clausifier=none -reverseFunctionalityPropagation -boolFunsAsPreds -triggerStrategy=maximal -realRatSaturationRounds=0 +ignoreQuantifiers -constructProofs=always -generateTriggers=all -randomSeed=-200781089
% 51.78/7.64  Prover 10: Options:  +triggersInConjecture -genTotalityAxioms +tightFunctionScopes -clausifier=simple -reverseFunctionalityPropagation +boolFunsAsPreds -triggerStrategy=maximal -realRatSaturationRounds=1 +ignoreQuantifiers -constructProofs=always -generateTriggers=all -randomSeed=919308125
% 51.78/7.64  Prover 11: Options:  +triggersInConjecture -genTotalityAxioms +tightFunctionScopes -clausifier=simple -reverseFunctionalityPropagation -boolFunsAsPreds -triggerStrategy=allUni -realRatSaturationRounds=1 +ignoreQuantifiers -constructProofs=always -generateTriggers=all -randomSeed=-1509710984
% 51.78/7.64  Prover 13: Options:  +triggersInConjecture -genTotalityAxioms -tightFunctionScopes -clausifier=simple -reverseFunctionalityPropagation +boolFunsAsPreds -triggerStrategy=maximal -realRatSaturationRounds=0 +ignoreQuantifiers -constructProofs=always -generateTriggers=complete -randomSeed=1138197443
% 52.64/7.72  Prover 7: Preprocessing ...
% 52.64/7.73  Prover 10: Preprocessing ...
% 52.93/7.80  Prover 13: Preprocessing ...
% 52.93/7.80  Prover 11: Preprocessing ...
% 52.93/7.82  Prover 8: Preprocessing ...
% 54.56/7.95  Prover 7: Constructing countermodel ...
% 54.64/7.98  Prover 10: Constructing countermodel ...
% 54.94/8.09  Prover 8: Warning: ignoring some quantifiers
% 54.94/8.09  Prover 8: Constructing countermodel ...
% 54.94/8.16  Prover 13: Warning: ignoring some quantifiers
% 54.94/8.19  Prover 13: Constructing countermodel ...
% 57.01/8.30  Prover 11: Constructing countermodel ...
% 60.38/8.89  Prover 10: Found proof (size 51)
% 60.38/8.89  Prover 10: proved (1261ms)
% 60.38/8.89  Prover 11: stopped
% 60.38/8.89  Prover 13: stopped
% 60.38/8.89  Prover 7: stopped
% 60.38/8.89  Prover 1: stopped
% 61.41/8.89  Prover 4: stopped
% 61.41/8.90  Prover 8: stopped
% 61.41/8.90  
% 61.41/8.90  % SZS status Theorem for /export/starexec/sandbox/benchmark/theBenchmark.p
% 61.41/8.90  
% 61.41/8.90  % SZS output start Proof for theBenchmark
% 61.41/8.90  Assumptions after simplification:
% 61.41/8.90  ---------------------------------
% 61.41/8.90  
% 61.41/8.91    (mDefPrIdeal)
% 61.41/8.93     ! [v0: $i] :  ! [v1: $i] :  ! [v2: $i] :  ! [v3: $i] : ( ~ (slsdtgt0(v0) =
% 61.41/8.93        v1) |  ~ (sdtasdt0(v0, v3) = v2) |  ~ $i(v3) |  ~ $i(v2) |  ~ $i(v1) |  ~
% 61.41/8.93      $i(v0) |  ~ aElement0(v3) |  ~ aElement0(v0) | aElementOf0(v2, v1)) &  !
% 61.41/8.93    [v0: $i] :  ! [v1: $i] :  ! [v2: $i] : (v2 = v1 |  ~ (slsdtgt0(v0) = v1) |  ~
% 61.41/8.93      $i(v2) |  ~ $i(v0) |  ~ aSet0(v2) |  ~ aElement0(v0) |  ? [v3: $i] :  ? [v4:
% 61.41/8.94        $i] :  ? [v5: $i] : ($i(v4) & $i(v3) & ( ~ aElementOf0(v3, v2) |  ! [v6:
% 61.41/8.94            $i] : ( ~ (sdtasdt0(v0, v6) = v3) |  ~ $i(v6) |  ~ aElement0(v6))) &
% 61.41/8.94        (aElementOf0(v3, v2) | (v5 = v3 & sdtasdt0(v0, v4) = v3 &
% 61.41/8.94            aElement0(v4))))) &  ! [v0: $i] :  ! [v1: $i] :  ! [v2: $i] : ( ~
% 61.41/8.94      (slsdtgt0(v0) = v1) |  ~ $i(v2) |  ~ $i(v1) |  ~ $i(v0) |  ~ aElementOf0(v2,
% 61.41/8.94        v1) |  ~ aElement0(v0) |  ? [v3: $i] : (sdtasdt0(v0, v3) = v2 & $i(v3) &
% 61.41/8.94        aElement0(v3))) &  ! [v0: $i] :  ! [v1: $i] : ( ~ (slsdtgt0(v0) = v1) |  ~
% 61.41/8.94      $i(v1) |  ~ $i(v0) |  ~ aElement0(v0) | aSet0(v1))
% 61.41/8.94  
% 61.41/8.94    (mMulComm)
% 61.41/8.94     ! [v0: $i] :  ! [v1: $i] :  ! [v2: $i] : ( ~ (sdtasdt0(v0, v1) = v2) |  ~
% 61.41/8.94      $i(v1) |  ~ $i(v0) |  ~ aElement0(v1) |  ~ aElement0(v0) | (sdtasdt0(v1, v0)
% 61.41/8.94        = v2 & $i(v2)))
% 61.41/8.94  
% 61.41/8.94    (m__)
% 61.41/8.94    $i(xu) & $i(xb) & $i(xa) &  ! [v0: $i] :  ! [v1: $i] :  ! [v2: $i] :  ! [v3:
% 61.41/8.94      $i] : ( ~ (sdtasdt0(xb, v1) = v3) |  ~ (sdtasdt0(xa, v0) = v2) |  ~
% 61.41/8.94      (sdtpldt0(v2, v3) = xu) |  ~ $i(v1) |  ~ $i(v0) |  ~ aElement0(v1) |  ~
% 61.41/8.94      aElement0(v0))
% 61.41/8.94  
% 61.41/8.94    (m__2091)
% 61.41/8.94    $i(xb) & $i(xa) & aElement0(xb) & aElement0(xa)
% 61.41/8.94  
% 61.41/8.94    (m__2129)
% 61.41/8.95    $i(xc) & $i(xb) & $i(xa) &  ? [v0: $i] :  ? [v1: $i] : (sdtasdt0(xc, v1) = xa
% 61.41/8.95      & sdtasdt0(xc, v0) = xb & $i(v1) & $i(v0) & aGcdOfAnd0(xc, xa, xb) &
% 61.41/8.95      aDivisorOf0(xc, xb) & aDivisorOf0(xc, xa) & doDivides0(xc, xb) &
% 61.41/8.95      doDivides0(xc, xa) & aElement0(v1) & aElement0(v0) & aElement0(xc) &  ! [v2:
% 61.41/8.95        $i] :  ! [v3: $i] :  ! [v4: $i] : ( ~ (sdtasdt0(v2, v4) = xa) |  ~
% 61.41/8.95        (sdtasdt0(v2, v3) = xb) |  ~ $i(v4) |  ~ $i(v3) |  ~ $i(v2) |  ~
% 61.41/8.95        aElement0(v4) |  ~ aElement0(v3) |  ~ aElement0(v2) | doDivides0(v2, xc))
% 61.41/8.95      &  ! [v2: $i] :  ! [v3: $i] :  ! [v4: $i] : ( ~ (sdtasdt0(v2, v4) = xa) |  ~
% 61.41/8.95        (sdtasdt0(v2, v3) = xb) |  ~ $i(v4) |  ~ $i(v3) |  ~ $i(v2) |  ~
% 61.41/8.95        aElement0(v4) |  ~ aElement0(v3) |  ~ aElement0(v2) |  ? [v5: $i] :
% 61.41/8.95        (sdtasdt0(v2, v5) = xc & $i(v5) & aElement0(v5))) &  ! [v2: $i] :  ! [v3:
% 61.41/8.95        $i] : ( ~ (sdtasdt0(v2, v3) = xb) |  ~ $i(v3) |  ~ $i(v2) |  ~
% 61.41/8.95        aDivisorOf0(v2, xa) |  ~ aElement0(v3) | doDivides0(v2, xc)) &  ! [v2: $i]
% 61.41/8.95      :  ! [v3: $i] : ( ~ (sdtasdt0(v2, v3) = xb) |  ~ $i(v3) |  ~ $i(v2) |  ~
% 61.41/8.95        aDivisorOf0(v2, xa) |  ~ aElement0(v3) |  ? [v4: $i] : (sdtasdt0(v2, v4) =
% 61.41/8.95          xc & $i(v4) & aElement0(v4))) &  ! [v2: $i] :  ! [v3: $i] : ( ~
% 61.41/8.95        (sdtasdt0(v2, v3) = xb) |  ~ $i(v3) |  ~ $i(v2) |  ~ doDivides0(v2, xa) | 
% 61.41/8.95        ~ aElement0(v3) |  ~ aElement0(v2) | doDivides0(v2, xc)) &  ! [v2: $i] : 
% 61.41/8.95      ! [v3: $i] : ( ~ (sdtasdt0(v2, v3) = xb) |  ~ $i(v3) |  ~ $i(v2) |  ~
% 61.41/8.95        doDivides0(v2, xa) |  ~ aElement0(v3) |  ~ aElement0(v2) |  ? [v4: $i] :
% 61.41/8.95        (sdtasdt0(v2, v4) = xc & $i(v4) & aElement0(v4))) &  ! [v2: $i] :  ! [v3:
% 61.41/8.95        $i] : ( ~ (sdtasdt0(v2, v3) = xa) |  ~ $i(v3) |  ~ $i(v2) |  ~
% 61.41/8.95        aDivisorOf0(v2, xb) |  ~ aElement0(v3) |  ~ aElement0(v2) | doDivides0(v2,
% 61.41/8.95          xc)) &  ! [v2: $i] :  ! [v3: $i] : ( ~ (sdtasdt0(v2, v3) = xa) |  ~
% 61.41/8.95        $i(v3) |  ~ $i(v2) |  ~ aDivisorOf0(v2, xb) |  ~ aElement0(v3) |  ~
% 61.41/8.95        aElement0(v2) |  ? [v4: $i] : (sdtasdt0(v2, v4) = xc & $i(v4) &
% 61.41/8.95          aElement0(v4))) &  ! [v2: $i] :  ! [v3: $i] : ( ~ (sdtasdt0(v2, v3) =
% 61.41/8.95          xa) |  ~ $i(v3) |  ~ $i(v2) |  ~ doDivides0(v2, xb) |  ~ aElement0(v3) |
% 61.41/8.95         ~ aElement0(v2) | doDivides0(v2, xc)) &  ! [v2: $i] :  ! [v3: $i] : ( ~
% 61.41/8.95        (sdtasdt0(v2, v3) = xa) |  ~ $i(v3) |  ~ $i(v2) |  ~ doDivides0(v2, xb) | 
% 61.41/8.95        ~ aElement0(v3) |  ~ aElement0(v2) |  ? [v4: $i] : (sdtasdt0(v2, v4) = xc
% 61.41/8.95          & $i(v4) & aElement0(v4))) &  ! [v2: $i] : ( ~ $i(v2) |  ~
% 61.41/8.95        aDivisorOf0(v2, xb) |  ~ aDivisorOf0(v2, xa) | doDivides0(v2, xc)) &  !
% 61.41/8.95      [v2: $i] : ( ~ $i(v2) |  ~ aDivisorOf0(v2, xb) |  ~ aDivisorOf0(v2, xa) |  ?
% 61.41/8.95        [v3: $i] : (sdtasdt0(v2, v3) = xc & $i(v3) & aElement0(v3))) &  ! [v2: $i]
% 61.41/8.95      : ( ~ $i(v2) |  ~ aDivisorOf0(v2, xb) |  ~ doDivides0(v2, xa) |  ~
% 61.41/8.95        aElement0(v2) | doDivides0(v2, xc)) &  ! [v2: $i] : ( ~ $i(v2) |  ~
% 61.41/8.95        aDivisorOf0(v2, xb) |  ~ doDivides0(v2, xa) |  ~ aElement0(v2) |  ? [v3:
% 61.41/8.95          $i] : (sdtasdt0(v2, v3) = xc & $i(v3) & aElement0(v3))) &  ! [v2: $i] :
% 61.41/8.95      ( ~ $i(v2) |  ~ aDivisorOf0(v2, xa) |  ~ doDivides0(v2, xb) | doDivides0(v2,
% 61.41/8.95          xc)) &  ! [v2: $i] : ( ~ $i(v2) |  ~ aDivisorOf0(v2, xa) |  ~
% 61.41/8.95        doDivides0(v2, xb) |  ? [v3: $i] : (sdtasdt0(v2, v3) = xc & $i(v3) &
% 61.41/8.95          aElement0(v3))) &  ! [v2: $i] : ( ~ $i(v2) |  ~ doDivides0(v2, xb) |  ~
% 61.41/8.95        doDivides0(v2, xa) |  ~ aElement0(v2) | doDivides0(v2, xc)) &  ! [v2: $i]
% 61.41/8.95      : ( ~ $i(v2) |  ~ doDivides0(v2, xb) |  ~ doDivides0(v2, xa) |  ~
% 61.41/8.95        aElement0(v2) |  ? [v3: $i] : (sdtasdt0(v2, v3) = xc & $i(v3) &
% 61.41/8.95          aElement0(v3))))
% 61.41/8.95  
% 61.41/8.95    (m__2174)
% 61.41/8.95    $i(xI) & $i(xb) & $i(xa) &  ? [v0: $i] :  ? [v1: $i] : (slsdtgt0(xb) = v1 &
% 61.41/8.95      slsdtgt0(xa) = v0 & sdtpldt1(v0, v1) = xI & $i(v1) & $i(v0) & aIdeal0(xI) &
% 61.41/8.95      aSet0(xI) &  ! [v2: $i] :  ! [v3: $i] :  ! [v4: $i] : ( ~ (sdtasdt0(v3, v2)
% 61.41/8.95          = v4) |  ~ $i(v3) |  ~ $i(v2) |  ~ aElementOf0(v2, xI) |  ~
% 61.41/8.95        aElement0(v3) | aElementOf0(v4, xI)) &  ! [v2: $i] :  ! [v3: $i] :  ! [v4:
% 61.41/8.95        $i] : ( ~ (sdtpldt0(v3, v4) = v2) |  ~ $i(v4) |  ~ $i(v3) |  ~ $i(v2) |  ~
% 61.41/8.95        aElementOf0(v4, v1) |  ~ aElementOf0(v3, v0) | aElementOf0(v2, xI)) &  !
% 61.41/8.95      [v2: $i] :  ! [v3: $i] :  ! [v4: $i] : ( ~ (sdtpldt0(v2, v3) = v4) |  ~
% 61.41/8.95        $i(v3) |  ~ $i(v2) |  ~ aElementOf0(v3, xI) |  ~ aElementOf0(v2, xI) |
% 61.41/8.95        aElementOf0(v4, xI)) &  ! [v2: $i] :  ! [v3: $i] : ( ~ (sdtasdt0(xb, v3) =
% 61.41/8.95          v2) |  ~ $i(v3) |  ~ $i(v2) |  ~ aElement0(v3) | aElementOf0(v2, v1)) & 
% 61.41/8.95      ! [v2: $i] :  ! [v3: $i] : ( ~ (sdtasdt0(xa, v3) = v2) |  ~ $i(v3) |  ~
% 61.41/8.95        $i(v2) |  ~ aElement0(v3) | aElementOf0(v2, v0)) &  ! [v2: $i] : ( ~
% 61.41/8.95        $i(v2) |  ~ aElementOf0(v2, v1) |  ? [v3: $i] : (sdtasdt0(xb, v3) = v2 &
% 61.41/8.95          $i(v3) & aElement0(v3))) &  ! [v2: $i] : ( ~ $i(v2) |  ~ aElementOf0(v2,
% 61.41/8.95          v0) |  ? [v3: $i] : (sdtasdt0(xa, v3) = v2 & $i(v3) & aElement0(v3))) & 
% 61.41/8.95      ! [v2: $i] : ( ~ $i(v2) |  ~ aElementOf0(v2, xI) |  ? [v3: $i] :  ? [v4: $i]
% 61.41/8.95        : (sdtpldt0(v3, v4) = v2 & $i(v4) & $i(v3) & aElementOf0(v4, v1) &
% 61.41/8.95          aElementOf0(v3, v0))))
% 61.41/8.95  
% 61.41/8.95    (m__2203)
% 61.41/8.95    $i(xb) & $i(xa) & $i(sz00) &  ? [v0: $i] :  ? [v1: $i] :  ? [v2: $i] :  ? [v3:
% 61.41/8.95      $i] :  ? [v4: $i] :  ? [v5: $i] : (slsdtgt0(xb) = v1 & slsdtgt0(xa) = v0 &
% 61.41/8.95      sdtasdt0(xb, v3) = sz00 & sdtasdt0(xb, v2) = xb & sdtasdt0(xa, v5) = sz00 &
% 61.41/8.95      sdtasdt0(xa, v4) = xa & $i(v5) & $i(v4) & $i(v3) & $i(v2) & $i(v1) & $i(v0)
% 61.41/8.95      & aElementOf0(xb, v1) & aElementOf0(xa, v0) & aElementOf0(sz00, v1) &
% 61.41/8.95      aElementOf0(sz00, v0) & aElement0(v5) & aElement0(v4) & aElement0(v3) &
% 61.41/8.95      aElement0(v2))
% 61.41/8.95  
% 61.41/8.95    (m__2228)
% 61.41/8.96    $i(xb) & $i(xa) & $i(sz00) &  ? [v0: $i] :  ? [v1: $i] :  ? [v2: $i] :  ? [v3:
% 61.41/8.96      $i] :  ? [v4: $i] :  ? [v5: $i] : ( ~ (v3 = sz00) & slsdtgt0(xb) = v1 &
% 61.41/8.96      slsdtgt0(xa) = v0 & sdtpldt1(v0, v1) = v2 & sdtpldt0(v4, v5) = v3 & $i(v5) &
% 61.41/8.96      $i(v4) & $i(v3) & $i(v2) & $i(v1) & $i(v0) & aElementOf0(v5, v1) &
% 61.41/8.96      aElementOf0(v4, v0) & aElementOf0(v3, v2) &  ! [v6: $i] :  ! [v7: $i] : ( ~
% 61.41/8.96        (sdtasdt0(xb, v7) = v6) |  ~ $i(v7) |  ~ $i(v6) |  ~ aElement0(v7) |
% 61.41/8.96        aElementOf0(v6, v1)) &  ! [v6: $i] :  ! [v7: $i] : ( ~ (sdtasdt0(xa, v7) =
% 61.41/8.96          v6) |  ~ $i(v7) |  ~ $i(v6) |  ~ aElement0(v7) | aElementOf0(v6, v0)) & 
% 61.41/8.96      ! [v6: $i] : ( ~ $i(v6) |  ~ aElementOf0(v6, v1) |  ? [v7: $i] :
% 61.41/8.96        (sdtasdt0(xb, v7) = v6 & $i(v7) & aElement0(v7))) &  ! [v6: $i] : ( ~
% 61.41/8.96        $i(v6) |  ~ aElementOf0(v6, v0) |  ? [v7: $i] : (sdtasdt0(xa, v7) = v6 &
% 61.41/8.96          $i(v7) & aElement0(v7))))
% 61.41/8.96  
% 61.41/8.96    (m__2273)
% 61.41/8.96    $i(xu) & $i(xI) & $i(xb) & $i(xa) & $i(sz00) &  ? [v0: $i] :  ? [v1: $i] :  ?
% 61.41/8.96    [v2: $i] :  ? [v3: $i] :  ? [v4: $i] : ( ~ (xu = sz00) & slsdtgt0(xb) = v1 &
% 61.41/8.96      slsdtgt0(xa) = v0 & sbrdtbr0(xu) = v2 & sdtpldt0(v3, v4) = xu & $i(v4) &
% 61.41/8.96      $i(v3) & $i(v2) & $i(v1) & $i(v0) & aElementOf0(v4, v1) & aElementOf0(v3,
% 61.41/8.96        v0) & aElementOf0(xu, xI) &  ! [v5: $i] :  ! [v6: $i] :  ! [v7: $i] :  !
% 61.41/8.96      [v8: $i] : (v5 = sz00 |  ~ (sbrdtbr0(v5) = v6) |  ~ (sdtpldt0(v7, v8) = v5)
% 61.41/8.96        |  ~ $i(v8) |  ~ $i(v7) |  ~ $i(v5) |  ~ iLess0(v6, v2) |  ~
% 61.41/8.96        aElementOf0(v8, v1) |  ~ aElementOf0(v7, v0)) &  ! [v5: $i] :  ! [v6: $i]
% 61.41/8.96      : (v5 = sz00 |  ~ (sbrdtbr0(v5) = v6) |  ~ $i(v5) |  ~ iLess0(v6, v2) |  ~
% 61.41/8.96        aElementOf0(v5, xI)))
% 61.41/8.96  
% 61.41/8.96    (function-axioms)
% 61.41/8.96     ! [v0: $i] :  ! [v1: $i] :  ! [v2: $i] :  ! [v3: $i] : (v1 = v0 |  ~
% 61.41/8.96      (sdtasasdt0(v3, v2) = v1) |  ~ (sdtasasdt0(v3, v2) = v0)) &  ! [v0: $i] :  !
% 61.41/8.96    [v1: $i] :  ! [v2: $i] :  ! [v3: $i] : (v1 = v0 |  ~ (sdtpldt1(v3, v2) = v1) |
% 61.41/8.96       ~ (sdtpldt1(v3, v2) = v0)) &  ! [v0: $i] :  ! [v1: $i] :  ! [v2: $i] :  !
% 61.41/8.96    [v3: $i] : (v1 = v0 |  ~ (sdtasdt0(v3, v2) = v1) |  ~ (sdtasdt0(v3, v2) = v0))
% 61.41/8.96    &  ! [v0: $i] :  ! [v1: $i] :  ! [v2: $i] :  ! [v3: $i] : (v1 = v0 |  ~
% 61.41/8.96      (sdtpldt0(v3, v2) = v1) |  ~ (sdtpldt0(v3, v2) = v0)) &  ! [v0: $i] :  !
% 61.41/8.96    [v1: $i] :  ! [v2: $i] : (v1 = v0 |  ~ (slsdtgt0(v2) = v1) |  ~ (slsdtgt0(v2)
% 61.41/8.96        = v0)) &  ! [v0: $i] :  ! [v1: $i] :  ! [v2: $i] : (v1 = v0 |  ~
% 61.41/8.96      (sbrdtbr0(v2) = v1) |  ~ (sbrdtbr0(v2) = v0)) &  ! [v0: $i] :  ! [v1: $i] : 
% 61.41/8.96    ! [v2: $i] : (v1 = v0 |  ~ (smndt0(v2) = v1) |  ~ (smndt0(v2) = v0))
% 61.41/8.96  
% 61.41/8.96  Further assumptions not needed in the proof:
% 61.41/8.96  --------------------------------------------
% 61.41/8.96  mAMDistr, mAddAsso, mAddComm, mAddInvr, mAddZero, mCancel, mChineseRemainder,
% 61.41/8.96  mDefDiv, mDefDvs, mDefGCD, mDefIdeal, mDefMod, mDefRel, mDefSInt, mDefSSum,
% 61.41/8.96  mDivision, mEOfElem, mElmSort, mEucSort, mIdeInt, mIdeSum, mMulAsso, mMulMnOne,
% 61.41/8.96  mMulUnit, mMulZero, mNatLess, mNatSort, mPrIdeal, mSetEq, mSetSort, mSortsB,
% 61.41/8.96  mSortsB_02, mSortsC, mSortsC_01, mSortsU, mUnNeZr, m__2110, m__2383
% 61.41/8.96  
% 61.41/8.96  Those formulas are unsatisfiable:
% 61.41/8.96  ---------------------------------
% 61.41/8.96  
% 61.41/8.96  Begin of proof
% 61.41/8.96  | 
% 61.41/8.96  | ALPHA: (mDefPrIdeal) implies:
% 61.41/8.96  |   (1)   ! [v0: $i] :  ! [v1: $i] :  ! [v2: $i] : ( ~ (slsdtgt0(v0) = v1) |  ~
% 61.41/8.96  |          $i(v2) |  ~ $i(v1) |  ~ $i(v0) |  ~ aElementOf0(v2, v1) |  ~
% 61.41/8.96  |          aElement0(v0) |  ? [v3: $i] : (sdtasdt0(v0, v3) = v2 & $i(v3) &
% 61.41/8.96  |            aElement0(v3)))
% 61.41/8.96  | 
% 61.41/8.96  | ALPHA: (m__2091) implies:
% 61.41/8.96  |   (2)  aElement0(xa)
% 61.41/8.96  |   (3)  aElement0(xb)
% 61.41/8.96  | 
% 61.41/8.96  | ALPHA: (m__2129) implies:
% 61.41/8.97  |   (4)  $i(xc)
% 61.41/8.97  |   (5)   ? [v0: $i] :  ? [v1: $i] : (sdtasdt0(xc, v1) = xa & sdtasdt0(xc, v0) =
% 61.41/8.97  |          xb & $i(v1) & $i(v0) & aGcdOfAnd0(xc, xa, xb) & aDivisorOf0(xc, xb) &
% 61.41/8.97  |          aDivisorOf0(xc, xa) & doDivides0(xc, xb) & doDivides0(xc, xa) &
% 61.41/8.97  |          aElement0(v1) & aElement0(v0) & aElement0(xc) &  ! [v2: $i] :  ! [v3:
% 61.41/8.97  |            $i] :  ! [v4: $i] : ( ~ (sdtasdt0(v2, v4) = xa) |  ~ (sdtasdt0(v2,
% 61.41/8.97  |                v3) = xb) |  ~ $i(v4) |  ~ $i(v3) |  ~ $i(v2) |  ~
% 61.41/8.97  |            aElement0(v4) |  ~ aElement0(v3) |  ~ aElement0(v2) |
% 61.41/8.97  |            doDivides0(v2, xc)) &  ! [v2: $i] :  ! [v3: $i] :  ! [v4: $i] : ( ~
% 61.41/8.97  |            (sdtasdt0(v2, v4) = xa) |  ~ (sdtasdt0(v2, v3) = xb) |  ~ $i(v4) | 
% 61.41/8.97  |            ~ $i(v3) |  ~ $i(v2) |  ~ aElement0(v4) |  ~ aElement0(v3) |  ~
% 61.41/8.97  |            aElement0(v2) |  ? [v5: $i] : (sdtasdt0(v2, v5) = xc & $i(v5) &
% 61.41/8.97  |              aElement0(v5))) &  ! [v2: $i] :  ! [v3: $i] : ( ~ (sdtasdt0(v2,
% 61.41/8.97  |                v3) = xb) |  ~ $i(v3) |  ~ $i(v2) |  ~ aDivisorOf0(v2, xa) |  ~
% 61.41/8.97  |            aElement0(v3) | doDivides0(v2, xc)) &  ! [v2: $i] :  ! [v3: $i] : (
% 61.41/8.97  |            ~ (sdtasdt0(v2, v3) = xb) |  ~ $i(v3) |  ~ $i(v2) |  ~
% 61.41/8.97  |            aDivisorOf0(v2, xa) |  ~ aElement0(v3) |  ? [v4: $i] :
% 61.41/8.97  |            (sdtasdt0(v2, v4) = xc & $i(v4) & aElement0(v4))) &  ! [v2: $i] : 
% 61.41/8.97  |          ! [v3: $i] : ( ~ (sdtasdt0(v2, v3) = xb) |  ~ $i(v3) |  ~ $i(v2) |  ~
% 61.41/8.97  |            doDivides0(v2, xa) |  ~ aElement0(v3) |  ~ aElement0(v2) |
% 61.41/8.97  |            doDivides0(v2, xc)) &  ! [v2: $i] :  ! [v3: $i] : ( ~ (sdtasdt0(v2,
% 61.41/8.97  |                v3) = xb) |  ~ $i(v3) |  ~ $i(v2) |  ~ doDivides0(v2, xa) |  ~
% 61.41/8.97  |            aElement0(v3) |  ~ aElement0(v2) |  ? [v4: $i] : (sdtasdt0(v2, v4)
% 61.41/8.97  |              = xc & $i(v4) & aElement0(v4))) &  ! [v2: $i] :  ! [v3: $i] : ( ~
% 61.41/8.97  |            (sdtasdt0(v2, v3) = xa) |  ~ $i(v3) |  ~ $i(v2) |  ~
% 61.41/8.97  |            aDivisorOf0(v2, xb) |  ~ aElement0(v3) |  ~ aElement0(v2) |
% 61.41/8.97  |            doDivides0(v2, xc)) &  ! [v2: $i] :  ! [v3: $i] : ( ~ (sdtasdt0(v2,
% 61.41/8.97  |                v3) = xa) |  ~ $i(v3) |  ~ $i(v2) |  ~ aDivisorOf0(v2, xb) |  ~
% 61.41/8.97  |            aElement0(v3) |  ~ aElement0(v2) |  ? [v4: $i] : (sdtasdt0(v2, v4)
% 61.41/8.97  |              = xc & $i(v4) & aElement0(v4))) &  ! [v2: $i] :  ! [v3: $i] : ( ~
% 61.41/8.97  |            (sdtasdt0(v2, v3) = xa) |  ~ $i(v3) |  ~ $i(v2) |  ~ doDivides0(v2,
% 61.41/8.97  |              xb) |  ~ aElement0(v3) |  ~ aElement0(v2) | doDivides0(v2, xc)) &
% 61.41/8.97  |           ! [v2: $i] :  ! [v3: $i] : ( ~ (sdtasdt0(v2, v3) = xa) |  ~ $i(v3) |
% 61.41/8.97  |             ~ $i(v2) |  ~ doDivides0(v2, xb) |  ~ aElement0(v3) |  ~
% 61.41/8.97  |            aElement0(v2) |  ? [v4: $i] : (sdtasdt0(v2, v4) = xc & $i(v4) &
% 61.41/8.97  |              aElement0(v4))) &  ! [v2: $i] : ( ~ $i(v2) |  ~ aDivisorOf0(v2,
% 61.41/8.97  |              xb) |  ~ aDivisorOf0(v2, xa) | doDivides0(v2, xc)) &  ! [v2: $i]
% 61.41/8.97  |          : ( ~ $i(v2) |  ~ aDivisorOf0(v2, xb) |  ~ aDivisorOf0(v2, xa) |  ?
% 61.41/8.97  |            [v3: $i] : (sdtasdt0(v2, v3) = xc & $i(v3) & aElement0(v3))) &  !
% 61.41/8.97  |          [v2: $i] : ( ~ $i(v2) |  ~ aDivisorOf0(v2, xb) |  ~ doDivides0(v2,
% 61.41/8.97  |              xa) |  ~ aElement0(v2) | doDivides0(v2, xc)) &  ! [v2: $i] : ( ~
% 61.41/8.97  |            $i(v2) |  ~ aDivisorOf0(v2, xb) |  ~ doDivides0(v2, xa) |  ~
% 61.41/8.97  |            aElement0(v2) |  ? [v3: $i] : (sdtasdt0(v2, v3) = xc & $i(v3) &
% 61.41/8.97  |              aElement0(v3))) &  ! [v2: $i] : ( ~ $i(v2) |  ~ aDivisorOf0(v2,
% 61.41/8.97  |              xa) |  ~ doDivides0(v2, xb) | doDivides0(v2, xc)) &  ! [v2: $i] :
% 61.41/8.97  |          ( ~ $i(v2) |  ~ aDivisorOf0(v2, xa) |  ~ doDivides0(v2, xb) |  ? [v3:
% 61.41/8.97  |              $i] : (sdtasdt0(v2, v3) = xc & $i(v3) & aElement0(v3))) &  ! [v2:
% 61.41/8.97  |            $i] : ( ~ $i(v2) |  ~ doDivides0(v2, xb) |  ~ doDivides0(v2, xa) | 
% 61.41/8.97  |            ~ aElement0(v2) | doDivides0(v2, xc)) &  ! [v2: $i] : ( ~ $i(v2) | 
% 61.41/8.97  |            ~ doDivides0(v2, xb) |  ~ doDivides0(v2, xa) |  ~ aElement0(v2) | 
% 61.41/8.97  |            ? [v3: $i] : (sdtasdt0(v2, v3) = xc & $i(v3) & aElement0(v3))))
% 61.41/8.97  | 
% 61.41/8.97  | ALPHA: (m__2174) implies:
% 61.41/8.98  |   (6)   ? [v0: $i] :  ? [v1: $i] : (slsdtgt0(xb) = v1 & slsdtgt0(xa) = v0 &
% 61.41/8.98  |          sdtpldt1(v0, v1) = xI & $i(v1) & $i(v0) & aIdeal0(xI) & aSet0(xI) & 
% 61.41/8.98  |          ! [v2: $i] :  ! [v3: $i] :  ! [v4: $i] : ( ~ (sdtasdt0(v3, v2) = v4)
% 61.41/8.98  |            |  ~ $i(v3) |  ~ $i(v2) |  ~ aElementOf0(v2, xI) |  ~ aElement0(v3)
% 61.41/8.98  |            | aElementOf0(v4, xI)) &  ! [v2: $i] :  ! [v3: $i] :  ! [v4: $i] :
% 61.41/8.98  |          ( ~ (sdtpldt0(v3, v4) = v2) |  ~ $i(v4) |  ~ $i(v3) |  ~ $i(v2) |  ~
% 61.41/8.98  |            aElementOf0(v4, v1) |  ~ aElementOf0(v3, v0) | aElementOf0(v2, xI))
% 61.41/8.98  |          &  ! [v2: $i] :  ! [v3: $i] :  ! [v4: $i] : ( ~ (sdtpldt0(v2, v3) =
% 61.41/8.98  |              v4) |  ~ $i(v3) |  ~ $i(v2) |  ~ aElementOf0(v3, xI) |  ~
% 61.41/8.98  |            aElementOf0(v2, xI) | aElementOf0(v4, xI)) &  ! [v2: $i] :  ! [v3:
% 61.41/8.98  |            $i] : ( ~ (sdtasdt0(xb, v3) = v2) |  ~ $i(v3) |  ~ $i(v2) |  ~
% 61.41/8.98  |            aElement0(v3) | aElementOf0(v2, v1)) &  ! [v2: $i] :  ! [v3: $i] :
% 61.41/8.98  |          ( ~ (sdtasdt0(xa, v3) = v2) |  ~ $i(v3) |  ~ $i(v2) |  ~
% 61.41/8.98  |            aElement0(v3) | aElementOf0(v2, v0)) &  ! [v2: $i] : ( ~ $i(v2) | 
% 61.41/8.98  |            ~ aElementOf0(v2, v1) |  ? [v3: $i] : (sdtasdt0(xb, v3) = v2 &
% 61.41/8.98  |              $i(v3) & aElement0(v3))) &  ! [v2: $i] : ( ~ $i(v2) |  ~
% 61.41/8.98  |            aElementOf0(v2, v0) |  ? [v3: $i] : (sdtasdt0(xa, v3) = v2 & $i(v3)
% 61.41/8.98  |              & aElement0(v3))) &  ! [v2: $i] : ( ~ $i(v2) |  ~ aElementOf0(v2,
% 61.41/8.98  |              xI) |  ? [v3: $i] :  ? [v4: $i] : (sdtpldt0(v3, v4) = v2 & $i(v4)
% 61.41/8.98  |              & $i(v3) & aElementOf0(v4, v1) & aElementOf0(v3, v0))))
% 61.41/8.98  | 
% 61.41/8.98  | ALPHA: (m__2203) implies:
% 61.41/8.98  |   (7)   ? [v0: $i] :  ? [v1: $i] :  ? [v2: $i] :  ? [v3: $i] :  ? [v4: $i] : 
% 61.41/8.98  |        ? [v5: $i] : (slsdtgt0(xb) = v1 & slsdtgt0(xa) = v0 & sdtasdt0(xb, v3)
% 61.41/8.98  |          = sz00 & sdtasdt0(xb, v2) = xb & sdtasdt0(xa, v5) = sz00 &
% 61.41/8.98  |          sdtasdt0(xa, v4) = xa & $i(v5) & $i(v4) & $i(v3) & $i(v2) & $i(v1) &
% 61.41/8.98  |          $i(v0) & aElementOf0(xb, v1) & aElementOf0(xa, v0) &
% 61.41/8.98  |          aElementOf0(sz00, v1) & aElementOf0(sz00, v0) & aElement0(v5) &
% 61.41/8.98  |          aElement0(v4) & aElement0(v3) & aElement0(v2))
% 61.41/8.98  | 
% 61.41/8.98  | ALPHA: (m__2228) implies:
% 62.12/8.98  |   (8)   ? [v0: $i] :  ? [v1: $i] :  ? [v2: $i] :  ? [v3: $i] :  ? [v4: $i] : 
% 62.12/8.98  |        ? [v5: $i] : ( ~ (v3 = sz00) & slsdtgt0(xb) = v1 & slsdtgt0(xa) = v0 &
% 62.12/8.98  |          sdtpldt1(v0, v1) = v2 & sdtpldt0(v4, v5) = v3 & $i(v5) & $i(v4) &
% 62.12/8.98  |          $i(v3) & $i(v2) & $i(v1) & $i(v0) & aElementOf0(v5, v1) &
% 62.12/8.98  |          aElementOf0(v4, v0) & aElementOf0(v3, v2) &  ! [v6: $i] :  ! [v7: $i]
% 62.12/8.98  |          : ( ~ (sdtasdt0(xb, v7) = v6) |  ~ $i(v7) |  ~ $i(v6) |  ~
% 62.12/8.98  |            aElement0(v7) | aElementOf0(v6, v1)) &  ! [v6: $i] :  ! [v7: $i] :
% 62.12/8.98  |          ( ~ (sdtasdt0(xa, v7) = v6) |  ~ $i(v7) |  ~ $i(v6) |  ~
% 62.12/8.98  |            aElement0(v7) | aElementOf0(v6, v0)) &  ! [v6: $i] : ( ~ $i(v6) | 
% 62.12/8.98  |            ~ aElementOf0(v6, v1) |  ? [v7: $i] : (sdtasdt0(xb, v7) = v6 &
% 62.12/8.98  |              $i(v7) & aElement0(v7))) &  ! [v6: $i] : ( ~ $i(v6) |  ~
% 62.12/8.98  |            aElementOf0(v6, v0) |  ? [v7: $i] : (sdtasdt0(xa, v7) = v6 & $i(v7)
% 62.12/8.98  |              & aElement0(v7))))
% 62.12/8.98  | 
% 62.12/8.98  | ALPHA: (m__2273) implies:
% 62.12/8.98  |   (9)   ? [v0: $i] :  ? [v1: $i] :  ? [v2: $i] :  ? [v3: $i] :  ? [v4: $i] : (
% 62.12/8.98  |          ~ (xu = sz00) & slsdtgt0(xb) = v1 & slsdtgt0(xa) = v0 & sbrdtbr0(xu)
% 62.12/8.98  |          = v2 & sdtpldt0(v3, v4) = xu & $i(v4) & $i(v3) & $i(v2) & $i(v1) &
% 62.12/8.98  |          $i(v0) & aElementOf0(v4, v1) & aElementOf0(v3, v0) & aElementOf0(xu,
% 62.12/8.98  |            xI) &  ! [v5: $i] :  ! [v6: $i] :  ! [v7: $i] :  ! [v8: $i] : (v5 =
% 62.12/8.98  |            sz00 |  ~ (sbrdtbr0(v5) = v6) |  ~ (sdtpldt0(v7, v8) = v5) |  ~
% 62.12/8.98  |            $i(v8) |  ~ $i(v7) |  ~ $i(v5) |  ~ iLess0(v6, v2) |  ~
% 62.12/8.98  |            aElementOf0(v8, v1) |  ~ aElementOf0(v7, v0)) &  ! [v5: $i] :  !
% 62.12/8.98  |          [v6: $i] : (v5 = sz00 |  ~ (sbrdtbr0(v5) = v6) |  ~ $i(v5) |  ~
% 62.12/8.98  |            iLess0(v6, v2) |  ~ aElementOf0(v5, xI)))
% 62.12/8.98  | 
% 62.12/8.98  | ALPHA: (m__) implies:
% 62.12/8.98  |   (10)   ! [v0: $i] :  ! [v1: $i] :  ! [v2: $i] :  ! [v3: $i] : ( ~
% 62.12/8.98  |           (sdtasdt0(xb, v1) = v3) |  ~ (sdtasdt0(xa, v0) = v2) |  ~
% 62.12/8.98  |           (sdtpldt0(v2, v3) = xu) |  ~ $i(v1) |  ~ $i(v0) |  ~ aElement0(v1) |
% 62.12/8.98  |            ~ aElement0(v0))
% 62.12/8.98  | 
% 62.12/8.98  | ALPHA: (function-axioms) implies:
% 62.12/8.99  |   (11)   ! [v0: $i] :  ! [v1: $i] :  ! [v2: $i] : (v1 = v0 |  ~ (slsdtgt0(v2)
% 62.12/8.99  |             = v1) |  ~ (slsdtgt0(v2) = v0))
% 62.12/8.99  | 
% 62.12/8.99  | DELTA: instantiating (7) with fresh symbols all_38_0, all_38_1, all_38_2,
% 62.12/8.99  |        all_38_3, all_38_4, all_38_5 gives:
% 62.12/8.99  |   (12)  slsdtgt0(xb) = all_38_4 & slsdtgt0(xa) = all_38_5 & sdtasdt0(xb,
% 62.12/8.99  |           all_38_2) = sz00 & sdtasdt0(xb, all_38_3) = xb & sdtasdt0(xa,
% 62.12/8.99  |           all_38_0) = sz00 & sdtasdt0(xa, all_38_1) = xa & $i(all_38_0) &
% 62.12/8.99  |         $i(all_38_1) & $i(all_38_2) & $i(all_38_3) & $i(all_38_4) &
% 62.12/8.99  |         $i(all_38_5) & aElementOf0(xb, all_38_4) & aElementOf0(xa, all_38_5) &
% 62.12/8.99  |         aElementOf0(sz00, all_38_4) & aElementOf0(sz00, all_38_5) &
% 62.12/8.99  |         aElement0(all_38_0) & aElement0(all_38_1) & aElement0(all_38_2) &
% 62.12/8.99  |         aElement0(all_38_3)
% 62.12/8.99  | 
% 62.12/8.99  | ALPHA: (12) implies:
% 62.12/8.99  |   (13)  slsdtgt0(xa) = all_38_5
% 62.12/8.99  |   (14)  slsdtgt0(xb) = all_38_4
% 62.12/8.99  | 
% 62.12/8.99  | DELTA: instantiating (9) with fresh symbols all_40_0, all_40_1, all_40_2,
% 62.12/8.99  |        all_40_3, all_40_4 gives:
% 62.12/8.99  |   (15)   ~ (xu = sz00) & slsdtgt0(xb) = all_40_3 & slsdtgt0(xa) = all_40_4 &
% 62.12/8.99  |         sbrdtbr0(xu) = all_40_2 & sdtpldt0(all_40_1, all_40_0) = xu &
% 62.12/8.99  |         $i(all_40_0) & $i(all_40_1) & $i(all_40_2) & $i(all_40_3) &
% 62.12/8.99  |         $i(all_40_4) & aElementOf0(all_40_0, all_40_3) & aElementOf0(all_40_1,
% 62.12/8.99  |           all_40_4) & aElementOf0(xu, xI) &  ! [v0: $i] :  ! [v1: $i] :  !
% 62.12/8.99  |         [v2: $i] :  ! [v3: $i] : (v0 = sz00 |  ~ (sbrdtbr0(v0) = v1) |  ~
% 62.12/8.99  |           (sdtpldt0(v2, v3) = v0) |  ~ $i(v3) |  ~ $i(v2) |  ~ $i(v0) |  ~
% 62.12/8.99  |           iLess0(v1, all_40_2) |  ~ aElementOf0(v3, all_40_3) |  ~
% 62.12/8.99  |           aElementOf0(v2, all_40_4)) &  ! [v0: $i] :  ! [v1: $i] : (v0 = sz00
% 62.12/8.99  |           |  ~ (sbrdtbr0(v0) = v1) |  ~ $i(v0) |  ~ iLess0(v1, all_40_2) |  ~
% 62.12/8.99  |           aElementOf0(v0, xI))
% 62.12/8.99  | 
% 62.12/8.99  | ALPHA: (15) implies:
% 62.12/8.99  |   (16)  aElementOf0(all_40_1, all_40_4)
% 62.12/8.99  |   (17)  aElementOf0(all_40_0, all_40_3)
% 62.12/8.99  |   (18)  $i(all_40_4)
% 62.12/8.99  |   (19)  $i(all_40_3)
% 62.12/8.99  |   (20)  $i(all_40_1)
% 62.12/8.99  |   (21)  $i(all_40_0)
% 62.12/8.99  |   (22)  sdtpldt0(all_40_1, all_40_0) = xu
% 62.12/8.99  |   (23)  slsdtgt0(xa) = all_40_4
% 62.12/8.99  |   (24)  slsdtgt0(xb) = all_40_3
% 62.12/8.99  | 
% 62.12/8.99  | DELTA: instantiating (8) with fresh symbols all_43_0, all_43_1, all_43_2,
% 62.12/8.99  |        all_43_3, all_43_4, all_43_5 gives:
% 62.12/8.99  |   (25)   ~ (all_43_2 = sz00) & slsdtgt0(xb) = all_43_4 & slsdtgt0(xa) =
% 62.12/8.99  |         all_43_5 & sdtpldt1(all_43_5, all_43_4) = all_43_3 &
% 62.12/8.99  |         sdtpldt0(all_43_1, all_43_0) = all_43_2 & $i(all_43_0) & $i(all_43_1)
% 62.12/8.99  |         & $i(all_43_2) & $i(all_43_3) & $i(all_43_4) & $i(all_43_5) &
% 62.12/8.99  |         aElementOf0(all_43_0, all_43_4) & aElementOf0(all_43_1, all_43_5) &
% 62.12/8.99  |         aElementOf0(all_43_2, all_43_3) &  ! [v0: $i] :  ! [v1: $i] : ( ~
% 62.12/8.99  |           (sdtasdt0(xb, v1) = v0) |  ~ $i(v1) |  ~ $i(v0) |  ~ aElement0(v1) |
% 62.12/8.99  |           aElementOf0(v0, all_43_4)) &  ! [v0: $i] :  ! [v1: $i] : ( ~
% 62.12/8.99  |           (sdtasdt0(xa, v1) = v0) |  ~ $i(v1) |  ~ $i(v0) |  ~ aElement0(v1) |
% 62.12/8.99  |           aElementOf0(v0, all_43_5)) &  ! [v0: $i] : ( ~ $i(v0) |  ~
% 62.12/8.99  |           aElementOf0(v0, all_43_4) |  ? [v1: $i] : (sdtasdt0(xb, v1) = v0 &
% 62.12/8.99  |             $i(v1) & aElement0(v1))) &  ! [v0: $i] : ( ~ $i(v0) |  ~
% 62.12/8.99  |           aElementOf0(v0, all_43_5) |  ? [v1: $i] : (sdtasdt0(xa, v1) = v0 &
% 62.12/8.99  |             $i(v1) & aElement0(v1)))
% 62.12/8.99  | 
% 62.12/8.99  | ALPHA: (25) implies:
% 62.12/8.99  |   (26)  slsdtgt0(xa) = all_43_5
% 62.12/8.99  |   (27)  slsdtgt0(xb) = all_43_4
% 62.12/8.99  | 
% 62.12/8.99  | DELTA: instantiating (6) with fresh symbols all_46_0, all_46_1 gives:
% 62.12/9.00  |   (28)  slsdtgt0(xb) = all_46_0 & slsdtgt0(xa) = all_46_1 & sdtpldt1(all_46_1,
% 62.12/9.00  |           all_46_0) = xI & $i(all_46_0) & $i(all_46_1) & aIdeal0(xI) &
% 62.12/9.00  |         aSet0(xI) &  ! [v0: $i] :  ! [v1: $i] :  ! [v2: $i] : ( ~
% 62.12/9.00  |           (sdtasdt0(v1, v0) = v2) |  ~ $i(v1) |  ~ $i(v0) |  ~ aElementOf0(v0,
% 62.12/9.00  |             xI) |  ~ aElement0(v1) | aElementOf0(v2, xI)) &  ! [v0: $i] :  !
% 62.12/9.00  |         [v1: $i] :  ! [v2: $i] : ( ~ (sdtpldt0(v1, v2) = v0) |  ~ $i(v2) |  ~
% 62.12/9.00  |           $i(v1) |  ~ $i(v0) |  ~ aElementOf0(v2, all_46_0) |  ~
% 62.12/9.00  |           aElementOf0(v1, all_46_1) | aElementOf0(v0, xI)) &  ! [v0: $i] :  !
% 62.12/9.00  |         [v1: $i] :  ! [v2: $i] : ( ~ (sdtpldt0(v0, v1) = v2) |  ~ $i(v1) |  ~
% 62.12/9.00  |           $i(v0) |  ~ aElementOf0(v1, xI) |  ~ aElementOf0(v0, xI) |
% 62.12/9.00  |           aElementOf0(v2, xI)) &  ! [v0: $i] :  ! [v1: $i] : ( ~ (sdtasdt0(xb,
% 62.12/9.00  |               v1) = v0) |  ~ $i(v1) |  ~ $i(v0) |  ~ aElement0(v1) |
% 62.12/9.00  |           aElementOf0(v0, all_46_0)) &  ! [v0: $i] :  ! [v1: $i] : ( ~
% 62.12/9.00  |           (sdtasdt0(xa, v1) = v0) |  ~ $i(v1) |  ~ $i(v0) |  ~ aElement0(v1) |
% 62.12/9.00  |           aElementOf0(v0, all_46_1)) &  ! [v0: $i] : ( ~ $i(v0) |  ~
% 62.12/9.00  |           aElementOf0(v0, all_46_0) |  ? [v1: $i] : (sdtasdt0(xb, v1) = v0 &
% 62.12/9.00  |             $i(v1) & aElement0(v1))) &  ! [v0: $i] : ( ~ $i(v0) |  ~
% 62.12/9.00  |           aElementOf0(v0, all_46_1) |  ? [v1: $i] : (sdtasdt0(xa, v1) = v0 &
% 62.12/9.00  |             $i(v1) & aElement0(v1))) &  ! [v0: $i] : ( ~ $i(v0) |  ~
% 62.12/9.00  |           aElementOf0(v0, xI) |  ? [v1: $i] :  ? [v2: $i] : (sdtpldt0(v1, v2)
% 62.12/9.00  |             = v0 & $i(v2) & $i(v1) & aElementOf0(v2, all_46_0) &
% 62.12/9.00  |             aElementOf0(v1, all_46_1)))
% 62.12/9.00  | 
% 62.12/9.00  | ALPHA: (28) implies:
% 62.12/9.00  |   (29)  slsdtgt0(xa) = all_46_1
% 62.12/9.00  |   (30)  slsdtgt0(xb) = all_46_0
% 62.12/9.00  | 
% 62.12/9.00  | DELTA: instantiating (5) with fresh symbols all_49_0, all_49_1 gives:
% 62.12/9.00  |   (31)  sdtasdt0(xc, all_49_0) = xa & sdtasdt0(xc, all_49_1) = xb &
% 62.12/9.00  |         $i(all_49_0) & $i(all_49_1) & aGcdOfAnd0(xc, xa, xb) & aDivisorOf0(xc,
% 62.12/9.00  |           xb) & aDivisorOf0(xc, xa) & doDivides0(xc, xb) & doDivides0(xc, xa)
% 62.12/9.00  |         & aElement0(all_49_0) & aElement0(all_49_1) & aElement0(xc) &  ! [v0:
% 62.12/9.00  |           $i] :  ! [v1: $i] :  ! [v2: $i] : ( ~ (sdtasdt0(v0, v2) = xa) |  ~
% 62.12/9.00  |           (sdtasdt0(v0, v1) = xb) |  ~ $i(v2) |  ~ $i(v1) |  ~ $i(v0) |  ~
% 62.12/9.00  |           aElement0(v2) |  ~ aElement0(v1) |  ~ aElement0(v0) | doDivides0(v0,
% 62.12/9.00  |             xc)) &  ! [v0: $i] :  ! [v1: $i] :  ! [v2: $i] : ( ~ (sdtasdt0(v0,
% 62.12/9.00  |               v2) = xa) |  ~ (sdtasdt0(v0, v1) = xb) |  ~ $i(v2) |  ~ $i(v1) |
% 62.12/9.00  |            ~ $i(v0) |  ~ aElement0(v2) |  ~ aElement0(v1) |  ~ aElement0(v0) |
% 62.12/9.00  |            ? [v3: $i] : (sdtasdt0(v0, v3) = xc & $i(v3) & aElement0(v3))) &  !
% 62.12/9.00  |         [v0: $i] :  ! [v1: $i] : ( ~ (sdtasdt0(v0, v1) = xb) |  ~ $i(v1) |  ~
% 62.12/9.00  |           $i(v0) |  ~ aDivisorOf0(v0, xa) |  ~ aElement0(v1) | doDivides0(v0,
% 62.12/9.00  |             xc)) &  ! [v0: $i] :  ! [v1: $i] : ( ~ (sdtasdt0(v0, v1) = xb) | 
% 62.12/9.00  |           ~ $i(v1) |  ~ $i(v0) |  ~ aDivisorOf0(v0, xa) |  ~ aElement0(v1) | 
% 62.12/9.00  |           ? [v2: $i] : (sdtasdt0(v0, v2) = xc & $i(v2) & aElement0(v2))) &  !
% 62.12/9.00  |         [v0: $i] :  ! [v1: $i] : ( ~ (sdtasdt0(v0, v1) = xb) |  ~ $i(v1) |  ~
% 62.12/9.00  |           $i(v0) |  ~ doDivides0(v0, xa) |  ~ aElement0(v1) |  ~ aElement0(v0)
% 62.12/9.00  |           | doDivides0(v0, xc)) &  ! [v0: $i] :  ! [v1: $i] : ( ~
% 62.12/9.00  |           (sdtasdt0(v0, v1) = xb) |  ~ $i(v1) |  ~ $i(v0) |  ~ doDivides0(v0,
% 62.12/9.00  |             xa) |  ~ aElement0(v1) |  ~ aElement0(v0) |  ? [v2: $i] :
% 62.12/9.00  |           (sdtasdt0(v0, v2) = xc & $i(v2) & aElement0(v2))) &  ! [v0: $i] :  !
% 62.12/9.00  |         [v1: $i] : ( ~ (sdtasdt0(v0, v1) = xa) |  ~ $i(v1) |  ~ $i(v0) |  ~
% 62.12/9.00  |           aDivisorOf0(v0, xb) |  ~ aElement0(v1) |  ~ aElement0(v0) |
% 62.12/9.00  |           doDivides0(v0, xc)) &  ! [v0: $i] :  ! [v1: $i] : ( ~ (sdtasdt0(v0,
% 62.12/9.00  |               v1) = xa) |  ~ $i(v1) |  ~ $i(v0) |  ~ aDivisorOf0(v0, xb) |  ~
% 62.12/9.00  |           aElement0(v1) |  ~ aElement0(v0) |  ? [v2: $i] : (sdtasdt0(v0, v2) =
% 62.12/9.00  |             xc & $i(v2) & aElement0(v2))) &  ! [v0: $i] :  ! [v1: $i] : ( ~
% 62.12/9.00  |           (sdtasdt0(v0, v1) = xa) |  ~ $i(v1) |  ~ $i(v0) |  ~ doDivides0(v0,
% 62.12/9.00  |             xb) |  ~ aElement0(v1) |  ~ aElement0(v0) | doDivides0(v0, xc)) & 
% 62.12/9.00  |         ! [v0: $i] :  ! [v1: $i] : ( ~ (sdtasdt0(v0, v1) = xa) |  ~ $i(v1) | 
% 62.12/9.00  |           ~ $i(v0) |  ~ doDivides0(v0, xb) |  ~ aElement0(v1) |  ~
% 62.12/9.00  |           aElement0(v0) |  ? [v2: $i] : (sdtasdt0(v0, v2) = xc & $i(v2) &
% 62.12/9.00  |             aElement0(v2))) &  ! [v0: $i] : ( ~ $i(v0) |  ~ aDivisorOf0(v0,
% 62.12/9.00  |             xb) |  ~ aDivisorOf0(v0, xa) | doDivides0(v0, xc)) &  ! [v0: $i] :
% 62.12/9.00  |         ( ~ $i(v0) |  ~ aDivisorOf0(v0, xb) |  ~ aDivisorOf0(v0, xa) |  ? [v1:
% 62.12/9.00  |             $i] : (sdtasdt0(v0, v1) = xc & $i(v1) & aElement0(v1))) &  ! [v0:
% 62.12/9.00  |           $i] : ( ~ $i(v0) |  ~ aDivisorOf0(v0, xb) |  ~ doDivides0(v0, xa) | 
% 62.12/9.00  |           ~ aElement0(v0) | doDivides0(v0, xc)) &  ! [v0: $i] : ( ~ $i(v0) | 
% 62.12/9.00  |           ~ aDivisorOf0(v0, xb) |  ~ doDivides0(v0, xa) |  ~ aElement0(v0) | 
% 62.12/9.00  |           ? [v1: $i] : (sdtasdt0(v0, v1) = xc & $i(v1) & aElement0(v1))) &  !
% 62.12/9.00  |         [v0: $i] : ( ~ $i(v0) |  ~ aDivisorOf0(v0, xa) |  ~ doDivides0(v0, xb)
% 62.12/9.00  |           | doDivides0(v0, xc)) &  ! [v0: $i] : ( ~ $i(v0) |  ~
% 62.12/9.00  |           aDivisorOf0(v0, xa) |  ~ doDivides0(v0, xb) |  ? [v1: $i] :
% 62.12/9.00  |           (sdtasdt0(v0, v1) = xc & $i(v1) & aElement0(v1))) &  ! [v0: $i] : (
% 62.12/9.00  |           ~ $i(v0) |  ~ doDivides0(v0, xb) |  ~ doDivides0(v0, xa) |  ~
% 62.12/9.00  |           aElement0(v0) | doDivides0(v0, xc)) &  ! [v0: $i] : ( ~ $i(v0) |  ~
% 62.12/9.00  |           doDivides0(v0, xb) |  ~ doDivides0(v0, xa) |  ~ aElement0(v0) |  ?
% 62.12/9.00  |           [v1: $i] : (sdtasdt0(v0, v1) = xc & $i(v1) & aElement0(v1)))
% 62.12/9.00  | 
% 62.12/9.00  | ALPHA: (31) implies:
% 62.12/9.00  |   (32)  aElement0(xc)
% 62.12/9.00  |   (33)  aElement0(all_49_1)
% 62.12/9.00  |   (34)  aElement0(all_49_0)
% 62.12/9.00  |   (35)  $i(all_49_1)
% 62.12/9.00  |   (36)  $i(all_49_0)
% 62.12/9.00  |   (37)  sdtasdt0(xc, all_49_1) = xb
% 62.12/9.00  |   (38)  sdtasdt0(xc, all_49_0) = xa
% 62.12/9.00  | 
% 62.12/9.00  | GROUND_INST: instantiating (11) with all_40_4, all_43_5, xa, simplifying with
% 62.12/9.00  |              (23), (26) gives:
% 62.12/9.00  |   (39)  all_43_5 = all_40_4
% 62.12/9.00  | 
% 62.12/9.00  | GROUND_INST: instantiating (11) with all_43_5, all_46_1, xa, simplifying with
% 62.12/9.00  |              (26), (29) gives:
% 62.12/9.00  |   (40)  all_46_1 = all_43_5
% 62.12/9.00  | 
% 62.12/9.00  | GROUND_INST: instantiating (11) with all_38_5, all_46_1, xa, simplifying with
% 62.12/9.00  |              (13), (29) gives:
% 62.12/9.00  |   (41)  all_46_1 = all_38_5
% 62.12/9.00  | 
% 62.12/9.00  | GROUND_INST: instantiating (11) with all_40_3, all_43_4, xb, simplifying with
% 62.12/9.00  |              (24), (27) gives:
% 62.12/9.00  |   (42)  all_43_4 = all_40_3
% 62.12/9.00  | 
% 62.12/9.00  | GROUND_INST: instantiating (11) with all_43_4, all_46_0, xb, simplifying with
% 62.12/9.00  |              (27), (30) gives:
% 62.12/9.00  |   (43)  all_46_0 = all_43_4
% 62.12/9.00  | 
% 62.12/9.01  | GROUND_INST: instantiating (11) with all_38_4, all_46_0, xb, simplifying with
% 62.12/9.01  |              (14), (30) gives:
% 62.12/9.01  |   (44)  all_46_0 = all_38_4
% 62.12/9.01  | 
% 62.12/9.01  | COMBINE_EQS: (43), (44) imply:
% 62.12/9.01  |   (45)  all_43_4 = all_38_4
% 62.12/9.01  | 
% 62.12/9.01  | SIMP: (45) implies:
% 62.12/9.01  |   (46)  all_43_4 = all_38_4
% 62.12/9.01  | 
% 62.12/9.01  | COMBINE_EQS: (40), (41) imply:
% 62.12/9.01  |   (47)  all_43_5 = all_38_5
% 62.12/9.01  | 
% 62.12/9.01  | SIMP: (47) implies:
% 62.12/9.01  |   (48)  all_43_5 = all_38_5
% 62.12/9.01  | 
% 62.12/9.01  | COMBINE_EQS: (42), (46) imply:
% 62.12/9.01  |   (49)  all_40_3 = all_38_4
% 62.12/9.01  | 
% 62.12/9.01  | SIMP: (49) implies:
% 62.12/9.01  |   (50)  all_40_3 = all_38_4
% 62.12/9.01  | 
% 62.12/9.01  | COMBINE_EQS: (39), (48) imply:
% 62.12/9.01  |   (51)  all_40_4 = all_38_5
% 62.12/9.01  | 
% 62.12/9.01  | SIMP: (51) implies:
% 62.12/9.01  |   (52)  all_40_4 = all_38_5
% 62.12/9.01  | 
% 62.12/9.01  | REDUCE: (19), (50) imply:
% 62.12/9.01  |   (53)  $i(all_38_4)
% 62.12/9.01  | 
% 62.12/9.01  | REDUCE: (18), (52) imply:
% 62.12/9.01  |   (54)  $i(all_38_5)
% 62.12/9.01  | 
% 62.12/9.01  | REDUCE: (17), (50) imply:
% 62.12/9.01  |   (55)  aElementOf0(all_40_0, all_38_4)
% 62.12/9.01  | 
% 62.12/9.01  | REDUCE: (16), (52) imply:
% 62.12/9.01  |   (56)  aElementOf0(all_40_1, all_38_5)
% 62.12/9.01  | 
% 62.12/9.01  | GROUND_INST: instantiating (mMulComm) with xc, all_49_1, xb, simplifying with
% 62.12/9.01  |              (4), (32), (33), (35), (37) gives:
% 62.12/9.01  |   (57)  sdtasdt0(all_49_1, xc) = xb & $i(xb)
% 62.12/9.01  | 
% 62.12/9.01  | ALPHA: (57) implies:
% 62.12/9.01  |   (58)  $i(xb)
% 62.12/9.01  | 
% 62.12/9.01  | GROUND_INST: instantiating (mMulComm) with xc, all_49_0, xa, simplifying with
% 62.12/9.01  |              (4), (32), (34), (36), (38) gives:
% 62.12/9.01  |   (59)  sdtasdt0(all_49_0, xc) = xa & $i(xa)
% 62.12/9.01  | 
% 62.12/9.01  | ALPHA: (59) implies:
% 62.12/9.01  |   (60)  $i(xa)
% 62.12/9.01  | 
% 62.12/9.01  | GROUND_INST: instantiating (1) with xa, all_38_5, all_40_1, simplifying with
% 62.12/9.01  |              (2), (13), (20), (54), (56), (60) gives:
% 62.12/9.01  |   (61)   ? [v0: $i] : (sdtasdt0(xa, v0) = all_40_1 & $i(v0) & aElement0(v0))
% 62.12/9.01  | 
% 62.12/9.01  | GROUND_INST: instantiating (1) with xb, all_38_4, all_40_0, simplifying with
% 62.12/9.01  |              (3), (14), (21), (53), (55), (58) gives:
% 62.12/9.01  |   (62)   ? [v0: $i] : (sdtasdt0(xb, v0) = all_40_0 & $i(v0) & aElement0(v0))
% 62.12/9.01  | 
% 62.12/9.01  | DELTA: instantiating (62) with fresh symbol all_70_0 gives:
% 62.12/9.01  |   (63)  sdtasdt0(xb, all_70_0) = all_40_0 & $i(all_70_0) & aElement0(all_70_0)
% 62.12/9.01  | 
% 62.12/9.01  | ALPHA: (63) implies:
% 62.12/9.01  |   (64)  aElement0(all_70_0)
% 62.12/9.01  |   (65)  $i(all_70_0)
% 62.12/9.01  |   (66)  sdtasdt0(xb, all_70_0) = all_40_0
% 62.12/9.01  | 
% 62.12/9.01  | DELTA: instantiating (61) with fresh symbol all_82_0 gives:
% 62.12/9.01  |   (67)  sdtasdt0(xa, all_82_0) = all_40_1 & $i(all_82_0) & aElement0(all_82_0)
% 62.12/9.01  | 
% 62.12/9.01  | ALPHA: (67) implies:
% 62.12/9.01  |   (68)  aElement0(all_82_0)
% 62.12/9.01  |   (69)  $i(all_82_0)
% 62.12/9.01  |   (70)  sdtasdt0(xa, all_82_0) = all_40_1
% 62.12/9.01  | 
% 62.12/9.01  | GROUND_INST: instantiating (10) with all_82_0, all_70_0, all_40_1, all_40_0,
% 62.12/9.01  |              simplifying with (22), (64), (65), (66), (68), (69), (70) gives:
% 62.12/9.01  |   (71)  $false
% 62.12/9.01  | 
% 62.12/9.01  | CLOSE: (71) is inconsistent.
% 62.12/9.01  | 
% 62.12/9.01  End of proof
% 62.12/9.01  % SZS output end Proof for theBenchmark
% 62.12/9.01  
% 62.12/9.01  8410ms
%------------------------------------------------------------------------------