TSTP Solution File: RNG110+1 by Refute---2015

View Problem - Process Solution

%------------------------------------------------------------------------------
% File     : Refute---2015
% Problem  : RNG110+1 : TPTP v6.4.0. Released v4.0.0.
% Transfm  : none
% Format   : tptp:raw
% Command  : isabelle tptp_refute %d %s

% Computer : n077.star.cs.uiowa.edu
% Model    : x86_64 x86_64
% CPU      : Intel(R) Xeon(R) CPU E5-2609 0 2.40GHz
% Memory   : 32218.75MB
% OS       : Linux 3.10.0-327.10.1.el7.x86_64
% CPULimit : 300s
% DateTime : Thu Apr 14 02:41:08 EDT 2016

% Result   : CounterSatisfiable 47.11s
% Output   : Assurance 0s
% Verified : 
% SZS Type : None (Parsing solution fails)
% Syntax   : Number of formulae    : 0

% Comments : 
%------------------------------------------------------------------------------
%----No solution output by system
%------------------------------------------------------------------------------
%----ORIGINAL SYSTEM OUTPUT
% 0.00/0.03  % Problem  : RNG110+1 : TPTP v6.4.0. Released v4.0.0.
% 0.02/0.04  % Command  : isabelle tptp_refute %d %s
% 0.02/0.24  % Computer : n077.star.cs.uiowa.edu
% 0.02/0.24  % Model    : x86_64 x86_64
% 0.02/0.24  % CPU      : Intel(R) Xeon(R) CPU E5-2609 0 @ 2.40GHz
% 0.02/0.24  % Memory   : 32218.75MB
% 0.02/0.24  % OS       : Linux 3.10.0-327.10.1.el7.x86_64
% 0.02/0.24  % CPULimit : 300
% 0.02/0.24  % DateTime : Wed Apr  6 13:52:09 CDT 2016
% 0.02/0.24  % CPUTime  : 
% 6.33/5.95  > val it = (): unit
% 6.63/6.20  Trying to find a model that refutes: EX W0.
% 6.63/6.20     (bnd_aElementOf0 W0 bnd_xI & W0 ~= bnd_sz00) &
% 6.63/6.20     (ALL W1.
% 6.63/6.20         bnd_aElementOf0 W1 bnd_xI & W1 ~= bnd_sz00 -->
% 6.63/6.20         ~ bnd_iLess0 (bnd_sbrdtbr0 W1) (bnd_sbrdtbr0 W0))
% 7.94/7.59  Unfolded term: [| ALL W0.
% 7.94/7.59        bnd_aElement0 W0 -->
% 7.94/7.59        (ALL W1.
% 7.94/7.59            (W1 = bnd_slsdtgt0 W0) =
% 7.94/7.59            (bnd_aSet0 W1 &
% 7.94/7.59             (ALL W2.
% 7.94/7.59                 bnd_aElementOf0 W2 W1 =
% 7.94/7.59                 (EX W3. bnd_aElement0 W3 & bnd_sdtasdt0 W0 W3 = W2))));
% 7.94/7.59     ALL W0 W1.
% 7.94/7.59        bnd_aElement0 W0 & bnd_aElement0 W1 -->
% 7.94/7.59        bnd_misRelativelyPrime0 W0 W1 = bnd_aGcdOfAnd0 bnd_sz10 W0 W1;
% 7.94/7.59     ALL W0 W1.
% 7.94/7.59        bnd_aElement0 W0 & bnd_aElement0 W1 -->
% 7.94/7.59        (ALL W2.
% 7.94/7.59            bnd_aGcdOfAnd0 W2 W0 W1 =
% 7.94/7.59            ((bnd_aDivisorOf0 W2 W0 & bnd_aDivisorOf0 W2 W1) &
% 7.94/7.59             (ALL W3.
% 7.94/7.59                 bnd_aDivisorOf0 W3 W0 & bnd_aDivisorOf0 W3 W1 -->
% 7.94/7.59                 bnd_doDivides0 W3 W2)));
% 7.94/7.59     ALL W0.
% 7.94/7.59        bnd_aElement0 W0 -->
% 7.94/7.59        (ALL W1.
% 7.94/7.59            bnd_aDivisorOf0 W1 W0 =
% 7.94/7.59            (bnd_aElement0 W1 & bnd_doDivides0 W1 W0));
% 7.94/7.59     ALL W0 W1.
% 7.94/7.59        bnd_aElement0 W0 & bnd_aElement0 W1 -->
% 7.94/7.59        bnd_doDivides0 W0 W1 =
% 7.94/7.59        (EX W2. bnd_aElement0 W2 & bnd_sdtasdt0 W0 W2 = W1);
% 7.94/7.59     ALL W0 W1 W2.
% 7.94/7.59        (bnd_aElement0 W0 & bnd_aElement0 W1) & bnd_aIdeal0 W2 -->
% 7.94/7.59        bnd_sdteqdtlpzmzozddtrp0 W0 W1 W2 =
% 7.94/7.59        bnd_aElementOf0 (bnd_sdtpldt0 W0 (bnd_smndt0 W1)) W2;
% 7.94/7.59     ALL W0.
% 7.94/7.59        bnd_aIdeal0 W0 =
% 7.94/7.59        (bnd_aSet0 W0 &
% 7.94/7.59         (ALL W1.
% 7.94/7.59             bnd_aElementOf0 W1 W0 -->
% 7.94/7.59             (ALL W2.
% 7.94/7.59                 bnd_aElementOf0 W2 W0 -->
% 7.94/7.59                 bnd_aElementOf0 (bnd_sdtpldt0 W1 W2) W0) &
% 7.94/7.59             (ALL W2.
% 7.94/7.59                 bnd_aElement0 W2 -->
% 7.94/7.59                 bnd_aElementOf0 (bnd_sdtasdt0 W2 W1) W0)));
% 7.94/7.59     ALL W0 W1.
% 7.94/7.59        bnd_aSet0 W0 & bnd_aSet0 W1 -->
% 7.94/7.59        (ALL W2.
% 7.94/7.59            (W2 = bnd_sdtasasdt0 W0 W1) =
% 7.94/7.59            (bnd_aSet0 W2 &
% 7.94/7.59             (ALL W3.
% 7.94/7.59                 bnd_aElementOf0 W3 W2 =
% 7.94/7.59                 (bnd_aElementOf0 W3 W0 & bnd_aElementOf0 W3 W1))));
% 7.94/7.59     ALL W0 W1.
% 7.94/7.59        bnd_aSet0 W0 & bnd_aSet0 W1 -->
% 7.94/7.59        (ALL W2.
% 7.94/7.59            (W2 = bnd_sdtpldt1 W0 W1) =
% 7.94/7.59            (bnd_aSet0 W2 &
% 7.94/7.59             (ALL W3.
% 7.94/7.59                 bnd_aElementOf0 W3 W2 =
% 7.94/7.59                 (EX W4 W5.
% 7.94/7.59                     (bnd_aElementOf0 W4 W0 & bnd_aElementOf0 W5 W1) &
% 7.94/7.59                     bnd_sdtpldt0 W4 W5 = W3))));
% 7.94/7.59     EX W0.
% 7.94/7.59        bnd_aElementOf0 W0
% 7.94/7.59         (bnd_sdtpldt1 (bnd_slsdtgt0 bnd_xa) (bnd_slsdtgt0 bnd_xb)) &
% 7.94/7.59        ~ W0 = bnd_sz00;
% 7.94/7.59     ((bnd_aElementOf0 bnd_sz00 (bnd_slsdtgt0 bnd_xa) &
% 7.94/7.59       bnd_aElementOf0 bnd_xa (bnd_slsdtgt0 bnd_xa)) &
% 7.94/7.59      bnd_aElementOf0 bnd_sz00 (bnd_slsdtgt0 bnd_xb)) &
% 7.94/7.59     bnd_aElementOf0 bnd_xb (bnd_slsdtgt0 bnd_xb);
% 7.94/7.59     bnd_aIdeal0 bnd_xI &
% 7.94/7.59     bnd_xI = bnd_sdtpldt1 (bnd_slsdtgt0 bnd_xa) (bnd_slsdtgt0 bnd_xb);
% 7.94/7.59     bnd_aGcdOfAnd0 bnd_xc bnd_xa bnd_xb;
% 7.94/7.59     ~ bnd_xa = bnd_sz00 | ~ bnd_xb = bnd_sz00;
% 7.94/7.59     bnd_aElement0 bnd_xa & bnd_aElement0 bnd_xb;
% 7.94/7.59     ALL W0. bnd_aElement0 W0 --> bnd_aIdeal0 (bnd_slsdtgt0 W0);
% 7.94/7.59     ALL W0 W1.
% 7.94/7.59        (bnd_aElement0 W0 & bnd_aElement0 W1) & ~ W1 = bnd_sz00 -->
% 7.94/7.59        (EX W2 W3.
% 7.94/7.59            ((bnd_aElement0 W2 & bnd_aElement0 W3) &
% 7.94/7.59             W0 = bnd_sdtpldt0 (bnd_sdtasdt0 W2 W1) W3) &
% 7.94/7.59            (~ W3 = bnd_sz00 -->
% 7.94/7.59             bnd_iLess0 (bnd_sbrdtbr0 W3) (bnd_sbrdtbr0 W1)));
% 7.94/7.59     ALL W0 W1.
% 7.94/7.59        bnd_aNaturalNumber0 W0 & bnd_aNaturalNumber0 W1 -->
% 7.94/7.59        bnd_iLess0 W0 W1 --> True;
% 7.94/7.59     ALL W0.
% 7.94/7.59        bnd_aElement0 W0 & ~ W0 = bnd_sz00 -->
% 7.94/7.59        bnd_aNaturalNumber0 (bnd_sbrdtbr0 W0);
% 7.94/7.59     ALL W0. bnd_aNaturalNumber0 W0 --> True;
% 7.94/7.59     ALL W0 W1.
% 7.94/7.59        bnd_aIdeal0 W0 & bnd_aIdeal0 W1 -->
% 7.94/7.59        (ALL W2.
% 7.94/7.59            bnd_aElement0 W2 --> bnd_aElementOf0 W2 (bnd_sdtpldt1 W0 W1)) -->
% 7.94/7.59        (ALL W2 W3.
% 7.94/7.59            bnd_aElement0 W2 & bnd_aElement0 W3 -->
% 7.94/7.59            (EX W4.
% 7.94/7.59                (bnd_aElement0 W4 & bnd_sdteqdtlpzmzozddtrp0 W4 W2 W0) &
% 7.94/7.59                bnd_sdteqdtlpzmzozddtrp0 W4 W3 W1));
% 7.94/7.59     ALL W0 W1.
% 7.94/7.59        bnd_aIdeal0 W0 & bnd_aIdeal0 W1 -->
% 7.94/7.59        bnd_aIdeal0 (bnd_sdtasasdt0 W0 W1);
% 7.94/7.59     ALL W0 W1.
% 7.94/7.59        bnd_aIdeal0 W0 & bnd_aIdeal0 W1 --> bnd_aIdeal0 (bnd_sdtpldt1 W0 W1);
% 7.94/7.59     ALL W0 W1.
% 7.94/7.59        bnd_aSet0 W0 & bnd_aSet0 W1 -->
% 7.94/7.59        (ALL W2. bnd_aElementOf0 W2 W0 --> bnd_aElementOf0 W2 W1) &
% 7.94/7.59        (ALL W2. bnd_aElementOf0 W2 W1 --> bnd_aElementOf0 W2 W0) -->
% 7.94/7.59        W0 = W1;
% 7.94/7.59     ALL W0.
% 7.94/7.59        bnd_aSet0 W0 --> (ALL W1. bnd_aElementOf0 W1 W0 --> bnd_aElement0 W1);
% 7.94/7.59     ALL W0. bnd_aSet0 W0 --> True; ~ bnd_sz10 = bnd_sz00;
% 7.94/7.59     ALL W0 W1.
% 7.94/7.59        bnd_aElement0 W0 & bnd_aElement0 W1 -->
% 7.94/7.59        bnd_sdtasdt0 W0 W1 = bnd_sz00 --> W0 = bnd_sz00 | W1 = bnd_sz00;
% 7.94/7.59     ALL W0.
% 7.94/7.59        bnd_aElement0 W0 -->
% 7.94/7.59        bnd_sdtasdt0 W0 bnd_sz00 = bnd_sz00 &
% 7.94/7.59        bnd_sz00 = bnd_sdtasdt0 bnd_sz00 W0;
% 7.94/7.59     ALL W0.
% 7.94/7.59        bnd_aElement0 W0 -->
% 7.94/7.59        bnd_sdtasdt0 (bnd_smndt0 bnd_sz10) W0 = bnd_smndt0 W0 &
% 7.94/7.59        bnd_smndt0 W0 = bnd_sdtasdt0 W0 (bnd_smndt0 bnd_sz10);
% 7.94/7.59     ALL W0 W1 W2.
% 7.94/7.59        (bnd_aElement0 W0 & bnd_aElement0 W1) & bnd_aElement0 W2 -->
% 7.94/7.59        bnd_sdtasdt0 W0 (bnd_sdtpldt0 W1 W2) =
% 7.94/7.59        bnd_sdtpldt0 (bnd_sdtasdt0 W0 W1) (bnd_sdtasdt0 W0 W2) &
% 7.94/7.59        bnd_sdtasdt0 (bnd_sdtpldt0 W1 W2) W0 =
% 7.94/7.59        bnd_sdtpldt0 (bnd_sdtasdt0 W1 W0) (bnd_sdtasdt0 W2 W0);
% 7.94/7.59     ALL W0.
% 7.94/7.59        bnd_aElement0 W0 -->
% 7.94/7.59        bnd_sdtasdt0 W0 bnd_sz10 = W0 & W0 = bnd_sdtasdt0 bnd_sz10 W0;
% 7.94/7.59     ALL W0 W1 W2.
% 7.94/7.59        (bnd_aElement0 W0 & bnd_aElement0 W1) & bnd_aElement0 W2 -->
% 7.94/7.59        bnd_sdtasdt0 (bnd_sdtasdt0 W0 W1) W2 =
% 7.94/7.59        bnd_sdtasdt0 W0 (bnd_sdtasdt0 W1 W2);
% 7.94/7.59     ALL W0 W1.
% 7.94/7.59        bnd_aElement0 W0 & bnd_aElement0 W1 -->
% 7.94/7.59        bnd_sdtasdt0 W0 W1 = bnd_sdtasdt0 W1 W0;
% 7.94/7.59     ALL W0.
% 7.94/7.59        bnd_aElement0 W0 -->
% 7.94/7.59        bnd_sdtpldt0 W0 (bnd_smndt0 W0) = bnd_sz00 &
% 7.94/7.59        bnd_sz00 = bnd_sdtpldt0 (bnd_smndt0 W0) W0;
% 7.94/7.59     ALL W0.
% 7.94/7.59        bnd_aElement0 W0 -->
% 7.94/7.59        bnd_sdtpldt0 W0 bnd_sz00 = W0 & W0 = bnd_sdtpldt0 bnd_sz00 W0;
% 7.94/7.59     ALL W0 W1 W2.
% 7.94/7.59        (bnd_aElement0 W0 & bnd_aElement0 W1) & bnd_aElement0 W2 -->
% 7.94/7.59        bnd_sdtpldt0 (bnd_sdtpldt0 W0 W1) W2 =
% 7.94/7.59        bnd_sdtpldt0 W0 (bnd_sdtpldt0 W1 W2);
% 7.94/7.59     ALL W0 W1.
% 7.94/7.59        bnd_aElement0 W0 & bnd_aElement0 W1 -->
% 7.94/7.59        bnd_sdtpldt0 W0 W1 = bnd_sdtpldt0 W1 W0;
% 7.94/7.59     ALL W0 W1.
% 7.94/7.59        bnd_aElement0 W0 & bnd_aElement0 W1 -->
% 7.94/7.59        bnd_aElement0 (bnd_sdtasdt0 W0 W1);
% 7.94/7.59     ALL W0 W1.
% 7.94/7.59        bnd_aElement0 W0 & bnd_aElement0 W1 -->
% 7.94/7.59        bnd_aElement0 (bnd_sdtpldt0 W0 W1);
% 7.94/7.59     ALL W0. bnd_aElement0 W0 --> bnd_aElement0 (bnd_smndt0 W0);
% 7.94/7.59     bnd_aElement0 bnd_sz10; bnd_aElement0 bnd_sz00;
% 7.94/7.59     ALL W0. bnd_aElement0 W0 --> True |]
% 7.94/7.59  ==> EX W0.
% 7.94/7.59         (bnd_aElementOf0 W0 bnd_xI & ~ W0 = bnd_sz00) &
% 7.94/7.59         (ALL W1.
% 7.94/7.59             bnd_aElementOf0 W1 bnd_xI & ~ W1 = bnd_sz00 -->
% 7.94/7.59             ~ bnd_iLess0 (bnd_sbrdtbr0 W1) (bnd_sbrdtbr0 W0))
% 7.94/7.59  Adding axioms...
% 7.94/7.60  Typedef.type_definition_def
% 14.85/14.41   ...done.
% 14.85/14.42  Ground types: ?'b, TPTP_Interpret.ind
% 14.85/14.42  Translating term (sizes: 1, 1) ...
% 19.06/18.68  Invoking SAT solver...
% 19.06/18.68  No model exists.
% 19.06/18.68  Translating term (sizes: 2, 1) ...
% 24.06/23.64  Invoking SAT solver...
% 24.06/23.64  No model exists.
% 24.06/23.64  Translating term (sizes: 1, 2) ...
% 46.81/46.39  Invoking SAT solver...
% 47.11/46.67  Model found:
% 47.11/46.67  Size of types: ?'b: 1, TPTP_Interpret.ind: 2
% 47.11/46.67  bnd_aNaturalNumber0: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}
% 47.11/46.67  bnd_sbrdtbr0: {(??.TPTP_Interpret.ind0, ??.TPTP_Interpret.ind0),
% 47.11/46.67   (??.TPTP_Interpret.ind1, ??.TPTP_Interpret.ind0)}
% 47.11/46.67  bnd_iLess0: {(??.TPTP_Interpret.ind0,
% 47.11/46.67    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}),
% 47.11/46.67   (??.TPTP_Interpret.ind1,
% 47.11/46.67    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)})}
% 47.11/46.67  bnd_xc: ??.TPTP_Interpret.ind1
% 47.11/46.67  bnd_xI: ??.TPTP_Interpret.ind0
% 47.11/46.67  bnd_sz00: ??.TPTP_Interpret.ind0
% 47.11/46.67  bnd_xb: ??.TPTP_Interpret.ind1
% 47.11/46.67  bnd_xa: ??.TPTP_Interpret.ind0
% 47.11/46.67  bnd_sdtpldt1: {(??.TPTP_Interpret.ind0,
% 47.11/46.67    {(??.TPTP_Interpret.ind0, ??.TPTP_Interpret.ind0),
% 47.11/46.67     (??.TPTP_Interpret.ind1, ??.TPTP_Interpret.ind0)}),
% 47.11/46.67   (??.TPTP_Interpret.ind1,
% 47.11/46.67    {(??.TPTP_Interpret.ind0, ??.TPTP_Interpret.ind0),
% 47.11/46.67     (??.TPTP_Interpret.ind1, ??.TPTP_Interpret.ind1)})}
% 47.11/46.67  bnd_sdtasasdt0: {(??.TPTP_Interpret.ind0,
% 47.11/46.67    {(??.TPTP_Interpret.ind0, ??.TPTP_Interpret.ind0),
% 47.11/46.67     (??.TPTP_Interpret.ind1, ??.TPTP_Interpret.ind1)}),
% 47.11/46.67   (??.TPTP_Interpret.ind1,
% 47.11/46.67    {(??.TPTP_Interpret.ind0, ??.TPTP_Interpret.ind1),
% 47.11/46.67     (??.TPTP_Interpret.ind1, ??.TPTP_Interpret.ind1)})}
% 47.11/46.67  bnd_smndt0: {(??.TPTP_Interpret.ind0, ??.TPTP_Interpret.ind0),
% 47.11/46.67   (??.TPTP_Interpret.ind1, ??.TPTP_Interpret.ind1)}
% 47.11/46.67  bnd_sdtpldt0: {(??.TPTP_Interpret.ind0,
% 47.11/46.67    {(??.TPTP_Interpret.ind0, ??.TPTP_Interpret.ind0),
% 47.11/46.67     (??.TPTP_Interpret.ind1, ??.TPTP_Interpret.ind1)}),
% 47.11/46.67   (??.TPTP_Interpret.ind1,
% 47.11/46.67    {(??.TPTP_Interpret.ind0, ??.TPTP_Interpret.ind1),
% 47.11/46.67     (??.TPTP_Interpret.ind1, ??.TPTP_Interpret.ind0)})}
% 47.11/46.67  bnd_sdteqdtlpzmzozddtrp0: {(??.TPTP_Interpret.ind0,
% 47.11/46.67    {(??.TPTP_Interpret.ind0,
% 47.11/46.67      {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}),
% 47.11/46.67     (??.TPTP_Interpret.ind1,
% 47.11/46.67      {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)})}),
% 47.11/46.67   (??.TPTP_Interpret.ind1,
% 47.11/46.67    {(??.TPTP_Interpret.ind0,
% 47.11/46.67      {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)}),
% 47.11/46.67     (??.TPTP_Interpret.ind1,
% 47.11/46.67      {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)})})}
% 47.11/46.67  bnd_aIdeal0: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}
% 47.11/46.67  bnd_doDivides0: {(??.TPTP_Interpret.ind0,
% 47.11/46.67    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)}),
% 47.11/46.67   (??.TPTP_Interpret.ind1,
% 47.11/46.67    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)})}
% 47.11/46.67  bnd_aDivisorOf0: {(??.TPTP_Interpret.ind0,
% 47.11/46.67    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)}),
% 47.11/46.67   (??.TPTP_Interpret.ind1,
% 47.11/46.67    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)})}
% 47.11/46.67  bnd_sz10: ??.TPTP_Interpret.ind1
% 47.11/46.67  bnd_aGcdOfAnd0: {(??.TPTP_Interpret.ind0,
% 47.11/46.67    {(??.TPTP_Interpret.ind0,
% 47.11/46.67      {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)}),
% 47.11/46.67     (??.TPTP_Interpret.ind1,
% 47.11/46.67      {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)})}),
% 47.11/46.67   (??.TPTP_Interpret.ind1,
% 47.11/46.67    {(??.TPTP_Interpret.ind0,
% 47.11/46.67      {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, True)}),
% 47.11/46.67     (??.TPTP_Interpret.ind1,
% 47.11/46.67      {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)})})}
% 47.11/46.67  bnd_misRelativelyPrime0: {(??.TPTP_Interpret.ind0,
% 47.11/46.67    {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, True)}),
% 47.11/46.67   (??.TPTP_Interpret.ind1,
% 47.11/46.67    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)})}
% 47.11/46.67  bnd_sdtasdt0: {(??.TPTP_Interpret.ind0,
% 47.11/46.67    {(??.TPTP_Interpret.ind0, ??.TPTP_Interpret.ind0),
% 47.11/46.67     (??.TPTP_Interpret.ind1, ??.TPTP_Interpret.ind0)}),
% 47.11/46.67   (??.TPTP_Interpret.ind1,
% 47.11/46.67    {(??.TPTP_Interpret.ind0, ??.TPTP_Interpret.ind0),
% 47.11/46.67     (??.TPTP_Interpret.ind1, ??.TPTP_Interpret.ind1)})}
% 47.11/46.67  bnd_aElementOf0: {(??.TPTP_Interpret.ind0,
% 47.11/46.67    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}),
% 47.11/46.67   (??.TPTP_Interpret.ind1,
% 47.11/46.67    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)})}
% 47.11/46.67  bnd_aSet0: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}
% 47.11/46.67  bnd_slsdtgt0: {(??.TPTP_Interpret.ind0, ??.TPTP_Interpret.ind1),
% 47.11/46.67   (??.TPTP_Interpret.ind1, ??.TPTP_Interpret.ind0)}
% 47.11/46.67  bnd_aElement0: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}
% 47.11/46.67  
% 47.11/46.67  % SZS status CounterSatisfiable
%------------------------------------------------------------------------------