TSTP Solution File: RNG107+4 by Refute---2015
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%------------------------------------------------------------------------------
% File : Refute---2015
% Problem : RNG107+4 : TPTP v6.4.0. Released v4.0.0.
% Transfm : none
% Format : tptp:raw
% Command : isabelle tptp_refute %d %s
% Computer : n064.star.cs.uiowa.edu
% Model : x86_64 x86_64
% CPU : Intel(R) Xeon(R) CPU E5-2609 0 2.40GHz
% Memory : 32218.75MB
% OS : Linux 3.10.0-327.10.1.el7.x86_64
% CPULimit : 300s
% DateTime : Thu Apr 14 02:41:07 EDT 2016
% Result : Timeout 300.12s
% Output : None
% Verified :
% SZS Type : None (Parsing solution fails)
% Syntax : Number of formulae : 0
% Comments :
%------------------------------------------------------------------------------
%----No solution output by system
%------------------------------------------------------------------------------
%----ORIGINAL SYSTEM OUTPUT
% 0.00/0.03 % Problem : RNG107+4 : TPTP v6.4.0. Released v4.0.0.
% 0.02/0.04 % Command : isabelle tptp_refute %d %s
% 0.02/0.24 % Computer : n064.star.cs.uiowa.edu
% 0.02/0.24 % Model : x86_64 x86_64
% 0.02/0.24 % CPU : Intel(R) Xeon(R) CPU E5-2609 0 @ 2.40GHz
% 0.02/0.24 % Memory : 32218.75MB
% 0.02/0.24 % OS : Linux 3.10.0-327.10.1.el7.x86_64
% 0.02/0.24 % CPULimit : 300
% 0.02/0.24 % DateTime : Wed Apr 6 13:50:42 CDT 2016
% 0.02/0.24 % CPUTime :
% 6.26/5.89 > val it = (): unit
% 6.55/6.14 Trying to find a model that refutes: (ALL W0.
% 6.55/6.14 bnd_aElementOf0 W0 (bnd_slsdtgt0 bnd_xa) =
% 6.55/6.14 (EX W1. bnd_aElement0 W1 & bnd_sdtasdt0 bnd_xa W1 = W0)) -->
% 6.55/6.14 (ALL W0.
% 6.55/6.14 bnd_aElementOf0 W0 (bnd_slsdtgt0 bnd_xb) =
% 6.55/6.14 (EX W1. bnd_aElement0 W1 & bnd_sdtasdt0 bnd_xb W1 = W0)) -->
% 6.55/6.14 (EX W0 W1.
% 6.55/6.14 (bnd_aElementOf0 W0 (bnd_slsdtgt0 bnd_xa) &
% 6.55/6.14 bnd_aElementOf0 W1 (bnd_slsdtgt0 bnd_xb)) &
% 6.55/6.14 bnd_sdtpldt0 W0 W1 = bnd_xc) |
% 6.55/6.14 bnd_aElementOf0 bnd_xc
% 6.55/6.14 (bnd_sdtpldt1 (bnd_slsdtgt0 bnd_xa) (bnd_slsdtgt0 bnd_xb))
% 8.08/7.63 Unfolded term: [| ALL W0.
% 8.08/7.63 bnd_aElement0 W0 -->
% 8.08/7.63 (ALL W1.
% 8.08/7.63 (W1 = bnd_slsdtgt0 W0) =
% 8.08/7.63 (bnd_aSet0 W1 &
% 8.08/7.63 (ALL W2.
% 8.08/7.63 bnd_aElementOf0 W2 W1 =
% 8.08/7.63 (EX W3. bnd_aElement0 W3 & bnd_sdtasdt0 W0 W3 = W2))));
% 8.08/7.63 ALL W0 W1.
% 8.08/7.63 bnd_aElement0 W0 & bnd_aElement0 W1 -->
% 8.08/7.63 bnd_misRelativelyPrime0 W0 W1 = bnd_aGcdOfAnd0 bnd_sz10 W0 W1;
% 8.08/7.63 ALL W0 W1.
% 8.08/7.63 bnd_aElement0 W0 & bnd_aElement0 W1 -->
% 8.08/7.63 (ALL W2.
% 8.08/7.63 bnd_aGcdOfAnd0 W2 W0 W1 =
% 8.08/7.63 ((bnd_aDivisorOf0 W2 W0 & bnd_aDivisorOf0 W2 W1) &
% 8.08/7.63 (ALL W3.
% 8.08/7.63 bnd_aDivisorOf0 W3 W0 & bnd_aDivisorOf0 W3 W1 -->
% 8.08/7.63 bnd_doDivides0 W3 W2)));
% 8.08/7.63 ALL W0.
% 8.08/7.63 bnd_aElement0 W0 -->
% 8.08/7.63 (ALL W1.
% 8.08/7.63 bnd_aDivisorOf0 W1 W0 =
% 8.08/7.63 (bnd_aElement0 W1 & bnd_doDivides0 W1 W0));
% 8.08/7.63 ALL W0 W1.
% 8.08/7.63 bnd_aElement0 W0 & bnd_aElement0 W1 -->
% 8.08/7.63 bnd_doDivides0 W0 W1 =
% 8.08/7.63 (EX W2. bnd_aElement0 W2 & bnd_sdtasdt0 W0 W2 = W1);
% 8.08/7.63 ALL W0 W1 W2.
% 8.08/7.63 (bnd_aElement0 W0 & bnd_aElement0 W1) & bnd_aIdeal0 W2 -->
% 8.08/7.63 bnd_sdteqdtlpzmzozddtrp0 W0 W1 W2 =
% 8.08/7.63 bnd_aElementOf0 (bnd_sdtpldt0 W0 (bnd_smndt0 W1)) W2;
% 8.08/7.63 ALL W0.
% 8.08/7.63 bnd_aIdeal0 W0 =
% 8.08/7.63 (bnd_aSet0 W0 &
% 8.08/7.63 (ALL W1.
% 8.08/7.63 bnd_aElementOf0 W1 W0 -->
% 8.08/7.63 (ALL W2.
% 8.08/7.63 bnd_aElementOf0 W2 W0 -->
% 8.08/7.63 bnd_aElementOf0 (bnd_sdtpldt0 W1 W2) W0) &
% 8.08/7.63 (ALL W2.
% 8.08/7.63 bnd_aElement0 W2 -->
% 8.08/7.63 bnd_aElementOf0 (bnd_sdtasdt0 W2 W1) W0)));
% 8.08/7.63 ALL W0 W1.
% 8.08/7.63 bnd_aSet0 W0 & bnd_aSet0 W1 -->
% 8.08/7.63 (ALL W2.
% 8.08/7.63 (W2 = bnd_sdtasasdt0 W0 W1) =
% 8.08/7.63 (bnd_aSet0 W2 &
% 8.08/7.63 (ALL W3.
% 8.08/7.63 bnd_aElementOf0 W3 W2 =
% 8.08/7.63 (bnd_aElementOf0 W3 W0 & bnd_aElementOf0 W3 W1))));
% 8.08/7.63 ALL W0 W1.
% 8.08/7.63 bnd_aSet0 W0 & bnd_aSet0 W1 -->
% 8.08/7.63 (ALL W2.
% 8.08/7.63 (W2 = bnd_sdtpldt1 W0 W1) =
% 8.08/7.63 (bnd_aSet0 W2 &
% 8.08/7.63 (ALL W3.
% 8.08/7.63 bnd_aElementOf0 W3 W2 =
% 8.08/7.63 (EX W4 W5.
% 8.08/7.63 (bnd_aElementOf0 W4 W0 & bnd_aElementOf0 W5 W1) &
% 8.08/7.63 bnd_sdtpldt0 W4 W5 = W3))));
% 8.08/7.63 ((((((((bnd_aElement0 bnd_xc &
% 8.08/7.63 (EX W0. bnd_aElement0 W0 & bnd_sdtasdt0 bnd_xc W0 = bnd_xa)) &
% 8.08/7.63 bnd_doDivides0 bnd_xc bnd_xa) &
% 8.08/7.63 bnd_aDivisorOf0 bnd_xc bnd_xa) &
% 8.08/7.63 bnd_aElement0 bnd_xc) &
% 8.08/7.63 (EX W0. bnd_aElement0 W0 & bnd_sdtasdt0 bnd_xc W0 = bnd_xb)) &
% 8.08/7.63 bnd_doDivides0 bnd_xc bnd_xb) &
% 8.08/7.63 bnd_aDivisorOf0 bnd_xc bnd_xb) &
% 8.08/7.63 (ALL W0.
% 8.08/7.63 (bnd_aElement0 W0 &
% 8.08/7.63 ((EX W1. bnd_aElement0 W1 & bnd_sdtasdt0 W0 W1 = bnd_xa) |
% 8.08/7.63 bnd_doDivides0 W0 bnd_xa) |
% 8.08/7.63 bnd_aDivisorOf0 W0 bnd_xa) &
% 8.08/7.63 (((EX W1. bnd_aElement0 W1 & bnd_sdtasdt0 W0 W1 = bnd_xb) |
% 8.08/7.63 bnd_doDivides0 W0 bnd_xb) |
% 8.08/7.63 bnd_aDivisorOf0 W0 bnd_xb) -->
% 8.08/7.63 (EX W1. bnd_aElement0 W1 & bnd_sdtasdt0 W0 W1 = bnd_xc) &
% 8.08/7.63 bnd_doDivides0 W0 bnd_xc)) &
% 8.08/7.63 bnd_aGcdOfAnd0 bnd_xc bnd_xa bnd_xb;
% 8.08/7.63 ~ bnd_xa = bnd_sz00 | ~ bnd_xb = bnd_sz00;
% 8.08/7.63 bnd_aElement0 bnd_xa & bnd_aElement0 bnd_xb;
% 8.08/7.63 ALL W0. bnd_aElement0 W0 --> bnd_aIdeal0 (bnd_slsdtgt0 W0);
% 8.08/7.63 ALL W0 W1.
% 8.08/7.63 (bnd_aElement0 W0 & bnd_aElement0 W1) & ~ W1 = bnd_sz00 -->
% 8.08/7.63 (EX W2 W3.
% 8.08/7.63 ((bnd_aElement0 W2 & bnd_aElement0 W3) &
% 8.08/7.63 W0 = bnd_sdtpldt0 (bnd_sdtasdt0 W2 W1) W3) &
% 8.08/7.63 (~ W3 = bnd_sz00 -->
% 8.08/7.63 bnd_iLess0 (bnd_sbrdtbr0 W3) (bnd_sbrdtbr0 W1)));
% 8.08/7.63 ALL W0 W1.
% 8.08/7.63 bnd_aNaturalNumber0 W0 & bnd_aNaturalNumber0 W1 -->
% 8.08/7.63 bnd_iLess0 W0 W1 --> True;
% 8.08/7.63 ALL W0.
% 8.08/7.63 bnd_aElement0 W0 & ~ W0 = bnd_sz00 -->
% 8.08/7.63 bnd_aNaturalNumber0 (bnd_sbrdtbr0 W0);
% 8.08/7.63 ALL W0. bnd_aNaturalNumber0 W0 --> True;
% 8.08/7.63 ALL W0 W1.
% 8.08/7.63 bnd_aIdeal0 W0 & bnd_aIdeal0 W1 -->
% 8.08/7.63 (ALL W2.
% 8.08/7.63 bnd_aElement0 W2 --> bnd_aElementOf0 W2 (bnd_sdtpldt1 W0 W1)) -->
% 8.08/7.63 (ALL W2 W3.
% 8.08/7.63 bnd_aElement0 W2 & bnd_aElement0 W3 -->
% 8.08/7.63 (EX W4.
% 8.08/7.63 (bnd_aElement0 W4 & bnd_sdteqdtlpzmzozddtrp0 W4 W2 W0) &
% 8.08/7.63 bnd_sdteqdtlpzmzozddtrp0 W4 W3 W1));
% 8.08/7.63 ALL W0 W1.
% 8.08/7.63 bnd_aIdeal0 W0 & bnd_aIdeal0 W1 -->
% 8.08/7.63 bnd_aIdeal0 (bnd_sdtasasdt0 W0 W1);
% 8.08/7.63 ALL W0 W1.
% 8.08/7.63 bnd_aIdeal0 W0 & bnd_aIdeal0 W1 --> bnd_aIdeal0 (bnd_sdtpldt1 W0 W1);
% 8.08/7.63 ALL W0 W1.
% 8.08/7.63 bnd_aSet0 W0 & bnd_aSet0 W1 -->
% 8.08/7.63 (ALL W2. bnd_aElementOf0 W2 W0 --> bnd_aElementOf0 W2 W1) &
% 8.08/7.63 (ALL W2. bnd_aElementOf0 W2 W1 --> bnd_aElementOf0 W2 W0) -->
% 8.08/7.63 W0 = W1;
% 8.08/7.63 ALL W0.
% 8.08/7.63 bnd_aSet0 W0 --> (ALL W1. bnd_aElementOf0 W1 W0 --> bnd_aElement0 W1);
% 8.08/7.63 ALL W0. bnd_aSet0 W0 --> True; ~ bnd_sz10 = bnd_sz00;
% 8.08/7.63 ALL W0 W1.
% 8.08/7.63 bnd_aElement0 W0 & bnd_aElement0 W1 -->
% 8.08/7.63 bnd_sdtasdt0 W0 W1 = bnd_sz00 --> W0 = bnd_sz00 | W1 = bnd_sz00;
% 8.08/7.63 ALL W0.
% 8.08/7.63 bnd_aElement0 W0 -->
% 8.08/7.63 bnd_sdtasdt0 W0 bnd_sz00 = bnd_sz00 &
% 8.08/7.63 bnd_sz00 = bnd_sdtasdt0 bnd_sz00 W0;
% 8.08/7.63 ALL W0.
% 8.08/7.63 bnd_aElement0 W0 -->
% 8.08/7.63 bnd_sdtasdt0 (bnd_smndt0 bnd_sz10) W0 = bnd_smndt0 W0 &
% 8.08/7.63 bnd_smndt0 W0 = bnd_sdtasdt0 W0 (bnd_smndt0 bnd_sz10);
% 8.08/7.63 ALL W0 W1 W2.
% 8.08/7.63 (bnd_aElement0 W0 & bnd_aElement0 W1) & bnd_aElement0 W2 -->
% 8.08/7.63 bnd_sdtasdt0 W0 (bnd_sdtpldt0 W1 W2) =
% 8.08/7.63 bnd_sdtpldt0 (bnd_sdtasdt0 W0 W1) (bnd_sdtasdt0 W0 W2) &
% 8.08/7.63 bnd_sdtasdt0 (bnd_sdtpldt0 W1 W2) W0 =
% 8.08/7.63 bnd_sdtpldt0 (bnd_sdtasdt0 W1 W0) (bnd_sdtasdt0 W2 W0);
% 8.08/7.63 ALL W0.
% 8.08/7.63 bnd_aElement0 W0 -->
% 8.08/7.63 bnd_sdtasdt0 W0 bnd_sz10 = W0 & W0 = bnd_sdtasdt0 bnd_sz10 W0;
% 8.08/7.63 ALL W0 W1 W2.
% 8.08/7.63 (bnd_aElement0 W0 & bnd_aElement0 W1) & bnd_aElement0 W2 -->
% 8.08/7.63 bnd_sdtasdt0 (bnd_sdtasdt0 W0 W1) W2 =
% 8.08/7.63 bnd_sdtasdt0 W0 (bnd_sdtasdt0 W1 W2);
% 8.08/7.63 ALL W0 W1.
% 8.08/7.63 bnd_aElement0 W0 & bnd_aElement0 W1 -->
% 8.08/7.63 bnd_sdtasdt0 W0 W1 = bnd_sdtasdt0 W1 W0;
% 8.08/7.63 ALL W0.
% 8.08/7.63 bnd_aElement0 W0 -->
% 8.08/7.63 bnd_sdtpldt0 W0 (bnd_smndt0 W0) = bnd_sz00 &
% 8.08/7.63 bnd_sz00 = bnd_sdtpldt0 (bnd_smndt0 W0) W0;
% 8.08/7.63 ALL W0.
% 8.08/7.63 bnd_aElement0 W0 -->
% 8.08/7.63 bnd_sdtpldt0 W0 bnd_sz00 = W0 & W0 = bnd_sdtpldt0 bnd_sz00 W0;
% 8.08/7.63 ALL W0 W1 W2.
% 8.08/7.63 (bnd_aElement0 W0 & bnd_aElement0 W1) & bnd_aElement0 W2 -->
% 8.08/7.63 bnd_sdtpldt0 (bnd_sdtpldt0 W0 W1) W2 =
% 8.08/7.63 bnd_sdtpldt0 W0 (bnd_sdtpldt0 W1 W2);
% 8.08/7.63 ALL W0 W1.
% 8.08/7.63 bnd_aElement0 W0 & bnd_aElement0 W1 -->
% 8.08/7.63 bnd_sdtpldt0 W0 W1 = bnd_sdtpldt0 W1 W0;
% 8.08/7.63 ALL W0 W1.
% 8.08/7.63 bnd_aElement0 W0 & bnd_aElement0 W1 -->
% 8.08/7.63 bnd_aElement0 (bnd_sdtasdt0 W0 W1);
% 8.08/7.63 ALL W0 W1.
% 8.08/7.63 bnd_aElement0 W0 & bnd_aElement0 W1 -->
% 8.08/7.63 bnd_aElement0 (bnd_sdtpldt0 W0 W1);
% 8.08/7.63 ALL W0. bnd_aElement0 W0 --> bnd_aElement0 (bnd_smndt0 W0);
% 8.08/7.63 bnd_aElement0 bnd_sz10; bnd_aElement0 bnd_sz00;
% 8.08/7.63 ALL W0. bnd_aElement0 W0 --> True |]
% 8.08/7.63 ==> (ALL W0.
% 8.08/7.63 bnd_aElementOf0 W0 (bnd_slsdtgt0 bnd_xa) =
% 8.08/7.63 (EX W1. bnd_aElement0 W1 & bnd_sdtasdt0 bnd_xa W1 = W0)) -->
% 8.08/7.63 (ALL W0.
% 8.08/7.63 bnd_aElementOf0 W0 (bnd_slsdtgt0 bnd_xb) =
% 8.08/7.63 (EX W1. bnd_aElement0 W1 & bnd_sdtasdt0 bnd_xb W1 = W0)) -->
% 8.08/7.63 (EX W0 W1.
% 8.08/7.63 (bnd_aElementOf0 W0 (bnd_slsdtgt0 bnd_xa) &
% 8.08/7.63 bnd_aElementOf0 W1 (bnd_slsdtgt0 bnd_xb)) &
% 8.08/7.63 bnd_sdtpldt0 W0 W1 = bnd_xc) |
% 8.08/7.63 bnd_aElementOf0 bnd_xc
% 8.08/7.63 (bnd_sdtpldt1 (bnd_slsdtgt0 bnd_xa) (bnd_slsdtgt0 bnd_xb))
% 8.08/7.63 Adding axioms...
% 8.08/7.64 Typedef.type_definition_def
% 15.47/15.06 ...done.
% 15.47/15.07 Ground types: ?'b, TPTP_Interpret.ind
% 15.47/15.07 Translating term (sizes: 1, 1) ...
% 20.08/19.64 Invoking SAT solver...
% 20.08/19.64 No model exists.
% 20.08/19.64 Translating term (sizes: 2, 1) ...
% 25.39/24.90 Invoking SAT solver...
% 25.39/24.90 No model exists.
% 25.39/24.90 Translating term (sizes: 1, 2) ...
% 48.86/48.40 Invoking SAT solver...
% 48.96/48.47 No model exists.
% 48.96/48.47 Translating term (sizes: 3, 1) ...
% 56.67/56.11 Invoking SAT solver...
% 56.67/56.12 No model exists.
% 56.67/56.12 Translating term (sizes: 2, 2) ...
% 87.96/87.33 Invoking SAT solver...
% 88.06/87.40 No model exists.
% 88.06/87.40 Translating term (sizes: 1, 3) ...
% 195.67/194.55 Invoking SAT solver...
% 300.12/298.03 /export/starexec/sandbox/solver/lib/scripts/run-polyml-5.5.2: line 82: 17336 CPU time limit exceeded (core dumped) "$ISABELLE_HOME/lib/scripts/feeder" -p -h "$MLTEXT" -t "$MLEXIT" $FEEDER_OPTS
% 300.12/298.03 17337 (core dumped) | { read FPID; "$POLY" -q -i $ML_OPTIONS; RC="$?"; kill -TERM "$FPID"; exit "$RC"; }
% 300.12/298.04 /export/starexec/sandbox/solver/src/HOL/TPTP/lib/Tools/tptp_refute: line 26: 17281 Exit 152 "$ISABELLE_PROCESS" -q -e "use_thy \"/tmp/$SCRATCH\"; exit 1;" HOL-TPTP
% 300.12/298.04 17282 CPU time limit exceeded (core dumped) | grep --line-buffered -v "^###\|^PROOF FAILED for depth\|^Failure node\|inferences so far. Searching to depth\|^val \|^Loading theory\|^Warning-The type of\|^ monotype.$"
%------------------------------------------------------------------------------