%------------------------------------------------------------------------------
% File     : ePrincess---1.0
% Problem  : NUM848+2 : TPTP v8.1.0. Released v4.1.0.
% Transfm  : none
% Format   : tptp:raw
% Command  : ePrincess-casc -timeout=%d %s

% Computer : n010.cluster.edu
% Model    : x86_64 x86_64
% CPU      : Intel(R) Xeon(R) CPU E5-2620 v4 2.10GHz
% Memory   : 8042.1875MB
% OS       : Linux 3.10.0-693.el7.x86_64
% CPULimit : 300s
% WCLimit  : 600s
% DateTime : Mon Jul 18 08:49:08 EDT 2022

% Result   : Theorem 2.81s 1.33s
% Output   : Proof 4.80s
% Verified : 
% SZS Type : -

% Comments : 
%------------------------------------------------------------------------------
%----WARNING: Could not form TPTP format derivation
%------------------------------------------------------------------------------
%----ORIGINAL SYSTEM OUTPUT
% 0.10/0.12  % Problem  : NUM848+2 : TPTP v8.1.0. Released v4.1.0.
% 0.10/0.13  % Command  : ePrincess-casc -timeout=%d %s
% 0.12/0.33  % Computer : n010.cluster.edu
% 0.12/0.33  % Model    : x86_64 x86_64
% 0.12/0.33  % CPU      : Intel(R) Xeon(R) CPU E5-2620 v4 @ 2.10GHz
% 0.12/0.33  % Memory   : 8042.1875MB
% 0.12/0.33  % OS       : Linux 3.10.0-693.el7.x86_64
% 0.12/0.34  % CPULimit : 300
% 0.12/0.34  % WCLimit  : 600
% 0.12/0.34  % DateTime : Wed Jul  6 14:43:32 EDT 2022
% 0.12/0.34  % CPUTime  : 
% 0.61/0.60          ____       _                          
% 0.61/0.60    ___  / __ \_____(_)___  ________  __________
% 0.61/0.61   / _ \/ /_/ / ___/ / __ \/ ___/ _ \/ ___/ ___/
% 0.61/0.61  /  __/ ____/ /  / / / / / /__/  __(__  |__  ) 
% 0.61/0.61  \___/_/   /_/  /_/_/ /_/\___/\___/____/____/  
% 0.61/0.61  
% 0.61/0.61  A Theorem Prover for First-Order Logic
% 0.61/0.61  (ePrincess v.1.0)
% 0.61/0.61  
% 0.61/0.61  (c) Philipp Rümmer, 2009-2015
% 0.61/0.61  (c) Peter Backeman, 2014-2015
% 0.61/0.61  (contributions by Angelo Brillout, Peter Baumgartner)
% 0.61/0.61  Free software under GNU Lesser General Public License (LGPL).
% 0.61/0.61  Bug reports to peter@backeman.se
% 0.61/0.61  
% 0.61/0.61  For more information, visit http://user.uu.se/~petba168/breu/
% 0.61/0.61  
% 0.61/0.61  Loading /export/starexec/sandbox/benchmark/theBenchmark.p ...
% 0.67/0.68  Prover 0: Options:  -triggersInConjecture -genTotalityAxioms -tightFunctionScopes -clausifier=simple -reverseFunctionalityPropagation +boolFunsAsPreds -triggerStrategy=allMaximal -resolutionMethod=nonUnifying +ignoreQuantifiers -generateTriggers=all
% 1.56/0.94  Prover 0: Preprocessing ...
% 1.98/1.16  Prover 0: Constructing countermodel ...
% 2.81/1.33  Prover 0: proved (649ms)
% 2.81/1.33  
% 2.81/1.33  No countermodel exists, formula is valid
% 2.81/1.33  % SZS status Theorem for theBenchmark
% 2.81/1.33  
% 2.81/1.33  Generating proof ... found it (size 18)
% 4.39/1.72  
% 4.39/1.72  % SZS output start Proof for theBenchmark
% 4.39/1.73  Assumed formulas after preprocessing and simplification: 
% 4.39/1.73  | (0)  ? [v0] :  ? [v1] :  ? [v2] :  ? [v3] :  ? [v4] :  ? [v5] :  ? [v6] :  ? [v7] :  ? [v8] :  ? [v9] :  ? [v10] :  ? [v11] :  ? [v12] :  ? [v13] : ( ~ (v13 = v3) & vplus(v2, vd436) = v3 & vplus(v1, vd436) = v4 & vplus(v0, v12) = v13 & vplus(v0, v10) = v9 & vplus(v0, v4) = v3 & vplus(v0, v1) = v2 & vplus(v0, vd436) = v9 & vplus(vd437, v7) = v8 & vplus(vd437, vd439) = v5 & vsucc(v5) = v6 & vsucc(vd439) = v7 & vsucc(vd437) = v11 & vmul(vd436, v11) = v9 & vmul(vd436, v8) = v3 & vmul(vd436, v7) = v12 & vmul(vd436, v6) = v3 & vmul(vd436, v5) = v2 & vmul(vd436, v1) = v10 & vmul(vd436, vd439) = v1 & vmul(vd436, vd437) = v0 &  ! [v14] :  ! [v15] :  ! [v16] :  ! [v17] :  ! [v18] : ( ~ (vplus(v17, v16) = v18) |  ~ (vplus(v14, v15) = v17) |  ? [v19] : (vplus(v15, v16) = v19 & vplus(v14, v19) = v18)) &  ! [v14] :  ! [v15] :  ! [v16] :  ! [v17] :  ! [v18] : ( ~ (vplus(v15, v16) = v17) |  ~ (vplus(v14, v17) = v18) |  ? [v19] : (vplus(v19, v16) = v18 & vplus(v14, v15) = v19)) &  ! [v14] :  ! [v15] :  ! [v16] :  ! [v17] : (v15 = v14 |  ~ (vplus(v17, v16) = v15) |  ~ (vplus(v17, v16) = v14)) &  ! [v14] :  ! [v15] :  ! [v16] :  ! [v17] : (v15 = v14 |  ~ (vmul(v17, v16) = v15) |  ~ (vmul(v17, v16) = v14)) &  ! [v14] :  ! [v15] :  ! [v16] :  ! [v17] : ( ~ (vplus(v16, v15) = v17) |  ~ (vsucc(v14) = v16) |  ? [v18] : (vplus(v14, v15) = v18 & vsucc(v18) = v17)) &  ! [v14] :  ! [v15] :  ! [v16] :  ! [v17] : ( ~ (vplus(v16, v14) = v17) |  ~ (vmul(v14, v15) = v16) |  ? [v18] : (vsucc(v15) = v18 & vmul(v14, v18) = v17)) &  ! [v14] :  ! [v15] :  ! [v16] :  ! [v17] : ( ~ (vplus(v14, v16) = v17) |  ~ (vsucc(v15) = v16) |  ? [v18] : (vplus(v14, v15) = v18 & vsucc(v18) = v17)) &  ! [v14] :  ! [v15] :  ! [v16] :  ! [v17] : ( ~ (vsucc(v15) = v16) |  ~ (vmul(v14, v16) = v17) |  ? [v18] : (vplus(v18, v14) = v17 & vmul(v14, v15) = v18)) &  ! [v14] :  ! [v15] :  ! [v16] : (v15 = v14 |  ~ (vskolem2(v16) = v15) |  ~ (vskolem2(v16) = v14)) &  ! [v14] :  ! [v15] :  ! [v16] : (v15 = v14 |  ~ (vsucc(v16) = v15) |  ~ (vsucc(v16) = v14)) &  ! [v14] :  ! [v15] :  ! [v16] : ( ~ (vplus(v15, v14) = v16) | vplus(v14, v15) = v16) &  ! [v14] :  ! [v15] :  ! [v16] : ( ~ (vplus(v15, v1) = v16) |  ~ less(v14, v16) | leq(v14, v15)) &  ! [v14] :  ! [v15] :  ! [v16] : ( ~ (vplus(v14, v15) = v16) | vplus(v15, v14) = v16) &  ! [v14] :  ! [v15] :  ! [v16] : ( ~ (vplus(v14, v15) = v16) |  ? [v17] :  ? [v18] : (vplus(v17, v15) = v18 & vsucc(v16) = v18 & vsucc(v14) = v17)) &  ! [v14] :  ! [v15] :  ! [v16] : ( ~ (vplus(v14, v15) = v16) |  ? [v17] :  ? [v18] : (vplus(v14, v17) = v18 & vsucc(v16) = v18 & vsucc(v15) = v17)) &  ! [v14] :  ! [v15] : (v15 = v14 |  ~ (vmul(v14, v1) = v15)) &  ! [v14] :  ! [v15] : (v14 = v1 |  ~ (vskolem2(v14) = v15) | vsucc(v15) = v14) &  ! [v14] :  ! [v15] : ( ~ (vplus(v14, v1) = v15) | vsucc(v14) = v15) &  ! [v14] :  ! [v15] : ( ~ (vplus(v1, v14) = v15) | vsucc(v14) = v15) &  ! [v14] :  ! [v15] : ( ~ (vsucc(v14) = v15) | vplus(v14, v1) = v15) &  ! [v14] :  ! [v15] : ( ~ (vsucc(v14) = v15) | vplus(v1, v14) = v15))
% 4.39/1.77  | Instantiating (0) with all_0_0_0, all_0_1_1, all_0_2_2, all_0_3_3, all_0_4_4, all_0_5_5, all_0_6_6, all_0_7_7, all_0_8_8, all_0_9_9, all_0_10_10, all_0_11_11, all_0_12_12, all_0_13_13 yields:
% 4.39/1.77  | (1)  ~ (all_0_0_0 = all_0_10_10) & vplus(all_0_11_11, vd436) = all_0_10_10 & vplus(all_0_12_12, vd436) = all_0_9_9 & vplus(all_0_13_13, all_0_1_1) = all_0_0_0 & vplus(all_0_13_13, all_0_3_3) = all_0_4_4 & vplus(all_0_13_13, all_0_9_9) = all_0_10_10 & vplus(all_0_13_13, all_0_12_12) = all_0_11_11 & vplus(all_0_13_13, vd436) = all_0_4_4 & vplus(vd437, all_0_6_6) = all_0_5_5 & vplus(vd437, vd439) = all_0_8_8 & vsucc(all_0_8_8) = all_0_7_7 & vsucc(vd439) = all_0_6_6 & vsucc(vd437) = all_0_2_2 & vmul(vd436, all_0_2_2) = all_0_4_4 & vmul(vd436, all_0_5_5) = all_0_10_10 & vmul(vd436, all_0_6_6) = all_0_1_1 & vmul(vd436, all_0_7_7) = all_0_10_10 & vmul(vd436, all_0_8_8) = all_0_11_11 & vmul(vd436, v1) = all_0_3_3 & vmul(vd436, vd439) = all_0_12_12 & vmul(vd436, vd437) = all_0_13_13 &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] : ( ~ (vplus(v3, v2) = v4) |  ~ (vplus(v0, v1) = v3) |  ? [v5] : (vplus(v1, v2) = v5 & vplus(v0, v5) = v4)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] : ( ~ (vplus(v1, v2) = v3) |  ~ (vplus(v0, v3) = v4) |  ? [v5] : (vplus(v5, v2) = v4 & vplus(v0, v1) = v5)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v1 = v0 |  ~ (vplus(v3, v2) = v1) |  ~ (vplus(v3, v2) = v0)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v1 = v0 |  ~ (vmul(v3, v2) = v1) |  ~ (vmul(v3, v2) = v0)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (vplus(v2, v1) = v3) |  ~ (vsucc(v0) = v2) |  ? [v4] : (vplus(v0, v1) = v4 & vsucc(v4) = v3)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (vplus(v2, v0) = v3) |  ~ (vmul(v0, v1) = v2) |  ? [v4] : (vsucc(v1) = v4 & vmul(v0, v4) = v3)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (vplus(v0, v2) = v3) |  ~ (vsucc(v1) = v2) |  ? [v4] : (vplus(v0, v1) = v4 & vsucc(v4) = v3)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (vsucc(v1) = v2) |  ~ (vmul(v0, v2) = v3) |  ? [v4] : (vplus(v4, v0) = v3 & vmul(v0, v1) = v4)) &  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (vskolem2(v2) = v1) |  ~ (vskolem2(v2) = v0)) &  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (vsucc(v2) = v1) |  ~ (vsucc(v2) = v0)) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (vplus(v1, v0) = v2) | vplus(v0, v1) = v2) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (vplus(v1, v1) = v2) |  ~ less(v0, v2) | leq(v0, v1)) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (vplus(v0, v1) = v2) | vplus(v1, v0) = v2) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (vplus(v0, v1) = v2) |  ? [v3] :  ? [v4] : (vplus(v3, v1) = v4 & vsucc(v2) = v4 & vsucc(v0) = v3)) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (vplus(v0, v1) = v2) |  ? [v3] :  ? [v4] : (vplus(v0, v3) = v4 & vsucc(v2) = v4 & vsucc(v1) = v3)) &  ! [v0] :  ! [v1] : (v1 = v0 |  ~ (vmul(v0, v1) = v1)) &  ! [v0] :  ! [v1] : (v0 = v1 |  ~ (vskolem2(v0) = v1) | vsucc(v1) = v0) &  ! [v0] :  ! [v1] : ( ~ (vplus(v0, v1) = v1) | vsucc(v0) = v1) &  ! [v0] :  ! [v1] : ( ~ (vplus(v1, v0) = v1) | vsucc(v0) = v1) &  ! [v0] :  ! [v1] : ( ~ (vsucc(v0) = v1) | vplus(v0, v1) = v1) &  ! [v0] :  ! [v1] : ( ~ (vsucc(v0) = v1) | vplus(v1, v0) = v1)
% 4.39/1.78  |
% 4.39/1.78  | Applying alpha-rule on (1) yields:
% 4.39/1.78  | (2)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (vplus(v0, v1) = v2) | vplus(v1, v0) = v2)
% 4.39/1.78  | (3)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (vplus(v1, v0) = v2) | vplus(v0, v1) = v2)
% 4.39/1.78  | (4)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (vplus(v0, v1) = v2) |  ? [v3] :  ? [v4] : (vplus(v0, v3) = v4 & vsucc(v2) = v4 & vsucc(v1) = v3))
% 4.39/1.78  | (5) vmul(vd436, all_0_8_8) = all_0_11_11
% 4.39/1.78  | (6) vmul(vd436, all_0_5_5) = all_0_10_10
% 4.39/1.78  | (7)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (vplus(v1, v1) = v2) |  ~ less(v0, v2) | leq(v0, v1))
% 4.39/1.78  | (8) vsucc(vd437) = all_0_2_2
% 4.39/1.78  | (9) vmul(vd436, vd437) = all_0_13_13
% 4.39/1.78  | (10)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (vplus(v2, v1) = v3) |  ~ (vsucc(v0) = v2) |  ? [v4] : (vplus(v0, v1) = v4 & vsucc(v4) = v3))
% 4.39/1.78  | (11)  ! [v0] :  ! [v1] : (v1 = v0 |  ~ (vmul(v0, v1) = v1))
% 4.76/1.78  | (12) vplus(all_0_13_13, vd436) = all_0_4_4
% 4.76/1.78  | (13) vplus(all_0_11_11, vd436) = all_0_10_10
% 4.76/1.78  | (14)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v1 = v0 |  ~ (vmul(v3, v2) = v1) |  ~ (vmul(v3, v2) = v0))
% 4.76/1.78  | (15)  ! [v0] :  ! [v1] : ( ~ (vsucc(v0) = v1) | vplus(v1, v0) = v1)
% 4.76/1.78  | (16)  ! [v0] :  ! [v1] : ( ~ (vplus(v1, v0) = v1) | vsucc(v0) = v1)
% 4.76/1.78  | (17) vmul(vd436, all_0_7_7) = all_0_10_10
% 4.76/1.78  | (18)  ~ (all_0_0_0 = all_0_10_10)
% 4.76/1.78  | (19)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v1 = v0 |  ~ (vplus(v3, v2) = v1) |  ~ (vplus(v3, v2) = v0))
% 4.76/1.78  | (20) vmul(vd436, vd439) = all_0_12_12
% 4.76/1.78  | (21)  ! [v0] :  ! [v1] : ( ~ (vsucc(v0) = v1) | vplus(v0, v1) = v1)
% 4.76/1.78  | (22)  ! [v0] :  ! [v1] : ( ~ (vplus(v0, v1) = v1) | vsucc(v0) = v1)
% 4.76/1.78  | (23)  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (vskolem2(v2) = v1) |  ~ (vskolem2(v2) = v0))
% 4.76/1.78  | (24)  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (vsucc(v2) = v1) |  ~ (vsucc(v2) = v0))
% 4.76/1.78  | (25)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] : ( ~ (vplus(v3, v2) = v4) |  ~ (vplus(v0, v1) = v3) |  ? [v5] : (vplus(v1, v2) = v5 & vplus(v0, v5) = v4))
% 4.76/1.79  | (26) vplus(vd437, vd439) = all_0_8_8
% 4.76/1.79  | (27) vplus(all_0_12_12, vd436) = all_0_9_9
% 4.76/1.79  | (28) vsucc(vd439) = all_0_6_6
% 4.76/1.79  | (29) vsucc(all_0_8_8) = all_0_7_7
% 4.76/1.79  | (30) vmul(vd436, all_0_2_2) = all_0_4_4
% 4.80/1.79  | (31)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (vsucc(v1) = v2) |  ~ (vmul(v0, v2) = v3) |  ? [v4] : (vplus(v4, v0) = v3 & vmul(v0, v1) = v4))
% 4.80/1.79  | (32) vplus(vd437, all_0_6_6) = all_0_5_5
% 4.80/1.79  | (33)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (vplus(v0, v2) = v3) |  ~ (vsucc(v1) = v2) |  ? [v4] : (vplus(v0, v1) = v4 & vsucc(v4) = v3))
% 4.80/1.79  | (34) vmul(vd436, all_0_6_6) = all_0_1_1
% 4.80/1.79  | (35) vplus(all_0_13_13, all_0_3_3) = all_0_4_4
% 4.80/1.79  | (36) vmul(vd436, v1) = all_0_3_3
% 4.80/1.79  | (37) vplus(all_0_13_13, all_0_12_12) = all_0_11_11
% 4.80/1.79  | (38)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] : ( ~ (vplus(v1, v2) = v3) |  ~ (vplus(v0, v3) = v4) |  ? [v5] : (vplus(v5, v2) = v4 & vplus(v0, v1) = v5))
% 4.80/1.79  | (39) vplus(all_0_13_13, all_0_1_1) = all_0_0_0
% 4.80/1.79  | (40)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : ( ~ (vplus(v2, v0) = v3) |  ~ (vmul(v0, v1) = v2) |  ? [v4] : (vsucc(v1) = v4 & vmul(v0, v4) = v3))
% 4.80/1.79  | (41)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (vplus(v0, v1) = v2) |  ? [v3] :  ? [v4] : (vplus(v3, v1) = v4 & vsucc(v2) = v4 & vsucc(v0) = v3))
% 4.80/1.79  | (42)  ! [v0] :  ! [v1] : (v0 = v1 |  ~ (vskolem2(v0) = v1) | vsucc(v1) = v0)
% 4.80/1.79  | (43) vplus(all_0_13_13, all_0_9_9) = all_0_10_10
% 4.80/1.79  |
% 4.80/1.79  | Instantiating formula (4) with all_0_8_8, vd439, vd437 and discharging atoms vplus(vd437, vd439) = all_0_8_8, yields:
% 4.80/1.79  | (44)  ? [v0] :  ? [v1] : (vplus(vd437, v0) = v1 & vsucc(all_0_8_8) = v1 & vsucc(vd439) = v0)
% 4.80/1.79  |
% 4.80/1.79  | Instantiating formula (40) with all_0_9_9, all_0_12_12, vd439, vd436 and discharging atoms vplus(all_0_12_12, vd436) = all_0_9_9, vmul(vd436, vd439) = all_0_12_12, yields:
% 4.80/1.79  | (45)  ? [v0] : (vsucc(vd439) = v0 & vmul(vd436, v0) = all_0_9_9)
% 4.80/1.79  |
% 4.80/1.79  | Instantiating (45) with all_37_0_38 yields:
% 4.80/1.79  | (46) vsucc(vd439) = all_37_0_38 & vmul(vd436, all_37_0_38) = all_0_9_9
% 4.80/1.79  |
% 4.80/1.79  | Applying alpha-rule on (46) yields:
% 4.80/1.79  | (47) vsucc(vd439) = all_37_0_38
% 4.80/1.79  | (48) vmul(vd436, all_37_0_38) = all_0_9_9
% 4.80/1.79  |
% 4.80/1.79  | Instantiating (44) with all_39_0_39, all_39_1_40 yields:
% 4.80/1.79  | (49) vplus(vd437, all_39_1_40) = all_39_0_39 & vsucc(all_0_8_8) = all_39_0_39 & vsucc(vd439) = all_39_1_40
% 4.80/1.79  |
% 4.80/1.79  | Applying alpha-rule on (49) yields:
% 4.80/1.79  | (50) vplus(vd437, all_39_1_40) = all_39_0_39
% 4.80/1.80  | (51) vsucc(all_0_8_8) = all_39_0_39
% 4.80/1.80  | (52) vsucc(vd439) = all_39_1_40
% 4.80/1.80  |
% 4.80/1.80  | Instantiating formula (24) with vd439, all_39_1_40, all_0_6_6 and discharging atoms vsucc(vd439) = all_39_1_40, vsucc(vd439) = all_0_6_6, yields:
% 4.80/1.80  | (53) all_39_1_40 = all_0_6_6
% 4.80/1.80  |
% 4.80/1.80  | Instantiating formula (24) with vd439, all_37_0_38, all_39_1_40 and discharging atoms vsucc(vd439) = all_39_1_40, vsucc(vd439) = all_37_0_38, yields:
% 4.80/1.80  | (54) all_39_1_40 = all_37_0_38
% 4.80/1.80  |
% 4.80/1.80  | Combining equations (54,53) yields a new equation:
% 4.80/1.80  | (55) all_37_0_38 = all_0_6_6
% 4.80/1.80  |
% 4.80/1.80  | Simplifying 55 yields:
% 4.80/1.80  | (56) all_37_0_38 = all_0_6_6
% 4.80/1.80  |
% 4.80/1.80  | From (56) and (48) follows:
% 4.80/1.80  | (57) vmul(vd436, all_0_6_6) = all_0_9_9
% 4.80/1.80  |
% 4.80/1.80  | Instantiating formula (14) with vd436, all_0_6_6, all_0_9_9, all_0_1_1 and discharging atoms vmul(vd436, all_0_6_6) = all_0_1_1, vmul(vd436, all_0_6_6) = all_0_9_9, yields:
% 4.80/1.80  | (58) all_0_1_1 = all_0_9_9
% 4.80/1.80  |
% 4.80/1.80  | From (58) and (39) follows:
% 4.80/1.80  | (59) vplus(all_0_13_13, all_0_9_9) = all_0_0_0
% 4.80/1.80  |
% 4.80/1.80  | Instantiating formula (19) with all_0_13_13, all_0_9_9, all_0_0_0, all_0_10_10 and discharging atoms vplus(all_0_13_13, all_0_9_9) = all_0_0_0, vplus(all_0_13_13, all_0_9_9) = all_0_10_10, yields:
% 4.80/1.80  | (60) all_0_0_0 = all_0_10_10
% 4.80/1.80  |
% 4.80/1.80  | Equations (60) can reduce 18 to:
% 4.80/1.80  | (61) $false
% 4.80/1.80  |
% 4.80/1.80  |-The branch is then unsatisfiable
% 4.80/1.80  % SZS output end Proof for theBenchmark
% 4.80/1.80  
% 4.80/1.80  1177ms
%------------------------------------------------------------------------------