TSTP Solution File: NUM423+1 by ePrincess---1.0

View Problem - Process Solution

%------------------------------------------------------------------------------
% File     : ePrincess---1.0
% Problem  : NUM423+1 : TPTP v8.1.0. Released v4.0.0.
% Transfm  : none
% Format   : tptp:raw
% Command  : ePrincess-casc -timeout=%d %s

% Computer : n019.cluster.edu
% Model    : x86_64 x86_64
% CPU      : Intel(R) Xeon(R) CPU E5-2620 v4 2.10GHz
% Memory   : 8042.1875MB
% OS       : Linux 3.10.0-693.el7.x86_64
% CPULimit : 300s
% WCLimit  : 600s
% DateTime : Mon Jul 18 08:44:18 EDT 2022

% Result   : Theorem 18.79s 6.37s
% Output   : Proof 21.99s
% Verified : 
% SZS Type : -

% Comments : 
%------------------------------------------------------------------------------
%----WARNING: Could not form TPTP format derivation
%------------------------------------------------------------------------------
%----ORIGINAL SYSTEM OUTPUT
% 0.04/0.12  % Problem  : NUM423+1 : TPTP v8.1.0. Released v4.0.0.
% 0.04/0.13  % Command  : ePrincess-casc -timeout=%d %s
% 0.13/0.34  % Computer : n019.cluster.edu
% 0.13/0.34  % Model    : x86_64 x86_64
% 0.13/0.34  % CPU      : Intel(R) Xeon(R) CPU E5-2620 v4 @ 2.10GHz
% 0.13/0.34  % Memory   : 8042.1875MB
% 0.13/0.34  % OS       : Linux 3.10.0-693.el7.x86_64
% 0.13/0.34  % CPULimit : 300
% 0.13/0.34  % WCLimit  : 600
% 0.13/0.34  % DateTime : Tue Jul  5 11:55:38 EDT 2022
% 0.13/0.34  % CPUTime  : 
% 0.51/0.58          ____       _                          
% 0.51/0.59    ___  / __ \_____(_)___  ________  __________
% 0.51/0.59   / _ \/ /_/ / ___/ / __ \/ ___/ _ \/ ___/ ___/
% 0.51/0.59  /  __/ ____/ /  / / / / / /__/  __(__  |__  ) 
% 0.51/0.59  \___/_/   /_/  /_/_/ /_/\___/\___/____/____/  
% 0.51/0.59  
% 0.51/0.59  A Theorem Prover for First-Order Logic
% 0.51/0.59  (ePrincess v.1.0)
% 0.51/0.59  
% 0.51/0.59  (c) Philipp Rümmer, 2009-2015
% 0.51/0.59  (c) Peter Backeman, 2014-2015
% 0.51/0.59  (contributions by Angelo Brillout, Peter Baumgartner)
% 0.51/0.59  Free software under GNU Lesser General Public License (LGPL).
% 0.51/0.59  Bug reports to peter@backeman.se
% 0.51/0.59  
% 0.51/0.59  For more information, visit http://user.uu.se/~petba168/breu/
% 0.51/0.59  
% 0.51/0.59  Loading /export/starexec/sandbox/benchmark/theBenchmark.p ...
% 0.74/0.64  Prover 0: Options:  -triggersInConjecture -genTotalityAxioms -tightFunctionScopes -clausifier=simple -reverseFunctionalityPropagation +boolFunsAsPreds -triggerStrategy=allMaximal -resolutionMethod=nonUnifying +ignoreQuantifiers -generateTriggers=all
% 1.61/0.98  Prover 0: Preprocessing ...
% 2.58/1.29  Prover 0: Constructing countermodel ...
% 16.73/5.93  Prover 1: Options:  +triggersInConjecture -genTotalityAxioms -tightFunctionScopes -clausifier=simple +reverseFunctionalityPropagation -boolFunsAsPreds -triggerStrategy=maximal -resolutionMethod=normal +ignoreQuantifiers -generateTriggers=all
% 16.86/5.97  Prover 1: Preprocessing ...
% 17.40/6.09  Prover 1: Constructing countermodel ...
% 17.40/6.15  Prover 1: gave up
% 17.40/6.15  Prover 2: Options:  +triggersInConjecture +genTotalityAxioms +tightFunctionScopes -clausifier=simple -reverseFunctionalityPropagation -boolFunsAsPreds -triggerStrategy=allUni -resolutionMethod=nonUnifying +ignoreQuantifiers -generateTriggers=all
% 17.90/6.18  Prover 2: Preprocessing ...
% 18.33/6.27  Prover 2: Warning: ignoring some quantifiers
% 18.33/6.27  Prover 2: Constructing countermodel ...
% 18.79/6.37  Prover 2: proved (224ms)
% 18.79/6.37  Prover 0: stopped
% 18.79/6.37  
% 18.79/6.37  No countermodel exists, formula is valid
% 18.79/6.37  % SZS status Theorem for theBenchmark
% 18.79/6.37  
% 18.79/6.37  Generating proof ... Warning: ignoring some quantifiers
% 21.45/6.95  found it (size 118)
% 21.45/6.95  
% 21.45/6.95  % SZS output start Proof for theBenchmark
% 21.45/6.95  Assumed formulas after preprocessing and simplification: 
% 21.45/6.95  | (0)  ? [v0] :  ? [v1] : ( ~ (v1 = 0) &  ~ (xq = sz00) & sdteqdtlpzmzozddtrp0(xa, xa, xq) = v1 & smndt0(sz10) = v0 & aInteger0(xq) = 0 & aInteger0(xa) = 0 & aInteger0(sz10) = 0 & aInteger0(sz00) = 0 &  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] :  ! [v6] :  ! [v7] : (v4 = sz00 |  ~ (aDivisorOf0(v4, v6) = v7) |  ~ (sdtpldt0(v2, v5) = v6) |  ~ (smndt0(v3) = v5) |  ? [v8] : (( ~ (v8 = 0) & aInteger0(v4) = v8) | ( ~ (v8 = 0) & aInteger0(v3) = v8) | ( ~ (v8 = 0) & aInteger0(v2) = v8) | (( ~ (v7 = 0) | (v8 = 0 & sdteqdtlpzmzozddtrp0(v2, v3, v4) = 0)) & (v7 = 0 | ( ~ (v8 = 0) & sdteqdtlpzmzozddtrp0(v2, v3, v4) = v8))))) &  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] :  ! [v6] :  ! [v7] : ( ~ (sdtasdt0(v3, v4) = v6) |  ~ (sdtasdt0(v2, v4) = v5) |  ~ (sdtpldt0(v5, v6) = v7) |  ? [v8] :  ? [v9] :  ? [v10] :  ? [v11] :  ? [v12] :  ? [v13] : ((v13 = v7 & v11 = v9 & sdtasdt0(v12, v4) = v7 & sdtasdt0(v2, v8) = v9 & sdtasdt0(v2, v3) = v10 & sdtpldt0(v10, v5) = v9 & sdtpldt0(v3, v4) = v8 & sdtpldt0(v2, v3) = v12) | ( ~ (v8 = 0) & aInteger0(v4) = v8) | ( ~ (v8 = 0) & aInteger0(v3) = v8) | ( ~ (v8 = 0) & aInteger0(v2) = v8))) &  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] :  ! [v6] :  ! [v7] : ( ~ (sdtasdt0(v2, v4) = v6) |  ~ (sdtasdt0(v2, v3) = v5) |  ~ (sdtpldt0(v5, v6) = v7) |  ? [v8] :  ? [v9] :  ? [v10] :  ? [v11] :  ? [v12] :  ? [v13] : ((v13 = v11 & v9 = v7 & sdtasdt0(v10, v4) = v11 & sdtasdt0(v3, v4) = v12 & sdtasdt0(v2, v8) = v7 & sdtpldt0(v6, v12) = v11 & sdtpldt0(v3, v4) = v8 & sdtpldt0(v2, v3) = v10) | ( ~ (v8 = 0) & aInteger0(v4) = v8) | ( ~ (v8 = 0) & aInteger0(v3) = v8) | ( ~ (v8 = 0) & aInteger0(v2) = v8))) &  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] :  ! [v6] : (v3 = v2 |  ~ (sdteqdtlpzmzozddtrp0(v6, v5, v4) = v3) |  ~ (sdteqdtlpzmzozddtrp0(v6, v5, v4) = v2)) &  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] :  ! [v6] : ( ~ (sdtasdt0(v5, v4) = v6) |  ~ (sdtasdt0(v2, v3) = v5) |  ? [v7] :  ? [v8] : ((v8 = v6 & sdtasdt0(v3, v4) = v7 & sdtasdt0(v2, v7) = v6) | ( ~ (v7 = 0) & aInteger0(v4) = v7) | ( ~ (v7 = 0) & aInteger0(v3) = v7) | ( ~ (v7 = 0) & aInteger0(v2) = v7))) &  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] :  ! [v6] : ( ~ (sdtasdt0(v5, v4) = v6) |  ~ (sdtpldt0(v2, v3) = v5) |  ? [v7] :  ? [v8] :  ? [v9] :  ? [v10] :  ? [v11] :  ? [v12] :  ? [v13] : ((v13 = v6 & v11 = v8 & sdtasdt0(v3, v4) = v12 & sdtasdt0(v2, v7) = v8 & sdtasdt0(v2, v4) = v10 & sdtasdt0(v2, v3) = v9 & sdtpldt0(v10, v12) = v6 & sdtpldt0(v9, v10) = v8 & sdtpldt0(v3, v4) = v7) | ( ~ (v7 = 0) & aInteger0(v4) = v7) | ( ~ (v7 = 0) & aInteger0(v3) = v7) | ( ~ (v7 = 0) & aInteger0(v2) = v7))) &  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] :  ! [v6] : ( ~ (sdtasdt0(v3, v4) = v5) |  ~ (sdtasdt0(v2, v5) = v6) |  ? [v7] :  ? [v8] : ((v8 = v6 & sdtasdt0(v7, v4) = v6 & sdtasdt0(v2, v3) = v7) | ( ~ (v7 = 0) & aInteger0(v4) = v7) | ( ~ (v7 = 0) & aInteger0(v3) = v7) | ( ~ (v7 = 0) & aInteger0(v2) = v7))) &  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] :  ! [v6] : ( ~ (sdtasdt0(v2, v5) = v6) |  ~ (sdtpldt0(v3, v4) = v5) |  ? [v7] :  ? [v8] :  ? [v9] :  ? [v10] :  ? [v11] :  ? [v12] :  ? [v13] : ((v13 = v11 & v9 = v6 & sdtasdt0(v10, v4) = v11 & sdtasdt0(v3, v4) = v12 & sdtasdt0(v2, v4) = v8 & sdtasdt0(v2, v3) = v7 & sdtpldt0(v8, v12) = v11 & sdtpldt0(v7, v8) = v6 & sdtpldt0(v2, v3) = v10) | ( ~ (v7 = 0) & aInteger0(v4) = v7) | ( ~ (v7 = 0) & aInteger0(v3) = v7) | ( ~ (v7 = 0) & aInteger0(v2) = v7))) &  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] :  ! [v6] : ( ~ (sdtpldt0(v5, v4) = v6) |  ~ (sdtpldt0(v2, v3) = v5) |  ? [v7] :  ? [v8] : ((v8 = v6 & sdtpldt0(v3, v4) = v7 & sdtpldt0(v2, v7) = v6) | ( ~ (v7 = 0) & aInteger0(v4) = v7) | ( ~ (v7 = 0) & aInteger0(v3) = v7) | ( ~ (v7 = 0) & aInteger0(v2) = v7))) &  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] :  ! [v6] : ( ~ (sdtpldt0(v3, v4) = v5) |  ~ (sdtpldt0(v2, v5) = v6) |  ? [v7] :  ? [v8] : ((v8 = v6 & sdtpldt0(v7, v4) = v6 & sdtpldt0(v2, v3) = v7) | ( ~ (v7 = 0) & aInteger0(v4) = v7) | ( ~ (v7 = 0) & aInteger0(v3) = v7) | ( ~ (v7 = 0) & aInteger0(v2) = v7))) &  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] : (v4 = sz00 |  ~ (sdteqdtlpzmzozddtrp0(v2, v3, v4) = v5) |  ? [v6] :  ? [v7] :  ? [v8] : (( ~ (v6 = 0) & aInteger0(v4) = v6) | ( ~ (v6 = 0) & aInteger0(v3) = v6) | ( ~ (v6 = 0) & aInteger0(v2) = v6) | (( ~ (v5 = 0) | (v8 = 0 & aDivisorOf0(v4, v7) = 0 & sdtpldt0(v2, v6) = v7 & smndt0(v3) = v6)) & (v5 = 0 | ( ~ (v8 = 0) & aDivisorOf0(v4, v7) = v8 & sdtpldt0(v2, v6) = v7 & smndt0(v3) = v6))))) &  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] : (v4 = 0 | v3 = sz00 |  ~ (aDivisorOf0(v3, v2) = v4) |  ~ (sdtasdt0(v3, v5) = v2) |  ~ (aInteger0(v2) = 0) |  ? [v6] : (( ~ (v6 = 0) & aInteger0(v5) = v6) | ( ~ (v6 = 0) & aInteger0(v3) = v6))) &  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] : (v4 = 0 | v3 = sz00 |  ~ (aDivisorOf0(v3, v2) = v4) |  ~ (aInteger0(v5) = 0) |  ~ (aInteger0(v2) = 0) |  ? [v6] : (( ~ (v6 = v2) & sdtasdt0(v3, v5) = v6) | ( ~ (v6 = 0) & aInteger0(v3) = v6))) &  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] : (v3 = v2 |  ~ (aDivisorOf0(v5, v4) = v3) |  ~ (aDivisorOf0(v5, v4) = v2)) &  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] : (v3 = v2 |  ~ (sdtasdt0(v5, v4) = v3) |  ~ (sdtasdt0(v5, v4) = v2)) &  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] : (v3 = v2 |  ~ (sdtpldt0(v5, v4) = v3) |  ~ (sdtpldt0(v5, v4) = v2)) &  ! [v2] :  ! [v3] :  ! [v4] : (v4 = 0 |  ~ (aInteger0(v3) = v4) |  ~ (aInteger0(v2) = 0) |  ? [v5] : ( ~ (v5 = 0) & aDivisorOf0(v3, v2) = v5)) &  ! [v2] :  ! [v3] :  ! [v4] : (v3 = v2 |  ~ (smndt0(v4) = v3) |  ~ (smndt0(v4) = v2)) &  ! [v2] :  ! [v3] :  ! [v4] : (v3 = v2 |  ~ (aInteger0(v4) = v3) |  ~ (aInteger0(v4) = v2)) &  ! [v2] :  ! [v3] :  ! [v4] : (v3 = sz00 |  ~ (sdtasdt0(v3, v4) = v2) |  ~ (aInteger0(v3) = 0) |  ~ (aInteger0(v2) = 0) |  ? [v5] : ((v5 = 0 & aDivisorOf0(v3, v2) = 0) | ( ~ (v5 = 0) & aInteger0(v4) = v5))) &  ! [v2] :  ! [v3] :  ! [v4] : (v3 = sz00 |  ~ (aInteger0(v4) = 0) |  ~ (aInteger0(v3) = 0) |  ~ (aInteger0(v2) = 0) |  ? [v5] : ((v5 = 0 & aDivisorOf0(v3, v2) = 0) | ( ~ (v5 = v2) & sdtasdt0(v3, v4) = v5))) &  ! [v2] :  ! [v3] :  ! [v4] : ( ~ (sdtasdt0(v3, v2) = v4) |  ? [v5] : ((v5 = v4 & sdtasdt0(v2, v3) = v4) | ( ~ (v5 = 0) & aInteger0(v3) = v5) | ( ~ (v5 = 0) & aInteger0(v2) = v5))) &  ! [v2] :  ! [v3] :  ! [v4] : ( ~ (sdtasdt0(v2, v3) = v4) |  ? [v5] : ((v5 = v4 & sdtasdt0(v3, v2) = v4) | ( ~ (v5 = 0) & aInteger0(v3) = v5) | ( ~ (v5 = 0) & aInteger0(v2) = v5))) &  ! [v2] :  ! [v3] :  ! [v4] : ( ~ (sdtasdt0(v2, v3) = v4) |  ? [v5] : ((v5 = 0 & aInteger0(v4) = 0) | ( ~ (v5 = 0) & aInteger0(v3) = v5) | ( ~ (v5 = 0) & aInteger0(v2) = v5))) &  ! [v2] :  ! [v3] :  ! [v4] : ( ~ (sdtpldt0(v3, v2) = v4) |  ? [v5] : ((v5 = v4 & sdtpldt0(v2, v3) = v4) | ( ~ (v5 = 0) & aInteger0(v3) = v5) | ( ~ (v5 = 0) & aInteger0(v2) = v5))) &  ! [v2] :  ! [v3] :  ! [v4] : ( ~ (sdtpldt0(v2, v3) = v4) |  ? [v5] : ((v5 = v4 & sdtpldt0(v3, v2) = v4) | ( ~ (v5 = 0) & aInteger0(v3) = v5) | ( ~ (v5 = 0) & aInteger0(v2) = v5))) &  ! [v2] :  ! [v3] :  ! [v4] : ( ~ (sdtpldt0(v2, v3) = v4) |  ? [v5] : ((v5 = 0 & aInteger0(v4) = 0) | ( ~ (v5 = 0) & aInteger0(v3) = v5) | ( ~ (v5 = 0) & aInteger0(v2) = v5))) &  ! [v2] :  ! [v3] :  ! [v4] : ( ~ (aInteger0(v3) = v4) |  ~ (aInteger0(v2) = 0) |  ? [v5] :  ? [v6] :  ? [v7] : ((v7 = v2 & v6 = 0 & sdtasdt0(v3, v5) = v2 & aInteger0(v5) = 0) | ( ~ (v5 = 0) & aDivisorOf0(v3, v2) = v5))) &  ! [v2] :  ! [v3] : (v3 = sz00 | v2 = sz00 |  ~ (sdtasdt0(v2, v3) = sz00) |  ? [v4] : (( ~ (v4 = 0) & aInteger0(v3) = v4) | ( ~ (v4 = 0) & aInteger0(v2) = v4))) &  ! [v2] :  ! [v3] : ( ~ (aDivisorOf0(v3, v2) = 0) |  ~ (aInteger0(v2) = 0) | aInteger0(v3) = 0) &  ! [v2] :  ! [v3] : ( ~ (aDivisorOf0(v3, v2) = 0) |  ~ (aInteger0(v2) = 0) |  ? [v4] : (sdtasdt0(v3, v4) = v2 & aInteger0(v4) = 0)) &  ! [v2] :  ! [v3] : ( ~ (sdtasdt0(v2, v0) = v3) |  ? [v4] :  ? [v5] : ((v5 = v3 & v4 = v3 & sdtasdt0(v0, v2) = v3 & smndt0(v2) = v3) | ( ~ (v4 = 0) & aInteger0(v2) = v4))) &  ! [v2] :  ! [v3] : ( ~ (sdtasdt0(v2, sz10) = v3) |  ? [v4] : ((v4 = v2 & v3 = v2 & sdtasdt0(sz10, v2) = v2) | ( ~ (v4 = 0) & aInteger0(v2) = v4))) &  ! [v2] :  ! [v3] : ( ~ (sdtasdt0(v2, sz00) = v3) |  ? [v4] : ((v4 = sz00 & v3 = sz00 & sdtasdt0(sz00, v2) = sz00) | ( ~ (v4 = 0) & aInteger0(v2) = v4))) &  ! [v2] :  ! [v3] : ( ~ (sdtasdt0(v0, v2) = v3) |  ? [v4] :  ? [v5] : ((v5 = v3 & v4 = v3 & sdtasdt0(v2, v0) = v3 & smndt0(v2) = v3) | ( ~ (v4 = 0) & aInteger0(v2) = v4))) &  ! [v2] :  ! [v3] : ( ~ (sdtasdt0(sz10, v2) = v3) |  ? [v4] : ((v4 = v2 & v3 = v2 & sdtasdt0(v2, sz10) = v2) | ( ~ (v4 = 0) & aInteger0(v2) = v4))) &  ! [v2] :  ! [v3] : ( ~ (sdtasdt0(sz00, v2) = v3) |  ? [v4] : ((v4 = sz00 & v3 = sz00 & sdtasdt0(v2, sz00) = sz00) | ( ~ (v4 = 0) & aInteger0(v2) = v4))) &  ! [v2] :  ! [v3] : ( ~ (sdtpldt0(v2, sz00) = v3) |  ? [v4] : ((v4 = v2 & v3 = v2 & sdtpldt0(sz00, v2) = v2) | ( ~ (v4 = 0) & aInteger0(v2) = v4))) &  ! [v2] :  ! [v3] : ( ~ (sdtpldt0(sz00, v2) = v3) |  ? [v4] : ((v4 = v2 & v3 = v2 & sdtpldt0(v2, sz00) = v2) | ( ~ (v4 = 0) & aInteger0(v2) = v4))) &  ! [v2] :  ! [v3] : ( ~ (smndt0(v2) = v3) |  ? [v4] :  ? [v5] : ((v5 = v3 & v4 = v3 & sdtasdt0(v2, v0) = v3 & sdtasdt0(v0, v2) = v3) | ( ~ (v4 = 0) & aInteger0(v2) = v4))) &  ! [v2] :  ! [v3] : ( ~ (smndt0(v2) = v3) |  ? [v4] :  ? [v5] : ((v5 = sz00 & v4 = sz00 & sdtpldt0(v3, v2) = sz00 & sdtpldt0(v2, v3) = sz00) | ( ~ (v4 = 0) & aInteger0(v2) = v4))) &  ! [v2] :  ! [v3] : ( ~ (smndt0(v2) = v3) |  ? [v4] : ((v4 = 0 & aInteger0(v3) = 0) | ( ~ (v4 = 0) & aInteger0(v2) = v4))) &  ! [v2] : ( ~ (aDivisorOf0(sz00, v2) = 0) |  ~ (aInteger0(v2) = 0)) &  ! [v2] : ( ~ (aInteger0(v2) = 0) |  ? [v3] : ( ~ (v3 = 0) & aDivisorOf0(sz00, v2) = v3)) &  ! [v2] : ( ~ (aInteger0(v2) = 0) |  ? [v3] : (sdtasdt0(v2, v0) = v3 & sdtasdt0(v0, v2) = v3 & smndt0(v2) = v3)) &  ! [v2] : ( ~ (aInteger0(v2) = 0) |  ? [v3] : (sdtpldt0(v3, v2) = sz00 & sdtpldt0(v2, v3) = sz00 & smndt0(v2) = v3)) &  ! [v2] : ( ~ (aInteger0(v2) = 0) |  ? [v3] : (smndt0(v2) = v3 & aInteger0(v3) = 0)) &  ! [v2] : ( ~ (aInteger0(v2) = 0) | (sdtasdt0(v2, sz10) = v2 & sdtasdt0(sz10, v2) = v2)) &  ! [v2] : ( ~ (aInteger0(v2) = 0) | (sdtasdt0(v2, sz00) = sz00 & sdtasdt0(sz00, v2) = sz00)) &  ! [v2] : ( ~ (aInteger0(v2) = 0) | (sdtpldt0(v2, sz00) = v2 & sdtpldt0(sz00, v2) = v2)) &  ? [v2] :  ? [v3] :  ? [v4] :  ? [v5] : sdteqdtlpzmzozddtrp0(v4, v3, v2) = v5 &  ? [v2] :  ? [v3] :  ? [v4] : aDivisorOf0(v3, v2) = v4 &  ? [v2] :  ? [v3] :  ? [v4] : sdtasdt0(v3, v2) = v4 &  ? [v2] :  ? [v3] :  ? [v4] : sdtpldt0(v3, v2) = v4 &  ? [v2] :  ? [v3] : smndt0(v2) = v3 &  ? [v2] :  ? [v3] : aInteger0(v2) = v3)
% 21.71/7.00  | Instantiating (0) with all_0_0_0, all_0_1_1 yields:
% 21.71/7.00  | (1)  ~ (all_0_0_0 = 0) &  ~ (xq = sz00) & sdteqdtlpzmzozddtrp0(xa, xa, xq) = all_0_0_0 & smndt0(sz10) = all_0_1_1 & aInteger0(xq) = 0 & aInteger0(xa) = 0 & aInteger0(sz10) = 0 & aInteger0(sz00) = 0 &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] : (v2 = sz00 |  ~ (aDivisorOf0(v2, v4) = v5) |  ~ (sdtpldt0(v0, v3) = v4) |  ~ (smndt0(v1) = v3) |  ? [v6] : (( ~ (v6 = 0) & aInteger0(v2) = v6) | ( ~ (v6 = 0) & aInteger0(v1) = v6) | ( ~ (v6 = 0) & aInteger0(v0) = v6) | (( ~ (v5 = 0) | (v6 = 0 & sdteqdtlpzmzozddtrp0(v0, v1, v2) = 0)) & (v5 = 0 | ( ~ (v6 = 0) & sdteqdtlpzmzozddtrp0(v0, v1, v2) = v6))))) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] : ( ~ (sdtasdt0(v1, v2) = v4) |  ~ (sdtasdt0(v0, v2) = v3) |  ~ (sdtpldt0(v3, v4) = v5) |  ? [v6] :  ? [v7] :  ? [v8] :  ? [v9] :  ? [v10] :  ? [v11] : ((v11 = v5 & v9 = v7 & sdtasdt0(v10, v2) = v5 & sdtasdt0(v0, v6) = v7 & sdtasdt0(v0, v1) = v8 & sdtpldt0(v8, v3) = v7 & sdtpldt0(v1, v2) = v6 & sdtpldt0(v0, v1) = v10) | ( ~ (v6 = 0) & aInteger0(v2) = v6) | ( ~ (v6 = 0) & aInteger0(v1) = v6) | ( ~ (v6 = 0) & aInteger0(v0) = v6))) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] : ( ~ (sdtasdt0(v0, v2) = v4) |  ~ (sdtasdt0(v0, v1) = v3) |  ~ (sdtpldt0(v3, v4) = v5) |  ? [v6] :  ? [v7] :  ? [v8] :  ? [v9] :  ? [v10] :  ? [v11] : ((v11 = v9 & v7 = v5 & sdtasdt0(v8, v2) = v9 & sdtasdt0(v1, v2) = v10 & sdtasdt0(v0, v6) = v5 & sdtpldt0(v4, v10) = v9 & sdtpldt0(v1, v2) = v6 & sdtpldt0(v0, v1) = v8) | ( ~ (v6 = 0) & aInteger0(v2) = v6) | ( ~ (v6 = 0) & aInteger0(v1) = v6) | ( ~ (v6 = 0) & aInteger0(v0) = v6))) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] : (v1 = v0 |  ~ (sdteqdtlpzmzozddtrp0(v4, v3, v2) = v1) |  ~ (sdteqdtlpzmzozddtrp0(v4, v3, v2) = v0)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] : ( ~ (sdtasdt0(v3, v2) = v4) |  ~ (sdtasdt0(v0, v1) = v3) |  ? [v5] :  ? [v6] : ((v6 = v4 & sdtasdt0(v1, v2) = v5 & sdtasdt0(v0, v5) = v4) | ( ~ (v5 = 0) & aInteger0(v2) = v5) | ( ~ (v5 = 0) & aInteger0(v1) = v5) | ( ~ (v5 = 0) & aInteger0(v0) = v5))) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] : ( ~ (sdtasdt0(v3, v2) = v4) |  ~ (sdtpldt0(v0, v1) = v3) |  ? [v5] :  ? [v6] :  ? [v7] :  ? [v8] :  ? [v9] :  ? [v10] :  ? [v11] : ((v11 = v4 & v9 = v6 & sdtasdt0(v1, v2) = v10 & sdtasdt0(v0, v5) = v6 & sdtasdt0(v0, v2) = v8 & sdtasdt0(v0, v1) = v7 & sdtpldt0(v8, v10) = v4 & sdtpldt0(v7, v8) = v6 & sdtpldt0(v1, v2) = v5) | ( ~ (v5 = 0) & aInteger0(v2) = v5) | ( ~ (v5 = 0) & aInteger0(v1) = v5) | ( ~ (v5 = 0) & aInteger0(v0) = v5))) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] : ( ~ (sdtasdt0(v1, v2) = v3) |  ~ (sdtasdt0(v0, v3) = v4) |  ? [v5] :  ? [v6] : ((v6 = v4 & sdtasdt0(v5, v2) = v4 & sdtasdt0(v0, v1) = v5) | ( ~ (v5 = 0) & aInteger0(v2) = v5) | ( ~ (v5 = 0) & aInteger0(v1) = v5) | ( ~ (v5 = 0) & aInteger0(v0) = v5))) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] : ( ~ (sdtasdt0(v0, v3) = v4) |  ~ (sdtpldt0(v1, v2) = v3) |  ? [v5] :  ? [v6] :  ? [v7] :  ? [v8] :  ? [v9] :  ? [v10] :  ? [v11] : ((v11 = v9 & v7 = v4 & sdtasdt0(v8, v2) = v9 & sdtasdt0(v1, v2) = v10 & sdtasdt0(v0, v2) = v6 & sdtasdt0(v0, v1) = v5 & sdtpldt0(v6, v10) = v9 & sdtpldt0(v5, v6) = v4 & sdtpldt0(v0, v1) = v8) | ( ~ (v5 = 0) & aInteger0(v2) = v5) | ( ~ (v5 = 0) & aInteger0(v1) = v5) | ( ~ (v5 = 0) & aInteger0(v0) = v5))) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] : ( ~ (sdtpldt0(v3, v2) = v4) |  ~ (sdtpldt0(v0, v1) = v3) |  ? [v5] :  ? [v6] : ((v6 = v4 & sdtpldt0(v1, v2) = v5 & sdtpldt0(v0, v5) = v4) | ( ~ (v5 = 0) & aInteger0(v2) = v5) | ( ~ (v5 = 0) & aInteger0(v1) = v5) | ( ~ (v5 = 0) & aInteger0(v0) = v5))) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] : ( ~ (sdtpldt0(v1, v2) = v3) |  ~ (sdtpldt0(v0, v3) = v4) |  ? [v5] :  ? [v6] : ((v6 = v4 & sdtpldt0(v5, v2) = v4 & sdtpldt0(v0, v1) = v5) | ( ~ (v5 = 0) & aInteger0(v2) = v5) | ( ~ (v5 = 0) & aInteger0(v1) = v5) | ( ~ (v5 = 0) & aInteger0(v0) = v5))) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v2 = sz00 |  ~ (sdteqdtlpzmzozddtrp0(v0, v1, v2) = v3) |  ? [v4] :  ? [v5] :  ? [v6] : (( ~ (v4 = 0) & aInteger0(v2) = v4) | ( ~ (v4 = 0) & aInteger0(v1) = v4) | ( ~ (v4 = 0) & aInteger0(v0) = v4) | (( ~ (v3 = 0) | (v6 = 0 & aDivisorOf0(v2, v5) = 0 & sdtpldt0(v0, v4) = v5 & smndt0(v1) = v4)) & (v3 = 0 | ( ~ (v6 = 0) & aDivisorOf0(v2, v5) = v6 & sdtpldt0(v0, v4) = v5 & smndt0(v1) = v4))))) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v2 = 0 | v1 = sz00 |  ~ (aDivisorOf0(v1, v0) = v2) |  ~ (sdtasdt0(v1, v3) = v0) |  ~ (aInteger0(v0) = 0) |  ? [v4] : (( ~ (v4 = 0) & aInteger0(v3) = v4) | ( ~ (v4 = 0) & aInteger0(v1) = v4))) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v2 = 0 | v1 = sz00 |  ~ (aDivisorOf0(v1, v0) = v2) |  ~ (aInteger0(v3) = 0) |  ~ (aInteger0(v0) = 0) |  ? [v4] : (( ~ (v4 = v0) & sdtasdt0(v1, v3) = v4) | ( ~ (v4 = 0) & aInteger0(v1) = v4))) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v1 = v0 |  ~ (aDivisorOf0(v3, v2) = v1) |  ~ (aDivisorOf0(v3, v2) = v0)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v1 = v0 |  ~ (sdtasdt0(v3, v2) = v1) |  ~ (sdtasdt0(v3, v2) = v0)) &  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v1 = v0 |  ~ (sdtpldt0(v3, v2) = v1) |  ~ (sdtpldt0(v3, v2) = v0)) &  ! [v0] :  ! [v1] :  ! [v2] : (v2 = 0 |  ~ (aInteger0(v1) = v2) |  ~ (aInteger0(v0) = 0) |  ? [v3] : ( ~ (v3 = 0) & aDivisorOf0(v1, v0) = v3)) &  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (smndt0(v2) = v1) |  ~ (smndt0(v2) = v0)) &  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (aInteger0(v2) = v1) |  ~ (aInteger0(v2) = v0)) &  ! [v0] :  ! [v1] :  ! [v2] : (v1 = sz00 |  ~ (sdtasdt0(v1, v2) = v0) |  ~ (aInteger0(v1) = 0) |  ~ (aInteger0(v0) = 0) |  ? [v3] : ((v3 = 0 & aDivisorOf0(v1, v0) = 0) | ( ~ (v3 = 0) & aInteger0(v2) = v3))) &  ! [v0] :  ! [v1] :  ! [v2] : (v1 = sz00 |  ~ (aInteger0(v2) = 0) |  ~ (aInteger0(v1) = 0) |  ~ (aInteger0(v0) = 0) |  ? [v3] : ((v3 = 0 & aDivisorOf0(v1, v0) = 0) | ( ~ (v3 = v0) & sdtasdt0(v1, v2) = v3))) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (sdtasdt0(v1, v0) = v2) |  ? [v3] : ((v3 = v2 & sdtasdt0(v0, v1) = v2) | ( ~ (v3 = 0) & aInteger0(v1) = v3) | ( ~ (v3 = 0) & aInteger0(v0) = v3))) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (sdtasdt0(v0, v1) = v2) |  ? [v3] : ((v3 = v2 & sdtasdt0(v1, v0) = v2) | ( ~ (v3 = 0) & aInteger0(v1) = v3) | ( ~ (v3 = 0) & aInteger0(v0) = v3))) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (sdtasdt0(v0, v1) = v2) |  ? [v3] : ((v3 = 0 & aInteger0(v2) = 0) | ( ~ (v3 = 0) & aInteger0(v1) = v3) | ( ~ (v3 = 0) & aInteger0(v0) = v3))) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (sdtpldt0(v1, v0) = v2) |  ? [v3] : ((v3 = v2 & sdtpldt0(v0, v1) = v2) | ( ~ (v3 = 0) & aInteger0(v1) = v3) | ( ~ (v3 = 0) & aInteger0(v0) = v3))) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (sdtpldt0(v0, v1) = v2) |  ? [v3] : ((v3 = v2 & sdtpldt0(v1, v0) = v2) | ( ~ (v3 = 0) & aInteger0(v1) = v3) | ( ~ (v3 = 0) & aInteger0(v0) = v3))) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (sdtpldt0(v0, v1) = v2) |  ? [v3] : ((v3 = 0 & aInteger0(v2) = 0) | ( ~ (v3 = 0) & aInteger0(v1) = v3) | ( ~ (v3 = 0) & aInteger0(v0) = v3))) &  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (aInteger0(v1) = v2) |  ~ (aInteger0(v0) = 0) |  ? [v3] :  ? [v4] :  ? [v5] : ((v5 = v0 & v4 = 0 & sdtasdt0(v1, v3) = v0 & aInteger0(v3) = 0) | ( ~ (v3 = 0) & aDivisorOf0(v1, v0) = v3))) &  ! [v0] :  ! [v1] : (v1 = sz00 | v0 = sz00 |  ~ (sdtasdt0(v0, v1) = sz00) |  ? [v2] : (( ~ (v2 = 0) & aInteger0(v1) = v2) | ( ~ (v2 = 0) & aInteger0(v0) = v2))) &  ! [v0] :  ! [v1] : ( ~ (aDivisorOf0(v1, v0) = 0) |  ~ (aInteger0(v0) = 0) | aInteger0(v1) = 0) &  ! [v0] :  ! [v1] : ( ~ (aDivisorOf0(v1, v0) = 0) |  ~ (aInteger0(v0) = 0) |  ? [v2] : (sdtasdt0(v1, v2) = v0 & aInteger0(v2) = 0)) &  ! [v0] :  ! [v1] : ( ~ (sdtasdt0(v0, all_0_1_1) = v1) |  ? [v2] :  ? [v3] : ((v3 = v1 & v2 = v1 & sdtasdt0(all_0_1_1, v0) = v1 & smndt0(v0) = v1) | ( ~ (v2 = 0) & aInteger0(v0) = v2))) &  ! [v0] :  ! [v1] : ( ~ (sdtasdt0(v0, sz10) = v1) |  ? [v2] : ((v2 = v0 & v1 = v0 & sdtasdt0(sz10, v0) = v0) | ( ~ (v2 = 0) & aInteger0(v0) = v2))) &  ! [v0] :  ! [v1] : ( ~ (sdtasdt0(v0, sz00) = v1) |  ? [v2] : ((v2 = sz00 & v1 = sz00 & sdtasdt0(sz00, v0) = sz00) | ( ~ (v2 = 0) & aInteger0(v0) = v2))) &  ! [v0] :  ! [v1] : ( ~ (sdtasdt0(all_0_1_1, v0) = v1) |  ? [v2] :  ? [v3] : ((v3 = v1 & v2 = v1 & sdtasdt0(v0, all_0_1_1) = v1 & smndt0(v0) = v1) | ( ~ (v2 = 0) & aInteger0(v0) = v2))) &  ! [v0] :  ! [v1] : ( ~ (sdtasdt0(sz10, v0) = v1) |  ? [v2] : ((v2 = v0 & v1 = v0 & sdtasdt0(v0, sz10) = v0) | ( ~ (v2 = 0) & aInteger0(v0) = v2))) &  ! [v0] :  ! [v1] : ( ~ (sdtasdt0(sz00, v0) = v1) |  ? [v2] : ((v2 = sz00 & v1 = sz00 & sdtasdt0(v0, sz00) = sz00) | ( ~ (v2 = 0) & aInteger0(v0) = v2))) &  ! [v0] :  ! [v1] : ( ~ (sdtpldt0(v0, sz00) = v1) |  ? [v2] : ((v2 = v0 & v1 = v0 & sdtpldt0(sz00, v0) = v0) | ( ~ (v2 = 0) & aInteger0(v0) = v2))) &  ! [v0] :  ! [v1] : ( ~ (sdtpldt0(sz00, v0) = v1) |  ? [v2] : ((v2 = v0 & v1 = v0 & sdtpldt0(v0, sz00) = v0) | ( ~ (v2 = 0) & aInteger0(v0) = v2))) &  ! [v0] :  ! [v1] : ( ~ (smndt0(v0) = v1) |  ? [v2] :  ? [v3] : ((v3 = v1 & v2 = v1 & sdtasdt0(v0, all_0_1_1) = v1 & sdtasdt0(all_0_1_1, v0) = v1) | ( ~ (v2 = 0) & aInteger0(v0) = v2))) &  ! [v0] :  ! [v1] : ( ~ (smndt0(v0) = v1) |  ? [v2] :  ? [v3] : ((v3 = sz00 & v2 = sz00 & sdtpldt0(v1, v0) = sz00 & sdtpldt0(v0, v1) = sz00) | ( ~ (v2 = 0) & aInteger0(v0) = v2))) &  ! [v0] :  ! [v1] : ( ~ (smndt0(v0) = v1) |  ? [v2] : ((v2 = 0 & aInteger0(v1) = 0) | ( ~ (v2 = 0) & aInteger0(v0) = v2))) &  ! [v0] : ( ~ (aDivisorOf0(sz00, v0) = 0) |  ~ (aInteger0(v0) = 0)) &  ! [v0] : ( ~ (aInteger0(v0) = 0) |  ? [v1] : ( ~ (v1 = 0) & aDivisorOf0(sz00, v0) = v1)) &  ! [v0] : ( ~ (aInteger0(v0) = 0) |  ? [v1] : (sdtasdt0(v0, all_0_1_1) = v1 & sdtasdt0(all_0_1_1, v0) = v1 & smndt0(v0) = v1)) &  ! [v0] : ( ~ (aInteger0(v0) = 0) |  ? [v1] : (sdtpldt0(v1, v0) = sz00 & sdtpldt0(v0, v1) = sz00 & smndt0(v0) = v1)) &  ! [v0] : ( ~ (aInteger0(v0) = 0) |  ? [v1] : (smndt0(v0) = v1 & aInteger0(v1) = 0)) &  ! [v0] : ( ~ (aInteger0(v0) = 0) | (sdtasdt0(v0, sz10) = v0 & sdtasdt0(sz10, v0) = v0)) &  ! [v0] : ( ~ (aInteger0(v0) = 0) | (sdtasdt0(v0, sz00) = sz00 & sdtasdt0(sz00, v0) = sz00)) &  ! [v0] : ( ~ (aInteger0(v0) = 0) | (sdtpldt0(v0, sz00) = v0 & sdtpldt0(sz00, v0) = v0)) &  ? [v0] :  ? [v1] :  ? [v2] :  ? [v3] : sdteqdtlpzmzozddtrp0(v2, v1, v0) = v3 &  ? [v0] :  ? [v1] :  ? [v2] : aDivisorOf0(v1, v0) = v2 &  ? [v0] :  ? [v1] :  ? [v2] : sdtasdt0(v1, v0) = v2 &  ? [v0] :  ? [v1] :  ? [v2] : sdtpldt0(v1, v0) = v2 &  ? [v0] :  ? [v1] : smndt0(v0) = v1 &  ? [v0] :  ? [v1] : aInteger0(v0) = v1
% 21.71/7.03  |
% 21.71/7.03  | Applying alpha-rule on (1) yields:
% 21.71/7.03  | (2)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (sdtpldt0(v1, v0) = v2) |  ? [v3] : ((v3 = v2 & sdtpldt0(v0, v1) = v2) | ( ~ (v3 = 0) & aInteger0(v1) = v3) | ( ~ (v3 = 0) & aInteger0(v0) = v3)))
% 21.71/7.03  | (3)  ! [v0] :  ! [v1] : ( ~ (sdtpldt0(v0, sz00) = v1) |  ? [v2] : ((v2 = v0 & v1 = v0 & sdtpldt0(sz00, v0) = v0) | ( ~ (v2 = 0) & aInteger0(v0) = v2)))
% 21.71/7.03  | (4)  ! [v0] :  ! [v1] : ( ~ (smndt0(v0) = v1) |  ? [v2] :  ? [v3] : ((v3 = sz00 & v2 = sz00 & sdtpldt0(v1, v0) = sz00 & sdtpldt0(v0, v1) = sz00) | ( ~ (v2 = 0) & aInteger0(v0) = v2)))
% 21.71/7.03  | (5)  ? [v0] :  ? [v1] : aInteger0(v0) = v1
% 21.71/7.03  | (6) aInteger0(xq) = 0
% 21.71/7.03  | (7)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] : ( ~ (sdtasdt0(v1, v2) = v4) |  ~ (sdtasdt0(v0, v2) = v3) |  ~ (sdtpldt0(v3, v4) = v5) |  ? [v6] :  ? [v7] :  ? [v8] :  ? [v9] :  ? [v10] :  ? [v11] : ((v11 = v5 & v9 = v7 & sdtasdt0(v10, v2) = v5 & sdtasdt0(v0, v6) = v7 & sdtasdt0(v0, v1) = v8 & sdtpldt0(v8, v3) = v7 & sdtpldt0(v1, v2) = v6 & sdtpldt0(v0, v1) = v10) | ( ~ (v6 = 0) & aInteger0(v2) = v6) | ( ~ (v6 = 0) & aInteger0(v1) = v6) | ( ~ (v6 = 0) & aInteger0(v0) = v6)))
% 21.71/7.03  | (8)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] : ( ~ (sdtasdt0(v3, v2) = v4) |  ~ (sdtasdt0(v0, v1) = v3) |  ? [v5] :  ? [v6] : ((v6 = v4 & sdtasdt0(v1, v2) = v5 & sdtasdt0(v0, v5) = v4) | ( ~ (v5 = 0) & aInteger0(v2) = v5) | ( ~ (v5 = 0) & aInteger0(v1) = v5) | ( ~ (v5 = 0) & aInteger0(v0) = v5)))
% 21.71/7.03  | (9)  ! [v0] : ( ~ (aInteger0(v0) = 0) |  ? [v1] : (sdtpldt0(v1, v0) = sz00 & sdtpldt0(v0, v1) = sz00 & smndt0(v0) = v1))
% 21.71/7.03  | (10)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v1 = v0 |  ~ (aDivisorOf0(v3, v2) = v1) |  ~ (aDivisorOf0(v3, v2) = v0))
% 21.71/7.03  | (11)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] : ( ~ (sdtasdt0(v1, v2) = v3) |  ~ (sdtasdt0(v0, v3) = v4) |  ? [v5] :  ? [v6] : ((v6 = v4 & sdtasdt0(v5, v2) = v4 & sdtasdt0(v0, v1) = v5) | ( ~ (v5 = 0) & aInteger0(v2) = v5) | ( ~ (v5 = 0) & aInteger0(v1) = v5) | ( ~ (v5 = 0) & aInteger0(v0) = v5)))
% 21.71/7.03  | (12)  ! [v0] :  ! [v1] :  ! [v2] : (v1 = sz00 |  ~ (sdtasdt0(v1, v2) = v0) |  ~ (aInteger0(v1) = 0) |  ~ (aInteger0(v0) = 0) |  ? [v3] : ((v3 = 0 & aDivisorOf0(v1, v0) = 0) | ( ~ (v3 = 0) & aInteger0(v2) = v3)))
% 21.71/7.03  | (13)  ! [v0] : ( ~ (aInteger0(v0) = 0) | (sdtpldt0(v0, sz00) = v0 & sdtpldt0(sz00, v0) = v0))
% 21.71/7.03  | (14) sdteqdtlpzmzozddtrp0(xa, xa, xq) = all_0_0_0
% 21.71/7.03  | (15)  ? [v0] :  ? [v1] :  ? [v2] :  ? [v3] : sdteqdtlpzmzozddtrp0(v2, v1, v0) = v3
% 21.71/7.03  | (16)  ! [v0] :  ! [v1] : ( ~ (smndt0(v0) = v1) |  ? [v2] :  ? [v3] : ((v3 = v1 & v2 = v1 & sdtasdt0(v0, all_0_1_1) = v1 & sdtasdt0(all_0_1_1, v0) = v1) | ( ~ (v2 = 0) & aInteger0(v0) = v2)))
% 21.71/7.03  | (17)  ~ (xq = sz00)
% 21.71/7.03  | (18)  ! [v0] :  ! [v1] : ( ~ (sdtasdt0(v0, sz10) = v1) |  ? [v2] : ((v2 = v0 & v1 = v0 & sdtasdt0(sz10, v0) = v0) | ( ~ (v2 = 0) & aInteger0(v0) = v2)))
% 21.71/7.03  | (19)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] : ( ~ (sdtpldt0(v1, v2) = v3) |  ~ (sdtpldt0(v0, v3) = v4) |  ? [v5] :  ? [v6] : ((v6 = v4 & sdtpldt0(v5, v2) = v4 & sdtpldt0(v0, v1) = v5) | ( ~ (v5 = 0) & aInteger0(v2) = v5) | ( ~ (v5 = 0) & aInteger0(v1) = v5) | ( ~ (v5 = 0) & aInteger0(v0) = v5)))
% 21.71/7.04  | (20)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] : (v1 = v0 |  ~ (sdteqdtlpzmzozddtrp0(v4, v3, v2) = v1) |  ~ (sdteqdtlpzmzozddtrp0(v4, v3, v2) = v0))
% 21.71/7.04  | (21)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v2 = 0 | v1 = sz00 |  ~ (aDivisorOf0(v1, v0) = v2) |  ~ (sdtasdt0(v1, v3) = v0) |  ~ (aInteger0(v0) = 0) |  ? [v4] : (( ~ (v4 = 0) & aInteger0(v3) = v4) | ( ~ (v4 = 0) & aInteger0(v1) = v4)))
% 21.71/7.04  | (22)  ! [v0] :  ! [v1] : ( ~ (sdtasdt0(sz00, v0) = v1) |  ? [v2] : ((v2 = sz00 & v1 = sz00 & sdtasdt0(v0, sz00) = sz00) | ( ~ (v2 = 0) & aInteger0(v0) = v2)))
% 21.71/7.04  | (23) smndt0(sz10) = all_0_1_1
% 21.71/7.04  | (24)  ~ (all_0_0_0 = 0)
% 21.71/7.04  | (25) aInteger0(xa) = 0
% 21.71/7.04  | (26)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v2 = sz00 |  ~ (sdteqdtlpzmzozddtrp0(v0, v1, v2) = v3) |  ? [v4] :  ? [v5] :  ? [v6] : (( ~ (v4 = 0) & aInteger0(v2) = v4) | ( ~ (v4 = 0) & aInteger0(v1) = v4) | ( ~ (v4 = 0) & aInteger0(v0) = v4) | (( ~ (v3 = 0) | (v6 = 0 & aDivisorOf0(v2, v5) = 0 & sdtpldt0(v0, v4) = v5 & smndt0(v1) = v4)) & (v3 = 0 | ( ~ (v6 = 0) & aDivisorOf0(v2, v5) = v6 & sdtpldt0(v0, v4) = v5 & smndt0(v1) = v4)))))
% 21.71/7.04  | (27)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (sdtpldt0(v0, v1) = v2) |  ? [v3] : ((v3 = 0 & aInteger0(v2) = 0) | ( ~ (v3 = 0) & aInteger0(v1) = v3) | ( ~ (v3 = 0) & aInteger0(v0) = v3)))
% 21.71/7.04  | (28)  ! [v0] : ( ~ (aInteger0(v0) = 0) | (sdtasdt0(v0, sz10) = v0 & sdtasdt0(sz10, v0) = v0))
% 21.71/7.04  | (29)  ! [v0] :  ! [v1] : ( ~ (sdtpldt0(sz00, v0) = v1) |  ? [v2] : ((v2 = v0 & v1 = v0 & sdtpldt0(v0, sz00) = v0) | ( ~ (v2 = 0) & aInteger0(v0) = v2)))
% 21.71/7.04  | (30)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (aInteger0(v1) = v2) |  ~ (aInteger0(v0) = 0) |  ? [v3] :  ? [v4] :  ? [v5] : ((v5 = v0 & v4 = 0 & sdtasdt0(v1, v3) = v0 & aInteger0(v3) = 0) | ( ~ (v3 = 0) & aDivisorOf0(v1, v0) = v3)))
% 21.71/7.04  | (31)  ! [v0] :  ! [v1] : ( ~ (smndt0(v0) = v1) |  ? [v2] : ((v2 = 0 & aInteger0(v1) = 0) | ( ~ (v2 = 0) & aInteger0(v0) = v2)))
% 21.71/7.04  | (32)  ! [v0] : ( ~ (aInteger0(v0) = 0) | (sdtasdt0(v0, sz00) = sz00 & sdtasdt0(sz00, v0) = sz00))
% 21.71/7.04  | (33) aInteger0(sz00) = 0
% 21.71/7.04  | (34)  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (smndt0(v2) = v1) |  ~ (smndt0(v2) = v0))
% 21.71/7.04  | (35)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (sdtpldt0(v0, v1) = v2) |  ? [v3] : ((v3 = v2 & sdtpldt0(v1, v0) = v2) | ( ~ (v3 = 0) & aInteger0(v1) = v3) | ( ~ (v3 = 0) & aInteger0(v0) = v3)))
% 21.71/7.04  | (36)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] : ( ~ (sdtasdt0(v3, v2) = v4) |  ~ (sdtpldt0(v0, v1) = v3) |  ? [v5] :  ? [v6] :  ? [v7] :  ? [v8] :  ? [v9] :  ? [v10] :  ? [v11] : ((v11 = v4 & v9 = v6 & sdtasdt0(v1, v2) = v10 & sdtasdt0(v0, v5) = v6 & sdtasdt0(v0, v2) = v8 & sdtasdt0(v0, v1) = v7 & sdtpldt0(v8, v10) = v4 & sdtpldt0(v7, v8) = v6 & sdtpldt0(v1, v2) = v5) | ( ~ (v5 = 0) & aInteger0(v2) = v5) | ( ~ (v5 = 0) & aInteger0(v1) = v5) | ( ~ (v5 = 0) & aInteger0(v0) = v5)))
% 21.71/7.04  | (37)  ? [v0] :  ? [v1] :  ? [v2] : aDivisorOf0(v1, v0) = v2
% 21.71/7.04  | (38)  ! [v0] : ( ~ (aDivisorOf0(sz00, v0) = 0) |  ~ (aInteger0(v0) = 0))
% 21.71/7.04  | (39)  ! [v0] :  ! [v1] :  ! [v2] : (v1 = v0 |  ~ (aInteger0(v2) = v1) |  ~ (aInteger0(v2) = v0))
% 21.71/7.04  | (40)  ! [v0] :  ! [v1] : (v1 = sz00 | v0 = sz00 |  ~ (sdtasdt0(v0, v1) = sz00) |  ? [v2] : (( ~ (v2 = 0) & aInteger0(v1) = v2) | ( ~ (v2 = 0) & aInteger0(v0) = v2)))
% 21.71/7.04  | (41)  ! [v0] :  ! [v1] : ( ~ (aDivisorOf0(v1, v0) = 0) |  ~ (aInteger0(v0) = 0) | aInteger0(v1) = 0)
% 21.71/7.04  | (42)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (sdtasdt0(v0, v1) = v2) |  ? [v3] : ((v3 = 0 & aInteger0(v2) = 0) | ( ~ (v3 = 0) & aInteger0(v1) = v3) | ( ~ (v3 = 0) & aInteger0(v0) = v3)))
% 21.71/7.04  | (43)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (sdtasdt0(v0, v1) = v2) |  ? [v3] : ((v3 = v2 & sdtasdt0(v1, v0) = v2) | ( ~ (v3 = 0) & aInteger0(v1) = v3) | ( ~ (v3 = 0) & aInteger0(v0) = v3)))
% 21.71/7.04  | (44)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] : ( ~ (sdtasdt0(v0, v3) = v4) |  ~ (sdtpldt0(v1, v2) = v3) |  ? [v5] :  ? [v6] :  ? [v7] :  ? [v8] :  ? [v9] :  ? [v10] :  ? [v11] : ((v11 = v9 & v7 = v4 & sdtasdt0(v8, v2) = v9 & sdtasdt0(v1, v2) = v10 & sdtasdt0(v0, v2) = v6 & sdtasdt0(v0, v1) = v5 & sdtpldt0(v6, v10) = v9 & sdtpldt0(v5, v6) = v4 & sdtpldt0(v0, v1) = v8) | ( ~ (v5 = 0) & aInteger0(v2) = v5) | ( ~ (v5 = 0) & aInteger0(v1) = v5) | ( ~ (v5 = 0) & aInteger0(v0) = v5)))
% 21.71/7.04  | (45)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v1 = v0 |  ~ (sdtpldt0(v3, v2) = v1) |  ~ (sdtpldt0(v3, v2) = v0))
% 21.71/7.04  | (46)  ! [v0] :  ! [v1] :  ! [v2] : (v2 = 0 |  ~ (aInteger0(v1) = v2) |  ~ (aInteger0(v0) = 0) |  ? [v3] : ( ~ (v3 = 0) & aDivisorOf0(v1, v0) = v3))
% 21.71/7.04  | (47)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v2 = 0 | v1 = sz00 |  ~ (aDivisorOf0(v1, v0) = v2) |  ~ (aInteger0(v3) = 0) |  ~ (aInteger0(v0) = 0) |  ? [v4] : (( ~ (v4 = v0) & sdtasdt0(v1, v3) = v4) | ( ~ (v4 = 0) & aInteger0(v1) = v4)))
% 21.71/7.04  | (48)  ! [v0] : ( ~ (aInteger0(v0) = 0) |  ? [v1] : ( ~ (v1 = 0) & aDivisorOf0(sz00, v0) = v1))
% 21.71/7.04  | (49)  ! [v0] : ( ~ (aInteger0(v0) = 0) |  ? [v1] : (sdtasdt0(v0, all_0_1_1) = v1 & sdtasdt0(all_0_1_1, v0) = v1 & smndt0(v0) = v1))
% 21.71/7.04  | (50)  ? [v0] :  ? [v1] :  ? [v2] : sdtasdt0(v1, v0) = v2
% 21.71/7.04  | (51) aInteger0(sz10) = 0
% 21.71/7.04  | (52)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] : ( ~ (sdtasdt0(v0, v2) = v4) |  ~ (sdtasdt0(v0, v1) = v3) |  ~ (sdtpldt0(v3, v4) = v5) |  ? [v6] :  ? [v7] :  ? [v8] :  ? [v9] :  ? [v10] :  ? [v11] : ((v11 = v9 & v7 = v5 & sdtasdt0(v8, v2) = v9 & sdtasdt0(v1, v2) = v10 & sdtasdt0(v0, v6) = v5 & sdtpldt0(v4, v10) = v9 & sdtpldt0(v1, v2) = v6 & sdtpldt0(v0, v1) = v8) | ( ~ (v6 = 0) & aInteger0(v2) = v6) | ( ~ (v6 = 0) & aInteger0(v1) = v6) | ( ~ (v6 = 0) & aInteger0(v0) = v6)))
% 21.71/7.04  | (53)  ! [v0] :  ! [v1] : ( ~ (sdtasdt0(v0, sz00) = v1) |  ? [v2] : ((v2 = sz00 & v1 = sz00 & sdtasdt0(sz00, v0) = sz00) | ( ~ (v2 = 0) & aInteger0(v0) = v2)))
% 21.71/7.04  | (54)  ! [v0] :  ! [v1] :  ! [v2] : (v1 = sz00 |  ~ (aInteger0(v2) = 0) |  ~ (aInteger0(v1) = 0) |  ~ (aInteger0(v0) = 0) |  ? [v3] : ((v3 = 0 & aDivisorOf0(v1, v0) = 0) | ( ~ (v3 = v0) & sdtasdt0(v1, v2) = v3)))
% 21.71/7.04  | (55)  ! [v0] :  ! [v1] : ( ~ (sdtasdt0(v0, all_0_1_1) = v1) |  ? [v2] :  ? [v3] : ((v3 = v1 & v2 = v1 & sdtasdt0(all_0_1_1, v0) = v1 & smndt0(v0) = v1) | ( ~ (v2 = 0) & aInteger0(v0) = v2)))
% 21.71/7.04  | (56)  ! [v0] :  ! [v1] : ( ~ (aDivisorOf0(v1, v0) = 0) |  ~ (aInteger0(v0) = 0) |  ? [v2] : (sdtasdt0(v1, v2) = v0 & aInteger0(v2) = 0))
% 21.71/7.05  | (57)  ? [v0] :  ? [v1] : smndt0(v0) = v1
% 21.71/7.05  | (58)  ! [v0] :  ! [v1] :  ! [v2] : ( ~ (sdtasdt0(v1, v0) = v2) |  ? [v3] : ((v3 = v2 & sdtasdt0(v0, v1) = v2) | ( ~ (v3 = 0) & aInteger0(v1) = v3) | ( ~ (v3 = 0) & aInteger0(v0) = v3)))
% 21.71/7.05  | (59)  ! [v0] :  ! [v1] : ( ~ (sdtasdt0(all_0_1_1, v0) = v1) |  ? [v2] :  ? [v3] : ((v3 = v1 & v2 = v1 & sdtasdt0(v0, all_0_1_1) = v1 & smndt0(v0) = v1) | ( ~ (v2 = 0) & aInteger0(v0) = v2)))
% 21.71/7.05  | (60)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] : (v1 = v0 |  ~ (sdtasdt0(v3, v2) = v1) |  ~ (sdtasdt0(v3, v2) = v0))
% 21.71/7.05  | (61)  ! [v0] : ( ~ (aInteger0(v0) = 0) |  ? [v1] : (smndt0(v0) = v1 & aInteger0(v1) = 0))
% 21.71/7.05  | (62)  ! [v0] :  ! [v1] : ( ~ (sdtasdt0(sz10, v0) = v1) |  ? [v2] : ((v2 = v0 & v1 = v0 & sdtasdt0(v0, sz10) = v0) | ( ~ (v2 = 0) & aInteger0(v0) = v2)))
% 21.71/7.05  | (63)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] :  ! [v5] : (v2 = sz00 |  ~ (aDivisorOf0(v2, v4) = v5) |  ~ (sdtpldt0(v0, v3) = v4) |  ~ (smndt0(v1) = v3) |  ? [v6] : (( ~ (v6 = 0) & aInteger0(v2) = v6) | ( ~ (v6 = 0) & aInteger0(v1) = v6) | ( ~ (v6 = 0) & aInteger0(v0) = v6) | (( ~ (v5 = 0) | (v6 = 0 & sdteqdtlpzmzozddtrp0(v0, v1, v2) = 0)) & (v5 = 0 | ( ~ (v6 = 0) & sdteqdtlpzmzozddtrp0(v0, v1, v2) = v6)))))
% 21.71/7.05  | (64)  ! [v0] :  ! [v1] :  ! [v2] :  ! [v3] :  ! [v4] : ( ~ (sdtpldt0(v3, v2) = v4) |  ~ (sdtpldt0(v0, v1) = v3) |  ? [v5] :  ? [v6] : ((v6 = v4 & sdtpldt0(v1, v2) = v5 & sdtpldt0(v0, v5) = v4) | ( ~ (v5 = 0) & aInteger0(v2) = v5) | ( ~ (v5 = 0) & aInteger0(v1) = v5) | ( ~ (v5 = 0) & aInteger0(v0) = v5)))
% 21.71/7.05  | (65)  ? [v0] :  ? [v1] :  ? [v2] : sdtpldt0(v1, v0) = v2
% 21.71/7.05  |
% 21.71/7.05  | Instantiating formula (26) with all_0_0_0, xq, xa, xa and discharging atoms sdteqdtlpzmzozddtrp0(xa, xa, xq) = all_0_0_0, yields:
% 21.71/7.05  | (66) xq = sz00 |  ? [v0] :  ? [v1] :  ? [v2] : (( ~ (v0 = 0) & aInteger0(xq) = v0) | ( ~ (v0 = 0) & aInteger0(xa) = v0) | (( ~ (all_0_0_0 = 0) | (v2 = 0 & aDivisorOf0(xq, v1) = 0 & sdtpldt0(xa, v0) = v1 & smndt0(xa) = v0)) & (all_0_0_0 = 0 | ( ~ (v2 = 0) & aDivisorOf0(xq, v1) = v2 & sdtpldt0(xa, v0) = v1 & smndt0(xa) = v0))))
% 21.71/7.05  |
% 21.71/7.05  | Instantiating formula (54) with xq, xq, xq and discharging atoms aInteger0(xq) = 0, yields:
% 21.71/7.05  | (67) xq = sz00 |  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, xq) = 0) | ( ~ (v0 = xq) & sdtasdt0(xq, xq) = v0))
% 21.71/7.05  |
% 21.71/7.05  | Instantiating formula (32) with xq and discharging atoms aInteger0(xq) = 0, yields:
% 21.71/7.05  | (68) sdtasdt0(xq, sz00) = sz00 & sdtasdt0(sz00, xq) = sz00
% 21.71/7.05  |
% 21.71/7.05  | Applying alpha-rule on (68) yields:
% 21.71/7.05  | (69) sdtasdt0(xq, sz00) = sz00
% 21.71/7.05  | (70) sdtasdt0(sz00, xq) = sz00
% 21.71/7.05  |
% 21.71/7.05  | Instantiating formula (54) with xa, xq, xq and discharging atoms aInteger0(xq) = 0, aInteger0(xa) = 0, yields:
% 21.71/7.05  | (71) xq = sz00 |  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, xq) = 0) | ( ~ (v0 = xq) & sdtasdt0(xq, xa) = v0))
% 21.71/7.05  |
% 21.71/7.05  | Instantiating formula (54) with xq, xq, xa and discharging atoms aInteger0(xq) = 0, aInteger0(xa) = 0, yields:
% 21.71/7.05  | (72) xq = sz00 |  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, xa) = 0) | ( ~ (v0 = xa) & sdtasdt0(xq, xq) = v0))
% 21.71/7.05  |
% 21.71/7.05  | Instantiating formula (54) with xa, xq, xa and discharging atoms aInteger0(xq) = 0, aInteger0(xa) = 0, yields:
% 21.71/7.05  | (73) xq = sz00 |  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, xa) = 0) | ( ~ (v0 = xa) & sdtasdt0(xq, xa) = v0))
% 21.71/7.05  |
% 21.71/7.05  | Instantiating formula (49) with xa and discharging atoms aInteger0(xa) = 0, yields:
% 21.71/7.05  | (74)  ? [v0] : (sdtasdt0(all_0_1_1, xa) = v0 & sdtasdt0(xa, all_0_1_1) = v0 & smndt0(xa) = v0)
% 21.71/7.05  |
% 21.71/7.05  | Instantiating formula (9) with xa and discharging atoms aInteger0(xa) = 0, yields:
% 21.71/7.05  | (75)  ? [v0] : (sdtpldt0(v0, xa) = sz00 & sdtpldt0(xa, v0) = sz00 & smndt0(xa) = v0)
% 21.71/7.05  |
% 21.71/7.05  | Instantiating formula (61) with xa and discharging atoms aInteger0(xa) = 0, yields:
% 21.71/7.05  | (76)  ? [v0] : (smndt0(xa) = v0 & aInteger0(v0) = 0)
% 21.71/7.05  |
% 21.71/7.05  | Instantiating formula (54) with sz10, xq, xq and discharging atoms aInteger0(xq) = 0, aInteger0(sz10) = 0, yields:
% 21.71/7.05  | (77) xq = sz00 |  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, xq) = 0) | ( ~ (v0 = xq) & sdtasdt0(xq, sz10) = v0))
% 21.99/7.05  |
% 21.99/7.05  | Instantiating formula (54) with xq, xq, sz10 and discharging atoms aInteger0(xq) = 0, aInteger0(sz10) = 0, yields:
% 21.99/7.05  | (78) xq = sz00 |  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, sz10) = 0) | ( ~ (v0 = sz10) & sdtasdt0(xq, xq) = v0))
% 21.99/7.05  |
% 21.99/7.05  | Instantiating formula (54) with sz10, xq, xa and discharging atoms aInteger0(xq) = 0, aInteger0(xa) = 0, aInteger0(sz10) = 0, yields:
% 21.99/7.05  | (79) xq = sz00 |  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, xa) = 0) | ( ~ (v0 = xa) & sdtasdt0(xq, sz10) = v0))
% 21.99/7.05  |
% 21.99/7.05  | Instantiating formula (54) with sz10, xq, sz10 and discharging atoms aInteger0(xq) = 0, aInteger0(sz10) = 0, yields:
% 21.99/7.05  | (80) xq = sz00 |  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, sz10) = 0) | ( ~ (v0 = sz10) & sdtasdt0(xq, sz10) = v0))
% 21.99/7.05  |
% 21.99/7.05  | Instantiating formula (54) with xa, xq, sz10 and discharging atoms aInteger0(xq) = 0, aInteger0(xa) = 0, aInteger0(sz10) = 0, yields:
% 21.99/7.05  | (81) xq = sz00 |  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, sz10) = 0) | ( ~ (v0 = sz10) & sdtasdt0(xq, xa) = v0))
% 21.99/7.05  |
% 21.99/7.05  | Instantiating formula (54) with sz00, xq, xq and discharging atoms aInteger0(xq) = 0, aInteger0(sz00) = 0, yields:
% 21.99/7.05  | (82) xq = sz00 |  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, xq) = 0) | ( ~ (v0 = xq) & sdtasdt0(xq, sz00) = v0))
% 21.99/7.05  |
% 21.99/7.05  | Instantiating formula (54) with xq, xq, sz00 and discharging atoms aInteger0(xq) = 0, aInteger0(sz00) = 0, yields:
% 21.99/7.05  | (83) xq = sz00 |  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, sz00) = 0) | ( ~ (v0 = sz00) & sdtasdt0(xq, xq) = v0))
% 21.99/7.05  |
% 21.99/7.05  | Instantiating formula (54) with sz00, xq, xa and discharging atoms aInteger0(xq) = 0, aInteger0(xa) = 0, aInteger0(sz00) = 0, yields:
% 21.99/7.05  | (84) xq = sz00 |  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, xa) = 0) | ( ~ (v0 = xa) & sdtasdt0(xq, sz00) = v0))
% 21.99/7.05  |
% 21.99/7.05  | Instantiating formula (54) with sz00, xq, sz10 and discharging atoms aInteger0(xq) = 0, aInteger0(sz10) = 0, aInteger0(sz00) = 0, yields:
% 21.99/7.05  | (85) xq = sz00 |  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, sz10) = 0) | ( ~ (v0 = sz10) & sdtasdt0(xq, sz00) = v0))
% 21.99/7.05  |
% 21.99/7.05  | Instantiating formula (54) with sz00, xq, sz00 and discharging atoms aInteger0(xq) = 0, aInteger0(sz00) = 0, yields:
% 21.99/7.05  | (86) xq = sz00 |  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, sz00) = 0) | ( ~ (v0 = sz00) & sdtasdt0(xq, sz00) = v0))
% 21.99/7.05  |
% 21.99/7.06  | Instantiating formula (54) with xa, xq, sz00 and discharging atoms aInteger0(xq) = 0, aInteger0(xa) = 0, aInteger0(sz00) = 0, yields:
% 21.99/7.06  | (87) xq = sz00 |  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, sz00) = 0) | ( ~ (v0 = sz00) & sdtasdt0(xq, xa) = v0))
% 21.99/7.06  |
% 21.99/7.06  | Instantiating formula (54) with sz10, xq, sz00 and discharging atoms aInteger0(xq) = 0, aInteger0(sz10) = 0, aInteger0(sz00) = 0, yields:
% 21.99/7.06  | (88) xq = sz00 |  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, sz00) = 0) | ( ~ (v0 = sz00) & sdtasdt0(xq, sz10) = v0))
% 21.99/7.06  |
% 21.99/7.06  | Instantiating (76) with all_21_0_19 yields:
% 21.99/7.06  | (89) smndt0(xa) = all_21_0_19 & aInteger0(all_21_0_19) = 0
% 21.99/7.06  |
% 21.99/7.06  | Applying alpha-rule on (89) yields:
% 21.99/7.06  | (90) smndt0(xa) = all_21_0_19
% 21.99/7.06  | (91) aInteger0(all_21_0_19) = 0
% 21.99/7.06  |
% 21.99/7.06  | Instantiating (75) with all_46_0_50 yields:
% 21.99/7.06  | (92) sdtpldt0(all_46_0_50, xa) = sz00 & sdtpldt0(xa, all_46_0_50) = sz00 & smndt0(xa) = all_46_0_50
% 21.99/7.06  |
% 21.99/7.06  | Applying alpha-rule on (92) yields:
% 21.99/7.06  | (93) sdtpldt0(all_46_0_50, xa) = sz00
% 21.99/7.06  | (94) sdtpldt0(xa, all_46_0_50) = sz00
% 21.99/7.06  | (95) smndt0(xa) = all_46_0_50
% 21.99/7.06  |
% 21.99/7.06  | Instantiating (74) with all_53_0_56 yields:
% 21.99/7.06  | (96) sdtasdt0(all_0_1_1, xa) = all_53_0_56 & sdtasdt0(xa, all_0_1_1) = all_53_0_56 & smndt0(xa) = all_53_0_56
% 21.99/7.06  |
% 21.99/7.06  | Applying alpha-rule on (96) yields:
% 21.99/7.06  | (97) sdtasdt0(all_0_1_1, xa) = all_53_0_56
% 21.99/7.06  | (98) sdtasdt0(xa, all_0_1_1) = all_53_0_56
% 21.99/7.06  | (99) smndt0(xa) = all_53_0_56
% 21.99/7.06  |
% 21.99/7.06  +-Applying beta-rule and splitting (77), into two cases.
% 21.99/7.06  |-Branch one:
% 21.99/7.06  | (100) xq = sz00
% 21.99/7.06  |
% 21.99/7.06  	| Equations (100) can reduce 17 to:
% 21.99/7.06  	| (101) $false
% 21.99/7.06  	|
% 21.99/7.06  	|-The branch is then unsatisfiable
% 21.99/7.06  |-Branch two:
% 21.99/7.06  | (17)  ~ (xq = sz00)
% 21.99/7.06  | (103)  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, xq) = 0) | ( ~ (v0 = xq) & sdtasdt0(xq, sz10) = v0))
% 21.99/7.06  |
% 21.99/7.06  	+-Applying beta-rule and splitting (67), into two cases.
% 21.99/7.06  	|-Branch one:
% 21.99/7.06  	| (100) xq = sz00
% 21.99/7.06  	|
% 21.99/7.06  		| Equations (100) can reduce 17 to:
% 21.99/7.06  		| (101) $false
% 21.99/7.06  		|
% 21.99/7.06  		|-The branch is then unsatisfiable
% 21.99/7.06  	|-Branch two:
% 21.99/7.06  	| (17)  ~ (xq = sz00)
% 21.99/7.06  	| (107)  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, xq) = 0) | ( ~ (v0 = xq) & sdtasdt0(xq, xq) = v0))
% 21.99/7.06  	|
% 21.99/7.06  		+-Applying beta-rule and splitting (80), into two cases.
% 21.99/7.06  		|-Branch one:
% 21.99/7.06  		| (100) xq = sz00
% 21.99/7.06  		|
% 21.99/7.06  			| Equations (100) can reduce 17 to:
% 21.99/7.06  			| (101) $false
% 21.99/7.06  			|
% 21.99/7.06  			|-The branch is then unsatisfiable
% 21.99/7.06  		|-Branch two:
% 21.99/7.06  		| (17)  ~ (xq = sz00)
% 21.99/7.06  		| (111)  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, sz10) = 0) | ( ~ (v0 = sz10) & sdtasdt0(xq, sz10) = v0))
% 21.99/7.06  		|
% 21.99/7.06  			+-Applying beta-rule and splitting (86), into two cases.
% 21.99/7.06  			|-Branch one:
% 21.99/7.06  			| (100) xq = sz00
% 21.99/7.06  			|
% 21.99/7.06  				| Equations (100) can reduce 17 to:
% 21.99/7.06  				| (101) $false
% 21.99/7.06  				|
% 21.99/7.06  				|-The branch is then unsatisfiable
% 21.99/7.06  			|-Branch two:
% 21.99/7.06  			| (17)  ~ (xq = sz00)
% 21.99/7.06  			| (115)  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, sz00) = 0) | ( ~ (v0 = sz00) & sdtasdt0(xq, sz00) = v0))
% 21.99/7.06  			|
% 21.99/7.06  				| Instantiating (115) with all_89_0_91 yields:
% 21.99/7.06  				| (116) (all_89_0_91 = 0 & aDivisorOf0(xq, sz00) = 0) | ( ~ (all_89_0_91 = sz00) & sdtasdt0(xq, sz00) = all_89_0_91)
% 21.99/7.06  				|
% 21.99/7.06  				+-Applying beta-rule and splitting (88), into two cases.
% 21.99/7.06  				|-Branch one:
% 21.99/7.06  				| (100) xq = sz00
% 21.99/7.06  				|
% 21.99/7.06  					| Equations (100) can reduce 17 to:
% 21.99/7.06  					| (101) $false
% 21.99/7.06  					|
% 21.99/7.06  					|-The branch is then unsatisfiable
% 21.99/7.06  				|-Branch two:
% 21.99/7.06  				| (17)  ~ (xq = sz00)
% 21.99/7.06  				| (120)  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, sz00) = 0) | ( ~ (v0 = sz00) & sdtasdt0(xq, sz10) = v0))
% 21.99/7.06  				|
% 21.99/7.06  					+-Applying beta-rule and splitting (116), into two cases.
% 21.99/7.06  					|-Branch one:
% 21.99/7.06  					| (121) all_89_0_91 = 0 & aDivisorOf0(xq, sz00) = 0
% 21.99/7.06  					|
% 21.99/7.06  						| Applying alpha-rule on (121) yields:
% 21.99/7.06  						| (122) all_89_0_91 = 0
% 21.99/7.06  						| (123) aDivisorOf0(xq, sz00) = 0
% 21.99/7.06  						|
% 21.99/7.06  						+-Applying beta-rule and splitting (78), into two cases.
% 21.99/7.06  						|-Branch one:
% 21.99/7.06  						| (100) xq = sz00
% 21.99/7.06  						|
% 21.99/7.06  							| Equations (100) can reduce 17 to:
% 21.99/7.06  							| (101) $false
% 21.99/7.06  							|
% 21.99/7.06  							|-The branch is then unsatisfiable
% 21.99/7.06  						|-Branch two:
% 21.99/7.06  						| (17)  ~ (xq = sz00)
% 21.99/7.06  						| (127)  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, sz10) = 0) | ( ~ (v0 = sz10) & sdtasdt0(xq, xq) = v0))
% 21.99/7.06  						|
% 21.99/7.06  							+-Applying beta-rule and splitting (85), into two cases.
% 21.99/7.06  							|-Branch one:
% 21.99/7.06  							| (100) xq = sz00
% 21.99/7.06  							|
% 21.99/7.06  								| Equations (100) can reduce 17 to:
% 21.99/7.06  								| (101) $false
% 21.99/7.06  								|
% 21.99/7.06  								|-The branch is then unsatisfiable
% 21.99/7.06  							|-Branch two:
% 21.99/7.06  							| (17)  ~ (xq = sz00)
% 21.99/7.06  							| (131)  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, sz10) = 0) | ( ~ (v0 = sz10) & sdtasdt0(xq, sz00) = v0))
% 21.99/7.06  							|
% 21.99/7.06  								+-Applying beta-rule and splitting (87), into two cases.
% 21.99/7.06  								|-Branch one:
% 21.99/7.06  								| (100) xq = sz00
% 21.99/7.06  								|
% 21.99/7.06  									| Equations (100) can reduce 17 to:
% 21.99/7.06  									| (101) $false
% 21.99/7.06  									|
% 21.99/7.06  									|-The branch is then unsatisfiable
% 21.99/7.06  								|-Branch two:
% 21.99/7.06  								| (17)  ~ (xq = sz00)
% 21.99/7.06  								| (135)  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, sz00) = 0) | ( ~ (v0 = sz00) & sdtasdt0(xq, xa) = v0))
% 21.99/7.06  								|
% 21.99/7.06  									+-Applying beta-rule and splitting (83), into two cases.
% 21.99/7.06  									|-Branch one:
% 21.99/7.06  									| (100) xq = sz00
% 21.99/7.06  									|
% 21.99/7.06  										| Equations (100) can reduce 17 to:
% 21.99/7.06  										| (101) $false
% 21.99/7.06  										|
% 21.99/7.06  										|-The branch is then unsatisfiable
% 21.99/7.06  									|-Branch two:
% 21.99/7.06  									| (17)  ~ (xq = sz00)
% 21.99/7.06  									| (139)  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, sz00) = 0) | ( ~ (v0 = sz00) & sdtasdt0(xq, xq) = v0))
% 21.99/7.06  									|
% 21.99/7.06  										+-Applying beta-rule and splitting (84), into two cases.
% 21.99/7.06  										|-Branch one:
% 21.99/7.06  										| (100) xq = sz00
% 21.99/7.06  										|
% 21.99/7.06  											| Equations (100) can reduce 17 to:
% 21.99/7.06  											| (101) $false
% 21.99/7.06  											|
% 21.99/7.06  											|-The branch is then unsatisfiable
% 21.99/7.06  										|-Branch two:
% 21.99/7.06  										| (17)  ~ (xq = sz00)
% 21.99/7.06  										| (143)  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, xa) = 0) | ( ~ (v0 = xa) & sdtasdt0(xq, sz00) = v0))
% 21.99/7.06  										|
% 21.99/7.06  											+-Applying beta-rule and splitting (73), into two cases.
% 21.99/7.06  											|-Branch one:
% 21.99/7.06  											| (100) xq = sz00
% 21.99/7.06  											|
% 21.99/7.06  												| Equations (100) can reduce 17 to:
% 21.99/7.06  												| (101) $false
% 21.99/7.06  												|
% 21.99/7.06  												|-The branch is then unsatisfiable
% 21.99/7.06  											|-Branch two:
% 21.99/7.06  											| (17)  ~ (xq = sz00)
% 21.99/7.06  											| (147)  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, xa) = 0) | ( ~ (v0 = xa) & sdtasdt0(xq, xa) = v0))
% 21.99/7.06  											|
% 21.99/7.06  												+-Applying beta-rule and splitting (72), into two cases.
% 21.99/7.06  												|-Branch one:
% 21.99/7.06  												| (100) xq = sz00
% 21.99/7.06  												|
% 21.99/7.06  													| Equations (100) can reduce 17 to:
% 21.99/7.06  													| (101) $false
% 21.99/7.06  													|
% 21.99/7.06  													|-The branch is then unsatisfiable
% 21.99/7.06  												|-Branch two:
% 21.99/7.06  												| (17)  ~ (xq = sz00)
% 21.99/7.06  												| (151)  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, xa) = 0) | ( ~ (v0 = xa) & sdtasdt0(xq, xq) = v0))
% 21.99/7.06  												|
% 21.99/7.06  													+-Applying beta-rule and splitting (82), into two cases.
% 21.99/7.06  													|-Branch one:
% 21.99/7.06  													| (100) xq = sz00
% 21.99/7.06  													|
% 21.99/7.06  														| Equations (100) can reduce 17 to:
% 21.99/7.06  														| (101) $false
% 21.99/7.06  														|
% 21.99/7.06  														|-The branch is then unsatisfiable
% 21.99/7.06  													|-Branch two:
% 21.99/7.06  													| (17)  ~ (xq = sz00)
% 21.99/7.06  													| (155)  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, xq) = 0) | ( ~ (v0 = xq) & sdtasdt0(xq, sz00) = v0))
% 21.99/7.06  													|
% 21.99/7.06  														+-Applying beta-rule and splitting (79), into two cases.
% 21.99/7.06  														|-Branch one:
% 21.99/7.06  														| (100) xq = sz00
% 21.99/7.06  														|
% 21.99/7.06  															| Equations (100) can reduce 17 to:
% 21.99/7.06  															| (101) $false
% 21.99/7.06  															|
% 21.99/7.06  															|-The branch is then unsatisfiable
% 21.99/7.06  														|-Branch two:
% 21.99/7.06  														| (17)  ~ (xq = sz00)
% 21.99/7.06  														| (159)  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, xa) = 0) | ( ~ (v0 = xa) & sdtasdt0(xq, sz10) = v0))
% 21.99/7.06  														|
% 21.99/7.06  															+-Applying beta-rule and splitting (71), into two cases.
% 21.99/7.06  															|-Branch one:
% 21.99/7.06  															| (100) xq = sz00
% 21.99/7.06  															|
% 21.99/7.06  																| Equations (100) can reduce 17 to:
% 21.99/7.06  																| (101) $false
% 21.99/7.06  																|
% 21.99/7.06  																|-The branch is then unsatisfiable
% 21.99/7.06  															|-Branch two:
% 21.99/7.06  															| (17)  ~ (xq = sz00)
% 21.99/7.06  															| (163)  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, xq) = 0) | ( ~ (v0 = xq) & sdtasdt0(xq, xa) = v0))
% 21.99/7.07  															|
% 21.99/7.07  																+-Applying beta-rule and splitting (81), into two cases.
% 21.99/7.07  																|-Branch one:
% 21.99/7.07  																| (100) xq = sz00
% 21.99/7.07  																|
% 21.99/7.07  																	| Equations (100) can reduce 17 to:
% 21.99/7.07  																	| (101) $false
% 21.99/7.07  																	|
% 21.99/7.07  																	|-The branch is then unsatisfiable
% 21.99/7.07  																|-Branch two:
% 21.99/7.07  																| (17)  ~ (xq = sz00)
% 21.99/7.07  																| (167)  ? [v0] : ((v0 = 0 & aDivisorOf0(xq, sz10) = 0) | ( ~ (v0 = sz10) & sdtasdt0(xq, xa) = v0))
% 21.99/7.07  																|
% 21.99/7.07  																	+-Applying beta-rule and splitting (66), into two cases.
% 21.99/7.07  																	|-Branch one:
% 21.99/7.07  																	| (100) xq = sz00
% 21.99/7.07  																	|
% 21.99/7.07  																		| Equations (100) can reduce 17 to:
% 21.99/7.07  																		| (101) $false
% 21.99/7.07  																		|
% 21.99/7.07  																		|-The branch is then unsatisfiable
% 21.99/7.07  																	|-Branch two:
% 21.99/7.07  																	| (17)  ~ (xq = sz00)
% 21.99/7.07  																	| (171)  ? [v0] :  ? [v1] :  ? [v2] : (( ~ (v0 = 0) & aInteger0(xq) = v0) | ( ~ (v0 = 0) & aInteger0(xa) = v0) | (( ~ (all_0_0_0 = 0) | (v2 = 0 & aDivisorOf0(xq, v1) = 0 & sdtpldt0(xa, v0) = v1 & smndt0(xa) = v0)) & (all_0_0_0 = 0 | ( ~ (v2 = 0) & aDivisorOf0(xq, v1) = v2 & sdtpldt0(xa, v0) = v1 & smndt0(xa) = v0))))
% 21.99/7.07  																	|
% 21.99/7.07  																		| Instantiating (171) with all_169_0_104, all_169_1_105, all_169_2_106 yields:
% 21.99/7.07  																		| (172) ( ~ (all_169_2_106 = 0) & aInteger0(xq) = all_169_2_106) | ( ~ (all_169_2_106 = 0) & aInteger0(xa) = all_169_2_106) | (( ~ (all_0_0_0 = 0) | (all_169_0_104 = 0 & aDivisorOf0(xq, all_169_1_105) = 0 & sdtpldt0(xa, all_169_2_106) = all_169_1_105 & smndt0(xa) = all_169_2_106)) & (all_0_0_0 = 0 | ( ~ (all_169_0_104 = 0) & aDivisorOf0(xq, all_169_1_105) = all_169_0_104 & sdtpldt0(xa, all_169_2_106) = all_169_1_105 & smndt0(xa) = all_169_2_106)))
% 21.99/7.07  																		|
% 21.99/7.07  																		+-Applying beta-rule and splitting (172), into two cases.
% 21.99/7.07  																		|-Branch one:
% 21.99/7.07  																		| (173) ( ~ (all_169_2_106 = 0) & aInteger0(xq) = all_169_2_106) | ( ~ (all_169_2_106 = 0) & aInteger0(xa) = all_169_2_106)
% 21.99/7.07  																		|
% 21.99/7.07  																			+-Applying beta-rule and splitting (173), into two cases.
% 21.99/7.07  																			|-Branch one:
% 21.99/7.07  																			| (174)  ~ (all_169_2_106 = 0) & aInteger0(xq) = all_169_2_106
% 21.99/7.07  																			|
% 21.99/7.07  																				| Applying alpha-rule on (174) yields:
% 21.99/7.07  																				| (175)  ~ (all_169_2_106 = 0)
% 21.99/7.07  																				| (176) aInteger0(xq) = all_169_2_106
% 21.99/7.07  																				|
% 21.99/7.07  																				| Instantiating formula (39) with xq, all_169_2_106, 0 and discharging atoms aInteger0(xq) = all_169_2_106, aInteger0(xq) = 0, yields:
% 21.99/7.07  																				| (177) all_169_2_106 = 0
% 21.99/7.07  																				|
% 21.99/7.07  																				| Equations (177) can reduce 175 to:
% 21.99/7.07  																				| (101) $false
% 21.99/7.07  																				|
% 21.99/7.07  																				|-The branch is then unsatisfiable
% 21.99/7.07  																			|-Branch two:
% 21.99/7.07  																			| (179)  ~ (all_169_2_106 = 0) & aInteger0(xa) = all_169_2_106
% 21.99/7.07  																			|
% 21.99/7.07  																				| Applying alpha-rule on (179) yields:
% 21.99/7.07  																				| (175)  ~ (all_169_2_106 = 0)
% 21.99/7.07  																				| (181) aInteger0(xa) = all_169_2_106
% 21.99/7.07  																				|
% 21.99/7.07  																				| Instantiating formula (39) with xa, all_169_2_106, 0 and discharging atoms aInteger0(xa) = all_169_2_106, aInteger0(xa) = 0, yields:
% 21.99/7.07  																				| (177) all_169_2_106 = 0
% 21.99/7.07  																				|
% 21.99/7.07  																				| Equations (177) can reduce 175 to:
% 21.99/7.07  																				| (101) $false
% 21.99/7.07  																				|
% 21.99/7.07  																				|-The branch is then unsatisfiable
% 21.99/7.07  																		|-Branch two:
% 21.99/7.07  																		| (184) ( ~ (all_0_0_0 = 0) | (all_169_0_104 = 0 & aDivisorOf0(xq, all_169_1_105) = 0 & sdtpldt0(xa, all_169_2_106) = all_169_1_105 & smndt0(xa) = all_169_2_106)) & (all_0_0_0 = 0 | ( ~ (all_169_0_104 = 0) & aDivisorOf0(xq, all_169_1_105) = all_169_0_104 & sdtpldt0(xa, all_169_2_106) = all_169_1_105 & smndt0(xa) = all_169_2_106))
% 21.99/7.07  																		|
% 21.99/7.07  																			| Applying alpha-rule on (184) yields:
% 21.99/7.07  																			| (185)  ~ (all_0_0_0 = 0) | (all_169_0_104 = 0 & aDivisorOf0(xq, all_169_1_105) = 0 & sdtpldt0(xa, all_169_2_106) = all_169_1_105 & smndt0(xa) = all_169_2_106)
% 21.99/7.07  																			| (186) all_0_0_0 = 0 | ( ~ (all_169_0_104 = 0) & aDivisorOf0(xq, all_169_1_105) = all_169_0_104 & sdtpldt0(xa, all_169_2_106) = all_169_1_105 & smndt0(xa) = all_169_2_106)
% 21.99/7.07  																			|
% 21.99/7.07  																			+-Applying beta-rule and splitting (186), into two cases.
% 21.99/7.07  																			|-Branch one:
% 21.99/7.07  																			| (187) all_0_0_0 = 0
% 21.99/7.07  																			|
% 21.99/7.07  																				| Equations (187) can reduce 24 to:
% 21.99/7.07  																				| (101) $false
% 21.99/7.07  																				|
% 21.99/7.07  																				|-The branch is then unsatisfiable
% 21.99/7.07  																			|-Branch two:
% 21.99/7.07  																			| (24)  ~ (all_0_0_0 = 0)
% 21.99/7.07  																			| (190)  ~ (all_169_0_104 = 0) & aDivisorOf0(xq, all_169_1_105) = all_169_0_104 & sdtpldt0(xa, all_169_2_106) = all_169_1_105 & smndt0(xa) = all_169_2_106
% 21.99/7.07  																			|
% 21.99/7.07  																				| Applying alpha-rule on (190) yields:
% 21.99/7.07  																				| (191)  ~ (all_169_0_104 = 0)
% 21.99/7.07  																				| (192) aDivisorOf0(xq, all_169_1_105) = all_169_0_104
% 21.99/7.07  																				| (193) sdtpldt0(xa, all_169_2_106) = all_169_1_105
% 21.99/7.07  																				| (194) smndt0(xa) = all_169_2_106
% 21.99/7.07  																				|
% 21.99/7.07  																				| Instantiating formula (34) with xa, all_53_0_56, all_169_2_106 and discharging atoms smndt0(xa) = all_169_2_106, smndt0(xa) = all_53_0_56, yields:
% 21.99/7.07  																				| (195) all_169_2_106 = all_53_0_56
% 21.99/7.07  																				|
% 21.99/7.07  																				| Instantiating formula (34) with xa, all_46_0_50, all_53_0_56 and discharging atoms smndt0(xa) = all_53_0_56, smndt0(xa) = all_46_0_50, yields:
% 21.99/7.07  																				| (196) all_53_0_56 = all_46_0_50
% 21.99/7.07  																				|
% 21.99/7.07  																				| Instantiating formula (34) with xa, all_21_0_19, all_169_2_106 and discharging atoms smndt0(xa) = all_169_2_106, smndt0(xa) = all_21_0_19, yields:
% 21.99/7.07  																				| (197) all_169_2_106 = all_21_0_19
% 21.99/7.07  																				|
% 21.99/7.07  																				| Combining equations (195,197) yields a new equation:
% 21.99/7.07  																				| (198) all_53_0_56 = all_21_0_19
% 21.99/7.07  																				|
% 21.99/7.07  																				| Simplifying 198 yields:
% 21.99/7.07  																				| (199) all_53_0_56 = all_21_0_19
% 21.99/7.07  																				|
% 21.99/7.07  																				| Combining equations (196,199) yields a new equation:
% 21.99/7.07  																				| (200) all_46_0_50 = all_21_0_19
% 21.99/7.07  																				|
% 21.99/7.07  																				| Simplifying 200 yields:
% 21.99/7.07  																				| (201) all_46_0_50 = all_21_0_19
% 21.99/7.07  																				|
% 21.99/7.07  																				| From (197) and (193) follows:
% 21.99/7.07  																				| (202) sdtpldt0(xa, all_21_0_19) = all_169_1_105
% 21.99/7.07  																				|
% 21.99/7.07  																				| From (201) and (94) follows:
% 21.99/7.07  																				| (203) sdtpldt0(xa, all_21_0_19) = sz00
% 21.99/7.07  																				|
% 21.99/7.07  																				| Instantiating formula (45) with xa, all_21_0_19, sz00, all_169_1_105 and discharging atoms sdtpldt0(xa, all_21_0_19) = all_169_1_105, sdtpldt0(xa, all_21_0_19) = sz00, yields:
% 21.99/7.07  																				| (204) all_169_1_105 = sz00
% 21.99/7.07  																				|
% 21.99/7.07  																				| From (204) and (192) follows:
% 21.99/7.07  																				| (205) aDivisorOf0(xq, sz00) = all_169_0_104
% 21.99/7.07  																				|
% 21.99/7.07  																				| Instantiating formula (10) with xq, sz00, all_169_0_104, 0 and discharging atoms aDivisorOf0(xq, sz00) = all_169_0_104, aDivisorOf0(xq, sz00) = 0, yields:
% 21.99/7.07  																				| (206) all_169_0_104 = 0
% 21.99/7.07  																				|
% 21.99/7.07  																				| Equations (206) can reduce 191 to:
% 21.99/7.07  																				| (101) $false
% 21.99/7.07  																				|
% 21.99/7.07  																				|-The branch is then unsatisfiable
% 21.99/7.07  					|-Branch two:
% 21.99/7.07  					| (208)  ~ (all_89_0_91 = sz00) & sdtasdt0(xq, sz00) = all_89_0_91
% 21.99/7.07  					|
% 21.99/7.07  						| Applying alpha-rule on (208) yields:
% 21.99/7.07  						| (209)  ~ (all_89_0_91 = sz00)
% 21.99/7.07  						| (210) sdtasdt0(xq, sz00) = all_89_0_91
% 21.99/7.07  						|
% 21.99/7.07  						| Instantiating formula (60) with xq, sz00, sz00, all_89_0_91 and discharging atoms sdtasdt0(xq, sz00) = all_89_0_91, sdtasdt0(xq, sz00) = sz00, yields:
% 21.99/7.07  						| (211) all_89_0_91 = sz00
% 21.99/7.07  						|
% 21.99/7.07  						| Equations (211) can reduce 209 to:
% 21.99/7.07  						| (101) $false
% 21.99/7.07  						|
% 21.99/7.07  						|-The branch is then unsatisfiable
% 21.99/7.07  % SZS output end Proof for theBenchmark
% 21.99/7.07  
% 21.99/7.07  6474ms
%------------------------------------------------------------------------------