TSTP Solution File: LCL726^5 by TPS---3.120601S1b
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- Process Solution
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% File : TPS---3.120601S1b
% Problem : LCL726^5 : TPTP v5.5.0. Released v4.0.0.
% Transfm : none
% Format : tptp:raw
% Command : run-tps-S1b %s %d
% Computer : art08.cs.miami.edu
% Model : i686 i686
% CPU : Intel(R) Pentium(R) 4 CPU 3.00GHz
% Memory : 2005MB
% OS : Linux 2.6.32.26-175.fc12.i686.PAE
% CPULimit : 300s
% DateTime : Sun May 12 06:41:55 EDT 2013
% Result : Theorem 24.73s
% Output : Assurance 24.73s
% Verified :
% SZS Type : None (Parsing solution fails)
% Syntax : Number of formulae : 0
% Comments :
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%----NO SOLUTION OUTPUT BY SYSTEM
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%----ORIGINAL SYSTEM OUTPUT
% ALERT: Will not run MODE-THM173 due to minimal CPU limit 5
% ALERT: Will not run MODE-THM134-A due to minimal CPU limit 5
% ALERT: Will not run MODE-THM15B-TRIAL8 due to minimal CPU limit 5
% ALERT: Will not run MODE-X5310-B due to minimal CPU limit 5
% ALERT: Will not run MODE-THM407-A due to minimal CPU limit 5
% ALERT: Will not run MODE-T145-MS98-3 due to minimal CPU limit 5
% ALERT: Will not run MODE-THM136-MS98 due to minimal CPU limit 5
% ALERT: Will not run MODE-THM140 due to minimal CPU limit 5
% ALERT: Will not run EASY-MS03-7-MODE due to minimal CPU limit 5
% ALERT: Will not run SV-MODE-NOD1 due to minimal CPU limit 5
% ALERT: Will not run COIND-SV-MODE-180 due to minimal CPU limit 5
% ALERT: Will not run MODE-THM126-MS98 due to minimal CPU limit 11
% ALERT: Will not run MODE-THM630 due to minimal CPU limit 11
% ALERT: Will not run MODE-THM48-E due to minimal CPU limit 11
% ALERT: Will not run BOTH-MODE due to minimal CPU limit 11
% ALERT: Will not run MODE-THM112A-PR00 due to minimal CPU limit 11
% CPU used so far: 3.15
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% RUNNING: /home/tptp/SystemExecution/TreeLimitedRun -q2 -p2 1 2 0 /usr/bin/lisp -core /home/tptp/Systems/TPS---3.120601S1b/Source/tps3 -prob /tmp/TPS-GOOD1_27640_art08/LCL726^5.tps -mode MODE-THM631 2>&1
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% CPU used so far: 4.99
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% RUNNING: /home/tptp/SystemExecution/TreeLimitedRun -q2 -p2 1 2 0 /usr/bin/lisp -core /home/tptp/Systems/TPS---3.120601S1b/Source/tps3 -prob /tmp/TPS-GOOD1_27640_art08/LCL726^5.tps -mode CT29-MODE 2>&1
%
% CPU used so far: 6.84
%
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% RUNNING: /home/tptp/SystemExecution/TreeLimitedRun -q2 -p2 1 2 0 /usr/bin/lisp -core /home/tptp/Systems/TPS---3.120601S1b/Source/tps3 -prob /tmp/TPS-GOOD1_27640_art08/LCL726^5.tps -mode X5309-MS04-MODE-1 2>&1
%
% CPU used so far: 8.84
%
% -----------------------------------------------------------------------------
% RUNNING: /home/tptp/SystemExecution/TreeLimitedRun -q2 -p2 1 2 0 /usr/bin/lisp -core /home/tptp/Systems/TPS---3.120601S1b/Source/tps3 -prob /tmp/TPS-GOOD1_27640_art08/LCL726^5.tps -mode MS04-EQ-TESTMODE 2>&1
%
% CPU used so far: 9.07
%
% -----------------------------------------------------------------------------
% RUNNING: /home/tptp/SystemExecution/TreeLimitedRun -q2 -p2 1 2 0 /usr/bin/lisp -core /home/tptp/Systems/TPS---3.120601S1b/Source/tps3 -prob /tmp/TPS-GOOD1_27640_art08/LCL726^5.tps -mode MODE-THM122-PR97 2>&1
%
% CPU used so far: 11.09
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% RUNNING: /home/tptp/SystemExecution/TreeLimitedRun -q2 -p2 1 2 0 /usr/bin/lisp -core /home/tptp/Systems/TPS---3.120601S1b/Source/tps3 -prob /tmp/TPS-GOOD1_27640_art08/LCL726^5.tps -mode MS03-TF-MODE 2>&1
%
% CPU used so far: 13.11
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% -----------------------------------------------------------------------------
% RUNNING: /home/tptp/SystemExecution/TreeLimitedRun -q2 -p2 1 2 0 /usr/bin/lisp -core /home/tptp/Systems/TPS---3.120601S1b/Source/tps3 -prob /tmp/TPS-GOOD1_27640_art08/LCL726^5.tps -mode MODE-THM350 2>&1
%
% CPU used so far: 15.1
%
% -----------------------------------------------------------------------------
% RUNNING: /home/tptp/SystemExecution/TreeLimitedRun -q2 -p2 1 2 0 /usr/bin/lisp -core /home/tptp/Systems/TPS---3.120601S1b/Source/tps3 -prob /tmp/TPS-GOOD1_27640_art08/LCL726^5.tps -mode MODE-THM48-TEST-A 2>&1
%
% CPU used so far: 17.1
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% RUNNING: /home/tptp/SystemExecution/TreeLimitedRun -q2 -p2 1 2 0 /usr/bin/lisp -core /home/tptp/Systems/TPS---3.120601S1b/Source/tps3 -prob /tmp/TPS-GOOD1_27640_art08/LCL726^5.tps -mode MODE-THM120I-1 2>&1
%
% --- TPS did not prove cTHM534 using mode MODE-THM120I-1. ---
% CPU used so far: 17.75
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% RUNNING: /home/tptp/SystemExecution/TreeLimitedRun -q2 -p2 1 2 0 /usr/bin/lisp -core /home/tptp/Systems/TPS---3.120601S1b/Source/tps3 -prob /tmp/TPS-GOOD1_27640_art08/LCL726^5.tps -mode PR00-MAX-MODE 2>&1
%
% --- TPS did not prove cTHM534 using mode PR00-MAX-MODE. ---
% CPU used so far: 18
%
% -----------------------------------------------------------------------------
% RUNNING: /home/tptp/SystemExecution/TreeLimitedRun -q2 -p2 1 2 0 /usr/bin/lisp -core /home/tptp/Systems/TPS---3.120601S1b/Source/tps3 -prob /tmp/TPS-GOOD1_27640_art08/LCL726^5.tps -mode MODE-MS04-2-EQ-PRIMSUB 2>&1
%
% CPU used so far: 20.01
%
% -----------------------------------------------------------------------------
% RUNNING: /home/tptp/SystemExecution/TreeLimitedRun -q2 -p2 1 2 0 /usr/bin/lisp -core /home/tptp/Systems/TPS---3.120601S1b/Source/tps3 -prob /tmp/TPS-GOOD1_27640_art08/LCL726^5.tps -mode MODE-THM152-MS98-3 2>&1
%
% CPU used so far: 22
%
% -----------------------------------------------------------------------------
% RUNNING: /home/tptp/SystemExecution/TreeLimitedRun -q2 -p2 1 2 0 /usr/bin/lisp -core /home/tptp/Systems/TPS---3.120601S1b/Source/tps3 -prob /tmp/TPS-GOOD1_27640_art08/LCL726^5.tps -mode MODE-X5200-C 2>&1
%
% CPU used so far: 24
%
% -----------------------------------------------------------------------------
% RUNNING: /home/tptp/SystemExecution/TreeLimitedRun -q2 -p2 1 2 0 /usr/bin/lisp -core /home/tptp/Systems/TPS---3.120601S1b/Source/tps3 -prob /tmp/TPS-GOOD1_27640_art08/LCL726^5.tps -mode MODE-THM275-A 2>&1
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% % SZS status Theorem for /tmp/TPS-GOOD1_27640_art08/LCL726^5.tps
% +++ TPS proved cTHM534 using mode MODE-THM275-A in 1 seconds. +++
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