TSTP Solution File: HWV089+1 by SuperZenon---0.0.1

View Problem - Process Solution

%------------------------------------------------------------------------------
% File     : SuperZenon---0.0.1
% Problem  : HWV089+1 : TPTP v8.1.0. Released v6.1.0.
% Transfm  : none
% Format   : tptp:raw
% Command  : run_super_zenon -p0 -itptp -om -max-time %d %s

% Computer : n029.cluster.edu
% Model    : x86_64 x86_64
% CPU      : Intel(R) Xeon(R) CPU E5-2620 v4 2.10GHz
% Memory   : 8042.1875MB
% OS       : Linux 3.10.0-693.el7.x86_64
% CPULimit : 300s
% WCLimit  : 600s
% DateTime : Sat Jul 16 19:19:25 EDT 2022

% Result   : Theorem 2.13s 2.35s
% Output   : Proof 2.13s
% Verified : 
% SZS Type : -

% Comments : 
%------------------------------------------------------------------------------
%----WARNING: Could not form TPTP format derivation
%------------------------------------------------------------------------------
%----ORIGINAL SYSTEM OUTPUT
% 0.03/0.13  % Problem  : HWV089+1 : TPTP v8.1.0. Released v6.1.0.
% 0.03/0.14  % Command  : run_super_zenon -p0 -itptp -om -max-time %d %s
% 0.14/0.35  % Computer : n029.cluster.edu
% 0.14/0.35  % Model    : x86_64 x86_64
% 0.14/0.35  % CPU      : Intel(R) Xeon(R) CPU E5-2620 v4 @ 2.10GHz
% 0.14/0.35  % Memory   : 8042.1875MB
% 0.14/0.35  % OS       : Linux 3.10.0-693.el7.x86_64
% 0.14/0.35  % CPULimit : 300
% 0.14/0.35  % WCLimit  : 600
% 0.14/0.35  % DateTime : Thu Jun 16 22:25:57 EDT 2022
% 0.14/0.35  % CPUTime  : 
% 2.13/2.35  % SZS status Theorem
% 2.13/2.35  (* PROOF-FOUND *)
% 2.13/2.35  (* BEGIN-PROOF *)
% 2.13/2.35  % SZS output start Proof
% 2.13/2.35  1. (-. (v3677 T_0)) (v3677 T_0)   ### Axiom
% 2.13/2.35  2. (-. (-. (v3677 T_0))) (-. (v3677 T_0))   ### NotNot 1
% 2.13/2.35  3. (v3678 T_0) (-. (v3678 T_0))   ### Axiom
% 2.13/2.35  4. (v3679 T_0 (bitIndex0)) (-. (v3679 T_0 (bitIndex0)))   ### Axiom
% 2.13/2.35  5. (v3684 T_0 (bitIndex5)) (-. (v3684 T_0 (bitIndex5)))   ### Axiom
% 2.13/2.35  6. (All VarCurr, (-. (v3684 VarCurr (bitIndex5)))) (v3684 T_0 (bitIndex5))   ### All 5
% 2.13/2.35  7. ((v3682 T_0) /\ (v3684 T_0 (bitIndex5))) (All VarCurr, (-. (v3684 VarCurr (bitIndex5))))   ### And 6
% 2.13/2.35  8. (v3680 T_0) (All VarCurr, (-. (v3684 VarCurr (bitIndex5))))   ### Definition-Pseudo(v3680) 7
% 2.13/2.35  9. ((v3679 T_0 (bitIndex0)) <=> (v3680 T_0)) (All VarCurr, (-. (v3684 VarCurr (bitIndex5)))) (v3679 T_0 (bitIndex0))   ### Equiv 4 8
% 2.13/2.35  10. (All VarCurr, ((v3679 VarCurr (bitIndex0)) <=> (v3680 VarCurr))) (v3679 T_0 (bitIndex0)) (All VarCurr, (-. (v3684 VarCurr (bitIndex5))))   ### All 9
% 2.13/2.35  11. ((v3679 T_0 (bitIndex0)) /\ (v3679 T_0 (bitIndex1))) (All VarCurr, (-. (v3684 VarCurr (bitIndex5)))) (All VarCurr, ((v3679 VarCurr (bitIndex0)) <=> (v3680 VarCurr)))   ### And 10
% 2.13/2.35  12. ((v3678 T_0) <=> ((v3679 T_0 (bitIndex0)) /\ (v3679 T_0 (bitIndex1)))) (All VarCurr, ((v3679 VarCurr (bitIndex0)) <=> (v3680 VarCurr))) (All VarCurr, (-. (v3684 VarCurr (bitIndex5)))) (v3678 T_0)   ### Equiv 3 11
% 2.13/2.35  13. (All VarCurr, ((v3678 VarCurr) <=> ((v3679 VarCurr (bitIndex0)) /\ (v3679 VarCurr (bitIndex1))))) (v3678 T_0) (All VarCurr, (-. (v3684 VarCurr (bitIndex5)))) (All VarCurr, ((v3679 VarCurr (bitIndex0)) <=> (v3680 VarCurr)))   ### All 12
% 2.13/2.35  14. ((-. (v3677 T_0)) <=> (v3678 T_0)) (All VarCurr, ((v3679 VarCurr (bitIndex0)) <=> (v3680 VarCurr))) (All VarCurr, (-. (v3684 VarCurr (bitIndex5)))) (All VarCurr, ((v3678 VarCurr) <=> ((v3679 VarCurr (bitIndex0)) /\ (v3679 VarCurr (bitIndex1))))) (-. (v3677 T_0))   ### Equiv 2 13
% 2.13/2.35  15. (All VarCurr, ((-. (v3677 VarCurr)) <=> (v3678 VarCurr))) (-. (v3677 T_0)) (All VarCurr, ((v3678 VarCurr) <=> ((v3679 VarCurr (bitIndex0)) /\ (v3679 VarCurr (bitIndex1))))) (All VarCurr, (-. (v3684 VarCurr (bitIndex5)))) (All VarCurr, ((v3679 VarCurr (bitIndex0)) <=> (v3680 VarCurr)))   ### All 14
% 2.13/2.35  16. (-. True)   ### NotTrue
% 2.13/2.35  17. (-. (v3679 T_0 (bitIndex1))) (v3679 T_0 (bitIndex1))   ### Axiom
% 2.13/2.35  18. ((v3679 T_0 (bitIndex1)) <=> True) (-. (v3679 T_0 (bitIndex1)))   ### Equiv 16 17
% 2.13/2.35  19. (All VarCurr, ((v3679 VarCurr (bitIndex1)) <=> True)) (-. (v3679 T_0 (bitIndex1)))   ### All 18
% 2.13/2.35  20. (-. ((v3679 T_0 (bitIndex0)) \/ (v3679 T_0 (bitIndex1)))) (All VarCurr, ((v3679 VarCurr (bitIndex1)) <=> True))   ### NotOr 19
% 2.13/2.35  21. (-. (v3693 T_0)) (All VarCurr, ((v3679 VarCurr (bitIndex1)) <=> True))   ### Definition-Pseudo(v3693) 20
% 2.13/2.35  22. (-. ((v3677 T_0) /\ (v3693 T_0))) (All VarCurr, ((v3679 VarCurr (bitIndex1)) <=> True)) (All VarCurr, ((v3679 VarCurr (bitIndex0)) <=> (v3680 VarCurr))) (All VarCurr, (-. (v3684 VarCurr (bitIndex5)))) (All VarCurr, ((v3678 VarCurr) <=> ((v3679 VarCurr (bitIndex0)) /\ (v3679 VarCurr (bitIndex1))))) (All VarCurr, ((-. (v3677 VarCurr)) <=> (v3678 VarCurr)))   ### NotAnd 15 21
% 2.13/2.35  23. (-. (v3675 T_0)) (v3675 T_0)   ### Axiom
% 2.13/2.35  24. ((v3675 T_0) <=> ((v3677 T_0) /\ (v3693 T_0))) (-. (v3675 T_0)) (All VarCurr, ((-. (v3677 VarCurr)) <=> (v3678 VarCurr))) (All VarCurr, ((v3678 VarCurr) <=> ((v3679 VarCurr (bitIndex0)) /\ (v3679 VarCurr (bitIndex1))))) (All VarCurr, (-. (v3684 VarCurr (bitIndex5)))) (All VarCurr, ((v3679 VarCurr (bitIndex0)) <=> (v3680 VarCurr))) (All VarCurr, ((v3679 VarCurr (bitIndex1)) <=> True))   ### Equiv 22 23
% 2.13/2.35  25. (All VarCurr, ((v3675 VarCurr) <=> ((v3677 VarCurr) /\ (v3693 VarCurr)))) (All VarCurr, ((v3679 VarCurr (bitIndex1)) <=> True)) (All VarCurr, ((v3679 VarCurr (bitIndex0)) <=> (v3680 VarCurr))) (All VarCurr, (-. (v3684 VarCurr (bitIndex5)))) (All VarCurr, ((v3678 VarCurr) <=> ((v3679 VarCurr (bitIndex0)) /\ (v3679 VarCurr (bitIndex1))))) (All VarCurr, ((-. (v3677 VarCurr)) <=> (v3678 VarCurr))) (-. (v3675 T_0))   ### All 24
% 2.13/2.35  26. (-. (v4 T_0)) (v4 T_0)   ### Axiom
% 2.13/2.35  27. (-. (-. (v4 T_0))) (-. (v4 T_0))   ### NotNot 26
% 2.13/2.35  28. (-. (v3674 T_0)) (-. (v4 T_0))   ### Definition-Pseudo(v3674) 27
% 2.13/2.35  29. ((-. (v3674 T_0)) <=> (v3675 T_0)) (-. (v4 T_0)) (All VarCurr, ((-. (v3677 VarCurr)) <=> (v3678 VarCurr))) (All VarCurr, ((v3678 VarCurr) <=> ((v3679 VarCurr (bitIndex0)) /\ (v3679 VarCurr (bitIndex1))))) (All VarCurr, (-. (v3684 VarCurr (bitIndex5)))) (All VarCurr, ((v3679 VarCurr (bitIndex0)) <=> (v3680 VarCurr))) (All VarCurr, ((v3679 VarCurr (bitIndex1)) <=> True)) (All VarCurr, ((v3675 VarCurr) <=> ((v3677 VarCurr) /\ (v3693 VarCurr))))   ### Equiv 25 28
% 2.13/2.35  30. (All VarCurr, ((-. (v3674 VarCurr)) <=> (v3675 VarCurr))) (All VarCurr, ((v3675 VarCurr) <=> ((v3677 VarCurr) /\ (v3693 VarCurr)))) (All VarCurr, ((v3679 VarCurr (bitIndex1)) <=> True)) (All VarCurr, ((v3679 VarCurr (bitIndex0)) <=> (v3680 VarCurr))) (All VarCurr, (-. (v3684 VarCurr (bitIndex5)))) (All VarCurr, ((v3678 VarCurr) <=> ((v3679 VarCurr (bitIndex0)) /\ (v3679 VarCurr (bitIndex1))))) (All VarCurr, ((-. (v3677 VarCurr)) <=> (v3678 VarCurr))) (-. (v4 T_0))   ### All 29
% 2.13/2.35  31. (-. ((reachableState T_0) => (v4 T_0))) (All VarCurr, ((-. (v3677 VarCurr)) <=> (v3678 VarCurr))) (All VarCurr, ((v3678 VarCurr) <=> ((v3679 VarCurr (bitIndex0)) /\ (v3679 VarCurr (bitIndex1))))) (All VarCurr, (-. (v3684 VarCurr (bitIndex5)))) (All VarCurr, ((v3679 VarCurr (bitIndex0)) <=> (v3680 VarCurr))) (All VarCurr, ((v3679 VarCurr (bitIndex1)) <=> True)) (All VarCurr, ((v3675 VarCurr) <=> ((v3677 VarCurr) /\ (v3693 VarCurr)))) (All VarCurr, ((-. (v3674 VarCurr)) <=> (v3675 VarCurr)))   ### NotImply 30
% 2.13/2.35  32. (-. (All VarCurr, ((reachableState VarCurr) => (v4 VarCurr)))) (All VarCurr, ((-. (v3674 VarCurr)) <=> (v3675 VarCurr))) (All VarCurr, ((v3675 VarCurr) <=> ((v3677 VarCurr) /\ (v3693 VarCurr)))) (All VarCurr, ((v3679 VarCurr (bitIndex1)) <=> True)) (All VarCurr, ((v3679 VarCurr (bitIndex0)) <=> (v3680 VarCurr))) (All VarCurr, (-. (v3684 VarCurr (bitIndex5)))) (All VarCurr, ((v3678 VarCurr) <=> ((v3679 VarCurr (bitIndex0)) /\ (v3679 VarCurr (bitIndex1))))) (All VarCurr, ((-. (v3677 VarCurr)) <=> (v3678 VarCurr)))   ### NotAllEx 31
% 2.13/2.35  % SZS output end Proof
% 2.13/2.35  (* END-PROOF *)
%------------------------------------------------------------------------------