TSTP Solution File: HWV089+1 by CSE---1.6
View Problem
- Process Solution
%------------------------------------------------------------------------------
% File : CSE---1.6
% Problem : HWV089+1 : TPTP v8.1.2. Released v6.1.0.
% Transfm : none
% Format : tptp:raw
% Command : java -jar /export/starexec/sandbox2/solver/bin/mcs_scs.jar %s %d
% Computer : n017.cluster.edu
% Model : x86_64 x86_64
% CPU : Intel(R) Xeon(R) CPU E5-2620 v4 2.10GHz
% Memory : 8042.1875MB
% OS : Linux 3.10.0-693.el7.x86_64
% CPULimit : 300s
% WCLimit : 300s
% DateTime : Thu Aug 31 01:59:17 EDT 2023
% Result : Theorem 32.24s 32.01s
% Output : CNFRefutation 32.37s
% Verified :
% SZS Type : -
% Comments :
%------------------------------------------------------------------------------
%----WARNING: Could not form TPTP format derivation
%------------------------------------------------------------------------------
%----ORIGINAL SYSTEM OUTPUT
% 0.06/0.12 % Problem : HWV089+1 : TPTP v8.1.2. Released v6.1.0.
% 0.12/0.13 % Command : java -jar /export/starexec/sandbox2/solver/bin/mcs_scs.jar %s %d
% 0.13/0.34 % Computer : n017.cluster.edu
% 0.13/0.34 % Model : x86_64 x86_64
% 0.13/0.34 % CPU : Intel(R) Xeon(R) CPU E5-2620 v4 @ 2.10GHz
% 0.13/0.34 % Memory : 8042.1875MB
% 0.13/0.34 % OS : Linux 3.10.0-693.el7.x86_64
% 0.13/0.34 % CPULimit : 300
% 0.13/0.34 % WCLimit : 300
% 0.13/0.34 % DateTime : Tue Aug 29 13:41:28 EDT 2023
% 0.13/0.34 % CPUTime :
% 0.20/0.55 start to proof:theBenchmark
% 31.77/31.85 %-------------------------------------------
% 31.77/31.85 % File :CSE---1.6
% 31.77/31.85 % Problem :theBenchmark
% 31.77/31.85 % Transform :cnf
% 31.77/31.85 % Format :tptp:raw
% 31.77/31.85 % Command :java -jar mcs_scs.jar %d %s
% 31.77/31.85
% 31.77/31.85 % Result :Theorem 28.140000s
% 31.77/31.85 % Output :CNFRefutation 28.140000s
% 31.77/31.85 %-------------------------------------------
% 31.77/31.85 %------------------------------------------------------------------------------
% 31.77/31.85 % File : HWV089+1 : TPTP v8.1.2. Released v6.1.0.
% 31.77/31.85 % Domain : Hardware Verification
% 31.77/31.85 % Problem : dmu_dmc property 4 cone of influence 5_b20
% 31.77/31.85 % Version : Especial.
% 31.77/31.85 % English : Verification of a property of the SPARCT2 RTL hardware design.
% 31.77/31.85
% 31.77/31.85 % Refs : [Kha14] Khasidashvili (2014), Email to Geoff Sutcliffe
% 31.77/31.85 % Source : [Kha14]
% 31.77/31.85 % Names : dmu_dmc_prop4_cone5_b20 [Kha14]
% 31.77/31.85
% 31.77/31.85 % Status : Theorem
% 31.77/31.85 % Rating : 0.00 v7.0.0, 0.25 v6.4.0, 0.33 v6.3.0, 0.25 v6.2.0, 0.00 v6.1.0
% 31.77/31.85 % Syntax : Number of formulae : 6279 ( 989 unt; 0 def)
% 31.77/31.85 % Number of atoms : 17160 ( 671 equ)
% 31.77/31.85 % Maximal formula atoms : 78 ( 2 avg)
% 31.77/31.85 % Number of connectives : 12064 (1183 ~;1119 |;2006 &)
% 31.77/31.85 % (6511 <=>;1244 =>; 0 <=; 1 <~>)
% 31.77/31.85 % Maximal formula depth : 70 ( 4 avg)
% 31.77/31.85 % Maximal term depth : 1 ( 1 avg)
% 31.77/31.85 % Number of predicates : 2562 (2559 usr; 2 prp; 0-3 aty)
% 31.77/31.85 % Number of functors : 188 ( 188 usr; 188 con; 0-0 aty)
% 31.77/31.85 % Number of variables : 6046 (6046 !; 0 ?)
% 31.77/31.85 % SPC : FOF_THM_EPR_SEQ
% 31.77/31.85
% 31.77/31.85 % Comments : Copyright 2013 Moshe Emmer and Zurab Khasidashvili
% 31.77/31.85 % Licensed under the Apache License, Version 2.0 (the "License");
% 31.77/31.85 % you may not use this file except in compliance with the License.
% 31.77/31.85 % You may obtain a copy of the License at
% 31.77/31.85 % http://www.apache.org/licenses/LICENSE-2.0
% 31.77/31.85 % Unless required by applicable law or agreed to in writing,
% 31.77/31.85 % software distributed under the License is distributed on an "AS
% 31.77/31.85 % IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either
% 31.77/31.85 % express or implied. See the License for the specific language
% 31.77/31.85 % governing permissions and limitations under the License.
% 31.77/31.85 %------------------------------------------------------------------------------
% 31.77/31.85 fof(pathAxiom_8,axiom,
% 31.77/31.85 nextState(constB8,constB9) ).
% 31.77/31.85
% 31.77/31.85 fof(pathAxiom_7,axiom,
% 31.77/31.85 nextState(constB7,constB8) ).
% 31.77/31.85
% 31.77/31.85 fof(pathAxiom_6,axiom,
% 31.77/31.85 nextState(constB6,constB7) ).
% 31.77/31.85
% 31.77/31.85 fof(pathAxiom_5,axiom,
% 31.77/31.85 nextState(constB5,constB6) ).
% 31.77/31.85
% 31.77/31.85 fof(pathAxiom_4,axiom,
% 31.77/31.85 nextState(constB4,constB5) ).
% 31.77/31.85
% 31.77/31.85 fof(pathAxiom_3,axiom,
% 31.77/31.85 nextState(constB3,constB4) ).
% 31.77/31.85
% 31.77/31.85 fof(pathAxiom_2,axiom,
% 31.77/31.85 nextState(constB2,constB3) ).
% 31.77/31.85
% 31.77/31.85 fof(pathAxiom_1,axiom,
% 31.77/31.85 nextState(constB1,constB2) ).
% 31.77/31.85
% 31.77/31.85 fof(pathAxiom,axiom,
% 31.77/31.85 nextState(constB0,constB1) ).
% 31.77/31.85
% 31.77/31.85 fof(reachableStateAxiom_22,axiom,
% 31.77/31.85 ! [VarNext,VarCurr] :
% 31.77/31.85 ( nextState(VarCurr,VarNext)
% 31.77/31.86 => ( reachableState(VarCurr)
% 31.77/31.86 & reachableState(VarNext) ) ) ).
% 31.77/31.86
% 31.77/31.86 fof(reachableStateAxiom_21,axiom,
% 31.77/31.86 ! [VarState] :
% 31.77/31.86 ( reachableState(VarState)
% 31.77/31.86 => ( constB0 = VarState
% 31.77/31.86 | constB1 = VarState
% 31.77/31.86 | constB2 = VarState
% 31.77/31.86 | constB3 = VarState
% 31.77/31.86 | constB4 = VarState
% 31.77/31.86 | constB5 = VarState
% 31.77/31.86 | constB6 = VarState
% 31.77/31.86 | constB7 = VarState
% 31.77/31.86 | constB8 = VarState
% 31.77/31.86 | constB9 = VarState
% 31.77/31.86 | constB10 = VarState
% 31.77/31.86 | constB11 = VarState
% 31.77/31.86 | constB12 = VarState
% 31.77/31.86 | constB13 = VarState
% 31.77/31.86 | constB14 = VarState
% 31.77/31.86 | constB15 = VarState
% 31.77/31.86 | constB16 = VarState
% 31.77/31.86 | constB17 = VarState
% 31.77/31.86 | constB18 = VarState
% 31.77/31.86 | constB19 = VarState
% 31.77/31.86 | constB20 = VarState ) ) ).
% 31.77/31.86
% 31.77/31.86 fof(reachableStateAxiom_20,axiom,
% 31.77/31.86 reachableState(constB20) ).
% 31.77/31.86
% 31.77/31.86 fof(reachableStateAxiom_19,axiom,
% 31.77/31.86 reachableState(constB19) ).
% 31.77/31.86
% 31.77/31.86 fof(reachableStateAxiom_18,axiom,
% 31.77/31.86 reachableState(constB18) ).
% 31.77/31.86
% 31.77/31.86 fof(reachableStateAxiom_17,axiom,
% 31.77/31.86 reachableState(constB17) ).
% 31.77/31.86
% 31.77/31.86 fof(reachableStateAxiom_16,axiom,
% 31.77/31.86 reachableState(constB16) ).
% 31.77/31.86
% 31.77/31.86 fof(reachableStateAxiom_15,axiom,
% 31.77/31.86 reachableState(constB15) ).
% 31.77/31.86
% 31.77/31.86 fof(reachableStateAxiom_14,axiom,
% 31.77/31.86 reachableState(constB14) ).
% 31.77/31.86
% 31.77/31.86 fof(reachableStateAxiom_13,axiom,
% 31.77/31.86 reachableState(constB13) ).
% 31.77/31.86
% 31.77/31.86 fof(reachableStateAxiom_12,axiom,
% 31.77/31.86 reachableState(constB12) ).
% 31.77/31.86
% 31.77/31.86 fof(reachableStateAxiom_11,axiom,
% 31.77/31.86 reachableState(constB11) ).
% 31.77/31.86
% 31.77/31.86 fof(reachableStateAxiom_10,axiom,
% 31.77/31.86 reachableState(constB10) ).
% 31.77/31.86
% 31.77/31.86 fof(reachableStateAxiom_9,axiom,
% 31.77/31.86 reachableState(constB9) ).
% 31.77/31.86
% 31.77/31.86 fof(reachableStateAxiom_8,axiom,
% 31.77/31.86 reachableState(constB8) ).
% 31.77/31.86
% 31.77/31.86 fof(reachableStateAxiom_7,axiom,
% 31.77/31.86 reachableState(constB7) ).
% 31.77/31.86
% 31.77/31.86 fof(reachableStateAxiom_6,axiom,
% 31.77/31.86 reachableState(constB6) ).
% 31.77/31.86
% 31.77/31.86 fof(reachableStateAxiom_5,axiom,
% 31.77/31.86 reachableState(constB5) ).
% 31.77/31.86
% 31.77/31.86 fof(reachableStateAxiom_4,axiom,
% 31.77/31.86 reachableState(constB4) ).
% 31.77/31.86
% 31.77/31.86 fof(reachableStateAxiom_3,axiom,
% 31.77/31.86 reachableState(constB3) ).
% 31.77/31.86
% 31.77/31.86 fof(reachableStateAxiom_2,axiom,
% 31.77/31.86 reachableState(constB2) ).
% 31.77/31.86
% 31.77/31.86 fof(reachableStateAxiom_1,axiom,
% 31.77/31.86 reachableState(constB1) ).
% 31.77/31.86
% 31.77/31.86 fof(reachableStateAxiom,axiom,
% 31.77/31.86 reachableState(constB0) ).
% 31.77/31.86
% 31.77/31.86 fof(clock_toggling,axiom,
% 31.77/31.86 ! [VarNext,VarCurr] :
% 31.77/31.86 ( nextState(VarCurr,VarNext)
% 31.77/31.86 => ( v1(VarCurr)
% 31.77/31.86 <=> ~ v1(VarNext) ) ) ).
% 31.77/31.86
% 31.77/31.86 fof(clock_pattern,axiom,
% 31.77/31.86 ~ v1(constB0) ).
% 31.77/31.86
% 31.77/31.86 fof(transient_address_definition_83,axiom,
% 31.77/31.86 ! [B] :
% 31.77/31.86 ( addressVal(v1019_range_3_to_0_address_term_bound_20,B)
% 31.77/31.86 <=> v1019(constB20,B) ) ).
% 31.77/31.86
% 31.77/31.86 fof(is_address_99,axiom,
% 31.77/31.86 address(v1019_range_3_to_0_address_term_bound_20) ).
% 31.77/31.86
% 31.77/31.86 fof(address_association_83,axiom,
% 31.77/31.86 v1019_range_3_to_0_address_association(constB20,v1019_range_3_to_0_address_term_bound_20) ).
% 31.77/31.86
% 31.77/31.86 fof(transient_address_definition_82,axiom,
% 31.77/31.86 ! [B] :
% 31.77/31.86 ( addressVal(v1019_range_3_to_0_address_term_bound_19,B)
% 31.77/31.86 <=> v1019(constB19,B) ) ).
% 31.77/31.86
% 31.77/31.86 fof(is_address_98,axiom,
% 31.77/31.86 address(v1019_range_3_to_0_address_term_bound_19) ).
% 31.77/31.86
% 31.77/31.86 fof(address_association_82,axiom,
% 31.77/31.86 v1019_range_3_to_0_address_association(constB19,v1019_range_3_to_0_address_term_bound_19) ).
% 31.77/31.86
% 31.77/31.86 fof(transient_address_definition_81,axiom,
% 31.77/31.86 ! [B] :
% 31.77/31.86 ( addressVal(v1019_range_3_to_0_address_term_bound_18,B)
% 31.77/31.86 <=> v1019(constB18,B) ) ).
% 31.77/31.86
% 31.77/31.86 fof(is_address_97,axiom,
% 31.77/31.86 address(v1019_range_3_to_0_address_term_bound_18) ).
% 31.77/31.86
% 31.77/31.86 fof(address_association_81,axiom,
% 31.77/31.86 v1019_range_3_to_0_address_association(constB18,v1019_range_3_to_0_address_term_bound_18) ).
% 31.77/31.86
% 31.77/31.86 fof(transient_address_definition_80,axiom,
% 31.77/31.86 ! [B] :
% 31.77/31.86 ( addressVal(v1019_range_3_to_0_address_term_bound_17,B)
% 31.77/31.86 <=> v1019(constB17,B) ) ).
% 31.77/31.86
% 31.77/31.86 fof(is_address_96,axiom,
% 31.77/31.86 address(v1019_range_3_to_0_address_term_bound_17) ).
% 31.77/31.86
% 31.77/31.86 fof(address_association_80,axiom,
% 31.77/31.86 v1019_range_3_to_0_address_association(constB17,v1019_range_3_to_0_address_term_bound_17) ).
% 31.77/31.86
% 31.77/31.86 fof(transient_address_definition_79,axiom,
% 31.77/31.86 ! [B] :
% 31.77/31.86 ( addressVal(v1019_range_3_to_0_address_term_bound_16,B)
% 31.77/31.86 <=> v1019(constB16,B) ) ).
% 31.77/31.86
% 31.77/31.86 fof(is_address_95,axiom,
% 31.77/31.86 address(v1019_range_3_to_0_address_term_bound_16) ).
% 31.77/31.86
% 31.77/31.86 fof(address_association_79,axiom,
% 31.77/31.86 v1019_range_3_to_0_address_association(constB16,v1019_range_3_to_0_address_term_bound_16) ).
% 31.77/31.86
% 31.77/31.86 fof(transient_address_definition_78,axiom,
% 31.77/31.86 ! [B] :
% 31.77/31.86 ( addressVal(v1019_range_3_to_0_address_term_bound_15,B)
% 31.77/31.86 <=> v1019(constB15,B) ) ).
% 31.77/31.86
% 31.77/31.86 fof(is_address_94,axiom,
% 31.77/31.86 address(v1019_range_3_to_0_address_term_bound_15) ).
% 31.77/31.86
% 31.77/31.86 fof(address_association_78,axiom,
% 31.77/31.86 v1019_range_3_to_0_address_association(constB15,v1019_range_3_to_0_address_term_bound_15) ).
% 31.77/31.86
% 31.77/31.86 fof(transient_address_definition_77,axiom,
% 31.77/31.86 ! [B] :
% 31.77/31.86 ( addressVal(v1019_range_3_to_0_address_term_bound_14,B)
% 31.77/31.86 <=> v1019(constB14,B) ) ).
% 31.77/31.86
% 31.77/31.86 fof(is_address_93,axiom,
% 31.77/31.86 address(v1019_range_3_to_0_address_term_bound_14) ).
% 31.77/31.86
% 31.77/31.86 fof(address_association_77,axiom,
% 31.77/31.86 v1019_range_3_to_0_address_association(constB14,v1019_range_3_to_0_address_term_bound_14) ).
% 31.77/31.86
% 31.77/31.86 fof(transient_address_definition_76,axiom,
% 31.77/31.86 ! [B] :
% 31.77/31.86 ( addressVal(v1019_range_3_to_0_address_term_bound_13,B)
% 31.77/31.86 <=> v1019(constB13,B) ) ).
% 31.77/31.86
% 31.77/31.86 fof(is_address_92,axiom,
% 31.77/31.86 address(v1019_range_3_to_0_address_term_bound_13) ).
% 31.77/31.86
% 31.77/31.86 fof(address_association_76,axiom,
% 31.77/31.86 v1019_range_3_to_0_address_association(constB13,v1019_range_3_to_0_address_term_bound_13) ).
% 31.77/31.86
% 31.77/31.86 fof(transient_address_definition_75,axiom,
% 31.77/31.86 ! [B] :
% 31.77/31.86 ( addressVal(v1019_range_3_to_0_address_term_bound_12,B)
% 31.77/31.86 <=> v1019(constB12,B) ) ).
% 31.77/31.86
% 31.77/31.86 fof(is_address_91,axiom,
% 31.77/31.86 address(v1019_range_3_to_0_address_term_bound_12) ).
% 31.77/31.86
% 31.77/31.86 fof(address_association_75,axiom,
% 31.77/31.86 v1019_range_3_to_0_address_association(constB12,v1019_range_3_to_0_address_term_bound_12) ).
% 31.77/31.86
% 31.77/31.86 fof(transient_address_definition_74,axiom,
% 31.77/31.86 ! [B] :
% 31.77/31.86 ( addressVal(v1019_range_3_to_0_address_term_bound_11,B)
% 31.77/31.86 <=> v1019(constB11,B) ) ).
% 31.77/31.86
% 31.77/31.86 fof(is_address_90,axiom,
% 31.77/31.86 address(v1019_range_3_to_0_address_term_bound_11) ).
% 31.77/31.86
% 31.77/31.86 fof(address_association_74,axiom,
% 31.77/31.86 v1019_range_3_to_0_address_association(constB11,v1019_range_3_to_0_address_term_bound_11) ).
% 31.77/31.86
% 31.77/31.86 fof(transient_address_definition_73,axiom,
% 31.77/31.86 ! [B] :
% 31.77/31.86 ( addressVal(v1019_range_3_to_0_address_term_bound_10,B)
% 31.77/31.86 <=> v1019(constB10,B) ) ).
% 31.77/31.86
% 31.77/31.86 fof(is_address_89,axiom,
% 31.77/31.86 address(v1019_range_3_to_0_address_term_bound_10) ).
% 31.77/31.86
% 31.77/31.86 fof(address_association_73,axiom,
% 31.77/31.86 v1019_range_3_to_0_address_association(constB10,v1019_range_3_to_0_address_term_bound_10) ).
% 31.77/31.86
% 31.77/31.86 fof(transient_address_definition_72,axiom,
% 31.77/31.86 ! [B] :
% 31.77/31.86 ( addressVal(v1019_range_3_to_0_address_term_bound_9,B)
% 31.77/31.86 <=> v1019(constB9,B) ) ).
% 31.77/31.86
% 31.77/31.86 fof(is_address_88,axiom,
% 31.77/31.86 address(v1019_range_3_to_0_address_term_bound_9) ).
% 31.77/31.86
% 31.77/31.86 fof(address_association_72,axiom,
% 31.77/31.86 v1019_range_3_to_0_address_association(constB9,v1019_range_3_to_0_address_term_bound_9) ).
% 31.77/31.86
% 31.77/31.86 fof(transient_address_definition_71,axiom,
% 31.77/31.86 ! [B] :
% 31.77/31.86 ( addressVal(v1019_range_3_to_0_address_term_bound_8,B)
% 31.77/31.86 <=> v1019(constB8,B) ) ).
% 31.77/31.86
% 31.77/31.86 fof(is_address_87,axiom,
% 31.77/31.86 address(v1019_range_3_to_0_address_term_bound_8) ).
% 31.77/31.86
% 31.77/31.86 fof(address_association_71,axiom,
% 31.77/31.86 v1019_range_3_to_0_address_association(constB8,v1019_range_3_to_0_address_term_bound_8) ).
% 31.77/31.86
% 31.77/31.86 fof(transient_address_definition_70,axiom,
% 31.77/31.86 ! [B] :
% 31.77/31.86 ( addressVal(v1019_range_3_to_0_address_term_bound_7,B)
% 31.77/31.86 <=> v1019(constB7,B) ) ).
% 31.77/31.86
% 31.77/31.86 fof(is_address_86,axiom,
% 31.77/31.86 address(v1019_range_3_to_0_address_term_bound_7) ).
% 31.77/31.86
% 31.77/31.86 fof(address_association_70,axiom,
% 31.77/31.86 v1019_range_3_to_0_address_association(constB7,v1019_range_3_to_0_address_term_bound_7) ).
% 31.77/31.86
% 31.77/31.86 fof(transient_address_definition_69,axiom,
% 31.77/31.86 ! [B] :
% 31.77/31.86 ( addressVal(v1019_range_3_to_0_address_term_bound_6,B)
% 31.77/31.86 <=> v1019(constB6,B) ) ).
% 31.77/31.86
% 31.77/31.86 fof(is_address_85,axiom,
% 31.77/31.86 address(v1019_range_3_to_0_address_term_bound_6) ).
% 31.77/31.86
% 31.77/31.86 fof(address_association_69,axiom,
% 31.77/31.86 v1019_range_3_to_0_address_association(constB6,v1019_range_3_to_0_address_term_bound_6) ).
% 31.77/31.86
% 31.77/31.86 fof(transient_address_definition_68,axiom,
% 31.77/31.86 ! [B] :
% 31.77/31.86 ( addressVal(v1019_range_3_to_0_address_term_bound_5,B)
% 31.77/31.86 <=> v1019(constB5,B) ) ).
% 31.77/31.86
% 31.77/31.86 fof(is_address_84,axiom,
% 31.77/31.86 address(v1019_range_3_to_0_address_term_bound_5) ).
% 31.77/31.86
% 31.77/31.86 fof(address_association_68,axiom,
% 31.77/31.86 v1019_range_3_to_0_address_association(constB5,v1019_range_3_to_0_address_term_bound_5) ).
% 31.77/31.86
% 31.77/31.86 fof(transient_address_definition_67,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v1019_range_3_to_0_address_term_bound_4,B)
% 31.77/31.87 <=> v1019(constB4,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_83,axiom,
% 31.77/31.87 address(v1019_range_3_to_0_address_term_bound_4) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_67,axiom,
% 31.77/31.87 v1019_range_3_to_0_address_association(constB4,v1019_range_3_to_0_address_term_bound_4) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_66,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v1019_range_3_to_0_address_term_bound_3,B)
% 31.77/31.87 <=> v1019(constB3,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_82,axiom,
% 31.77/31.87 address(v1019_range_3_to_0_address_term_bound_3) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_66,axiom,
% 31.77/31.87 v1019_range_3_to_0_address_association(constB3,v1019_range_3_to_0_address_term_bound_3) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_65,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v1019_range_3_to_0_address_term_bound_2,B)
% 31.77/31.87 <=> v1019(constB2,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_81,axiom,
% 31.77/31.87 address(v1019_range_3_to_0_address_term_bound_2) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_65,axiom,
% 31.77/31.87 v1019_range_3_to_0_address_association(constB2,v1019_range_3_to_0_address_term_bound_2) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_64,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v1019_range_3_to_0_address_term_bound_1,B)
% 31.77/31.87 <=> v1019(constB1,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_80,axiom,
% 31.77/31.87 address(v1019_range_3_to_0_address_term_bound_1) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_64,axiom,
% 31.77/31.87 v1019_range_3_to_0_address_association(constB1,v1019_range_3_to_0_address_term_bound_1) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_63,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v1019_range_3_to_0_address_term_bound_0,B)
% 31.77/31.87 <=> v1019(constB0,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_79,axiom,
% 31.77/31.87 address(v1019_range_3_to_0_address_term_bound_0) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_63,axiom,
% 31.77/31.87 v1019_range_3_to_0_address_association(constB0,v1019_range_3_to_0_address_term_bound_0) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_62,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v953_range_3_to_0_address_term_bound_20,B)
% 31.77/31.87 <=> v953(constB20,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_78,axiom,
% 31.77/31.87 address(v953_range_3_to_0_address_term_bound_20) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_62,axiom,
% 31.77/31.87 v953_range_3_to_0_address_association(constB20,v953_range_3_to_0_address_term_bound_20) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_61,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v953_range_3_to_0_address_term_bound_19,B)
% 31.77/31.87 <=> v953(constB19,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_77,axiom,
% 31.77/31.87 address(v953_range_3_to_0_address_term_bound_19) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_61,axiom,
% 31.77/31.87 v953_range_3_to_0_address_association(constB19,v953_range_3_to_0_address_term_bound_19) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_60,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v953_range_3_to_0_address_term_bound_18,B)
% 31.77/31.87 <=> v953(constB18,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_76,axiom,
% 31.77/31.87 address(v953_range_3_to_0_address_term_bound_18) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_60,axiom,
% 31.77/31.87 v953_range_3_to_0_address_association(constB18,v953_range_3_to_0_address_term_bound_18) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_59,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v953_range_3_to_0_address_term_bound_17,B)
% 31.77/31.87 <=> v953(constB17,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_75,axiom,
% 31.77/31.87 address(v953_range_3_to_0_address_term_bound_17) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_59,axiom,
% 31.77/31.87 v953_range_3_to_0_address_association(constB17,v953_range_3_to_0_address_term_bound_17) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_58,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v953_range_3_to_0_address_term_bound_16,B)
% 31.77/31.87 <=> v953(constB16,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_74,axiom,
% 31.77/31.87 address(v953_range_3_to_0_address_term_bound_16) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_58,axiom,
% 31.77/31.87 v953_range_3_to_0_address_association(constB16,v953_range_3_to_0_address_term_bound_16) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_57,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v953_range_3_to_0_address_term_bound_15,B)
% 31.77/31.87 <=> v953(constB15,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_73,axiom,
% 31.77/31.87 address(v953_range_3_to_0_address_term_bound_15) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_57,axiom,
% 31.77/31.87 v953_range_3_to_0_address_association(constB15,v953_range_3_to_0_address_term_bound_15) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_56,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v953_range_3_to_0_address_term_bound_14,B)
% 31.77/31.87 <=> v953(constB14,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_72,axiom,
% 31.77/31.87 address(v953_range_3_to_0_address_term_bound_14) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_56,axiom,
% 31.77/31.87 v953_range_3_to_0_address_association(constB14,v953_range_3_to_0_address_term_bound_14) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_55,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v953_range_3_to_0_address_term_bound_13,B)
% 31.77/31.87 <=> v953(constB13,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_71,axiom,
% 31.77/31.87 address(v953_range_3_to_0_address_term_bound_13) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_55,axiom,
% 31.77/31.87 v953_range_3_to_0_address_association(constB13,v953_range_3_to_0_address_term_bound_13) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_54,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v953_range_3_to_0_address_term_bound_12,B)
% 31.77/31.87 <=> v953(constB12,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_70,axiom,
% 31.77/31.87 address(v953_range_3_to_0_address_term_bound_12) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_54,axiom,
% 31.77/31.87 v953_range_3_to_0_address_association(constB12,v953_range_3_to_0_address_term_bound_12) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_53,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v953_range_3_to_0_address_term_bound_11,B)
% 31.77/31.87 <=> v953(constB11,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_69,axiom,
% 31.77/31.87 address(v953_range_3_to_0_address_term_bound_11) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_53,axiom,
% 31.77/31.87 v953_range_3_to_0_address_association(constB11,v953_range_3_to_0_address_term_bound_11) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_52,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v953_range_3_to_0_address_term_bound_10,B)
% 31.77/31.87 <=> v953(constB10,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_68,axiom,
% 31.77/31.87 address(v953_range_3_to_0_address_term_bound_10) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_52,axiom,
% 31.77/31.87 v953_range_3_to_0_address_association(constB10,v953_range_3_to_0_address_term_bound_10) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_51,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v953_range_3_to_0_address_term_bound_9,B)
% 31.77/31.87 <=> v953(constB9,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_67,axiom,
% 31.77/31.87 address(v953_range_3_to_0_address_term_bound_9) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_51,axiom,
% 31.77/31.87 v953_range_3_to_0_address_association(constB9,v953_range_3_to_0_address_term_bound_9) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_50,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v953_range_3_to_0_address_term_bound_8,B)
% 31.77/31.87 <=> v953(constB8,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_66,axiom,
% 31.77/31.87 address(v953_range_3_to_0_address_term_bound_8) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_50,axiom,
% 31.77/31.87 v953_range_3_to_0_address_association(constB8,v953_range_3_to_0_address_term_bound_8) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_49,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v953_range_3_to_0_address_term_bound_7,B)
% 31.77/31.87 <=> v953(constB7,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_65,axiom,
% 31.77/31.87 address(v953_range_3_to_0_address_term_bound_7) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_49,axiom,
% 31.77/31.87 v953_range_3_to_0_address_association(constB7,v953_range_3_to_0_address_term_bound_7) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_48,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v953_range_3_to_0_address_term_bound_6,B)
% 31.77/31.87 <=> v953(constB6,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_64,axiom,
% 31.77/31.87 address(v953_range_3_to_0_address_term_bound_6) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_48,axiom,
% 31.77/31.87 v953_range_3_to_0_address_association(constB6,v953_range_3_to_0_address_term_bound_6) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_47,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v953_range_3_to_0_address_term_bound_5,B)
% 31.77/31.87 <=> v953(constB5,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_63,axiom,
% 31.77/31.87 address(v953_range_3_to_0_address_term_bound_5) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_47,axiom,
% 31.77/31.87 v953_range_3_to_0_address_association(constB5,v953_range_3_to_0_address_term_bound_5) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_46,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v953_range_3_to_0_address_term_bound_4,B)
% 31.77/31.87 <=> v953(constB4,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_62,axiom,
% 31.77/31.87 address(v953_range_3_to_0_address_term_bound_4) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_46,axiom,
% 31.77/31.87 v953_range_3_to_0_address_association(constB4,v953_range_3_to_0_address_term_bound_4) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_45,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v953_range_3_to_0_address_term_bound_3,B)
% 31.77/31.87 <=> v953(constB3,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_61,axiom,
% 31.77/31.87 address(v953_range_3_to_0_address_term_bound_3) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_45,axiom,
% 31.77/31.87 v953_range_3_to_0_address_association(constB3,v953_range_3_to_0_address_term_bound_3) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_44,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v953_range_3_to_0_address_term_bound_2,B)
% 31.77/31.87 <=> v953(constB2,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_60,axiom,
% 31.77/31.87 address(v953_range_3_to_0_address_term_bound_2) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_44,axiom,
% 31.77/31.87 v953_range_3_to_0_address_association(constB2,v953_range_3_to_0_address_term_bound_2) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_43,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v953_range_3_to_0_address_term_bound_1,B)
% 31.77/31.87 <=> v953(constB1,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_59,axiom,
% 31.77/31.87 address(v953_range_3_to_0_address_term_bound_1) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_43,axiom,
% 31.77/31.87 v953_range_3_to_0_address_association(constB1,v953_range_3_to_0_address_term_bound_1) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_42,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v953_range_3_to_0_address_term_bound_0,B)
% 31.77/31.87 <=> v953(constB0,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_58,axiom,
% 31.77/31.87 address(v953_range_3_to_0_address_term_bound_0) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_42,axiom,
% 31.77/31.87 v953_range_3_to_0_address_association(constB0,v953_range_3_to_0_address_term_bound_0) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_41,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v869_range_3_to_0_address_term_bound_20,B)
% 31.77/31.87 <=> v869(constB20,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_57,axiom,
% 31.77/31.87 address(v869_range_3_to_0_address_term_bound_20) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_41,axiom,
% 31.77/31.87 v869_range_3_to_0_address_association(constB20,v869_range_3_to_0_address_term_bound_20) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_40,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v869_range_3_to_0_address_term_bound_19,B)
% 31.77/31.87 <=> v869(constB19,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_56,axiom,
% 31.77/31.87 address(v869_range_3_to_0_address_term_bound_19) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_40,axiom,
% 31.77/31.87 v869_range_3_to_0_address_association(constB19,v869_range_3_to_0_address_term_bound_19) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_39,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v869_range_3_to_0_address_term_bound_18,B)
% 31.77/31.87 <=> v869(constB18,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_55,axiom,
% 31.77/31.87 address(v869_range_3_to_0_address_term_bound_18) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_39,axiom,
% 31.77/31.87 v869_range_3_to_0_address_association(constB18,v869_range_3_to_0_address_term_bound_18) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_38,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v869_range_3_to_0_address_term_bound_17,B)
% 31.77/31.87 <=> v869(constB17,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_54,axiom,
% 31.77/31.87 address(v869_range_3_to_0_address_term_bound_17) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_38,axiom,
% 31.77/31.87 v869_range_3_to_0_address_association(constB17,v869_range_3_to_0_address_term_bound_17) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_37,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v869_range_3_to_0_address_term_bound_16,B)
% 31.77/31.87 <=> v869(constB16,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_53,axiom,
% 31.77/31.87 address(v869_range_3_to_0_address_term_bound_16) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_37,axiom,
% 31.77/31.87 v869_range_3_to_0_address_association(constB16,v869_range_3_to_0_address_term_bound_16) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_36,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v869_range_3_to_0_address_term_bound_15,B)
% 31.77/31.87 <=> v869(constB15,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_52,axiom,
% 31.77/31.87 address(v869_range_3_to_0_address_term_bound_15) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_36,axiom,
% 31.77/31.87 v869_range_3_to_0_address_association(constB15,v869_range_3_to_0_address_term_bound_15) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_35,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v869_range_3_to_0_address_term_bound_14,B)
% 31.77/31.87 <=> v869(constB14,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_51,axiom,
% 31.77/31.87 address(v869_range_3_to_0_address_term_bound_14) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_35,axiom,
% 31.77/31.87 v869_range_3_to_0_address_association(constB14,v869_range_3_to_0_address_term_bound_14) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_34,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v869_range_3_to_0_address_term_bound_13,B)
% 31.77/31.87 <=> v869(constB13,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_50,axiom,
% 31.77/31.87 address(v869_range_3_to_0_address_term_bound_13) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_34,axiom,
% 31.77/31.87 v869_range_3_to_0_address_association(constB13,v869_range_3_to_0_address_term_bound_13) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_33,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v869_range_3_to_0_address_term_bound_12,B)
% 31.77/31.87 <=> v869(constB12,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_49,axiom,
% 31.77/31.87 address(v869_range_3_to_0_address_term_bound_12) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_33,axiom,
% 31.77/31.87 v869_range_3_to_0_address_association(constB12,v869_range_3_to_0_address_term_bound_12) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_32,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v869_range_3_to_0_address_term_bound_11,B)
% 31.77/31.87 <=> v869(constB11,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_48,axiom,
% 31.77/31.87 address(v869_range_3_to_0_address_term_bound_11) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_32,axiom,
% 31.77/31.87 v869_range_3_to_0_address_association(constB11,v869_range_3_to_0_address_term_bound_11) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_31,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v869_range_3_to_0_address_term_bound_10,B)
% 31.77/31.87 <=> v869(constB10,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_47,axiom,
% 31.77/31.87 address(v869_range_3_to_0_address_term_bound_10) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_31,axiom,
% 31.77/31.87 v869_range_3_to_0_address_association(constB10,v869_range_3_to_0_address_term_bound_10) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_30,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v869_range_3_to_0_address_term_bound_9,B)
% 31.77/31.87 <=> v869(constB9,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_46,axiom,
% 31.77/31.87 address(v869_range_3_to_0_address_term_bound_9) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_30,axiom,
% 31.77/31.87 v869_range_3_to_0_address_association(constB9,v869_range_3_to_0_address_term_bound_9) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_29,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v869_range_3_to_0_address_term_bound_8,B)
% 31.77/31.87 <=> v869(constB8,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_45,axiom,
% 31.77/31.87 address(v869_range_3_to_0_address_term_bound_8) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_29,axiom,
% 31.77/31.87 v869_range_3_to_0_address_association(constB8,v869_range_3_to_0_address_term_bound_8) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_28,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v869_range_3_to_0_address_term_bound_7,B)
% 31.77/31.87 <=> v869(constB7,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_44,axiom,
% 31.77/31.87 address(v869_range_3_to_0_address_term_bound_7) ).
% 31.77/31.87
% 31.77/31.87 fof(address_association_28,axiom,
% 31.77/31.87 v869_range_3_to_0_address_association(constB7,v869_range_3_to_0_address_term_bound_7) ).
% 31.77/31.87
% 31.77/31.87 fof(transient_address_definition_27,axiom,
% 31.77/31.87 ! [B] :
% 31.77/31.87 ( addressVal(v869_range_3_to_0_address_term_bound_6,B)
% 31.77/31.87 <=> v869(constB6,B) ) ).
% 31.77/31.87
% 31.77/31.87 fof(is_address_43,axiom,
% 31.77/31.88 address(v869_range_3_to_0_address_term_bound_6) ).
% 31.77/31.88
% 31.77/31.88 fof(address_association_27,axiom,
% 31.77/31.88 v869_range_3_to_0_address_association(constB6,v869_range_3_to_0_address_term_bound_6) ).
% 31.77/31.88
% 31.77/31.88 fof(transient_address_definition_26,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(v869_range_3_to_0_address_term_bound_5,B)
% 31.77/31.88 <=> v869(constB5,B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_42,axiom,
% 31.77/31.88 address(v869_range_3_to_0_address_term_bound_5) ).
% 31.77/31.88
% 31.77/31.88 fof(address_association_26,axiom,
% 31.77/31.88 v869_range_3_to_0_address_association(constB5,v869_range_3_to_0_address_term_bound_5) ).
% 31.77/31.88
% 31.77/31.88 fof(transient_address_definition_25,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(v869_range_3_to_0_address_term_bound_4,B)
% 31.77/31.88 <=> v869(constB4,B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_41,axiom,
% 31.77/31.88 address(v869_range_3_to_0_address_term_bound_4) ).
% 31.77/31.88
% 31.77/31.88 fof(address_association_25,axiom,
% 31.77/31.88 v869_range_3_to_0_address_association(constB4,v869_range_3_to_0_address_term_bound_4) ).
% 31.77/31.88
% 31.77/31.88 fof(transient_address_definition_24,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(v869_range_3_to_0_address_term_bound_3,B)
% 31.77/31.88 <=> v869(constB3,B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_40,axiom,
% 31.77/31.88 address(v869_range_3_to_0_address_term_bound_3) ).
% 31.77/31.88
% 31.77/31.88 fof(address_association_24,axiom,
% 31.77/31.88 v869_range_3_to_0_address_association(constB3,v869_range_3_to_0_address_term_bound_3) ).
% 31.77/31.88
% 31.77/31.88 fof(transient_address_definition_23,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(v869_range_3_to_0_address_term_bound_2,B)
% 31.77/31.88 <=> v869(constB2,B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_39,axiom,
% 31.77/31.88 address(v869_range_3_to_0_address_term_bound_2) ).
% 31.77/31.88
% 31.77/31.88 fof(address_association_23,axiom,
% 31.77/31.88 v869_range_3_to_0_address_association(constB2,v869_range_3_to_0_address_term_bound_2) ).
% 31.77/31.88
% 31.77/31.88 fof(transient_address_definition_22,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(v869_range_3_to_0_address_term_bound_1,B)
% 31.77/31.88 <=> v869(constB1,B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_38,axiom,
% 31.77/31.88 address(v869_range_3_to_0_address_term_bound_1) ).
% 31.77/31.88
% 31.77/31.88 fof(address_association_22,axiom,
% 31.77/31.88 v869_range_3_to_0_address_association(constB1,v869_range_3_to_0_address_term_bound_1) ).
% 31.77/31.88
% 31.77/31.88 fof(transient_address_definition_21,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(v869_range_3_to_0_address_term_bound_0,B)
% 31.77/31.88 <=> v869(constB0,B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_37,axiom,
% 31.77/31.88 address(v869_range_3_to_0_address_term_bound_0) ).
% 31.77/31.88
% 31.77/31.88 fof(address_association_21,axiom,
% 31.77/31.88 v869_range_3_to_0_address_association(constB0,v869_range_3_to_0_address_term_bound_0) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_36,axiom,
% 31.77/31.88 address(b1110_address_term) ).
% 31.77/31.88
% 31.77/31.88 fof(constant_address_definition_15,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(b1110_address_term,B)
% 31.77/31.88 <=> b1110(B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_35,axiom,
% 31.77/31.88 address(b1101_address_term) ).
% 31.77/31.88
% 31.77/31.88 fof(constant_address_definition_14,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(b1101_address_term,B)
% 31.77/31.88 <=> b1101(B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_34,axiom,
% 31.77/31.88 address(b1100_address_term) ).
% 31.77/31.88
% 31.77/31.88 fof(constant_address_definition_13,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(b1100_address_term,B)
% 31.77/31.88 <=> b1100(B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_33,axiom,
% 31.77/31.88 address(b1011_address_term) ).
% 31.77/31.88
% 31.77/31.88 fof(constant_address_definition_12,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(b1011_address_term,B)
% 31.77/31.88 <=> b1011(B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_32,axiom,
% 31.77/31.88 address(b1010_address_term) ).
% 31.77/31.88
% 31.77/31.88 fof(constant_address_definition_11,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(b1010_address_term,B)
% 31.77/31.88 <=> b1010(B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_31,axiom,
% 31.77/31.88 address(b1001_address_term) ).
% 31.77/31.88
% 31.77/31.88 fof(constant_address_definition_10,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(b1001_address_term,B)
% 31.77/31.88 <=> b1001(B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_30,axiom,
% 31.77/31.88 address(b1000_address_term) ).
% 31.77/31.88
% 31.77/31.88 fof(constant_address_definition_9,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(b1000_address_term,B)
% 31.77/31.88 <=> b1000(B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_29,axiom,
% 31.77/31.88 address(b0111_address_term) ).
% 31.77/31.88
% 31.77/31.88 fof(constant_address_definition_8,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(b0111_address_term,B)
% 31.77/31.88 <=> b0111(B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_28,axiom,
% 31.77/31.88 address(b0100_address_term) ).
% 31.77/31.88
% 31.77/31.88 fof(constant_address_definition_7,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(b0100_address_term,B)
% 31.77/31.88 <=> b0100(B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_27,axiom,
% 31.77/31.88 address(b0011_address_term) ).
% 31.77/31.88
% 31.77/31.88 fof(constant_address_definition_6,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(b0011_address_term,B)
% 31.77/31.88 <=> b0011(B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_26,axiom,
% 31.77/31.88 address(b0010_address_term) ).
% 31.77/31.88
% 31.77/31.88 fof(constant_address_definition_5,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(b0010_address_term,B)
% 31.77/31.88 <=> b0010(B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_25,axiom,
% 31.77/31.88 address(b1111_address_term) ).
% 31.77/31.88
% 31.77/31.88 fof(constant_address_definition_4,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(b1111_address_term,B)
% 31.77/31.88 <=> b1111(B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(transient_address_definition_20,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(v791_range_3_to_0_address_term_bound_20,B)
% 31.77/31.88 <=> v791(constB20,B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_24,axiom,
% 31.77/31.88 address(v791_range_3_to_0_address_term_bound_20) ).
% 31.77/31.88
% 31.77/31.88 fof(address_association_20,axiom,
% 31.77/31.88 v791_range_3_to_0_address_association(constB20,v791_range_3_to_0_address_term_bound_20) ).
% 31.77/31.88
% 31.77/31.88 fof(transient_address_definition_19,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(v791_range_3_to_0_address_term_bound_19,B)
% 31.77/31.88 <=> v791(constB19,B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_23,axiom,
% 31.77/31.88 address(v791_range_3_to_0_address_term_bound_19) ).
% 31.77/31.88
% 31.77/31.88 fof(address_association_19,axiom,
% 31.77/31.88 v791_range_3_to_0_address_association(constB19,v791_range_3_to_0_address_term_bound_19) ).
% 31.77/31.88
% 31.77/31.88 fof(transient_address_definition_18,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(v791_range_3_to_0_address_term_bound_18,B)
% 31.77/31.88 <=> v791(constB18,B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_22,axiom,
% 31.77/31.88 address(v791_range_3_to_0_address_term_bound_18) ).
% 31.77/31.88
% 31.77/31.88 fof(address_association_18,axiom,
% 31.77/31.88 v791_range_3_to_0_address_association(constB18,v791_range_3_to_0_address_term_bound_18) ).
% 31.77/31.88
% 31.77/31.88 fof(transient_address_definition_17,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(v791_range_3_to_0_address_term_bound_17,B)
% 31.77/31.88 <=> v791(constB17,B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_21,axiom,
% 31.77/31.88 address(v791_range_3_to_0_address_term_bound_17) ).
% 31.77/31.88
% 31.77/31.88 fof(address_association_17,axiom,
% 31.77/31.88 v791_range_3_to_0_address_association(constB17,v791_range_3_to_0_address_term_bound_17) ).
% 31.77/31.88
% 31.77/31.88 fof(transient_address_definition_16,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(v791_range_3_to_0_address_term_bound_16,B)
% 31.77/31.88 <=> v791(constB16,B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_20,axiom,
% 31.77/31.88 address(v791_range_3_to_0_address_term_bound_16) ).
% 31.77/31.88
% 31.77/31.88 fof(address_association_16,axiom,
% 31.77/31.88 v791_range_3_to_0_address_association(constB16,v791_range_3_to_0_address_term_bound_16) ).
% 31.77/31.88
% 31.77/31.88 fof(transient_address_definition_15,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(v791_range_3_to_0_address_term_bound_15,B)
% 31.77/31.88 <=> v791(constB15,B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_19,axiom,
% 31.77/31.88 address(v791_range_3_to_0_address_term_bound_15) ).
% 31.77/31.88
% 31.77/31.88 fof(address_association_15,axiom,
% 31.77/31.88 v791_range_3_to_0_address_association(constB15,v791_range_3_to_0_address_term_bound_15) ).
% 31.77/31.88
% 31.77/31.88 fof(transient_address_definition_14,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(v791_range_3_to_0_address_term_bound_14,B)
% 31.77/31.88 <=> v791(constB14,B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_18,axiom,
% 31.77/31.88 address(v791_range_3_to_0_address_term_bound_14) ).
% 31.77/31.88
% 31.77/31.88 fof(address_association_14,axiom,
% 31.77/31.88 v791_range_3_to_0_address_association(constB14,v791_range_3_to_0_address_term_bound_14) ).
% 31.77/31.88
% 31.77/31.88 fof(transient_address_definition_13,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(v791_range_3_to_0_address_term_bound_13,B)
% 31.77/31.88 <=> v791(constB13,B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_17,axiom,
% 31.77/31.88 address(v791_range_3_to_0_address_term_bound_13) ).
% 31.77/31.88
% 31.77/31.88 fof(address_association_13,axiom,
% 31.77/31.88 v791_range_3_to_0_address_association(constB13,v791_range_3_to_0_address_term_bound_13) ).
% 31.77/31.88
% 31.77/31.88 fof(transient_address_definition_12,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(v791_range_3_to_0_address_term_bound_12,B)
% 31.77/31.88 <=> v791(constB12,B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_16,axiom,
% 31.77/31.88 address(v791_range_3_to_0_address_term_bound_12) ).
% 31.77/31.88
% 31.77/31.88 fof(address_association_12,axiom,
% 31.77/31.88 v791_range_3_to_0_address_association(constB12,v791_range_3_to_0_address_term_bound_12) ).
% 31.77/31.88
% 31.77/31.88 fof(transient_address_definition_11,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(v791_range_3_to_0_address_term_bound_11,B)
% 31.77/31.88 <=> v791(constB11,B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_15,axiom,
% 31.77/31.88 address(v791_range_3_to_0_address_term_bound_11) ).
% 31.77/31.88
% 31.77/31.88 fof(address_association_11,axiom,
% 31.77/31.88 v791_range_3_to_0_address_association(constB11,v791_range_3_to_0_address_term_bound_11) ).
% 31.77/31.88
% 31.77/31.88 fof(transient_address_definition_10,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(v791_range_3_to_0_address_term_bound_10,B)
% 31.77/31.88 <=> v791(constB10,B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_14,axiom,
% 31.77/31.88 address(v791_range_3_to_0_address_term_bound_10) ).
% 31.77/31.88
% 31.77/31.88 fof(address_association_10,axiom,
% 31.77/31.88 v791_range_3_to_0_address_association(constB10,v791_range_3_to_0_address_term_bound_10) ).
% 31.77/31.88
% 31.77/31.88 fof(transient_address_definition_9,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(v791_range_3_to_0_address_term_bound_9,B)
% 31.77/31.88 <=> v791(constB9,B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_13,axiom,
% 31.77/31.88 address(v791_range_3_to_0_address_term_bound_9) ).
% 31.77/31.88
% 31.77/31.88 fof(address_association_9,axiom,
% 31.77/31.88 v791_range_3_to_0_address_association(constB9,v791_range_3_to_0_address_term_bound_9) ).
% 31.77/31.88
% 31.77/31.88 fof(transient_address_definition_8,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(v791_range_3_to_0_address_term_bound_8,B)
% 31.77/31.88 <=> v791(constB8,B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_12,axiom,
% 31.77/31.88 address(v791_range_3_to_0_address_term_bound_8) ).
% 31.77/31.88
% 31.77/31.88 fof(address_association_8,axiom,
% 31.77/31.88 v791_range_3_to_0_address_association(constB8,v791_range_3_to_0_address_term_bound_8) ).
% 31.77/31.88
% 31.77/31.88 fof(transient_address_definition_7,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(v791_range_3_to_0_address_term_bound_7,B)
% 31.77/31.88 <=> v791(constB7,B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_11,axiom,
% 31.77/31.88 address(v791_range_3_to_0_address_term_bound_7) ).
% 31.77/31.88
% 31.77/31.88 fof(address_association_7,axiom,
% 31.77/31.88 v791_range_3_to_0_address_association(constB7,v791_range_3_to_0_address_term_bound_7) ).
% 31.77/31.88
% 31.77/31.88 fof(transient_address_definition_6,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(v791_range_3_to_0_address_term_bound_6,B)
% 31.77/31.88 <=> v791(constB6,B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_10,axiom,
% 31.77/31.88 address(v791_range_3_to_0_address_term_bound_6) ).
% 31.77/31.88
% 31.77/31.88 fof(address_association_6,axiom,
% 31.77/31.88 v791_range_3_to_0_address_association(constB6,v791_range_3_to_0_address_term_bound_6) ).
% 31.77/31.88
% 31.77/31.88 fof(transient_address_definition_5,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(v791_range_3_to_0_address_term_bound_5,B)
% 31.77/31.88 <=> v791(constB5,B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_9,axiom,
% 31.77/31.88 address(v791_range_3_to_0_address_term_bound_5) ).
% 31.77/31.88
% 31.77/31.88 fof(address_association_5,axiom,
% 31.77/31.88 v791_range_3_to_0_address_association(constB5,v791_range_3_to_0_address_term_bound_5) ).
% 31.77/31.88
% 31.77/31.88 fof(transient_address_definition_4,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(v791_range_3_to_0_address_term_bound_4,B)
% 31.77/31.88 <=> v791(constB4,B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_8,axiom,
% 31.77/31.88 address(v791_range_3_to_0_address_term_bound_4) ).
% 31.77/31.88
% 31.77/31.88 fof(address_association_4,axiom,
% 31.77/31.88 v791_range_3_to_0_address_association(constB4,v791_range_3_to_0_address_term_bound_4) ).
% 31.77/31.88
% 31.77/31.88 fof(transient_address_definition_3,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(v791_range_3_to_0_address_term_bound_3,B)
% 31.77/31.88 <=> v791(constB3,B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_7,axiom,
% 31.77/31.88 address(v791_range_3_to_0_address_term_bound_3) ).
% 31.77/31.88
% 31.77/31.88 fof(address_association_3,axiom,
% 31.77/31.88 v791_range_3_to_0_address_association(constB3,v791_range_3_to_0_address_term_bound_3) ).
% 31.77/31.88
% 31.77/31.88 fof(transient_address_definition_2,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(v791_range_3_to_0_address_term_bound_2,B)
% 31.77/31.88 <=> v791(constB2,B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_6,axiom,
% 31.77/31.88 address(v791_range_3_to_0_address_term_bound_2) ).
% 31.77/31.88
% 31.77/31.88 fof(address_association_2,axiom,
% 31.77/31.88 v791_range_3_to_0_address_association(constB2,v791_range_3_to_0_address_term_bound_2) ).
% 31.77/31.88
% 31.77/31.88 fof(transient_address_definition_1,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(v791_range_3_to_0_address_term_bound_1,B)
% 31.77/31.88 <=> v791(constB1,B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_5,axiom,
% 31.77/31.88 address(v791_range_3_to_0_address_term_bound_1) ).
% 31.77/31.88
% 31.77/31.88 fof(address_association_1,axiom,
% 31.77/31.88 v791_range_3_to_0_address_association(constB1,v791_range_3_to_0_address_term_bound_1) ).
% 31.77/31.88
% 31.77/31.88 fof(transient_address_definition,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(v791_range_3_to_0_address_term_bound_0,B)
% 31.77/31.88 <=> v791(constB0,B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_4,axiom,
% 31.77/31.88 address(v791_range_3_to_0_address_term_bound_0) ).
% 31.77/31.88
% 31.77/31.88 fof(address_association,axiom,
% 31.77/31.88 v791_range_3_to_0_address_association(constB0,v791_range_3_to_0_address_term_bound_0) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_3,axiom,
% 31.77/31.88 address(b0101_address_term) ).
% 31.77/31.88
% 31.77/31.88 fof(constant_address_definition_3,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(b0101_address_term,B)
% 31.77/31.88 <=> b0101(B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_2,axiom,
% 31.77/31.88 address(b0001_address_term) ).
% 31.77/31.88
% 31.77/31.88 fof(constant_address_definition_2,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(b0001_address_term,B)
% 31.77/31.88 <=> b0001(B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address_1,axiom,
% 31.77/31.88 address(b0110_address_term) ).
% 31.77/31.88
% 31.77/31.88 fof(constant_address_definition_1,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(b0110_address_term,B)
% 31.77/31.88 <=> b0110(B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(is_address,axiom,
% 31.77/31.88 address(b0000_address_term) ).
% 31.77/31.88
% 31.77/31.88 fof(constant_address_definition,axiom,
% 31.77/31.88 ! [B] :
% 31.77/31.88 ( addressVal(b0000_address_term,B)
% 31.77/31.88 <=> b0000(B) ) ).
% 31.77/31.88
% 31.77/31.88 fof(addressDiff,axiom,
% 31.77/31.88 ! [B,A2,A1] :
% 31.77/31.88 ( ( address(A1)
% 31.77/31.88 & address(A2)
% 31.77/31.88 & addressDiff(A1,A2,B) )
% 31.77/31.88 => ( A1 = A2
% 31.77/31.88 | ( addressVal(A1,B)
% 31.77/31.88 <=> ~ addressVal(A2,B) ) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(addressDomain,axiom,
% 31.77/31.88 ! [A1,A2] :
% 31.77/31.88 ( addressDiff(A1,A2,bitIndex0)
% 31.77/31.88 | addressDiff(A1,A2,bitIndex1)
% 31.77/31.88 | addressDiff(A1,A2,bitIndex2)
% 31.77/31.88 | addressDiff(A1,A2,bitIndex3) ) ).
% 31.77/31.88
% 31.77/31.88 fof(addAssertion,conjecture,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( reachableState(VarCurr)
% 31.77/31.88 => v4(VarCurr) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeUnaryOperator_347,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( ~ v4(VarCurr)
% 31.77/31.88 <=> v3674(VarCurr) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeUnaryOperator_346,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( ~ v3674(VarCurr)
% 31.77/31.88 <=> v3675(VarCurr) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeBinaryOperatorEqualRangesSingleBits_740,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3675(VarCurr)
% 31.77/31.88 <=> ( v3677(VarCurr)
% 31.77/31.88 & v3693(VarCurr) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeBinaryOperatorShiftedRanges_555,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3693(VarCurr)
% 31.77/31.88 <=> ( v3679(VarCurr,bitIndex0)
% 31.77/31.88 | v3679(VarCurr,bitIndex1) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeUnaryOperator_345,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( ~ v3677(VarCurr)
% 31.77/31.88 <=> v3678(VarCurr) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeBinaryOperatorShiftedRanges_554,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3678(VarCurr)
% 31.77/31.88 <=> ( v3679(VarCurr,bitIndex0)
% 31.77/31.88 & v3679(VarCurr,bitIndex1) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(addAssignment_2619,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3679(VarCurr,bitIndex0)
% 31.77/31.88 <=> v3680(VarCurr) ) ).
% 31.77/31.88
% 31.77/31.88 fof(addAssignment_2618,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3679(VarCurr,bitIndex1)
% 31.77/31.88 <=> $true ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeBinaryOperatorShiftedRanges_553,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3680(VarCurr)
% 31.77/31.88 <=> ( v3682(VarCurr)
% 31.77/31.88 & v3684(VarCurr,bitIndex5) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeBinaryOperatorShiftedRanges_552,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3682(VarCurr)
% 31.77/31.88 <=> ( v3683(VarCurr)
% 31.77/31.88 & v3684(VarCurr,bitIndex4) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeBinaryOperatorShiftedRanges_551,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3683(VarCurr)
% 31.77/31.88 <=> ( v3684(VarCurr,bitIndex3)
% 31.77/31.88 | v3685(VarCurr) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeBinaryOperatorEqualRangesSingleBits_739,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3685(VarCurr)
% 31.77/31.88 <=> ( v3686(VarCurr)
% 31.77/31.88 & v3692(VarCurr) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeUnaryOperator_344,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( ~ v3692(VarCurr)
% 31.77/31.88 <=> v3684(VarCurr,bitIndex3) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeBinaryOperatorShiftedRanges_550,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3686(VarCurr)
% 31.77/31.88 <=> ( v3684(VarCurr,bitIndex2)
% 31.77/31.88 | v3687(VarCurr) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeBinaryOperatorEqualRangesSingleBits_738,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3687(VarCurr)
% 31.77/31.88 <=> ( v3688(VarCurr)
% 31.77/31.88 & v3691(VarCurr) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeUnaryOperator_343,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( ~ v3691(VarCurr)
% 31.77/31.88 <=> v3684(VarCurr,bitIndex2) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeBinaryOperatorShiftedRanges_549,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3688(VarCurr)
% 31.77/31.88 <=> ( v3684(VarCurr,bitIndex1)
% 31.77/31.88 | v3689(VarCurr) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeBinaryOperatorEqualRangesSingleBits_737,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3689(VarCurr)
% 31.77/31.88 <=> ( v3684(VarCurr,bitIndex0)
% 31.77/31.88 & v3690(VarCurr) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeUnaryOperator_342,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( ~ v3690(VarCurr)
% 31.77/31.88 <=> v3684(VarCurr,bitIndex1) ) ).
% 31.77/31.88
% 31.77/31.88 fof(addZeroExtensionConstraint_7,axiom,
% 31.77/31.88 ! [VarCurr] : ~ v3684(VarCurr,bitIndex3) ).
% 31.77/31.88
% 31.77/31.88 fof(addZeroExtensionConstraint_6,axiom,
% 31.77/31.88 ! [VarCurr] : ~ v3684(VarCurr,bitIndex4) ).
% 31.77/31.88
% 31.77/31.88 fof(addZeroExtensionConstraint_5,axiom,
% 31.77/31.88 ! [VarCurr] : ~ v3684(VarCurr,bitIndex5) ).
% 31.77/31.88
% 31.77/31.88 fof(addAssignment_2617,axiom,
% 31.77/31.88 ! [VarCurr,B] :
% 31.77/31.88 ( range_2_0(B)
% 31.77/31.88 => ( v3684(VarCurr,B)
% 31.77/31.88 <=> v8(VarCurr,B) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(addCaseBooleanConditionEqualRanges1_38,axiom,
% 31.77/31.88 ! [VarNext,VarCurr] :
% 31.77/31.88 ( nextState(VarCurr,VarNext)
% 31.77/31.88 => ( ~ v3660(VarNext)
% 31.77/31.88 => ! [B] :
% 31.77/31.88 ( range_2_0(B)
% 31.77/31.88 => ( v8(VarNext,B)
% 31.77/31.88 <=> v8(VarCurr,B) ) ) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(addCaseBooleanConditionEqualRanges0_52,axiom,
% 31.77/31.88 ! [VarNext] :
% 31.77/31.88 ( v3660(VarNext)
% 31.77/31.88 => ! [B] :
% 31.77/31.88 ( range_2_0(B)
% 31.77/31.88 => ( v8(VarNext,B)
% 31.77/31.88 <=> v3668(VarNext,B) ) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(addAssignment_2616,axiom,
% 31.77/31.88 ! [VarNext,VarCurr] :
% 31.77/31.88 ( nextState(VarCurr,VarNext)
% 31.77/31.88 => ! [B] :
% 31.77/31.88 ( range_2_0(B)
% 31.77/31.88 => ( v3668(VarNext,B)
% 31.77/31.88 <=> v3666(VarCurr,B) ) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(aaddConditionBooleanCondEqualRangesElseBranch_99,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( ~ v3669(VarCurr)
% 31.77/31.88 => ! [B] :
% 31.77/31.88 ( range_2_0(B)
% 31.77/31.88 => ( v3666(VarCurr,B)
% 31.77/31.88 <=> v21(VarCurr,B) ) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(addConditionBooleanCondEqualRangesThenBranch_102,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3669(VarCurr)
% 31.77/31.88 => ! [B] :
% 31.77/31.88 ( range_2_0(B)
% 31.77/31.88 => ( v3666(VarCurr,B)
% 31.77/31.88 <=> $false ) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeUnaryOperator_341,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( ~ v3669(VarCurr)
% 31.77/31.88 <=> v10(VarCurr) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeBinaryOperatorEqualRangesSingleBits_736,axiom,
% 31.77/31.88 ! [VarNext,VarCurr] :
% 31.77/31.88 ( nextState(VarCurr,VarNext)
% 31.77/31.88 => ( v3660(VarNext)
% 31.77/31.88 <=> v3661(VarNext) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeBinaryOperatorEqualRangesSingleBits_735,axiom,
% 31.77/31.88 ! [VarNext,VarCurr] :
% 31.77/31.88 ( nextState(VarCurr,VarNext)
% 31.77/31.88 => ( v3661(VarNext)
% 31.77/31.88 <=> ( v3662(VarNext)
% 31.77/31.88 & v286(VarNext) ) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeUnaryOperator_340,axiom,
% 31.77/31.88 ! [VarNext,VarCurr] :
% 31.77/31.88 ( nextState(VarCurr,VarNext)
% 31.77/31.88 => ( ~ v3662(VarNext)
% 31.77/31.88 <=> v295(VarNext) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(aaddConditionBooleanCondEqualRangesElseBranch_98,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( ~ v23(VarCurr)
% 31.77/31.88 => ! [B] :
% 31.77/31.88 ( range_2_0(B)
% 31.77/31.88 => ( v21(VarCurr,B)
% 31.77/31.88 <=> v8(VarCurr,B) ) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(addConditionBooleanCondEqualRangesThenBranch_101,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v23(VarCurr)
% 31.77/31.88 => ! [B] :
% 31.77/31.88 ( range_2_0(B)
% 31.77/31.88 => ( v21(VarCurr,B)
% 31.77/31.88 <=> v3643(VarCurr,B) ) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(aaddConditionBooleanCondEqualRangesElseBranch_97,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( ~ v3644(VarCurr)
% 31.77/31.88 => ! [B] :
% 31.77/31.88 ( range_2_0(B)
% 31.77/31.88 => ( v3643(VarCurr,B)
% 31.77/31.88 <=> v3645(VarCurr,B) ) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(addConditionBooleanCondEqualRangesThenBranch_100,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3644(VarCurr)
% 31.77/31.88 => ! [B] :
% 31.77/31.88 ( range_2_0(B)
% 31.77/31.88 => ( v3643(VarCurr,B)
% 31.77/31.88 <=> $false ) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(bitBlastConstant_622,axiom,
% 31.77/31.88 ~ b000(bitIndex2) ).
% 31.77/31.88
% 31.77/31.88 fof(bitBlastConstant_621,axiom,
% 31.77/31.88 ~ b000(bitIndex1) ).
% 31.77/31.88
% 31.77/31.88 fof(bitBlastConstant_620,axiom,
% 31.77/31.88 ~ b000(bitIndex0) ).
% 31.77/31.88
% 31.77/31.88 fof(addAssignment_2615,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3645(VarCurr,bitIndex0)
% 31.77/31.88 <=> v3655(VarCurr) ) ).
% 31.77/31.88
% 31.77/31.88 fof(addAssignment_2614,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3645(VarCurr,bitIndex1)
% 31.77/31.88 <=> v3653(VarCurr) ) ).
% 31.77/31.88
% 31.77/31.88 fof(addAssignment_2613,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3645(VarCurr,bitIndex2)
% 31.77/31.88 <=> v3647(VarCurr) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeBinaryOperatorEqualRangesSingleBits_734,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3653(VarCurr)
% 31.77/31.88 <=> ( v3654(VarCurr)
% 31.77/31.88 & v3657(VarCurr) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeBinaryOperatorShiftedRanges_548,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3657(VarCurr)
% 31.77/31.88 <=> ( v8(VarCurr,bitIndex0)
% 31.77/31.88 | v8(VarCurr,bitIndex1) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeBinaryOperatorEqualRangesSingleBits_733,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3654(VarCurr)
% 31.77/31.88 <=> ( v3655(VarCurr)
% 31.77/31.88 | v3656(VarCurr) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeUnaryOperator_339,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( ~ v3656(VarCurr)
% 31.77/31.88 <=> v8(VarCurr,bitIndex1) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeUnaryOperator_338,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( ~ v3655(VarCurr)
% 31.77/31.88 <=> v8(VarCurr,bitIndex0) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeBinaryOperatorEqualRangesSingleBits_732,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3647(VarCurr)
% 31.77/31.88 <=> ( v3648(VarCurr)
% 31.77/31.88 & v3652(VarCurr) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeBinaryOperatorShiftedRanges_547,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3652(VarCurr)
% 31.77/31.88 <=> ( v3650(VarCurr)
% 31.77/31.88 | v8(VarCurr,bitIndex2) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeBinaryOperatorEqualRangesSingleBits_731,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3648(VarCurr)
% 31.77/31.88 <=> ( v3649(VarCurr)
% 31.77/31.88 | v3651(VarCurr) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeUnaryOperator_337,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( ~ v3651(VarCurr)
% 31.77/31.88 <=> v8(VarCurr,bitIndex2) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeUnaryOperator_336,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( ~ v3649(VarCurr)
% 31.77/31.88 <=> v3650(VarCurr) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeBinaryOperatorShiftedRanges_546,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3650(VarCurr)
% 31.77/31.88 <=> ( v8(VarCurr,bitIndex0)
% 31.77/31.88 & v8(VarCurr,bitIndex1) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(addBitVectorEqualityBitBlasted_151,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3644(VarCurr)
% 31.77/31.88 <=> ( ( v8(VarCurr,bitIndex2)
% 31.77/31.88 <=> $true )
% 31.77/31.88 & ( v8(VarCurr,bitIndex1)
% 31.77/31.88 <=> $false )
% 31.77/31.88 & ( v8(VarCurr,bitIndex0)
% 31.77/31.88 <=> $true ) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(bitBlastConstant_619,axiom,
% 31.77/31.88 b101(bitIndex2) ).
% 31.77/31.88
% 31.77/31.88 fof(bitBlastConstant_618,axiom,
% 31.77/31.88 ~ b101(bitIndex1) ).
% 31.77/31.88
% 31.77/31.88 fof(bitBlastConstant_617,axiom,
% 31.77/31.88 b101(bitIndex0) ).
% 31.77/31.88
% 31.77/31.88 fof(addAssignment_2612,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v23(VarCurr)
% 31.77/31.88 <=> v25(VarCurr) ) ).
% 31.77/31.88
% 31.77/31.88 fof(addAssignment_2611,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v25(VarCurr)
% 31.77/31.88 <=> v27(VarCurr) ) ).
% 31.77/31.88
% 31.77/31.88 fof(addAssignment_2610,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v27(VarCurr)
% 31.77/31.88 <=> v29(VarCurr) ) ).
% 31.77/31.88
% 31.77/31.88 fof(addAssignment_2609,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v29(VarCurr)
% 31.77/31.88 <=> v31(VarCurr,bitIndex7) ) ).
% 31.77/31.88
% 31.77/31.88 fof(addAssignment_2608,axiom,
% 31.77/31.88 ! [VarNext] :
% 31.77/31.88 ( v31(VarNext,bitIndex7)
% 31.77/31.88 <=> v3635(VarNext,bitIndex6) ) ).
% 31.77/31.88
% 31.77/31.88 fof(addCaseBooleanConditionShiftedRanges1_14,axiom,
% 31.77/31.88 ! [VarNext,VarCurr] :
% 31.77/31.88 ( nextState(VarCurr,VarNext)
% 31.77/31.88 => ( ~ v3636(VarNext)
% 31.77/31.88 => ( ( v3635(VarNext,bitIndex10)
% 31.77/31.88 <=> v31(VarCurr,bitIndex11) )
% 31.77/31.88 & ( v3635(VarNext,bitIndex9)
% 31.77/31.88 <=> v31(VarCurr,bitIndex10) )
% 31.77/31.88 & ( v3635(VarNext,bitIndex8)
% 31.77/31.88 <=> v31(VarCurr,bitIndex9) )
% 31.77/31.88 & ( v3635(VarNext,bitIndex7)
% 31.77/31.88 <=> v31(VarCurr,bitIndex8) )
% 31.77/31.88 & ( v3635(VarNext,bitIndex6)
% 31.77/31.88 <=> v31(VarCurr,bitIndex7) )
% 31.77/31.88 & ( v3635(VarNext,bitIndex5)
% 31.77/31.88 <=> v31(VarCurr,bitIndex6) )
% 31.77/31.88 & ( v3635(VarNext,bitIndex4)
% 31.77/31.88 <=> v31(VarCurr,bitIndex5) )
% 31.77/31.88 & ( v3635(VarNext,bitIndex3)
% 31.77/31.88 <=> v31(VarCurr,bitIndex4) )
% 31.77/31.88 & ( v3635(VarNext,bitIndex2)
% 31.77/31.88 <=> v31(VarCurr,bitIndex3) )
% 31.77/31.88 & ( v3635(VarNext,bitIndex1)
% 31.77/31.88 <=> v31(VarCurr,bitIndex2) )
% 31.77/31.88 & ( v3635(VarNext,bitIndex0)
% 31.77/31.88 <=> v31(VarCurr,bitIndex1) ) ) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(addCaseBooleanConditionEqualRanges0_51,axiom,
% 31.77/31.88 ! [VarNext] :
% 31.77/31.88 ( v3636(VarNext)
% 31.77/31.88 => ! [B] :
% 31.77/31.88 ( range_10_0(B)
% 31.77/31.88 => ( v3635(VarNext,B)
% 31.77/31.88 <=> v1253(VarNext,B) ) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeBinaryOperatorEqualRangesSingleBits_730,axiom,
% 31.77/31.88 ! [VarNext,VarCurr] :
% 31.77/31.88 ( nextState(VarCurr,VarNext)
% 31.77/31.88 => ( v3636(VarNext)
% 31.77/31.88 <=> v3637(VarNext) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeBinaryOperatorEqualRangesSingleBits_729,axiom,
% 31.77/31.88 ! [VarNext,VarCurr] :
% 31.77/31.88 ( nextState(VarCurr,VarNext)
% 31.77/31.88 => ( v3637(VarNext)
% 31.77/31.88 <=> ( v3639(VarNext)
% 31.77/31.88 & v1240(VarNext) ) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeUnaryOperator_335,axiom,
% 31.77/31.88 ! [VarNext,VarCurr] :
% 31.77/31.88 ( nextState(VarCurr,VarNext)
% 31.77/31.88 => ( ~ v3639(VarNext)
% 31.77/31.88 <=> v1247(VarNext) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(addConditionBooleanCondShiftedRangesElseBranch_22,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( ~ v3611(VarCurr)
% 31.77/31.88 => ( v36(VarCurr,bitIndex7)
% 31.77/31.88 <=> $false ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(addConditionBooleanCondShiftedRangesThenBranch_19,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3611(VarCurr)
% 31.77/31.88 => ( v36(VarCurr,bitIndex7)
% 31.77/31.88 <=> $true ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeBinaryOperatorEqualRangesSingleBits_728,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3611(VarCurr)
% 31.77/31.88 <=> ( v3612(VarCurr)
% 31.77/31.88 | v3632(VarCurr) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeBinaryOperatorEqualRangesSingleBits_727,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3632(VarCurr)
% 31.77/31.88 <=> ( v3633(VarCurr)
% 31.77/31.88 & v1323(VarCurr) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(addAssignment_2607,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3633(VarCurr)
% 31.77/31.88 <=> v3619(VarCurr) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeBinaryOperatorEqualRangesSingleBits_726,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3612(VarCurr)
% 31.77/31.88 <=> ( v3613(VarCurr)
% 31.77/31.88 | v3630(VarCurr) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeBinaryOperatorEqualRangesSingleBits_725,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3630(VarCurr)
% 31.77/31.88 <=> ( v3631(VarCurr)
% 31.77/31.88 & v1300(VarCurr) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeBinaryOperatorEqualRangesSingleBits_724,axiom,
% 31.77/31.88 ! [VarCurr] :
% 31.77/31.88 ( v3631(VarCurr)
% 31.77/31.88 <=> ( v3619(VarCurr)
% 31.77/31.88 & v1180(VarCurr) ) ) ).
% 31.77/31.88
% 31.77/31.88 fof(writeBinaryOperatorEqualRangesSingleBits_723,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3613(VarCurr)
% 31.77/31.89 <=> ( v3614(VarCurr)
% 31.77/31.89 | v3628(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_722,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3628(VarCurr)
% 31.77/31.89 <=> ( v3629(VarCurr)
% 31.77/31.89 & v1360(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2606,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3629(VarCurr)
% 31.77/31.89 <=> v3619(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_721,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3614(VarCurr)
% 31.77/31.89 <=> ( v3615(VarCurr)
% 31.77/31.89 | v3626(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_720,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3626(VarCurr)
% 31.77/31.89 <=> ( v3627(VarCurr)
% 31.77/31.89 & v1278(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_719,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3627(VarCurr)
% 31.77/31.89 <=> ( v3619(VarCurr)
% 31.77/31.89 & v1180(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_718,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3615(VarCurr)
% 31.77/31.89 <=> ( v3616(VarCurr)
% 31.77/31.89 | v3624(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_717,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3624(VarCurr)
% 31.77/31.89 <=> ( v3625(VarCurr)
% 31.77/31.89 & v1355(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2605,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3625(VarCurr)
% 31.77/31.89 <=> v3619(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_716,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3616(VarCurr)
% 31.77/31.89 <=> ( v3617(VarCurr)
% 31.77/31.89 | v3621(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_715,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3621(VarCurr)
% 31.77/31.89 <=> ( v3622(VarCurr)
% 31.77/31.89 & v1238(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_714,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3622(VarCurr)
% 31.77/31.89 <=> ( v3619(VarCurr)
% 31.77/31.89 & v1180(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_713,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3619(VarCurr)
% 31.77/31.89 <=> ( v3620(VarCurr)
% 31.77/31.89 & v1347(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_712,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3617(VarCurr)
% 31.77/31.89 <=> ( v3618(VarCurr)
% 31.77/31.89 & v1348(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_711,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3618(VarCurr)
% 31.77/31.89 <=> ( v3620(VarCurr)
% 31.77/31.89 & v1347(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_710,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3620(VarCurr)
% 31.77/31.89 <=> ( v1673(VarCurr)
% 31.77/31.89 & v903(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2604,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v38(VarCurr)
% 31.77/31.89 <=> v40(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2603,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v40(VarCurr)
% 31.77/31.89 <=> v42(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2602,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v42(VarCurr)
% 31.77/31.89 <=> v44(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2601,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v44(VarCurr)
% 31.77/31.89 <=> v46(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2600,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v46(VarCurr)
% 31.77/31.89 <=> v48(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2599,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v48(VarCurr)
% 31.77/31.89 <=> v50(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2598,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v50(VarCurr)
% 31.77/31.89 <=> v52(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2597,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v52(VarCurr)
% 31.77/31.89 <=> v54(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2596,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v54(VarCurr)
% 31.77/31.89 <=> v56(VarCurr,bitIndex2) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2595,axiom,
% 31.77/31.89 ! [VarNext] :
% 31.77/31.89 ( v56(VarNext,bitIndex2)
% 31.77/31.89 <=> v3601(VarNext,bitIndex2) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addCaseBooleanConditionEqualRanges1_37,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ( ~ v3602(VarNext)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_3_0(B)
% 31.77/31.89 => ( v3601(VarNext,B)
% 31.77/31.89 <=> v56(VarCurr,B) ) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addCaseBooleanConditionEqualRanges0_50,axiom,
% 31.77/31.89 ! [VarNext] :
% 31.77/31.89 ( v3602(VarNext)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_3_0(B)
% 31.77/31.89 => ( v3601(VarNext,B)
% 31.77/31.89 <=> v3588(VarNext,B) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_709,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ( v3602(VarNext)
% 31.77/31.89 <=> v3603(VarNext) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_708,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ( v3603(VarNext)
% 31.77/31.89 <=> ( v3605(VarNext)
% 31.77/31.89 & v3573(VarNext) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeUnaryOperator_334,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ( ~ v3605(VarNext)
% 31.77/31.89 <=> v3582(VarNext) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2594,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v67(VarCurr,bitIndex2)
% 31.77/31.89 <=> v3558(VarCurr,bitIndex2) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2593,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3555(VarCurr,bitIndex2)
% 31.77/31.89 <=> v3556(VarCurr,bitIndex2) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2592,axiom,
% 31.77/31.89 ! [VarNext] :
% 31.77/31.89 ( v56(VarNext,bitIndex1)
% 31.77/31.89 <=> v3593(VarNext,bitIndex1) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addCaseBooleanConditionEqualRanges1_36,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ( ~ v3594(VarNext)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_3_0(B)
% 31.77/31.89 => ( v3593(VarNext,B)
% 31.77/31.89 <=> v56(VarCurr,B) ) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addCaseBooleanConditionEqualRanges0_49,axiom,
% 31.77/31.89 ! [VarNext] :
% 31.77/31.89 ( v3594(VarNext)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_3_0(B)
% 31.77/31.89 => ( v3593(VarNext,B)
% 31.77/31.89 <=> v3588(VarNext,B) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_707,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ( v3594(VarNext)
% 31.77/31.89 <=> v3595(VarNext) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_706,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ( v3595(VarNext)
% 31.77/31.89 <=> ( v3597(VarNext)
% 31.77/31.89 & v3573(VarNext) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeUnaryOperator_333,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ( ~ v3597(VarNext)
% 31.77/31.89 <=> v3582(VarNext) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2591,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v67(VarCurr,bitIndex1)
% 31.77/31.89 <=> v3558(VarCurr,bitIndex1) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2590,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3555(VarCurr,bitIndex1)
% 31.77/31.89 <=> v3556(VarCurr,bitIndex1) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2589,axiom,
% 31.77/31.89 ! [VarNext] :
% 31.77/31.89 ( v56(VarNext,bitIndex3)
% 31.77/31.89 <=> v3577(VarNext,bitIndex3) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addCaseBooleanConditionEqualRanges1_35,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ( ~ v3578(VarNext)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_3_0(B)
% 31.77/31.89 => ( v3577(VarNext,B)
% 31.77/31.89 <=> v56(VarCurr,B) ) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addCaseBooleanConditionEqualRanges0_48,axiom,
% 31.77/31.89 ! [VarNext] :
% 31.77/31.89 ( v3578(VarNext)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_3_0(B)
% 31.77/31.89 => ( v3577(VarNext,B)
% 31.77/31.89 <=> v3588(VarNext,B) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2588,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_3_0(B)
% 31.77/31.89 => ( v3588(VarNext,B)
% 31.77/31.89 <=> v3586(VarCurr,B) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(aaddConditionBooleanCondEqualRangesElseBranch_96,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( ~ v3589(VarCurr)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_3_0(B)
% 31.77/31.89 => ( v3586(VarCurr,B)
% 31.77/31.89 <=> v67(VarCurr,B) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addConditionBooleanCondEqualRangesThenBranch_99,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3589(VarCurr)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_3_0(B)
% 31.77/31.89 => ( v3586(VarCurr,B)
% 31.77/31.89 <=> $false ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeUnaryOperator_332,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( ~ v3589(VarCurr)
% 31.77/31.89 <=> v58(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_705,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ( v3578(VarNext)
% 31.77/31.89 <=> v3579(VarNext) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_704,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ( v3579(VarNext)
% 31.77/31.89 <=> ( v3580(VarNext)
% 31.77/31.89 & v3573(VarNext) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeUnaryOperator_331,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ( ~ v3580(VarNext)
% 31.77/31.89 <=> v3582(VarNext) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2587,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ( v3582(VarNext)
% 31.77/31.89 <=> v3573(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2586,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3573(VarCurr)
% 31.77/31.89 <=> v3575(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2585,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3575(VarCurr)
% 31.77/31.89 <=> v3531(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2584,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v67(VarCurr,bitIndex3)
% 31.77/31.89 <=> v3558(VarCurr,bitIndex3) ) ).
% 31.77/31.89
% 31.77/31.89 fof(aaddConditionBooleanCondEqualRangesElseBranch_95,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( ~ v3559(VarCurr)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_3_0(B)
% 31.77/31.89 => ( v3558(VarCurr,B)
% 31.77/31.89 <=> v3560(VarCurr,B) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addConditionBooleanCondEqualRangesThenBranch_98,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3559(VarCurr)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_3_0(B)
% 31.77/31.89 => ( v3558(VarCurr,B)
% 31.77/31.89 <=> $false ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addParallelCaseBooleanConditionEqualRanges3_8,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( ( ~ v3561(VarCurr)
% 31.77/31.89 & ~ v3563(VarCurr)
% 31.77/31.89 & ~ v3567(VarCurr) )
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_3_0(B)
% 31.77/31.89 => ( v3560(VarCurr,B)
% 31.77/31.89 <=> v56(VarCurr,B) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addParallelCaseBooleanConditionEqualRanges2_13,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3567(VarCurr)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_3_0(B)
% 31.77/31.89 => ( v3560(VarCurr,B)
% 31.77/31.89 <=> v3569(VarCurr,B) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addParallelCaseBooleanConditionEqualRanges1_33,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3563(VarCurr)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_3_0(B)
% 31.77/31.89 => ( v3560(VarCurr,B)
% 31.77/31.89 <=> v3565(VarCurr,B) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addParallelCaseBooleanConditionEqualRanges0_33,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3561(VarCurr)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_3_0(B)
% 31.77/31.89 => ( v3560(VarCurr,B)
% 31.77/31.89 <=> v56(VarCurr,B) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addBitVectorEqualityBitBlasted_150,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3570(VarCurr)
% 31.77/31.89 <=> ( ( v3571(VarCurr,bitIndex1)
% 31.77/31.89 <=> $true )
% 31.77/31.89 & ( v3571(VarCurr,bitIndex0)
% 31.77/31.89 <=> $true ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2583,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3571(VarCurr,bitIndex0)
% 31.77/31.89 <=> v3447(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2582,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3571(VarCurr,bitIndex1)
% 31.77/31.89 <=> v69(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2581,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3569(VarCurr,bitIndex0)
% 31.77/31.89 <=> $true ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2580,axiom,
% 31.77/31.89 ! [VarCurr,B] :
% 31.77/31.89 ( range_3_1(B)
% 31.77/31.89 => ( v3569(VarCurr,B)
% 31.77/31.89 <=> v3555(VarCurr,B) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(range_axiom_33,axiom,
% 31.77/31.89 ! [B] :
% 31.77/31.89 ( range_3_1(B)
% 31.77/31.89 <=> ( $false
% 31.77/31.89 | bitIndex1 = B
% 31.77/31.89 | bitIndex2 = B
% 31.77/31.89 | bitIndex3 = B ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addBitVectorEqualityBitBlasted_149,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3567(VarCurr)
% 31.77/31.89 <=> ( ( v3568(VarCurr,bitIndex1)
% 31.77/31.89 <=> $true )
% 31.77/31.89 & ( v3568(VarCurr,bitIndex0)
% 31.77/31.89 <=> $false ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2579,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3568(VarCurr,bitIndex0)
% 31.77/31.89 <=> v3447(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2578,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3568(VarCurr,bitIndex1)
% 31.77/31.89 <=> v69(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2577,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( ( v3565(VarCurr,bitIndex2)
% 31.77/31.89 <=> v56(VarCurr,bitIndex3) )
% 31.77/31.89 & ( v3565(VarCurr,bitIndex1)
% 31.77/31.89 <=> v56(VarCurr,bitIndex2) )
% 31.77/31.89 & ( v3565(VarCurr,bitIndex0)
% 31.77/31.89 <=> v56(VarCurr,bitIndex1) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2576,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3565(VarCurr,bitIndex3)
% 31.77/31.89 <=> $false ) ).
% 31.77/31.89
% 31.77/31.89 fof(addBitVectorEqualityBitBlasted_148,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3563(VarCurr)
% 31.77/31.89 <=> ( ( v3564(VarCurr,bitIndex1)
% 31.77/31.89 <=> $false )
% 31.77/31.89 & ( v3564(VarCurr,bitIndex0)
% 31.77/31.89 <=> $true ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2575,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3564(VarCurr,bitIndex0)
% 31.77/31.89 <=> v3447(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2574,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3564(VarCurr,bitIndex1)
% 31.77/31.89 <=> v69(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addBitVectorEqualityBitBlasted_147,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3561(VarCurr)
% 31.77/31.89 <=> ( ( v3562(VarCurr,bitIndex1)
% 31.77/31.89 <=> $false )
% 31.77/31.89 & ( v3562(VarCurr,bitIndex0)
% 31.77/31.89 <=> $false ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2573,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3562(VarCurr,bitIndex0)
% 31.77/31.89 <=> v3447(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2572,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3562(VarCurr,bitIndex1)
% 31.77/31.89 <=> v69(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeUnaryOperator_330,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( ~ v3559(VarCurr)
% 31.77/31.89 <=> v58(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2571,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3555(VarCurr,bitIndex3)
% 31.77/31.89 <=> v3556(VarCurr,bitIndex3) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2570,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3556(VarCurr,bitIndex0)
% 31.77/31.89 <=> $false ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2569,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( ( v3556(VarCurr,bitIndex3)
% 31.77/31.89 <=> v56(VarCurr,bitIndex2) )
% 31.77/31.89 & ( v3556(VarCurr,bitIndex2)
% 31.77/31.89 <=> v56(VarCurr,bitIndex1) )
% 31.77/31.89 & ( v3556(VarCurr,bitIndex1)
% 31.77/31.89 <=> v56(VarCurr,bitIndex0) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignmentInitValueVector_44,axiom,
% 31.77/31.89 ! [B] :
% 31.77/31.89 ( range_3_0(B)
% 31.77/31.89 => ( v56(constB0,B)
% 31.77/31.89 <=> $false ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2568,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3447(VarCurr)
% 31.77/31.89 <=> v3449(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2567,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3449(VarCurr)
% 31.77/31.89 <=> v3451(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addParallelCaseBooleanConditionEqualRanges2_12,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( ( ~ v3551(VarCurr)
% 31.77/31.89 & ~ v3552(VarCurr) )
% 31.77/31.89 => ( v3451(VarCurr)
% 31.77/31.89 <=> $false ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addParallelCaseBooleanConditionEqualRanges1_32,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3552(VarCurr)
% 31.77/31.89 => ( v3451(VarCurr)
% 31.77/31.89 <=> $true ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addParallelCaseBooleanConditionEqualRanges0_32,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3551(VarCurr)
% 31.77/31.89 => ( v3451(VarCurr)
% 31.77/31.89 <=> $false ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addBitVectorEqualityBitBlasted_146,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3552(VarCurr)
% 31.77/31.89 <=> ( ( v3453(VarCurr,bitIndex1)
% 31.77/31.89 <=> $false )
% 31.77/31.89 & ( v3453(VarCurr,bitIndex0)
% 31.77/31.89 <=> $true ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addBitVectorEqualityBitBlasted_145,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3551(VarCurr)
% 31.77/31.89 <=> ( ( v3453(VarCurr,bitIndex1)
% 31.77/31.89 <=> $false )
% 31.77/31.89 & ( v3453(VarCurr,bitIndex0)
% 31.77/31.89 <=> $false ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addCaseBooleanConditionEqualRanges1_34,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ( ~ v3536(VarNext)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_1_0(B)
% 31.77/31.89 => ( v3453(VarNext,B)
% 31.77/31.89 <=> v3453(VarCurr,B) ) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addCaseBooleanConditionEqualRanges0_47,axiom,
% 31.77/31.89 ! [VarNext] :
% 31.77/31.89 ( v3536(VarNext)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_1_0(B)
% 31.77/31.89 => ( v3453(VarNext,B)
% 31.77/31.89 <=> v3546(VarNext,B) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2566,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_1_0(B)
% 31.77/31.89 => ( v3546(VarNext,B)
% 31.77/31.89 <=> v3544(VarCurr,B) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(aaddConditionBooleanCondEqualRangesElseBranch_94,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( ~ v3547(VarCurr)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_1_0(B)
% 31.77/31.89 => ( v3544(VarCurr,B)
% 31.77/31.89 <=> v3455(VarCurr,B) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addConditionBooleanCondEqualRangesThenBranch_97,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3547(VarCurr)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_1_0(B)
% 31.77/31.89 => ( v3544(VarCurr,B)
% 31.77/31.89 <=> $false ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addBitVectorEqualityBitBlasted_144,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3547(VarCurr)
% 31.77/31.89 <=> ( v62(VarCurr)
% 31.77/31.89 <=> $false ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_703,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ( v3536(VarNext)
% 31.77/31.89 <=> v3537(VarNext) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_702,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ( v3537(VarNext)
% 31.77/31.89 <=> ( v3538(VarNext)
% 31.77/31.89 & v3531(VarNext) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeUnaryOperator_329,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ( ~ v3538(VarNext)
% 31.77/31.89 <=> v3540(VarNext) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2565,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ( v3540(VarNext)
% 31.77/31.89 <=> v3531(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2564,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3531(VarCurr)
% 31.77/31.89 <=> v3533(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2563,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3533(VarCurr)
% 31.77/31.89 <=> v1(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addParallelCaseBooleanConditionEqualRanges2_11,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( ( ~ v3520(VarCurr)
% 31.77/31.89 & ~ v3529(VarCurr) )
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_1_0(B)
% 31.77/31.89 => ( v3455(VarCurr,B)
% 31.77/31.89 <=> $false ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addParallelCaseBooleanConditionEqualRanges1_31,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3529(VarCurr)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_1_0(B)
% 31.77/31.89 => ( v3455(VarCurr,B)
% 31.77/31.89 <=> $false ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addParallelCaseBooleanConditionEqualRanges0_31,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3520(VarCurr)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_1_0(B)
% 31.77/31.89 => ( v3455(VarCurr,B)
% 31.77/31.89 <=> v3521(VarCurr,B) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addBitVectorEqualityBitBlasted_143,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3529(VarCurr)
% 31.77/31.89 <=> ( ( v3453(VarCurr,bitIndex1)
% 31.77/31.89 <=> $false )
% 31.77/31.89 & ( v3453(VarCurr,bitIndex0)
% 31.77/31.89 <=> $true ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addParallelCaseBooleanConditionEqualRanges1_30,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( ~ v3522(VarCurr)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_1_0(B)
% 31.77/31.89 => ( v3521(VarCurr,B)
% 31.77/31.89 <=> v3524(VarCurr,B) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addParallelCaseBooleanConditionEqualRanges0_30,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3522(VarCurr)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_1_0(B)
% 31.77/31.89 => ( v3521(VarCurr,B)
% 31.77/31.89 <=> $false ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addParallelCaseBooleanConditionEqualRanges1_29,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( ~ v3525(VarCurr)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_1_0(B)
% 31.77/31.89 => ( v3524(VarCurr,B)
% 31.77/31.89 <=> b01(B) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addParallelCaseBooleanConditionEqualRanges0_29,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3525(VarCurr)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_1_0(B)
% 31.77/31.89 => ( v3524(VarCurr,B)
% 31.77/31.89 <=> $false ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addBitVectorEqualityBitBlasted_142,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3527(VarCurr)
% 31.77/31.89 <=> ( v3528(VarCurr)
% 31.77/31.89 <=> $false ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_701,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3528(VarCurr)
% 31.77/31.89 <=> ( v3500(VarCurr)
% 31.77/31.89 | v3502(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addBitVectorEqualityBitBlasted_141,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3525(VarCurr)
% 31.77/31.89 <=> ( v3526(VarCurr)
% 31.77/31.89 <=> $true ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_700,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3526(VarCurr)
% 31.77/31.89 <=> ( v3500(VarCurr)
% 31.77/31.89 | v3502(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignmentInitValueVector_43,axiom,
% 31.77/31.89 ( v3500(constB0)
% 31.77/31.89 <=> $false ) ).
% 31.77/31.89
% 31.77/31.89 fof(addBitVectorEqualityBitBlasted_140,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3523(VarCurr)
% 31.77/31.89 <=> ( v3457(VarCurr)
% 31.77/31.89 <=> $false ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addBitVectorEqualityBitBlasted_139,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3522(VarCurr)
% 31.77/31.89 <=> ( v3457(VarCurr)
% 31.77/31.89 <=> $true ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addBitVectorEqualityBitBlasted_138,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3520(VarCurr)
% 31.77/31.89 <=> ( ( v3453(VarCurr,bitIndex1)
% 31.77/31.89 <=> $false )
% 31.77/31.89 & ( v3453(VarCurr,bitIndex0)
% 31.77/31.89 <=> $false ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignmentInitValueVector_42,axiom,
% 31.77/31.89 ! [B] :
% 31.77/31.89 ( range_1_0(B)
% 31.77/31.89 => ( v3453(constB0,B)
% 31.77/31.89 <=> $false ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2562,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3502(VarCurr)
% 31.77/31.89 <=> v3504(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2561,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3504(VarCurr)
% 31.77/31.89 <=> v3506(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2560,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3506(VarCurr)
% 31.77/31.89 <=> v3508(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2559,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3508(VarCurr)
% 31.77/31.89 <=> v3510(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2558,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3510(VarCurr)
% 31.77/31.89 <=> v3512(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2557,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3512(VarCurr)
% 31.77/31.89 <=> v3514(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2556,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3514(VarCurr)
% 31.77/31.89 <=> v3516(VarCurr,bitIndex6) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignmentInitValue_30,axiom,
% 31.77/31.89 ~ v3516(constB0,bitIndex6) ).
% 31.77/31.89
% 31.77/31.89 fof(bitBlastConstant_616,axiom,
% 31.77/31.89 ~ bx0xxxxxx(bitIndex6) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2555,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3457(VarCurr)
% 31.77/31.89 <=> v3459(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_699,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3459(VarCurr)
% 31.77/31.89 <=> ( v3493(VarCurr)
% 31.77/31.89 & v3489(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_698,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3493(VarCurr)
% 31.77/31.89 <=> ( v3494(VarCurr)
% 31.77/31.89 & v3485(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_697,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3494(VarCurr)
% 31.77/31.89 <=> ( v3495(VarCurr)
% 31.77/31.89 & v3481(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_696,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3495(VarCurr)
% 31.77/31.89 <=> ( v3496(VarCurr)
% 31.77/31.89 & v3477(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_695,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3496(VarCurr)
% 31.77/31.89 <=> ( v3497(VarCurr)
% 31.77/31.89 & v3473(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_694,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3497(VarCurr)
% 31.77/31.89 <=> ( v3498(VarCurr)
% 31.77/31.89 & v3469(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_693,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3498(VarCurr)
% 31.77/31.89 <=> ( v3461(VarCurr)
% 31.77/31.89 & v3465(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2554,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3489(VarCurr)
% 31.77/31.89 <=> v3491(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignmentInitValueVector_41,axiom,
% 31.77/31.89 ( v3491(constB0)
% 31.77/31.89 <=> $true ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2553,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3485(VarCurr)
% 31.77/31.89 <=> v3487(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignmentInitValueVector_40,axiom,
% 31.77/31.89 ( v3487(constB0)
% 31.77/31.89 <=> $true ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2552,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3481(VarCurr)
% 31.77/31.89 <=> v3483(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignmentInitValueVector_39,axiom,
% 31.77/31.89 ( v3483(constB0)
% 31.77/31.89 <=> $true ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2551,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3477(VarCurr)
% 31.77/31.89 <=> v3479(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignmentInitValueVector_38,axiom,
% 31.77/31.89 ( v3479(constB0)
% 31.77/31.89 <=> $true ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2550,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3473(VarCurr)
% 31.77/31.89 <=> v3475(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignmentInitValueVector_37,axiom,
% 31.77/31.89 ( v3475(constB0)
% 31.77/31.89 <=> $true ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2549,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3469(VarCurr)
% 31.77/31.89 <=> v3471(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignmentInitValueVector_36,axiom,
% 31.77/31.89 ( v3471(constB0)
% 31.77/31.89 <=> $true ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2548,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3465(VarCurr)
% 31.77/31.89 <=> v3467(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignmentInitValueVector_35,axiom,
% 31.77/31.89 ( v3467(constB0)
% 31.77/31.89 <=> $true ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2547,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3461(VarCurr)
% 31.77/31.89 <=> v3463(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignmentInitValueVector_34,axiom,
% 31.77/31.89 ( v3463(constB0)
% 31.77/31.89 <=> $true ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2546,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v69(VarCurr)
% 31.77/31.89 <=> v71(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2545,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v71(VarCurr)
% 31.77/31.89 <=> v73(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2544,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v73(VarCurr)
% 31.77/31.89 <=> v75(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2543,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v75(VarCurr)
% 31.77/31.89 <=> v77(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2542,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v77(VarCurr)
% 31.77/31.89 <=> v79(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2541,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v79(VarCurr)
% 31.77/31.89 <=> v81(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2540,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v81(VarCurr)
% 31.77/31.89 <=> v83(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addCaseBooleanConditionEqualRanges1_33,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ( ~ v3426(VarNext)
% 31.77/31.89 => ( v83(VarNext)
% 31.77/31.89 <=> v83(VarCurr) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addCaseBooleanConditionEqualRanges0_46,axiom,
% 31.77/31.89 ! [VarNext] :
% 31.77/31.89 ( v3426(VarNext)
% 31.77/31.89 => ( v83(VarNext)
% 31.77/31.89 <=> v3434(VarNext) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2539,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ( v3434(VarNext)
% 31.77/31.89 <=> v3432(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(aaddConditionBooleanCondEqualRangesElseBranch_93,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( ~ v3435(VarCurr)
% 31.77/31.89 => ( v3432(VarCurr)
% 31.77/31.89 <=> v3436(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addConditionBooleanCondEqualRangesThenBranch_96,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3435(VarCurr)
% 31.77/31.89 => ( v3432(VarCurr)
% 31.77/31.89 <=> $false ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(aaddConditionBooleanCondEqualRangesElseBranch_92,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( ~ v3437(VarCurr)
% 31.77/31.89 => ( v3436(VarCurr)
% 31.77/31.89 <=> $false ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addConditionBooleanCondEqualRangesThenBranch_95,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3437(VarCurr)
% 31.77/31.89 => ( v3436(VarCurr)
% 31.77/31.89 <=> $true ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_692,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3437(VarCurr)
% 31.77/31.89 <=> ( v3438(VarCurr)
% 31.77/31.89 | v3442(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorShiftedRanges_545,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3442(VarCurr)
% 31.77/31.89 <=> ( v31(VarCurr,bitIndex9)
% 31.77/31.89 & v3443(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeUnaryOperator_328,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( ~ v3443(VarCurr)
% 31.77/31.89 <=> v36(VarCurr,bitIndex9) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_691,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3438(VarCurr)
% 31.77/31.89 <=> ( v3439(VarCurr)
% 31.77/31.89 | v3420(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_690,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3439(VarCurr)
% 31.77/31.89 <=> ( v3440(VarCurr)
% 31.77/31.89 | v3415(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_689,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3440(VarCurr)
% 31.77/31.89 <=> ( v3441(VarCurr)
% 31.77/31.89 | v879(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_688,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3441(VarCurr)
% 31.77/31.89 <=> ( v85(VarCurr)
% 31.77/31.89 | v3410(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeUnaryOperator_327,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( ~ v3435(VarCurr)
% 31.77/31.89 <=> v33(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_687,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ( v3426(VarNext)
% 31.77/31.89 <=> v3427(VarNext) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_686,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ( v3427(VarNext)
% 31.77/31.89 <=> ( v3428(VarNext)
% 31.77/31.89 & v1240(VarNext) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeUnaryOperator_326,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ( ~ v3428(VarNext)
% 31.77/31.89 <=> v1247(VarNext) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorShiftedRanges_544,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3420(VarCurr)
% 31.77/31.89 <=> ( v31(VarCurr,bitIndex8)
% 31.77/31.89 & v3422(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeUnaryOperator_325,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( ~ v3422(VarCurr)
% 31.77/31.89 <=> v3423(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorShiftedRanges_543,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3423(VarCurr)
% 31.77/31.89 <=> ( v36(VarCurr,bitIndex8)
% 31.77/31.89 | v36(VarCurr,bitIndex9) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorShiftedRanges_542,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3415(VarCurr)
% 31.77/31.89 <=> ( v31(VarCurr,bitIndex5)
% 31.77/31.89 & v3417(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeUnaryOperator_324,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( ~ v3417(VarCurr)
% 31.77/31.89 <=> v3418(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorShiftedRanges_541,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3418(VarCurr)
% 31.77/31.89 <=> ( v36(VarCurr,bitIndex5)
% 31.77/31.89 | v36(VarCurr,bitIndex9) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorShiftedRanges_540,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3410(VarCurr)
% 31.77/31.89 <=> ( v31(VarCurr,bitIndex2)
% 31.77/31.89 & v3412(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeUnaryOperator_323,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( ~ v3412(VarCurr)
% 31.77/31.89 <=> v3413(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorShiftedRanges_539,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3413(VarCurr)
% 31.77/31.89 <=> ( v36(VarCurr,bitIndex2)
% 31.77/31.89 | v36(VarCurr,bitIndex9) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2538,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v85(VarCurr)
% 31.77/31.89 <=> v36(VarCurr,bitIndex3) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addConditionBooleanCondShiftedRangesElseBranch_21,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( ~ v3398(VarCurr)
% 31.77/31.89 => ( v36(VarCurr,bitIndex3)
% 31.77/31.89 <=> $false ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addConditionBooleanCondShiftedRangesThenBranch_18,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3398(VarCurr)
% 31.77/31.89 => ( v36(VarCurr,bitIndex3)
% 31.77/31.89 <=> $true ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_685,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3398(VarCurr)
% 31.77/31.89 <=> ( v3399(VarCurr)
% 31.77/31.89 | v3407(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_684,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3407(VarCurr)
% 31.77/31.89 <=> ( v3408(VarCurr)
% 31.77/31.89 & v3348(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeUnaryOperator_322,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( ~ v3408(VarCurr)
% 31.77/31.89 <=> v38(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_683,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3399(VarCurr)
% 31.77/31.89 <=> ( v3400(VarCurr)
% 31.77/31.89 | v3405(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_682,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3405(VarCurr)
% 31.77/31.89 <=> ( v3406(VarCurr)
% 31.77/31.89 & v1360(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_681,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3406(VarCurr)
% 31.77/31.89 <=> ( v3346(VarCurr)
% 31.77/31.89 & v1682(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_680,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3400(VarCurr)
% 31.77/31.89 <=> ( v3401(VarCurr)
% 31.77/31.89 | v3403(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_679,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3403(VarCurr)
% 31.77/31.89 <=> ( v3404(VarCurr)
% 31.77/31.89 & v1355(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_678,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3404(VarCurr)
% 31.77/31.89 <=> ( v3346(VarCurr)
% 31.77/31.89 & v1682(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_677,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3401(VarCurr)
% 31.77/31.89 <=> ( v3402(VarCurr)
% 31.77/31.89 & v1348(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_676,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3402(VarCurr)
% 31.77/31.89 <=> ( v3346(VarCurr)
% 31.77/31.89 & v1682(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2537,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v87(VarCurr)
% 31.77/31.89 <=> v89(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2536,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v89(VarCurr)
% 31.77/31.89 <=> v91(VarCurr,bitIndex0) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2535,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v91(VarCurr,bitIndex0)
% 31.77/31.89 <=> v898(VarCurr,bitIndex0) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2534,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v892(VarCurr,bitIndex0)
% 31.77/31.89 <=> v896(VarCurr,bitIndex0) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2533,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v885(VarCurr,bitIndex0)
% 31.77/31.89 <=> v889(VarCurr,bitIndex0) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeUnaryOperator_321,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( ~ v93(VarCurr)
% 31.77/31.89 <=> v3396(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorShiftedRanges_538,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3396(VarCurr)
% 31.77/31.89 <=> ( v3358(VarCurr)
% 31.77/31.89 | v95(VarCurr,bitIndex2) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesMultipleBits_97,axiom,
% 31.77/31.89 ! [VarCurr,B] :
% 31.77/31.89 ( range_2_0(B)
% 31.77/31.89 => ( v95(VarCurr,B)
% 31.77/31.89 <=> ( v97(VarCurr,B)
% 31.77/31.89 & v3309(VarCurr,B) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addCaseBooleanConditionEqualRanges1_32,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ( ~ v3371(VarNext)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_2_0(B)
% 31.77/31.89 => ( v3309(VarNext,B)
% 31.77/31.89 <=> v3309(VarCurr,B) ) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addCaseBooleanConditionEqualRanges0_45,axiom,
% 31.77/31.89 ! [VarNext] :
% 31.77/31.89 ( v3371(VarNext)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_2_0(B)
% 31.77/31.89 => ( v3309(VarNext,B)
% 31.77/31.89 <=> v3390(VarNext,B) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2532,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_2_0(B)
% 31.77/31.89 => ( v3390(VarNext,B)
% 31.77/31.89 <=> v3388(VarCurr,B) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addParallelCaseBooleanConditionEqualRanges1_28,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( ~ v3382(VarCurr)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_2_0(B)
% 31.77/31.89 => ( v3388(VarCurr,B)
% 31.77/31.89 <=> v3391(VarCurr,B) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addParallelCaseBooleanConditionEqualRanges0_28,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3382(VarCurr)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_2_0(B)
% 31.77/31.89 => ( v3388(VarCurr,B)
% 31.77/31.89 <=> $true ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addParallelCaseBooleanConditionEqualRanges1_27,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( ~ v3313(VarCurr)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_2_0(B)
% 31.77/31.89 => ( v3391(VarCurr,B)
% 31.77/31.89 <=> v887(VarCurr,B) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addParallelCaseBooleanConditionEqualRanges0_27,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3313(VarCurr)
% 31.77/31.89 => ! [B] :
% 31.77/31.89 ( range_2_0(B)
% 31.77/31.89 => ( v3391(VarCurr,B)
% 31.77/31.89 <=> v894(VarCurr,B) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_675,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ( v3371(VarNext)
% 31.77/31.89 <=> ( v3372(VarNext)
% 31.77/31.89 & v3381(VarNext) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2531,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ( v3381(VarNext)
% 31.77/31.89 <=> v3379(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_674,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3379(VarCurr)
% 31.77/31.89 <=> ( v3382(VarCurr)
% 31.77/31.89 | v3383(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_673,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3383(VarCurr)
% 31.77/31.89 <=> ( v3384(VarCurr)
% 31.77/31.89 & v3387(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeUnaryOperator_320,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( ~ v3387(VarCurr)
% 31.77/31.89 <=> v3382(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_672,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3384(VarCurr)
% 31.77/31.89 <=> ( v3313(VarCurr)
% 31.77/31.89 | v3385(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_671,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3385(VarCurr)
% 31.77/31.89 <=> ( v3361(VarCurr)
% 31.77/31.89 & v3386(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeUnaryOperator_319,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( ~ v3386(VarCurr)
% 31.77/31.89 <=> v3313(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeUnaryOperator_318,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( ~ v3382(VarCurr)
% 31.77/31.89 <=> v3311(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_670,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ( v3372(VarNext)
% 31.77/31.89 <=> ( v3373(VarNext)
% 31.77/31.89 & v3368(VarNext) ) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeUnaryOperator_317,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ( ~ v3373(VarNext)
% 31.77/31.89 <=> v3375(VarNext) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2530,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ( v3375(VarNext)
% 31.77/31.89 <=> v3368(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignmentInitValueVector_33,axiom,
% 31.77/31.89 ! [B] :
% 31.77/31.89 ( range_2_0(B)
% 31.77/31.89 => ( v3309(constB0,B)
% 31.77/31.89 <=> $true ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2529,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3368(VarCurr)
% 31.77/31.89 <=> v288(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_669,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3361(VarCurr)
% 31.77/31.89 <=> ( v3363(VarCurr)
% 31.77/31.89 & v3366(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeUnaryOperator_316,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( ~ v3366(VarCurr)
% 31.77/31.89 <=> v3315(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorShiftedRanges_537,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3363(VarCurr)
% 31.77/31.89 <=> ( v3365(VarCurr)
% 31.77/31.89 | v97(VarCurr,bitIndex2) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorShiftedRanges_536,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3365(VarCurr)
% 31.77/31.89 <=> ( v97(VarCurr,bitIndex0)
% 31.77/31.89 | v97(VarCurr,bitIndex1) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_668,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3313(VarCurr)
% 31.77/31.89 <=> ( v3356(VarCurr)
% 31.77/31.89 & v3359(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeUnaryOperator_315,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( ~ v3359(VarCurr)
% 31.77/31.89 <=> v3315(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorShiftedRanges_535,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3356(VarCurr)
% 31.77/31.89 <=> ( v3358(VarCurr)
% 31.77/31.89 | v95(VarCurr,bitIndex2) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorShiftedRanges_534,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3358(VarCurr)
% 31.77/31.89 <=> ( v95(VarCurr,bitIndex0)
% 31.77/31.89 | v95(VarCurr,bitIndex1) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2528,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3315(VarCurr)
% 31.77/31.89 <=> v3317(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2527,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3317(VarCurr)
% 31.77/31.89 <=> v3319(VarCurr) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_667,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3319(VarCurr)
% 31.77/31.89 <=> ( v3350(VarCurr)
% 31.77/31.89 | v38(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorShiftedRanges_533,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3350(VarCurr)
% 31.77/31.89 <=> ( v3351(VarCurr)
% 31.77/31.89 | v36(VarCurr,bitIndex11) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorShiftedRanges_532,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3351(VarCurr)
% 31.77/31.89 <=> ( v3352(VarCurr)
% 31.77/31.89 | v36(VarCurr,bitIndex10) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorShiftedRanges_531,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3352(VarCurr)
% 31.77/31.89 <=> ( v3353(VarCurr)
% 31.77/31.89 | v36(VarCurr,bitIndex9) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorShiftedRanges_530,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3353(VarCurr)
% 31.77/31.89 <=> ( v3354(VarCurr)
% 31.77/31.89 | v36(VarCurr,bitIndex8) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorShiftedRanges_529,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3354(VarCurr)
% 31.77/31.89 <=> ( v36(VarCurr,bitIndex2)
% 31.77/31.89 | v36(VarCurr,bitIndex5) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addConditionBooleanCondShiftedRangesElseBranch_20,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( ~ v3331(VarCurr)
% 31.77/31.89 => ( v36(VarCurr,bitIndex10)
% 31.77/31.89 <=> $false ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addConditionBooleanCondShiftedRangesThenBranch_17,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3331(VarCurr)
% 31.77/31.89 => ( v36(VarCurr,bitIndex10)
% 31.77/31.89 <=> $true ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_666,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3331(VarCurr)
% 31.77/31.89 <=> ( v3332(VarCurr)
% 31.77/31.89 | v3347(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_665,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3347(VarCurr)
% 31.77/31.89 <=> ( v38(VarCurr)
% 31.77/31.89 & v3348(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addBitVectorEqualityBitBlasted_137,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3348(VarCurr)
% 31.77/31.89 <=> ( $true
% 31.77/31.89 <=> v31(VarCurr,bitIndex10) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_664,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3332(VarCurr)
% 31.77/31.89 <=> ( v3333(VarCurr)
% 31.77/31.89 | v3343(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_663,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3343(VarCurr)
% 31.77/31.89 <=> ( v3344(VarCurr)
% 31.77/31.89 & v1323(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_662,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3344(VarCurr)
% 31.77/31.89 <=> ( v3346(VarCurr)
% 31.77/31.89 & v1682(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_661,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3346(VarCurr)
% 31.77/31.89 <=> ( v1678(VarCurr)
% 31.77/31.89 & v1162(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_660,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3333(VarCurr)
% 31.77/31.89 <=> ( v3334(VarCurr)
% 31.77/31.89 | v3341(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_659,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3341(VarCurr)
% 31.77/31.89 <=> ( v3342(VarCurr)
% 31.77/31.89 & v1300(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_658,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3342(VarCurr)
% 31.77/31.89 <=> ( v3338(VarCurr)
% 31.77/31.89 & v1682(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_657,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3334(VarCurr)
% 31.77/31.89 <=> ( v3335(VarCurr)
% 31.77/31.89 | v3339(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_656,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3339(VarCurr)
% 31.77/31.89 <=> ( v3340(VarCurr)
% 31.77/31.89 & v1278(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_655,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3340(VarCurr)
% 31.77/31.89 <=> ( v3338(VarCurr)
% 31.77/31.89 & v1682(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_654,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3335(VarCurr)
% 31.77/31.89 <=> ( v3336(VarCurr)
% 31.77/31.89 & v1238(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_653,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3336(VarCurr)
% 31.77/31.89 <=> ( v3338(VarCurr)
% 31.77/31.89 & v1682(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(writeBinaryOperatorEqualRangesSingleBits_652,axiom,
% 31.77/31.89 ! [VarCurr] :
% 31.77/31.89 ( v3338(VarCurr)
% 31.77/31.89 <=> ( v1690(VarCurr)
% 31.77/31.89 & v1162(VarCurr) ) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addAssignment_2526,axiom,
% 31.77/31.89 ! [VarNext] :
% 31.77/31.89 ( v31(VarNext,bitIndex10)
% 31.77/31.89 <=> v3323(VarNext,bitIndex9) ) ).
% 31.77/31.89
% 31.77/31.89 fof(addCaseBooleanConditionShiftedRanges1_13,axiom,
% 31.77/31.89 ! [VarNext,VarCurr] :
% 31.77/31.89 ( nextState(VarCurr,VarNext)
% 31.77/31.89 => ( ~ v3324(VarNext)
% 31.77/31.89 => ( ( v3323(VarNext,bitIndex10)
% 31.77/31.89 <=> v31(VarCurr,bitIndex11) )
% 31.77/31.90 & ( v3323(VarNext,bitIndex9)
% 31.77/31.90 <=> v31(VarCurr,bitIndex10) )
% 31.77/31.90 & ( v3323(VarNext,bitIndex8)
% 31.77/31.90 <=> v31(VarCurr,bitIndex9) )
% 31.77/31.90 & ( v3323(VarNext,bitIndex7)
% 31.77/31.90 <=> v31(VarCurr,bitIndex8) )
% 31.77/31.90 & ( v3323(VarNext,bitIndex6)
% 31.77/31.90 <=> v31(VarCurr,bitIndex7) )
% 31.77/31.90 & ( v3323(VarNext,bitIndex5)
% 31.77/31.90 <=> v31(VarCurr,bitIndex6) )
% 31.77/31.90 & ( v3323(VarNext,bitIndex4)
% 31.77/31.90 <=> v31(VarCurr,bitIndex5) )
% 31.77/31.90 & ( v3323(VarNext,bitIndex3)
% 31.77/31.90 <=> v31(VarCurr,bitIndex4) )
% 31.77/31.90 & ( v3323(VarNext,bitIndex2)
% 31.77/31.90 <=> v31(VarCurr,bitIndex3) )
% 31.77/31.90 & ( v3323(VarNext,bitIndex1)
% 31.77/31.90 <=> v31(VarCurr,bitIndex2) )
% 31.77/31.90 & ( v3323(VarNext,bitIndex0)
% 31.77/31.90 <=> v31(VarCurr,bitIndex1) ) ) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addCaseBooleanConditionEqualRanges0_44,axiom,
% 31.77/31.90 ! [VarNext] :
% 31.77/31.90 ( v3324(VarNext)
% 31.77/31.90 => ! [B] :
% 31.77/31.90 ( range_10_0(B)
% 31.77/31.90 => ( v3323(VarNext,B)
% 31.77/31.90 <=> v1253(VarNext,B) ) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_651,axiom,
% 31.77/31.90 ! [VarNext,VarCurr] :
% 31.77/31.90 ( nextState(VarCurr,VarNext)
% 31.77/31.90 => ( v3324(VarNext)
% 31.77/31.90 <=> v3325(VarNext) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_650,axiom,
% 31.77/31.90 ! [VarNext,VarCurr] :
% 31.77/31.90 ( nextState(VarCurr,VarNext)
% 31.77/31.90 => ( v3325(VarNext)
% 31.77/31.90 <=> ( v3327(VarNext)
% 31.77/31.90 & v1240(VarNext) ) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeUnaryOperator_314,axiom,
% 31.77/31.90 ! [VarNext,VarCurr] :
% 31.77/31.90 ( nextState(VarCurr,VarNext)
% 31.77/31.90 => ( ~ v3327(VarNext)
% 31.77/31.90 <=> v1247(VarNext) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addAssignment_2525,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3311(VarCurr)
% 31.77/31.90 <=> v12(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addAssignment_2524,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v97(VarCurr,bitIndex0)
% 31.77/31.90 <=> v3301(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addAssignment_2523,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v97(VarCurr,bitIndex1)
% 31.77/31.90 <=> v308(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addAssignment_2522,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v97(VarCurr,bitIndex2)
% 31.77/31.90 <=> v99(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addAssignment_2521,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3301(VarCurr)
% 31.77/31.90 <=> v3303(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_649,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3303(VarCurr)
% 31.77/31.90 <=> ( v3305(VarCurr)
% 31.77/31.90 & v3306(VarCurr) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_648,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3306(VarCurr)
% 31.77/31.90 <=> ( v1162(VarCurr)
% 31.77/31.90 | v907(VarCurr) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeUnaryOperator_313,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( ~ v3305(VarCurr)
% 31.77/31.90 <=> v1031(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addAssignment_2520,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v308(VarCurr)
% 31.77/31.90 <=> v310(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeUnaryOperator_312,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( ~ v310(VarCurr)
% 31.77/31.90 <=> v312(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addAssignment_2519,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v312(VarCurr)
% 31.77/31.90 <=> v314(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_647,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v314(VarCurr)
% 31.77/31.90 <=> ( v316(VarCurr)
% 31.77/31.90 | v3201(VarCurr) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addAssignment_2518,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3201(VarCurr)
% 31.77/31.90 <=> v3203(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addBitVectorEqualityBitBlasted_136,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3203(VarCurr)
% 31.77/31.90 <=> ( ( v3205(VarCurr,bitIndex4)
% 31.77/31.90 <=> $false )
% 31.77/31.90 & ( v3205(VarCurr,bitIndex3)
% 31.77/31.90 <=> $false )
% 31.77/31.90 & ( v3205(VarCurr,bitIndex2)
% 31.77/31.90 <=> $false )
% 31.77/31.90 & ( v3205(VarCurr,bitIndex1)
% 31.77/31.90 <=> $false )
% 31.77/31.90 & ( v3205(VarCurr,bitIndex0)
% 31.77/31.90 <=> $false ) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addCaseBooleanConditionEqualRanges1_31,axiom,
% 31.77/31.90 ! [VarNext,VarCurr] :
% 31.77/31.90 ( nextState(VarCurr,VarNext)
% 31.77/31.90 => ( ~ v3285(VarNext)
% 31.77/31.90 => ! [B] :
% 31.77/31.90 ( range_4_0(B)
% 31.77/31.90 => ( v3205(VarNext,B)
% 31.77/31.90 <=> v3205(VarCurr,B) ) ) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addCaseBooleanConditionEqualRanges0_43,axiom,
% 31.77/31.90 ! [VarNext] :
% 31.77/31.90 ( v3285(VarNext)
% 31.77/31.90 => ! [B] :
% 31.77/31.90 ( range_4_0(B)
% 31.77/31.90 => ( v3205(VarNext,B)
% 31.77/31.90 <=> v3293(VarNext,B) ) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addAssignment_2517,axiom,
% 31.77/31.90 ! [VarNext,VarCurr] :
% 31.77/31.90 ( nextState(VarCurr,VarNext)
% 31.77/31.90 => ! [B] :
% 31.77/31.90 ( range_4_0(B)
% 31.77/31.90 => ( v3293(VarNext,B)
% 31.77/31.90 <=> v3291(VarCurr,B) ) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(aaddConditionBooleanCondEqualRangesElseBranch_91,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( ~ v3294(VarCurr)
% 31.77/31.90 => ! [B] :
% 31.77/31.90 ( range_4_0(B)
% 31.77/31.90 => ( v3291(VarCurr,B)
% 31.77/31.90 <=> v3207(VarCurr,B) ) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addConditionBooleanCondEqualRangesThenBranch_94,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3294(VarCurr)
% 31.77/31.90 => ! [B] :
% 31.77/31.90 ( range_4_0(B)
% 31.77/31.90 => ( v3291(VarCurr,B)
% 31.77/31.90 <=> $false ) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeUnaryOperator_311,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( ~ v3294(VarCurr)
% 31.77/31.90 <=> v754(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_646,axiom,
% 31.77/31.90 ! [VarNext,VarCurr] :
% 31.77/31.90 ( nextState(VarCurr,VarNext)
% 31.77/31.90 => ( v3285(VarNext)
% 31.77/31.90 <=> v3286(VarNext) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_645,axiom,
% 31.77/31.90 ! [VarNext,VarCurr] :
% 31.77/31.90 ( nextState(VarCurr,VarNext)
% 31.77/31.90 => ( v3286(VarNext)
% 31.77/31.90 <=> ( v3287(VarNext)
% 31.77/31.90 & v751(VarNext) ) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeUnaryOperator_310,axiom,
% 31.77/31.90 ! [VarNext,VarCurr] :
% 31.77/31.90 ( nextState(VarCurr,VarNext)
% 31.77/31.90 => ( ~ v3287(VarNext)
% 31.77/31.90 <=> v823(VarNext) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addParallelCaseBooleanConditionEqualRanges3_7,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( ( ~ v3209(VarCurr)
% 31.77/31.90 & ~ v3211(VarCurr)
% 31.77/31.90 & ~ v3252(VarCurr) )
% 31.77/31.90 => ! [B] :
% 31.77/31.90 ( range_4_0(B)
% 31.77/31.90 => ( v3207(VarCurr,B)
% 31.77/31.90 <=> v3205(VarCurr,B) ) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addParallelCaseBooleanConditionEqualRanges2_10,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3252(VarCurr)
% 31.77/31.90 => ! [B] :
% 31.77/31.90 ( range_4_0(B)
% 31.77/31.90 => ( v3207(VarCurr,B)
% 31.77/31.90 <=> v3254(VarCurr,B) ) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addParallelCaseBooleanConditionEqualRanges1_26,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3211(VarCurr)
% 31.77/31.90 => ! [B] :
% 31.77/31.90 ( range_4_0(B)
% 31.77/31.90 => ( v3207(VarCurr,B)
% 31.77/31.90 <=> v3213(VarCurr,B) ) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addParallelCaseBooleanConditionEqualRanges0_26,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3209(VarCurr)
% 31.77/31.90 => ! [B] :
% 31.77/31.90 ( range_4_0(B)
% 31.77/31.90 => ( v3207(VarCurr,B)
% 31.77/31.90 <=> v3205(VarCurr,B) ) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addBitVectorEqualityBitBlasted_135,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3281(VarCurr)
% 31.77/31.90 <=> ( ( v3282(VarCurr,bitIndex1)
% 31.77/31.90 <=> $true )
% 31.77/31.90 & ( v3282(VarCurr,bitIndex0)
% 31.77/31.90 <=> $true ) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addAssignment_2516,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3282(VarCurr,bitIndex0)
% 31.77/31.90 <=> v873(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addAssignment_2515,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3282(VarCurr,bitIndex1)
% 31.77/31.90 <=> v783(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(aaddConditionBooleanCondEqualRangesElseBranch_90,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( ~ v3255(VarCurr)
% 31.77/31.90 => ! [B] :
% 31.77/31.90 ( range_4_0(B)
% 31.77/31.90 => ( v3254(VarCurr,B)
% 31.77/31.90 <=> v3256(VarCurr,B) ) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addConditionBooleanCondEqualRangesThenBranch_93,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3255(VarCurr)
% 31.77/31.90 => ! [B] :
% 31.77/31.90 ( range_4_0(B)
% 31.77/31.90 => ( v3254(VarCurr,B)
% 31.77/31.90 <=> b10000(B) ) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addAssignment_2514,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3256(VarCurr,bitIndex0)
% 31.77/31.90 <=> v3278(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addAssignment_2513,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3256(VarCurr,bitIndex1)
% 31.77/31.90 <=> v3276(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addAssignment_2512,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3256(VarCurr,bitIndex2)
% 31.77/31.90 <=> v3271(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addAssignment_2511,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3256(VarCurr,bitIndex3)
% 31.77/31.90 <=> v3266(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addAssignment_2510,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3256(VarCurr,bitIndex4)
% 31.77/31.90 <=> v3258(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_644,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3276(VarCurr)
% 31.77/31.90 <=> ( v3277(VarCurr)
% 31.77/31.90 & v3280(VarCurr) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorShiftedRanges_528,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3280(VarCurr)
% 31.77/31.90 <=> ( v3205(VarCurr,bitIndex0)
% 31.77/31.90 | v3205(VarCurr,bitIndex1) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_643,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3277(VarCurr)
% 31.77/31.90 <=> ( v3278(VarCurr)
% 31.77/31.90 | v3279(VarCurr) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeUnaryOperator_309,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( ~ v3279(VarCurr)
% 31.77/31.90 <=> v3205(VarCurr,bitIndex1) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeUnaryOperator_308,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( ~ v3278(VarCurr)
% 31.77/31.90 <=> v3205(VarCurr,bitIndex0) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_642,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3271(VarCurr)
% 31.77/31.90 <=> ( v3272(VarCurr)
% 31.77/31.90 & v3275(VarCurr) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorShiftedRanges_527,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3275(VarCurr)
% 31.77/31.90 <=> ( v3263(VarCurr)
% 31.77/31.90 | v3205(VarCurr,bitIndex2) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_641,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3272(VarCurr)
% 31.77/31.90 <=> ( v3273(VarCurr)
% 31.77/31.90 | v3274(VarCurr) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeUnaryOperator_307,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( ~ v3274(VarCurr)
% 31.77/31.90 <=> v3205(VarCurr,bitIndex2) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeUnaryOperator_306,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( ~ v3273(VarCurr)
% 31.77/31.90 <=> v3263(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_640,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3266(VarCurr)
% 31.77/31.90 <=> ( v3267(VarCurr)
% 31.77/31.90 & v3270(VarCurr) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorShiftedRanges_526,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3270(VarCurr)
% 31.77/31.90 <=> ( v3262(VarCurr)
% 31.77/31.90 | v3205(VarCurr,bitIndex3) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_639,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3267(VarCurr)
% 31.77/31.90 <=> ( v3268(VarCurr)
% 31.77/31.90 | v3269(VarCurr) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeUnaryOperator_305,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( ~ v3269(VarCurr)
% 31.77/31.90 <=> v3205(VarCurr,bitIndex3) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeUnaryOperator_304,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( ~ v3268(VarCurr)
% 31.77/31.90 <=> v3262(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_638,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3258(VarCurr)
% 31.77/31.90 <=> ( v3259(VarCurr)
% 31.77/31.90 & v3265(VarCurr) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorShiftedRanges_525,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3265(VarCurr)
% 31.77/31.90 <=> ( v3261(VarCurr)
% 31.77/31.90 | v3205(VarCurr,bitIndex4) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_637,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3259(VarCurr)
% 31.77/31.90 <=> ( v3260(VarCurr)
% 31.77/31.90 | v3264(VarCurr) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeUnaryOperator_303,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( ~ v3264(VarCurr)
% 31.77/31.90 <=> v3205(VarCurr,bitIndex4) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeUnaryOperator_302,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( ~ v3260(VarCurr)
% 31.77/31.90 <=> v3261(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorShiftedRanges_524,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3261(VarCurr)
% 31.77/31.90 <=> ( v3262(VarCurr)
% 31.77/31.90 & v3205(VarCurr,bitIndex3) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorShiftedRanges_523,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3262(VarCurr)
% 31.77/31.90 <=> ( v3263(VarCurr)
% 31.77/31.90 & v3205(VarCurr,bitIndex2) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorShiftedRanges_522,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3263(VarCurr)
% 31.77/31.90 <=> ( v3205(VarCurr,bitIndex0)
% 31.77/31.90 & v3205(VarCurr,bitIndex1) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addBitVectorEqualityBitBlasted_134,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3255(VarCurr)
% 31.77/31.90 <=> ( ( v3205(VarCurr,bitIndex4)
% 31.77/31.90 <=> $true )
% 31.77/31.90 & ( v3205(VarCurr,bitIndex3)
% 31.77/31.90 <=> $false )
% 31.77/31.90 & ( v3205(VarCurr,bitIndex2)
% 31.77/31.90 <=> $false )
% 31.77/31.90 & ( v3205(VarCurr,bitIndex1)
% 31.77/31.90 <=> $false )
% 31.77/31.90 & ( v3205(VarCurr,bitIndex0)
% 31.77/31.90 <=> $false ) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addBitVectorEqualityBitBlasted_133,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3252(VarCurr)
% 31.77/31.90 <=> ( ( v3253(VarCurr,bitIndex1)
% 31.77/31.90 <=> $true )
% 31.77/31.90 & ( v3253(VarCurr,bitIndex0)
% 31.77/31.90 <=> $false ) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addAssignment_2509,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3253(VarCurr,bitIndex0)
% 31.77/31.90 <=> v873(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addAssignment_2508,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3253(VarCurr,bitIndex1)
% 31.77/31.90 <=> v783(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(aaddConditionBooleanCondEqualRangesElseBranch_89,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( ~ v3214(VarCurr)
% 31.77/31.90 => ! [B] :
% 31.77/31.90 ( range_31_0(B)
% 31.77/31.90 => ( v3213(VarCurr,B)
% 31.77/31.90 <=> v3215(VarCurr,B) ) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addConditionBooleanCondEqualRangesThenBranch_92,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3214(VarCurr)
% 31.77/31.90 => ! [B] :
% 31.77/31.90 ( range_31_0(B)
% 31.77/31.90 => ( v3213(VarCurr,B)
% 31.77/31.90 <=> $false ) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addSignExtensionConstraint_130,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3215(VarCurr,bitIndex6)
% 31.77/31.90 <=> v3216(VarCurr,bitIndex5) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addSignExtensionConstraint_129,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3215(VarCurr,bitIndex7)
% 31.77/31.90 <=> v3216(VarCurr,bitIndex5) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addSignExtensionConstraint_128,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3215(VarCurr,bitIndex8)
% 31.77/31.90 <=> v3216(VarCurr,bitIndex5) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addSignExtensionConstraint_127,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3215(VarCurr,bitIndex9)
% 31.77/31.90 <=> v3216(VarCurr,bitIndex5) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addSignExtensionConstraint_126,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3215(VarCurr,bitIndex10)
% 31.77/31.90 <=> v3216(VarCurr,bitIndex5) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addSignExtensionConstraint_125,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3215(VarCurr,bitIndex11)
% 31.77/31.90 <=> v3216(VarCurr,bitIndex5) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addSignExtensionConstraint_124,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3215(VarCurr,bitIndex12)
% 31.77/31.90 <=> v3216(VarCurr,bitIndex5) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addSignExtensionConstraint_123,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3215(VarCurr,bitIndex13)
% 31.77/31.90 <=> v3216(VarCurr,bitIndex5) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addSignExtensionConstraint_122,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3215(VarCurr,bitIndex14)
% 31.77/31.90 <=> v3216(VarCurr,bitIndex5) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addSignExtensionConstraint_121,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3215(VarCurr,bitIndex15)
% 31.77/31.90 <=> v3216(VarCurr,bitIndex5) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addSignExtensionConstraint_120,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3215(VarCurr,bitIndex16)
% 31.77/31.90 <=> v3216(VarCurr,bitIndex5) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addSignExtensionConstraint_119,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3215(VarCurr,bitIndex17)
% 31.77/31.90 <=> v3216(VarCurr,bitIndex5) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addSignExtensionConstraint_118,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3215(VarCurr,bitIndex18)
% 31.77/31.90 <=> v3216(VarCurr,bitIndex5) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addSignExtensionConstraint_117,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3215(VarCurr,bitIndex19)
% 31.77/31.90 <=> v3216(VarCurr,bitIndex5) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addSignExtensionConstraint_116,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3215(VarCurr,bitIndex20)
% 31.77/31.90 <=> v3216(VarCurr,bitIndex5) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addSignExtensionConstraint_115,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3215(VarCurr,bitIndex21)
% 31.77/31.90 <=> v3216(VarCurr,bitIndex5) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addSignExtensionConstraint_114,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3215(VarCurr,bitIndex22)
% 31.77/31.90 <=> v3216(VarCurr,bitIndex5) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addSignExtensionConstraint_113,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3215(VarCurr,bitIndex23)
% 31.77/31.90 <=> v3216(VarCurr,bitIndex5) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addSignExtensionConstraint_112,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3215(VarCurr,bitIndex24)
% 31.77/31.90 <=> v3216(VarCurr,bitIndex5) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addSignExtensionConstraint_111,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3215(VarCurr,bitIndex25)
% 31.77/31.90 <=> v3216(VarCurr,bitIndex5) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addSignExtensionConstraint_110,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3215(VarCurr,bitIndex26)
% 31.77/31.90 <=> v3216(VarCurr,bitIndex5) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addSignExtensionConstraint_109,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3215(VarCurr,bitIndex27)
% 31.77/31.90 <=> v3216(VarCurr,bitIndex5) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addSignExtensionConstraint_108,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3215(VarCurr,bitIndex28)
% 31.77/31.90 <=> v3216(VarCurr,bitIndex5) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addSignExtensionConstraint_107,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3215(VarCurr,bitIndex29)
% 31.77/31.90 <=> v3216(VarCurr,bitIndex5) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addSignExtensionConstraint_106,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3215(VarCurr,bitIndex30)
% 31.77/31.90 <=> v3216(VarCurr,bitIndex5) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addSignExtensionConstraint_105,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3215(VarCurr,bitIndex31)
% 31.77/31.90 <=> v3216(VarCurr,bitIndex5) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addAssignment_2507,axiom,
% 31.77/31.90 ! [VarCurr,B] :
% 31.77/31.90 ( range_5_0(B)
% 31.77/31.90 => ( v3215(VarCurr,B)
% 31.77/31.90 <=> v3216(VarCurr,B) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addAssignment_2506,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3216(VarCurr,bitIndex0)
% 31.77/31.90 <=> v3250(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addAssignment_2505,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3216(VarCurr,bitIndex1)
% 31.77/31.90 <=> v3248(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addAssignment_2504,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3216(VarCurr,bitIndex2)
% 31.77/31.90 <=> v3244(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addAssignment_2503,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3216(VarCurr,bitIndex3)
% 31.77/31.90 <=> v3240(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addAssignment_2502,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3216(VarCurr,bitIndex4)
% 31.77/31.90 <=> v3236(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(addAssignment_2501,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3216(VarCurr,bitIndex5)
% 31.77/31.90 <=> v3218(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_636,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3248(VarCurr)
% 31.77/31.90 <=> ( v3249(VarCurr)
% 31.77/31.90 & v3251(VarCurr) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_635,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3251(VarCurr)
% 31.77/31.90 <=> ( v3222(VarCurr,bitIndex0)
% 31.77/31.90 | v3230(VarCurr) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorShiftedRanges_521,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3249(VarCurr)
% 31.77/31.90 <=> ( v3250(VarCurr)
% 31.77/31.90 | v3222(VarCurr,bitIndex1) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeUnaryOperator_301,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( ~ v3250(VarCurr)
% 31.77/31.90 <=> v3222(VarCurr,bitIndex0) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_634,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3244(VarCurr)
% 31.77/31.90 <=> ( v3245(VarCurr)
% 31.77/31.90 & v3247(VarCurr) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_633,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3247(VarCurr)
% 31.77/31.90 <=> ( v3228(VarCurr)
% 31.77/31.90 | v3231(VarCurr) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorShiftedRanges_520,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3245(VarCurr)
% 31.77/31.90 <=> ( v3246(VarCurr)
% 31.77/31.90 | v3222(VarCurr,bitIndex2) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeUnaryOperator_300,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( ~ v3246(VarCurr)
% 31.77/31.90 <=> v3228(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_632,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3240(VarCurr)
% 31.77/31.90 <=> ( v3241(VarCurr)
% 31.77/31.90 & v3243(VarCurr) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_631,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3243(VarCurr)
% 31.77/31.90 <=> ( v3226(VarCurr)
% 31.77/31.90 | v3232(VarCurr) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorShiftedRanges_519,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3241(VarCurr)
% 31.77/31.90 <=> ( v3242(VarCurr)
% 31.77/31.90 | v3222(VarCurr,bitIndex3) ) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeUnaryOperator_299,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( ~ v3242(VarCurr)
% 31.77/31.90 <=> v3226(VarCurr) ) ).
% 31.77/31.90
% 31.77/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_630,axiom,
% 31.77/31.90 ! [VarCurr] :
% 31.77/31.90 ( v3236(VarCurr)
% 31.77/31.90 <=> ( v3237(VarCurr)
% 31.77/31.90 & v3239(VarCurr) ) ) ).
% 31.77/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_629,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3239(VarCurr)
% 31.96/31.90 <=> ( v3224(VarCurr)
% 31.96/31.90 | v3233(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorShiftedRanges_518,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3237(VarCurr)
% 31.96/31.90 <=> ( v3238(VarCurr)
% 31.96/31.90 | v3222(VarCurr,bitIndex4) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeUnaryOperator_298,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( ~ v3238(VarCurr)
% 31.96/31.90 <=> v3224(VarCurr) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_628,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3218(VarCurr)
% 31.96/31.90 <=> ( v3219(VarCurr)
% 31.96/31.90 & v3234(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_627,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3234(VarCurr)
% 31.96/31.90 <=> ( v3221(VarCurr)
% 31.96/31.90 | v3235(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeUnaryOperator_297,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( ~ v3235(VarCurr)
% 31.96/31.90 <=> v3222(VarCurr,bitIndex5) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorShiftedRanges_517,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3219(VarCurr)
% 31.96/31.90 <=> ( v3220(VarCurr)
% 31.96/31.90 | v3222(VarCurr,bitIndex5) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeUnaryOperator_296,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( ~ v3220(VarCurr)
% 31.96/31.90 <=> v3221(VarCurr) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorShiftedRanges_516,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3221(VarCurr)
% 31.96/31.90 <=> ( v3222(VarCurr,bitIndex4)
% 31.96/31.90 | v3223(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_626,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3223(VarCurr)
% 31.96/31.90 <=> ( v3224(VarCurr)
% 31.96/31.90 & v3233(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeUnaryOperator_295,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( ~ v3233(VarCurr)
% 31.96/31.90 <=> v3222(VarCurr,bitIndex4) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorShiftedRanges_515,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3224(VarCurr)
% 31.96/31.90 <=> ( v3222(VarCurr,bitIndex3)
% 31.96/31.90 | v3225(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_625,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3225(VarCurr)
% 31.96/31.90 <=> ( v3226(VarCurr)
% 31.96/31.90 & v3232(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeUnaryOperator_294,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( ~ v3232(VarCurr)
% 31.96/31.90 <=> v3222(VarCurr,bitIndex3) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorShiftedRanges_514,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3226(VarCurr)
% 31.96/31.90 <=> ( v3222(VarCurr,bitIndex2)
% 31.96/31.90 | v3227(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_624,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3227(VarCurr)
% 31.96/31.90 <=> ( v3228(VarCurr)
% 31.96/31.90 & v3231(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeUnaryOperator_293,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( ~ v3231(VarCurr)
% 31.96/31.90 <=> v3222(VarCurr,bitIndex2) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorShiftedRanges_513,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3228(VarCurr)
% 31.96/31.90 <=> ( v3222(VarCurr,bitIndex1)
% 31.96/31.90 | v3229(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_623,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3229(VarCurr)
% 31.96/31.90 <=> ( v3222(VarCurr,bitIndex0)
% 31.96/31.90 & v3230(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeUnaryOperator_292,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( ~ v3230(VarCurr)
% 31.96/31.90 <=> v3222(VarCurr,bitIndex1) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addZeroExtensionConstraint_4,axiom,
% 31.96/31.90 ! [VarCurr] : ~ v3222(VarCurr,bitIndex5) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2500,axiom,
% 31.96/31.90 ! [VarCurr,B] :
% 31.96/31.90 ( range_4_0(B)
% 31.96/31.90 => ( v3222(VarCurr,B)
% 31.96/31.90 <=> v3205(VarCurr,B) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addBitVectorEqualityBitBlasted_132,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3214(VarCurr)
% 31.96/31.90 <=> ( ( v3205(VarCurr,bitIndex4)
% 31.96/31.90 <=> $false )
% 31.96/31.90 & ( v3205(VarCurr,bitIndex3)
% 31.96/31.90 <=> $false )
% 31.96/31.90 & ( v3205(VarCurr,bitIndex2)
% 31.96/31.90 <=> $false )
% 31.96/31.90 & ( v3205(VarCurr,bitIndex1)
% 31.96/31.90 <=> $false )
% 31.96/31.90 & ( v3205(VarCurr,bitIndex0)
% 31.96/31.90 <=> $false ) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addBitVectorEqualityBitBlasted_131,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3211(VarCurr)
% 31.96/31.90 <=> ( ( v3212(VarCurr,bitIndex1)
% 31.96/31.90 <=> $false )
% 31.96/31.90 & ( v3212(VarCurr,bitIndex0)
% 31.96/31.90 <=> $true ) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2499,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3212(VarCurr,bitIndex0)
% 31.96/31.90 <=> v873(VarCurr) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2498,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3212(VarCurr,bitIndex1)
% 31.96/31.90 <=> v783(VarCurr) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignmentInitValue_29,axiom,
% 31.96/31.90 ~ v3205(constB0,bitIndex4) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignmentInitValue_28,axiom,
% 31.96/31.90 ~ v3205(constB0,bitIndex3) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignmentInitValue_27,axiom,
% 31.96/31.90 ~ v3205(constB0,bitIndex2) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignmentInitValue_26,axiom,
% 31.96/31.90 ~ v3205(constB0,bitIndex1) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignmentInitValue_25,axiom,
% 31.96/31.90 v3205(constB0,bitIndex0) ).
% 31.96/31.90
% 31.96/31.90 fof(addBitVectorEqualityBitBlasted_130,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3209(VarCurr)
% 31.96/31.90 <=> ( ( v3210(VarCurr,bitIndex1)
% 31.96/31.90 <=> $false )
% 31.96/31.90 & ( v3210(VarCurr,bitIndex0)
% 31.96/31.90 <=> $false ) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2497,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3210(VarCurr,bitIndex0)
% 31.96/31.90 <=> v873(VarCurr) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2496,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3210(VarCurr,bitIndex1)
% 31.96/31.90 <=> v783(VarCurr) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_622,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v316(VarCurr)
% 31.96/31.90 <=> ( v3195(VarCurr)
% 31.96/31.90 | v3199(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_621,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3199(VarCurr)
% 31.96/31.90 <=> ( v3103(VarCurr)
% 31.96/31.90 & v3109(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_620,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3195(VarCurr)
% 31.96/31.90 <=> ( v3196(VarCurr)
% 31.96/31.90 | v2259(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_619,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3196(VarCurr)
% 31.96/31.90 <=> ( v3197(VarCurr)
% 31.96/31.90 & v3198(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeUnaryOperator_291,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( ~ v3198(VarCurr)
% 31.96/31.90 <=> v1908(VarCurr) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_618,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3197(VarCurr)
% 31.96/31.90 <=> ( v318(VarCurr)
% 31.96/31.90 & v664(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2495,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3109(VarCurr)
% 31.96/31.90 <=> v3111(VarCurr) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2494,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3111(VarCurr)
% 31.96/31.90 <=> v3113(VarCurr) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2493,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3113(VarCurr)
% 31.96/31.90 <=> v3115(VarCurr) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2492,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3115(VarCurr)
% 31.96/31.90 <=> v3117(VarCurr) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2491,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3117(VarCurr)
% 31.96/31.90 <=> v1918(VarCurr,bitIndex1) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2490,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v1918(VarCurr,bitIndex1)
% 31.96/31.90 <=> v1920(VarCurr,bitIndex1) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2489,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v1920(VarCurr,bitIndex1)
% 31.96/31.90 <=> v1922(VarCurr,bitIndex1) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2488,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v1922(VarCurr,bitIndex1)
% 31.96/31.90 <=> v1924(VarCurr,bitIndex1) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2487,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v1924(VarCurr,bitIndex1)
% 31.96/31.90 <=> v1926(VarCurr,bitIndex1) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2486,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v1926(VarCurr,bitIndex1)
% 31.96/31.90 <=> v1928(VarCurr,bitIndex1) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2485,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v1928(VarCurr,bitIndex1)
% 31.96/31.90 <=> v3119(VarCurr) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addCaseBooleanConditionEqualRanges1_30,axiom,
% 31.96/31.90 ! [VarNext,VarCurr] :
% 31.96/31.90 ( nextState(VarCurr,VarNext)
% 31.96/31.90 => ( ~ v3150(VarNext)
% 31.96/31.90 => ( v3119(VarNext)
% 31.96/31.90 <=> v3119(VarCurr) ) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addCaseBooleanConditionEqualRanges0_42,axiom,
% 31.96/31.90 ! [VarNext] :
% 31.96/31.90 ( v3150(VarNext)
% 31.96/31.90 => ( v3119(VarNext)
% 31.96/31.90 <=> v3185(VarNext) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2484,axiom,
% 31.96/31.90 ! [VarNext,VarCurr] :
% 31.96/31.90 ( nextState(VarCurr,VarNext)
% 31.96/31.90 => ( v3185(VarNext)
% 31.96/31.90 <=> v3183(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addParallelCaseBooleanConditionEqualRanges1_25,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( ~ v3121(VarCurr)
% 31.96/31.90 => ( v3183(VarCurr)
% 31.96/31.90 <=> v3186(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addParallelCaseBooleanConditionEqualRanges0_25,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3121(VarCurr)
% 31.96/31.90 => ( v3183(VarCurr)
% 31.96/31.90 <=> v3123(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addParallelCaseBooleanConditionEqualRanges1_24,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( ~ v3163(VarCurr)
% 31.96/31.90 => ( v3186(VarCurr)
% 31.96/31.90 <=> v3145(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addParallelCaseBooleanConditionEqualRanges0_24,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3163(VarCurr)
% 31.96/31.90 => ( v3186(VarCurr)
% 31.96/31.90 <=> v3187(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addParallelCaseBooleanConditionEqualRanges2_9,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( ( ~ v3166(VarCurr)
% 31.96/31.90 & ~ v3168(VarCurr) )
% 31.96/31.90 => ( v3187(VarCurr)
% 31.96/31.90 <=> v3191(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addParallelCaseBooleanConditionEqualRanges1_23,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3168(VarCurr)
% 31.96/31.90 => ( v3187(VarCurr)
% 31.96/31.90 <=> v3190(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addParallelCaseBooleanConditionEqualRanges0_23,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3166(VarCurr)
% 31.96/31.90 => ( v3187(VarCurr)
% 31.96/31.90 <=> v3188(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addParallelCaseBooleanConditionEqualRanges1_22,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( ~ v3176(VarCurr)
% 31.96/31.90 => ( v3191(VarCurr)
% 31.96/31.90 <=> v3145(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addParallelCaseBooleanConditionEqualRanges0_22,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3176(VarCurr)
% 31.96/31.90 => ( v3191(VarCurr)
% 31.96/31.90 <=> $true ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addParallelCaseBooleanConditionEqualRanges1_21,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( ~ v3170(VarCurr)
% 31.96/31.90 => ( v3190(VarCurr)
% 31.96/31.90 <=> v3145(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addParallelCaseBooleanConditionEqualRanges0_21,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3170(VarCurr)
% 31.96/31.90 => ( v3190(VarCurr)
% 31.96/31.90 <=> $false ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(aaddConditionBooleanCondEqualRangesElseBranch_88,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( ~ v3189(VarCurr)
% 31.96/31.90 => ( v3188(VarCurr)
% 31.96/31.90 <=> $false ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addConditionBooleanCondEqualRangesThenBranch_91,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3189(VarCurr)
% 31.96/31.90 => ( v3188(VarCurr)
% 31.96/31.90 <=> $true ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addBitVectorEqualityBitBlasted_129,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3189(VarCurr)
% 31.96/31.90 <=> ( v3131(VarCurr)
% 31.96/31.90 <=> $true ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_617,axiom,
% 31.96/31.90 ! [VarNext,VarCurr] :
% 31.96/31.90 ( nextState(VarCurr,VarNext)
% 31.96/31.90 => ( v3150(VarNext)
% 31.96/31.90 <=> ( v3151(VarNext)
% 31.96/31.90 & v3160(VarNext) ) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2483,axiom,
% 31.96/31.90 ! [VarNext,VarCurr] :
% 31.96/31.90 ( nextState(VarCurr,VarNext)
% 31.96/31.90 => ( v3160(VarNext)
% 31.96/31.90 <=> v3158(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_616,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3158(VarCurr)
% 31.96/31.90 <=> ( v3121(VarCurr)
% 31.96/31.90 | v3161(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_615,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3161(VarCurr)
% 31.96/31.90 <=> ( v3162(VarCurr)
% 31.96/31.90 & v3182(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeUnaryOperator_290,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( ~ v3182(VarCurr)
% 31.96/31.90 <=> v3121(VarCurr) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_614,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3162(VarCurr)
% 31.96/31.90 <=> ( v3163(VarCurr)
% 31.96/31.90 | v3180(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_613,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3180(VarCurr)
% 31.96/31.90 <=> ( v3141(VarCurr)
% 31.96/31.90 & v3181(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeUnaryOperator_289,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( ~ v3181(VarCurr)
% 31.96/31.90 <=> v3143(VarCurr) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_612,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3163(VarCurr)
% 31.96/31.90 <=> ( v3164(VarCurr)
% 31.96/31.90 & v3143(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_611,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3164(VarCurr)
% 31.96/31.90 <=> ( v3165(VarCurr)
% 31.96/31.90 | v3174(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_610,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3174(VarCurr)
% 31.96/31.90 <=> ( v3175(VarCurr)
% 31.96/31.90 & v3179(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addBitVectorEqualityBitBlasted_128,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3179(VarCurr)
% 31.96/31.90 <=> ( ( v3167(VarCurr,bitIndex2)
% 31.96/31.90 <=> $false )
% 31.96/31.90 & ( v3167(VarCurr,bitIndex1)
% 31.96/31.90 <=> $false )
% 31.96/31.90 & ( v3167(VarCurr,bitIndex0)
% 31.96/31.90 <=> $true ) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_609,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3175(VarCurr)
% 31.96/31.90 <=> ( v3176(VarCurr)
% 31.96/31.90 | v3177(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_608,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3177(VarCurr)
% 31.96/31.90 <=> ( v3141(VarCurr)
% 31.96/31.90 & v3178(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeUnaryOperator_288,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( ~ v3178(VarCurr)
% 31.96/31.90 <=> v3176(VarCurr) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addBitVectorEqualityBitBlasted_127,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3176(VarCurr)
% 31.96/31.90 <=> ( v3131(VarCurr)
% 31.96/31.90 <=> $true ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_607,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3165(VarCurr)
% 31.96/31.90 <=> ( v3166(VarCurr)
% 31.96/31.90 | v3168(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_606,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3168(VarCurr)
% 31.96/31.90 <=> ( v3169(VarCurr)
% 31.96/31.90 & v3173(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addBitVectorEqualityBitBlasted_126,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3173(VarCurr)
% 31.96/31.90 <=> ( ( v3167(VarCurr,bitIndex2)
% 31.96/31.90 <=> $false )
% 31.96/31.90 & ( v3167(VarCurr,bitIndex1)
% 31.96/31.90 <=> $true )
% 31.96/31.90 & ( v3167(VarCurr,bitIndex0)
% 31.96/31.90 <=> $false ) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_605,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3169(VarCurr)
% 31.96/31.90 <=> ( v3170(VarCurr)
% 31.96/31.90 | v3171(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_604,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3171(VarCurr)
% 31.96/31.90 <=> ( v3141(VarCurr)
% 31.96/31.90 & v3172(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeUnaryOperator_287,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( ~ v3172(VarCurr)
% 31.96/31.90 <=> v3170(VarCurr) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addBitVectorEqualityBitBlasted_125,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3170(VarCurr)
% 31.96/31.90 <=> ( v3131(VarCurr)
% 31.96/31.90 <=> $true ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addBitVectorEqualityBitBlasted_124,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3166(VarCurr)
% 31.96/31.90 <=> ( ( v3167(VarCurr,bitIndex2)
% 31.96/31.90 <=> $true )
% 31.96/31.90 & ( v3167(VarCurr,bitIndex1)
% 31.96/31.90 <=> $false )
% 31.96/31.90 & ( v3167(VarCurr,bitIndex0)
% 31.96/31.90 <=> $false ) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2482,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3167(VarCurr,bitIndex0)
% 31.96/31.90 <=> v3129(VarCurr) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2481,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3167(VarCurr,bitIndex1)
% 31.96/31.90 <=> v3127(VarCurr) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2480,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3167(VarCurr,bitIndex2)
% 31.96/31.90 <=> v3125(VarCurr) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_603,axiom,
% 31.96/31.90 ! [VarNext,VarCurr] :
% 31.96/31.90 ( nextState(VarCurr,VarNext)
% 31.96/31.90 => ( v3151(VarNext)
% 31.96/31.90 <=> ( v3152(VarNext)
% 31.96/31.90 & v3147(VarNext) ) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeUnaryOperator_286,axiom,
% 31.96/31.90 ! [VarNext,VarCurr] :
% 31.96/31.90 ( nextState(VarCurr,VarNext)
% 31.96/31.90 => ( ~ v3152(VarNext)
% 31.96/31.90 <=> v3154(VarNext) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2479,axiom,
% 31.96/31.90 ! [VarNext,VarCurr] :
% 31.96/31.90 ( nextState(VarCurr,VarNext)
% 31.96/31.90 => ( v3154(VarNext)
% 31.96/31.90 <=> v3147(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2478,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3147(VarCurr)
% 31.96/31.90 <=> v2207(VarCurr) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2477,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3145(VarCurr)
% 31.96/31.90 <=> $false ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2476,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3143(VarCurr)
% 31.96/31.90 <=> v2045(VarCurr) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2475,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3141(VarCurr)
% 31.96/31.90 <=> $false ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2474,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3131(VarCurr)
% 31.96/31.90 <=> v1966(VarCurr,bitIndex1) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2473,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v1966(VarCurr,bitIndex1)
% 31.96/31.90 <=> v1968(VarCurr,bitIndex1) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2472,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v1968(VarCurr,bitIndex1)
% 31.96/31.90 <=> v1970(VarCurr,bitIndex1) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2471,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v1970(VarCurr,bitIndex1)
% 31.96/31.90 <=> v1972(VarCurr,bitIndex1) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2470,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v1972(VarCurr,bitIndex1)
% 31.96/31.90 <=> v1974(VarCurr,bitIndex1) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2469,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v1974(VarCurr,bitIndex1)
% 31.96/31.90 <=> v1976(VarCurr,bitIndex1) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2468,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v1976(VarCurr,bitIndex1)
% 31.96/31.90 <=> v1978(VarCurr,bitIndex1) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2467,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v1978(VarCurr,bitIndex1)
% 31.96/31.90 <=> v1980(VarCurr,bitIndex1) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2466,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v1980(VarCurr,bitIndex1)
% 31.96/31.90 <=> v1982(VarCurr,bitIndex1) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2465,axiom,
% 31.96/31.90 ! [VarNext] :
% 31.96/31.90 ( v1982(VarNext,bitIndex1)
% 31.96/31.90 <=> v3133(VarNext,bitIndex1) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addCaseBooleanConditionEqualRanges1_29,axiom,
% 31.96/31.90 ! [VarNext,VarCurr] :
% 31.96/31.90 ( nextState(VarCurr,VarNext)
% 31.96/31.90 => ( ~ v3134(VarNext)
% 31.96/31.90 => ! [B] :
% 31.96/31.90 ( range_63_0(B)
% 31.96/31.90 => ( v3133(VarNext,B)
% 31.96/31.90 <=> v1982(VarCurr,B) ) ) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addCaseBooleanConditionEqualRanges0_41,axiom,
% 31.96/31.90 ! [VarNext] :
% 31.96/31.90 ( v3134(VarNext)
% 31.96/31.90 => ! [B] :
% 31.96/31.90 ( range_63_0(B)
% 31.96/31.90 => ( v3133(VarNext,B)
% 31.96/31.90 <=> v2034(VarNext,B) ) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_602,axiom,
% 31.96/31.90 ! [VarNext,VarCurr] :
% 31.96/31.90 ( nextState(VarCurr,VarNext)
% 31.96/31.90 => ( v3134(VarNext)
% 31.96/31.90 <=> v3135(VarNext) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_601,axiom,
% 31.96/31.90 ! [VarNext,VarCurr] :
% 31.96/31.90 ( nextState(VarCurr,VarNext)
% 31.96/31.90 => ( v3135(VarNext)
% 31.96/31.90 <=> ( v3137(VarNext)
% 31.96/31.90 & v2013(VarNext) ) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeUnaryOperator_285,axiom,
% 31.96/31.90 ! [VarNext,VarCurr] :
% 31.96/31.90 ( nextState(VarCurr,VarNext)
% 31.96/31.90 => ( ~ v3137(VarNext)
% 31.96/31.90 <=> v2028(VarNext) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2464,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v1987(VarCurr,bitIndex1)
% 31.96/31.90 <=> v1989(VarCurr,bitIndex1) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2463,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v1989(VarCurr,bitIndex1)
% 31.96/31.90 <=> v1991(VarCurr,bitIndex1) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2462,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v1991(VarCurr,bitIndex1)
% 31.96/31.90 <=> v1993(VarCurr,bitIndex1) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2461,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v1993(VarCurr,bitIndex1)
% 31.96/31.90 <=> v1995(VarCurr,bitIndex1) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2460,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v1995(VarCurr,bitIndex1)
% 31.96/31.90 <=> v1997(VarCurr,bitIndex1) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2459,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v1997(VarCurr,bitIndex1)
% 31.96/31.90 <=> v1999(VarCurr,bitIndex1) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2458,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v1999(VarCurr,bitIndex1)
% 31.96/31.90 <=> v2001(VarCurr,bitIndex1) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2457,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v2001(VarCurr,bitIndex1)
% 31.96/31.90 <=> v2003(VarCurr,bitIndex1) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2456,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v2003(VarCurr,bitIndex1)
% 31.96/31.90 <=> v2005(VarCurr,bitIndex1) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2455,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v2005(VarCurr,bitIndex1)
% 31.96/31.90 <=> v2007(VarCurr,bitIndex1) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2454,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v2007(VarCurr,bitIndex1)
% 31.96/31.90 <=> v2009(VarCurr,bitIndex1) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2453,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3129(VarCurr)
% 31.96/31.90 <=> $false ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2452,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3127(VarCurr)
% 31.96/31.90 <=> $false ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2451,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3125(VarCurr)
% 31.96/31.90 <=> $true ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2450,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3123(VarCurr)
% 31.96/31.90 <=> $false ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2449,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3121(VarCurr)
% 31.96/31.90 <=> v1934(VarCurr) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2448,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3103(VarCurr)
% 31.96/31.90 <=> v3105(VarCurr) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2447,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3105(VarCurr)
% 31.96/31.90 <=> v3107(VarCurr) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_600,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v2259(VarCurr)
% 31.96/31.90 <=> ( v3094(VarCurr)
% 31.96/31.90 & v1908(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_599,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3094(VarCurr)
% 31.96/31.90 <=> ( v3095(VarCurr)
% 31.96/31.90 | v3098(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_598,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3098(VarCurr)
% 31.96/31.90 <=> ( v3099(VarCurr)
% 31.96/31.90 & v3100(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addBitVectorEqualityBitBlasted_123,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3100(VarCurr)
% 31.96/31.90 <=> ( ( v3101(VarCurr,bitIndex4)
% 31.96/31.90 <=> $true )
% 31.96/31.90 & ( v3101(VarCurr,bitIndex3)
% 31.96/31.90 <=> $true )
% 31.96/31.90 & ( v3101(VarCurr,bitIndex2)
% 31.96/31.90 <=> $true )
% 31.96/31.90 & ( v3101(VarCurr,bitIndex1)
% 31.96/31.90 <=> $true )
% 31.96/31.90 & ( v3101(VarCurr,bitIndex0)
% 31.96/31.90 <=> $true ) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2446,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3101(VarCurr,bitIndex0)
% 31.96/31.90 <=> v3054(VarCurr) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2445,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3101(VarCurr,bitIndex1)
% 31.96/31.90 <=> v3049(VarCurr) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2444,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3101(VarCurr,bitIndex2)
% 31.96/31.90 <=> v3044(VarCurr) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2443,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3101(VarCurr,bitIndex3)
% 31.96/31.90 <=> v3039(VarCurr) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addAssignment_2442,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3101(VarCurr,bitIndex4)
% 31.96/31.90 <=> v3012(VarCurr) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addBitVectorEqualityBitBlasted_122,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3099(VarCurr)
% 31.96/31.90 <=> ( ( v2261(VarCurr,bitIndex1)
% 31.96/31.90 <=> $true )
% 31.96/31.90 & ( v2261(VarCurr,bitIndex0)
% 31.96/31.90 <=> $false ) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(writeBinaryOperatorEqualRangesSingleBits_597,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3095(VarCurr)
% 31.96/31.90 <=> ( v3096(VarCurr)
% 31.96/31.90 | v3097(VarCurr) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addBitVectorEqualityBitBlasted_121,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3097(VarCurr)
% 31.96/31.90 <=> ( ( v2261(VarCurr,bitIndex1)
% 31.96/31.90 <=> $true )
% 31.96/31.90 & ( v2261(VarCurr,bitIndex0)
% 31.96/31.90 <=> $true ) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addBitVectorEqualityBitBlasted_120,axiom,
% 31.96/31.90 ! [VarCurr] :
% 31.96/31.90 ( v3096(VarCurr)
% 31.96/31.90 <=> ( ( v2261(VarCurr,bitIndex1)
% 31.96/31.90 <=> $false )
% 31.96/31.90 & ( v2261(VarCurr,bitIndex0)
% 31.96/31.90 <=> $true ) ) ) ).
% 31.96/31.90
% 31.96/31.90 fof(addCaseBooleanConditionEqualRanges1_28,axiom,
% 31.96/31.91 ! [VarNext,VarCurr] :
% 31.96/31.91 ( nextState(VarCurr,VarNext)
% 31.96/31.91 => ( ~ v3079(VarNext)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v2261(VarNext,B)
% 31.96/31.91 <=> v2261(VarCurr,B) ) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addCaseBooleanConditionEqualRanges0_40,axiom,
% 31.96/31.91 ! [VarNext] :
% 31.96/31.91 ( v3079(VarNext)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v2261(VarNext,B)
% 31.96/31.91 <=> v3087(VarNext,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2441,axiom,
% 31.96/31.91 ! [VarNext,VarCurr] :
% 31.96/31.91 ( nextState(VarCurr,VarNext)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v3087(VarNext,B)
% 31.96/31.91 <=> v3085(VarCurr,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(aaddConditionBooleanCondEqualRangesElseBranch_87,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v3088(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v3085(VarCurr,B)
% 31.96/31.91 <=> v2263(VarCurr,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addConditionBooleanCondEqualRangesThenBranch_90,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3088(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v3085(VarCurr,B)
% 31.96/31.91 <=> $false ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_596,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3088(VarCurr)
% 31.96/31.91 <=> ( v3089(VarCurr)
% 31.96/31.91 | v3090(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_284,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v3090(VarCurr)
% 31.96/31.91 <=> v1908(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_283,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v3089(VarCurr)
% 31.96/31.91 <=> v12(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_595,axiom,
% 31.96/31.91 ! [VarNext,VarCurr] :
% 31.96/31.91 ( nextState(VarCurr,VarNext)
% 31.96/31.91 => ( v3079(VarNext)
% 31.96/31.91 <=> v3080(VarNext) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_594,axiom,
% 31.96/31.91 ! [VarNext,VarCurr] :
% 31.96/31.91 ( nextState(VarCurr,VarNext)
% 31.96/31.91 => ( v3080(VarNext)
% 31.96/31.91 <=> ( v3081(VarNext)
% 31.96/31.91 & v288(VarNext) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_282,axiom,
% 31.96/31.91 ! [VarNext,VarCurr] :
% 31.96/31.91 ( nextState(VarCurr,VarNext)
% 31.96/31.91 => ( ~ v3081(VarNext)
% 31.96/31.91 <=> v1891(VarNext) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addParallelCaseBooleanConditionEqualRanges3_6,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ( ~ v2988(VarCurr)
% 31.96/31.91 & ~ v2992(VarCurr)
% 31.96/31.91 & ~ v3004(VarCurr) )
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v2263(VarCurr,B)
% 31.96/31.91 <=> v3058(VarCurr,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addParallelCaseBooleanConditionEqualRanges2_8,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3004(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v2263(VarCurr,B)
% 31.96/31.91 <=> v3005(VarCurr,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addParallelCaseBooleanConditionEqualRanges1_20,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2992(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v2263(VarCurr,B)
% 31.96/31.91 <=> v2993(VarCurr,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addParallelCaseBooleanConditionEqualRanges0_20,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2988(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v2263(VarCurr,B)
% 31.96/31.91 <=> v2989(VarCurr,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(aaddConditionBooleanCondEqualRangesElseBranch_86,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v741(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v3058(VarCurr,B)
% 31.96/31.91 <=> v3059(VarCurr,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addConditionBooleanCondEqualRangesThenBranch_89,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v741(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v3058(VarCurr,B)
% 31.96/31.91 <=> b01(B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(aaddConditionBooleanCondEqualRangesElseBranch_85,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v3060(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v3059(VarCurr,B)
% 31.96/31.91 <=> v3061(VarCurr,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addConditionBooleanCondEqualRangesThenBranch_88,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3060(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v3059(VarCurr,B)
% 31.96/31.91 <=> $false ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(aaddConditionBooleanCondEqualRangesElseBranch_84,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v3062(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v3061(VarCurr,B)
% 31.96/31.91 <=> $true ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addConditionBooleanCondEqualRangesThenBranch_87,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3062(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v3061(VarCurr,B)
% 31.96/31.91 <=> b10(B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_593,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3062(VarCurr)
% 31.96/31.91 <=> ( v3064(VarCurr)
% 31.96/31.91 | v3066(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_512,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3066(VarCurr)
% 31.96/31.91 <=> ( v3067(VarCurr)
% 31.96/31.91 & v3065(VarCurr,bitIndex4) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_592,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3067(VarCurr)
% 31.96/31.91 <=> ( v3068(VarCurr)
% 31.96/31.91 | v3069(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_511,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3069(VarCurr)
% 31.96/31.91 <=> ( v3070(VarCurr)
% 31.96/31.91 & v3065(VarCurr,bitIndex3) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_591,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3070(VarCurr)
% 31.96/31.91 <=> ( v3071(VarCurr)
% 31.96/31.91 | v3072(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_510,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3072(VarCurr)
% 31.96/31.91 <=> ( v3073(VarCurr)
% 31.96/31.91 & v3065(VarCurr,bitIndex2) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_590,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3073(VarCurr)
% 31.96/31.91 <=> ( v3074(VarCurr)
% 31.96/31.91 | v3075(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_509,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3075(VarCurr)
% 31.96/31.91 <=> ( v3076(VarCurr)
% 31.96/31.91 & v3065(VarCurr,bitIndex1) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_281,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v3076(VarCurr)
% 31.96/31.91 <=> v3065(VarCurr,bitIndex0) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_280,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v3074(VarCurr)
% 31.96/31.91 <=> v3065(VarCurr,bitIndex1) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_279,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v3071(VarCurr)
% 31.96/31.91 <=> v3065(VarCurr,bitIndex2) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_278,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v3068(VarCurr)
% 31.96/31.91 <=> v3065(VarCurr,bitIndex3) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_277,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v3064(VarCurr)
% 31.96/31.91 <=> v3065(VarCurr,bitIndex4) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2440,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3065(VarCurr,bitIndex0)
% 31.96/31.91 <=> v3054(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2439,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3065(VarCurr,bitIndex1)
% 31.96/31.91 <=> v3049(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2438,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3065(VarCurr,bitIndex2)
% 31.96/31.91 <=> v3044(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2437,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3065(VarCurr,bitIndex3)
% 31.96/31.91 <=> v3039(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2436,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3065(VarCurr,bitIndex4)
% 31.96/31.91 <=> v3012(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addBitVectorEqualityBitBlasted_119,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3060(VarCurr)
% 31.96/31.91 <=> ( ( v2290(VarCurr,bitIndex4)
% 31.96/31.91 <=> $false )
% 31.96/31.91 & ( v2290(VarCurr,bitIndex3)
% 31.96/31.91 <=> $false )
% 31.96/31.91 & ( v2290(VarCurr,bitIndex2)
% 31.96/31.91 <=> $false )
% 31.96/31.91 & ( v2290(VarCurr,bitIndex1)
% 31.96/31.91 <=> $false )
% 31.96/31.91 & ( v2290(VarCurr,bitIndex0)
% 31.96/31.91 <=> $false ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addBitVectorEqualityBitBlasted_118,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3057(VarCurr)
% 31.96/31.91 <=> ( ( v2261(VarCurr,bitIndex1)
% 31.96/31.91 <=> $true )
% 31.96/31.91 & ( v2261(VarCurr,bitIndex0)
% 31.96/31.91 <=> $true ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(aaddConditionBooleanCondEqualRangesElseBranch_83,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v741(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v3005(VarCurr,B)
% 31.96/31.91 <=> v3006(VarCurr,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addConditionBooleanCondEqualRangesThenBranch_86,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v741(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v3005(VarCurr,B)
% 31.96/31.91 <=> b01(B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(aaddConditionBooleanCondEqualRangesElseBranch_82,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v3007(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v3006(VarCurr,B)
% 31.96/31.91 <=> v3008(VarCurr,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addConditionBooleanCondEqualRangesThenBranch_85,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3007(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v3006(VarCurr,B)
% 31.96/31.91 <=> $false ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(aaddConditionBooleanCondEqualRangesElseBranch_81,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v3009(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v3008(VarCurr,B)
% 31.96/31.91 <=> b10(B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addConditionBooleanCondEqualRangesThenBranch_84,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3009(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v3008(VarCurr,B)
% 31.96/31.91 <=> $true ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addBitVectorEqualityBitBlasted_117,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3009(VarCurr)
% 31.96/31.91 <=> ( ( v3010(VarCurr,bitIndex4)
% 31.96/31.91 <=> $true )
% 31.96/31.91 & ( v3010(VarCurr,bitIndex3)
% 31.96/31.91 <=> $true )
% 31.96/31.91 & ( v3010(VarCurr,bitIndex2)
% 31.96/31.91 <=> $true )
% 31.96/31.91 & ( v3010(VarCurr,bitIndex1)
% 31.96/31.91 <=> $true )
% 31.96/31.91 & ( v3010(VarCurr,bitIndex0)
% 31.96/31.91 <=> $true ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(bitBlastConstant_615,axiom,
% 31.96/31.91 b11111(bitIndex4) ).
% 31.96/31.91
% 31.96/31.91 fof(bitBlastConstant_614,axiom,
% 31.96/31.91 b11111(bitIndex3) ).
% 31.96/31.91
% 31.96/31.91 fof(bitBlastConstant_613,axiom,
% 31.96/31.91 b11111(bitIndex2) ).
% 31.96/31.91
% 31.96/31.91 fof(bitBlastConstant_612,axiom,
% 31.96/31.91 b11111(bitIndex1) ).
% 31.96/31.91
% 31.96/31.91 fof(bitBlastConstant_611,axiom,
% 31.96/31.91 b11111(bitIndex0) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2435,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3010(VarCurr,bitIndex0)
% 31.96/31.91 <=> v3054(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2434,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3010(VarCurr,bitIndex1)
% 31.96/31.91 <=> v3049(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2433,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3010(VarCurr,bitIndex2)
% 31.96/31.91 <=> v3044(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2432,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3010(VarCurr,bitIndex3)
% 31.96/31.91 <=> v3039(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2431,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3010(VarCurr,bitIndex4)
% 31.96/31.91 <=> v3012(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_589,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3054(VarCurr)
% 31.96/31.91 <=> ( v3055(VarCurr)
% 31.96/31.91 & v3056(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_588,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3056(VarCurr)
% 31.96/31.91 <=> ( v2290(VarCurr,bitIndex0)
% 31.96/31.91 | v2927(VarCurr,bitIndex0) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_587,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3055(VarCurr)
% 31.96/31.91 <=> ( v2898(VarCurr)
% 31.96/31.91 | v2981(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_586,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3049(VarCurr)
% 31.96/31.91 <=> ( v3050(VarCurr)
% 31.96/31.91 & v3053(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_585,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3053(VarCurr)
% 31.96/31.91 <=> ( v3021(VarCurr)
% 31.96/31.91 | v3022(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_584,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3050(VarCurr)
% 31.96/31.91 <=> ( v3051(VarCurr)
% 31.96/31.91 | v3052(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_276,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v3052(VarCurr)
% 31.96/31.91 <=> v3022(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_275,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v3051(VarCurr)
% 31.96/31.91 <=> v3021(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_583,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3044(VarCurr)
% 31.96/31.91 <=> ( v3045(VarCurr)
% 31.96/31.91 & v3048(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_582,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3048(VarCurr)
% 31.96/31.91 <=> ( v3019(VarCurr)
% 31.96/31.91 | v3026(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_581,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3045(VarCurr)
% 31.96/31.91 <=> ( v3046(VarCurr)
% 31.96/31.91 | v3047(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_274,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v3047(VarCurr)
% 31.96/31.91 <=> v3026(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_273,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v3046(VarCurr)
% 31.96/31.91 <=> v3019(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_580,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3039(VarCurr)
% 31.96/31.91 <=> ( v3040(VarCurr)
% 31.96/31.91 & v3043(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_579,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3043(VarCurr)
% 31.96/31.91 <=> ( v3017(VarCurr)
% 31.96/31.91 | v3030(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_578,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3040(VarCurr)
% 31.96/31.91 <=> ( v3041(VarCurr)
% 31.96/31.91 | v3042(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_272,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v3042(VarCurr)
% 31.96/31.91 <=> v3030(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_271,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v3041(VarCurr)
% 31.96/31.91 <=> v3017(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_577,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3012(VarCurr)
% 31.96/31.91 <=> ( v3013(VarCurr)
% 31.96/31.91 & v3038(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_576,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3038(VarCurr)
% 31.96/31.91 <=> ( v3015(VarCurr)
% 31.96/31.91 | v3035(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_575,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3013(VarCurr)
% 31.96/31.91 <=> ( v3014(VarCurr)
% 31.96/31.91 | v3034(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_270,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v3034(VarCurr)
% 31.96/31.91 <=> v3035(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_574,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3035(VarCurr)
% 31.96/31.91 <=> ( v3036(VarCurr)
% 31.96/31.91 & v3037(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_508,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3037(VarCurr)
% 31.96/31.91 <=> ( v2290(VarCurr,bitIndex4)
% 31.96/31.91 | v2927(VarCurr,bitIndex4) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_573,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3036(VarCurr)
% 31.96/31.91 <=> ( v2884(VarCurr)
% 31.96/31.91 | v2967(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_269,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v3014(VarCurr)
% 31.96/31.91 <=> v3015(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_572,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3015(VarCurr)
% 31.96/31.91 <=> ( v3016(VarCurr)
% 31.96/31.91 | v3033(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_507,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3033(VarCurr)
% 31.96/31.91 <=> ( v2290(VarCurr,bitIndex3)
% 31.96/31.91 & v2927(VarCurr,bitIndex3) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_571,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3016(VarCurr)
% 31.96/31.91 <=> ( v3017(VarCurr)
% 31.96/31.91 & v3030(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_570,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3030(VarCurr)
% 31.96/31.91 <=> ( v3031(VarCurr)
% 31.96/31.91 & v3032(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_506,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3032(VarCurr)
% 31.96/31.91 <=> ( v2290(VarCurr,bitIndex3)
% 31.96/31.91 | v2927(VarCurr,bitIndex3) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_569,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3031(VarCurr)
% 31.96/31.91 <=> ( v2889(VarCurr)
% 31.96/31.91 | v2972(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_568,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3017(VarCurr)
% 31.96/31.91 <=> ( v3018(VarCurr)
% 31.96/31.91 | v3029(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_505,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3029(VarCurr)
% 31.96/31.91 <=> ( v2290(VarCurr,bitIndex2)
% 31.96/31.91 & v2927(VarCurr,bitIndex2) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_567,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3018(VarCurr)
% 31.96/31.91 <=> ( v3019(VarCurr)
% 31.96/31.91 & v3026(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_566,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3026(VarCurr)
% 31.96/31.91 <=> ( v3027(VarCurr)
% 31.96/31.91 & v3028(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_504,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3028(VarCurr)
% 31.96/31.91 <=> ( v2290(VarCurr,bitIndex2)
% 31.96/31.91 | v2927(VarCurr,bitIndex2) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_565,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3027(VarCurr)
% 31.96/31.91 <=> ( v2894(VarCurr)
% 31.96/31.91 | v2977(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_564,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3019(VarCurr)
% 31.96/31.91 <=> ( v3020(VarCurr)
% 31.96/31.91 | v3025(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_503,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3025(VarCurr)
% 31.96/31.91 <=> ( v2290(VarCurr,bitIndex1)
% 31.96/31.91 & v2927(VarCurr,bitIndex1) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_563,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3020(VarCurr)
% 31.96/31.91 <=> ( v3021(VarCurr)
% 31.96/31.91 & v3022(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_562,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3022(VarCurr)
% 31.96/31.91 <=> ( v3023(VarCurr)
% 31.96/31.91 & v3024(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_502,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3024(VarCurr)
% 31.96/31.91 <=> ( v2290(VarCurr,bitIndex1)
% 31.96/31.91 | v2927(VarCurr,bitIndex1) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_561,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3023(VarCurr)
% 31.96/31.91 <=> ( v2899(VarCurr)
% 31.96/31.91 | v2982(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_560,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3021(VarCurr)
% 31.96/31.91 <=> ( v2290(VarCurr,bitIndex0)
% 31.96/31.91 & v2927(VarCurr,bitIndex0) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addBitVectorEqualityBitBlasted_116,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3007(VarCurr)
% 31.96/31.91 <=> ( ( v2290(VarCurr,bitIndex4)
% 31.96/31.91 <=> $false )
% 31.96/31.91 & ( v2290(VarCurr,bitIndex3)
% 31.96/31.91 <=> $false )
% 31.96/31.91 & ( v2290(VarCurr,bitIndex2)
% 31.96/31.91 <=> $false )
% 31.96/31.91 & ( v2290(VarCurr,bitIndex1)
% 31.96/31.91 <=> $false )
% 31.96/31.91 & ( v2290(VarCurr,bitIndex0)
% 31.96/31.91 <=> $false ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addBitVectorEqualityBitBlasted_115,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3004(VarCurr)
% 31.96/31.91 <=> ( ( v2261(VarCurr,bitIndex1)
% 31.96/31.91 <=> $true )
% 31.96/31.91 & ( v2261(VarCurr,bitIndex0)
% 31.96/31.91 <=> $false ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(aaddConditionBooleanCondEqualRangesElseBranch_80,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2994(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v2993(VarCurr,B)
% 31.96/31.91 <=> v2996(VarCurr,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addConditionBooleanCondEqualRangesThenBranch_83,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2994(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v2993(VarCurr,B)
% 31.96/31.91 <=> $false ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(aaddConditionBooleanCondEqualRangesElseBranch_79,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2997(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v2996(VarCurr,B)
% 31.96/31.91 <=> b01(B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addConditionBooleanCondEqualRangesThenBranch_82,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2997(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v2996(VarCurr,B)
% 31.96/31.91 <=> b10(B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_559,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2997(VarCurr)
% 31.96/31.91 <=> ( v320(VarCurr)
% 31.96/31.91 & v2998(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_268,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2998(VarCurr)
% 31.96/31.91 <=> v3000(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_558,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3000(VarCurr)
% 31.96/31.91 <=> ( v3001(VarCurr)
% 31.96/31.91 & v2884(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_557,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3001(VarCurr)
% 31.96/31.91 <=> ( v3002(VarCurr)
% 31.96/31.91 & v2889(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_556,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3002(VarCurr)
% 31.96/31.91 <=> ( v3003(VarCurr)
% 31.96/31.91 & v2894(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_555,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v3003(VarCurr)
% 31.96/31.91 <=> ( v2898(VarCurr)
% 31.96/31.91 & v2899(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_554,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2994(VarCurr)
% 31.96/31.91 <=> ( v320(VarCurr)
% 31.96/31.91 & v2995(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addBitVectorEqualityBitBlasted_114,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2995(VarCurr)
% 31.96/31.91 <=> ( ( v2290(VarCurr,bitIndex4)
% 31.96/31.91 <=> $false )
% 31.96/31.91 & ( v2290(VarCurr,bitIndex3)
% 31.96/31.91 <=> $false )
% 31.96/31.91 & ( v2290(VarCurr,bitIndex2)
% 31.96/31.91 <=> $false )
% 31.96/31.91 & ( v2290(VarCurr,bitIndex1)
% 31.96/31.91 <=> $false )
% 31.96/31.91 & ( v2290(VarCurr,bitIndex0)
% 31.96/31.91 <=> $false ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addBitVectorEqualityBitBlasted_113,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2992(VarCurr)
% 31.96/31.91 <=> ( ( v2261(VarCurr,bitIndex1)
% 31.96/31.91 <=> $false )
% 31.96/31.91 & ( v2261(VarCurr,bitIndex0)
% 31.96/31.91 <=> $true ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(aaddConditionBooleanCondEqualRangesElseBranch_78,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2265(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v2989(VarCurr,B)
% 31.96/31.91 <=> v2990(VarCurr,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addConditionBooleanCondEqualRangesThenBranch_81,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2265(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v2989(VarCurr,B)
% 31.96/31.91 <=> $false ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(aaddConditionBooleanCondEqualRangesElseBranch_77,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v741(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v2990(VarCurr,B)
% 31.96/31.91 <=> v2991(VarCurr,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addConditionBooleanCondEqualRangesThenBranch_80,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v741(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v2990(VarCurr,B)
% 31.96/31.91 <=> b01(B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(aaddConditionBooleanCondEqualRangesElseBranch_76,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2275(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v2991(VarCurr,B)
% 31.96/31.91 <=> $false ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addConditionBooleanCondEqualRangesThenBranch_79,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2275(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v2991(VarCurr,B)
% 31.96/31.91 <=> b10(B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addBitVectorEqualityBitBlasted_112,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2988(VarCurr)
% 31.96/31.91 <=> ( ( v2261(VarCurr,bitIndex1)
% 31.96/31.91 <=> $false )
% 31.96/31.91 & ( v2261(VarCurr,bitIndex0)
% 31.96/31.91 <=> $false ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addCaseBooleanConditionEqualRanges1_27,axiom,
% 31.96/31.91 ! [VarNext,VarCurr] :
% 31.96/31.91 ( nextState(VarCurr,VarNext)
% 31.96/31.91 => ( ~ v2940(VarNext)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_4_0(B)
% 31.96/31.91 => ( v2927(VarNext,B)
% 31.96/31.91 <=> v2927(VarCurr,B) ) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addCaseBooleanConditionEqualRanges0_39,axiom,
% 31.96/31.91 ! [VarNext] :
% 31.96/31.91 ( v2940(VarNext)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_4_0(B)
% 31.96/31.91 => ( v2927(VarNext,B)
% 31.96/31.91 <=> v2957(VarNext,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2430,axiom,
% 31.96/31.91 ! [VarNext,VarCurr] :
% 31.96/31.91 ( nextState(VarCurr,VarNext)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_4_0(B)
% 31.96/31.91 => ( v2957(VarNext,B)
% 31.96/31.91 <=> v2955(VarCurr,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(aaddConditionBooleanCondEqualRangesElseBranch_75,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2952(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_4_0(B)
% 31.96/31.91 => ( v2955(VarCurr,B)
% 31.96/31.91 <=> v2958(VarCurr,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addConditionBooleanCondEqualRangesThenBranch_78,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2952(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_4_0(B)
% 31.96/31.91 => ( v2955(VarCurr,B)
% 31.96/31.91 <=> $false ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(aaddConditionBooleanCondEqualRangesElseBranch_74,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2929(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_4_0(B)
% 31.96/31.91 => ( v2958(VarCurr,B)
% 31.96/31.91 <=> v2959(VarCurr,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addConditionBooleanCondEqualRangesThenBranch_77,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2929(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_4_0(B)
% 31.96/31.91 => ( v2958(VarCurr,B)
% 31.96/31.91 <=> $false ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2429,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2959(VarCurr,bitIndex0)
% 31.96/31.91 <=> v2981(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2428,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2959(VarCurr,bitIndex1)
% 31.96/31.91 <=> v2979(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2427,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2959(VarCurr,bitIndex2)
% 31.96/31.91 <=> v2974(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2426,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2959(VarCurr,bitIndex3)
% 31.96/31.91 <=> v2969(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2425,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2959(VarCurr,bitIndex4)
% 31.96/31.91 <=> v2961(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_553,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2979(VarCurr)
% 31.96/31.91 <=> ( v2980(VarCurr)
% 31.96/31.91 & v2983(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_501,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2983(VarCurr)
% 31.96/31.91 <=> ( v2927(VarCurr,bitIndex0)
% 31.96/31.91 | v2927(VarCurr,bitIndex1) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_552,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2980(VarCurr)
% 31.96/31.91 <=> ( v2981(VarCurr)
% 31.96/31.91 | v2982(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_267,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2982(VarCurr)
% 31.96/31.91 <=> v2927(VarCurr,bitIndex1) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_266,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2981(VarCurr)
% 31.96/31.91 <=> v2927(VarCurr,bitIndex0) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_551,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2974(VarCurr)
% 31.96/31.91 <=> ( v2975(VarCurr)
% 31.96/31.91 & v2978(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_500,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2978(VarCurr)
% 31.96/31.91 <=> ( v2966(VarCurr)
% 31.96/31.91 | v2927(VarCurr,bitIndex2) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_550,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2975(VarCurr)
% 31.96/31.91 <=> ( v2976(VarCurr)
% 31.96/31.91 | v2977(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_265,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2977(VarCurr)
% 31.96/31.91 <=> v2927(VarCurr,bitIndex2) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_264,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2976(VarCurr)
% 31.96/31.91 <=> v2966(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_549,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2969(VarCurr)
% 31.96/31.91 <=> ( v2970(VarCurr)
% 31.96/31.91 & v2973(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_499,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2973(VarCurr)
% 31.96/31.91 <=> ( v2965(VarCurr)
% 31.96/31.91 | v2927(VarCurr,bitIndex3) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_548,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2970(VarCurr)
% 31.96/31.91 <=> ( v2971(VarCurr)
% 31.96/31.91 | v2972(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_263,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2972(VarCurr)
% 31.96/31.91 <=> v2927(VarCurr,bitIndex3) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_262,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2971(VarCurr)
% 31.96/31.91 <=> v2965(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_547,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2961(VarCurr)
% 31.96/31.91 <=> ( v2962(VarCurr)
% 31.96/31.91 & v2968(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_498,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2968(VarCurr)
% 31.96/31.91 <=> ( v2964(VarCurr)
% 31.96/31.91 | v2927(VarCurr,bitIndex4) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_546,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2962(VarCurr)
% 31.96/31.91 <=> ( v2963(VarCurr)
% 31.96/31.91 | v2967(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_261,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2967(VarCurr)
% 31.96/31.91 <=> v2927(VarCurr,bitIndex4) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_260,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2963(VarCurr)
% 31.96/31.91 <=> v2964(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_497,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2964(VarCurr)
% 31.96/31.91 <=> ( v2965(VarCurr)
% 31.96/31.91 & v2927(VarCurr,bitIndex3) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_496,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2965(VarCurr)
% 31.96/31.91 <=> ( v2966(VarCurr)
% 31.96/31.91 & v2927(VarCurr,bitIndex2) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_495,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2966(VarCurr)
% 31.96/31.91 <=> ( v2927(VarCurr,bitIndex0)
% 31.96/31.91 & v2927(VarCurr,bitIndex1) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_545,axiom,
% 31.96/31.91 ! [VarNext,VarCurr] :
% 31.96/31.91 ( nextState(VarCurr,VarNext)
% 31.96/31.91 => ( v2940(VarNext)
% 31.96/31.91 <=> ( v2941(VarNext)
% 31.96/31.91 & v2948(VarNext) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2424,axiom,
% 31.96/31.91 ! [VarNext,VarCurr] :
% 31.96/31.91 ( nextState(VarCurr,VarNext)
% 31.96/31.91 => ( v2948(VarNext)
% 31.96/31.91 <=> v2946(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_544,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2946(VarCurr)
% 31.96/31.91 <=> ( v2949(VarCurr)
% 31.96/31.91 | v2952(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_543,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2952(VarCurr)
% 31.96/31.91 <=> ( v2953(VarCurr)
% 31.96/31.91 | v2954(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_259,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2954(VarCurr)
% 31.96/31.91 <=> v1908(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_258,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2953(VarCurr)
% 31.96/31.91 <=> v12(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_542,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2949(VarCurr)
% 31.96/31.91 <=> ( v2950(VarCurr)
% 31.96/31.91 | v2929(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_541,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2950(VarCurr)
% 31.96/31.91 <=> ( v2265(VarCurr)
% 31.96/31.91 & v2951(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addBitVectorEqualityBitBlasted_111,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2951(VarCurr)
% 31.96/31.91 <=> ( ( v2261(VarCurr,bitIndex1)
% 31.96/31.91 <=> $true )
% 31.96/31.91 & ( v2261(VarCurr,bitIndex0)
% 31.96/31.91 <=> $false ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_540,axiom,
% 31.96/31.91 ! [VarNext,VarCurr] :
% 31.96/31.91 ( nextState(VarCurr,VarNext)
% 31.96/31.91 => ( v2941(VarNext)
% 31.96/31.91 <=> ( v2942(VarNext)
% 31.96/31.91 & v288(VarNext) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_257,axiom,
% 31.96/31.91 ! [VarNext,VarCurr] :
% 31.96/31.91 ( nextState(VarCurr,VarNext)
% 31.96/31.91 => ( ~ v2942(VarNext)
% 31.96/31.91 <=> v1891(VarNext) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignmentInitValueVector_32,axiom,
% 31.96/31.91 ! [B] :
% 31.96/31.91 ( range_4_0(B)
% 31.96/31.91 => ( v2927(constB0,B)
% 31.96/31.91 <=> $false ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_539,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2929(VarCurr)
% 31.96/31.91 <=> ( v2931(VarCurr)
% 31.96/31.91 | v2933(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_538,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2933(VarCurr)
% 31.96/31.91 <=> ( v2934(VarCurr)
% 31.96/31.91 & v2937(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addBitVectorEqualityBitBlasted_110,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2937(VarCurr)
% 31.96/31.91 <=> ( ( v2290(VarCurr,bitIndex4)
% 31.96/31.91 <=> $false )
% 31.96/31.91 & ( v2290(VarCurr,bitIndex3)
% 31.96/31.91 <=> $false )
% 31.96/31.91 & ( v2290(VarCurr,bitIndex2)
% 31.96/31.91 <=> $false )
% 31.96/31.91 & ( v2290(VarCurr,bitIndex1)
% 31.96/31.91 <=> $false )
% 31.96/31.91 & ( v2290(VarCurr,bitIndex0)
% 31.96/31.91 <=> $false ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_537,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2934(VarCurr)
% 31.96/31.91 <=> ( v2935(VarCurr)
% 31.96/31.91 | v2936(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addBitVectorEqualityBitBlasted_109,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2936(VarCurr)
% 31.96/31.91 <=> ( ( v2261(VarCurr,bitIndex1)
% 31.96/31.91 <=> $true )
% 31.96/31.91 & ( v2261(VarCurr,bitIndex0)
% 31.96/31.91 <=> $true ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addBitVectorEqualityBitBlasted_108,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2935(VarCurr)
% 31.96/31.91 <=> ( ( v2261(VarCurr,bitIndex1)
% 31.96/31.91 <=> $true )
% 31.96/31.91 & ( v2261(VarCurr,bitIndex0)
% 31.96/31.91 <=> $false ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_536,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2931(VarCurr)
% 31.96/31.91 <=> ( v2932(VarCurr)
% 31.96/31.91 & v320(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addBitVectorEqualityBitBlasted_107,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2932(VarCurr)
% 31.96/31.91 <=> ( ( v2261(VarCurr,bitIndex1)
% 31.96/31.91 <=> $false )
% 31.96/31.91 & ( v2261(VarCurr,bitIndex0)
% 31.96/31.91 <=> $true ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignmentInitValueVector_31,axiom,
% 31.96/31.91 ! [B] :
% 31.96/31.91 ( range_1_0(B)
% 31.96/31.91 => ( v2261(constB0,B)
% 31.96/31.91 <=> $false ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addCaseBooleanConditionEqualRanges1_26,axiom,
% 31.96/31.91 ! [VarNext,VarCurr] :
% 31.96/31.91 ( nextState(VarCurr,VarNext)
% 31.96/31.91 => ( ~ v2855(VarNext)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_4_0(B)
% 31.96/31.91 => ( v2290(VarNext,B)
% 31.96/31.91 <=> v2290(VarCurr,B) ) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addCaseBooleanConditionEqualRanges0_38,axiom,
% 31.96/31.91 ! [VarNext] :
% 31.96/31.91 ( v2855(VarNext)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_4_0(B)
% 31.96/31.91 => ( v2290(VarNext,B)
% 31.96/31.91 <=> v2874(VarNext,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2423,axiom,
% 31.96/31.91 ! [VarNext,VarCurr] :
% 31.96/31.91 ( nextState(VarCurr,VarNext)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_4_0(B)
% 31.96/31.91 => ( v2874(VarNext,B)
% 31.96/31.91 <=> v2872(VarCurr,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(aaddConditionBooleanCondEqualRangesElseBranch_73,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2869(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_4_0(B)
% 31.96/31.91 => ( v2872(VarCurr,B)
% 31.96/31.91 <=> v2875(VarCurr,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addConditionBooleanCondEqualRangesThenBranch_76,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2869(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_4_0(B)
% 31.96/31.91 => ( v2872(VarCurr,B)
% 31.96/31.91 <=> $false ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(aaddConditionBooleanCondEqualRangesElseBranch_72,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2867(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_4_0(B)
% 31.96/31.91 => ( v2875(VarCurr,B)
% 31.96/31.91 <=> v2901(VarCurr,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addConditionBooleanCondEqualRangesThenBranch_75,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2867(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_4_0(B)
% 31.96/31.91 => ( v2875(VarCurr,B)
% 31.96/31.91 <=> v2876(VarCurr,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2422,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2901(VarCurr,bitIndex0)
% 31.96/31.91 <=> v2898(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2421,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2901(VarCurr,bitIndex1)
% 31.96/31.91 <=> v2921(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2420,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2901(VarCurr,bitIndex2)
% 31.96/31.91 <=> v2917(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2419,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2901(VarCurr,bitIndex3)
% 31.96/31.91 <=> v2913(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2418,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2901(VarCurr,bitIndex4)
% 31.96/31.91 <=> v2903(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_535,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2921(VarCurr)
% 31.96/31.91 <=> ( v2922(VarCurr)
% 31.96/31.91 & v2923(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_534,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2923(VarCurr)
% 31.96/31.91 <=> ( v2290(VarCurr,bitIndex0)
% 31.96/31.91 | v2899(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_494,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2922(VarCurr)
% 31.96/31.91 <=> ( v2898(VarCurr)
% 31.96/31.91 | v2290(VarCurr,bitIndex1) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_533,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2917(VarCurr)
% 31.96/31.91 <=> ( v2918(VarCurr)
% 31.96/31.91 & v2920(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_532,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2920(VarCurr)
% 31.96/31.91 <=> ( v2894(VarCurr)
% 31.96/31.91 | v2910(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_493,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2918(VarCurr)
% 31.96/31.91 <=> ( v2290(VarCurr,bitIndex2)
% 31.96/31.91 | v2919(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_256,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2919(VarCurr)
% 31.96/31.91 <=> v2910(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_531,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2913(VarCurr)
% 31.96/31.91 <=> ( v2914(VarCurr)
% 31.96/31.91 & v2916(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_530,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2916(VarCurr)
% 31.96/31.91 <=> ( v2889(VarCurr)
% 31.96/31.91 | v2908(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_492,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2914(VarCurr)
% 31.96/31.91 <=> ( v2290(VarCurr,bitIndex3)
% 31.96/31.91 | v2915(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_255,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2915(VarCurr)
% 31.96/31.91 <=> v2908(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_529,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2903(VarCurr)
% 31.96/31.91 <=> ( v2904(VarCurr)
% 31.96/31.91 & v2912(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_528,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2912(VarCurr)
% 31.96/31.91 <=> ( v2884(VarCurr)
% 31.96/31.91 | v2906(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_491,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2904(VarCurr)
% 31.96/31.91 <=> ( v2290(VarCurr,bitIndex4)
% 31.96/31.91 | v2905(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_254,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2905(VarCurr)
% 31.96/31.91 <=> v2906(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_490,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2906(VarCurr)
% 31.96/31.91 <=> ( v2290(VarCurr,bitIndex3)
% 31.96/31.91 | v2907(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_527,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2907(VarCurr)
% 31.96/31.91 <=> ( v2889(VarCurr)
% 31.96/31.91 & v2908(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_489,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2908(VarCurr)
% 31.96/31.91 <=> ( v2290(VarCurr,bitIndex2)
% 31.96/31.91 | v2909(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_526,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2909(VarCurr)
% 31.96/31.91 <=> ( v2894(VarCurr)
% 31.96/31.91 & v2910(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_488,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2910(VarCurr)
% 31.96/31.91 <=> ( v2290(VarCurr,bitIndex1)
% 31.96/31.91 | v2911(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_525,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2911(VarCurr)
% 31.96/31.91 <=> ( v2290(VarCurr,bitIndex0)
% 31.96/31.91 & v2899(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2417,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2876(VarCurr,bitIndex0)
% 31.96/31.91 <=> v2898(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2416,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2876(VarCurr,bitIndex1)
% 31.96/31.91 <=> v2896(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2415,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2876(VarCurr,bitIndex2)
% 31.96/31.91 <=> v2891(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2414,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2876(VarCurr,bitIndex3)
% 31.96/31.91 <=> v2886(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2413,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2876(VarCurr,bitIndex4)
% 31.96/31.91 <=> v2878(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_524,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2896(VarCurr)
% 31.96/31.91 <=> ( v2897(VarCurr)
% 31.96/31.91 & v2900(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_487,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2900(VarCurr)
% 31.96/31.91 <=> ( v2290(VarCurr,bitIndex0)
% 31.96/31.91 | v2290(VarCurr,bitIndex1) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_523,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2897(VarCurr)
% 31.96/31.91 <=> ( v2898(VarCurr)
% 31.96/31.91 | v2899(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_253,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2899(VarCurr)
% 31.96/31.91 <=> v2290(VarCurr,bitIndex1) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_252,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2898(VarCurr)
% 31.96/31.91 <=> v2290(VarCurr,bitIndex0) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_522,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2891(VarCurr)
% 31.96/31.91 <=> ( v2892(VarCurr)
% 31.96/31.91 & v2895(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_486,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2895(VarCurr)
% 31.96/31.91 <=> ( v2883(VarCurr)
% 31.96/31.91 | v2290(VarCurr,bitIndex2) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_521,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2892(VarCurr)
% 31.96/31.91 <=> ( v2893(VarCurr)
% 31.96/31.91 | v2894(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_251,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2894(VarCurr)
% 31.96/31.91 <=> v2290(VarCurr,bitIndex2) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_250,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2893(VarCurr)
% 31.96/31.91 <=> v2883(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_520,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2886(VarCurr)
% 31.96/31.91 <=> ( v2887(VarCurr)
% 31.96/31.91 & v2890(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_485,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2890(VarCurr)
% 31.96/31.91 <=> ( v2882(VarCurr)
% 31.96/31.91 | v2290(VarCurr,bitIndex3) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_519,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2887(VarCurr)
% 31.96/31.91 <=> ( v2888(VarCurr)
% 31.96/31.91 | v2889(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_249,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2889(VarCurr)
% 31.96/31.91 <=> v2290(VarCurr,bitIndex3) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_248,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2888(VarCurr)
% 31.96/31.91 <=> v2882(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_518,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2878(VarCurr)
% 31.96/31.91 <=> ( v2879(VarCurr)
% 31.96/31.91 & v2885(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_484,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2885(VarCurr)
% 31.96/31.91 <=> ( v2881(VarCurr)
% 31.96/31.91 | v2290(VarCurr,bitIndex4) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_517,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2879(VarCurr)
% 31.96/31.91 <=> ( v2880(VarCurr)
% 31.96/31.91 | v2884(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_247,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2884(VarCurr)
% 31.96/31.91 <=> v2290(VarCurr,bitIndex4) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_246,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2880(VarCurr)
% 31.96/31.91 <=> v2881(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_483,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2881(VarCurr)
% 31.96/31.91 <=> ( v2882(VarCurr)
% 31.96/31.91 & v2290(VarCurr,bitIndex3) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_482,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2882(VarCurr)
% 31.96/31.91 <=> ( v2883(VarCurr)
% 31.96/31.91 & v2290(VarCurr,bitIndex2) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorShiftedRanges_481,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2883(VarCurr)
% 31.96/31.91 <=> ( v2290(VarCurr,bitIndex0)
% 31.96/31.91 & v2290(VarCurr,bitIndex1) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_516,axiom,
% 31.96/31.91 ! [VarNext,VarCurr] :
% 31.96/31.91 ( nextState(VarCurr,VarNext)
% 31.96/31.91 => ( v2855(VarNext)
% 31.96/31.91 <=> ( v2856(VarNext)
% 31.96/31.91 & v2863(VarNext) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2412,axiom,
% 31.96/31.91 ! [VarNext,VarCurr] :
% 31.96/31.91 ( nextState(VarCurr,VarNext)
% 31.96/31.91 => ( v2863(VarNext)
% 31.96/31.91 <=> v2861(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_515,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2861(VarCurr)
% 31.96/31.91 <=> ( v2864(VarCurr)
% 31.96/31.91 | v2869(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_514,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2869(VarCurr)
% 31.96/31.91 <=> ( v2870(VarCurr)
% 31.96/31.91 | v2871(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_245,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2871(VarCurr)
% 31.96/31.91 <=> v1908(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_244,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2870(VarCurr)
% 31.96/31.91 <=> v12(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_513,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2864(VarCurr)
% 31.96/31.91 <=> ( v2865(VarCurr)
% 31.96/31.91 | v2867(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_512,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2867(VarCurr)
% 31.96/31.91 <=> ( v2275(VarCurr)
% 31.96/31.91 & v2868(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_243,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2868(VarCurr)
% 31.96/31.91 <=> v2292(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_511,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2865(VarCurr)
% 31.96/31.91 <=> ( v2866(VarCurr)
% 31.96/31.91 & v2292(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_242,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2866(VarCurr)
% 31.96/31.91 <=> v2275(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_510,axiom,
% 31.96/31.91 ! [VarNext,VarCurr] :
% 31.96/31.91 ( nextState(VarCurr,VarNext)
% 31.96/31.91 => ( v2856(VarNext)
% 31.96/31.91 <=> ( v2857(VarNext)
% 31.96/31.91 & v288(VarNext) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_241,axiom,
% 31.96/31.91 ! [VarNext,VarCurr] :
% 31.96/31.91 ( nextState(VarCurr,VarNext)
% 31.96/31.91 => ( ~ v2857(VarNext)
% 31.96/31.91 <=> v1891(VarNext) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignmentInitValueVector_30,axiom,
% 31.96/31.91 ! [B] :
% 31.96/31.91 ( range_4_0(B)
% 31.96/31.91 => ( v2290(constB0,B)
% 31.96/31.91 <=> $false ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_509,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2292(VarCurr)
% 31.96/31.91 <=> ( v2294(VarCurr)
% 31.96/31.91 & v2852(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addBitVectorEqualityBitBlasted_106,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2852(VarCurr)
% 31.96/31.91 <=> ( v2775(VarCurr)
% 31.96/31.91 <=> $true ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2411,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2775(VarCurr)
% 31.96/31.91 <=> v2777(VarCurr,bitIndex3) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2410,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2777(VarCurr,bitIndex3)
% 31.96/31.91 <=> v2779(VarCurr,bitIndex3) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2409,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2779(VarCurr,bitIndex3)
% 31.96/31.91 <=> v2781(VarCurr,bitIndex3) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2408,axiom,
% 31.96/31.91 ! [VarNext] :
% 31.96/31.91 ( v2781(VarNext,bitIndex3)
% 31.96/31.91 <=> v2836(VarNext,bitIndex3) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addCaseBooleanConditionEqualRanges1_25,axiom,
% 31.96/31.91 ! [VarNext,VarCurr] :
% 31.96/31.91 ( nextState(VarCurr,VarNext)
% 31.96/31.91 => ( ~ v2837(VarNext)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_3_0(B)
% 31.96/31.91 => ( v2836(VarNext,B)
% 31.96/31.91 <=> v2781(VarCurr,B) ) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addCaseBooleanConditionEqualRanges0_37,axiom,
% 31.96/31.91 ! [VarNext] :
% 31.96/31.91 ( v2837(VarNext)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_3_0(B)
% 31.96/31.91 => ( v2836(VarNext,B)
% 31.96/31.91 <=> v2847(VarNext,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2407,axiom,
% 31.96/31.91 ! [VarNext,VarCurr] :
% 31.96/31.91 ( nextState(VarCurr,VarNext)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_3_0(B)
% 31.96/31.91 => ( v2847(VarNext,B)
% 31.96/31.91 <=> v2845(VarCurr,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(aaddConditionBooleanCondEqualRangesElseBranch_71,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2848(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_3_0(B)
% 31.96/31.91 => ( v2845(VarCurr,B)
% 31.96/31.91 <=> v2785(VarCurr,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addConditionBooleanCondEqualRangesThenBranch_74,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2848(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_3_0(B)
% 31.96/31.91 => ( v2845(VarCurr,B)
% 31.96/31.91 <=> $false ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_240,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2848(VarCurr)
% 31.96/31.91 <=> v2783(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_508,axiom,
% 31.96/31.91 ! [VarNext,VarCurr] :
% 31.96/31.91 ( nextState(VarCurr,VarNext)
% 31.96/31.91 => ( v2837(VarNext)
% 31.96/31.91 <=> v2838(VarNext) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_507,axiom,
% 31.96/31.91 ! [VarNext,VarCurr] :
% 31.96/31.91 ( nextState(VarCurr,VarNext)
% 31.96/31.91 => ( v2838(VarNext)
% 31.96/31.91 <=> ( v2839(VarNext)
% 31.96/31.91 & v2834(VarNext) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeUnaryOperator_239,axiom,
% 31.96/31.91 ! [VarNext,VarCurr] :
% 31.96/31.91 ( nextState(VarCurr,VarNext)
% 31.96/31.91 => ( ~ v2839(VarNext)
% 31.96/31.91 <=> v2841(VarNext) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2406,axiom,
% 31.96/31.91 ! [VarNext,VarCurr] :
% 31.96/31.91 ( nextState(VarCurr,VarNext)
% 31.96/31.91 => ( v2841(VarNext)
% 31.96/31.91 <=> v2834(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2405,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2834(VarCurr)
% 31.96/31.91 <=> v195(VarCurr) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2404,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2785(VarCurr,bitIndex3)
% 31.96/31.91 <=> v2832(VarCurr,bitIndex3) ) ).
% 31.96/31.91
% 31.96/31.91 fof(aaddConditionBooleanCondEqualRangesElseBranch_70,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2787(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_3_0(B)
% 31.96/31.91 => ( v2832(VarCurr,B)
% 31.96/31.91 <=> v2793(VarCurr,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addConditionBooleanCondEqualRangesThenBranch_73,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2787(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_3_0(B)
% 31.96/31.91 => ( v2832(VarCurr,B)
% 31.96/31.91 <=> b0011(B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addAssignment_2403,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2793(VarCurr,bitIndex3)
% 31.96/31.91 <=> v2804(VarCurr,bitIndex3) ) ).
% 31.96/31.91
% 31.96/31.91 fof(aaddConditionBooleanCondEqualRangesElseBranch_69,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2805(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_3_0(B)
% 31.96/31.91 => ( v2804(VarCurr,B)
% 31.96/31.91 <=> $false ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addConditionBooleanCondEqualRangesThenBranch_72,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2805(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_3_0(B)
% 31.96/31.91 => ( v2804(VarCurr,B)
% 31.96/31.91 <=> v2828(VarCurr,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addParallelCaseBooleanConditionEqualRanges5_1,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ( ~ v2810(VarCurr)
% 31.96/31.91 & ~ v2812(VarCurr)
% 31.96/31.91 & ~ v2815(VarCurr)
% 31.96/31.91 & ~ v2822(VarCurr)
% 31.96/31.91 & ~ v2823(VarCurr) )
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_3_0(B)
% 31.96/31.91 => ( v2828(VarCurr,B)
% 31.96/31.91 <=> v2831(VarCurr,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addParallelCaseBooleanConditionEqualRanges4_1,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2823(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_3_0(B)
% 31.96/31.91 => ( v2828(VarCurr,B)
% 31.96/31.91 <=> v2830(VarCurr,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addParallelCaseBooleanConditionEqualRanges3_5,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2822(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_3_0(B)
% 31.96/31.91 => ( v2828(VarCurr,B)
% 31.96/31.91 <=> b0100(B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addParallelCaseBooleanConditionEqualRanges2_7,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2815(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_3_0(B)
% 31.96/31.91 => ( v2828(VarCurr,B)
% 31.96/31.91 <=> $false ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addParallelCaseBooleanConditionEqualRanges1_19,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2812(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_3_0(B)
% 31.96/31.91 => ( v2828(VarCurr,B)
% 31.96/31.91 <=> v2829(VarCurr,B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addParallelCaseBooleanConditionEqualRanges0_19,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2810(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_3_0(B)
% 31.96/31.91 => ( v2828(VarCurr,B)
% 31.96/31.91 <=> b0010(B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(aaddConditionBooleanCondEqualRangesElseBranch_68,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2803(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_3_0(B)
% 31.96/31.91 => ( v2831(VarCurr,B)
% 31.96/31.91 <=> b1001(B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addConditionBooleanCondEqualRangesThenBranch_71,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2803(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_3_0(B)
% 31.96/31.91 => ( v2831(VarCurr,B)
% 31.96/31.91 <=> b1000(B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addParallelCaseBooleanConditionEqualRanges1_18,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2825(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_3_0(B)
% 31.96/31.91 => ( v2830(VarCurr,B)
% 31.96/31.91 <=> b1010(B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addParallelCaseBooleanConditionEqualRanges0_18,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2825(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_3_0(B)
% 31.96/31.91 => ( v2830(VarCurr,B)
% 31.96/31.91 <=> b1011(B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(aaddConditionBooleanCondEqualRangesElseBranch_67,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( ~ v2803(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_3_0(B)
% 31.96/31.91 => ( v2829(VarCurr,B)
% 31.96/31.91 <=> $false ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addConditionBooleanCondEqualRangesThenBranch_70,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2803(VarCurr)
% 31.96/31.91 => ! [B] :
% 31.96/31.91 ( range_3_0(B)
% 31.96/31.91 => ( v2829(VarCurr,B)
% 31.96/31.91 <=> b0001(B) ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_506,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2805(VarCurr)
% 31.96/31.91 <=> ( v2806(VarCurr)
% 31.96/31.91 | v2827(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addBitVectorEqualityBitBlasted_105,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2827(VarCurr)
% 31.96/31.91 <=> ( ( v158(VarCurr,bitIndex6)
% 31.96/31.91 <=> $true )
% 31.96/31.91 & ( v158(VarCurr,bitIndex5)
% 31.96/31.91 <=> $false )
% 31.96/31.91 & ( v158(VarCurr,bitIndex4)
% 31.96/31.91 <=> $false )
% 31.96/31.91 & ( v158(VarCurr,bitIndex3)
% 31.96/31.91 <=> $true )
% 31.96/31.91 & ( v158(VarCurr,bitIndex2)
% 31.96/31.91 <=> $false )
% 31.96/31.91 & ( v158(VarCurr,bitIndex1)
% 31.96/31.91 <=> $true )
% 31.96/31.91 & ( v158(VarCurr,bitIndex0)
% 31.96/31.91 <=> $false ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(bitBlastConstant_610,axiom,
% 31.96/31.91 b1001010(bitIndex6) ).
% 31.96/31.91
% 31.96/31.91 fof(bitBlastConstant_609,axiom,
% 31.96/31.91 ~ b1001010(bitIndex5) ).
% 31.96/31.91
% 31.96/31.91 fof(bitBlastConstant_608,axiom,
% 31.96/31.91 ~ b1001010(bitIndex4) ).
% 31.96/31.91
% 31.96/31.91 fof(bitBlastConstant_607,axiom,
% 31.96/31.91 b1001010(bitIndex3) ).
% 31.96/31.91
% 31.96/31.91 fof(bitBlastConstant_606,axiom,
% 31.96/31.91 ~ b1001010(bitIndex2) ).
% 31.96/31.91
% 31.96/31.91 fof(bitBlastConstant_605,axiom,
% 31.96/31.91 b1001010(bitIndex1) ).
% 31.96/31.91
% 31.96/31.91 fof(bitBlastConstant_604,axiom,
% 31.96/31.91 ~ b1001010(bitIndex0) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_505,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2806(VarCurr)
% 31.96/31.91 <=> ( v2807(VarCurr)
% 31.96/31.91 | v2823(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_504,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2823(VarCurr)
% 31.96/31.91 <=> ( v2824(VarCurr)
% 31.96/31.91 & v2750(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(writeBinaryOperatorEqualRangesSingleBits_503,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2824(VarCurr)
% 31.96/31.91 <=> ( v2825(VarCurr)
% 31.96/31.91 | v2826(VarCurr) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addBitVectorEqualityBitBlasted_104,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2826(VarCurr)
% 31.96/31.91 <=> ( ( v145(VarCurr,bitIndex2)
% 31.96/31.91 <=> $true )
% 31.96/31.91 & ( v145(VarCurr,bitIndex1)
% 31.96/31.91 <=> $true )
% 31.96/31.91 & ( v145(VarCurr,bitIndex0)
% 31.96/31.91 <=> $true ) ) ) ).
% 31.96/31.91
% 31.96/31.91 fof(addBitVectorEqualityBitBlasted_103,axiom,
% 31.96/31.91 ! [VarCurr] :
% 31.96/31.91 ( v2825(VarCurr)
% 31.96/31.91 <=> ( ( v145(VarCurr,bitIndex2)
% 31.96/31.91 <=> $false )
% 31.96/31.91 & ( v145(VarCurr,bitIndex1)
% 31.96/31.91 <=> $false )
% 31.96/31.92 & ( v145(VarCurr,bitIndex0)
% 31.96/31.92 <=> $true ) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_502,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2807(VarCurr)
% 31.96/31.92 <=> ( v2808(VarCurr)
% 31.96/31.92 | v2822(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addBitVectorEqualityBitBlasted_102,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2822(VarCurr)
% 31.96/31.92 <=> ( ( v158(VarCurr,bitIndex6)
% 31.96/31.92 <=> $true )
% 31.96/31.92 & ( v158(VarCurr,bitIndex5)
% 31.96/31.92 <=> $true )
% 31.96/31.92 & ( v158(VarCurr,bitIndex4)
% 31.96/31.92 <=> $true )
% 31.96/31.92 & ( v158(VarCurr,bitIndex3)
% 31.96/31.92 <=> $true )
% 31.96/31.92 & ( v158(VarCurr,bitIndex2)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v158(VarCurr,bitIndex1)
% 31.96/31.92 <=> $true )
% 31.96/31.92 & ( v158(VarCurr,bitIndex0)
% 31.96/31.92 <=> $false ) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_603,axiom,
% 31.96/31.92 b1111010(bitIndex6) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_602,axiom,
% 31.96/31.92 b1111010(bitIndex5) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_601,axiom,
% 31.96/31.92 b1111010(bitIndex4) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_600,axiom,
% 31.96/31.92 b1111010(bitIndex3) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_599,axiom,
% 31.96/31.92 ~ b1111010(bitIndex2) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_598,axiom,
% 31.96/31.92 b1111010(bitIndex1) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_597,axiom,
% 31.96/31.92 ~ b1111010(bitIndex0) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_501,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2808(VarCurr)
% 31.96/31.92 <=> ( v2809(VarCurr)
% 31.96/31.92 | v2815(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_500,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2815(VarCurr)
% 31.96/31.92 <=> ( v2816(VarCurr)
% 31.96/31.92 | v2821(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addBitVectorEqualityBitBlasted_101,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2821(VarCurr)
% 31.96/31.92 <=> ( ( v158(VarCurr,bitIndex6)
% 31.96/31.92 <=> $true )
% 31.96/31.92 & ( v158(VarCurr,bitIndex5)
% 31.96/31.92 <=> $true )
% 31.96/31.92 & ( v158(VarCurr,bitIndex4)
% 31.96/31.92 <=> $true )
% 31.96/31.92 & ( v158(VarCurr,bitIndex3)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v158(VarCurr,bitIndex2)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v158(VarCurr,bitIndex1)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v158(VarCurr,bitIndex0)
% 31.96/31.92 <=> $false ) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_596,axiom,
% 31.96/31.92 b1110000(bitIndex6) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_595,axiom,
% 31.96/31.92 b1110000(bitIndex5) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_594,axiom,
% 31.96/31.92 b1110000(bitIndex4) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_593,axiom,
% 31.96/31.92 ~ b1110000(bitIndex3) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_592,axiom,
% 31.96/31.92 ~ b1110000(bitIndex2) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_591,axiom,
% 31.96/31.92 ~ b1110000(bitIndex1) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_590,axiom,
% 31.96/31.92 ~ b1110000(bitIndex0) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_499,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2816(VarCurr)
% 31.96/31.92 <=> ( v2817(VarCurr)
% 31.96/31.92 | v2820(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addBitVectorEqualityBitBlasted_100,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2820(VarCurr)
% 31.96/31.92 <=> ( ( v158(VarCurr,bitIndex6)
% 31.96/31.92 <=> $true )
% 31.96/31.92 & ( v158(VarCurr,bitIndex5)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v158(VarCurr,bitIndex4)
% 31.96/31.92 <=> $true )
% 31.96/31.92 & ( v158(VarCurr,bitIndex3)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v158(VarCurr,bitIndex2)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v158(VarCurr,bitIndex1)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v158(VarCurr,bitIndex0)
% 31.96/31.92 <=> $false ) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_589,axiom,
% 31.96/31.92 b1010000(bitIndex6) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_588,axiom,
% 31.96/31.92 ~ b1010000(bitIndex5) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_587,axiom,
% 31.96/31.92 b1010000(bitIndex4) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_586,axiom,
% 31.96/31.92 ~ b1010000(bitIndex3) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_585,axiom,
% 31.96/31.92 ~ b1010000(bitIndex2) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_584,axiom,
% 31.96/31.92 ~ b1010000(bitIndex1) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_583,axiom,
% 31.96/31.92 ~ b1010000(bitIndex0) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_498,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2817(VarCurr)
% 31.96/31.92 <=> ( v2818(VarCurr)
% 31.96/31.92 | v2819(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addBitVectorEqualityBitBlasted_99,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2819(VarCurr)
% 31.96/31.92 <=> ( ( v158(VarCurr,bitIndex6)
% 31.96/31.92 <=> $true )
% 31.96/31.92 & ( v158(VarCurr,bitIndex5)
% 31.96/31.92 <=> $true )
% 31.96/31.92 & ( v158(VarCurr,bitIndex4)
% 31.96/31.92 <=> $true )
% 31.96/31.92 & ( v158(VarCurr,bitIndex3)
% 31.96/31.92 <=> $true )
% 31.96/31.92 & ( v158(VarCurr,bitIndex2)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v158(VarCurr,bitIndex1)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v158(VarCurr,bitIndex0)
% 31.96/31.92 <=> $false ) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_582,axiom,
% 31.96/31.92 b1111000(bitIndex6) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_581,axiom,
% 31.96/31.92 b1111000(bitIndex5) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_580,axiom,
% 31.96/31.92 b1111000(bitIndex4) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_579,axiom,
% 31.96/31.92 b1111000(bitIndex3) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_578,axiom,
% 31.96/31.92 ~ b1111000(bitIndex2) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_577,axiom,
% 31.96/31.92 ~ b1111000(bitIndex1) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_576,axiom,
% 31.96/31.92 ~ b1111000(bitIndex0) ).
% 31.96/31.92
% 31.96/31.92 fof(addBitVectorEqualityBitBlasted_98,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2818(VarCurr)
% 31.96/31.92 <=> ( ( v158(VarCurr,bitIndex6)
% 31.96/31.92 <=> $true )
% 31.96/31.92 & ( v158(VarCurr,bitIndex5)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v158(VarCurr,bitIndex4)
% 31.96/31.92 <=> $true )
% 31.96/31.92 & ( v158(VarCurr,bitIndex3)
% 31.96/31.92 <=> $true )
% 31.96/31.92 & ( v158(VarCurr,bitIndex2)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v158(VarCurr,bitIndex1)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v158(VarCurr,bitIndex0)
% 31.96/31.92 <=> $false ) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_575,axiom,
% 31.96/31.92 b1011000(bitIndex6) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_574,axiom,
% 31.96/31.92 ~ b1011000(bitIndex5) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_573,axiom,
% 31.96/31.92 b1011000(bitIndex4) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_572,axiom,
% 31.96/31.92 b1011000(bitIndex3) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_571,axiom,
% 31.96/31.92 ~ b1011000(bitIndex2) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_570,axiom,
% 31.96/31.92 ~ b1011000(bitIndex1) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_569,axiom,
% 31.96/31.92 ~ b1011000(bitIndex0) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_497,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2809(VarCurr)
% 31.96/31.92 <=> ( v2810(VarCurr)
% 31.96/31.92 | v2812(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_496,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2812(VarCurr)
% 31.96/31.92 <=> ( v2813(VarCurr)
% 31.96/31.92 | v2814(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addBitVectorEqualityBitBlasted_97,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2814(VarCurr)
% 31.96/31.92 <=> ( ( v158(VarCurr,bitIndex6)
% 31.96/31.92 <=> $true )
% 31.96/31.92 & ( v158(VarCurr,bitIndex5)
% 31.96/31.92 <=> $true )
% 31.96/31.92 & ( v158(VarCurr,bitIndex4)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v158(VarCurr,bitIndex3)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v158(VarCurr,bitIndex2)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v158(VarCurr,bitIndex1)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v158(VarCurr,bitIndex0)
% 31.96/31.92 <=> $false ) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_568,axiom,
% 31.96/31.92 b1100000(bitIndex6) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_567,axiom,
% 31.96/31.92 b1100000(bitIndex5) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_566,axiom,
% 31.96/31.92 ~ b1100000(bitIndex4) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_565,axiom,
% 31.96/31.92 ~ b1100000(bitIndex3) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_564,axiom,
% 31.96/31.92 ~ b1100000(bitIndex2) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_563,axiom,
% 31.96/31.92 ~ b1100000(bitIndex1) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_562,axiom,
% 31.96/31.92 ~ b1100000(bitIndex0) ).
% 31.96/31.92
% 31.96/31.92 fof(addBitVectorEqualityBitBlasted_96,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2813(VarCurr)
% 31.96/31.92 <=> ( ( v158(VarCurr,bitIndex6)
% 31.96/31.92 <=> $true )
% 31.96/31.92 & ( v158(VarCurr,bitIndex5)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v158(VarCurr,bitIndex4)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v158(VarCurr,bitIndex3)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v158(VarCurr,bitIndex2)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v158(VarCurr,bitIndex1)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v158(VarCurr,bitIndex0)
% 31.96/31.92 <=> $false ) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_561,axiom,
% 31.96/31.92 b1000000(bitIndex6) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_560,axiom,
% 31.96/31.92 ~ b1000000(bitIndex5) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_559,axiom,
% 31.96/31.92 ~ b1000000(bitIndex4) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_558,axiom,
% 31.96/31.92 ~ b1000000(bitIndex3) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_557,axiom,
% 31.96/31.92 ~ b1000000(bitIndex2) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_556,axiom,
% 31.96/31.92 ~ b1000000(bitIndex1) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_555,axiom,
% 31.96/31.92 ~ b1000000(bitIndex0) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_495,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2810(VarCurr)
% 31.96/31.92 <=> ( v2811(VarCurr)
% 31.96/31.92 & v170(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeUnaryOperator_238,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ~ v2811(VarCurr)
% 31.96/31.92 <=> v145(VarCurr,bitIndex0) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2402,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2803(VarCurr)
% 31.96/31.92 <=> v2424(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2401,axiom,
% 31.96/31.92 ! [VarCurr,B] :
% 31.96/31.92 ( range_2_1(B)
% 31.96/31.92 => ( v145(VarCurr,B)
% 31.96/31.92 <=> v147(VarCurr,B) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(range_axiom_32,axiom,
% 31.96/31.92 ! [B] :
% 31.96/31.92 ( range_2_1(B)
% 31.96/31.92 <=> ( $false
% 31.96/31.92 | bitIndex1 = B
% 31.96/31.92 | bitIndex2 = B ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2400,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ( v147(VarCurr,bitIndex2)
% 31.96/31.92 <=> v149(VarCurr,bitIndex14) )
% 31.96/31.92 & ( v147(VarCurr,bitIndex1)
% 31.96/31.92 <=> v149(VarCurr,bitIndex13) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2399,axiom,
% 31.96/31.92 ! [VarCurr,B] :
% 31.96/31.92 ( range_14_13(B)
% 31.96/31.92 => ( v149(VarCurr,B)
% 31.96/31.92 <=> v151(VarCurr,B) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2398,axiom,
% 31.96/31.92 ! [VarCurr,B] :
% 31.96/31.92 ( range_14_13(B)
% 31.96/31.92 => ( v151(VarCurr,B)
% 31.96/31.92 <=> v156(VarCurr,B) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(range_axiom_31,axiom,
% 31.96/31.92 ! [B] :
% 31.96/31.92 ( range_14_13(B)
% 31.96/31.92 <=> ( $false
% 31.96/31.92 | bitIndex13 = B
% 31.96/31.92 | bitIndex14 = B ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2397,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2787(VarCurr)
% 31.96/31.92 <=> v2789(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2396,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2789(VarCurr)
% 31.96/31.92 <=> v2791(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2395,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2791(VarCurr)
% 31.96/31.92 <=> v2412(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2394,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2783(VarCurr)
% 31.96/31.92 <=> v125(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2393,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2294(VarCurr)
% 31.96/31.92 <=> v2296(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2392,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2296(VarCurr)
% 31.96/31.92 <=> v2298(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2391,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2298(VarCurr)
% 31.96/31.92 <=> v2300(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addCaseBooleanConditionEqualRanges1_24,axiom,
% 31.96/31.92 ! [VarNext,VarCurr] :
% 31.96/31.92 ( nextState(VarCurr,VarNext)
% 31.96/31.92 => ( ~ v2756(VarNext)
% 31.96/31.92 => ( v2300(VarNext)
% 31.96/31.92 <=> v2300(VarCurr) ) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addCaseBooleanConditionEqualRanges0_36,axiom,
% 31.96/31.92 ! [VarNext] :
% 31.96/31.92 ( v2756(VarNext)
% 31.96/31.92 => ( v2300(VarNext)
% 31.96/31.92 <=> v2764(VarNext) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2390,axiom,
% 31.96/31.92 ! [VarNext,VarCurr] :
% 31.96/31.92 ( nextState(VarCurr,VarNext)
% 31.96/31.92 => ( v2764(VarNext)
% 31.96/31.92 <=> v2762(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(aaddConditionBooleanCondEqualRangesElseBranch_66,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ~ v2765(VarCurr)
% 31.96/31.92 => ( v2762(VarCurr)
% 31.96/31.92 <=> v2766(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addConditionBooleanCondEqualRangesThenBranch_69,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2765(VarCurr)
% 31.96/31.92 => ( v2762(VarCurr)
% 31.96/31.92 <=> $false ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_494,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2766(VarCurr)
% 31.96/31.92 <=> ( v2767(VarCurr)
% 31.96/31.92 | v2741(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorShiftedRanges_480,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2767(VarCurr)
% 31.96/31.92 <=> ( v2768(VarCurr)
% 31.96/31.92 | v2302(VarCurr,bitIndex12) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_493,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2768(VarCurr)
% 31.96/31.92 <=> ( v2769(VarCurr)
% 31.96/31.92 | v2418(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_492,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2769(VarCurr)
% 31.96/31.92 <=> ( v2770(VarCurr)
% 31.96/31.92 | v2412(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorShiftedRanges_479,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2770(VarCurr)
% 31.96/31.92 <=> ( v2771(VarCurr)
% 31.96/31.92 | v2302(VarCurr,bitIndex9) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorShiftedRanges_478,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2771(VarCurr)
% 31.96/31.92 <=> ( v2302(VarCurr,bitIndex3)
% 31.96/31.92 | v2302(VarCurr,bitIndex6) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeUnaryOperator_237,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ~ v2765(VarCurr)
% 31.96/31.92 <=> v123(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_491,axiom,
% 31.96/31.92 ! [VarNext,VarCurr] :
% 31.96/31.92 ( nextState(VarCurr,VarNext)
% 31.96/31.92 => ( v2756(VarNext)
% 31.96/31.92 <=> v2757(VarNext) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_490,axiom,
% 31.96/31.92 ! [VarNext,VarCurr] :
% 31.96/31.92 ( nextState(VarCurr,VarNext)
% 31.96/31.92 => ( v2757(VarNext)
% 31.96/31.92 <=> ( v2758(VarNext)
% 31.96/31.92 & v193(VarNext) ) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeUnaryOperator_236,axiom,
% 31.96/31.92 ! [VarNext,VarCurr] :
% 31.96/31.92 ( nextState(VarCurr,VarNext)
% 31.96/31.92 => ( ~ v2758(VarNext)
% 31.96/31.92 <=> v204(VarNext) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_489,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2741(VarCurr)
% 31.96/31.92 <=> ( v2752(VarCurr)
% 31.96/31.92 & v2753(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeUnaryOperator_235,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ~ v2753(VarCurr)
% 31.96/31.92 <=> v2322(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_488,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2752(VarCurr)
% 31.96/31.92 <=> ( v2304(VarCurr)
% 31.96/31.92 & v2743(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2389,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2743(VarCurr)
% 31.96/31.92 <=> v2745(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2388,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2745(VarCurr)
% 31.96/31.92 <=> v2747(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(aaddConditionBooleanCondEqualRangesElseBranch_65,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ~ v2750(VarCurr)
% 31.96/31.92 => ( v2747(VarCurr)
% 31.96/31.92 <=> $false ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addConditionBooleanCondEqualRangesThenBranch_68,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2750(VarCurr)
% 31.96/31.92 => ( v2747(VarCurr)
% 31.96/31.92 <=> $true ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addBitVectorEqualityBitBlasted_95,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2750(VarCurr)
% 31.96/31.92 <=> ( ( v158(VarCurr,bitIndex6)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v158(VarCurr,bitIndex5)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v158(VarCurr,bitIndex4)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v158(VarCurr,bitIndex3)
% 31.96/31.92 <=> $true )
% 31.96/31.92 & ( v158(VarCurr,bitIndex2)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v158(VarCurr,bitIndex1)
% 31.96/31.92 <=> $true )
% 31.96/31.92 & ( v158(VarCurr,bitIndex0)
% 31.96/31.92 <=> $false ) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_554,axiom,
% 31.96/31.92 ~ b0001010(bitIndex6) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_553,axiom,
% 31.96/31.92 ~ b0001010(bitIndex5) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_552,axiom,
% 31.96/31.92 ~ b0001010(bitIndex4) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_551,axiom,
% 31.96/31.92 b0001010(bitIndex3) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_550,axiom,
% 31.96/31.92 ~ b0001010(bitIndex2) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_549,axiom,
% 31.96/31.92 b0001010(bitIndex1) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_548,axiom,
% 31.96/31.92 ~ b0001010(bitIndex0) ).
% 31.96/31.92
% 31.96/31.92 fof(addConditionBooleanCondShiftedRangesElseBranch_19,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ~ v2737(VarCurr)
% 31.96/31.92 => ( v2302(VarCurr,bitIndex12)
% 31.96/31.92 <=> $false ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addConditionBooleanCondShiftedRangesThenBranch_16,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2737(VarCurr)
% 31.96/31.92 => ( v2302(VarCurr,bitIndex12)
% 31.96/31.92 <=> $true ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_487,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2737(VarCurr)
% 31.96/31.92 <=> ( v2738(VarCurr)
% 31.96/31.92 & v2739(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addBitVectorEqualityBitBlasted_94,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2739(VarCurr)
% 31.96/31.92 <=> ( $true
% 31.96/31.92 <=> v2397(VarCurr,bitIndex11) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_486,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2738(VarCurr)
% 31.96/31.92 <=> ( v2365(VarCurr)
% 31.96/31.92 & v2304(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_485,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2418(VarCurr)
% 31.96/31.92 <=> ( v2420(VarCurr)
% 31.96/31.92 | v2732(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_484,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2732(VarCurr)
% 31.96/31.92 <=> ( v2734(VarCurr)
% 31.96/31.92 & v2426(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeUnaryOperator_234,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ~ v2734(VarCurr)
% 31.96/31.92 <=> v2422(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_483,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2420(VarCurr)
% 31.96/31.92 <=> ( v2730(VarCurr)
% 31.96/31.92 & v2441(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_482,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2730(VarCurr)
% 31.96/31.92 <=> ( v2422(VarCurr)
% 31.96/31.92 & v2426(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2387,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2441(VarCurr)
% 31.96/31.92 <=> v2443(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2386,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2443(VarCurr)
% 31.96/31.92 <=> v2445(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorShiftedRanges_477,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2445(VarCurr)
% 31.96/31.92 <=> ( v2722(VarCurr)
% 31.96/31.92 & v2447(VarCurr,bitIndex8) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorShiftedRanges_476,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2722(VarCurr)
% 31.96/31.92 <=> ( v2723(VarCurr)
% 31.96/31.92 & v2447(VarCurr,bitIndex7) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorShiftedRanges_475,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2723(VarCurr)
% 31.96/31.92 <=> ( v2724(VarCurr)
% 31.96/31.92 & v2447(VarCurr,bitIndex6) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorShiftedRanges_474,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2724(VarCurr)
% 31.96/31.92 <=> ( v2725(VarCurr)
% 31.96/31.92 & v2447(VarCurr,bitIndex5) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorShiftedRanges_473,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2725(VarCurr)
% 31.96/31.92 <=> ( v2726(VarCurr)
% 31.96/31.92 & v2447(VarCurr,bitIndex4) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorShiftedRanges_472,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2726(VarCurr)
% 31.96/31.92 <=> ( v2727(VarCurr)
% 31.96/31.92 & v2447(VarCurr,bitIndex3) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorShiftedRanges_471,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2727(VarCurr)
% 31.96/31.92 <=> ( v2728(VarCurr)
% 31.96/31.92 & v2447(VarCurr,bitIndex2) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorShiftedRanges_470,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2728(VarCurr)
% 31.96/31.92 <=> ( v2447(VarCurr,bitIndex0)
% 31.96/31.92 & v2447(VarCurr,bitIndex1) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2385,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ( v2447(VarCurr,bitIndex8)
% 31.96/31.92 <=> v2655(VarCurr,bitIndex16) )
% 31.96/31.92 & ( v2447(VarCurr,bitIndex7)
% 31.96/31.92 <=> v2655(VarCurr,bitIndex15) )
% 31.96/31.92 & ( v2447(VarCurr,bitIndex6)
% 31.96/31.92 <=> v2655(VarCurr,bitIndex14) )
% 31.96/31.92 & ( v2447(VarCurr,bitIndex5)
% 31.96/31.92 <=> v2655(VarCurr,bitIndex13) )
% 31.96/31.92 & ( v2447(VarCurr,bitIndex4)
% 31.96/31.92 <=> v2655(VarCurr,bitIndex12) )
% 31.96/31.92 & ( v2447(VarCurr,bitIndex3)
% 31.96/31.92 <=> v2655(VarCurr,bitIndex11) )
% 31.96/31.92 & ( v2447(VarCurr,bitIndex2)
% 31.96/31.92 <=> v2655(VarCurr,bitIndex10) )
% 31.96/31.92 & ( v2447(VarCurr,bitIndex1)
% 31.96/31.92 <=> v2655(VarCurr,bitIndex9) )
% 31.96/31.92 & ( v2447(VarCurr,bitIndex0)
% 31.96/31.92 <=> v2655(VarCurr,bitIndex8) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesMultipleBits_96,axiom,
% 31.96/31.92 ! [VarCurr,B] :
% 31.96/31.92 ( range_16_0(B)
% 31.96/31.92 => ( v2655(VarCurr,B)
% 31.96/31.92 <=> ( v2657(VarCurr,B)
% 31.96/31.92 | v2717(VarCurr,B) ) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesMultipleBits_95,axiom,
% 31.96/31.92 ! [VarCurr,B] :
% 31.96/31.92 ( range_16_0(B)
% 31.96/31.92 => ( v2717(VarCurr,B)
% 31.96/31.92 <=> ( v2718(VarCurr,B)
% 31.96/31.92 & v2719(VarCurr,B) ) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2384,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2719(VarCurr,bitIndex0)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2383,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2719(VarCurr,bitIndex1)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2382,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2719(VarCurr,bitIndex2)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2381,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2719(VarCurr,bitIndex3)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2380,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2719(VarCurr,bitIndex4)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2379,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2719(VarCurr,bitIndex5)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2378,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2719(VarCurr,bitIndex6)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2377,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2719(VarCurr,bitIndex7)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2376,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2719(VarCurr,bitIndex8)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2375,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2719(VarCurr,bitIndex9)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2374,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2719(VarCurr,bitIndex10)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2373,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2719(VarCurr,bitIndex11)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2372,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2719(VarCurr,bitIndex12)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2371,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2719(VarCurr,bitIndex13)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2370,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2719(VarCurr,bitIndex14)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2369,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2719(VarCurr,bitIndex15)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2368,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2719(VarCurr,bitIndex16)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2367,axiom,
% 31.96/31.92 ! [VarCurr,B] :
% 31.96/31.92 ( range_7_0(B)
% 31.96/31.92 => ( v2718(VarCurr,B)
% 31.96/31.92 <=> $false ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2366,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ( v2718(VarCurr,bitIndex16)
% 31.96/31.92 <=> v2658(VarCurr,bitIndex8) )
% 31.96/31.92 & ( v2718(VarCurr,bitIndex15)
% 31.96/31.92 <=> v2658(VarCurr,bitIndex7) )
% 31.96/31.92 & ( v2718(VarCurr,bitIndex14)
% 31.96/31.92 <=> v2658(VarCurr,bitIndex6) )
% 31.96/31.92 & ( v2718(VarCurr,bitIndex13)
% 31.96/31.92 <=> v2658(VarCurr,bitIndex5) )
% 31.96/31.92 & ( v2718(VarCurr,bitIndex12)
% 31.96/31.92 <=> v2658(VarCurr,bitIndex4) )
% 31.96/31.92 & ( v2718(VarCurr,bitIndex11)
% 31.96/31.92 <=> v2658(VarCurr,bitIndex3) )
% 31.96/31.92 & ( v2718(VarCurr,bitIndex10)
% 31.96/31.92 <=> v2658(VarCurr,bitIndex2) )
% 31.96/31.92 & ( v2718(VarCurr,bitIndex9)
% 31.96/31.92 <=> v2658(VarCurr,bitIndex1) )
% 31.96/31.92 & ( v2718(VarCurr,bitIndex8)
% 31.96/31.92 <=> v2658(VarCurr,bitIndex0) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesMultipleBits_94,axiom,
% 31.96/31.92 ! [VarCurr,B] :
% 31.96/31.92 ( range_16_0(B)
% 31.96/31.92 => ( v2657(VarCurr,B)
% 31.96/31.92 <=> ( v2658(VarCurr,B)
% 31.96/31.92 & v2715(VarCurr,B) ) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2365,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2715(VarCurr,bitIndex0)
% 31.96/31.92 <=> v2716(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2364,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2715(VarCurr,bitIndex1)
% 31.96/31.92 <=> v2716(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2363,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2715(VarCurr,bitIndex2)
% 31.96/31.92 <=> v2716(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2362,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2715(VarCurr,bitIndex3)
% 31.96/31.92 <=> v2716(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2361,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2715(VarCurr,bitIndex4)
% 31.96/31.92 <=> v2716(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2360,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2715(VarCurr,bitIndex5)
% 31.96/31.92 <=> v2716(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2359,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2715(VarCurr,bitIndex6)
% 31.96/31.92 <=> v2716(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2358,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2715(VarCurr,bitIndex7)
% 31.96/31.92 <=> v2716(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2357,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2715(VarCurr,bitIndex8)
% 31.96/31.92 <=> v2716(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2356,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2715(VarCurr,bitIndex9)
% 31.96/31.92 <=> v2716(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2355,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2715(VarCurr,bitIndex10)
% 31.96/31.92 <=> v2716(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2354,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2715(VarCurr,bitIndex11)
% 31.96/31.92 <=> v2716(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2353,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2715(VarCurr,bitIndex12)
% 31.96/31.92 <=> v2716(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2352,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2715(VarCurr,bitIndex13)
% 31.96/31.92 <=> v2716(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2351,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2715(VarCurr,bitIndex14)
% 31.96/31.92 <=> v2716(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2350,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2715(VarCurr,bitIndex15)
% 31.96/31.92 <=> v2716(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2349,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2715(VarCurr,bitIndex16)
% 31.96/31.92 <=> v2716(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeUnaryOperator_233,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ~ v2716(VarCurr)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesMultipleBits_93,axiom,
% 31.96/31.92 ! [VarCurr,B] :
% 31.96/31.92 ( range_16_0(B)
% 31.96/31.92 => ( v2658(VarCurr,B)
% 31.96/31.92 <=> ( v2659(VarCurr,B)
% 31.96/31.92 | v2712(VarCurr,B) ) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesMultipleBits_92,axiom,
% 31.96/31.92 ! [VarCurr,B] :
% 31.96/31.92 ( range_16_0(B)
% 31.96/31.92 => ( v2712(VarCurr,B)
% 31.96/31.92 <=> ( v2713(VarCurr,B)
% 31.96/31.92 & v2714(VarCurr,B) ) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2348,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2714(VarCurr,bitIndex0)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex2) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2347,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2714(VarCurr,bitIndex1)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex2) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2346,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2714(VarCurr,bitIndex2)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex2) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2345,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2714(VarCurr,bitIndex3)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex2) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2344,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2714(VarCurr,bitIndex4)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex2) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2343,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2714(VarCurr,bitIndex5)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex2) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2342,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2714(VarCurr,bitIndex6)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex2) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2341,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2714(VarCurr,bitIndex7)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex2) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2340,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2714(VarCurr,bitIndex8)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex2) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2339,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2714(VarCurr,bitIndex9)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex2) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2338,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2714(VarCurr,bitIndex10)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex2) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2337,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2714(VarCurr,bitIndex11)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex2) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2336,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2714(VarCurr,bitIndex12)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex2) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2335,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2714(VarCurr,bitIndex13)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex2) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2334,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2714(VarCurr,bitIndex14)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex2) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2333,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2714(VarCurr,bitIndex15)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex2) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2332,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2714(VarCurr,bitIndex16)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex2) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2331,axiom,
% 31.96/31.92 ! [VarCurr,B] :
% 31.96/31.92 ( range_3_0(B)
% 31.96/31.92 => ( v2713(VarCurr,B)
% 31.96/31.92 <=> $false ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2330,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ( v2713(VarCurr,bitIndex16)
% 31.96/31.92 <=> v2660(VarCurr,bitIndex12) )
% 31.96/31.92 & ( v2713(VarCurr,bitIndex15)
% 31.96/31.92 <=> v2660(VarCurr,bitIndex11) )
% 31.96/31.92 & ( v2713(VarCurr,bitIndex14)
% 31.96/31.92 <=> v2660(VarCurr,bitIndex10) )
% 31.96/31.92 & ( v2713(VarCurr,bitIndex13)
% 31.96/31.92 <=> v2660(VarCurr,bitIndex9) )
% 31.96/31.92 & ( v2713(VarCurr,bitIndex12)
% 31.96/31.92 <=> v2660(VarCurr,bitIndex8) )
% 31.96/31.92 & ( v2713(VarCurr,bitIndex11)
% 31.96/31.92 <=> v2660(VarCurr,bitIndex7) )
% 31.96/31.92 & ( v2713(VarCurr,bitIndex10)
% 31.96/31.92 <=> v2660(VarCurr,bitIndex6) )
% 31.96/31.92 & ( v2713(VarCurr,bitIndex9)
% 31.96/31.92 <=> v2660(VarCurr,bitIndex5) )
% 31.96/31.92 & ( v2713(VarCurr,bitIndex8)
% 31.96/31.92 <=> v2660(VarCurr,bitIndex4) )
% 31.96/31.92 & ( v2713(VarCurr,bitIndex7)
% 31.96/31.92 <=> v2660(VarCurr,bitIndex3) )
% 31.96/31.92 & ( v2713(VarCurr,bitIndex6)
% 31.96/31.92 <=> v2660(VarCurr,bitIndex2) )
% 31.96/31.92 & ( v2713(VarCurr,bitIndex5)
% 31.96/31.92 <=> v2660(VarCurr,bitIndex1) )
% 31.96/31.92 & ( v2713(VarCurr,bitIndex4)
% 31.96/31.92 <=> v2660(VarCurr,bitIndex0) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesMultipleBits_91,axiom,
% 31.96/31.92 ! [VarCurr,B] :
% 31.96/31.92 ( range_16_0(B)
% 31.96/31.92 => ( v2659(VarCurr,B)
% 31.96/31.92 <=> ( v2660(VarCurr,B)
% 31.96/31.92 & v2710(VarCurr,B) ) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2329,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2710(VarCurr,bitIndex0)
% 31.96/31.92 <=> v2711(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2328,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2710(VarCurr,bitIndex1)
% 31.96/31.92 <=> v2711(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2327,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2710(VarCurr,bitIndex2)
% 31.96/31.92 <=> v2711(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2326,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2710(VarCurr,bitIndex3)
% 31.96/31.92 <=> v2711(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2325,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2710(VarCurr,bitIndex4)
% 31.96/31.92 <=> v2711(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2324,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2710(VarCurr,bitIndex5)
% 31.96/31.92 <=> v2711(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2323,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2710(VarCurr,bitIndex6)
% 31.96/31.92 <=> v2711(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2322,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2710(VarCurr,bitIndex7)
% 31.96/31.92 <=> v2711(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2321,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2710(VarCurr,bitIndex8)
% 31.96/31.92 <=> v2711(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2320,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2710(VarCurr,bitIndex9)
% 31.96/31.92 <=> v2711(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2319,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2710(VarCurr,bitIndex10)
% 31.96/31.92 <=> v2711(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2318,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2710(VarCurr,bitIndex11)
% 31.96/31.92 <=> v2711(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2317,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2710(VarCurr,bitIndex12)
% 31.96/31.92 <=> v2711(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2316,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2710(VarCurr,bitIndex13)
% 31.96/31.92 <=> v2711(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2315,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2710(VarCurr,bitIndex14)
% 31.96/31.92 <=> v2711(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2314,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2710(VarCurr,bitIndex15)
% 31.96/31.92 <=> v2711(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2313,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2710(VarCurr,bitIndex16)
% 31.96/31.92 <=> v2711(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeUnaryOperator_232,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ~ v2711(VarCurr)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex2) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesMultipleBits_90,axiom,
% 31.96/31.92 ! [VarCurr,B] :
% 31.96/31.92 ( range_16_0(B)
% 31.96/31.92 => ( v2660(VarCurr,B)
% 31.96/31.92 <=> ( v2661(VarCurr,B)
% 31.96/31.92 | v2707(VarCurr,B) ) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesMultipleBits_89,axiom,
% 31.96/31.92 ! [VarCurr,B] :
% 31.96/31.92 ( range_16_0(B)
% 31.96/31.92 => ( v2707(VarCurr,B)
% 31.96/31.92 <=> ( v2708(VarCurr,B)
% 31.96/31.92 & v2709(VarCurr,B) ) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2312,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2709(VarCurr,bitIndex0)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex1) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2311,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2709(VarCurr,bitIndex1)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex1) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2310,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2709(VarCurr,bitIndex2)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex1) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2309,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2709(VarCurr,bitIndex3)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex1) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2308,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2709(VarCurr,bitIndex4)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex1) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2307,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2709(VarCurr,bitIndex5)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex1) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2306,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2709(VarCurr,bitIndex6)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex1) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2305,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2709(VarCurr,bitIndex7)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex1) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2304,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2709(VarCurr,bitIndex8)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex1) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2303,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2709(VarCurr,bitIndex9)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex1) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2302,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2709(VarCurr,bitIndex10)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex1) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2301,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2709(VarCurr,bitIndex11)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex1) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2300,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2709(VarCurr,bitIndex12)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex1) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2299,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2709(VarCurr,bitIndex13)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex1) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2298,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2709(VarCurr,bitIndex14)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex1) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2297,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2709(VarCurr,bitIndex15)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex1) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2296,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2709(VarCurr,bitIndex16)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex1) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2295,axiom,
% 31.96/31.92 ! [VarCurr,B] :
% 31.96/31.92 ( range_1_0(B)
% 31.96/31.92 => ( v2708(VarCurr,B)
% 31.96/31.92 <=> $false ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2294,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ( v2708(VarCurr,bitIndex16)
% 31.96/31.92 <=> v2662(VarCurr,bitIndex14) )
% 31.96/31.92 & ( v2708(VarCurr,bitIndex15)
% 31.96/31.92 <=> v2662(VarCurr,bitIndex13) )
% 31.96/31.92 & ( v2708(VarCurr,bitIndex14)
% 31.96/31.92 <=> v2662(VarCurr,bitIndex12) )
% 31.96/31.92 & ( v2708(VarCurr,bitIndex13)
% 31.96/31.92 <=> v2662(VarCurr,bitIndex11) )
% 31.96/31.92 & ( v2708(VarCurr,bitIndex12)
% 31.96/31.92 <=> v2662(VarCurr,bitIndex10) )
% 31.96/31.92 & ( v2708(VarCurr,bitIndex11)
% 31.96/31.92 <=> v2662(VarCurr,bitIndex9) )
% 31.96/31.92 & ( v2708(VarCurr,bitIndex10)
% 31.96/31.92 <=> v2662(VarCurr,bitIndex8) )
% 31.96/31.92 & ( v2708(VarCurr,bitIndex9)
% 31.96/31.92 <=> v2662(VarCurr,bitIndex7) )
% 31.96/31.92 & ( v2708(VarCurr,bitIndex8)
% 31.96/31.92 <=> v2662(VarCurr,bitIndex6) )
% 31.96/31.92 & ( v2708(VarCurr,bitIndex7)
% 31.96/31.92 <=> v2662(VarCurr,bitIndex5) )
% 31.96/31.92 & ( v2708(VarCurr,bitIndex6)
% 31.96/31.92 <=> v2662(VarCurr,bitIndex4) )
% 31.96/31.92 & ( v2708(VarCurr,bitIndex5)
% 31.96/31.92 <=> v2662(VarCurr,bitIndex3) )
% 31.96/31.92 & ( v2708(VarCurr,bitIndex4)
% 31.96/31.92 <=> v2662(VarCurr,bitIndex2) )
% 31.96/31.92 & ( v2708(VarCurr,bitIndex3)
% 31.96/31.92 <=> v2662(VarCurr,bitIndex1) )
% 31.96/31.92 & ( v2708(VarCurr,bitIndex2)
% 31.96/31.92 <=> v2662(VarCurr,bitIndex0) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesMultipleBits_88,axiom,
% 31.96/31.92 ! [VarCurr,B] :
% 31.96/31.92 ( range_16_0(B)
% 31.96/31.92 => ( v2661(VarCurr,B)
% 31.96/31.92 <=> ( v2662(VarCurr,B)
% 31.96/31.92 & v2705(VarCurr,B) ) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2293,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2705(VarCurr,bitIndex0)
% 31.96/31.92 <=> v2706(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2292,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2705(VarCurr,bitIndex1)
% 31.96/31.92 <=> v2706(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2291,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2705(VarCurr,bitIndex2)
% 31.96/31.92 <=> v2706(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2290,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2705(VarCurr,bitIndex3)
% 31.96/31.92 <=> v2706(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2289,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2705(VarCurr,bitIndex4)
% 31.96/31.92 <=> v2706(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2288,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2705(VarCurr,bitIndex5)
% 31.96/31.92 <=> v2706(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2287,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2705(VarCurr,bitIndex6)
% 31.96/31.92 <=> v2706(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2286,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2705(VarCurr,bitIndex7)
% 31.96/31.92 <=> v2706(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2285,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2705(VarCurr,bitIndex8)
% 31.96/31.92 <=> v2706(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2284,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2705(VarCurr,bitIndex9)
% 31.96/31.92 <=> v2706(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2283,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2705(VarCurr,bitIndex10)
% 31.96/31.92 <=> v2706(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2282,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2705(VarCurr,bitIndex11)
% 31.96/31.92 <=> v2706(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2281,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2705(VarCurr,bitIndex12)
% 31.96/31.92 <=> v2706(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2280,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2705(VarCurr,bitIndex13)
% 31.96/31.92 <=> v2706(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2279,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2705(VarCurr,bitIndex14)
% 31.96/31.92 <=> v2706(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2278,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2705(VarCurr,bitIndex15)
% 31.96/31.92 <=> v2706(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2277,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2705(VarCurr,bitIndex16)
% 31.96/31.92 <=> v2706(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeUnaryOperator_231,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ~ v2706(VarCurr)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex1) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesMultipleBits_87,axiom,
% 31.96/31.92 ! [VarCurr,B] :
% 31.96/31.92 ( range_16_0(B)
% 31.96/31.92 => ( v2662(VarCurr,B)
% 31.96/31.92 <=> ( v2663(VarCurr,B)
% 31.96/31.92 | v2702(VarCurr,B) ) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesMultipleBits_86,axiom,
% 31.96/31.92 ! [VarCurr,B] :
% 31.96/31.92 ( range_16_0(B)
% 31.96/31.92 => ( v2702(VarCurr,B)
% 31.96/31.92 <=> ( v2703(VarCurr,B)
% 31.96/31.92 & v2704(VarCurr,B) ) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2276,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2704(VarCurr,bitIndex0)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex0) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2275,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2704(VarCurr,bitIndex1)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex0) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2274,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2704(VarCurr,bitIndex2)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex0) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2273,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2704(VarCurr,bitIndex3)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex0) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2272,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2704(VarCurr,bitIndex4)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex0) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2271,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2704(VarCurr,bitIndex5)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex0) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2270,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2704(VarCurr,bitIndex6)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex0) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2269,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2704(VarCurr,bitIndex7)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex0) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2268,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2704(VarCurr,bitIndex8)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex0) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2267,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2704(VarCurr,bitIndex9)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex0) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2266,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2704(VarCurr,bitIndex10)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex0) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2265,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2704(VarCurr,bitIndex11)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex0) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2264,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2704(VarCurr,bitIndex12)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex0) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2263,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2704(VarCurr,bitIndex13)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex0) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2262,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2704(VarCurr,bitIndex14)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex0) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2261,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2704(VarCurr,bitIndex15)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex0) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2260,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2704(VarCurr,bitIndex16)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex0) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2259,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2703(VarCurr,bitIndex0)
% 31.96/31.92 <=> $false ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2258,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ( v2703(VarCurr,bitIndex16)
% 31.96/31.92 <=> v2664(VarCurr,bitIndex15) )
% 31.96/31.92 & ( v2703(VarCurr,bitIndex15)
% 31.96/31.92 <=> v2664(VarCurr,bitIndex14) )
% 31.96/31.92 & ( v2703(VarCurr,bitIndex14)
% 31.96/31.92 <=> v2664(VarCurr,bitIndex13) )
% 31.96/31.92 & ( v2703(VarCurr,bitIndex13)
% 31.96/31.92 <=> v2664(VarCurr,bitIndex12) )
% 31.96/31.92 & ( v2703(VarCurr,bitIndex12)
% 31.96/31.92 <=> v2664(VarCurr,bitIndex11) )
% 31.96/31.92 & ( v2703(VarCurr,bitIndex11)
% 31.96/31.92 <=> v2664(VarCurr,bitIndex10) )
% 31.96/31.92 & ( v2703(VarCurr,bitIndex10)
% 31.96/31.92 <=> v2664(VarCurr,bitIndex9) )
% 31.96/31.92 & ( v2703(VarCurr,bitIndex9)
% 31.96/31.92 <=> v2664(VarCurr,bitIndex8) )
% 31.96/31.92 & ( v2703(VarCurr,bitIndex8)
% 31.96/31.92 <=> v2664(VarCurr,bitIndex7) )
% 31.96/31.92 & ( v2703(VarCurr,bitIndex7)
% 31.96/31.92 <=> v2664(VarCurr,bitIndex6) )
% 31.96/31.92 & ( v2703(VarCurr,bitIndex6)
% 31.96/31.92 <=> v2664(VarCurr,bitIndex5) )
% 31.96/31.92 & ( v2703(VarCurr,bitIndex5)
% 31.96/31.92 <=> v2664(VarCurr,bitIndex4) )
% 31.96/31.92 & ( v2703(VarCurr,bitIndex4)
% 31.96/31.92 <=> v2664(VarCurr,bitIndex3) )
% 31.96/31.92 & ( v2703(VarCurr,bitIndex3)
% 31.96/31.92 <=> v2664(VarCurr,bitIndex2) )
% 31.96/31.92 & ( v2703(VarCurr,bitIndex2)
% 31.96/31.92 <=> v2664(VarCurr,bitIndex1) )
% 31.96/31.92 & ( v2703(VarCurr,bitIndex1)
% 31.96/31.92 <=> v2664(VarCurr,bitIndex0) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesMultipleBits_85,axiom,
% 31.96/31.92 ! [VarCurr,B] :
% 31.96/31.92 ( range_16_0(B)
% 31.96/31.92 => ( v2663(VarCurr,B)
% 31.96/31.92 <=> ( v2664(VarCurr,B)
% 31.96/31.92 & v2665(VarCurr,B) ) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(range_axiom_30,axiom,
% 31.96/31.92 ! [B] :
% 31.96/31.92 ( range_16_0(B)
% 31.96/31.92 <=> ( $false
% 31.96/31.92 | bitIndex0 = B
% 31.96/31.92 | bitIndex1 = B
% 31.96/31.92 | bitIndex2 = B
% 31.96/31.92 | bitIndex3 = B
% 31.96/31.92 | bitIndex4 = B
% 31.96/31.92 | bitIndex5 = B
% 31.96/31.92 | bitIndex6 = B
% 31.96/31.92 | bitIndex7 = B
% 31.96/31.92 | bitIndex8 = B
% 31.96/31.92 | bitIndex9 = B
% 31.96/31.92 | bitIndex10 = B
% 31.96/31.92 | bitIndex11 = B
% 31.96/31.92 | bitIndex12 = B
% 31.96/31.92 | bitIndex13 = B
% 31.96/31.92 | bitIndex14 = B
% 31.96/31.92 | bitIndex15 = B
% 31.96/31.92 | bitIndex16 = B ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2257,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2665(VarCurr,bitIndex0)
% 31.96/31.92 <=> v2666(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2256,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2665(VarCurr,bitIndex1)
% 31.96/31.92 <=> v2666(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2255,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2665(VarCurr,bitIndex2)
% 31.96/31.92 <=> v2666(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2254,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2665(VarCurr,bitIndex3)
% 31.96/31.92 <=> v2666(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2253,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2665(VarCurr,bitIndex4)
% 31.96/31.92 <=> v2666(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2252,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2665(VarCurr,bitIndex5)
% 31.96/31.92 <=> v2666(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2251,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2665(VarCurr,bitIndex6)
% 31.96/31.92 <=> v2666(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2250,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2665(VarCurr,bitIndex7)
% 31.96/31.92 <=> v2666(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2249,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2665(VarCurr,bitIndex8)
% 31.96/31.92 <=> v2666(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2248,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2665(VarCurr,bitIndex9)
% 31.96/31.92 <=> v2666(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2247,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2665(VarCurr,bitIndex10)
% 31.96/31.92 <=> v2666(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2246,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2665(VarCurr,bitIndex11)
% 31.96/31.92 <=> v2666(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2245,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2665(VarCurr,bitIndex12)
% 31.96/31.92 <=> v2666(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2244,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2665(VarCurr,bitIndex13)
% 31.96/31.92 <=> v2666(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2243,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2665(VarCurr,bitIndex14)
% 31.96/31.92 <=> v2666(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2242,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2665(VarCurr,bitIndex15)
% 31.96/31.92 <=> v2666(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2241,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2665(VarCurr,bitIndex16)
% 31.96/31.92 <=> v2666(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeUnaryOperator_230,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ~ v2666(VarCurr)
% 31.96/31.92 <=> v2667(VarCurr,bitIndex0) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2240,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2667(VarCurr,bitIndex0)
% 31.96/31.92 <=> v2676(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2239,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2667(VarCurr,bitIndex1)
% 31.96/31.92 <=> v2698(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2238,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2667(VarCurr,bitIndex2)
% 31.96/31.92 <=> v2693(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2237,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2667(VarCurr,bitIndex3)
% 31.96/31.92 <=> v2669(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_481,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2698(VarCurr)
% 31.96/31.92 <=> ( v2699(VarCurr)
% 31.96/31.92 & v2701(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_480,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2701(VarCurr)
% 31.96/31.92 <=> ( v2652(VarCurr,bitIndex0)
% 31.96/31.92 | v2688(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_479,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2699(VarCurr)
% 31.96/31.92 <=> ( v2676(VarCurr)
% 31.96/31.92 | v2700(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeUnaryOperator_229,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ~ v2700(VarCurr)
% 31.96/31.92 <=> v2688(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_478,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2693(VarCurr)
% 31.96/31.92 <=> ( v2694(VarCurr)
% 31.96/31.92 & v2697(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_477,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2697(VarCurr)
% 31.96/31.92 <=> ( v2683(VarCurr)
% 31.96/31.92 | v2687(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_476,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2694(VarCurr)
% 31.96/31.92 <=> ( v2695(VarCurr)
% 31.96/31.92 | v2696(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeUnaryOperator_228,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ~ v2696(VarCurr)
% 31.96/31.92 <=> v2687(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeUnaryOperator_227,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ~ v2695(VarCurr)
% 31.96/31.92 <=> v2683(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_475,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2669(VarCurr)
% 31.96/31.92 <=> ( v2670(VarCurr)
% 31.96/31.92 & v2691(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_474,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2691(VarCurr)
% 31.96/31.92 <=> ( v2692(VarCurr)
% 31.96/31.92 | v2682(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeUnaryOperator_226,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ~ v2692(VarCurr)
% 31.96/31.92 <=> v2671(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_473,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2670(VarCurr)
% 31.96/31.92 <=> ( v2671(VarCurr)
% 31.96/31.92 | v2681(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeUnaryOperator_225,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ~ v2681(VarCurr)
% 31.96/31.92 <=> v2682(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_472,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2682(VarCurr)
% 31.96/31.92 <=> ( v2683(VarCurr)
% 31.96/31.92 & v2687(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_471,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2687(VarCurr)
% 31.96/31.92 <=> ( v2652(VarCurr,bitIndex0)
% 31.96/31.92 & v2688(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_470,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2688(VarCurr)
% 31.96/31.92 <=> ( v2689(VarCurr)
% 31.96/31.92 & v2690(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_469,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2690(VarCurr)
% 31.96/31.92 <=> ( v2676(VarCurr)
% 31.96/31.92 | v2677(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorShiftedRanges_469,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2689(VarCurr)
% 31.96/31.92 <=> ( v2652(VarCurr,bitIndex0)
% 31.96/31.92 | v2652(VarCurr,bitIndex1) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_468,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2683(VarCurr)
% 31.96/31.92 <=> ( v2684(VarCurr)
% 31.96/31.92 & v2686(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_467,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2686(VarCurr)
% 31.96/31.92 <=> ( v2675(VarCurr)
% 31.96/31.92 | v2678(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorShiftedRanges_468,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2684(VarCurr)
% 31.96/31.92 <=> ( v2685(VarCurr)
% 31.96/31.92 | v2652(VarCurr,bitIndex2) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeUnaryOperator_224,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ~ v2685(VarCurr)
% 31.96/31.92 <=> v2675(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_466,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2671(VarCurr)
% 31.96/31.92 <=> ( v2672(VarCurr)
% 31.96/31.92 & v2679(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_465,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2679(VarCurr)
% 31.96/31.92 <=> ( v2674(VarCurr)
% 31.96/31.92 | v2680(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeUnaryOperator_223,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ~ v2680(VarCurr)
% 31.96/31.92 <=> v2652(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorShiftedRanges_467,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2672(VarCurr)
% 31.96/31.92 <=> ( v2673(VarCurr)
% 31.96/31.92 | v2652(VarCurr,bitIndex3) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeUnaryOperator_222,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ~ v2673(VarCurr)
% 31.96/31.92 <=> v2674(VarCurr) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_464,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2674(VarCurr)
% 31.96/31.92 <=> ( v2675(VarCurr)
% 31.96/31.92 & v2678(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeUnaryOperator_221,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ~ v2678(VarCurr)
% 31.96/31.92 <=> v2652(VarCurr,bitIndex2) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesSingleBits_463,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2675(VarCurr)
% 31.96/31.92 <=> ( v2676(VarCurr)
% 31.96/31.92 & v2677(VarCurr) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeUnaryOperator_220,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ~ v2677(VarCurr)
% 31.96/31.92 <=> v2652(VarCurr,bitIndex1) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeUnaryOperator_219,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ~ v2676(VarCurr)
% 31.96/31.92 <=> v2652(VarCurr,bitIndex0) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2236,axiom,
% 31.96/31.92 ! [VarCurr,B] :
% 31.96/31.92 ( range_7_0(B)
% 31.96/31.92 => ( v2664(VarCurr,B)
% 31.96/31.92 <=> $true ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(range_axiom_29,axiom,
% 31.96/31.92 ! [B] :
% 31.96/31.92 ( range_7_0(B)
% 31.96/31.92 <=> ( $false
% 31.96/31.92 | bitIndex0 = B
% 31.96/31.92 | bitIndex1 = B
% 31.96/31.92 | bitIndex2 = B
% 31.96/31.92 | bitIndex3 = B
% 31.96/31.92 | bitIndex4 = B
% 31.96/31.92 | bitIndex5 = B
% 31.96/31.92 | bitIndex6 = B
% 31.96/31.92 | bitIndex7 = B ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_547,axiom,
% 31.96/31.92 b11111111(bitIndex7) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_546,axiom,
% 31.96/31.92 b11111111(bitIndex6) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_545,axiom,
% 31.96/31.92 b11111111(bitIndex5) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_544,axiom,
% 31.96/31.92 b11111111(bitIndex4) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_543,axiom,
% 31.96/31.92 b11111111(bitIndex3) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_542,axiom,
% 31.96/31.92 b11111111(bitIndex2) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_541,axiom,
% 31.96/31.92 b11111111(bitIndex1) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_540,axiom,
% 31.96/31.92 b11111111(bitIndex0) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2235,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ( v2664(VarCurr,bitIndex16)
% 31.96/31.92 <=> v2449(VarCurr,bitIndex8) )
% 31.96/31.92 & ( v2664(VarCurr,bitIndex15)
% 31.96/31.92 <=> v2449(VarCurr,bitIndex7) )
% 31.96/31.92 & ( v2664(VarCurr,bitIndex14)
% 31.96/31.92 <=> v2449(VarCurr,bitIndex6) )
% 31.96/31.92 & ( v2664(VarCurr,bitIndex13)
% 31.96/31.92 <=> v2449(VarCurr,bitIndex5) )
% 31.96/31.92 & ( v2664(VarCurr,bitIndex12)
% 31.96/31.92 <=> v2449(VarCurr,bitIndex4) )
% 31.96/31.92 & ( v2664(VarCurr,bitIndex11)
% 31.96/31.92 <=> v2449(VarCurr,bitIndex3) )
% 31.96/31.92 & ( v2664(VarCurr,bitIndex10)
% 31.96/31.92 <=> v2449(VarCurr,bitIndex2) )
% 31.96/31.92 & ( v2664(VarCurr,bitIndex9)
% 31.96/31.92 <=> v2449(VarCurr,bitIndex1) )
% 31.96/31.92 & ( v2664(VarCurr,bitIndex8)
% 31.96/31.92 <=> v2449(VarCurr,bitIndex0) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2234,axiom,
% 31.96/31.92 ! [VarCurr,B] :
% 31.96/31.92 ( range_3_0(B)
% 31.96/31.92 => ( v2652(VarCurr,B)
% 31.96/31.92 <=> v2654(VarCurr,B) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2233,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ( v2654(VarCurr,bitIndex3)
% 31.96/31.92 <=> v149(VarCurr,bitIndex8) )
% 31.96/31.92 & ( v2654(VarCurr,bitIndex2)
% 31.96/31.92 <=> v149(VarCurr,bitIndex7) )
% 31.96/31.92 & ( v2654(VarCurr,bitIndex1)
% 31.96/31.92 <=> v149(VarCurr,bitIndex6) )
% 31.96/31.92 & ( v2654(VarCurr,bitIndex0)
% 31.96/31.92 <=> v149(VarCurr,bitIndex5) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2232,axiom,
% 31.96/31.92 ! [VarCurr,B] :
% 31.96/31.92 ( range_8_5(B)
% 31.96/31.92 => ( v149(VarCurr,B)
% 31.96/31.92 <=> v151(VarCurr,B) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2231,axiom,
% 31.96/31.92 ! [VarCurr,B] :
% 31.96/31.92 ( range_8_5(B)
% 31.96/31.92 => ( v151(VarCurr,B)
% 31.96/31.92 <=> v156(VarCurr,B) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(range_axiom_28,axiom,
% 31.96/31.92 ! [B] :
% 31.96/31.92 ( range_8_5(B)
% 31.96/31.92 <=> ( $false
% 31.96/31.92 | bitIndex5 = B
% 31.96/31.92 | bitIndex6 = B
% 31.96/31.92 | bitIndex7 = B
% 31.96/31.92 | bitIndex8 = B ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2230,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2449(VarCurr,bitIndex8)
% 31.96/31.92 <=> v2454(VarCurr,bitIndex8) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2229,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2449(VarCurr,bitIndex7)
% 31.96/31.92 <=> v2454(VarCurr,bitIndex7) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2228,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2449(VarCurr,bitIndex6)
% 31.96/31.92 <=> v2454(VarCurr,bitIndex6) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2227,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2449(VarCurr,bitIndex5)
% 31.96/31.92 <=> v2454(VarCurr,bitIndex5) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2226,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2449(VarCurr,bitIndex4)
% 31.96/31.92 <=> v2454(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2225,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2449(VarCurr,bitIndex3)
% 31.96/31.92 <=> v2454(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2224,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2449(VarCurr,bitIndex2)
% 31.96/31.92 <=> v2454(VarCurr,bitIndex2) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2223,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2449(VarCurr,bitIndex1)
% 31.96/31.92 <=> v2454(VarCurr,bitIndex1) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2222,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2449(VarCurr,bitIndex0)
% 31.96/31.92 <=> v2454(VarCurr,bitIndex0) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesMultipleBits_84,axiom,
% 31.96/31.92 ! [VarCurr,B] :
% 31.96/31.92 ( range_39_0(B)
% 31.96/31.92 => ( v2454(VarCurr,B)
% 31.96/31.92 <=> ( v2456(VarCurr,B)
% 31.96/31.92 | v2556(VarCurr,B) ) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesMultipleBits_83,axiom,
% 31.96/31.92 ! [VarCurr,B] :
% 31.96/31.92 ( range_39_0(B)
% 31.96/31.92 => ( v2556(VarCurr,B)
% 31.96/31.92 <=> ( v2557(VarCurr,B)
% 31.96/31.92 & v2649(VarCurr,B) ) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2221,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex0)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2220,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex1)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2219,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex2)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2218,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex3)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2217,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex4)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2216,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex5)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2215,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex6)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2214,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex7)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2213,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex8)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2212,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex9)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2211,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex10)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2210,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex11)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2209,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex12)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2208,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex13)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2207,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex14)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2206,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex15)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2205,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex16)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2204,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex17)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2203,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex18)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2202,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex19)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2201,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex20)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2200,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex21)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2199,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex22)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2198,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex23)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2197,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex24)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2196,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex25)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2195,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex26)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2194,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex27)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2193,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex28)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2192,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex29)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2191,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex30)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2190,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex31)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2189,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex32)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2188,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex33)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2187,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex34)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2186,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex35)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2185,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex36)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2184,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex37)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2183,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex38)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2182,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2649(VarCurr,bitIndex39)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2181,axiom,
% 31.96/31.92 ! [VarCurr,B] :
% 31.96/31.92 ( range_23_0(B)
% 31.96/31.92 => ( v2557(VarCurr,B)
% 31.96/31.92 <=> v2559(VarCurr,B) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2180,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( ( v2557(VarCurr,bitIndex39)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v2557(VarCurr,bitIndex38)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v2557(VarCurr,bitIndex37)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v2557(VarCurr,bitIndex36)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v2557(VarCurr,bitIndex35)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v2557(VarCurr,bitIndex34)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v2557(VarCurr,bitIndex33)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v2557(VarCurr,bitIndex32)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v2557(VarCurr,bitIndex31)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v2557(VarCurr,bitIndex30)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v2557(VarCurr,bitIndex29)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v2557(VarCurr,bitIndex28)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v2557(VarCurr,bitIndex27)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v2557(VarCurr,bitIndex26)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v2557(VarCurr,bitIndex25)
% 31.96/31.92 <=> $false )
% 31.96/31.92 & ( v2557(VarCurr,bitIndex24)
% 31.96/31.92 <=> $false ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_539,axiom,
% 31.96/31.92 ~ b0000000000000000(bitIndex15) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_538,axiom,
% 31.96/31.92 ~ b0000000000000000(bitIndex14) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_537,axiom,
% 31.96/31.92 ~ b0000000000000000(bitIndex13) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_536,axiom,
% 31.96/31.92 ~ b0000000000000000(bitIndex12) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_535,axiom,
% 31.96/31.92 ~ b0000000000000000(bitIndex11) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_534,axiom,
% 31.96/31.92 ~ b0000000000000000(bitIndex10) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_533,axiom,
% 31.96/31.92 ~ b0000000000000000(bitIndex9) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_532,axiom,
% 31.96/31.92 ~ b0000000000000000(bitIndex8) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_531,axiom,
% 31.96/31.92 ~ b0000000000000000(bitIndex7) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_530,axiom,
% 31.96/31.92 ~ b0000000000000000(bitIndex6) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_529,axiom,
% 31.96/31.92 ~ b0000000000000000(bitIndex5) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_528,axiom,
% 31.96/31.92 ~ b0000000000000000(bitIndex4) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_527,axiom,
% 31.96/31.92 ~ b0000000000000000(bitIndex3) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_526,axiom,
% 31.96/31.92 ~ b0000000000000000(bitIndex2) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_525,axiom,
% 31.96/31.92 ~ b0000000000000000(bitIndex1) ).
% 31.96/31.92
% 31.96/31.92 fof(bitBlastConstant_524,axiom,
% 31.96/31.92 ~ b0000000000000000(bitIndex0) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesMultipleBits_82,axiom,
% 31.96/31.92 ! [VarCurr,B] :
% 31.96/31.92 ( range_23_0(B)
% 31.96/31.92 => ( v2559(VarCurr,B)
% 31.96/31.92 <=> ( v2560(VarCurr,B)
% 31.96/31.92 | v2604(VarCurr,B) ) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(writeBinaryOperatorEqualRangesMultipleBits_81,axiom,
% 31.96/31.92 ! [VarCurr,B] :
% 31.96/31.92 ( range_23_0(B)
% 31.96/31.92 => ( v2604(VarCurr,B)
% 31.96/31.92 <=> ( v2605(VarCurr,B)
% 31.96/31.92 & v2648(VarCurr,B) ) ) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2179,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2648(VarCurr,bitIndex0)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2178,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2648(VarCurr,bitIndex1)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2177,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2648(VarCurr,bitIndex2)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2176,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2648(VarCurr,bitIndex3)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2175,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2648(VarCurr,bitIndex4)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2174,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2648(VarCurr,bitIndex5)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2173,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2648(VarCurr,bitIndex6)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2172,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2648(VarCurr,bitIndex7)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2171,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2648(VarCurr,bitIndex8)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2170,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2648(VarCurr,bitIndex9)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2169,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2648(VarCurr,bitIndex10)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2168,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2648(VarCurr,bitIndex11)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2167,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2648(VarCurr,bitIndex12)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2166,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2648(VarCurr,bitIndex13)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2165,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2648(VarCurr,bitIndex14)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2164,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2648(VarCurr,bitIndex15)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2163,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2648(VarCurr,bitIndex16)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2162,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2648(VarCurr,bitIndex17)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2161,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2648(VarCurr,bitIndex18)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2160,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2648(VarCurr,bitIndex19)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2159,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2648(VarCurr,bitIndex20)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2158,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2648(VarCurr,bitIndex21)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2157,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2648(VarCurr,bitIndex22)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.92
% 31.96/31.92 fof(addAssignment_2156,axiom,
% 31.96/31.92 ! [VarCurr] :
% 31.96/31.92 ( v2648(VarCurr,bitIndex23)
% 31.96/31.92 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2155,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_15_0(B)
% 31.96/31.93 => ( v2605(VarCurr,B)
% 31.96/31.93 <=> v2606(VarCurr,B) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2154,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( ( v2605(VarCurr,bitIndex23)
% 31.96/31.93 <=> $false )
% 31.96/31.93 & ( v2605(VarCurr,bitIndex22)
% 31.96/31.93 <=> $false )
% 31.96/31.93 & ( v2605(VarCurr,bitIndex21)
% 31.96/31.93 <=> $false )
% 31.96/31.93 & ( v2605(VarCurr,bitIndex20)
% 31.96/31.93 <=> $false )
% 31.96/31.93 & ( v2605(VarCurr,bitIndex19)
% 31.96/31.93 <=> $false )
% 31.96/31.93 & ( v2605(VarCurr,bitIndex18)
% 31.96/31.93 <=> $false )
% 31.96/31.93 & ( v2605(VarCurr,bitIndex17)
% 31.96/31.93 <=> $false )
% 31.96/31.93 & ( v2605(VarCurr,bitIndex16)
% 31.96/31.93 <=> $false ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorEqualRangesMultipleBits_80,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_15_0(B)
% 31.96/31.93 => ( v2606(VarCurr,B)
% 31.96/31.93 <=> ( v2607(VarCurr,B)
% 31.96/31.93 | v2627(VarCurr,B) ) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorEqualRangesMultipleBits_79,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_15_0(B)
% 31.96/31.93 => ( v2627(VarCurr,B)
% 31.96/31.93 <=> ( v2628(VarCurr,B)
% 31.96/31.93 & v2647(VarCurr,B) ) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2153,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2647(VarCurr,bitIndex0)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2152,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2647(VarCurr,bitIndex1)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2151,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2647(VarCurr,bitIndex2)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2150,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2647(VarCurr,bitIndex3)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2149,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2647(VarCurr,bitIndex4)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2148,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2647(VarCurr,bitIndex5)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2147,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2647(VarCurr,bitIndex6)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2146,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2647(VarCurr,bitIndex7)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2145,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2647(VarCurr,bitIndex8)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2144,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2647(VarCurr,bitIndex9)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2143,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2647(VarCurr,bitIndex10)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2142,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2647(VarCurr,bitIndex11)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2141,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2647(VarCurr,bitIndex12)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2140,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2647(VarCurr,bitIndex13)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2139,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2647(VarCurr,bitIndex14)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2138,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2647(VarCurr,bitIndex15)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2137,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_11_0(B)
% 31.96/31.93 => ( v2628(VarCurr,B)
% 31.96/31.93 <=> v2629(VarCurr,B) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2136,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( ( v2628(VarCurr,bitIndex15)
% 31.96/31.93 <=> $false )
% 31.96/31.93 & ( v2628(VarCurr,bitIndex14)
% 31.96/31.93 <=> $false )
% 31.96/31.93 & ( v2628(VarCurr,bitIndex13)
% 31.96/31.93 <=> $false )
% 31.96/31.93 & ( v2628(VarCurr,bitIndex12)
% 31.96/31.93 <=> $false ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorEqualRangesMultipleBits_78,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_11_0(B)
% 31.96/31.93 => ( v2629(VarCurr,B)
% 31.96/31.93 <=> ( v2630(VarCurr,B)
% 31.96/31.93 | v2638(VarCurr,B) ) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorEqualRangesMultipleBits_77,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_11_0(B)
% 31.96/31.93 => ( v2638(VarCurr,B)
% 31.96/31.93 <=> ( v2639(VarCurr,B)
% 31.96/31.93 & v2646(VarCurr,B) ) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2135,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2646(VarCurr,bitIndex0)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2134,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2646(VarCurr,bitIndex1)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2133,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2646(VarCurr,bitIndex2)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2132,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2646(VarCurr,bitIndex3)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2131,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2646(VarCurr,bitIndex4)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2130,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2646(VarCurr,bitIndex5)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2129,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2646(VarCurr,bitIndex6)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2128,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2646(VarCurr,bitIndex7)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2127,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2646(VarCurr,bitIndex8)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2126,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2646(VarCurr,bitIndex9)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2125,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2646(VarCurr,bitIndex10)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2124,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2646(VarCurr,bitIndex11)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2123,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_9_0(B)
% 31.96/31.93 => ( v2639(VarCurr,B)
% 31.96/31.93 <=> v2640(VarCurr,B) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2122,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( ( v2639(VarCurr,bitIndex11)
% 31.96/31.93 <=> $false )
% 31.96/31.93 & ( v2639(VarCurr,bitIndex10)
% 31.96/31.93 <=> $false ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorEqualRangesMultipleBits_76,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_9_0(B)
% 31.96/31.93 => ( v2640(VarCurr,B)
% 31.96/31.93 <=> ( v2641(VarCurr,B)
% 31.96/31.93 | v2643(VarCurr,B) ) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorEqualRangesMultipleBits_75,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_9_0(B)
% 31.96/31.93 => ( v2643(VarCurr,B)
% 31.96/31.93 <=> ( v2644(VarCurr,B)
% 31.96/31.93 & v2645(VarCurr,B) ) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(range_axiom_27,axiom,
% 31.96/31.93 ! [B] :
% 31.96/31.93 ( range_9_0(B)
% 31.96/31.93 <=> ( $false
% 31.96/31.93 | bitIndex0 = B
% 31.96/31.93 | bitIndex1 = B
% 31.96/31.93 | bitIndex2 = B
% 31.96/31.93 | bitIndex3 = B
% 31.96/31.93 | bitIndex4 = B
% 31.96/31.93 | bitIndex5 = B
% 31.96/31.93 | bitIndex6 = B
% 31.96/31.93 | bitIndex7 = B
% 31.96/31.93 | bitIndex8 = B
% 31.96/31.93 | bitIndex9 = B ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2121,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2645(VarCurr,bitIndex0)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2120,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2645(VarCurr,bitIndex1)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2119,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2645(VarCurr,bitIndex2)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2118,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2645(VarCurr,bitIndex3)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2117,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2645(VarCurr,bitIndex4)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2116,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2645(VarCurr,bitIndex5)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2115,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2645(VarCurr,bitIndex6)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2114,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2645(VarCurr,bitIndex7)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2113,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2645(VarCurr,bitIndex8)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2112,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2645(VarCurr,bitIndex9)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2111,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( ( v2644(VarCurr,bitIndex8)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex39) )
% 31.96/31.93 & ( v2644(VarCurr,bitIndex7)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex38) )
% 31.96/31.93 & ( v2644(VarCurr,bitIndex6)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex37) )
% 31.96/31.93 & ( v2644(VarCurr,bitIndex5)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex36) )
% 31.96/31.93 & ( v2644(VarCurr,bitIndex4)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex35) )
% 31.96/31.93 & ( v2644(VarCurr,bitIndex3)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex34) )
% 31.96/31.93 & ( v2644(VarCurr,bitIndex2)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex33) )
% 31.96/31.93 & ( v2644(VarCurr,bitIndex1)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex32) )
% 31.96/31.93 & ( v2644(VarCurr,bitIndex0)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex31) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2110,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2644(VarCurr,bitIndex9)
% 31.96/31.93 <=> $false ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_466,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2641(VarCurr,bitIndex0)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex30)
% 31.96/31.93 & v2642(VarCurr,bitIndex0) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_465,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2641(VarCurr,bitIndex1)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex31)
% 31.96/31.93 & v2642(VarCurr,bitIndex1) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_464,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2641(VarCurr,bitIndex2)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex32)
% 31.96/31.93 & v2642(VarCurr,bitIndex2) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_463,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2641(VarCurr,bitIndex3)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex33)
% 31.96/31.93 & v2642(VarCurr,bitIndex3) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_462,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2641(VarCurr,bitIndex4)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex34)
% 31.96/31.93 & v2642(VarCurr,bitIndex4) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_461,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2641(VarCurr,bitIndex5)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex35)
% 31.96/31.93 & v2642(VarCurr,bitIndex5) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_460,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2641(VarCurr,bitIndex6)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex36)
% 31.96/31.93 & v2642(VarCurr,bitIndex6) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_459,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2641(VarCurr,bitIndex7)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex37)
% 31.96/31.93 & v2642(VarCurr,bitIndex7) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_458,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2641(VarCurr,bitIndex8)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex38)
% 31.96/31.93 & v2642(VarCurr,bitIndex8) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_457,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2641(VarCurr,bitIndex9)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex39)
% 31.96/31.93 & v2642(VarCurr,bitIndex9) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2109,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2642(VarCurr,bitIndex0)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2108,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2642(VarCurr,bitIndex1)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2107,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2642(VarCurr,bitIndex2)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2106,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2642(VarCurr,bitIndex3)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2105,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2642(VarCurr,bitIndex4)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2104,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2642(VarCurr,bitIndex5)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2103,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2642(VarCurr,bitIndex6)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2102,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2642(VarCurr,bitIndex7)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2101,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2642(VarCurr,bitIndex8)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2100,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2642(VarCurr,bitIndex9)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorEqualRangesMultipleBits_74,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_11_0(B)
% 31.96/31.93 => ( v2630(VarCurr,B)
% 31.96/31.93 <=> ( v2631(VarCurr,B)
% 31.96/31.93 & v2637(VarCurr,B) ) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2099,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2637(VarCurr,bitIndex0)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2098,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2637(VarCurr,bitIndex1)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2097,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2637(VarCurr,bitIndex2)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2096,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2637(VarCurr,bitIndex3)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2095,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2637(VarCurr,bitIndex4)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2094,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2637(VarCurr,bitIndex5)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2093,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2637(VarCurr,bitIndex6)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2092,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2637(VarCurr,bitIndex7)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2091,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2637(VarCurr,bitIndex8)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2090,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2637(VarCurr,bitIndex9)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2089,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2637(VarCurr,bitIndex10)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2088,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2637(VarCurr,bitIndex11)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorEqualRangesMultipleBits_73,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_11_0(B)
% 31.96/31.93 => ( v2631(VarCurr,B)
% 31.96/31.93 <=> ( v2632(VarCurr,B)
% 31.96/31.93 | v2634(VarCurr,B) ) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorEqualRangesMultipleBits_72,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_11_0(B)
% 31.96/31.93 => ( v2634(VarCurr,B)
% 31.96/31.93 <=> ( v2635(VarCurr,B)
% 31.96/31.93 & v2636(VarCurr,B) ) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(range_axiom_26,axiom,
% 31.96/31.93 ! [B] :
% 31.96/31.93 ( range_11_0(B)
% 31.96/31.93 <=> ( $false
% 31.96/31.93 | bitIndex0 = B
% 31.96/31.93 | bitIndex1 = B
% 31.96/31.93 | bitIndex2 = B
% 31.96/31.93 | bitIndex3 = B
% 31.96/31.93 | bitIndex4 = B
% 31.96/31.93 | bitIndex5 = B
% 31.96/31.93 | bitIndex6 = B
% 31.96/31.93 | bitIndex7 = B
% 31.96/31.93 | bitIndex8 = B
% 31.96/31.93 | bitIndex9 = B
% 31.96/31.93 | bitIndex10 = B
% 31.96/31.93 | bitIndex11 = B ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2087,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2636(VarCurr,bitIndex0)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2086,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2636(VarCurr,bitIndex1)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2085,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2636(VarCurr,bitIndex2)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2084,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2636(VarCurr,bitIndex3)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2083,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2636(VarCurr,bitIndex4)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2082,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2636(VarCurr,bitIndex5)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2081,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2636(VarCurr,bitIndex6)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2080,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2636(VarCurr,bitIndex7)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2079,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2636(VarCurr,bitIndex8)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2078,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2636(VarCurr,bitIndex9)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2077,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2636(VarCurr,bitIndex10)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2076,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2636(VarCurr,bitIndex11)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2075,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( ( v2635(VarCurr,bitIndex10)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex39) )
% 31.96/31.93 & ( v2635(VarCurr,bitIndex9)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex38) )
% 31.96/31.93 & ( v2635(VarCurr,bitIndex8)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex37) )
% 31.96/31.93 & ( v2635(VarCurr,bitIndex7)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex36) )
% 31.96/31.93 & ( v2635(VarCurr,bitIndex6)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex35) )
% 31.96/31.93 & ( v2635(VarCurr,bitIndex5)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex34) )
% 31.96/31.93 & ( v2635(VarCurr,bitIndex4)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex33) )
% 31.96/31.93 & ( v2635(VarCurr,bitIndex3)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex32) )
% 31.96/31.93 & ( v2635(VarCurr,bitIndex2)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex31) )
% 31.96/31.93 & ( v2635(VarCurr,bitIndex1)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex30) )
% 31.96/31.93 & ( v2635(VarCurr,bitIndex0)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex29) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2074,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2635(VarCurr,bitIndex11)
% 31.96/31.93 <=> $false ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_456,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2632(VarCurr,bitIndex0)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex28)
% 31.96/31.93 & v2633(VarCurr,bitIndex0) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_455,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2632(VarCurr,bitIndex1)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex29)
% 31.96/31.93 & v2633(VarCurr,bitIndex1) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_454,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2632(VarCurr,bitIndex2)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex30)
% 31.96/31.93 & v2633(VarCurr,bitIndex2) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_453,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2632(VarCurr,bitIndex3)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex31)
% 31.96/31.93 & v2633(VarCurr,bitIndex3) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_452,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2632(VarCurr,bitIndex4)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex32)
% 31.96/31.93 & v2633(VarCurr,bitIndex4) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_451,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2632(VarCurr,bitIndex5)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex33)
% 31.96/31.93 & v2633(VarCurr,bitIndex5) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_450,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2632(VarCurr,bitIndex6)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex34)
% 31.96/31.93 & v2633(VarCurr,bitIndex6) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_449,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2632(VarCurr,bitIndex7)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex35)
% 31.96/31.93 & v2633(VarCurr,bitIndex7) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_448,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2632(VarCurr,bitIndex8)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex36)
% 31.96/31.93 & v2633(VarCurr,bitIndex8) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_447,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2632(VarCurr,bitIndex9)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex37)
% 31.96/31.93 & v2633(VarCurr,bitIndex9) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_446,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2632(VarCurr,bitIndex10)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex38)
% 31.96/31.93 & v2633(VarCurr,bitIndex10) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_445,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2632(VarCurr,bitIndex11)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex39)
% 31.96/31.93 & v2633(VarCurr,bitIndex11) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2073,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2633(VarCurr,bitIndex0)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2072,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2633(VarCurr,bitIndex1)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2071,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2633(VarCurr,bitIndex2)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2070,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2633(VarCurr,bitIndex3)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2069,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2633(VarCurr,bitIndex4)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2068,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2633(VarCurr,bitIndex5)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2067,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2633(VarCurr,bitIndex6)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2066,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2633(VarCurr,bitIndex7)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2065,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2633(VarCurr,bitIndex8)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2064,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2633(VarCurr,bitIndex9)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2063,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2633(VarCurr,bitIndex10)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2062,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2633(VarCurr,bitIndex11)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorEqualRangesMultipleBits_71,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_15_0(B)
% 31.96/31.93 => ( v2607(VarCurr,B)
% 31.96/31.93 <=> ( v2608(VarCurr,B)
% 31.96/31.93 & v2626(VarCurr,B) ) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2061,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2626(VarCurr,bitIndex0)
% 31.96/31.93 <=> v2484(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2060,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2626(VarCurr,bitIndex1)
% 31.96/31.93 <=> v2484(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2059,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2626(VarCurr,bitIndex2)
% 31.96/31.93 <=> v2484(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2058,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2626(VarCurr,bitIndex3)
% 31.96/31.93 <=> v2484(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2057,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2626(VarCurr,bitIndex4)
% 31.96/31.93 <=> v2484(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2056,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2626(VarCurr,bitIndex5)
% 31.96/31.93 <=> v2484(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2055,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2626(VarCurr,bitIndex6)
% 31.96/31.93 <=> v2484(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2054,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2626(VarCurr,bitIndex7)
% 31.96/31.93 <=> v2484(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2053,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2626(VarCurr,bitIndex8)
% 31.96/31.93 <=> v2484(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2052,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2626(VarCurr,bitIndex9)
% 31.96/31.93 <=> v2484(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2051,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2626(VarCurr,bitIndex10)
% 31.96/31.93 <=> v2484(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2050,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2626(VarCurr,bitIndex11)
% 31.96/31.93 <=> v2484(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2049,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2626(VarCurr,bitIndex12)
% 31.96/31.93 <=> v2484(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2048,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2626(VarCurr,bitIndex13)
% 31.96/31.93 <=> v2484(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2047,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2626(VarCurr,bitIndex14)
% 31.96/31.93 <=> v2484(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2046,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2626(VarCurr,bitIndex15)
% 31.96/31.93 <=> v2484(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorEqualRangesMultipleBits_70,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_15_0(B)
% 31.96/31.93 => ( v2608(VarCurr,B)
% 31.96/31.93 <=> ( v2609(VarCurr,B)
% 31.96/31.93 | v2617(VarCurr,B) ) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorEqualRangesMultipleBits_69,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_15_0(B)
% 31.96/31.93 => ( v2617(VarCurr,B)
% 31.96/31.93 <=> ( v2618(VarCurr,B)
% 31.96/31.93 & v2625(VarCurr,B) ) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2045,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2625(VarCurr,bitIndex0)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2044,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2625(VarCurr,bitIndex1)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2043,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2625(VarCurr,bitIndex2)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2042,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2625(VarCurr,bitIndex3)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2041,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2625(VarCurr,bitIndex4)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2040,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2625(VarCurr,bitIndex5)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2039,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2625(VarCurr,bitIndex6)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2038,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2625(VarCurr,bitIndex7)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2037,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2625(VarCurr,bitIndex8)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2036,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2625(VarCurr,bitIndex9)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2035,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2625(VarCurr,bitIndex10)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2034,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2625(VarCurr,bitIndex11)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2033,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2625(VarCurr,bitIndex12)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2032,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2625(VarCurr,bitIndex13)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2031,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2625(VarCurr,bitIndex14)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2030,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2625(VarCurr,bitIndex15)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2029,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_13_0(B)
% 31.96/31.93 => ( v2618(VarCurr,B)
% 31.96/31.93 <=> v2619(VarCurr,B) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2028,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( ( v2618(VarCurr,bitIndex15)
% 31.96/31.93 <=> $false )
% 31.96/31.93 & ( v2618(VarCurr,bitIndex14)
% 31.96/31.93 <=> $false ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorEqualRangesMultipleBits_68,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_13_0(B)
% 31.96/31.93 => ( v2619(VarCurr,B)
% 31.96/31.93 <=> ( v2620(VarCurr,B)
% 31.96/31.93 | v2622(VarCurr,B) ) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorEqualRangesMultipleBits_67,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_13_0(B)
% 31.96/31.93 => ( v2622(VarCurr,B)
% 31.96/31.93 <=> ( v2623(VarCurr,B)
% 31.96/31.93 & v2624(VarCurr,B) ) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(range_axiom_25,axiom,
% 31.96/31.93 ! [B] :
% 31.96/31.93 ( range_13_0(B)
% 31.96/31.93 <=> ( $false
% 31.96/31.93 | bitIndex0 = B
% 31.96/31.93 | bitIndex1 = B
% 31.96/31.93 | bitIndex2 = B
% 31.96/31.93 | bitIndex3 = B
% 31.96/31.93 | bitIndex4 = B
% 31.96/31.93 | bitIndex5 = B
% 31.96/31.93 | bitIndex6 = B
% 31.96/31.93 | bitIndex7 = B
% 31.96/31.93 | bitIndex8 = B
% 31.96/31.93 | bitIndex9 = B
% 31.96/31.93 | bitIndex10 = B
% 31.96/31.93 | bitIndex11 = B
% 31.96/31.93 | bitIndex12 = B
% 31.96/31.93 | bitIndex13 = B ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2027,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2624(VarCurr,bitIndex0)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2026,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2624(VarCurr,bitIndex1)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2025,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2624(VarCurr,bitIndex2)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2024,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2624(VarCurr,bitIndex3)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2023,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2624(VarCurr,bitIndex4)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2022,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2624(VarCurr,bitIndex5)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2021,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2624(VarCurr,bitIndex6)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2020,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2624(VarCurr,bitIndex7)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2019,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2624(VarCurr,bitIndex8)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2018,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2624(VarCurr,bitIndex9)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2017,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2624(VarCurr,bitIndex10)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2016,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2624(VarCurr,bitIndex11)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2015,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2624(VarCurr,bitIndex12)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2014,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2624(VarCurr,bitIndex13)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2013,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( ( v2623(VarCurr,bitIndex12)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex39) )
% 31.96/31.93 & ( v2623(VarCurr,bitIndex11)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex38) )
% 31.96/31.93 & ( v2623(VarCurr,bitIndex10)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex37) )
% 31.96/31.93 & ( v2623(VarCurr,bitIndex9)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex36) )
% 31.96/31.93 & ( v2623(VarCurr,bitIndex8)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex35) )
% 31.96/31.93 & ( v2623(VarCurr,bitIndex7)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex34) )
% 31.96/31.93 & ( v2623(VarCurr,bitIndex6)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex33) )
% 31.96/31.93 & ( v2623(VarCurr,bitIndex5)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex32) )
% 31.96/31.93 & ( v2623(VarCurr,bitIndex4)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex31) )
% 31.96/31.93 & ( v2623(VarCurr,bitIndex3)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex30) )
% 31.96/31.93 & ( v2623(VarCurr,bitIndex2)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex29) )
% 31.96/31.93 & ( v2623(VarCurr,bitIndex1)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex28) )
% 31.96/31.93 & ( v2623(VarCurr,bitIndex0)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex27) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2012,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2623(VarCurr,bitIndex13)
% 31.96/31.93 <=> $false ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_444,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2620(VarCurr,bitIndex0)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex26)
% 31.96/31.93 & v2621(VarCurr,bitIndex0) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_443,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2620(VarCurr,bitIndex1)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex27)
% 31.96/31.93 & v2621(VarCurr,bitIndex1) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_442,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2620(VarCurr,bitIndex2)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex28)
% 31.96/31.93 & v2621(VarCurr,bitIndex2) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_441,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2620(VarCurr,bitIndex3)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex29)
% 31.96/31.93 & v2621(VarCurr,bitIndex3) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_440,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2620(VarCurr,bitIndex4)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex30)
% 31.96/31.93 & v2621(VarCurr,bitIndex4) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_439,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2620(VarCurr,bitIndex5)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex31)
% 31.96/31.93 & v2621(VarCurr,bitIndex5) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_438,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2620(VarCurr,bitIndex6)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex32)
% 31.96/31.93 & v2621(VarCurr,bitIndex6) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_437,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2620(VarCurr,bitIndex7)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex33)
% 31.96/31.93 & v2621(VarCurr,bitIndex7) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_436,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2620(VarCurr,bitIndex8)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex34)
% 31.96/31.93 & v2621(VarCurr,bitIndex8) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_435,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2620(VarCurr,bitIndex9)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex35)
% 31.96/31.93 & v2621(VarCurr,bitIndex9) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_434,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2620(VarCurr,bitIndex10)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex36)
% 31.96/31.93 & v2621(VarCurr,bitIndex10) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_433,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2620(VarCurr,bitIndex11)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex37)
% 31.96/31.93 & v2621(VarCurr,bitIndex11) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_432,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2620(VarCurr,bitIndex12)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex38)
% 31.96/31.93 & v2621(VarCurr,bitIndex12) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_431,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2620(VarCurr,bitIndex13)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex39)
% 31.96/31.93 & v2621(VarCurr,bitIndex13) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2011,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2621(VarCurr,bitIndex0)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2010,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2621(VarCurr,bitIndex1)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2009,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2621(VarCurr,bitIndex2)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2008,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2621(VarCurr,bitIndex3)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2007,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2621(VarCurr,bitIndex4)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2006,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2621(VarCurr,bitIndex5)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2005,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2621(VarCurr,bitIndex6)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2004,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2621(VarCurr,bitIndex7)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2003,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2621(VarCurr,bitIndex8)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2002,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2621(VarCurr,bitIndex9)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2001,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2621(VarCurr,bitIndex10)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_2000,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2621(VarCurr,bitIndex11)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1999,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2621(VarCurr,bitIndex12)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1998,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2621(VarCurr,bitIndex13)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorEqualRangesMultipleBits_66,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_15_0(B)
% 31.96/31.93 => ( v2609(VarCurr,B)
% 31.96/31.93 <=> ( v2610(VarCurr,B)
% 31.96/31.93 & v2616(VarCurr,B) ) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1997,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2616(VarCurr,bitIndex0)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1996,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2616(VarCurr,bitIndex1)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1995,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2616(VarCurr,bitIndex2)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1994,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2616(VarCurr,bitIndex3)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1993,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2616(VarCurr,bitIndex4)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1992,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2616(VarCurr,bitIndex5)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1991,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2616(VarCurr,bitIndex6)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1990,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2616(VarCurr,bitIndex7)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1989,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2616(VarCurr,bitIndex8)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1988,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2616(VarCurr,bitIndex9)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1987,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2616(VarCurr,bitIndex10)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1986,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2616(VarCurr,bitIndex11)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1985,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2616(VarCurr,bitIndex12)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1984,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2616(VarCurr,bitIndex13)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1983,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2616(VarCurr,bitIndex14)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1982,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2616(VarCurr,bitIndex15)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorEqualRangesMultipleBits_65,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_15_0(B)
% 31.96/31.93 => ( v2610(VarCurr,B)
% 31.96/31.93 <=> ( v2611(VarCurr,B)
% 31.96/31.93 | v2613(VarCurr,B) ) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorEqualRangesMultipleBits_64,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_15_0(B)
% 31.96/31.93 => ( v2613(VarCurr,B)
% 31.96/31.93 <=> ( v2614(VarCurr,B)
% 31.96/31.93 & v2615(VarCurr,B) ) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1981,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2615(VarCurr,bitIndex0)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1980,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2615(VarCurr,bitIndex1)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1979,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2615(VarCurr,bitIndex2)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1978,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2615(VarCurr,bitIndex3)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1977,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2615(VarCurr,bitIndex4)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1976,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2615(VarCurr,bitIndex5)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1975,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2615(VarCurr,bitIndex6)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1974,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2615(VarCurr,bitIndex7)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1973,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2615(VarCurr,bitIndex8)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1972,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2615(VarCurr,bitIndex9)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1971,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2615(VarCurr,bitIndex10)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1970,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2615(VarCurr,bitIndex11)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1969,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2615(VarCurr,bitIndex12)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1968,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2615(VarCurr,bitIndex13)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1967,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2615(VarCurr,bitIndex14)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1966,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2615(VarCurr,bitIndex15)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1965,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( ( v2614(VarCurr,bitIndex14)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex39) )
% 31.96/31.93 & ( v2614(VarCurr,bitIndex13)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex38) )
% 31.96/31.93 & ( v2614(VarCurr,bitIndex12)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex37) )
% 31.96/31.93 & ( v2614(VarCurr,bitIndex11)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex36) )
% 31.96/31.93 & ( v2614(VarCurr,bitIndex10)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex35) )
% 31.96/31.93 & ( v2614(VarCurr,bitIndex9)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex34) )
% 31.96/31.93 & ( v2614(VarCurr,bitIndex8)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex33) )
% 31.96/31.93 & ( v2614(VarCurr,bitIndex7)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex32) )
% 31.96/31.93 & ( v2614(VarCurr,bitIndex6)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex31) )
% 31.96/31.93 & ( v2614(VarCurr,bitIndex5)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex30) )
% 31.96/31.93 & ( v2614(VarCurr,bitIndex4)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex29) )
% 31.96/31.93 & ( v2614(VarCurr,bitIndex3)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex28) )
% 31.96/31.93 & ( v2614(VarCurr,bitIndex2)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex27) )
% 31.96/31.93 & ( v2614(VarCurr,bitIndex1)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex26) )
% 31.96/31.93 & ( v2614(VarCurr,bitIndex0)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex25) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1964,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2614(VarCurr,bitIndex15)
% 31.96/31.93 <=> $false ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_430,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2611(VarCurr,bitIndex0)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex24)
% 31.96/31.93 & v2612(VarCurr,bitIndex0) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_429,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2611(VarCurr,bitIndex1)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex25)
% 31.96/31.93 & v2612(VarCurr,bitIndex1) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_428,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2611(VarCurr,bitIndex2)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex26)
% 31.96/31.93 & v2612(VarCurr,bitIndex2) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_427,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2611(VarCurr,bitIndex3)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex27)
% 31.96/31.93 & v2612(VarCurr,bitIndex3) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_426,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2611(VarCurr,bitIndex4)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex28)
% 31.96/31.93 & v2612(VarCurr,bitIndex4) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_425,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2611(VarCurr,bitIndex5)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex29)
% 31.96/31.93 & v2612(VarCurr,bitIndex5) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_424,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2611(VarCurr,bitIndex6)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex30)
% 31.96/31.93 & v2612(VarCurr,bitIndex6) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_423,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2611(VarCurr,bitIndex7)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex31)
% 31.96/31.93 & v2612(VarCurr,bitIndex7) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_422,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2611(VarCurr,bitIndex8)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex32)
% 31.96/31.93 & v2612(VarCurr,bitIndex8) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_421,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2611(VarCurr,bitIndex9)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex33)
% 31.96/31.93 & v2612(VarCurr,bitIndex9) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_420,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2611(VarCurr,bitIndex10)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex34)
% 31.96/31.93 & v2612(VarCurr,bitIndex10) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_419,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2611(VarCurr,bitIndex11)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex35)
% 31.96/31.93 & v2612(VarCurr,bitIndex11) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_418,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2611(VarCurr,bitIndex12)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex36)
% 31.96/31.93 & v2612(VarCurr,bitIndex12) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_417,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2611(VarCurr,bitIndex13)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex37)
% 31.96/31.93 & v2612(VarCurr,bitIndex13) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_416,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2611(VarCurr,bitIndex14)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex38)
% 31.96/31.93 & v2612(VarCurr,bitIndex14) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_415,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2611(VarCurr,bitIndex15)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex39)
% 31.96/31.93 & v2612(VarCurr,bitIndex15) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1963,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2612(VarCurr,bitIndex0)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1962,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2612(VarCurr,bitIndex1)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1961,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2612(VarCurr,bitIndex2)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1960,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2612(VarCurr,bitIndex3)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1959,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2612(VarCurr,bitIndex4)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1958,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2612(VarCurr,bitIndex5)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1957,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2612(VarCurr,bitIndex6)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1956,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2612(VarCurr,bitIndex7)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1955,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2612(VarCurr,bitIndex8)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1954,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2612(VarCurr,bitIndex9)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1953,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2612(VarCurr,bitIndex10)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1952,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2612(VarCurr,bitIndex11)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1951,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2612(VarCurr,bitIndex12)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1950,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2612(VarCurr,bitIndex13)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1949,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2612(VarCurr,bitIndex14)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1948,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2612(VarCurr,bitIndex15)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorEqualRangesMultipleBits_63,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_23_0(B)
% 31.96/31.93 => ( v2560(VarCurr,B)
% 31.96/31.93 <=> ( v2561(VarCurr,B)
% 31.96/31.93 & v2603(VarCurr,B) ) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1947,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2603(VarCurr,bitIndex0)
% 31.96/31.93 <=> v2507(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1946,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2603(VarCurr,bitIndex1)
% 31.96/31.93 <=> v2507(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1945,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2603(VarCurr,bitIndex2)
% 31.96/31.93 <=> v2507(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1944,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2603(VarCurr,bitIndex3)
% 31.96/31.93 <=> v2507(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1943,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2603(VarCurr,bitIndex4)
% 31.96/31.93 <=> v2507(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1942,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2603(VarCurr,bitIndex5)
% 31.96/31.93 <=> v2507(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1941,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2603(VarCurr,bitIndex6)
% 31.96/31.93 <=> v2507(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1940,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2603(VarCurr,bitIndex7)
% 31.96/31.93 <=> v2507(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1939,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2603(VarCurr,bitIndex8)
% 31.96/31.93 <=> v2507(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1938,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2603(VarCurr,bitIndex9)
% 31.96/31.93 <=> v2507(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1937,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2603(VarCurr,bitIndex10)
% 31.96/31.93 <=> v2507(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1936,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2603(VarCurr,bitIndex11)
% 31.96/31.93 <=> v2507(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1935,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2603(VarCurr,bitIndex12)
% 31.96/31.93 <=> v2507(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1934,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2603(VarCurr,bitIndex13)
% 31.96/31.93 <=> v2507(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1933,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2603(VarCurr,bitIndex14)
% 31.96/31.93 <=> v2507(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1932,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2603(VarCurr,bitIndex15)
% 31.96/31.93 <=> v2507(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1931,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2603(VarCurr,bitIndex16)
% 31.96/31.93 <=> v2507(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1930,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2603(VarCurr,bitIndex17)
% 31.96/31.93 <=> v2507(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1929,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2603(VarCurr,bitIndex18)
% 31.96/31.93 <=> v2507(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1928,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2603(VarCurr,bitIndex19)
% 31.96/31.93 <=> v2507(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1927,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2603(VarCurr,bitIndex20)
% 31.96/31.93 <=> v2507(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1926,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2603(VarCurr,bitIndex21)
% 31.96/31.93 <=> v2507(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1925,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2603(VarCurr,bitIndex22)
% 31.96/31.93 <=> v2507(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1924,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2603(VarCurr,bitIndex23)
% 31.96/31.93 <=> v2507(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorEqualRangesMultipleBits_62,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_23_0(B)
% 31.96/31.93 => ( v2561(VarCurr,B)
% 31.96/31.93 <=> ( v2562(VarCurr,B)
% 31.96/31.93 | v2582(VarCurr,B) ) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorEqualRangesMultipleBits_61,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_23_0(B)
% 31.96/31.93 => ( v2582(VarCurr,B)
% 31.96/31.93 <=> ( v2583(VarCurr,B)
% 31.96/31.93 & v2602(VarCurr,B) ) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1923,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2602(VarCurr,bitIndex0)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1922,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2602(VarCurr,bitIndex1)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1921,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2602(VarCurr,bitIndex2)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1920,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2602(VarCurr,bitIndex3)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1919,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2602(VarCurr,bitIndex4)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1918,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2602(VarCurr,bitIndex5)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1917,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2602(VarCurr,bitIndex6)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1916,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2602(VarCurr,bitIndex7)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1915,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2602(VarCurr,bitIndex8)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1914,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2602(VarCurr,bitIndex9)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1913,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2602(VarCurr,bitIndex10)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1912,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2602(VarCurr,bitIndex11)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1911,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2602(VarCurr,bitIndex12)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1910,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2602(VarCurr,bitIndex13)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1909,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2602(VarCurr,bitIndex14)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1908,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2602(VarCurr,bitIndex15)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1907,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2602(VarCurr,bitIndex16)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1906,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2602(VarCurr,bitIndex17)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1905,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2602(VarCurr,bitIndex18)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1904,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2602(VarCurr,bitIndex19)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1903,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2602(VarCurr,bitIndex20)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1902,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2602(VarCurr,bitIndex21)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1901,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2602(VarCurr,bitIndex22)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1900,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2602(VarCurr,bitIndex23)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1899,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_19_0(B)
% 31.96/31.93 => ( v2583(VarCurr,B)
% 31.96/31.93 <=> v2584(VarCurr,B) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1898,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( ( v2583(VarCurr,bitIndex23)
% 31.96/31.93 <=> $false )
% 31.96/31.93 & ( v2583(VarCurr,bitIndex22)
% 31.96/31.93 <=> $false )
% 31.96/31.93 & ( v2583(VarCurr,bitIndex21)
% 31.96/31.93 <=> $false )
% 31.96/31.93 & ( v2583(VarCurr,bitIndex20)
% 31.96/31.93 <=> $false ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorEqualRangesMultipleBits_60,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_19_0(B)
% 31.96/31.93 => ( v2584(VarCurr,B)
% 31.96/31.93 <=> ( v2585(VarCurr,B)
% 31.96/31.93 | v2593(VarCurr,B) ) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorEqualRangesMultipleBits_59,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_19_0(B)
% 31.96/31.93 => ( v2593(VarCurr,B)
% 31.96/31.93 <=> ( v2594(VarCurr,B)
% 31.96/31.93 & v2601(VarCurr,B) ) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1897,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2601(VarCurr,bitIndex0)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1896,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2601(VarCurr,bitIndex1)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1895,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2601(VarCurr,bitIndex2)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1894,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2601(VarCurr,bitIndex3)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1893,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2601(VarCurr,bitIndex4)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1892,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2601(VarCurr,bitIndex5)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1891,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2601(VarCurr,bitIndex6)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1890,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2601(VarCurr,bitIndex7)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1889,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2601(VarCurr,bitIndex8)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1888,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2601(VarCurr,bitIndex9)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1887,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2601(VarCurr,bitIndex10)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1886,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2601(VarCurr,bitIndex11)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1885,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2601(VarCurr,bitIndex12)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1884,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2601(VarCurr,bitIndex13)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1883,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2601(VarCurr,bitIndex14)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1882,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2601(VarCurr,bitIndex15)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1881,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2601(VarCurr,bitIndex16)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1880,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2601(VarCurr,bitIndex17)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1879,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2601(VarCurr,bitIndex18)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1878,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2601(VarCurr,bitIndex19)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1877,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_17_0(B)
% 31.96/31.93 => ( v2594(VarCurr,B)
% 31.96/31.93 <=> v2595(VarCurr,B) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1876,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( ( v2594(VarCurr,bitIndex19)
% 31.96/31.93 <=> $false )
% 31.96/31.93 & ( v2594(VarCurr,bitIndex18)
% 31.96/31.93 <=> $false ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorEqualRangesMultipleBits_58,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_17_0(B)
% 31.96/31.93 => ( v2595(VarCurr,B)
% 31.96/31.93 <=> ( v2596(VarCurr,B)
% 31.96/31.93 | v2598(VarCurr,B) ) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorEqualRangesMultipleBits_57,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_17_0(B)
% 31.96/31.93 => ( v2598(VarCurr,B)
% 31.96/31.93 <=> ( v2599(VarCurr,B)
% 31.96/31.93 & v2600(VarCurr,B) ) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1875,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2600(VarCurr,bitIndex0)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1874,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2600(VarCurr,bitIndex1)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1873,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2600(VarCurr,bitIndex2)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1872,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2600(VarCurr,bitIndex3)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1871,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2600(VarCurr,bitIndex4)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1870,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2600(VarCurr,bitIndex5)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1869,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2600(VarCurr,bitIndex6)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1868,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2600(VarCurr,bitIndex7)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1867,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2600(VarCurr,bitIndex8)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1866,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2600(VarCurr,bitIndex9)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1865,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2600(VarCurr,bitIndex10)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1864,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2600(VarCurr,bitIndex11)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1863,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2600(VarCurr,bitIndex12)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1862,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2600(VarCurr,bitIndex13)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1861,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2600(VarCurr,bitIndex14)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1860,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2600(VarCurr,bitIndex15)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1859,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2600(VarCurr,bitIndex16)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1858,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2600(VarCurr,bitIndex17)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1857,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( ( v2599(VarCurr,bitIndex16)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex39) )
% 31.96/31.93 & ( v2599(VarCurr,bitIndex15)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex38) )
% 31.96/31.93 & ( v2599(VarCurr,bitIndex14)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex37) )
% 31.96/31.93 & ( v2599(VarCurr,bitIndex13)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex36) )
% 31.96/31.93 & ( v2599(VarCurr,bitIndex12)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex35) )
% 31.96/31.93 & ( v2599(VarCurr,bitIndex11)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex34) )
% 31.96/31.93 & ( v2599(VarCurr,bitIndex10)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex33) )
% 31.96/31.93 & ( v2599(VarCurr,bitIndex9)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex32) )
% 31.96/31.93 & ( v2599(VarCurr,bitIndex8)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex31) )
% 31.96/31.93 & ( v2599(VarCurr,bitIndex7)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex30) )
% 31.96/31.93 & ( v2599(VarCurr,bitIndex6)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex29) )
% 31.96/31.93 & ( v2599(VarCurr,bitIndex5)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex28) )
% 31.96/31.93 & ( v2599(VarCurr,bitIndex4)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex27) )
% 31.96/31.93 & ( v2599(VarCurr,bitIndex3)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex26) )
% 31.96/31.93 & ( v2599(VarCurr,bitIndex2)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex25) )
% 31.96/31.93 & ( v2599(VarCurr,bitIndex1)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex24) )
% 31.96/31.93 & ( v2599(VarCurr,bitIndex0)
% 31.96/31.93 <=> v2465(VarCurr,bitIndex23) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1856,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2599(VarCurr,bitIndex17)
% 31.96/31.93 <=> $false ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_414,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2596(VarCurr,bitIndex0)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex22)
% 31.96/31.93 & v2597(VarCurr,bitIndex0) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_413,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2596(VarCurr,bitIndex1)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex23)
% 31.96/31.93 & v2597(VarCurr,bitIndex1) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_412,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2596(VarCurr,bitIndex2)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex24)
% 31.96/31.93 & v2597(VarCurr,bitIndex2) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_411,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2596(VarCurr,bitIndex3)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex25)
% 31.96/31.93 & v2597(VarCurr,bitIndex3) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_410,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2596(VarCurr,bitIndex4)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex26)
% 31.96/31.93 & v2597(VarCurr,bitIndex4) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_409,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2596(VarCurr,bitIndex5)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex27)
% 31.96/31.93 & v2597(VarCurr,bitIndex5) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_408,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2596(VarCurr,bitIndex6)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex28)
% 31.96/31.93 & v2597(VarCurr,bitIndex6) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_407,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2596(VarCurr,bitIndex7)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex29)
% 31.96/31.93 & v2597(VarCurr,bitIndex7) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_406,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2596(VarCurr,bitIndex8)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex30)
% 31.96/31.93 & v2597(VarCurr,bitIndex8) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_405,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2596(VarCurr,bitIndex9)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex31)
% 31.96/31.93 & v2597(VarCurr,bitIndex9) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_404,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2596(VarCurr,bitIndex10)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex32)
% 31.96/31.93 & v2597(VarCurr,bitIndex10) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_403,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2596(VarCurr,bitIndex11)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex33)
% 31.96/31.93 & v2597(VarCurr,bitIndex11) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_402,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2596(VarCurr,bitIndex12)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex34)
% 31.96/31.93 & v2597(VarCurr,bitIndex12) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_401,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2596(VarCurr,bitIndex13)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex35)
% 31.96/31.93 & v2597(VarCurr,bitIndex13) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_400,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2596(VarCurr,bitIndex14)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex36)
% 31.96/31.93 & v2597(VarCurr,bitIndex14) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_399,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2596(VarCurr,bitIndex15)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex37)
% 31.96/31.93 & v2597(VarCurr,bitIndex15) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_398,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2596(VarCurr,bitIndex16)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex38)
% 31.96/31.93 & v2597(VarCurr,bitIndex16) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorShiftedRanges_397,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2596(VarCurr,bitIndex17)
% 31.96/31.93 <=> ( v2465(VarCurr,bitIndex39)
% 31.96/31.93 & v2597(VarCurr,bitIndex17) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1855,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2597(VarCurr,bitIndex0)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1854,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2597(VarCurr,bitIndex1)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1853,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2597(VarCurr,bitIndex2)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1852,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2597(VarCurr,bitIndex3)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1851,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2597(VarCurr,bitIndex4)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1850,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2597(VarCurr,bitIndex5)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1849,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2597(VarCurr,bitIndex6)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1848,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2597(VarCurr,bitIndex7)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1847,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2597(VarCurr,bitIndex8)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1846,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2597(VarCurr,bitIndex9)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1845,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2597(VarCurr,bitIndex10)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1844,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2597(VarCurr,bitIndex11)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1843,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2597(VarCurr,bitIndex12)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1842,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2597(VarCurr,bitIndex13)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1841,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2597(VarCurr,bitIndex14)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1840,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2597(VarCurr,bitIndex15)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1839,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2597(VarCurr,bitIndex16)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1838,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2597(VarCurr,bitIndex17)
% 31.96/31.93 <=> v2468(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorEqualRangesMultipleBits_56,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_19_0(B)
% 31.96/31.93 => ( v2585(VarCurr,B)
% 31.96/31.93 <=> ( v2586(VarCurr,B)
% 31.96/31.93 & v2592(VarCurr,B) ) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1837,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2592(VarCurr,bitIndex0)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1836,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2592(VarCurr,bitIndex1)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1835,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2592(VarCurr,bitIndex2)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1834,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2592(VarCurr,bitIndex3)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1833,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2592(VarCurr,bitIndex4)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1832,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2592(VarCurr,bitIndex5)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1831,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2592(VarCurr,bitIndex6)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1830,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2592(VarCurr,bitIndex7)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1829,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2592(VarCurr,bitIndex8)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1828,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2592(VarCurr,bitIndex9)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1827,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2592(VarCurr,bitIndex10)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1826,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2592(VarCurr,bitIndex11)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1825,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2592(VarCurr,bitIndex12)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1824,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2592(VarCurr,bitIndex13)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1823,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2592(VarCurr,bitIndex14)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1822,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2592(VarCurr,bitIndex15)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1821,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2592(VarCurr,bitIndex16)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1820,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2592(VarCurr,bitIndex17)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1819,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2592(VarCurr,bitIndex18)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1818,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2592(VarCurr,bitIndex19)
% 31.96/31.93 <=> v2473(VarCurr) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorEqualRangesMultipleBits_55,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_19_0(B)
% 31.96/31.93 => ( v2586(VarCurr,B)
% 31.96/31.93 <=> ( v2587(VarCurr,B)
% 31.96/31.93 | v2589(VarCurr,B) ) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(writeBinaryOperatorEqualRangesMultipleBits_54,axiom,
% 31.96/31.93 ! [VarCurr,B] :
% 31.96/31.93 ( range_19_0(B)
% 31.96/31.93 => ( v2589(VarCurr,B)
% 31.96/31.93 <=> ( v2590(VarCurr,B)
% 31.96/31.93 & v2591(VarCurr,B) ) ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(range_axiom_24,axiom,
% 31.96/31.93 ! [B] :
% 31.96/31.93 ( range_19_0(B)
% 31.96/31.93 <=> ( $false
% 31.96/31.93 | bitIndex0 = B
% 31.96/31.93 | bitIndex1 = B
% 31.96/31.93 | bitIndex2 = B
% 31.96/31.93 | bitIndex3 = B
% 31.96/31.93 | bitIndex4 = B
% 31.96/31.93 | bitIndex5 = B
% 31.96/31.93 | bitIndex6 = B
% 31.96/31.93 | bitIndex7 = B
% 31.96/31.93 | bitIndex8 = B
% 31.96/31.93 | bitIndex9 = B
% 31.96/31.93 | bitIndex10 = B
% 31.96/31.93 | bitIndex11 = B
% 31.96/31.93 | bitIndex12 = B
% 31.96/31.93 | bitIndex13 = B
% 31.96/31.93 | bitIndex14 = B
% 31.96/31.93 | bitIndex15 = B
% 31.96/31.93 | bitIndex16 = B
% 31.96/31.93 | bitIndex17 = B
% 31.96/31.93 | bitIndex18 = B
% 31.96/31.93 | bitIndex19 = B ) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1817,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2591(VarCurr,bitIndex0)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1816,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2591(VarCurr,bitIndex1)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1815,axiom,
% 31.96/31.93 ! [VarCurr] :
% 31.96/31.93 ( v2591(VarCurr,bitIndex2)
% 31.96/31.93 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.93
% 31.96/31.93 fof(addAssignment_1814,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2591(VarCurr,bitIndex3)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1813,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2591(VarCurr,bitIndex4)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1812,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2591(VarCurr,bitIndex5)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1811,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2591(VarCurr,bitIndex6)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1810,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2591(VarCurr,bitIndex7)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1809,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2591(VarCurr,bitIndex8)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1808,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2591(VarCurr,bitIndex9)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1807,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2591(VarCurr,bitIndex10)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1806,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2591(VarCurr,bitIndex11)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1805,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2591(VarCurr,bitIndex12)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1804,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2591(VarCurr,bitIndex13)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1803,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2591(VarCurr,bitIndex14)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1802,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2591(VarCurr,bitIndex15)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1801,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2591(VarCurr,bitIndex16)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1800,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2591(VarCurr,bitIndex17)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1799,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2591(VarCurr,bitIndex18)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1798,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2591(VarCurr,bitIndex19)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1797,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( ( v2590(VarCurr,bitIndex18)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex39) )
% 31.96/31.94 & ( v2590(VarCurr,bitIndex17)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex38) )
% 31.96/31.94 & ( v2590(VarCurr,bitIndex16)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex37) )
% 31.96/31.94 & ( v2590(VarCurr,bitIndex15)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex36) )
% 31.96/31.94 & ( v2590(VarCurr,bitIndex14)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex35) )
% 31.96/31.94 & ( v2590(VarCurr,bitIndex13)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex34) )
% 31.96/31.94 & ( v2590(VarCurr,bitIndex12)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex33) )
% 31.96/31.94 & ( v2590(VarCurr,bitIndex11)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex32) )
% 31.96/31.94 & ( v2590(VarCurr,bitIndex10)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex31) )
% 31.96/31.94 & ( v2590(VarCurr,bitIndex9)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex30) )
% 31.96/31.94 & ( v2590(VarCurr,bitIndex8)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex29) )
% 31.96/31.94 & ( v2590(VarCurr,bitIndex7)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex28) )
% 31.96/31.94 & ( v2590(VarCurr,bitIndex6)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex27) )
% 31.96/31.94 & ( v2590(VarCurr,bitIndex5)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex26) )
% 31.96/31.94 & ( v2590(VarCurr,bitIndex4)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex25) )
% 31.96/31.94 & ( v2590(VarCurr,bitIndex3)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex24) )
% 31.96/31.94 & ( v2590(VarCurr,bitIndex2)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex23) )
% 31.96/31.94 & ( v2590(VarCurr,bitIndex1)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex22) )
% 31.96/31.94 & ( v2590(VarCurr,bitIndex0)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex21) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1796,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2590(VarCurr,bitIndex19)
% 31.96/31.94 <=> $false ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_396,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2587(VarCurr,bitIndex0)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex20)
% 31.96/31.94 & v2588(VarCurr,bitIndex0) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_395,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2587(VarCurr,bitIndex1)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex21)
% 31.96/31.94 & v2588(VarCurr,bitIndex1) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_394,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2587(VarCurr,bitIndex2)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex22)
% 31.96/31.94 & v2588(VarCurr,bitIndex2) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_393,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2587(VarCurr,bitIndex3)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex23)
% 31.96/31.94 & v2588(VarCurr,bitIndex3) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_392,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2587(VarCurr,bitIndex4)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex24)
% 31.96/31.94 & v2588(VarCurr,bitIndex4) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_391,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2587(VarCurr,bitIndex5)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex25)
% 31.96/31.94 & v2588(VarCurr,bitIndex5) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_390,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2587(VarCurr,bitIndex6)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex26)
% 31.96/31.94 & v2588(VarCurr,bitIndex6) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_389,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2587(VarCurr,bitIndex7)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex27)
% 31.96/31.94 & v2588(VarCurr,bitIndex7) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_388,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2587(VarCurr,bitIndex8)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex28)
% 31.96/31.94 & v2588(VarCurr,bitIndex8) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_387,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2587(VarCurr,bitIndex9)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex29)
% 31.96/31.94 & v2588(VarCurr,bitIndex9) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_386,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2587(VarCurr,bitIndex10)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex30)
% 31.96/31.94 & v2588(VarCurr,bitIndex10) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_385,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2587(VarCurr,bitIndex11)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex31)
% 31.96/31.94 & v2588(VarCurr,bitIndex11) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_384,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2587(VarCurr,bitIndex12)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex32)
% 31.96/31.94 & v2588(VarCurr,bitIndex12) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_383,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2587(VarCurr,bitIndex13)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex33)
% 31.96/31.94 & v2588(VarCurr,bitIndex13) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_382,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2587(VarCurr,bitIndex14)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex34)
% 31.96/31.94 & v2588(VarCurr,bitIndex14) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_381,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2587(VarCurr,bitIndex15)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex35)
% 31.96/31.94 & v2588(VarCurr,bitIndex15) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_380,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2587(VarCurr,bitIndex16)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex36)
% 31.96/31.94 & v2588(VarCurr,bitIndex16) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_379,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2587(VarCurr,bitIndex17)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex37)
% 31.96/31.94 & v2588(VarCurr,bitIndex17) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_378,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2587(VarCurr,bitIndex18)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex38)
% 31.96/31.94 & v2588(VarCurr,bitIndex18) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_377,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2587(VarCurr,bitIndex19)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex39)
% 31.96/31.94 & v2588(VarCurr,bitIndex19) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1795,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2588(VarCurr,bitIndex0)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1794,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2588(VarCurr,bitIndex1)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1793,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2588(VarCurr,bitIndex2)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1792,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2588(VarCurr,bitIndex3)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1791,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2588(VarCurr,bitIndex4)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1790,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2588(VarCurr,bitIndex5)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1789,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2588(VarCurr,bitIndex6)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1788,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2588(VarCurr,bitIndex7)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1787,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2588(VarCurr,bitIndex8)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1786,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2588(VarCurr,bitIndex9)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1785,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2588(VarCurr,bitIndex10)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1784,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2588(VarCurr,bitIndex11)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1783,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2588(VarCurr,bitIndex12)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1782,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2588(VarCurr,bitIndex13)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1781,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2588(VarCurr,bitIndex14)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1780,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2588(VarCurr,bitIndex15)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1779,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2588(VarCurr,bitIndex16)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1778,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2588(VarCurr,bitIndex17)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1777,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2588(VarCurr,bitIndex18)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1776,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2588(VarCurr,bitIndex19)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorEqualRangesMultipleBits_53,axiom,
% 31.96/31.94 ! [VarCurr,B] :
% 31.96/31.94 ( range_23_0(B)
% 31.96/31.94 => ( v2562(VarCurr,B)
% 31.96/31.94 <=> ( v2563(VarCurr,B)
% 31.96/31.94 & v2581(VarCurr,B) ) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1775,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2581(VarCurr,bitIndex0)
% 31.96/31.94 <=> v2484(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1774,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2581(VarCurr,bitIndex1)
% 31.96/31.94 <=> v2484(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1773,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2581(VarCurr,bitIndex2)
% 31.96/31.94 <=> v2484(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1772,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2581(VarCurr,bitIndex3)
% 31.96/31.94 <=> v2484(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1771,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2581(VarCurr,bitIndex4)
% 31.96/31.94 <=> v2484(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1770,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2581(VarCurr,bitIndex5)
% 31.96/31.94 <=> v2484(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1769,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2581(VarCurr,bitIndex6)
% 31.96/31.94 <=> v2484(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1768,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2581(VarCurr,bitIndex7)
% 31.96/31.94 <=> v2484(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1767,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2581(VarCurr,bitIndex8)
% 31.96/31.94 <=> v2484(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1766,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2581(VarCurr,bitIndex9)
% 31.96/31.94 <=> v2484(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1765,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2581(VarCurr,bitIndex10)
% 31.96/31.94 <=> v2484(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1764,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2581(VarCurr,bitIndex11)
% 31.96/31.94 <=> v2484(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1763,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2581(VarCurr,bitIndex12)
% 31.96/31.94 <=> v2484(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1762,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2581(VarCurr,bitIndex13)
% 31.96/31.94 <=> v2484(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1761,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2581(VarCurr,bitIndex14)
% 31.96/31.94 <=> v2484(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1760,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2581(VarCurr,bitIndex15)
% 31.96/31.94 <=> v2484(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1759,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2581(VarCurr,bitIndex16)
% 31.96/31.94 <=> v2484(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1758,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2581(VarCurr,bitIndex17)
% 31.96/31.94 <=> v2484(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1757,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2581(VarCurr,bitIndex18)
% 31.96/31.94 <=> v2484(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1756,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2581(VarCurr,bitIndex19)
% 31.96/31.94 <=> v2484(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1755,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2581(VarCurr,bitIndex20)
% 31.96/31.94 <=> v2484(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1754,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2581(VarCurr,bitIndex21)
% 31.96/31.94 <=> v2484(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1753,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2581(VarCurr,bitIndex22)
% 31.96/31.94 <=> v2484(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1752,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2581(VarCurr,bitIndex23)
% 31.96/31.94 <=> v2484(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorEqualRangesMultipleBits_52,axiom,
% 31.96/31.94 ! [VarCurr,B] :
% 31.96/31.94 ( range_23_0(B)
% 31.96/31.94 => ( v2563(VarCurr,B)
% 31.96/31.94 <=> ( v2564(VarCurr,B)
% 31.96/31.94 | v2572(VarCurr,B) ) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorEqualRangesMultipleBits_51,axiom,
% 31.96/31.94 ! [VarCurr,B] :
% 31.96/31.94 ( range_23_0(B)
% 31.96/31.94 => ( v2572(VarCurr,B)
% 31.96/31.94 <=> ( v2573(VarCurr,B)
% 31.96/31.94 & v2580(VarCurr,B) ) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1751,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2580(VarCurr,bitIndex0)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1750,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2580(VarCurr,bitIndex1)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1749,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2580(VarCurr,bitIndex2)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1748,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2580(VarCurr,bitIndex3)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1747,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2580(VarCurr,bitIndex4)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1746,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2580(VarCurr,bitIndex5)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1745,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2580(VarCurr,bitIndex6)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1744,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2580(VarCurr,bitIndex7)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1743,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2580(VarCurr,bitIndex8)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1742,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2580(VarCurr,bitIndex9)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1741,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2580(VarCurr,bitIndex10)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1740,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2580(VarCurr,bitIndex11)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1739,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2580(VarCurr,bitIndex12)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1738,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2580(VarCurr,bitIndex13)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1737,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2580(VarCurr,bitIndex14)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1736,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2580(VarCurr,bitIndex15)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1735,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2580(VarCurr,bitIndex16)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1734,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2580(VarCurr,bitIndex17)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1733,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2580(VarCurr,bitIndex18)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1732,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2580(VarCurr,bitIndex19)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1731,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2580(VarCurr,bitIndex20)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1730,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2580(VarCurr,bitIndex21)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1729,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2580(VarCurr,bitIndex22)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1728,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2580(VarCurr,bitIndex23)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1727,axiom,
% 31.96/31.94 ! [VarCurr,B] :
% 31.96/31.94 ( range_21_0(B)
% 31.96/31.94 => ( v2573(VarCurr,B)
% 31.96/31.94 <=> v2574(VarCurr,B) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1726,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( ( v2573(VarCurr,bitIndex23)
% 31.96/31.94 <=> $false )
% 31.96/31.94 & ( v2573(VarCurr,bitIndex22)
% 31.96/31.94 <=> $false ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorEqualRangesMultipleBits_50,axiom,
% 31.96/31.94 ! [VarCurr,B] :
% 31.96/31.94 ( range_21_0(B)
% 31.96/31.94 => ( v2574(VarCurr,B)
% 31.96/31.94 <=> ( v2575(VarCurr,B)
% 31.96/31.94 | v2577(VarCurr,B) ) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorEqualRangesMultipleBits_49,axiom,
% 31.96/31.94 ! [VarCurr,B] :
% 31.96/31.94 ( range_21_0(B)
% 31.96/31.94 => ( v2577(VarCurr,B)
% 31.96/31.94 <=> ( v2578(VarCurr,B)
% 31.96/31.94 & v2579(VarCurr,B) ) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(range_axiom_23,axiom,
% 31.96/31.94 ! [B] :
% 31.96/31.94 ( range_21_0(B)
% 31.96/31.94 <=> ( $false
% 31.96/31.94 | bitIndex0 = B
% 31.96/31.94 | bitIndex1 = B
% 31.96/31.94 | bitIndex2 = B
% 31.96/31.94 | bitIndex3 = B
% 31.96/31.94 | bitIndex4 = B
% 31.96/31.94 | bitIndex5 = B
% 31.96/31.94 | bitIndex6 = B
% 31.96/31.94 | bitIndex7 = B
% 31.96/31.94 | bitIndex8 = B
% 31.96/31.94 | bitIndex9 = B
% 31.96/31.94 | bitIndex10 = B
% 31.96/31.94 | bitIndex11 = B
% 31.96/31.94 | bitIndex12 = B
% 31.96/31.94 | bitIndex13 = B
% 31.96/31.94 | bitIndex14 = B
% 31.96/31.94 | bitIndex15 = B
% 31.96/31.94 | bitIndex16 = B
% 31.96/31.94 | bitIndex17 = B
% 31.96/31.94 | bitIndex18 = B
% 31.96/31.94 | bitIndex19 = B
% 31.96/31.94 | bitIndex20 = B
% 31.96/31.94 | bitIndex21 = B ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1725,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2579(VarCurr,bitIndex0)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1724,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2579(VarCurr,bitIndex1)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1723,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2579(VarCurr,bitIndex2)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1722,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2579(VarCurr,bitIndex3)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1721,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2579(VarCurr,bitIndex4)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1720,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2579(VarCurr,bitIndex5)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1719,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2579(VarCurr,bitIndex6)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1718,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2579(VarCurr,bitIndex7)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1717,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2579(VarCurr,bitIndex8)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1716,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2579(VarCurr,bitIndex9)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1715,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2579(VarCurr,bitIndex10)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1714,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2579(VarCurr,bitIndex11)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1713,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2579(VarCurr,bitIndex12)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1712,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2579(VarCurr,bitIndex13)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1711,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2579(VarCurr,bitIndex14)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1710,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2579(VarCurr,bitIndex15)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1709,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2579(VarCurr,bitIndex16)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1708,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2579(VarCurr,bitIndex17)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1707,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2579(VarCurr,bitIndex18)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1706,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2579(VarCurr,bitIndex19)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1705,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2579(VarCurr,bitIndex20)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1704,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2579(VarCurr,bitIndex21)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1703,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( ( v2578(VarCurr,bitIndex20)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex39) )
% 31.96/31.94 & ( v2578(VarCurr,bitIndex19)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex38) )
% 31.96/31.94 & ( v2578(VarCurr,bitIndex18)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex37) )
% 31.96/31.94 & ( v2578(VarCurr,bitIndex17)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex36) )
% 31.96/31.94 & ( v2578(VarCurr,bitIndex16)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex35) )
% 31.96/31.94 & ( v2578(VarCurr,bitIndex15)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex34) )
% 31.96/31.94 & ( v2578(VarCurr,bitIndex14)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex33) )
% 31.96/31.94 & ( v2578(VarCurr,bitIndex13)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex32) )
% 31.96/31.94 & ( v2578(VarCurr,bitIndex12)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex31) )
% 31.96/31.94 & ( v2578(VarCurr,bitIndex11)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex30) )
% 31.96/31.94 & ( v2578(VarCurr,bitIndex10)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex29) )
% 31.96/31.94 & ( v2578(VarCurr,bitIndex9)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex28) )
% 31.96/31.94 & ( v2578(VarCurr,bitIndex8)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex27) )
% 31.96/31.94 & ( v2578(VarCurr,bitIndex7)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex26) )
% 31.96/31.94 & ( v2578(VarCurr,bitIndex6)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex25) )
% 31.96/31.94 & ( v2578(VarCurr,bitIndex5)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex24) )
% 31.96/31.94 & ( v2578(VarCurr,bitIndex4)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex23) )
% 31.96/31.94 & ( v2578(VarCurr,bitIndex3)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex22) )
% 31.96/31.94 & ( v2578(VarCurr,bitIndex2)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex21) )
% 31.96/31.94 & ( v2578(VarCurr,bitIndex1)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex20) )
% 31.96/31.94 & ( v2578(VarCurr,bitIndex0)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex19) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1702,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2578(VarCurr,bitIndex21)
% 31.96/31.94 <=> $false ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_376,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2575(VarCurr,bitIndex0)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex18)
% 31.96/31.94 & v2576(VarCurr,bitIndex0) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_375,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2575(VarCurr,bitIndex1)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex19)
% 31.96/31.94 & v2576(VarCurr,bitIndex1) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_374,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2575(VarCurr,bitIndex2)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex20)
% 31.96/31.94 & v2576(VarCurr,bitIndex2) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_373,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2575(VarCurr,bitIndex3)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex21)
% 31.96/31.94 & v2576(VarCurr,bitIndex3) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_372,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2575(VarCurr,bitIndex4)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex22)
% 31.96/31.94 & v2576(VarCurr,bitIndex4) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_371,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2575(VarCurr,bitIndex5)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex23)
% 31.96/31.94 & v2576(VarCurr,bitIndex5) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_370,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2575(VarCurr,bitIndex6)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex24)
% 31.96/31.94 & v2576(VarCurr,bitIndex6) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_369,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2575(VarCurr,bitIndex7)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex25)
% 31.96/31.94 & v2576(VarCurr,bitIndex7) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_368,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2575(VarCurr,bitIndex8)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex26)
% 31.96/31.94 & v2576(VarCurr,bitIndex8) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_367,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2575(VarCurr,bitIndex9)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex27)
% 31.96/31.94 & v2576(VarCurr,bitIndex9) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_366,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2575(VarCurr,bitIndex10)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex28)
% 31.96/31.94 & v2576(VarCurr,bitIndex10) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_365,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2575(VarCurr,bitIndex11)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex29)
% 31.96/31.94 & v2576(VarCurr,bitIndex11) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_364,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2575(VarCurr,bitIndex12)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex30)
% 31.96/31.94 & v2576(VarCurr,bitIndex12) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_363,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2575(VarCurr,bitIndex13)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex31)
% 31.96/31.94 & v2576(VarCurr,bitIndex13) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_362,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2575(VarCurr,bitIndex14)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex32)
% 31.96/31.94 & v2576(VarCurr,bitIndex14) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_361,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2575(VarCurr,bitIndex15)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex33)
% 31.96/31.94 & v2576(VarCurr,bitIndex15) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_360,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2575(VarCurr,bitIndex16)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex34)
% 31.96/31.94 & v2576(VarCurr,bitIndex16) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_359,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2575(VarCurr,bitIndex17)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex35)
% 31.96/31.94 & v2576(VarCurr,bitIndex17) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_358,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2575(VarCurr,bitIndex18)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex36)
% 31.96/31.94 & v2576(VarCurr,bitIndex18) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_357,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2575(VarCurr,bitIndex19)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex37)
% 31.96/31.94 & v2576(VarCurr,bitIndex19) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_356,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2575(VarCurr,bitIndex20)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex38)
% 31.96/31.94 & v2576(VarCurr,bitIndex20) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_355,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2575(VarCurr,bitIndex21)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex39)
% 31.96/31.94 & v2576(VarCurr,bitIndex21) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1701,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2576(VarCurr,bitIndex0)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1700,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2576(VarCurr,bitIndex1)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1699,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2576(VarCurr,bitIndex2)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1698,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2576(VarCurr,bitIndex3)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1697,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2576(VarCurr,bitIndex4)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1696,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2576(VarCurr,bitIndex5)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1695,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2576(VarCurr,bitIndex6)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1694,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2576(VarCurr,bitIndex7)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1693,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2576(VarCurr,bitIndex8)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1692,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2576(VarCurr,bitIndex9)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1691,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2576(VarCurr,bitIndex10)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1690,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2576(VarCurr,bitIndex11)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1689,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2576(VarCurr,bitIndex12)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1688,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2576(VarCurr,bitIndex13)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1687,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2576(VarCurr,bitIndex14)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1686,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2576(VarCurr,bitIndex15)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1685,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2576(VarCurr,bitIndex16)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1684,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2576(VarCurr,bitIndex17)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1683,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2576(VarCurr,bitIndex18)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1682,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2576(VarCurr,bitIndex19)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1681,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2576(VarCurr,bitIndex20)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1680,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2576(VarCurr,bitIndex21)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorEqualRangesMultipleBits_48,axiom,
% 31.96/31.94 ! [VarCurr,B] :
% 31.96/31.94 ( range_23_0(B)
% 31.96/31.94 => ( v2564(VarCurr,B)
% 31.96/31.94 <=> ( v2565(VarCurr,B)
% 31.96/31.94 & v2571(VarCurr,B) ) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1679,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2571(VarCurr,bitIndex0)
% 31.96/31.94 <=> v2473(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1678,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2571(VarCurr,bitIndex1)
% 31.96/31.94 <=> v2473(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1677,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2571(VarCurr,bitIndex2)
% 31.96/31.94 <=> v2473(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1676,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2571(VarCurr,bitIndex3)
% 31.96/31.94 <=> v2473(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1675,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2571(VarCurr,bitIndex4)
% 31.96/31.94 <=> v2473(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1674,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2571(VarCurr,bitIndex5)
% 31.96/31.94 <=> v2473(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1673,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2571(VarCurr,bitIndex6)
% 31.96/31.94 <=> v2473(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1672,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2571(VarCurr,bitIndex7)
% 31.96/31.94 <=> v2473(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1671,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2571(VarCurr,bitIndex8)
% 31.96/31.94 <=> v2473(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1670,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2571(VarCurr,bitIndex9)
% 31.96/31.94 <=> v2473(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1669,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2571(VarCurr,bitIndex10)
% 31.96/31.94 <=> v2473(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1668,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2571(VarCurr,bitIndex11)
% 31.96/31.94 <=> v2473(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1667,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2571(VarCurr,bitIndex12)
% 31.96/31.94 <=> v2473(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1666,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2571(VarCurr,bitIndex13)
% 31.96/31.94 <=> v2473(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1665,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2571(VarCurr,bitIndex14)
% 31.96/31.94 <=> v2473(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1664,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2571(VarCurr,bitIndex15)
% 31.96/31.94 <=> v2473(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1663,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2571(VarCurr,bitIndex16)
% 31.96/31.94 <=> v2473(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1662,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2571(VarCurr,bitIndex17)
% 31.96/31.94 <=> v2473(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1661,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2571(VarCurr,bitIndex18)
% 31.96/31.94 <=> v2473(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1660,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2571(VarCurr,bitIndex19)
% 31.96/31.94 <=> v2473(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1659,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2571(VarCurr,bitIndex20)
% 31.96/31.94 <=> v2473(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1658,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2571(VarCurr,bitIndex21)
% 31.96/31.94 <=> v2473(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1657,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2571(VarCurr,bitIndex22)
% 31.96/31.94 <=> v2473(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1656,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2571(VarCurr,bitIndex23)
% 31.96/31.94 <=> v2473(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorEqualRangesMultipleBits_47,axiom,
% 31.96/31.94 ! [VarCurr,B] :
% 31.96/31.94 ( range_23_0(B)
% 31.96/31.94 => ( v2565(VarCurr,B)
% 31.96/31.94 <=> ( v2566(VarCurr,B)
% 31.96/31.94 | v2568(VarCurr,B) ) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorEqualRangesMultipleBits_46,axiom,
% 31.96/31.94 ! [VarCurr,B] :
% 31.96/31.94 ( range_23_0(B)
% 31.96/31.94 => ( v2568(VarCurr,B)
% 31.96/31.94 <=> ( v2569(VarCurr,B)
% 31.96/31.94 & v2570(VarCurr,B) ) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(range_axiom_22,axiom,
% 31.96/31.94 ! [B] :
% 31.96/31.94 ( range_23_0(B)
% 31.96/31.94 <=> ( $false
% 31.96/31.94 | bitIndex0 = B
% 31.96/31.94 | bitIndex1 = B
% 31.96/31.94 | bitIndex2 = B
% 31.96/31.94 | bitIndex3 = B
% 31.96/31.94 | bitIndex4 = B
% 31.96/31.94 | bitIndex5 = B
% 31.96/31.94 | bitIndex6 = B
% 31.96/31.94 | bitIndex7 = B
% 31.96/31.94 | bitIndex8 = B
% 31.96/31.94 | bitIndex9 = B
% 31.96/31.94 | bitIndex10 = B
% 31.96/31.94 | bitIndex11 = B
% 31.96/31.94 | bitIndex12 = B
% 31.96/31.94 | bitIndex13 = B
% 31.96/31.94 | bitIndex14 = B
% 31.96/31.94 | bitIndex15 = B
% 31.96/31.94 | bitIndex16 = B
% 31.96/31.94 | bitIndex17 = B
% 31.96/31.94 | bitIndex18 = B
% 31.96/31.94 | bitIndex19 = B
% 31.96/31.94 | bitIndex20 = B
% 31.96/31.94 | bitIndex21 = B
% 31.96/31.94 | bitIndex22 = B
% 31.96/31.94 | bitIndex23 = B ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1655,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2570(VarCurr,bitIndex0)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1654,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2570(VarCurr,bitIndex1)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1653,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2570(VarCurr,bitIndex2)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1652,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2570(VarCurr,bitIndex3)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1651,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2570(VarCurr,bitIndex4)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1650,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2570(VarCurr,bitIndex5)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1649,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2570(VarCurr,bitIndex6)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1648,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2570(VarCurr,bitIndex7)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1647,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2570(VarCurr,bitIndex8)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1646,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2570(VarCurr,bitIndex9)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1645,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2570(VarCurr,bitIndex10)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1644,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2570(VarCurr,bitIndex11)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1643,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2570(VarCurr,bitIndex12)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1642,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2570(VarCurr,bitIndex13)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1641,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2570(VarCurr,bitIndex14)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1640,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2570(VarCurr,bitIndex15)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1639,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2570(VarCurr,bitIndex16)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1638,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2570(VarCurr,bitIndex17)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1637,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2570(VarCurr,bitIndex18)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1636,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2570(VarCurr,bitIndex19)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1635,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2570(VarCurr,bitIndex20)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1634,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2570(VarCurr,bitIndex21)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1633,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2570(VarCurr,bitIndex22)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1632,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2570(VarCurr,bitIndex23)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1631,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( ( v2569(VarCurr,bitIndex22)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex39) )
% 31.96/31.94 & ( v2569(VarCurr,bitIndex21)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex38) )
% 31.96/31.94 & ( v2569(VarCurr,bitIndex20)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex37) )
% 31.96/31.94 & ( v2569(VarCurr,bitIndex19)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex36) )
% 31.96/31.94 & ( v2569(VarCurr,bitIndex18)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex35) )
% 31.96/31.94 & ( v2569(VarCurr,bitIndex17)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex34) )
% 31.96/31.94 & ( v2569(VarCurr,bitIndex16)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex33) )
% 31.96/31.94 & ( v2569(VarCurr,bitIndex15)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex32) )
% 31.96/31.94 & ( v2569(VarCurr,bitIndex14)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex31) )
% 31.96/31.94 & ( v2569(VarCurr,bitIndex13)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex30) )
% 31.96/31.94 & ( v2569(VarCurr,bitIndex12)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex29) )
% 31.96/31.94 & ( v2569(VarCurr,bitIndex11)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex28) )
% 31.96/31.94 & ( v2569(VarCurr,bitIndex10)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex27) )
% 31.96/31.94 & ( v2569(VarCurr,bitIndex9)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex26) )
% 31.96/31.94 & ( v2569(VarCurr,bitIndex8)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex25) )
% 31.96/31.94 & ( v2569(VarCurr,bitIndex7)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex24) )
% 31.96/31.94 & ( v2569(VarCurr,bitIndex6)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex23) )
% 31.96/31.94 & ( v2569(VarCurr,bitIndex5)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex22) )
% 31.96/31.94 & ( v2569(VarCurr,bitIndex4)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex21) )
% 31.96/31.94 & ( v2569(VarCurr,bitIndex3)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex20) )
% 31.96/31.94 & ( v2569(VarCurr,bitIndex2)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex19) )
% 31.96/31.94 & ( v2569(VarCurr,bitIndex1)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex18) )
% 31.96/31.94 & ( v2569(VarCurr,bitIndex0)
% 31.96/31.94 <=> v2465(VarCurr,bitIndex17) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1630,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2569(VarCurr,bitIndex23)
% 31.96/31.94 <=> $false ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_354,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2566(VarCurr,bitIndex0)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex16)
% 31.96/31.94 & v2567(VarCurr,bitIndex0) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_353,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2566(VarCurr,bitIndex1)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex17)
% 31.96/31.94 & v2567(VarCurr,bitIndex1) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_352,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2566(VarCurr,bitIndex2)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex18)
% 31.96/31.94 & v2567(VarCurr,bitIndex2) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_351,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2566(VarCurr,bitIndex3)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex19)
% 31.96/31.94 & v2567(VarCurr,bitIndex3) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_350,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2566(VarCurr,bitIndex4)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex20)
% 31.96/31.94 & v2567(VarCurr,bitIndex4) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_349,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2566(VarCurr,bitIndex5)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex21)
% 31.96/31.94 & v2567(VarCurr,bitIndex5) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_348,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2566(VarCurr,bitIndex6)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex22)
% 31.96/31.94 & v2567(VarCurr,bitIndex6) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_347,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2566(VarCurr,bitIndex7)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex23)
% 31.96/31.94 & v2567(VarCurr,bitIndex7) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_346,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2566(VarCurr,bitIndex8)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex24)
% 31.96/31.94 & v2567(VarCurr,bitIndex8) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_345,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2566(VarCurr,bitIndex9)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex25)
% 31.96/31.94 & v2567(VarCurr,bitIndex9) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_344,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2566(VarCurr,bitIndex10)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex26)
% 31.96/31.94 & v2567(VarCurr,bitIndex10) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_343,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2566(VarCurr,bitIndex11)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex27)
% 31.96/31.94 & v2567(VarCurr,bitIndex11) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_342,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2566(VarCurr,bitIndex12)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex28)
% 31.96/31.94 & v2567(VarCurr,bitIndex12) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_341,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2566(VarCurr,bitIndex13)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex29)
% 31.96/31.94 & v2567(VarCurr,bitIndex13) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_340,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2566(VarCurr,bitIndex14)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex30)
% 31.96/31.94 & v2567(VarCurr,bitIndex14) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_339,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2566(VarCurr,bitIndex15)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex31)
% 31.96/31.94 & v2567(VarCurr,bitIndex15) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_338,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2566(VarCurr,bitIndex16)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex32)
% 31.96/31.94 & v2567(VarCurr,bitIndex16) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_337,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2566(VarCurr,bitIndex17)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex33)
% 31.96/31.94 & v2567(VarCurr,bitIndex17) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_336,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2566(VarCurr,bitIndex18)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex34)
% 31.96/31.94 & v2567(VarCurr,bitIndex18) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_335,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2566(VarCurr,bitIndex19)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex35)
% 31.96/31.94 & v2567(VarCurr,bitIndex19) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_334,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2566(VarCurr,bitIndex20)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex36)
% 31.96/31.94 & v2567(VarCurr,bitIndex20) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_333,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2566(VarCurr,bitIndex21)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex37)
% 31.96/31.94 & v2567(VarCurr,bitIndex21) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_332,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2566(VarCurr,bitIndex22)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex38)
% 31.96/31.94 & v2567(VarCurr,bitIndex22) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorShiftedRanges_331,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2566(VarCurr,bitIndex23)
% 31.96/31.94 <=> ( v2465(VarCurr,bitIndex39)
% 31.96/31.94 & v2567(VarCurr,bitIndex23) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1629,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2567(VarCurr,bitIndex0)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1628,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2567(VarCurr,bitIndex1)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1627,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2567(VarCurr,bitIndex2)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1626,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2567(VarCurr,bitIndex3)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1625,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2567(VarCurr,bitIndex4)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1624,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2567(VarCurr,bitIndex5)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1623,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2567(VarCurr,bitIndex6)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1622,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2567(VarCurr,bitIndex7)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1621,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2567(VarCurr,bitIndex8)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1620,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2567(VarCurr,bitIndex9)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1619,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2567(VarCurr,bitIndex10)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1618,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2567(VarCurr,bitIndex11)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1617,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2567(VarCurr,bitIndex12)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1616,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2567(VarCurr,bitIndex13)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1615,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2567(VarCurr,bitIndex14)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1614,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2567(VarCurr,bitIndex15)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1613,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2567(VarCurr,bitIndex16)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1612,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2567(VarCurr,bitIndex17)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1611,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2567(VarCurr,bitIndex18)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1610,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2567(VarCurr,bitIndex19)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1609,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2567(VarCurr,bitIndex20)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1608,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2567(VarCurr,bitIndex21)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1607,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2567(VarCurr,bitIndex22)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1606,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2567(VarCurr,bitIndex23)
% 31.96/31.94 <=> v2468(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorEqualRangesMultipleBits_45,axiom,
% 31.96/31.94 ! [VarCurr,B] :
% 31.96/31.94 ( range_39_0(B)
% 31.96/31.94 => ( v2456(VarCurr,B)
% 31.96/31.94 <=> ( v2457(VarCurr,B)
% 31.96/31.94 & v2554(VarCurr,B) ) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1605,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex0)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1604,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex1)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1603,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex2)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1602,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex3)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1601,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex4)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1600,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex5)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1599,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex6)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1598,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex7)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1597,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex8)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1596,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex9)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1595,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex10)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1594,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex11)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1593,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex12)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1592,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex13)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1591,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex14)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1590,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex15)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1589,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex16)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1588,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex17)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1587,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex18)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1586,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex19)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1585,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex20)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1584,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex21)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1583,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex22)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1582,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex23)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1581,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex24)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1580,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex25)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1579,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex26)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1578,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex27)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1577,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex28)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1576,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex29)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1575,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex30)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1574,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex31)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1573,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex32)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1572,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex33)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1571,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex34)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1570,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex35)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1569,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex36)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1568,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex37)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1567,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex38)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1566,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2554(VarCurr,bitIndex39)
% 31.96/31.94 <=> v2555(VarCurr) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeUnaryOperator_218,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( ~ v2555(VarCurr)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex4) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorEqualRangesMultipleBits_44,axiom,
% 31.96/31.94 ! [VarCurr,B] :
% 31.96/31.94 ( range_39_0(B)
% 31.96/31.94 => ( v2457(VarCurr,B)
% 31.96/31.94 <=> ( v2458(VarCurr,B)
% 31.96/31.94 | v2508(VarCurr,B) ) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorEqualRangesMultipleBits_43,axiom,
% 31.96/31.94 ! [VarCurr,B] :
% 31.96/31.94 ( range_39_0(B)
% 31.96/31.94 => ( v2508(VarCurr,B)
% 31.96/31.94 <=> ( v2509(VarCurr,B)
% 31.96/31.94 & v2553(VarCurr,B) ) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1565,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex0)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1564,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex1)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1563,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex2)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1562,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex3)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1561,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex4)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1560,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex5)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1559,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex6)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1558,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex7)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1557,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex8)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1556,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex9)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1555,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex10)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1554,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex11)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1553,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex12)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1552,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex13)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1551,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex14)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1550,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex15)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1549,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex16)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1548,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex17)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1547,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex18)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1546,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex19)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1545,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex20)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1544,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex21)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1543,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex22)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1542,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex23)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1541,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex24)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1540,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex25)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1539,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex26)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1538,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex27)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1537,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex28)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1536,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex29)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1535,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex30)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1534,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex31)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1533,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex32)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1532,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex33)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1531,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex34)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1530,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex35)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1529,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex36)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1528,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex37)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1527,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex38)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1526,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2553(VarCurr,bitIndex39)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1525,axiom,
% 31.96/31.94 ! [VarCurr,B] :
% 31.96/31.94 ( range_31_0(B)
% 31.96/31.94 => ( v2509(VarCurr,B)
% 31.96/31.94 <=> v2511(VarCurr,B) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1524,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( ( v2509(VarCurr,bitIndex39)
% 31.96/31.94 <=> $false )
% 31.96/31.94 & ( v2509(VarCurr,bitIndex38)
% 31.96/31.94 <=> $false )
% 31.96/31.94 & ( v2509(VarCurr,bitIndex37)
% 31.96/31.94 <=> $false )
% 31.96/31.94 & ( v2509(VarCurr,bitIndex36)
% 31.96/31.94 <=> $false )
% 31.96/31.94 & ( v2509(VarCurr,bitIndex35)
% 31.96/31.94 <=> $false )
% 31.96/31.94 & ( v2509(VarCurr,bitIndex34)
% 31.96/31.94 <=> $false )
% 31.96/31.94 & ( v2509(VarCurr,bitIndex33)
% 31.96/31.94 <=> $false )
% 31.96/31.94 & ( v2509(VarCurr,bitIndex32)
% 31.96/31.94 <=> $false ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(bitBlastConstant_523,axiom,
% 31.96/31.94 ~ b00000000(bitIndex7) ).
% 31.96/31.94
% 31.96/31.94 fof(bitBlastConstant_522,axiom,
% 31.96/31.94 ~ b00000000(bitIndex6) ).
% 31.96/31.94
% 31.96/31.94 fof(bitBlastConstant_521,axiom,
% 31.96/31.94 ~ b00000000(bitIndex5) ).
% 31.96/31.94
% 31.96/31.94 fof(bitBlastConstant_520,axiom,
% 31.96/31.94 ~ b00000000(bitIndex4) ).
% 31.96/31.94
% 31.96/31.94 fof(bitBlastConstant_519,axiom,
% 31.96/31.94 ~ b00000000(bitIndex3) ).
% 31.96/31.94
% 31.96/31.94 fof(bitBlastConstant_518,axiom,
% 31.96/31.94 ~ b00000000(bitIndex2) ).
% 31.96/31.94
% 31.96/31.94 fof(bitBlastConstant_517,axiom,
% 31.96/31.94 ~ b00000000(bitIndex1) ).
% 31.96/31.94
% 31.96/31.94 fof(bitBlastConstant_516,axiom,
% 31.96/31.94 ~ b00000000(bitIndex0) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorEqualRangesMultipleBits_42,axiom,
% 31.96/31.94 ! [VarCurr,B] :
% 31.96/31.94 ( range_31_0(B)
% 31.96/31.94 => ( v2511(VarCurr,B)
% 31.96/31.94 <=> ( v2512(VarCurr,B)
% 31.96/31.94 | v2532(VarCurr,B) ) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorEqualRangesMultipleBits_41,axiom,
% 31.96/31.94 ! [VarCurr,B] :
% 31.96/31.94 ( range_31_0(B)
% 31.96/31.94 => ( v2532(VarCurr,B)
% 31.96/31.94 <=> ( v2533(VarCurr,B)
% 31.96/31.94 & v2552(VarCurr,B) ) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1523,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex0)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1522,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex1)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1521,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex2)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1520,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex3)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1519,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex4)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1518,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex5)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1517,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex6)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1516,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex7)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1515,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex8)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1514,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex9)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1513,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex10)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1512,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex11)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1511,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex12)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1510,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex13)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1509,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex14)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1508,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex15)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1507,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex16)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1506,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex17)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1505,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex18)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1504,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex19)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1503,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex20)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1502,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex21)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1501,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex22)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1500,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex23)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1499,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex24)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1498,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex25)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1497,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex26)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1496,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex27)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1495,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex28)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1494,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex29)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1493,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex30)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1492,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2552(VarCurr,bitIndex31)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1491,axiom,
% 31.96/31.94 ! [VarCurr,B] :
% 31.96/31.94 ( range_27_0(B)
% 31.96/31.94 => ( v2533(VarCurr,B)
% 31.96/31.94 <=> v2534(VarCurr,B) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1490,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( ( v2533(VarCurr,bitIndex31)
% 31.96/31.94 <=> $false )
% 31.96/31.94 & ( v2533(VarCurr,bitIndex30)
% 31.96/31.94 <=> $false )
% 31.96/31.94 & ( v2533(VarCurr,bitIndex29)
% 31.96/31.94 <=> $false )
% 31.96/31.94 & ( v2533(VarCurr,bitIndex28)
% 31.96/31.94 <=> $false ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorEqualRangesMultipleBits_40,axiom,
% 31.96/31.94 ! [VarCurr,B] :
% 31.96/31.94 ( range_27_0(B)
% 31.96/31.94 => ( v2534(VarCurr,B)
% 31.96/31.94 <=> ( v2535(VarCurr,B)
% 31.96/31.94 | v2543(VarCurr,B) ) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorEqualRangesMultipleBits_39,axiom,
% 31.96/31.94 ! [VarCurr,B] :
% 31.96/31.94 ( range_27_0(B)
% 31.96/31.94 => ( v2543(VarCurr,B)
% 31.96/31.94 <=> ( v2544(VarCurr,B)
% 31.96/31.94 & v2551(VarCurr,B) ) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1489,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2551(VarCurr,bitIndex0)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1488,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2551(VarCurr,bitIndex1)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1487,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2551(VarCurr,bitIndex2)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1486,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2551(VarCurr,bitIndex3)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1485,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2551(VarCurr,bitIndex4)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1484,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2551(VarCurr,bitIndex5)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1483,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2551(VarCurr,bitIndex6)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1482,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2551(VarCurr,bitIndex7)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1481,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2551(VarCurr,bitIndex8)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1480,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2551(VarCurr,bitIndex9)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1479,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2551(VarCurr,bitIndex10)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1478,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2551(VarCurr,bitIndex11)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1477,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2551(VarCurr,bitIndex12)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1476,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2551(VarCurr,bitIndex13)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1475,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2551(VarCurr,bitIndex14)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1474,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2551(VarCurr,bitIndex15)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1473,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2551(VarCurr,bitIndex16)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1472,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2551(VarCurr,bitIndex17)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1471,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2551(VarCurr,bitIndex18)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1470,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2551(VarCurr,bitIndex19)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1469,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2551(VarCurr,bitIndex20)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1468,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2551(VarCurr,bitIndex21)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1467,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2551(VarCurr,bitIndex22)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1466,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2551(VarCurr,bitIndex23)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1465,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2551(VarCurr,bitIndex24)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1464,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2551(VarCurr,bitIndex25)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1463,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2551(VarCurr,bitIndex26)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1462,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2551(VarCurr,bitIndex27)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1461,axiom,
% 31.96/31.94 ! [VarCurr,B] :
% 31.96/31.94 ( range_25_0(B)
% 31.96/31.94 => ( v2544(VarCurr,B)
% 31.96/31.94 <=> v2545(VarCurr,B) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1460,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( ( v2544(VarCurr,bitIndex27)
% 31.96/31.94 <=> $false )
% 31.96/31.94 & ( v2544(VarCurr,bitIndex26)
% 31.96/31.94 <=> $false ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorEqualRangesMultipleBits_38,axiom,
% 31.96/31.94 ! [VarCurr,B] :
% 31.96/31.94 ( range_25_0(B)
% 31.96/31.94 => ( v2545(VarCurr,B)
% 31.96/31.94 <=> ( v2546(VarCurr,B)
% 31.96/31.94 | v2548(VarCurr,B) ) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(writeBinaryOperatorEqualRangesMultipleBits_37,axiom,
% 31.96/31.94 ! [VarCurr,B] :
% 31.96/31.94 ( range_25_0(B)
% 31.96/31.94 => ( v2548(VarCurr,B)
% 31.96/31.94 <=> ( v2549(VarCurr,B)
% 31.96/31.94 & v2550(VarCurr,B) ) ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(range_axiom_21,axiom,
% 31.96/31.94 ! [B] :
% 31.96/31.94 ( range_25_0(B)
% 31.96/31.94 <=> ( $false
% 31.96/31.94 | bitIndex0 = B
% 31.96/31.94 | bitIndex1 = B
% 31.96/31.94 | bitIndex2 = B
% 31.96/31.94 | bitIndex3 = B
% 31.96/31.94 | bitIndex4 = B
% 31.96/31.94 | bitIndex5 = B
% 31.96/31.94 | bitIndex6 = B
% 31.96/31.94 | bitIndex7 = B
% 31.96/31.94 | bitIndex8 = B
% 31.96/31.94 | bitIndex9 = B
% 31.96/31.94 | bitIndex10 = B
% 31.96/31.94 | bitIndex11 = B
% 31.96/31.94 | bitIndex12 = B
% 31.96/31.94 | bitIndex13 = B
% 31.96/31.94 | bitIndex14 = B
% 31.96/31.94 | bitIndex15 = B
% 31.96/31.94 | bitIndex16 = B
% 31.96/31.94 | bitIndex17 = B
% 31.96/31.94 | bitIndex18 = B
% 31.96/31.94 | bitIndex19 = B
% 31.96/31.94 | bitIndex20 = B
% 31.96/31.94 | bitIndex21 = B
% 31.96/31.94 | bitIndex22 = B
% 31.96/31.94 | bitIndex23 = B
% 31.96/31.94 | bitIndex24 = B
% 31.96/31.94 | bitIndex25 = B ) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1459,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2550(VarCurr,bitIndex0)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1458,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2550(VarCurr,bitIndex1)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1457,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2550(VarCurr,bitIndex2)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1456,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2550(VarCurr,bitIndex3)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1455,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2550(VarCurr,bitIndex4)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1454,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2550(VarCurr,bitIndex5)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1453,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2550(VarCurr,bitIndex6)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1452,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2550(VarCurr,bitIndex7)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1451,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2550(VarCurr,bitIndex8)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1450,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2550(VarCurr,bitIndex9)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1449,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2550(VarCurr,bitIndex10)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1448,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2550(VarCurr,bitIndex11)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1447,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2550(VarCurr,bitIndex12)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1446,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2550(VarCurr,bitIndex13)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1445,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2550(VarCurr,bitIndex14)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1444,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2550(VarCurr,bitIndex15)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1443,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2550(VarCurr,bitIndex16)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1442,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2550(VarCurr,bitIndex17)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1441,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2550(VarCurr,bitIndex18)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1440,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2550(VarCurr,bitIndex19)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1439,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2550(VarCurr,bitIndex20)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1438,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2550(VarCurr,bitIndex21)
% 31.96/31.94 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.94
% 31.96/31.94 fof(addAssignment_1437,axiom,
% 31.96/31.94 ! [VarCurr] :
% 31.96/31.94 ( v2550(VarCurr,bitIndex22)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1436,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2550(VarCurr,bitIndex23)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1435,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2550(VarCurr,bitIndex24)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1434,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2550(VarCurr,bitIndex25)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1433,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( ( v2549(VarCurr,bitIndex24)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex39) )
% 31.96/31.95 & ( v2549(VarCurr,bitIndex23)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex38) )
% 31.96/31.95 & ( v2549(VarCurr,bitIndex22)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex37) )
% 31.96/31.95 & ( v2549(VarCurr,bitIndex21)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex36) )
% 31.96/31.95 & ( v2549(VarCurr,bitIndex20)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex35) )
% 31.96/31.95 & ( v2549(VarCurr,bitIndex19)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex34) )
% 31.96/31.95 & ( v2549(VarCurr,bitIndex18)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex33) )
% 31.96/31.95 & ( v2549(VarCurr,bitIndex17)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex32) )
% 31.96/31.95 & ( v2549(VarCurr,bitIndex16)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex31) )
% 31.96/31.95 & ( v2549(VarCurr,bitIndex15)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex30) )
% 31.96/31.95 & ( v2549(VarCurr,bitIndex14)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex29) )
% 31.96/31.95 & ( v2549(VarCurr,bitIndex13)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex28) )
% 31.96/31.95 & ( v2549(VarCurr,bitIndex12)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex27) )
% 31.96/31.95 & ( v2549(VarCurr,bitIndex11)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex26) )
% 31.96/31.95 & ( v2549(VarCurr,bitIndex10)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex25) )
% 31.96/31.95 & ( v2549(VarCurr,bitIndex9)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex24) )
% 31.96/31.95 & ( v2549(VarCurr,bitIndex8)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex23) )
% 31.96/31.95 & ( v2549(VarCurr,bitIndex7)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex22) )
% 31.96/31.95 & ( v2549(VarCurr,bitIndex6)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex21) )
% 31.96/31.95 & ( v2549(VarCurr,bitIndex5)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex20) )
% 31.96/31.95 & ( v2549(VarCurr,bitIndex4)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex19) )
% 31.96/31.95 & ( v2549(VarCurr,bitIndex3)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex18) )
% 31.96/31.95 & ( v2549(VarCurr,bitIndex2)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex17) )
% 31.96/31.95 & ( v2549(VarCurr,bitIndex1)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex16) )
% 31.96/31.95 & ( v2549(VarCurr,bitIndex0)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex15) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1432,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2549(VarCurr,bitIndex25)
% 31.96/31.95 <=> $false ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_330,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2546(VarCurr,bitIndex0)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex14)
% 31.96/31.95 & v2547(VarCurr,bitIndex0) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_329,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2546(VarCurr,bitIndex1)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex15)
% 31.96/31.95 & v2547(VarCurr,bitIndex1) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_328,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2546(VarCurr,bitIndex2)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex16)
% 31.96/31.95 & v2547(VarCurr,bitIndex2) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_327,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2546(VarCurr,bitIndex3)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex17)
% 31.96/31.95 & v2547(VarCurr,bitIndex3) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_326,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2546(VarCurr,bitIndex4)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex18)
% 31.96/31.95 & v2547(VarCurr,bitIndex4) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_325,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2546(VarCurr,bitIndex5)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex19)
% 31.96/31.95 & v2547(VarCurr,bitIndex5) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_324,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2546(VarCurr,bitIndex6)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex20)
% 31.96/31.95 & v2547(VarCurr,bitIndex6) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_323,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2546(VarCurr,bitIndex7)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex21)
% 31.96/31.95 & v2547(VarCurr,bitIndex7) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_322,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2546(VarCurr,bitIndex8)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex22)
% 31.96/31.95 & v2547(VarCurr,bitIndex8) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_321,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2546(VarCurr,bitIndex9)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex23)
% 31.96/31.95 & v2547(VarCurr,bitIndex9) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_320,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2546(VarCurr,bitIndex10)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex24)
% 31.96/31.95 & v2547(VarCurr,bitIndex10) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_319,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2546(VarCurr,bitIndex11)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex25)
% 31.96/31.95 & v2547(VarCurr,bitIndex11) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_318,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2546(VarCurr,bitIndex12)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex26)
% 31.96/31.95 & v2547(VarCurr,bitIndex12) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_317,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2546(VarCurr,bitIndex13)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex27)
% 31.96/31.95 & v2547(VarCurr,bitIndex13) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_316,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2546(VarCurr,bitIndex14)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex28)
% 31.96/31.95 & v2547(VarCurr,bitIndex14) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_315,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2546(VarCurr,bitIndex15)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex29)
% 31.96/31.95 & v2547(VarCurr,bitIndex15) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_314,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2546(VarCurr,bitIndex16)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex30)
% 31.96/31.95 & v2547(VarCurr,bitIndex16) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_313,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2546(VarCurr,bitIndex17)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex31)
% 31.96/31.95 & v2547(VarCurr,bitIndex17) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_312,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2546(VarCurr,bitIndex18)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex32)
% 31.96/31.95 & v2547(VarCurr,bitIndex18) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_311,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2546(VarCurr,bitIndex19)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex33)
% 31.96/31.95 & v2547(VarCurr,bitIndex19) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_310,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2546(VarCurr,bitIndex20)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex34)
% 31.96/31.95 & v2547(VarCurr,bitIndex20) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_309,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2546(VarCurr,bitIndex21)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex35)
% 31.96/31.95 & v2547(VarCurr,bitIndex21) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_308,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2546(VarCurr,bitIndex22)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex36)
% 31.96/31.95 & v2547(VarCurr,bitIndex22) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_307,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2546(VarCurr,bitIndex23)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex37)
% 31.96/31.95 & v2547(VarCurr,bitIndex23) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_306,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2546(VarCurr,bitIndex24)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex38)
% 31.96/31.95 & v2547(VarCurr,bitIndex24) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_305,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2546(VarCurr,bitIndex25)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex39)
% 31.96/31.95 & v2547(VarCurr,bitIndex25) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1431,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2547(VarCurr,bitIndex0)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1430,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2547(VarCurr,bitIndex1)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1429,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2547(VarCurr,bitIndex2)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1428,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2547(VarCurr,bitIndex3)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1427,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2547(VarCurr,bitIndex4)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1426,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2547(VarCurr,bitIndex5)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1425,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2547(VarCurr,bitIndex6)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1424,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2547(VarCurr,bitIndex7)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1423,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2547(VarCurr,bitIndex8)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1422,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2547(VarCurr,bitIndex9)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1421,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2547(VarCurr,bitIndex10)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1420,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2547(VarCurr,bitIndex11)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1419,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2547(VarCurr,bitIndex12)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1418,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2547(VarCurr,bitIndex13)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1417,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2547(VarCurr,bitIndex14)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1416,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2547(VarCurr,bitIndex15)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1415,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2547(VarCurr,bitIndex16)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1414,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2547(VarCurr,bitIndex17)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1413,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2547(VarCurr,bitIndex18)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1412,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2547(VarCurr,bitIndex19)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1411,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2547(VarCurr,bitIndex20)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1410,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2547(VarCurr,bitIndex21)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1409,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2547(VarCurr,bitIndex22)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1408,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2547(VarCurr,bitIndex23)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1407,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2547(VarCurr,bitIndex24)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1406,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2547(VarCurr,bitIndex25)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorEqualRangesMultipleBits_36,axiom,
% 31.96/31.95 ! [VarCurr,B] :
% 31.96/31.95 ( range_27_0(B)
% 31.96/31.95 => ( v2535(VarCurr,B)
% 31.96/31.95 <=> ( v2536(VarCurr,B)
% 31.96/31.95 & v2542(VarCurr,B) ) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1405,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2542(VarCurr,bitIndex0)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1404,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2542(VarCurr,bitIndex1)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1403,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2542(VarCurr,bitIndex2)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1402,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2542(VarCurr,bitIndex3)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1401,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2542(VarCurr,bitIndex4)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1400,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2542(VarCurr,bitIndex5)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1399,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2542(VarCurr,bitIndex6)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1398,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2542(VarCurr,bitIndex7)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1397,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2542(VarCurr,bitIndex8)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1396,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2542(VarCurr,bitIndex9)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1395,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2542(VarCurr,bitIndex10)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1394,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2542(VarCurr,bitIndex11)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1393,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2542(VarCurr,bitIndex12)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1392,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2542(VarCurr,bitIndex13)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1391,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2542(VarCurr,bitIndex14)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1390,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2542(VarCurr,bitIndex15)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1389,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2542(VarCurr,bitIndex16)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1388,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2542(VarCurr,bitIndex17)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1387,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2542(VarCurr,bitIndex18)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1386,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2542(VarCurr,bitIndex19)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1385,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2542(VarCurr,bitIndex20)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1384,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2542(VarCurr,bitIndex21)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1383,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2542(VarCurr,bitIndex22)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1382,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2542(VarCurr,bitIndex23)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1381,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2542(VarCurr,bitIndex24)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1380,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2542(VarCurr,bitIndex25)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1379,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2542(VarCurr,bitIndex26)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1378,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2542(VarCurr,bitIndex27)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorEqualRangesMultipleBits_35,axiom,
% 31.96/31.95 ! [VarCurr,B] :
% 31.96/31.95 ( range_27_0(B)
% 31.96/31.95 => ( v2536(VarCurr,B)
% 31.96/31.95 <=> ( v2537(VarCurr,B)
% 31.96/31.95 | v2539(VarCurr,B) ) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorEqualRangesMultipleBits_34,axiom,
% 31.96/31.95 ! [VarCurr,B] :
% 31.96/31.95 ( range_27_0(B)
% 31.96/31.95 => ( v2539(VarCurr,B)
% 31.96/31.95 <=> ( v2540(VarCurr,B)
% 31.96/31.95 & v2541(VarCurr,B) ) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(range_axiom_20,axiom,
% 31.96/31.95 ! [B] :
% 31.96/31.95 ( range_27_0(B)
% 31.96/31.95 <=> ( $false
% 31.96/31.95 | bitIndex0 = B
% 31.96/31.95 | bitIndex1 = B
% 31.96/31.95 | bitIndex2 = B
% 31.96/31.95 | bitIndex3 = B
% 31.96/31.95 | bitIndex4 = B
% 31.96/31.95 | bitIndex5 = B
% 31.96/31.95 | bitIndex6 = B
% 31.96/31.95 | bitIndex7 = B
% 31.96/31.95 | bitIndex8 = B
% 31.96/31.95 | bitIndex9 = B
% 31.96/31.95 | bitIndex10 = B
% 31.96/31.95 | bitIndex11 = B
% 31.96/31.95 | bitIndex12 = B
% 31.96/31.95 | bitIndex13 = B
% 31.96/31.95 | bitIndex14 = B
% 31.96/31.95 | bitIndex15 = B
% 31.96/31.95 | bitIndex16 = B
% 31.96/31.95 | bitIndex17 = B
% 31.96/31.95 | bitIndex18 = B
% 31.96/31.95 | bitIndex19 = B
% 31.96/31.95 | bitIndex20 = B
% 31.96/31.95 | bitIndex21 = B
% 31.96/31.95 | bitIndex22 = B
% 31.96/31.95 | bitIndex23 = B
% 31.96/31.95 | bitIndex24 = B
% 31.96/31.95 | bitIndex25 = B
% 31.96/31.95 | bitIndex26 = B
% 31.96/31.95 | bitIndex27 = B ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1377,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2541(VarCurr,bitIndex0)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1376,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2541(VarCurr,bitIndex1)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1375,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2541(VarCurr,bitIndex2)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1374,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2541(VarCurr,bitIndex3)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1373,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2541(VarCurr,bitIndex4)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1372,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2541(VarCurr,bitIndex5)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1371,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2541(VarCurr,bitIndex6)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1370,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2541(VarCurr,bitIndex7)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1369,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2541(VarCurr,bitIndex8)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1368,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2541(VarCurr,bitIndex9)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1367,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2541(VarCurr,bitIndex10)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1366,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2541(VarCurr,bitIndex11)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1365,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2541(VarCurr,bitIndex12)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1364,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2541(VarCurr,bitIndex13)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1363,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2541(VarCurr,bitIndex14)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1362,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2541(VarCurr,bitIndex15)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1361,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2541(VarCurr,bitIndex16)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1360,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2541(VarCurr,bitIndex17)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1359,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2541(VarCurr,bitIndex18)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1358,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2541(VarCurr,bitIndex19)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1357,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2541(VarCurr,bitIndex20)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1356,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2541(VarCurr,bitIndex21)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1355,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2541(VarCurr,bitIndex22)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1354,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2541(VarCurr,bitIndex23)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1353,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2541(VarCurr,bitIndex24)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1352,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2541(VarCurr,bitIndex25)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1351,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2541(VarCurr,bitIndex26)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1350,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2541(VarCurr,bitIndex27)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1349,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( ( v2540(VarCurr,bitIndex26)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex39) )
% 31.96/31.95 & ( v2540(VarCurr,bitIndex25)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex38) )
% 31.96/31.95 & ( v2540(VarCurr,bitIndex24)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex37) )
% 31.96/31.95 & ( v2540(VarCurr,bitIndex23)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex36) )
% 31.96/31.95 & ( v2540(VarCurr,bitIndex22)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex35) )
% 31.96/31.95 & ( v2540(VarCurr,bitIndex21)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex34) )
% 31.96/31.95 & ( v2540(VarCurr,bitIndex20)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex33) )
% 31.96/31.95 & ( v2540(VarCurr,bitIndex19)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex32) )
% 31.96/31.95 & ( v2540(VarCurr,bitIndex18)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex31) )
% 31.96/31.95 & ( v2540(VarCurr,bitIndex17)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex30) )
% 31.96/31.95 & ( v2540(VarCurr,bitIndex16)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex29) )
% 31.96/31.95 & ( v2540(VarCurr,bitIndex15)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex28) )
% 31.96/31.95 & ( v2540(VarCurr,bitIndex14)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex27) )
% 31.96/31.95 & ( v2540(VarCurr,bitIndex13)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex26) )
% 31.96/31.95 & ( v2540(VarCurr,bitIndex12)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex25) )
% 31.96/31.95 & ( v2540(VarCurr,bitIndex11)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex24) )
% 31.96/31.95 & ( v2540(VarCurr,bitIndex10)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex23) )
% 31.96/31.95 & ( v2540(VarCurr,bitIndex9)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex22) )
% 31.96/31.95 & ( v2540(VarCurr,bitIndex8)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex21) )
% 31.96/31.95 & ( v2540(VarCurr,bitIndex7)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex20) )
% 31.96/31.95 & ( v2540(VarCurr,bitIndex6)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex19) )
% 31.96/31.95 & ( v2540(VarCurr,bitIndex5)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex18) )
% 31.96/31.95 & ( v2540(VarCurr,bitIndex4)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex17) )
% 31.96/31.95 & ( v2540(VarCurr,bitIndex3)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex16) )
% 31.96/31.95 & ( v2540(VarCurr,bitIndex2)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex15) )
% 31.96/31.95 & ( v2540(VarCurr,bitIndex1)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex14) )
% 31.96/31.95 & ( v2540(VarCurr,bitIndex0)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex13) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1348,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2540(VarCurr,bitIndex27)
% 31.96/31.95 <=> $false ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_304,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2537(VarCurr,bitIndex0)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex12)
% 31.96/31.95 & v2538(VarCurr,bitIndex0) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_303,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2537(VarCurr,bitIndex1)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex13)
% 31.96/31.95 & v2538(VarCurr,bitIndex1) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_302,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2537(VarCurr,bitIndex2)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex14)
% 31.96/31.95 & v2538(VarCurr,bitIndex2) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_301,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2537(VarCurr,bitIndex3)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex15)
% 31.96/31.95 & v2538(VarCurr,bitIndex3) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_300,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2537(VarCurr,bitIndex4)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex16)
% 31.96/31.95 & v2538(VarCurr,bitIndex4) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_299,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2537(VarCurr,bitIndex5)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex17)
% 31.96/31.95 & v2538(VarCurr,bitIndex5) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_298,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2537(VarCurr,bitIndex6)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex18)
% 31.96/31.95 & v2538(VarCurr,bitIndex6) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_297,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2537(VarCurr,bitIndex7)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex19)
% 31.96/31.95 & v2538(VarCurr,bitIndex7) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_296,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2537(VarCurr,bitIndex8)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex20)
% 31.96/31.95 & v2538(VarCurr,bitIndex8) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_295,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2537(VarCurr,bitIndex9)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex21)
% 31.96/31.95 & v2538(VarCurr,bitIndex9) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_294,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2537(VarCurr,bitIndex10)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex22)
% 31.96/31.95 & v2538(VarCurr,bitIndex10) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_293,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2537(VarCurr,bitIndex11)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex23)
% 31.96/31.95 & v2538(VarCurr,bitIndex11) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_292,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2537(VarCurr,bitIndex12)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex24)
% 31.96/31.95 & v2538(VarCurr,bitIndex12) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_291,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2537(VarCurr,bitIndex13)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex25)
% 31.96/31.95 & v2538(VarCurr,bitIndex13) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_290,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2537(VarCurr,bitIndex14)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex26)
% 31.96/31.95 & v2538(VarCurr,bitIndex14) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_289,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2537(VarCurr,bitIndex15)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex27)
% 31.96/31.95 & v2538(VarCurr,bitIndex15) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_288,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2537(VarCurr,bitIndex16)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex28)
% 31.96/31.95 & v2538(VarCurr,bitIndex16) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_287,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2537(VarCurr,bitIndex17)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex29)
% 31.96/31.95 & v2538(VarCurr,bitIndex17) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_286,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2537(VarCurr,bitIndex18)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex30)
% 31.96/31.95 & v2538(VarCurr,bitIndex18) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_285,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2537(VarCurr,bitIndex19)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex31)
% 31.96/31.95 & v2538(VarCurr,bitIndex19) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_284,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2537(VarCurr,bitIndex20)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex32)
% 31.96/31.95 & v2538(VarCurr,bitIndex20) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_283,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2537(VarCurr,bitIndex21)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex33)
% 31.96/31.95 & v2538(VarCurr,bitIndex21) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_282,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2537(VarCurr,bitIndex22)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex34)
% 31.96/31.95 & v2538(VarCurr,bitIndex22) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_281,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2537(VarCurr,bitIndex23)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex35)
% 31.96/31.95 & v2538(VarCurr,bitIndex23) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_280,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2537(VarCurr,bitIndex24)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex36)
% 31.96/31.95 & v2538(VarCurr,bitIndex24) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_279,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2537(VarCurr,bitIndex25)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex37)
% 31.96/31.95 & v2538(VarCurr,bitIndex25) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_278,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2537(VarCurr,bitIndex26)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex38)
% 31.96/31.95 & v2538(VarCurr,bitIndex26) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_277,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2537(VarCurr,bitIndex27)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex39)
% 31.96/31.95 & v2538(VarCurr,bitIndex27) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1347,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2538(VarCurr,bitIndex0)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1346,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2538(VarCurr,bitIndex1)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1345,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2538(VarCurr,bitIndex2)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1344,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2538(VarCurr,bitIndex3)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1343,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2538(VarCurr,bitIndex4)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1342,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2538(VarCurr,bitIndex5)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1341,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2538(VarCurr,bitIndex6)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1340,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2538(VarCurr,bitIndex7)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1339,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2538(VarCurr,bitIndex8)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1338,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2538(VarCurr,bitIndex9)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1337,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2538(VarCurr,bitIndex10)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1336,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2538(VarCurr,bitIndex11)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1335,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2538(VarCurr,bitIndex12)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1334,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2538(VarCurr,bitIndex13)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1333,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2538(VarCurr,bitIndex14)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1332,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2538(VarCurr,bitIndex15)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1331,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2538(VarCurr,bitIndex16)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1330,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2538(VarCurr,bitIndex17)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1329,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2538(VarCurr,bitIndex18)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1328,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2538(VarCurr,bitIndex19)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1327,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2538(VarCurr,bitIndex20)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1326,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2538(VarCurr,bitIndex21)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1325,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2538(VarCurr,bitIndex22)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1324,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2538(VarCurr,bitIndex23)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1323,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2538(VarCurr,bitIndex24)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1322,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2538(VarCurr,bitIndex25)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1321,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2538(VarCurr,bitIndex26)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1320,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2538(VarCurr,bitIndex27)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorEqualRangesMultipleBits_33,axiom,
% 31.96/31.95 ! [VarCurr,B] :
% 31.96/31.95 ( range_31_0(B)
% 31.96/31.95 => ( v2512(VarCurr,B)
% 31.96/31.95 <=> ( v2513(VarCurr,B)
% 31.96/31.95 & v2531(VarCurr,B) ) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1319,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex0)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1318,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex1)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1317,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex2)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1316,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex3)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1315,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex4)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1314,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex5)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1313,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex6)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1312,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex7)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1311,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex8)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1310,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex9)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1309,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex10)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1308,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex11)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1307,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex12)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1306,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex13)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1305,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex14)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1304,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex15)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1303,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex16)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1302,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex17)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1301,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex18)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1300,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex19)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1299,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex20)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1298,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex21)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1297,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex22)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1296,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex23)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1295,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex24)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1294,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex25)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1293,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex26)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1292,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex27)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1291,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex28)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1290,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex29)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1289,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex30)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1288,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2531(VarCurr,bitIndex31)
% 31.96/31.95 <=> v2484(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorEqualRangesMultipleBits_32,axiom,
% 31.96/31.95 ! [VarCurr,B] :
% 31.96/31.95 ( range_31_0(B)
% 31.96/31.95 => ( v2513(VarCurr,B)
% 31.96/31.95 <=> ( v2514(VarCurr,B)
% 31.96/31.95 | v2522(VarCurr,B) ) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorEqualRangesMultipleBits_31,axiom,
% 31.96/31.95 ! [VarCurr,B] :
% 31.96/31.95 ( range_31_0(B)
% 31.96/31.95 => ( v2522(VarCurr,B)
% 31.96/31.95 <=> ( v2523(VarCurr,B)
% 31.96/31.95 & v2530(VarCurr,B) ) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1287,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex0)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1286,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex1)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1285,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex2)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1284,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex3)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1283,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex4)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1282,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex5)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1281,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex6)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1280,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex7)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1279,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex8)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1278,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex9)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1277,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex10)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1276,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex11)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1275,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex12)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1274,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex13)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1273,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex14)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1272,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex15)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1271,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex16)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1270,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex17)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1269,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex18)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1268,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex19)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1267,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex20)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1266,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex21)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1265,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex22)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1264,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex23)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1263,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex24)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1262,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex25)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1261,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex26)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1260,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex27)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1259,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex28)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1258,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex29)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1257,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex30)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1256,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2530(VarCurr,bitIndex31)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1255,axiom,
% 31.96/31.95 ! [VarCurr,B] :
% 31.96/31.95 ( range_29_0(B)
% 31.96/31.95 => ( v2523(VarCurr,B)
% 31.96/31.95 <=> v2524(VarCurr,B) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1254,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( ( v2523(VarCurr,bitIndex31)
% 31.96/31.95 <=> $false )
% 31.96/31.95 & ( v2523(VarCurr,bitIndex30)
% 31.96/31.95 <=> $false ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorEqualRangesMultipleBits_30,axiom,
% 31.96/31.95 ! [VarCurr,B] :
% 31.96/31.95 ( range_29_0(B)
% 31.96/31.95 => ( v2524(VarCurr,B)
% 31.96/31.95 <=> ( v2525(VarCurr,B)
% 31.96/31.95 | v2527(VarCurr,B) ) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorEqualRangesMultipleBits_29,axiom,
% 31.96/31.95 ! [VarCurr,B] :
% 31.96/31.95 ( range_29_0(B)
% 31.96/31.95 => ( v2527(VarCurr,B)
% 31.96/31.95 <=> ( v2528(VarCurr,B)
% 31.96/31.95 & v2529(VarCurr,B) ) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(range_axiom_19,axiom,
% 31.96/31.95 ! [B] :
% 31.96/31.95 ( range_29_0(B)
% 31.96/31.95 <=> ( $false
% 31.96/31.95 | bitIndex0 = B
% 31.96/31.95 | bitIndex1 = B
% 31.96/31.95 | bitIndex2 = B
% 31.96/31.95 | bitIndex3 = B
% 31.96/31.95 | bitIndex4 = B
% 31.96/31.95 | bitIndex5 = B
% 31.96/31.95 | bitIndex6 = B
% 31.96/31.95 | bitIndex7 = B
% 31.96/31.95 | bitIndex8 = B
% 31.96/31.95 | bitIndex9 = B
% 31.96/31.95 | bitIndex10 = B
% 31.96/31.95 | bitIndex11 = B
% 31.96/31.95 | bitIndex12 = B
% 31.96/31.95 | bitIndex13 = B
% 31.96/31.95 | bitIndex14 = B
% 31.96/31.95 | bitIndex15 = B
% 31.96/31.95 | bitIndex16 = B
% 31.96/31.95 | bitIndex17 = B
% 31.96/31.95 | bitIndex18 = B
% 31.96/31.95 | bitIndex19 = B
% 31.96/31.95 | bitIndex20 = B
% 31.96/31.95 | bitIndex21 = B
% 31.96/31.95 | bitIndex22 = B
% 31.96/31.95 | bitIndex23 = B
% 31.96/31.95 | bitIndex24 = B
% 31.96/31.95 | bitIndex25 = B
% 31.96/31.95 | bitIndex26 = B
% 31.96/31.95 | bitIndex27 = B
% 31.96/31.95 | bitIndex28 = B
% 31.96/31.95 | bitIndex29 = B ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1253,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2529(VarCurr,bitIndex0)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1252,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2529(VarCurr,bitIndex1)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1251,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2529(VarCurr,bitIndex2)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1250,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2529(VarCurr,bitIndex3)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1249,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2529(VarCurr,bitIndex4)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1248,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2529(VarCurr,bitIndex5)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1247,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2529(VarCurr,bitIndex6)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1246,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2529(VarCurr,bitIndex7)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1245,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2529(VarCurr,bitIndex8)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1244,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2529(VarCurr,bitIndex9)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1243,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2529(VarCurr,bitIndex10)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1242,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2529(VarCurr,bitIndex11)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1241,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2529(VarCurr,bitIndex12)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1240,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2529(VarCurr,bitIndex13)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1239,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2529(VarCurr,bitIndex14)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1238,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2529(VarCurr,bitIndex15)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1237,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2529(VarCurr,bitIndex16)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1236,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2529(VarCurr,bitIndex17)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1235,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2529(VarCurr,bitIndex18)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1234,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2529(VarCurr,bitIndex19)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1233,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2529(VarCurr,bitIndex20)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1232,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2529(VarCurr,bitIndex21)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1231,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2529(VarCurr,bitIndex22)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1230,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2529(VarCurr,bitIndex23)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1229,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2529(VarCurr,bitIndex24)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1228,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2529(VarCurr,bitIndex25)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1227,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2529(VarCurr,bitIndex26)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1226,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2529(VarCurr,bitIndex27)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1225,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2529(VarCurr,bitIndex28)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1224,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2529(VarCurr,bitIndex29)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1223,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( ( v2528(VarCurr,bitIndex28)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex39) )
% 31.96/31.95 & ( v2528(VarCurr,bitIndex27)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex38) )
% 31.96/31.95 & ( v2528(VarCurr,bitIndex26)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex37) )
% 31.96/31.95 & ( v2528(VarCurr,bitIndex25)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex36) )
% 31.96/31.95 & ( v2528(VarCurr,bitIndex24)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex35) )
% 31.96/31.95 & ( v2528(VarCurr,bitIndex23)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex34) )
% 31.96/31.95 & ( v2528(VarCurr,bitIndex22)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex33) )
% 31.96/31.95 & ( v2528(VarCurr,bitIndex21)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex32) )
% 31.96/31.95 & ( v2528(VarCurr,bitIndex20)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex31) )
% 31.96/31.95 & ( v2528(VarCurr,bitIndex19)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex30) )
% 31.96/31.95 & ( v2528(VarCurr,bitIndex18)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex29) )
% 31.96/31.95 & ( v2528(VarCurr,bitIndex17)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex28) )
% 31.96/31.95 & ( v2528(VarCurr,bitIndex16)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex27) )
% 31.96/31.95 & ( v2528(VarCurr,bitIndex15)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex26) )
% 31.96/31.95 & ( v2528(VarCurr,bitIndex14)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex25) )
% 31.96/31.95 & ( v2528(VarCurr,bitIndex13)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex24) )
% 31.96/31.95 & ( v2528(VarCurr,bitIndex12)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex23) )
% 31.96/31.95 & ( v2528(VarCurr,bitIndex11)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex22) )
% 31.96/31.95 & ( v2528(VarCurr,bitIndex10)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex21) )
% 31.96/31.95 & ( v2528(VarCurr,bitIndex9)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex20) )
% 31.96/31.95 & ( v2528(VarCurr,bitIndex8)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex19) )
% 31.96/31.95 & ( v2528(VarCurr,bitIndex7)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex18) )
% 31.96/31.95 & ( v2528(VarCurr,bitIndex6)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex17) )
% 31.96/31.95 & ( v2528(VarCurr,bitIndex5)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex16) )
% 31.96/31.95 & ( v2528(VarCurr,bitIndex4)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex15) )
% 31.96/31.95 & ( v2528(VarCurr,bitIndex3)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex14) )
% 31.96/31.95 & ( v2528(VarCurr,bitIndex2)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex13) )
% 31.96/31.95 & ( v2528(VarCurr,bitIndex1)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex12) )
% 31.96/31.95 & ( v2528(VarCurr,bitIndex0)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex11) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1222,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2528(VarCurr,bitIndex29)
% 31.96/31.95 <=> $false ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_276,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2525(VarCurr,bitIndex0)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex10)
% 31.96/31.95 & v2526(VarCurr,bitIndex0) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_275,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2525(VarCurr,bitIndex1)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex11)
% 31.96/31.95 & v2526(VarCurr,bitIndex1) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_274,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2525(VarCurr,bitIndex2)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex12)
% 31.96/31.95 & v2526(VarCurr,bitIndex2) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_273,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2525(VarCurr,bitIndex3)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex13)
% 31.96/31.95 & v2526(VarCurr,bitIndex3) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_272,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2525(VarCurr,bitIndex4)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex14)
% 31.96/31.95 & v2526(VarCurr,bitIndex4) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_271,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2525(VarCurr,bitIndex5)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex15)
% 31.96/31.95 & v2526(VarCurr,bitIndex5) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_270,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2525(VarCurr,bitIndex6)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex16)
% 31.96/31.95 & v2526(VarCurr,bitIndex6) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_269,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2525(VarCurr,bitIndex7)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex17)
% 31.96/31.95 & v2526(VarCurr,bitIndex7) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_268,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2525(VarCurr,bitIndex8)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex18)
% 31.96/31.95 & v2526(VarCurr,bitIndex8) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_267,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2525(VarCurr,bitIndex9)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex19)
% 31.96/31.95 & v2526(VarCurr,bitIndex9) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_266,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2525(VarCurr,bitIndex10)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex20)
% 31.96/31.95 & v2526(VarCurr,bitIndex10) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_265,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2525(VarCurr,bitIndex11)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex21)
% 31.96/31.95 & v2526(VarCurr,bitIndex11) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_264,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2525(VarCurr,bitIndex12)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex22)
% 31.96/31.95 & v2526(VarCurr,bitIndex12) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_263,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2525(VarCurr,bitIndex13)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex23)
% 31.96/31.95 & v2526(VarCurr,bitIndex13) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_262,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2525(VarCurr,bitIndex14)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex24)
% 31.96/31.95 & v2526(VarCurr,bitIndex14) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_261,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2525(VarCurr,bitIndex15)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex25)
% 31.96/31.95 & v2526(VarCurr,bitIndex15) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_260,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2525(VarCurr,bitIndex16)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex26)
% 31.96/31.95 & v2526(VarCurr,bitIndex16) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_259,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2525(VarCurr,bitIndex17)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex27)
% 31.96/31.95 & v2526(VarCurr,bitIndex17) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_258,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2525(VarCurr,bitIndex18)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex28)
% 31.96/31.95 & v2526(VarCurr,bitIndex18) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_257,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2525(VarCurr,bitIndex19)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex29)
% 31.96/31.95 & v2526(VarCurr,bitIndex19) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_256,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2525(VarCurr,bitIndex20)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex30)
% 31.96/31.95 & v2526(VarCurr,bitIndex20) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_255,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2525(VarCurr,bitIndex21)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex31)
% 31.96/31.95 & v2526(VarCurr,bitIndex21) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_254,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2525(VarCurr,bitIndex22)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex32)
% 31.96/31.95 & v2526(VarCurr,bitIndex22) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_253,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2525(VarCurr,bitIndex23)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex33)
% 31.96/31.95 & v2526(VarCurr,bitIndex23) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_252,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2525(VarCurr,bitIndex24)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex34)
% 31.96/31.95 & v2526(VarCurr,bitIndex24) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_251,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2525(VarCurr,bitIndex25)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex35)
% 31.96/31.95 & v2526(VarCurr,bitIndex25) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_250,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2525(VarCurr,bitIndex26)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex36)
% 31.96/31.95 & v2526(VarCurr,bitIndex26) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_249,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2525(VarCurr,bitIndex27)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex37)
% 31.96/31.95 & v2526(VarCurr,bitIndex27) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_248,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2525(VarCurr,bitIndex28)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex38)
% 31.96/31.95 & v2526(VarCurr,bitIndex28) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_247,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2525(VarCurr,bitIndex29)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex39)
% 31.96/31.95 & v2526(VarCurr,bitIndex29) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1221,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2526(VarCurr,bitIndex0)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1220,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2526(VarCurr,bitIndex1)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1219,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2526(VarCurr,bitIndex2)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1218,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2526(VarCurr,bitIndex3)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1217,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2526(VarCurr,bitIndex4)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1216,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2526(VarCurr,bitIndex5)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1215,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2526(VarCurr,bitIndex6)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1214,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2526(VarCurr,bitIndex7)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1213,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2526(VarCurr,bitIndex8)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1212,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2526(VarCurr,bitIndex9)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1211,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2526(VarCurr,bitIndex10)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1210,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2526(VarCurr,bitIndex11)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1209,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2526(VarCurr,bitIndex12)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1208,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2526(VarCurr,bitIndex13)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1207,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2526(VarCurr,bitIndex14)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1206,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2526(VarCurr,bitIndex15)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1205,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2526(VarCurr,bitIndex16)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1204,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2526(VarCurr,bitIndex17)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1203,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2526(VarCurr,bitIndex18)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1202,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2526(VarCurr,bitIndex19)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1201,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2526(VarCurr,bitIndex20)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1200,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2526(VarCurr,bitIndex21)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1199,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2526(VarCurr,bitIndex22)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1198,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2526(VarCurr,bitIndex23)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1197,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2526(VarCurr,bitIndex24)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1196,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2526(VarCurr,bitIndex25)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1195,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2526(VarCurr,bitIndex26)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1194,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2526(VarCurr,bitIndex27)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1193,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2526(VarCurr,bitIndex28)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1192,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2526(VarCurr,bitIndex29)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorEqualRangesMultipleBits_28,axiom,
% 31.96/31.95 ! [VarCurr,B] :
% 31.96/31.95 ( range_31_0(B)
% 31.96/31.95 => ( v2514(VarCurr,B)
% 31.96/31.95 <=> ( v2515(VarCurr,B)
% 31.96/31.95 & v2521(VarCurr,B) ) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1191,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex0)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1190,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex1)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1189,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex2)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1188,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex3)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1187,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex4)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1186,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex5)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1185,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex6)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1184,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex7)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1183,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex8)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1182,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex9)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1181,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex10)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1180,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex11)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1179,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex12)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1178,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex13)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1177,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex14)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1176,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex15)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1175,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex16)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1174,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex17)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1173,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex18)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1172,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex19)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1171,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex20)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1170,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex21)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1169,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex22)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1168,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex23)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1167,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex24)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1166,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex25)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1165,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex26)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1164,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex27)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1163,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex28)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1162,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex29)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1161,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex30)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1160,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2521(VarCurr,bitIndex31)
% 31.96/31.95 <=> v2473(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorEqualRangesMultipleBits_27,axiom,
% 31.96/31.95 ! [VarCurr,B] :
% 31.96/31.95 ( range_31_0(B)
% 31.96/31.95 => ( v2515(VarCurr,B)
% 31.96/31.95 <=> ( v2516(VarCurr,B)
% 31.96/31.95 | v2518(VarCurr,B) ) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorEqualRangesMultipleBits_26,axiom,
% 31.96/31.95 ! [VarCurr,B] :
% 31.96/31.95 ( range_31_0(B)
% 31.96/31.95 => ( v2518(VarCurr,B)
% 31.96/31.95 <=> ( v2519(VarCurr,B)
% 31.96/31.95 & v2520(VarCurr,B) ) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1159,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex0)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1158,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex1)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1157,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex2)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1156,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex3)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1155,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex4)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1154,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex5)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1153,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex6)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1152,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex7)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1151,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex8)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1150,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex9)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1149,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex10)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1148,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex11)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1147,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex12)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1146,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex13)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1145,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex14)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1144,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex15)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1143,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex16)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1142,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex17)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1141,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex18)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1140,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex19)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1139,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex20)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1138,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex21)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1137,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex22)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1136,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex23)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1135,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex24)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1134,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex25)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1133,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex26)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1132,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex27)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1131,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex28)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1130,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex29)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1129,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex30)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1128,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2520(VarCurr,bitIndex31)
% 31.96/31.95 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1127,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( ( v2519(VarCurr,bitIndex30)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex39) )
% 31.96/31.95 & ( v2519(VarCurr,bitIndex29)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex38) )
% 31.96/31.95 & ( v2519(VarCurr,bitIndex28)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex37) )
% 31.96/31.95 & ( v2519(VarCurr,bitIndex27)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex36) )
% 31.96/31.95 & ( v2519(VarCurr,bitIndex26)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex35) )
% 31.96/31.95 & ( v2519(VarCurr,bitIndex25)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex34) )
% 31.96/31.95 & ( v2519(VarCurr,bitIndex24)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex33) )
% 31.96/31.95 & ( v2519(VarCurr,bitIndex23)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex32) )
% 31.96/31.95 & ( v2519(VarCurr,bitIndex22)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex31) )
% 31.96/31.95 & ( v2519(VarCurr,bitIndex21)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex30) )
% 31.96/31.95 & ( v2519(VarCurr,bitIndex20)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex29) )
% 31.96/31.95 & ( v2519(VarCurr,bitIndex19)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex28) )
% 31.96/31.95 & ( v2519(VarCurr,bitIndex18)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex27) )
% 31.96/31.95 & ( v2519(VarCurr,bitIndex17)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex26) )
% 31.96/31.95 & ( v2519(VarCurr,bitIndex16)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex25) )
% 31.96/31.95 & ( v2519(VarCurr,bitIndex15)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex24) )
% 31.96/31.95 & ( v2519(VarCurr,bitIndex14)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex23) )
% 31.96/31.95 & ( v2519(VarCurr,bitIndex13)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex22) )
% 31.96/31.95 & ( v2519(VarCurr,bitIndex12)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex21) )
% 31.96/31.95 & ( v2519(VarCurr,bitIndex11)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex20) )
% 31.96/31.95 & ( v2519(VarCurr,bitIndex10)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex19) )
% 31.96/31.95 & ( v2519(VarCurr,bitIndex9)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex18) )
% 31.96/31.95 & ( v2519(VarCurr,bitIndex8)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex17) )
% 31.96/31.95 & ( v2519(VarCurr,bitIndex7)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex16) )
% 31.96/31.95 & ( v2519(VarCurr,bitIndex6)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex15) )
% 31.96/31.95 & ( v2519(VarCurr,bitIndex5)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex14) )
% 31.96/31.95 & ( v2519(VarCurr,bitIndex4)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex13) )
% 31.96/31.95 & ( v2519(VarCurr,bitIndex3)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex12) )
% 31.96/31.95 & ( v2519(VarCurr,bitIndex2)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex11) )
% 31.96/31.95 & ( v2519(VarCurr,bitIndex1)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex10) )
% 31.96/31.95 & ( v2519(VarCurr,bitIndex0)
% 31.96/31.95 <=> v2465(VarCurr,bitIndex9) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1126,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2519(VarCurr,bitIndex31)
% 31.96/31.95 <=> $false ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_246,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex0)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex8)
% 31.96/31.95 & v2517(VarCurr,bitIndex0) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_245,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex1)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex9)
% 31.96/31.95 & v2517(VarCurr,bitIndex1) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_244,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex2)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex10)
% 31.96/31.95 & v2517(VarCurr,bitIndex2) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_243,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex3)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex11)
% 31.96/31.95 & v2517(VarCurr,bitIndex3) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_242,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex4)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex12)
% 31.96/31.95 & v2517(VarCurr,bitIndex4) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_241,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex5)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex13)
% 31.96/31.95 & v2517(VarCurr,bitIndex5) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_240,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex6)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex14)
% 31.96/31.95 & v2517(VarCurr,bitIndex6) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_239,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex7)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex15)
% 31.96/31.95 & v2517(VarCurr,bitIndex7) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_238,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex8)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex16)
% 31.96/31.95 & v2517(VarCurr,bitIndex8) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_237,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex9)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex17)
% 31.96/31.95 & v2517(VarCurr,bitIndex9) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_236,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex10)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex18)
% 31.96/31.95 & v2517(VarCurr,bitIndex10) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_235,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex11)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex19)
% 31.96/31.95 & v2517(VarCurr,bitIndex11) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_234,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex12)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex20)
% 31.96/31.95 & v2517(VarCurr,bitIndex12) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_233,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex13)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex21)
% 31.96/31.95 & v2517(VarCurr,bitIndex13) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_232,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex14)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex22)
% 31.96/31.95 & v2517(VarCurr,bitIndex14) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_231,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex15)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex23)
% 31.96/31.95 & v2517(VarCurr,bitIndex15) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_230,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex16)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex24)
% 31.96/31.95 & v2517(VarCurr,bitIndex16) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_229,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex17)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex25)
% 31.96/31.95 & v2517(VarCurr,bitIndex17) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_228,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex18)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex26)
% 31.96/31.95 & v2517(VarCurr,bitIndex18) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_227,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex19)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex27)
% 31.96/31.95 & v2517(VarCurr,bitIndex19) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_226,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex20)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex28)
% 31.96/31.95 & v2517(VarCurr,bitIndex20) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_225,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex21)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex29)
% 31.96/31.95 & v2517(VarCurr,bitIndex21) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_224,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex22)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex30)
% 31.96/31.95 & v2517(VarCurr,bitIndex22) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_223,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex23)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex31)
% 31.96/31.95 & v2517(VarCurr,bitIndex23) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_222,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex24)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex32)
% 31.96/31.95 & v2517(VarCurr,bitIndex24) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_221,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex25)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex33)
% 31.96/31.95 & v2517(VarCurr,bitIndex25) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_220,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex26)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex34)
% 31.96/31.95 & v2517(VarCurr,bitIndex26) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_219,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex27)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex35)
% 31.96/31.95 & v2517(VarCurr,bitIndex27) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_218,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex28)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex36)
% 31.96/31.95 & v2517(VarCurr,bitIndex28) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_217,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex29)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex37)
% 31.96/31.95 & v2517(VarCurr,bitIndex29) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_216,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex30)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex38)
% 31.96/31.95 & v2517(VarCurr,bitIndex30) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorShiftedRanges_215,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2516(VarCurr,bitIndex31)
% 31.96/31.95 <=> ( v2465(VarCurr,bitIndex39)
% 31.96/31.95 & v2517(VarCurr,bitIndex31) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1125,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex0)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1124,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex1)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1123,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex2)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1122,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex3)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1121,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex4)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1120,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex5)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1119,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex6)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1118,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex7)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1117,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex8)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1116,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex9)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1115,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex10)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1114,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex11)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1113,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex12)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1112,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex13)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1111,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex14)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1110,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex15)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1109,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex16)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1108,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex17)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1107,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex18)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1106,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex19)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1105,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex20)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1104,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex21)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1103,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex22)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1102,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex23)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1101,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex24)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1100,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex25)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1099,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex26)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1098,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex27)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1097,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex28)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1096,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex29)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1095,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex30)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1094,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2517(VarCurr,bitIndex31)
% 31.96/31.95 <=> v2468(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(writeBinaryOperatorEqualRangesMultipleBits_25,axiom,
% 31.96/31.95 ! [VarCurr,B] :
% 31.96/31.95 ( range_39_0(B)
% 31.96/31.95 => ( v2458(VarCurr,B)
% 31.96/31.95 <=> ( v2459(VarCurr,B)
% 31.96/31.95 & v2506(VarCurr,B) ) ) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1093,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2506(VarCurr,bitIndex0)
% 31.96/31.95 <=> v2507(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1092,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2506(VarCurr,bitIndex1)
% 31.96/31.95 <=> v2507(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1091,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2506(VarCurr,bitIndex2)
% 31.96/31.95 <=> v2507(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1090,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2506(VarCurr,bitIndex3)
% 31.96/31.95 <=> v2507(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1089,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2506(VarCurr,bitIndex4)
% 31.96/31.95 <=> v2507(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1088,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2506(VarCurr,bitIndex5)
% 31.96/31.95 <=> v2507(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1087,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2506(VarCurr,bitIndex6)
% 31.96/31.95 <=> v2507(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1086,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2506(VarCurr,bitIndex7)
% 31.96/31.95 <=> v2507(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1085,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2506(VarCurr,bitIndex8)
% 31.96/31.95 <=> v2507(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1084,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2506(VarCurr,bitIndex9)
% 31.96/31.95 <=> v2507(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1083,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2506(VarCurr,bitIndex10)
% 31.96/31.95 <=> v2507(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1082,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2506(VarCurr,bitIndex11)
% 31.96/31.95 <=> v2507(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1081,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2506(VarCurr,bitIndex12)
% 31.96/31.95 <=> v2507(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1080,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2506(VarCurr,bitIndex13)
% 31.96/31.95 <=> v2507(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1079,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2506(VarCurr,bitIndex14)
% 31.96/31.95 <=> v2507(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1078,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2506(VarCurr,bitIndex15)
% 31.96/31.95 <=> v2507(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1077,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2506(VarCurr,bitIndex16)
% 31.96/31.95 <=> v2507(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1076,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2506(VarCurr,bitIndex17)
% 31.96/31.95 <=> v2507(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1075,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2506(VarCurr,bitIndex18)
% 31.96/31.95 <=> v2507(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1074,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2506(VarCurr,bitIndex19)
% 31.96/31.95 <=> v2507(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1073,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2506(VarCurr,bitIndex20)
% 31.96/31.95 <=> v2507(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1072,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2506(VarCurr,bitIndex21)
% 31.96/31.95 <=> v2507(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1071,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.95 ( v2506(VarCurr,bitIndex22)
% 31.96/31.95 <=> v2507(VarCurr) ) ).
% 31.96/31.95
% 31.96/31.95 fof(addAssignment_1070,axiom,
% 31.96/31.95 ! [VarCurr] :
% 31.96/31.96 ( v2506(VarCurr,bitIndex23)
% 31.96/31.96 <=> v2507(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1069,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2506(VarCurr,bitIndex24)
% 31.96/31.96 <=> v2507(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1068,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2506(VarCurr,bitIndex25)
% 31.96/31.96 <=> v2507(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1067,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2506(VarCurr,bitIndex26)
% 31.96/31.96 <=> v2507(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1066,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2506(VarCurr,bitIndex27)
% 31.96/31.96 <=> v2507(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1065,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2506(VarCurr,bitIndex28)
% 31.96/31.96 <=> v2507(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1064,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2506(VarCurr,bitIndex29)
% 31.96/31.96 <=> v2507(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1063,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2506(VarCurr,bitIndex30)
% 31.96/31.96 <=> v2507(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1062,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2506(VarCurr,bitIndex31)
% 31.96/31.96 <=> v2507(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1061,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2506(VarCurr,bitIndex32)
% 31.96/31.96 <=> v2507(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1060,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2506(VarCurr,bitIndex33)
% 31.96/31.96 <=> v2507(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1059,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2506(VarCurr,bitIndex34)
% 31.96/31.96 <=> v2507(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1058,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2506(VarCurr,bitIndex35)
% 31.96/31.96 <=> v2507(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1057,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2506(VarCurr,bitIndex36)
% 31.96/31.96 <=> v2507(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1056,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2506(VarCurr,bitIndex37)
% 31.96/31.96 <=> v2507(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1055,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2506(VarCurr,bitIndex38)
% 31.96/31.96 <=> v2507(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1054,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2506(VarCurr,bitIndex39)
% 31.96/31.96 <=> v2507(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeUnaryOperator_217,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( ~ v2507(VarCurr)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex3) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorEqualRangesMultipleBits_24,axiom,
% 31.96/31.96 ! [VarCurr,B] :
% 31.96/31.96 ( range_39_0(B)
% 31.96/31.96 => ( v2459(VarCurr,B)
% 31.96/31.96 <=> ( v2460(VarCurr,B)
% 31.96/31.96 | v2485(VarCurr,B) ) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorEqualRangesMultipleBits_23,axiom,
% 31.96/31.96 ! [VarCurr,B] :
% 31.96/31.96 ( range_39_0(B)
% 31.96/31.96 => ( v2485(VarCurr,B)
% 31.96/31.96 <=> ( v2486(VarCurr,B)
% 31.96/31.96 & v2505(VarCurr,B) ) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1053,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex0)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1052,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex1)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1051,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex2)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1050,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex3)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1049,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex4)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1048,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex5)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1047,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex6)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1046,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex7)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1045,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex8)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1044,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex9)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1043,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex10)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1042,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex11)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1041,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex12)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1040,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex13)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1039,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex14)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1038,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex15)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1037,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex16)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1036,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex17)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1035,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex18)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1034,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex19)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1033,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex20)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1032,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex21)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1031,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex22)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1030,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex23)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1029,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex24)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1028,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex25)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1027,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex26)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1026,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex27)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1025,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex28)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1024,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex29)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1023,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex30)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1022,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex31)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1021,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex32)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1020,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex33)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1019,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex34)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1018,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex35)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1017,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex36)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1016,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex37)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1015,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex38)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1014,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2505(VarCurr,bitIndex39)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1013,axiom,
% 31.96/31.96 ! [VarCurr,B] :
% 31.96/31.96 ( range_35_0(B)
% 31.96/31.96 => ( v2486(VarCurr,B)
% 31.96/31.96 <=> v2487(VarCurr,B) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1012,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( ( v2486(VarCurr,bitIndex39)
% 31.96/31.96 <=> $false )
% 31.96/31.96 & ( v2486(VarCurr,bitIndex38)
% 31.96/31.96 <=> $false )
% 31.96/31.96 & ( v2486(VarCurr,bitIndex37)
% 31.96/31.96 <=> $false )
% 31.96/31.96 & ( v2486(VarCurr,bitIndex36)
% 31.96/31.96 <=> $false ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorEqualRangesMultipleBits_22,axiom,
% 31.96/31.96 ! [VarCurr,B] :
% 31.96/31.96 ( range_35_0(B)
% 31.96/31.96 => ( v2487(VarCurr,B)
% 31.96/31.96 <=> ( v2488(VarCurr,B)
% 31.96/31.96 | v2496(VarCurr,B) ) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorEqualRangesMultipleBits_21,axiom,
% 31.96/31.96 ! [VarCurr,B] :
% 31.96/31.96 ( range_35_0(B)
% 31.96/31.96 => ( v2496(VarCurr,B)
% 31.96/31.96 <=> ( v2497(VarCurr,B)
% 31.96/31.96 & v2504(VarCurr,B) ) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1011,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex0)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1010,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex1)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1009,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex2)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1008,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex3)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1007,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex4)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1006,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex5)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1005,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex6)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1004,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex7)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1003,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex8)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1002,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex9)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1001,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex10)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_1000,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex11)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_999,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex12)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_998,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex13)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_997,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex14)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_996,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex15)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_995,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex16)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_994,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex17)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_993,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex18)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_992,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex19)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_991,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex20)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_990,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex21)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_989,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex22)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_988,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex23)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_987,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex24)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_986,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex25)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_985,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex26)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_984,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex27)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_983,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex28)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_982,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex29)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_981,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex30)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_980,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex31)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_979,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex32)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_978,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex33)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_977,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex34)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_976,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2504(VarCurr,bitIndex35)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_975,axiom,
% 31.96/31.96 ! [VarCurr,B] :
% 31.96/31.96 ( range_33_0(B)
% 31.96/31.96 => ( v2497(VarCurr,B)
% 31.96/31.96 <=> v2498(VarCurr,B) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_974,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( ( v2497(VarCurr,bitIndex35)
% 31.96/31.96 <=> $false )
% 31.96/31.96 & ( v2497(VarCurr,bitIndex34)
% 31.96/31.96 <=> $false ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorEqualRangesMultipleBits_20,axiom,
% 31.96/31.96 ! [VarCurr,B] :
% 31.96/31.96 ( range_33_0(B)
% 31.96/31.96 => ( v2498(VarCurr,B)
% 31.96/31.96 <=> ( v2499(VarCurr,B)
% 31.96/31.96 | v2501(VarCurr,B) ) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorEqualRangesMultipleBits_19,axiom,
% 31.96/31.96 ! [VarCurr,B] :
% 31.96/31.96 ( range_33_0(B)
% 31.96/31.96 => ( v2501(VarCurr,B)
% 31.96/31.96 <=> ( v2502(VarCurr,B)
% 31.96/31.96 & v2503(VarCurr,B) ) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(range_axiom_18,axiom,
% 31.96/31.96 ! [B] :
% 31.96/31.96 ( range_33_0(B)
% 31.96/31.96 <=> ( $false
% 31.96/31.96 | bitIndex0 = B
% 31.96/31.96 | bitIndex1 = B
% 31.96/31.96 | bitIndex2 = B
% 31.96/31.96 | bitIndex3 = B
% 31.96/31.96 | bitIndex4 = B
% 31.96/31.96 | bitIndex5 = B
% 31.96/31.96 | bitIndex6 = B
% 31.96/31.96 | bitIndex7 = B
% 31.96/31.96 | bitIndex8 = B
% 31.96/31.96 | bitIndex9 = B
% 31.96/31.96 | bitIndex10 = B
% 31.96/31.96 | bitIndex11 = B
% 31.96/31.96 | bitIndex12 = B
% 31.96/31.96 | bitIndex13 = B
% 31.96/31.96 | bitIndex14 = B
% 31.96/31.96 | bitIndex15 = B
% 31.96/31.96 | bitIndex16 = B
% 31.96/31.96 | bitIndex17 = B
% 31.96/31.96 | bitIndex18 = B
% 31.96/31.96 | bitIndex19 = B
% 31.96/31.96 | bitIndex20 = B
% 31.96/31.96 | bitIndex21 = B
% 31.96/31.96 | bitIndex22 = B
% 31.96/31.96 | bitIndex23 = B
% 31.96/31.96 | bitIndex24 = B
% 31.96/31.96 | bitIndex25 = B
% 31.96/31.96 | bitIndex26 = B
% 31.96/31.96 | bitIndex27 = B
% 31.96/31.96 | bitIndex28 = B
% 31.96/31.96 | bitIndex29 = B
% 31.96/31.96 | bitIndex30 = B
% 31.96/31.96 | bitIndex31 = B
% 31.96/31.96 | bitIndex32 = B
% 31.96/31.96 | bitIndex33 = B ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_973,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex0)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_972,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex1)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_971,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex2)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_970,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex3)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_969,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex4)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_968,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex5)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_967,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex6)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_966,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex7)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_965,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex8)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_964,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex9)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_963,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex10)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_962,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex11)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_961,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex12)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_960,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex13)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_959,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex14)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_958,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex15)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_957,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex16)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_956,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex17)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_955,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex18)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_954,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex19)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_953,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex20)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_952,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex21)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_951,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex22)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_950,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex23)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_949,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex24)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_948,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex25)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_947,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex26)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_946,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex27)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_945,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex28)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_944,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex29)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_943,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex30)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_942,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex31)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_941,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex32)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_940,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2503(VarCurr,bitIndex33)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_939,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( ( v2502(VarCurr,bitIndex32)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex39) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex31)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex38) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex30)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex37) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex29)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex36) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex28)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex35) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex27)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex34) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex26)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex33) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex25)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex32) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex24)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex31) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex23)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex30) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex22)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex29) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex21)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex28) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex20)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex27) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex19)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex26) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex18)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex25) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex17)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex24) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex16)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex23) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex15)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex22) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex14)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex21) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex13)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex20) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex12)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex19) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex11)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex18) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex10)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex17) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex9)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex16) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex8)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex15) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex7)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex14) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex6)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex13) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex5)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex12) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex4)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex11) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex3)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex10) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex2)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex9) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex1)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex8) )
% 31.96/31.96 & ( v2502(VarCurr,bitIndex0)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex7) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_938,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2502(VarCurr,bitIndex33)
% 31.96/31.96 <=> $false ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_214,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex0)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex6)
% 31.96/31.96 & v2500(VarCurr,bitIndex0) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_213,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex1)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex7)
% 31.96/31.96 & v2500(VarCurr,bitIndex1) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_212,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex2)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex8)
% 31.96/31.96 & v2500(VarCurr,bitIndex2) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_211,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex3)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex9)
% 31.96/31.96 & v2500(VarCurr,bitIndex3) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_210,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex4)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex10)
% 31.96/31.96 & v2500(VarCurr,bitIndex4) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_209,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex5)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex11)
% 31.96/31.96 & v2500(VarCurr,bitIndex5) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_208,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex6)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex12)
% 31.96/31.96 & v2500(VarCurr,bitIndex6) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_207,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex7)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex13)
% 31.96/31.96 & v2500(VarCurr,bitIndex7) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_206,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex8)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex14)
% 31.96/31.96 & v2500(VarCurr,bitIndex8) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_205,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex9)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex15)
% 31.96/31.96 & v2500(VarCurr,bitIndex9) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_204,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex10)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex16)
% 31.96/31.96 & v2500(VarCurr,bitIndex10) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_203,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex11)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex17)
% 31.96/31.96 & v2500(VarCurr,bitIndex11) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_202,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex12)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex18)
% 31.96/31.96 & v2500(VarCurr,bitIndex12) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_201,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex13)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex19)
% 31.96/31.96 & v2500(VarCurr,bitIndex13) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_200,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex14)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex20)
% 31.96/31.96 & v2500(VarCurr,bitIndex14) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_199,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex15)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex21)
% 31.96/31.96 & v2500(VarCurr,bitIndex15) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_198,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex16)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex22)
% 31.96/31.96 & v2500(VarCurr,bitIndex16) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_197,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex17)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex23)
% 31.96/31.96 & v2500(VarCurr,bitIndex17) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_196,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex18)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex24)
% 31.96/31.96 & v2500(VarCurr,bitIndex18) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_195,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex19)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex25)
% 31.96/31.96 & v2500(VarCurr,bitIndex19) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_194,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex20)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex26)
% 31.96/31.96 & v2500(VarCurr,bitIndex20) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_193,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex21)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex27)
% 31.96/31.96 & v2500(VarCurr,bitIndex21) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_192,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex22)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex28)
% 31.96/31.96 & v2500(VarCurr,bitIndex22) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_191,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex23)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex29)
% 31.96/31.96 & v2500(VarCurr,bitIndex23) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_190,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex24)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex30)
% 31.96/31.96 & v2500(VarCurr,bitIndex24) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_189,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex25)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex31)
% 31.96/31.96 & v2500(VarCurr,bitIndex25) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_188,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex26)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex32)
% 31.96/31.96 & v2500(VarCurr,bitIndex26) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_187,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex27)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex33)
% 31.96/31.96 & v2500(VarCurr,bitIndex27) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_186,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex28)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex34)
% 31.96/31.96 & v2500(VarCurr,bitIndex28) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_185,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex29)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex35)
% 31.96/31.96 & v2500(VarCurr,bitIndex29) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_184,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex30)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex36)
% 31.96/31.96 & v2500(VarCurr,bitIndex30) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_183,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex31)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex37)
% 31.96/31.96 & v2500(VarCurr,bitIndex31) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_182,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex32)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex38)
% 31.96/31.96 & v2500(VarCurr,bitIndex32) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_181,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2499(VarCurr,bitIndex33)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex39)
% 31.96/31.96 & v2500(VarCurr,bitIndex33) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_937,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex0)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_936,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex1)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_935,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex2)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_934,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex3)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_933,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex4)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_932,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex5)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_931,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex6)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_930,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex7)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_929,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex8)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_928,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex9)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_927,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex10)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_926,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex11)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_925,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex12)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_924,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex13)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_923,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex14)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_922,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex15)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_921,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex16)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_920,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex17)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_919,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex18)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_918,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex19)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_917,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex20)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_916,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex21)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_915,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex22)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_914,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex23)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_913,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex24)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_912,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex25)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_911,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex26)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_910,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex27)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_909,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex28)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_908,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex29)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_907,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex30)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_906,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex31)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_905,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex32)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_904,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2500(VarCurr,bitIndex33)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorEqualRangesMultipleBits_18,axiom,
% 31.96/31.96 ! [VarCurr,B] :
% 31.96/31.96 ( range_35_0(B)
% 31.96/31.96 => ( v2488(VarCurr,B)
% 31.96/31.96 <=> ( v2489(VarCurr,B)
% 31.96/31.96 & v2495(VarCurr,B) ) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_903,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex0)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_902,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex1)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_901,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex2)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_900,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex3)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_899,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex4)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_898,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex5)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_897,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex6)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_896,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex7)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_895,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex8)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_894,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex9)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_893,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex10)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_892,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex11)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_891,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex12)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_890,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex13)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_889,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex14)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_888,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex15)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_887,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex16)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_886,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex17)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_885,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex18)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_884,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex19)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_883,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex20)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_882,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex21)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_881,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex22)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_880,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex23)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_879,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex24)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_878,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex25)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_877,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex26)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_876,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex27)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_875,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex28)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_874,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex29)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_873,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex30)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_872,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex31)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_871,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex32)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_870,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex33)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_869,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex34)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_868,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2495(VarCurr,bitIndex35)
% 31.96/31.96 <=> v2473(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorEqualRangesMultipleBits_17,axiom,
% 31.96/31.96 ! [VarCurr,B] :
% 31.96/31.96 ( range_35_0(B)
% 31.96/31.96 => ( v2489(VarCurr,B)
% 31.96/31.96 <=> ( v2490(VarCurr,B)
% 31.96/31.96 | v2492(VarCurr,B) ) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorEqualRangesMultipleBits_16,axiom,
% 31.96/31.96 ! [VarCurr,B] :
% 31.96/31.96 ( range_35_0(B)
% 31.96/31.96 => ( v2492(VarCurr,B)
% 31.96/31.96 <=> ( v2493(VarCurr,B)
% 31.96/31.96 & v2494(VarCurr,B) ) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_867,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex0)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_866,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex1)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_865,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex2)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_864,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex3)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_863,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex4)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_862,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex5)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_861,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex6)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_860,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex7)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_859,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex8)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_858,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex9)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_857,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex10)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_856,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex11)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_855,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex12)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_854,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex13)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_853,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex14)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_852,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex15)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_851,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex16)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_850,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex17)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_849,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex18)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_848,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex19)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_847,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex20)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_846,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex21)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_845,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex22)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_844,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex23)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_843,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex24)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_842,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex25)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_841,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex26)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_840,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex27)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_839,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex28)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_838,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex29)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_837,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex30)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_836,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex31)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_835,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex32)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_834,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex33)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_833,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex34)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_832,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2494(VarCurr,bitIndex35)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_831,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( ( v2493(VarCurr,bitIndex34)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex39) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex33)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex38) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex32)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex37) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex31)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex36) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex30)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex35) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex29)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex34) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex28)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex33) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex27)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex32) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex26)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex31) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex25)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex30) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex24)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex29) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex23)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex28) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex22)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex27) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex21)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex26) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex20)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex25) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex19)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex24) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex18)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex23) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex17)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex22) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex16)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex21) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex15)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex20) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex14)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex19) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex13)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex18) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex12)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex17) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex11)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex16) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex10)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex15) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex9)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex14) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex8)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex13) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex7)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex12) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex6)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex11) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex5)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex10) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex4)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex9) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex3)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex8) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex2)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex7) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex1)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex6) )
% 31.96/31.96 & ( v2493(VarCurr,bitIndex0)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex5) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_830,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2493(VarCurr,bitIndex35)
% 31.96/31.96 <=> $false ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_180,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex0)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex4)
% 31.96/31.96 & v2491(VarCurr,bitIndex0) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_179,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex1)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex5)
% 31.96/31.96 & v2491(VarCurr,bitIndex1) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_178,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex2)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex6)
% 31.96/31.96 & v2491(VarCurr,bitIndex2) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_177,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex3)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex7)
% 31.96/31.96 & v2491(VarCurr,bitIndex3) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_176,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex4)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex8)
% 31.96/31.96 & v2491(VarCurr,bitIndex4) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_175,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex5)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex9)
% 31.96/31.96 & v2491(VarCurr,bitIndex5) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_174,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex6)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex10)
% 31.96/31.96 & v2491(VarCurr,bitIndex6) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_173,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex7)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex11)
% 31.96/31.96 & v2491(VarCurr,bitIndex7) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_172,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex8)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex12)
% 31.96/31.96 & v2491(VarCurr,bitIndex8) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_171,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex9)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex13)
% 31.96/31.96 & v2491(VarCurr,bitIndex9) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_170,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex10)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex14)
% 31.96/31.96 & v2491(VarCurr,bitIndex10) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_169,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex11)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex15)
% 31.96/31.96 & v2491(VarCurr,bitIndex11) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_168,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex12)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex16)
% 31.96/31.96 & v2491(VarCurr,bitIndex12) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_167,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex13)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex17)
% 31.96/31.96 & v2491(VarCurr,bitIndex13) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_166,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex14)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex18)
% 31.96/31.96 & v2491(VarCurr,bitIndex14) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_165,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex15)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex19)
% 31.96/31.96 & v2491(VarCurr,bitIndex15) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_164,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex16)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex20)
% 31.96/31.96 & v2491(VarCurr,bitIndex16) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_163,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex17)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex21)
% 31.96/31.96 & v2491(VarCurr,bitIndex17) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_162,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex18)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex22)
% 31.96/31.96 & v2491(VarCurr,bitIndex18) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_161,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex19)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex23)
% 31.96/31.96 & v2491(VarCurr,bitIndex19) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_160,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex20)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex24)
% 31.96/31.96 & v2491(VarCurr,bitIndex20) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_159,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex21)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex25)
% 31.96/31.96 & v2491(VarCurr,bitIndex21) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_158,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex22)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex26)
% 31.96/31.96 & v2491(VarCurr,bitIndex22) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_157,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex23)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex27)
% 31.96/31.96 & v2491(VarCurr,bitIndex23) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_156,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex24)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex28)
% 31.96/31.96 & v2491(VarCurr,bitIndex24) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_155,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex25)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex29)
% 31.96/31.96 & v2491(VarCurr,bitIndex25) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_154,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex26)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex30)
% 31.96/31.96 & v2491(VarCurr,bitIndex26) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_153,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex27)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex31)
% 31.96/31.96 & v2491(VarCurr,bitIndex27) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_152,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex28)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex32)
% 31.96/31.96 & v2491(VarCurr,bitIndex28) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_151,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex29)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex33)
% 31.96/31.96 & v2491(VarCurr,bitIndex29) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_150,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex30)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex34)
% 31.96/31.96 & v2491(VarCurr,bitIndex30) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_149,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex31)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex35)
% 31.96/31.96 & v2491(VarCurr,bitIndex31) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_148,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex32)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex36)
% 31.96/31.96 & v2491(VarCurr,bitIndex32) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_147,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex33)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex37)
% 31.96/31.96 & v2491(VarCurr,bitIndex33) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_146,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex34)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex38)
% 31.96/31.96 & v2491(VarCurr,bitIndex34) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_145,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2490(VarCurr,bitIndex35)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex39)
% 31.96/31.96 & v2491(VarCurr,bitIndex35) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_829,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex0)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_828,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex1)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_827,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex2)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_826,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex3)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_825,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex4)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_824,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex5)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_823,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex6)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_822,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex7)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_821,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex8)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_820,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex9)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_819,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex10)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_818,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex11)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_817,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex12)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_816,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex13)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_815,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex14)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_814,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex15)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_813,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex16)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_812,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex17)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_811,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex18)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_810,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex19)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_809,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex20)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_808,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex21)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_807,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex22)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_806,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex23)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_805,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex24)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_804,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex25)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_803,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex26)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_802,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex27)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_801,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex28)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_800,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex29)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_799,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex30)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_798,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex31)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_797,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex32)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_796,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex33)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_795,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex34)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_794,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2491(VarCurr,bitIndex35)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorEqualRangesMultipleBits_15,axiom,
% 31.96/31.96 ! [VarCurr,B] :
% 31.96/31.96 ( range_39_0(B)
% 31.96/31.96 => ( v2460(VarCurr,B)
% 31.96/31.96 <=> ( v2461(VarCurr,B)
% 31.96/31.96 & v2483(VarCurr,B) ) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_793,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex0)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_792,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex1)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_791,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex2)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_790,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex3)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_789,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex4)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_788,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex5)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_787,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex6)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_786,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex7)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_785,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex8)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_784,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex9)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_783,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex10)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_782,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex11)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_781,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex12)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_780,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex13)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_779,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex14)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_778,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex15)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_777,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex16)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_776,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex17)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_775,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex18)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_774,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex19)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_773,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex20)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_772,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex21)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_771,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex22)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_770,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex23)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_769,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex24)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_768,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex25)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_767,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex26)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_766,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex27)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_765,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex28)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_764,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex29)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_763,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex30)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_762,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex31)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_761,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex32)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_760,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex33)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_759,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex34)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_758,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex35)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_757,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex36)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_756,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex37)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_755,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex38)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_754,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2483(VarCurr,bitIndex39)
% 31.96/31.96 <=> v2484(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeUnaryOperator_216,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( ~ v2484(VarCurr)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex2) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorEqualRangesMultipleBits_14,axiom,
% 31.96/31.96 ! [VarCurr,B] :
% 31.96/31.96 ( range_39_0(B)
% 31.96/31.96 => ( v2461(VarCurr,B)
% 31.96/31.96 <=> ( v2462(VarCurr,B)
% 31.96/31.96 | v2474(VarCurr,B) ) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorEqualRangesMultipleBits_13,axiom,
% 31.96/31.96 ! [VarCurr,B] :
% 31.96/31.96 ( range_39_0(B)
% 31.96/31.96 => ( v2474(VarCurr,B)
% 31.96/31.96 <=> ( v2475(VarCurr,B)
% 31.96/31.96 & v2482(VarCurr,B) ) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_753,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex0)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_752,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex1)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_751,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex2)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_750,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex3)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_749,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex4)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_748,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex5)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_747,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex6)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_746,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex7)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_745,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex8)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_744,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex9)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_743,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex10)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_742,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex11)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_741,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex12)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_740,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex13)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_739,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex14)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_738,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex15)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_737,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex16)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_736,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex17)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_735,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex18)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_734,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex19)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_733,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex20)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_732,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex21)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_731,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex22)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_730,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex23)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_729,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex24)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_728,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex25)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_727,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex26)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_726,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex27)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_725,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex28)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_724,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex29)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_723,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex30)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_722,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex31)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_721,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex32)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_720,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex33)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_719,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex34)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_718,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex35)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_717,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex36)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_716,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex37)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_715,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex38)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_714,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2482(VarCurr,bitIndex39)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_713,axiom,
% 31.96/31.96 ! [VarCurr,B] :
% 31.96/31.96 ( range_37_0(B)
% 31.96/31.96 => ( v2475(VarCurr,B)
% 31.96/31.96 <=> v2476(VarCurr,B) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_712,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( ( v2475(VarCurr,bitIndex39)
% 31.96/31.96 <=> $false )
% 31.96/31.96 & ( v2475(VarCurr,bitIndex38)
% 31.96/31.96 <=> $false ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorEqualRangesMultipleBits_12,axiom,
% 31.96/31.96 ! [VarCurr,B] :
% 31.96/31.96 ( range_37_0(B)
% 31.96/31.96 => ( v2476(VarCurr,B)
% 31.96/31.96 <=> ( v2477(VarCurr,B)
% 31.96/31.96 | v2479(VarCurr,B) ) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorEqualRangesMultipleBits_11,axiom,
% 31.96/31.96 ! [VarCurr,B] :
% 31.96/31.96 ( range_37_0(B)
% 31.96/31.96 => ( v2479(VarCurr,B)
% 31.96/31.96 <=> ( v2480(VarCurr,B)
% 31.96/31.96 & v2481(VarCurr,B) ) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(range_axiom_17,axiom,
% 31.96/31.96 ! [B] :
% 31.96/31.96 ( range_37_0(B)
% 31.96/31.96 <=> ( $false
% 31.96/31.96 | bitIndex0 = B
% 31.96/31.96 | bitIndex1 = B
% 31.96/31.96 | bitIndex2 = B
% 31.96/31.96 | bitIndex3 = B
% 31.96/31.96 | bitIndex4 = B
% 31.96/31.96 | bitIndex5 = B
% 31.96/31.96 | bitIndex6 = B
% 31.96/31.96 | bitIndex7 = B
% 31.96/31.96 | bitIndex8 = B
% 31.96/31.96 | bitIndex9 = B
% 31.96/31.96 | bitIndex10 = B
% 31.96/31.96 | bitIndex11 = B
% 31.96/31.96 | bitIndex12 = B
% 31.96/31.96 | bitIndex13 = B
% 31.96/31.96 | bitIndex14 = B
% 31.96/31.96 | bitIndex15 = B
% 31.96/31.96 | bitIndex16 = B
% 31.96/31.96 | bitIndex17 = B
% 31.96/31.96 | bitIndex18 = B
% 31.96/31.96 | bitIndex19 = B
% 31.96/31.96 | bitIndex20 = B
% 31.96/31.96 | bitIndex21 = B
% 31.96/31.96 | bitIndex22 = B
% 31.96/31.96 | bitIndex23 = B
% 31.96/31.96 | bitIndex24 = B
% 31.96/31.96 | bitIndex25 = B
% 31.96/31.96 | bitIndex26 = B
% 31.96/31.96 | bitIndex27 = B
% 31.96/31.96 | bitIndex28 = B
% 31.96/31.96 | bitIndex29 = B
% 31.96/31.96 | bitIndex30 = B
% 31.96/31.96 | bitIndex31 = B
% 31.96/31.96 | bitIndex32 = B
% 31.96/31.96 | bitIndex33 = B
% 31.96/31.96 | bitIndex34 = B
% 31.96/31.96 | bitIndex35 = B
% 31.96/31.96 | bitIndex36 = B
% 31.96/31.96 | bitIndex37 = B ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_711,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex0)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_710,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex1)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_709,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex2)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_708,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex3)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_707,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex4)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_706,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex5)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_705,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex6)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_704,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex7)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_703,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex8)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_702,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex9)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_701,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex10)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_700,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex11)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_699,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex12)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_698,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex13)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_697,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex14)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_696,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex15)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_695,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex16)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_694,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex17)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_693,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex18)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_692,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex19)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_691,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex20)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_690,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex21)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_689,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex22)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_688,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex23)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_687,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex24)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_686,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex25)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_685,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex26)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_684,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex27)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_683,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex28)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_682,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex29)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_681,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex30)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_680,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex31)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_679,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex32)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_678,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex33)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_677,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex34)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_676,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex35)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_675,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex36)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_674,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2481(VarCurr,bitIndex37)
% 31.96/31.96 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_673,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( ( v2480(VarCurr,bitIndex36)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex39) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex35)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex38) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex34)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex37) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex33)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex36) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex32)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex35) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex31)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex34) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex30)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex33) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex29)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex32) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex28)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex31) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex27)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex30) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex26)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex29) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex25)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex28) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex24)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex27) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex23)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex26) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex22)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex25) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex21)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex24) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex20)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex23) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex19)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex22) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex18)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex21) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex17)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex20) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex16)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex19) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex15)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex18) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex14)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex17) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex13)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex16) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex12)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex15) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex11)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex14) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex10)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex13) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex9)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex12) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex8)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex11) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex7)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex10) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex6)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex9) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex5)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex8) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex4)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex7) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex3)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex6) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex2)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex5) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex1)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex4) )
% 31.96/31.96 & ( v2480(VarCurr,bitIndex0)
% 31.96/31.96 <=> v2465(VarCurr,bitIndex3) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_672,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2480(VarCurr,bitIndex37)
% 31.96/31.96 <=> $false ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_144,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex0)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex2)
% 31.96/31.96 & v2478(VarCurr,bitIndex0) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_143,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex1)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex3)
% 31.96/31.96 & v2478(VarCurr,bitIndex1) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_142,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex2)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex4)
% 31.96/31.96 & v2478(VarCurr,bitIndex2) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_141,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex3)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex5)
% 31.96/31.96 & v2478(VarCurr,bitIndex3) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_140,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex4)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex6)
% 31.96/31.96 & v2478(VarCurr,bitIndex4) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_139,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex5)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex7)
% 31.96/31.96 & v2478(VarCurr,bitIndex5) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_138,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex6)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex8)
% 31.96/31.96 & v2478(VarCurr,bitIndex6) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_137,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex7)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex9)
% 31.96/31.96 & v2478(VarCurr,bitIndex7) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_136,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex8)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex10)
% 31.96/31.96 & v2478(VarCurr,bitIndex8) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_135,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex9)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex11)
% 31.96/31.96 & v2478(VarCurr,bitIndex9) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_134,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex10)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex12)
% 31.96/31.96 & v2478(VarCurr,bitIndex10) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_133,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex11)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex13)
% 31.96/31.96 & v2478(VarCurr,bitIndex11) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_132,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex12)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex14)
% 31.96/31.96 & v2478(VarCurr,bitIndex12) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_131,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex13)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex15)
% 31.96/31.96 & v2478(VarCurr,bitIndex13) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_130,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex14)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex16)
% 31.96/31.96 & v2478(VarCurr,bitIndex14) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_129,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex15)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex17)
% 31.96/31.96 & v2478(VarCurr,bitIndex15) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_128,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex16)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex18)
% 31.96/31.96 & v2478(VarCurr,bitIndex16) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_127,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex17)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex19)
% 31.96/31.96 & v2478(VarCurr,bitIndex17) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_126,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex18)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex20)
% 31.96/31.96 & v2478(VarCurr,bitIndex18) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_125,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex19)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex21)
% 31.96/31.96 & v2478(VarCurr,bitIndex19) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_124,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex20)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex22)
% 31.96/31.96 & v2478(VarCurr,bitIndex20) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_123,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex21)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex23)
% 31.96/31.96 & v2478(VarCurr,bitIndex21) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_122,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex22)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex24)
% 31.96/31.96 & v2478(VarCurr,bitIndex22) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_121,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex23)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex25)
% 31.96/31.96 & v2478(VarCurr,bitIndex23) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_120,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex24)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex26)
% 31.96/31.96 & v2478(VarCurr,bitIndex24) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_119,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex25)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex27)
% 31.96/31.96 & v2478(VarCurr,bitIndex25) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_118,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex26)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex28)
% 31.96/31.96 & v2478(VarCurr,bitIndex26) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_117,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex27)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex29)
% 31.96/31.96 & v2478(VarCurr,bitIndex27) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_116,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex28)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex30)
% 31.96/31.96 & v2478(VarCurr,bitIndex28) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_115,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex29)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex31)
% 31.96/31.96 & v2478(VarCurr,bitIndex29) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_114,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex30)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex32)
% 31.96/31.96 & v2478(VarCurr,bitIndex30) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_113,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex31)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex33)
% 31.96/31.96 & v2478(VarCurr,bitIndex31) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_112,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex32)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex34)
% 31.96/31.96 & v2478(VarCurr,bitIndex32) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_111,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex33)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex35)
% 31.96/31.96 & v2478(VarCurr,bitIndex33) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_110,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex34)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex36)
% 31.96/31.96 & v2478(VarCurr,bitIndex34) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_109,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex35)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex37)
% 31.96/31.96 & v2478(VarCurr,bitIndex35) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_108,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex36)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex38)
% 31.96/31.96 & v2478(VarCurr,bitIndex36) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(writeBinaryOperatorShiftedRanges_107,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2477(VarCurr,bitIndex37)
% 31.96/31.96 <=> ( v2465(VarCurr,bitIndex39)
% 31.96/31.96 & v2478(VarCurr,bitIndex37) ) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_671,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2478(VarCurr,bitIndex0)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_670,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2478(VarCurr,bitIndex1)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_669,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2478(VarCurr,bitIndex2)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_668,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2478(VarCurr,bitIndex3)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_667,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2478(VarCurr,bitIndex4)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_666,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2478(VarCurr,bitIndex5)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_665,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2478(VarCurr,bitIndex6)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_664,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.96 ( v2478(VarCurr,bitIndex7)
% 31.96/31.96 <=> v2468(VarCurr) ) ).
% 31.96/31.96
% 31.96/31.96 fof(addAssignment_663,axiom,
% 31.96/31.96 ! [VarCurr] :
% 31.96/31.97 ( v2478(VarCurr,bitIndex8)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_662,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2478(VarCurr,bitIndex9)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_661,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2478(VarCurr,bitIndex10)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_660,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2478(VarCurr,bitIndex11)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_659,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2478(VarCurr,bitIndex12)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_658,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2478(VarCurr,bitIndex13)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_657,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2478(VarCurr,bitIndex14)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_656,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2478(VarCurr,bitIndex15)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_655,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2478(VarCurr,bitIndex16)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_654,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2478(VarCurr,bitIndex17)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_653,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2478(VarCurr,bitIndex18)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_652,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2478(VarCurr,bitIndex19)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_651,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2478(VarCurr,bitIndex20)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_650,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2478(VarCurr,bitIndex21)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_649,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2478(VarCurr,bitIndex22)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_648,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2478(VarCurr,bitIndex23)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_647,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2478(VarCurr,bitIndex24)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_646,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2478(VarCurr,bitIndex25)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_645,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2478(VarCurr,bitIndex26)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_644,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2478(VarCurr,bitIndex27)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_643,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2478(VarCurr,bitIndex28)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_642,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2478(VarCurr,bitIndex29)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_641,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2478(VarCurr,bitIndex30)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_640,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2478(VarCurr,bitIndex31)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_639,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2478(VarCurr,bitIndex32)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_638,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2478(VarCurr,bitIndex33)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_637,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2478(VarCurr,bitIndex34)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_636,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2478(VarCurr,bitIndex35)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_635,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2478(VarCurr,bitIndex36)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_634,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2478(VarCurr,bitIndex37)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesMultipleBits_10,axiom,
% 31.96/31.97 ! [VarCurr,B] :
% 31.96/31.97 ( range_39_0(B)
% 31.96/31.97 => ( v2462(VarCurr,B)
% 31.96/31.97 <=> ( v2463(VarCurr,B)
% 31.96/31.97 & v2472(VarCurr,B) ) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_633,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex0)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_632,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex1)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_631,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex2)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_630,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex3)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_629,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex4)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_628,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex5)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_627,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex6)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_626,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex7)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_625,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex8)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_624,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex9)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_623,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex10)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_622,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex11)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_621,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex12)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_620,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex13)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_619,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex14)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_618,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex15)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_617,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex16)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_616,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex17)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_615,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex18)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_614,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex19)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_613,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex20)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_612,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex21)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_611,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex22)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_610,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex23)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_609,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex24)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_608,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex25)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_607,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex26)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_606,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex27)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_605,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex28)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_604,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex29)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_603,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex30)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_602,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex31)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_601,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex32)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_600,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex33)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_599,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex34)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_598,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex35)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_597,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex36)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_596,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex37)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_595,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex38)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_594,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2472(VarCurr,bitIndex39)
% 31.96/31.97 <=> v2473(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeUnaryOperator_215,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ~ v2473(VarCurr)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex1) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesMultipleBits_9,axiom,
% 31.96/31.97 ! [VarCurr,B] :
% 31.96/31.97 ( range_39_0(B)
% 31.96/31.97 => ( v2463(VarCurr,B)
% 31.96/31.97 <=> ( v2464(VarCurr,B)
% 31.96/31.97 | v2469(VarCurr,B) ) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesMultipleBits_8,axiom,
% 31.96/31.97 ! [VarCurr,B] :
% 31.96/31.97 ( range_39_0(B)
% 31.96/31.97 => ( v2469(VarCurr,B)
% 31.96/31.97 <=> ( v2470(VarCurr,B)
% 31.96/31.97 & v2471(VarCurr,B) ) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_593,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex0)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_592,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex1)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_591,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex2)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_590,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex3)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_589,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex4)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_588,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex5)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_587,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex6)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_586,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex7)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_585,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex8)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_584,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex9)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_583,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex10)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_582,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex11)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_581,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex12)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_580,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex13)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_579,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex14)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_578,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex15)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_577,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex16)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_576,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex17)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_575,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex18)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_574,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex19)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_573,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex20)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_572,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex21)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_571,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex22)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_570,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex23)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_569,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex24)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_568,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex25)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_567,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex26)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_566,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex27)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_565,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex28)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_564,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex29)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_563,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex30)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_562,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex31)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_561,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex32)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_560,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex33)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_559,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex34)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_558,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex35)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_557,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex36)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_556,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex37)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_555,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex38)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_554,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2471(VarCurr,bitIndex39)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_553,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ( v2470(VarCurr,bitIndex38)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex39) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex37)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex38) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex36)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex37) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex35)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex36) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex34)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex35) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex33)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex34) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex32)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex33) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex31)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex32) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex30)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex31) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex29)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex30) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex28)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex29) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex27)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex28) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex26)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex27) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex25)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex26) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex24)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex25) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex23)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex24) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex22)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex23) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex21)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex22) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex20)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex21) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex19)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex20) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex18)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex19) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex17)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex18) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex16)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex17) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex15)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex16) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex14)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex15) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex13)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex14) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex12)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex13) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex11)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex12) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex10)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex11) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex9)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex10) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex8)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex9) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex7)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex8) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex6)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex7) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex5)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex6) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex4)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex5) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex3)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex4) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex2)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex3) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex1)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex2) )
% 31.96/31.97 & ( v2470(VarCurr,bitIndex0)
% 31.96/31.97 <=> v2465(VarCurr,bitIndex1) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_552,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2470(VarCurr,bitIndex39)
% 31.96/31.97 <=> $false ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesMultipleBits_7,axiom,
% 31.96/31.97 ! [VarCurr,B] :
% 31.96/31.97 ( range_39_0(B)
% 31.96/31.97 => ( v2464(VarCurr,B)
% 31.96/31.97 <=> ( v2465(VarCurr,B)
% 31.96/31.97 & v2467(VarCurr,B) ) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(range_axiom_16,axiom,
% 31.96/31.97 ! [B] :
% 31.96/31.97 ( range_39_0(B)
% 31.96/31.97 <=> ( $false
% 31.96/31.97 | bitIndex0 = B
% 31.96/31.97 | bitIndex1 = B
% 31.96/31.97 | bitIndex2 = B
% 31.96/31.97 | bitIndex3 = B
% 31.96/31.97 | bitIndex4 = B
% 31.96/31.97 | bitIndex5 = B
% 31.96/31.97 | bitIndex6 = B
% 31.96/31.97 | bitIndex7 = B
% 31.96/31.97 | bitIndex8 = B
% 31.96/31.97 | bitIndex9 = B
% 31.96/31.97 | bitIndex10 = B
% 31.96/31.97 | bitIndex11 = B
% 31.96/31.97 | bitIndex12 = B
% 31.96/31.97 | bitIndex13 = B
% 31.96/31.97 | bitIndex14 = B
% 31.96/31.97 | bitIndex15 = B
% 31.96/31.97 | bitIndex16 = B
% 31.96/31.97 | bitIndex17 = B
% 31.96/31.97 | bitIndex18 = B
% 31.96/31.97 | bitIndex19 = B
% 31.96/31.97 | bitIndex20 = B
% 31.96/31.97 | bitIndex21 = B
% 31.96/31.97 | bitIndex22 = B
% 31.96/31.97 | bitIndex23 = B
% 31.96/31.97 | bitIndex24 = B
% 31.96/31.97 | bitIndex25 = B
% 31.96/31.97 | bitIndex26 = B
% 31.96/31.97 | bitIndex27 = B
% 31.96/31.97 | bitIndex28 = B
% 31.96/31.97 | bitIndex29 = B
% 31.96/31.97 | bitIndex30 = B
% 31.96/31.97 | bitIndex31 = B
% 31.96/31.97 | bitIndex32 = B
% 31.96/31.97 | bitIndex33 = B
% 31.96/31.97 | bitIndex34 = B
% 31.96/31.97 | bitIndex35 = B
% 31.96/31.97 | bitIndex36 = B
% 31.96/31.97 | bitIndex37 = B
% 31.96/31.97 | bitIndex38 = B
% 31.96/31.97 | bitIndex39 = B ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_551,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex0)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_550,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex1)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_549,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex2)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_548,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex3)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_547,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex4)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_546,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex5)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_545,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex6)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_544,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex7)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_543,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex8)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_542,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex9)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_541,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex10)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_540,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex11)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_539,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex12)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_538,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex13)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_537,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex14)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_536,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex15)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_535,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex16)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_534,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex17)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_533,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex18)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_532,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex19)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_531,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex20)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_530,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex21)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_529,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex22)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_528,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex23)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_527,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex24)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_526,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex25)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_525,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex26)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_524,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex27)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_523,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex28)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_522,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex29)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_521,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex30)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_520,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex31)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_519,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex32)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_518,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex33)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_517,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex34)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_516,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex35)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_515,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex36)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_514,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex37)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_513,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex38)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_512,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2467(VarCurr,bitIndex39)
% 31.96/31.97 <=> v2468(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeUnaryOperator_214,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ~ v2468(VarCurr)
% 31.96/31.97 <=> v2453(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignmentInitValueVector_29,axiom,
% 31.96/31.97 ! [B] :
% 31.96/31.97 ( range_4_0(B)
% 31.96/31.97 => ( v2453(constB0,B)
% 31.96/31.97 <=> $false ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_511,axiom,
% 31.96/31.97 ! [VarCurr,B] :
% 31.96/31.97 ( range_31_0(B)
% 31.96/31.97 => ( v2465(VarCurr,B)
% 31.96/31.97 <=> v2451(VarCurr,B) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_510,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ( v2465(VarCurr,bitIndex39)
% 31.96/31.97 <=> v2451(VarCurr,bitIndex7) )
% 31.96/31.97 & ( v2465(VarCurr,bitIndex38)
% 31.96/31.97 <=> v2451(VarCurr,bitIndex6) )
% 31.96/31.97 & ( v2465(VarCurr,bitIndex37)
% 31.96/31.97 <=> v2451(VarCurr,bitIndex5) )
% 31.96/31.97 & ( v2465(VarCurr,bitIndex36)
% 31.96/31.97 <=> v2451(VarCurr,bitIndex4) )
% 31.96/31.97 & ( v2465(VarCurr,bitIndex35)
% 31.96/31.97 <=> v2451(VarCurr,bitIndex3) )
% 31.96/31.97 & ( v2465(VarCurr,bitIndex34)
% 31.96/31.97 <=> v2451(VarCurr,bitIndex2) )
% 31.96/31.97 & ( v2465(VarCurr,bitIndex33)
% 31.96/31.97 <=> v2451(VarCurr,bitIndex1) )
% 31.96/31.97 & ( v2465(VarCurr,bitIndex32)
% 31.96/31.97 <=> v2451(VarCurr,bitIndex0) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignmentInitValueVector_28,axiom,
% 31.96/31.97 ! [B] :
% 31.96/31.97 ( range_31_0(B)
% 31.96/31.97 => ( v2451(constB0,B)
% 31.96/31.97 <=> $true ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_515,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex31) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_514,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex30) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_513,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex29) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_512,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex28) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_511,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex27) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_510,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex26) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_509,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex25) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_508,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex24) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_507,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex23) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_506,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex22) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_505,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex21) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_504,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex20) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_503,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex19) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_502,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex18) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_501,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex17) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_500,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex16) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_499,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex15) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_498,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex14) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_497,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex13) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_496,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex12) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_495,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex11) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_494,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex10) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_493,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex9) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_492,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex8) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_491,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex7) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_490,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex6) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_489,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex5) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_488,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex4) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_487,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex3) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_486,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex2) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_485,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex1) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_484,axiom,
% 31.96/31.97 b11111111111111111111111111111111(bitIndex0) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_462,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2426(VarCurr)
% 31.96/31.97 <=> ( v2437(VarCurr)
% 31.96/31.97 & v2439(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeUnaryOperator_213,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ~ v2439(VarCurr)
% 31.96/31.97 <=> v2322(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_461,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2437(VarCurr)
% 31.96/31.97 <=> ( v2438(VarCurr)
% 31.96/31.97 & v2365(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_460,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2438(VarCurr)
% 31.96/31.97 <=> ( v2304(VarCurr)
% 31.96/31.97 & v2428(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_509,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2428(VarCurr)
% 31.96/31.97 <=> v2430(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_508,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2430(VarCurr)
% 31.96/31.97 <=> v2432(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(aaddConditionBooleanCondEqualRangesElseBranch_64,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ~ v2434(VarCurr)
% 31.96/31.97 => ( v2432(VarCurr)
% 31.96/31.97 <=> $false ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addConditionBooleanCondEqualRangesThenBranch_67,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2434(VarCurr)
% 31.96/31.97 => ( v2432(VarCurr)
% 31.96/31.97 <=> $true ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_459,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2434(VarCurr)
% 31.96/31.97 <=> ( v2435(VarCurr)
% 31.96/31.97 & v170(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeUnaryOperator_212,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ~ v2435(VarCurr)
% 31.96/31.97 <=> v145(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_507,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2422(VarCurr)
% 31.96/31.97 <=> v2424(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_506,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2424(VarCurr)
% 31.96/31.97 <=> v149(VarCurr,bitIndex53) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_505,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v149(VarCurr,bitIndex53)
% 31.96/31.97 <=> v151(VarCurr,bitIndex53) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_504,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v151(VarCurr,bitIndex53)
% 31.96/31.97 <=> v156(VarCurr,bitIndex53) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_458,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2412(VarCurr)
% 31.96/31.97 <=> ( v2414(VarCurr)
% 31.96/31.97 & v2416(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeUnaryOperator_211,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ~ v2416(VarCurr)
% 31.96/31.97 <=> v2322(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_503,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2414(VarCurr)
% 31.96/31.97 <=> v2306(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_502,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2306(VarCurr,bitIndex0)
% 31.96/31.97 <=> v2394(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addConditionBooleanCondShiftedRangesElseBranch_18,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ~ v2409(VarCurr)
% 31.96/31.97 => ( v2302(VarCurr,bitIndex9)
% 31.96/31.97 <=> $false ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addConditionBooleanCondShiftedRangesThenBranch_15,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2409(VarCurr)
% 31.96/31.97 => ( v2302(VarCurr,bitIndex9)
% 31.96/31.97 <=> $true ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_457,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2409(VarCurr)
% 31.96/31.97 <=> ( v2304(VarCurr)
% 31.96/31.97 & v2410(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addBitVectorEqualityBitBlasted_93,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2410(VarCurr)
% 31.96/31.97 <=> ( $true
% 31.96/31.97 <=> v2397(VarCurr,bitIndex8) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addConditionBooleanCondShiftedRangesElseBranch_17,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ~ v2406(VarCurr)
% 31.96/31.97 => ( v2302(VarCurr,bitIndex6)
% 31.96/31.97 <=> $false ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addConditionBooleanCondShiftedRangesThenBranch_14,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2406(VarCurr)
% 31.96/31.97 => ( v2302(VarCurr,bitIndex6)
% 31.96/31.97 <=> $true ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_456,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2406(VarCurr)
% 31.96/31.97 <=> ( v2304(VarCurr)
% 31.96/31.97 & v2407(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addBitVectorEqualityBitBlasted_92,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2407(VarCurr)
% 31.96/31.97 <=> ( $true
% 31.96/31.97 <=> v2397(VarCurr,bitIndex5) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addConditionBooleanCondShiftedRangesElseBranch_16,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ~ v2399(VarCurr)
% 31.96/31.97 => ( v2302(VarCurr,bitIndex3)
% 31.96/31.97 <=> $false ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addConditionBooleanCondShiftedRangesThenBranch_13,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2399(VarCurr)
% 31.96/31.97 => ( v2302(VarCurr,bitIndex3)
% 31.96/31.97 <=> $true ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_455,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2399(VarCurr)
% 31.96/31.97 <=> ( v2400(VarCurr)
% 31.96/31.97 & v2402(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addBitVectorEqualityBitBlasted_91,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2402(VarCurr)
% 31.96/31.97 <=> ( $true
% 31.96/31.97 <=> v2397(VarCurr,bitIndex2) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignmentInitValue_24,axiom,
% 31.96/31.97 ~ v2397(constB0,bitIndex11) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignmentInitValue_23,axiom,
% 31.96/31.97 ~ v2397(constB0,bitIndex10) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignmentInitValue_22,axiom,
% 31.96/31.97 ~ v2397(constB0,bitIndex8) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignmentInitValue_21,axiom,
% 31.96/31.97 ~ v2397(constB0,bitIndex7) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignmentInitValue_20,axiom,
% 31.96/31.97 ~ v2397(constB0,bitIndex5) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignmentInitValue_19,axiom,
% 31.96/31.97 ~ v2397(constB0,bitIndex4) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignmentInitValue_18,axiom,
% 31.96/31.97 ~ v2397(constB0,bitIndex2) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignmentInitValue_17,axiom,
% 31.96/31.97 ~ v2397(constB0,bitIndex1) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_483,axiom,
% 31.96/31.97 ~ bx00x00x00x00(bitIndex10) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_482,axiom,
% 31.96/31.97 ~ bx00x00x00x00(bitIndex9) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_481,axiom,
% 31.96/31.97 ~ bx00x00x00x00(bitIndex7) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_480,axiom,
% 31.96/31.97 ~ bx00x00x00x00(bitIndex6) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_479,axiom,
% 31.96/31.97 ~ bx00x00x00x00(bitIndex4) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_478,axiom,
% 31.96/31.97 ~ bx00x00x00x00(bitIndex3) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_477,axiom,
% 31.96/31.97 ~ bx00x00x00x00(bitIndex1) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_476,axiom,
% 31.96/31.97 ~ bx00x00x00x00(bitIndex0) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_454,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2400(VarCurr)
% 31.96/31.97 <=> ( v2365(VarCurr)
% 31.96/31.97 & v2304(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_501,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2304(VarCurr)
% 31.96/31.97 <=> v2306(VarCurr,bitIndex1) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_500,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2306(VarCurr,bitIndex1)
% 31.96/31.97 <=> v2394(VarCurr,bitIndex1) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesMultipleBits_6,axiom,
% 31.96/31.97 ! [VarCurr,B] :
% 31.96/31.97 ( range_1_0(B)
% 31.96/31.97 => ( v2394(VarCurr,B)
% 31.96/31.97 <=> ( v2308(VarCurr,B)
% 31.96/31.97 & v2395(VarCurr,B) ) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeUnaryOperator_210,axiom,
% 31.96/31.97 ! [VarCurr,B] :
% 31.96/31.97 ( range_1_0(B)
% 31.96/31.97 => ( v2395(VarCurr,B)
% 31.96/31.97 <=> ~ v2338(VarCurr,B) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorShiftedRanges_106,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2338(VarCurr,bitIndex1)
% 31.96/31.97 <=> ( v2338(VarCurr,bitIndex0)
% 31.96/31.97 | v2308(VarCurr,bitIndex0) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_499,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2308(VarCurr,bitIndex0)
% 31.96/31.97 <=> v2335(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_453,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2336(VarCurr)
% 31.96/31.97 <=> ( v2390(VarCurr)
% 31.96/31.97 & v2392(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeUnaryOperator_209,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ~ v2392(VarCurr)
% 31.96/31.97 <=> v2312(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_452,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2390(VarCurr)
% 31.96/31.97 <=> ( v2391(VarCurr)
% 31.96/31.97 & v2365(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_451,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2391(VarCurr)
% 31.96/31.97 <=> ( v2341(VarCurr)
% 31.96/31.97 <~> v2363(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_498,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2365(VarCurr)
% 31.96/31.97 <=> v2367(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_497,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2367(VarCurr)
% 31.96/31.97 <=> v2369(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorShiftedRanges_105,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2369(VarCurr)
% 31.96/31.97 <=> ( v2374(VarCurr)
% 31.96/31.97 | v2371(VarCurr,bitIndex15) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorShiftedRanges_104,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2374(VarCurr)
% 31.96/31.97 <=> ( v2375(VarCurr)
% 31.96/31.97 | v2371(VarCurr,bitIndex14) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorShiftedRanges_103,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2375(VarCurr)
% 31.96/31.97 <=> ( v2376(VarCurr)
% 31.96/31.97 | v2371(VarCurr,bitIndex13) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorShiftedRanges_102,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2376(VarCurr)
% 31.96/31.97 <=> ( v2377(VarCurr)
% 31.96/31.97 | v2371(VarCurr,bitIndex12) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorShiftedRanges_101,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2377(VarCurr)
% 31.96/31.97 <=> ( v2378(VarCurr)
% 31.96/31.97 | v2371(VarCurr,bitIndex11) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorShiftedRanges_100,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2378(VarCurr)
% 31.96/31.97 <=> ( v2379(VarCurr)
% 31.96/31.97 | v2371(VarCurr,bitIndex10) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorShiftedRanges_99,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2379(VarCurr)
% 31.96/31.97 <=> ( v2380(VarCurr)
% 31.96/31.97 | v2371(VarCurr,bitIndex9) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorShiftedRanges_98,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2380(VarCurr)
% 31.96/31.97 <=> ( v2381(VarCurr)
% 31.96/31.97 | v2371(VarCurr,bitIndex8) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorShiftedRanges_97,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2381(VarCurr)
% 31.96/31.97 <=> ( v2382(VarCurr)
% 31.96/31.97 | v2371(VarCurr,bitIndex7) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorShiftedRanges_96,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2382(VarCurr)
% 31.96/31.97 <=> ( v2383(VarCurr)
% 31.96/31.97 | v2371(VarCurr,bitIndex6) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorShiftedRanges_95,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2383(VarCurr)
% 31.96/31.97 <=> ( v2384(VarCurr)
% 31.96/31.97 | v2371(VarCurr,bitIndex5) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorShiftedRanges_94,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2384(VarCurr)
% 31.96/31.97 <=> ( v2385(VarCurr)
% 31.96/31.97 | v2371(VarCurr,bitIndex4) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorShiftedRanges_93,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2385(VarCurr)
% 31.96/31.97 <=> ( v2386(VarCurr)
% 31.96/31.97 | v2371(VarCurr,bitIndex3) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorShiftedRanges_92,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2386(VarCurr)
% 31.96/31.97 <=> ( v2387(VarCurr)
% 31.96/31.97 | v2371(VarCurr,bitIndex2) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorShiftedRanges_91,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2387(VarCurr)
% 31.96/31.97 <=> ( v2371(VarCurr,bitIndex0)
% 31.96/31.97 | v2371(VarCurr,bitIndex1) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignmentInitValueVector_27,axiom,
% 31.96/31.97 ! [B] :
% 31.96/31.97 ( range_15_0(B)
% 31.96/31.97 => ( v2371(constB0,B)
% 31.96/31.97 <=> $true ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_475,axiom,
% 31.96/31.97 b1111111111111111(bitIndex15) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_474,axiom,
% 31.96/31.97 b1111111111111111(bitIndex14) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_473,axiom,
% 31.96/31.97 b1111111111111111(bitIndex13) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_472,axiom,
% 31.96/31.97 b1111111111111111(bitIndex12) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_471,axiom,
% 31.96/31.97 b1111111111111111(bitIndex11) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_470,axiom,
% 31.96/31.97 b1111111111111111(bitIndex10) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_469,axiom,
% 31.96/31.97 b1111111111111111(bitIndex9) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_468,axiom,
% 31.96/31.97 b1111111111111111(bitIndex8) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_467,axiom,
% 31.96/31.97 b1111111111111111(bitIndex7) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_466,axiom,
% 31.96/31.97 b1111111111111111(bitIndex6) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_465,axiom,
% 31.96/31.97 b1111111111111111(bitIndex5) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_464,axiom,
% 31.96/31.97 b1111111111111111(bitIndex4) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_463,axiom,
% 31.96/31.97 b1111111111111111(bitIndex3) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_462,axiom,
% 31.96/31.97 b1111111111111111(bitIndex2) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_461,axiom,
% 31.96/31.97 b1111111111111111(bitIndex1) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_460,axiom,
% 31.96/31.97 b1111111111111111(bitIndex0) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_496,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2341(VarCurr)
% 31.96/31.97 <=> v2343(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_495,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2343(VarCurr)
% 31.96/31.97 <=> v2345(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_494,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2345(VarCurr)
% 31.96/31.97 <=> v2347(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_493,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2347(VarCurr)
% 31.96/31.97 <=> v2349(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_492,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2349(VarCurr)
% 31.96/31.97 <=> v2351(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_491,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2351(VarCurr)
% 31.96/31.97 <=> v2353(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_490,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2353(VarCurr)
% 31.96/31.97 <=> v2355(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_489,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2355(VarCurr)
% 31.96/31.97 <=> v2357(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_488,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2357(VarCurr)
% 31.96/31.97 <=> v2359(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_487,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2359(VarCurr)
% 31.96/31.97 <=> v2361(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignmentInitValueVector_26,axiom,
% 31.96/31.97 ( v2361(constB0)
% 31.96/31.97 <=> $false ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_486,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2338(VarCurr,bitIndex0)
% 31.96/31.97 <=> $false ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_485,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2308(VarCurr,bitIndex1)
% 31.96/31.97 <=> v2335(VarCurr,bitIndex1) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_484,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2335(VarCurr,bitIndex0)
% 31.96/31.97 <=> v2336(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_483,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2335(VarCurr,bitIndex1)
% 31.96/31.97 <=> v2310(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_450,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2310(VarCurr)
% 31.96/31.97 <=> ( v2331(VarCurr)
% 31.96/31.97 & v2334(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeUnaryOperator_208,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ~ v2334(VarCurr)
% 31.96/31.97 <=> v2320(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_449,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2331(VarCurr)
% 31.96/31.97 <=> ( v2332(VarCurr)
% 31.96/31.97 & v2333(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeUnaryOperator_207,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ~ v2333(VarCurr)
% 31.96/31.97 <=> v2312(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeUnaryOperator_206,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ~ v2332(VarCurr)
% 31.96/31.97 <=> v129(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_448,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2320(VarCurr)
% 31.96/31.97 <=> ( v2328(VarCurr)
% 31.96/31.97 | v2326(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignmentInitValueVector_25,axiom,
% 31.96/31.97 ( v2326(constB0)
% 31.96/31.97 <=> $false ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_447,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2328(VarCurr)
% 31.96/31.97 <=> ( v2322(VarCurr)
% 31.96/31.97 & v2329(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeUnaryOperator_205,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ~ v2329(VarCurr)
% 31.96/31.97 <=> v2324(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignmentInitValueVector_24,axiom,
% 31.96/31.97 ( v2324(constB0)
% 31.96/31.97 <=> $false ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignmentInitValueVector_23,axiom,
% 31.96/31.97 ( v2322(constB0)
% 31.96/31.97 <=> $false ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_482,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2312(VarCurr)
% 31.96/31.97 <=> v2314(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_481,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2314(VarCurr)
% 31.96/31.97 <=> v2316(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_480,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2316(VarCurr)
% 31.96/31.97 <=> v2318(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_446,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2275(VarCurr)
% 31.96/31.97 <=> ( v2278(VarCurr)
% 31.96/31.97 & v875(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_445,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2278(VarCurr)
% 31.96/31.97 <=> ( v2279(VarCurr)
% 31.96/31.97 | v2288(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addBitVectorEqualityBitBlasted_90,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2288(VarCurr)
% 31.96/31.97 <=> ( ( v743(VarCurr,bitIndex3)
% 31.96/31.97 <=> $true )
% 31.96/31.97 & ( v743(VarCurr,bitIndex2)
% 31.96/31.97 <=> $true )
% 31.96/31.97 & ( v743(VarCurr,bitIndex1)
% 31.96/31.97 <=> $true )
% 31.96/31.97 & ( v743(VarCurr,bitIndex0)
% 31.96/31.97 <=> $true ) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_444,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2279(VarCurr)
% 31.96/31.97 <=> ( v2280(VarCurr)
% 31.96/31.97 | v2287(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addBitVectorEqualityBitBlasted_89,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2287(VarCurr)
% 31.96/31.97 <=> ( ( v743(VarCurr,bitIndex3)
% 31.96/31.97 <=> $true )
% 31.96/31.97 & ( v743(VarCurr,bitIndex2)
% 31.96/31.97 <=> $true )
% 31.96/31.97 & ( v743(VarCurr,bitIndex1)
% 31.96/31.97 <=> $true )
% 31.96/31.97 & ( v743(VarCurr,bitIndex0)
% 31.96/31.97 <=> $false ) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_459,axiom,
% 31.96/31.97 b1110(bitIndex3) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_458,axiom,
% 31.96/31.97 b1110(bitIndex2) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_457,axiom,
% 31.96/31.97 b1110(bitIndex1) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_456,axiom,
% 31.96/31.97 ~ b1110(bitIndex0) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_443,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2280(VarCurr)
% 31.96/31.97 <=> ( v2281(VarCurr)
% 31.96/31.97 | v2286(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addBitVectorEqualityBitBlasted_88,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2286(VarCurr)
% 31.96/31.97 <=> ( ( v743(VarCurr,bitIndex3)
% 31.96/31.97 <=> $true )
% 31.96/31.97 & ( v743(VarCurr,bitIndex2)
% 31.96/31.97 <=> $true )
% 31.96/31.97 & ( v743(VarCurr,bitIndex1)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v743(VarCurr,bitIndex0)
% 31.96/31.97 <=> $true ) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_442,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2281(VarCurr)
% 31.96/31.97 <=> ( v2282(VarCurr)
% 31.96/31.97 | v2285(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addBitVectorEqualityBitBlasted_87,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2285(VarCurr)
% 31.96/31.97 <=> ( ( v743(VarCurr,bitIndex3)
% 31.96/31.97 <=> $true )
% 31.96/31.97 & ( v743(VarCurr,bitIndex2)
% 31.96/31.97 <=> $true )
% 31.96/31.97 & ( v743(VarCurr,bitIndex1)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v743(VarCurr,bitIndex0)
% 31.96/31.97 <=> $false ) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_441,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2282(VarCurr)
% 31.96/31.97 <=> ( v2283(VarCurr)
% 31.96/31.97 | v2284(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addBitVectorEqualityBitBlasted_86,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2284(VarCurr)
% 31.96/31.97 <=> ( ( v743(VarCurr,bitIndex3)
% 31.96/31.97 <=> $true )
% 31.96/31.97 & ( v743(VarCurr,bitIndex2)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v743(VarCurr,bitIndex1)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v743(VarCurr,bitIndex0)
% 31.96/31.97 <=> $true ) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addBitVectorEqualityBitBlasted_85,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2283(VarCurr)
% 31.96/31.97 <=> ( ( v743(VarCurr,bitIndex3)
% 31.96/31.97 <=> $true )
% 31.96/31.97 & ( v743(VarCurr,bitIndex2)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v743(VarCurr,bitIndex1)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v743(VarCurr,bitIndex0)
% 31.96/31.97 <=> $false ) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_455,axiom,
% 31.96/31.97 b1000(bitIndex3) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_454,axiom,
% 31.96/31.97 ~ b1000(bitIndex2) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_453,axiom,
% 31.96/31.97 ~ b1000(bitIndex1) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_452,axiom,
% 31.96/31.97 ~ b1000(bitIndex0) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_440,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2265(VarCurr)
% 31.96/31.97 <=> ( v2267(VarCurr)
% 31.96/31.97 & v875(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_439,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2267(VarCurr)
% 31.96/31.97 <=> ( v2268(VarCurr)
% 31.96/31.97 | v2273(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addBitVectorEqualityBitBlasted_84,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2273(VarCurr)
% 31.96/31.97 <=> ( ( v743(VarCurr,bitIndex3)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v743(VarCurr,bitIndex2)
% 31.96/31.97 <=> $true )
% 31.96/31.97 & ( v743(VarCurr,bitIndex1)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v743(VarCurr,bitIndex0)
% 31.96/31.97 <=> $true ) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_438,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2268(VarCurr)
% 31.96/31.97 <=> ( v2269(VarCurr)
% 31.96/31.97 | v2272(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addBitVectorEqualityBitBlasted_83,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2272(VarCurr)
% 31.96/31.97 <=> ( ( v743(VarCurr,bitIndex3)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v743(VarCurr,bitIndex2)
% 31.96/31.97 <=> $true )
% 31.96/31.97 & ( v743(VarCurr,bitIndex1)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v743(VarCurr,bitIndex0)
% 31.96/31.97 <=> $false ) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_437,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2269(VarCurr)
% 31.96/31.97 <=> ( v2270(VarCurr)
% 31.96/31.97 | v2271(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addBitVectorEqualityBitBlasted_82,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2271(VarCurr)
% 31.96/31.97 <=> ( ( v743(VarCurr,bitIndex3)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v743(VarCurr,bitIndex2)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v743(VarCurr,bitIndex1)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v743(VarCurr,bitIndex0)
% 31.96/31.97 <=> $true ) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addBitVectorEqualityBitBlasted_81,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2270(VarCurr)
% 31.96/31.97 <=> ( ( v743(VarCurr,bitIndex3)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v743(VarCurr,bitIndex2)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v743(VarCurr,bitIndex1)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v743(VarCurr,bitIndex0)
% 31.96/31.97 <=> $false ) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_479,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v1908(VarCurr)
% 31.96/31.97 <=> v1910(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_478,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v1910(VarCurr)
% 31.96/31.97 <=> v1912(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_477,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v1912(VarCurr)
% 31.96/31.97 <=> v1914(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_476,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v1914(VarCurr)
% 31.96/31.97 <=> v1916(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_475,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v1916(VarCurr)
% 31.96/31.97 <=> v1918(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_474,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v1918(VarCurr,bitIndex0)
% 31.96/31.97 <=> v1920(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_473,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v1920(VarCurr,bitIndex0)
% 31.96/31.97 <=> v1922(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_472,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v1922(VarCurr,bitIndex0)
% 31.96/31.97 <=> v1924(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_471,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v1924(VarCurr,bitIndex0)
% 31.96/31.97 <=> v1926(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_470,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v1926(VarCurr,bitIndex0)
% 31.96/31.97 <=> v1928(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_469,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v1928(VarCurr,bitIndex0)
% 31.96/31.97 <=> v1930(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addCaseBooleanConditionEqualRanges1_23,axiom,
% 31.96/31.97 ! [VarNext,VarCurr] :
% 31.96/31.97 ( nextState(VarCurr,VarNext)
% 31.96/31.97 => ( ~ v2214(VarNext)
% 31.96/31.97 => ( v1930(VarNext)
% 31.96/31.97 <=> v1930(VarCurr) ) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addCaseBooleanConditionEqualRanges0_35,axiom,
% 31.96/31.97 ! [VarNext] :
% 31.96/31.97 ( v2214(VarNext)
% 31.96/31.97 => ( v1930(VarNext)
% 31.96/31.97 <=> v2249(VarNext) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_468,axiom,
% 31.96/31.97 ! [VarNext,VarCurr] :
% 31.96/31.97 ( nextState(VarCurr,VarNext)
% 31.96/31.97 => ( v2249(VarNext)
% 31.96/31.97 <=> v2247(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addParallelCaseBooleanConditionEqualRanges1_17,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ~ v1932(VarCurr)
% 31.96/31.97 => ( v2247(VarCurr)
% 31.96/31.97 <=> v2250(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addParallelCaseBooleanConditionEqualRanges0_17,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v1932(VarCurr)
% 31.96/31.97 => ( v2247(VarCurr)
% 31.96/31.97 <=> v1955(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addParallelCaseBooleanConditionEqualRanges1_16,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ~ v2227(VarCurr)
% 31.96/31.97 => ( v2250(VarCurr)
% 31.96/31.97 <=> v2203(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addParallelCaseBooleanConditionEqualRanges0_16,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2227(VarCurr)
% 31.96/31.97 => ( v2250(VarCurr)
% 31.96/31.97 <=> v2251(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addParallelCaseBooleanConditionEqualRanges2_6,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ( ~ v2230(VarCurr)
% 31.96/31.97 & ~ v2232(VarCurr) )
% 31.96/31.97 => ( v2251(VarCurr)
% 31.96/31.97 <=> v2255(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addParallelCaseBooleanConditionEqualRanges1_15,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2232(VarCurr)
% 31.96/31.97 => ( v2251(VarCurr)
% 31.96/31.97 <=> v2254(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addParallelCaseBooleanConditionEqualRanges0_15,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2230(VarCurr)
% 31.96/31.97 => ( v2251(VarCurr)
% 31.96/31.97 <=> v2252(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addParallelCaseBooleanConditionEqualRanges1_14,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ~ v2240(VarCurr)
% 31.96/31.97 => ( v2255(VarCurr)
% 31.96/31.97 <=> v2203(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addParallelCaseBooleanConditionEqualRanges0_14,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2240(VarCurr)
% 31.96/31.97 => ( v2255(VarCurr)
% 31.96/31.97 <=> $true ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addParallelCaseBooleanConditionEqualRanges1_13,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ~ v2234(VarCurr)
% 31.96/31.97 => ( v2254(VarCurr)
% 31.96/31.97 <=> v2203(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addParallelCaseBooleanConditionEqualRanges0_13,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2234(VarCurr)
% 31.96/31.97 => ( v2254(VarCurr)
% 31.96/31.97 <=> $false ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(aaddConditionBooleanCondEqualRangesElseBranch_63,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ~ v2253(VarCurr)
% 31.96/31.97 => ( v2252(VarCurr)
% 31.96/31.97 <=> $false ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addConditionBooleanCondEqualRangesThenBranch_66,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2253(VarCurr)
% 31.96/31.97 => ( v2252(VarCurr)
% 31.96/31.97 <=> $true ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addBitVectorEqualityBitBlasted_80,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2253(VarCurr)
% 31.96/31.97 <=> ( v1964(VarCurr)
% 31.96/31.97 <=> $true ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_436,axiom,
% 31.96/31.97 ! [VarNext,VarCurr] :
% 31.96/31.97 ( nextState(VarCurr,VarNext)
% 31.96/31.97 => ( v2214(VarNext)
% 31.96/31.97 <=> ( v2215(VarNext)
% 31.96/31.97 & v2224(VarNext) ) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_467,axiom,
% 31.96/31.97 ! [VarNext,VarCurr] :
% 31.96/31.97 ( nextState(VarCurr,VarNext)
% 31.96/31.97 => ( v2224(VarNext)
% 31.96/31.97 <=> v2222(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_435,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2222(VarCurr)
% 31.96/31.97 <=> ( v1932(VarCurr)
% 31.96/31.97 | v2225(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_434,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2225(VarCurr)
% 31.96/31.97 <=> ( v2226(VarCurr)
% 31.96/31.97 & v2246(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeUnaryOperator_204,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ~ v2246(VarCurr)
% 31.96/31.97 <=> v1932(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_433,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2226(VarCurr)
% 31.96/31.97 <=> ( v2227(VarCurr)
% 31.96/31.97 | v2244(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_432,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2244(VarCurr)
% 31.96/31.97 <=> ( v2039(VarCurr)
% 31.96/31.97 & v2245(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeUnaryOperator_203,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ~ v2245(VarCurr)
% 31.96/31.97 <=> v2043(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_431,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2227(VarCurr)
% 31.96/31.97 <=> ( v2228(VarCurr)
% 31.96/31.97 & v2043(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_430,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2228(VarCurr)
% 31.96/31.97 <=> ( v2229(VarCurr)
% 31.96/31.97 | v2238(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_429,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2238(VarCurr)
% 31.96/31.97 <=> ( v2239(VarCurr)
% 31.96/31.97 & v2243(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addBitVectorEqualityBitBlasted_79,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2243(VarCurr)
% 31.96/31.97 <=> ( ( v2231(VarCurr,bitIndex2)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2231(VarCurr,bitIndex1)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2231(VarCurr,bitIndex0)
% 31.96/31.97 <=> $true ) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_451,axiom,
% 31.96/31.97 ~ b001(bitIndex2) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_450,axiom,
% 31.96/31.97 ~ b001(bitIndex1) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_449,axiom,
% 31.96/31.97 b001(bitIndex0) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_428,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2239(VarCurr)
% 31.96/31.97 <=> ( v2240(VarCurr)
% 31.96/31.97 | v2241(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_427,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2241(VarCurr)
% 31.96/31.97 <=> ( v2039(VarCurr)
% 31.96/31.97 & v2242(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeUnaryOperator_202,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ~ v2242(VarCurr)
% 31.96/31.97 <=> v2240(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addBitVectorEqualityBitBlasted_78,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2240(VarCurr)
% 31.96/31.97 <=> ( v1964(VarCurr)
% 31.96/31.97 <=> $true ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_426,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2229(VarCurr)
% 31.96/31.97 <=> ( v2230(VarCurr)
% 31.96/31.97 | v2232(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_425,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2232(VarCurr)
% 31.96/31.97 <=> ( v2233(VarCurr)
% 31.96/31.97 & v2237(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addBitVectorEqualityBitBlasted_77,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2237(VarCurr)
% 31.96/31.97 <=> ( ( v2231(VarCurr,bitIndex2)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2231(VarCurr,bitIndex1)
% 31.96/31.97 <=> $true )
% 31.96/31.97 & ( v2231(VarCurr,bitIndex0)
% 31.96/31.97 <=> $false ) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_448,axiom,
% 31.96/31.97 ~ b010(bitIndex2) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_447,axiom,
% 31.96/31.97 b010(bitIndex1) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_446,axiom,
% 31.96/31.97 ~ b010(bitIndex0) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_424,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2233(VarCurr)
% 31.96/31.97 <=> ( v2234(VarCurr)
% 31.96/31.97 | v2235(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_423,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2235(VarCurr)
% 31.96/31.97 <=> ( v2039(VarCurr)
% 31.96/31.97 & v2236(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeUnaryOperator_201,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ~ v2236(VarCurr)
% 31.96/31.97 <=> v2234(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addBitVectorEqualityBitBlasted_76,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2234(VarCurr)
% 31.96/31.97 <=> ( v1964(VarCurr)
% 31.96/31.97 <=> $true ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addBitVectorEqualityBitBlasted_75,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2230(VarCurr)
% 31.96/31.97 <=> ( ( v2231(VarCurr,bitIndex2)
% 31.96/31.97 <=> $true )
% 31.96/31.97 & ( v2231(VarCurr,bitIndex1)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2231(VarCurr,bitIndex0)
% 31.96/31.97 <=> $false ) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_445,axiom,
% 31.96/31.97 b100(bitIndex2) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_444,axiom,
% 31.96/31.97 ~ b100(bitIndex1) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_443,axiom,
% 31.96/31.97 ~ b100(bitIndex0) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_466,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2231(VarCurr,bitIndex0)
% 31.96/31.97 <=> v1961(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_465,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2231(VarCurr,bitIndex1)
% 31.96/31.97 <=> v1959(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_464,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2231(VarCurr,bitIndex2)
% 31.96/31.97 <=> v1957(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_422,axiom,
% 31.96/31.97 ! [VarNext,VarCurr] :
% 31.96/31.97 ( nextState(VarCurr,VarNext)
% 31.96/31.97 => ( v2215(VarNext)
% 31.96/31.97 <=> ( v2216(VarNext)
% 31.96/31.97 & v2205(VarNext) ) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeUnaryOperator_200,axiom,
% 31.96/31.97 ! [VarNext,VarCurr] :
% 31.96/31.97 ( nextState(VarCurr,VarNext)
% 31.96/31.97 => ( ~ v2216(VarNext)
% 31.96/31.97 <=> v2218(VarNext) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_463,axiom,
% 31.96/31.97 ! [VarNext,VarCurr] :
% 31.96/31.97 ( nextState(VarCurr,VarNext)
% 31.96/31.97 => ( v2218(VarNext)
% 31.96/31.97 <=> v2205(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_462,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2205(VarCurr)
% 31.96/31.97 <=> v2207(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_461,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2207(VarCurr)
% 31.96/31.97 <=> v2209(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_460,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2209(VarCurr)
% 31.96/31.97 <=> v2211(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_459,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2211(VarCurr)
% 31.96/31.97 <=> v2015(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_458,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2203(VarCurr)
% 31.96/31.97 <=> $false ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_457,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2043(VarCurr)
% 31.96/31.97 <=> v2045(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_456,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2045(VarCurr)
% 31.96/31.97 <=> v2047(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_455,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2047(VarCurr)
% 31.96/31.97 <=> v2049(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_421,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2049(VarCurr)
% 31.96/31.97 <=> ( v2051(VarCurr)
% 31.96/31.97 & v2151(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_454,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2151(VarCurr)
% 31.96/31.97 <=> v2153(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_453,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2153(VarCurr)
% 31.96/31.97 <=> v2155(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_452,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2155(VarCurr)
% 31.96/31.97 <=> v2157(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_451,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2157(VarCurr)
% 31.96/31.97 <=> v2159(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_450,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2159(VarCurr)
% 31.96/31.97 <=> v2161(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_449,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2161(VarCurr)
% 31.96/31.97 <=> v2163(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addCaseBooleanConditionEqualRanges1_22,axiom,
% 31.96/31.97 ! [VarNext,VarCurr] :
% 31.96/31.97 ( nextState(VarCurr,VarNext)
% 31.96/31.97 => ( ~ v2190(VarNext)
% 31.96/31.97 => ( v2163(VarNext)
% 31.96/31.97 <=> v2163(VarCurr) ) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addCaseBooleanConditionEqualRanges0_34,axiom,
% 31.96/31.97 ! [VarNext] :
% 31.96/31.97 ( v2190(VarNext)
% 31.96/31.97 => ( v2163(VarNext)
% 31.96/31.97 <=> v2198(VarNext) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_448,axiom,
% 31.96/31.97 ! [VarNext,VarCurr] :
% 31.96/31.97 ( nextState(VarCurr,VarNext)
% 31.96/31.97 => ( v2198(VarNext)
% 31.96/31.97 <=> v2196(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(aaddConditionBooleanCondEqualRangesElseBranch_62,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ~ v2035(VarCurr)
% 31.96/31.97 => ( v2196(VarCurr)
% 31.96/31.97 <=> v2165(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addConditionBooleanCondEqualRangesThenBranch_65,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2035(VarCurr)
% 31.96/31.97 => ( v2196(VarCurr)
% 31.96/31.97 <=> $false ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_420,axiom,
% 31.96/31.97 ! [VarNext,VarCurr] :
% 31.96/31.97 ( nextState(VarCurr,VarNext)
% 31.96/31.97 => ( v2190(VarNext)
% 31.96/31.97 <=> v2191(VarNext) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_419,axiom,
% 31.96/31.97 ! [VarNext,VarCurr] :
% 31.96/31.97 ( nextState(VarCurr,VarNext)
% 31.96/31.97 => ( v2191(VarNext)
% 31.96/31.97 <=> ( v2193(VarNext)
% 31.96/31.97 & v2013(VarNext) ) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeUnaryOperator_199,axiom,
% 31.96/31.97 ! [VarNext,VarCurr] :
% 31.96/31.97 ( nextState(VarCurr,VarNext)
% 31.96/31.97 => ( ~ v2193(VarNext)
% 31.96/31.97 <=> v2028(VarNext) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignmentInitValueVector_22,axiom,
% 31.96/31.97 ( v2163(constB0)
% 31.96/31.97 <=> $false ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_447,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2165(VarCurr)
% 31.96/31.97 <=> v2167(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_446,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2167(VarCurr)
% 31.96/31.97 <=> v2169(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_445,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2169(VarCurr)
% 31.96/31.97 <=> v2171(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_444,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2171(VarCurr)
% 31.96/31.97 <=> v2173(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_443,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2173(VarCurr)
% 31.96/31.97 <=> v2175(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_442,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2175(VarCurr)
% 31.96/31.97 <=> v2177(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_441,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2177(VarCurr)
% 31.96/31.97 <=> v2179(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_440,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2179(VarCurr)
% 31.96/31.97 <=> v2181(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_439,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2181(VarCurr)
% 31.96/31.97 <=> v2183(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_438,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2183(VarCurr)
% 31.96/31.97 <=> v2185(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_437,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2185(VarCurr)
% 31.96/31.97 <=> v2187(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignmentInitValueVector_21,axiom,
% 31.96/31.97 ( v2187(constB0)
% 31.96/31.97 <=> $false ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_436,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2051(VarCurr)
% 31.96/31.97 <=> v2053(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_435,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2053(VarCurr)
% 31.96/31.97 <=> v2055(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_434,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2055(VarCurr)
% 31.96/31.97 <=> v2057(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_433,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2057(VarCurr)
% 31.96/31.97 <=> v2059(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_432,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2059(VarCurr)
% 31.96/31.97 <=> v2061(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addCaseBooleanConditionEqualRanges1_21,axiom,
% 31.96/31.97 ! [VarNext,VarCurr] :
% 31.96/31.97 ( nextState(VarCurr,VarNext)
% 31.96/31.97 => ( ~ v2136(VarNext)
% 31.96/31.97 => ( v2061(VarNext)
% 31.96/31.97 <=> v2061(VarCurr) ) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addCaseBooleanConditionEqualRanges0_33,axiom,
% 31.96/31.97 ! [VarNext] :
% 31.96/31.97 ( v2136(VarNext)
% 31.96/31.97 => ( v2061(VarNext)
% 31.96/31.97 <=> v2144(VarNext) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_431,axiom,
% 31.96/31.97 ! [VarNext,VarCurr] :
% 31.96/31.97 ( nextState(VarCurr,VarNext)
% 31.96/31.97 => ( v2144(VarNext)
% 31.96/31.97 <=> v2142(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(aaddConditionBooleanCondEqualRangesElseBranch_61,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ~ v2145(VarCurr)
% 31.96/31.97 => ( v2142(VarCurr)
% 31.96/31.97 <=> v2146(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addConditionBooleanCondEqualRangesThenBranch_64,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2145(VarCurr)
% 31.96/31.97 => ( v2142(VarCurr)
% 31.96/31.97 <=> $false ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_418,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2146(VarCurr)
% 31.96/31.97 <=> ( v2147(VarCurr)
% 31.96/31.97 & v2065(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_417,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2147(VarCurr)
% 31.96/31.97 <=> ( $true
% 31.96/31.97 & v2063(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignmentInitValueVector_20,axiom,
% 31.96/31.97 ( v2063(constB0)
% 31.96/31.97 <=> $false ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeUnaryOperator_198,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ~ v2145(VarCurr)
% 31.96/31.97 <=> v1984(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_416,axiom,
% 31.96/31.97 ! [VarNext,VarCurr] :
% 31.96/31.97 ( nextState(VarCurr,VarNext)
% 31.96/31.97 => ( v2136(VarNext)
% 31.96/31.97 <=> v2137(VarNext) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeBinaryOperatorEqualRangesSingleBits_415,axiom,
% 31.96/31.97 ! [VarNext,VarCurr] :
% 31.96/31.97 ( nextState(VarCurr,VarNext)
% 31.96/31.97 => ( v2137(VarNext)
% 31.96/31.97 <=> ( v2138(VarNext)
% 31.96/31.97 & v2013(VarNext) ) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeUnaryOperator_197,axiom,
% 31.96/31.97 ! [VarNext,VarCurr] :
% 31.96/31.97 ( nextState(VarCurr,VarNext)
% 31.96/31.97 => ( ~ v2138(VarNext)
% 31.96/31.97 <=> v2028(VarNext) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignmentInitValueVector_19,axiom,
% 31.96/31.97 ( v2061(constB0)
% 31.96/31.97 <=> $false ) ).
% 31.96/31.97
% 31.96/31.97 fof(aaddConditionBooleanCondEqualRangesElseBranch_60,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ~ v2128(VarCurr)
% 31.96/31.97 => ( v2065(VarCurr)
% 31.96/31.97 <=> v2129(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addConditionBooleanCondEqualRangesThenBranch_63,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2128(VarCurr)
% 31.96/31.97 => ( v2065(VarCurr)
% 31.96/31.97 <=> $false ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addParallelCaseBooleanConditionEqualRanges2_5,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ( ~ v2130(VarCurr)
% 31.96/31.97 & ~ v2132(VarCurr) )
% 31.96/31.97 => ( v2129(VarCurr)
% 31.96/31.97 <=> $false ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addParallelCaseBooleanConditionEqualRanges1_12,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2132(VarCurr)
% 31.96/31.97 => ( v2129(VarCurr)
% 31.96/31.97 <=> v2133(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addParallelCaseBooleanConditionEqualRanges0_12,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2130(VarCurr)
% 31.96/31.97 => ( v2129(VarCurr)
% 31.96/31.97 <=> v2131(VarCurr) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addBitVectorEqualityBitBlasted_74,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2133(VarCurr)
% 31.96/31.97 <=> ( ( v2101(VarCurr,bitIndex26)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex25)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex24)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex23)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex22)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex21)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex20)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex19)
% 31.96/31.97 <=> $true )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex18)
% 31.96/31.97 <=> $true )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex17)
% 31.96/31.97 <=> $true )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex16)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex15)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex14)
% 31.96/31.97 <=> $true )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex13)
% 31.96/31.97 <=> $true )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex12)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex11)
% 31.96/31.97 <=> $true )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex10)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex9)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex8)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex7)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex6)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex5)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex4)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex3)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex2)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex1)
% 31.96/31.97 <=> $true )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex0)
% 31.96/31.97 <=> $true ) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_442,axiom,
% 31.96/31.97 ~ b000000011100110100000000011(bitIndex26) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_441,axiom,
% 31.96/31.97 ~ b000000011100110100000000011(bitIndex25) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_440,axiom,
% 31.96/31.97 ~ b000000011100110100000000011(bitIndex24) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_439,axiom,
% 31.96/31.97 ~ b000000011100110100000000011(bitIndex23) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_438,axiom,
% 31.96/31.97 ~ b000000011100110100000000011(bitIndex22) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_437,axiom,
% 31.96/31.97 ~ b000000011100110100000000011(bitIndex21) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_436,axiom,
% 31.96/31.97 ~ b000000011100110100000000011(bitIndex20) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_435,axiom,
% 31.96/31.97 b000000011100110100000000011(bitIndex19) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_434,axiom,
% 31.96/31.97 b000000011100110100000000011(bitIndex18) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_433,axiom,
% 31.96/31.97 b000000011100110100000000011(bitIndex17) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_432,axiom,
% 31.96/31.97 ~ b000000011100110100000000011(bitIndex16) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_431,axiom,
% 31.96/31.97 ~ b000000011100110100000000011(bitIndex15) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_430,axiom,
% 31.96/31.97 b000000011100110100000000011(bitIndex14) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_429,axiom,
% 31.96/31.97 b000000011100110100000000011(bitIndex13) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_428,axiom,
% 31.96/31.97 ~ b000000011100110100000000011(bitIndex12) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_427,axiom,
% 31.96/31.97 b000000011100110100000000011(bitIndex11) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_426,axiom,
% 31.96/31.97 ~ b000000011100110100000000011(bitIndex10) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_425,axiom,
% 31.96/31.97 ~ b000000011100110100000000011(bitIndex9) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_424,axiom,
% 31.96/31.97 ~ b000000011100110100000000011(bitIndex8) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_423,axiom,
% 31.96/31.97 ~ b000000011100110100000000011(bitIndex7) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_422,axiom,
% 31.96/31.97 ~ b000000011100110100000000011(bitIndex6) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_421,axiom,
% 31.96/31.97 ~ b000000011100110100000000011(bitIndex5) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_420,axiom,
% 31.96/31.97 ~ b000000011100110100000000011(bitIndex4) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_419,axiom,
% 31.96/31.97 ~ b000000011100110100000000011(bitIndex3) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_418,axiom,
% 31.96/31.97 ~ b000000011100110100000000011(bitIndex2) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_417,axiom,
% 31.96/31.97 b000000011100110100000000011(bitIndex1) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_416,axiom,
% 31.96/31.97 b000000011100110100000000011(bitIndex0) ).
% 31.96/31.97
% 31.96/31.97 fof(addBitVectorEqualityBitBlasted_73,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2132(VarCurr)
% 31.96/31.97 <=> ( v2091(VarCurr)
% 31.96/31.97 <=> $true ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addBitVectorEqualityBitBlasted_72,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2131(VarCurr)
% 31.96/31.97 <=> ( ( v2101(VarCurr,bitIndex26)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex25)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex24)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex23)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex22)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex21)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex20)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex19)
% 31.96/31.97 <=> $true )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex18)
% 31.96/31.97 <=> $true )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex17)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex16)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex15)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex14)
% 31.96/31.97 <=> $true )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex13)
% 31.96/31.97 <=> $true )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex12)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex11)
% 31.96/31.97 <=> $true )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex10)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex9)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex8)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex7)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex6)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex5)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex4)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex3)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex2)
% 31.96/31.97 <=> $false )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex1)
% 31.96/31.97 <=> $true )
% 31.96/31.97 & ( v2101(VarCurr,bitIndex0)
% 31.96/31.97 <=> $true ) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_415,axiom,
% 31.96/31.97 ~ b000000011000110100000000011(bitIndex26) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_414,axiom,
% 31.96/31.97 ~ b000000011000110100000000011(bitIndex25) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_413,axiom,
% 31.96/31.97 ~ b000000011000110100000000011(bitIndex24) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_412,axiom,
% 31.96/31.97 ~ b000000011000110100000000011(bitIndex23) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_411,axiom,
% 31.96/31.97 ~ b000000011000110100000000011(bitIndex22) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_410,axiom,
% 31.96/31.97 ~ b000000011000110100000000011(bitIndex21) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_409,axiom,
% 31.96/31.97 ~ b000000011000110100000000011(bitIndex20) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_408,axiom,
% 31.96/31.97 b000000011000110100000000011(bitIndex19) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_407,axiom,
% 31.96/31.97 b000000011000110100000000011(bitIndex18) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_406,axiom,
% 31.96/31.97 ~ b000000011000110100000000011(bitIndex17) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_405,axiom,
% 31.96/31.97 ~ b000000011000110100000000011(bitIndex16) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_404,axiom,
% 31.96/31.97 ~ b000000011000110100000000011(bitIndex15) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_403,axiom,
% 31.96/31.97 b000000011000110100000000011(bitIndex14) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_402,axiom,
% 31.96/31.97 b000000011000110100000000011(bitIndex13) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_401,axiom,
% 31.96/31.97 ~ b000000011000110100000000011(bitIndex12) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_400,axiom,
% 31.96/31.97 b000000011000110100000000011(bitIndex11) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_399,axiom,
% 31.96/31.97 ~ b000000011000110100000000011(bitIndex10) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_398,axiom,
% 31.96/31.97 ~ b000000011000110100000000011(bitIndex9) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_397,axiom,
% 31.96/31.97 ~ b000000011000110100000000011(bitIndex8) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_396,axiom,
% 31.96/31.97 ~ b000000011000110100000000011(bitIndex7) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_395,axiom,
% 31.96/31.97 ~ b000000011000110100000000011(bitIndex6) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_394,axiom,
% 31.96/31.97 ~ b000000011000110100000000011(bitIndex5) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_393,axiom,
% 31.96/31.97 ~ b000000011000110100000000011(bitIndex4) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_392,axiom,
% 31.96/31.97 ~ b000000011000110100000000011(bitIndex3) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_391,axiom,
% 31.96/31.97 ~ b000000011000110100000000011(bitIndex2) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_390,axiom,
% 31.96/31.97 b000000011000110100000000011(bitIndex1) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_389,axiom,
% 31.96/31.97 b000000011000110100000000011(bitIndex0) ).
% 31.96/31.97
% 31.96/31.97 fof(addBitVectorEqualityBitBlasted_71,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2130(VarCurr)
% 31.96/31.97 <=> ( v2091(VarCurr)
% 31.96/31.97 <=> $false ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(writeUnaryOperator_196,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( ~ v2128(VarCurr)
% 31.96/31.97 <=> v2067(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_430,axiom,
% 31.96/31.97 ! [VarCurr,B] :
% 31.96/31.97 ( range_26_0(B)
% 31.96/31.97 => ( v2101(VarCurr,B)
% 31.96/31.97 <=> v2103(VarCurr,B) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_429,axiom,
% 31.96/31.97 ! [VarCurr,B] :
% 31.96/31.97 ( range_26_0(B)
% 31.96/31.97 => ( v2103(VarCurr,B)
% 31.96/31.97 <=> v2105(VarCurr,B) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_428,axiom,
% 31.96/31.97 ! [VarCurr,B] :
% 31.96/31.97 ( range_26_0(B)
% 31.96/31.97 => ( v2105(VarCurr,B)
% 31.96/31.97 <=> v2107(VarCurr,B) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_427,axiom,
% 31.96/31.97 ! [VarCurr,B] :
% 31.96/31.97 ( range_26_0(B)
% 31.96/31.97 => ( v2107(VarCurr,B)
% 31.96/31.97 <=> v2109(VarCurr,B) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_426,axiom,
% 31.96/31.97 ! [VarCurr,B] :
% 31.96/31.97 ( range_26_0(B)
% 31.96/31.97 => ( v2109(VarCurr,B)
% 31.96/31.97 <=> v2111(VarCurr,B) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_425,axiom,
% 31.96/31.97 ! [VarCurr,B] :
% 31.96/31.97 ( range_26_0(B)
% 31.96/31.97 => ( v2111(VarCurr,B)
% 31.96/31.97 <=> v2113(VarCurr,B) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_424,axiom,
% 31.96/31.97 ! [VarCurr,B] :
% 31.96/31.97 ( range_26_0(B)
% 31.96/31.97 => ( v2113(VarCurr,B)
% 31.96/31.97 <=> v2115(VarCurr,B) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_423,axiom,
% 31.96/31.97 ! [VarCurr,B] :
% 31.96/31.97 ( range_26_0(B)
% 31.96/31.97 => ( v2115(VarCurr,B)
% 31.96/31.97 <=> v2117(VarCurr,B) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_422,axiom,
% 31.96/31.97 ! [VarCurr,B] :
% 31.96/31.97 ( range_26_0(B)
% 31.96/31.97 => ( v2117(VarCurr,B)
% 31.96/31.97 <=> v2119(VarCurr,B) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_421,axiom,
% 31.96/31.97 ! [VarCurr,B] :
% 31.96/31.97 ( range_26_0(B)
% 31.96/31.97 => ( v2119(VarCurr,B)
% 31.96/31.97 <=> v2121(VarCurr,B) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_420,axiom,
% 31.96/31.97 ! [VarCurr,B] :
% 31.96/31.97 ( range_26_0(B)
% 31.96/31.97 => ( v2121(VarCurr,B)
% 31.96/31.97 <=> v2123(VarCurr,B) ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignmentInitValueVector_18,axiom,
% 31.96/31.97 ! [B] :
% 31.96/31.97 ( range_26_0(B)
% 31.96/31.97 => ( v2123(constB0,B)
% 31.96/31.97 <=> $false ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(range_axiom_15,axiom,
% 31.96/31.97 ! [B] :
% 31.96/31.97 ( range_26_0(B)
% 31.96/31.97 <=> ( $false
% 31.96/31.97 | bitIndex0 = B
% 31.96/31.97 | bitIndex1 = B
% 31.96/31.97 | bitIndex2 = B
% 31.96/31.97 | bitIndex3 = B
% 31.96/31.97 | bitIndex4 = B
% 31.96/31.97 | bitIndex5 = B
% 31.96/31.97 | bitIndex6 = B
% 31.96/31.97 | bitIndex7 = B
% 31.96/31.97 | bitIndex8 = B
% 31.96/31.97 | bitIndex9 = B
% 31.96/31.97 | bitIndex10 = B
% 31.96/31.97 | bitIndex11 = B
% 31.96/31.97 | bitIndex12 = B
% 31.96/31.97 | bitIndex13 = B
% 31.96/31.97 | bitIndex14 = B
% 31.96/31.97 | bitIndex15 = B
% 31.96/31.97 | bitIndex16 = B
% 31.96/31.97 | bitIndex17 = B
% 31.96/31.97 | bitIndex18 = B
% 31.96/31.97 | bitIndex19 = B
% 31.96/31.97 | bitIndex20 = B
% 31.96/31.97 | bitIndex21 = B
% 31.96/31.97 | bitIndex22 = B
% 31.96/31.97 | bitIndex23 = B
% 31.96/31.97 | bitIndex24 = B
% 31.96/31.97 | bitIndex25 = B
% 31.96/31.97 | bitIndex26 = B ) ) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_388,axiom,
% 31.96/31.97 ~ b000000000000000000000000000(bitIndex26) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_387,axiom,
% 31.96/31.97 ~ b000000000000000000000000000(bitIndex25) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_386,axiom,
% 31.96/31.97 ~ b000000000000000000000000000(bitIndex24) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_385,axiom,
% 31.96/31.97 ~ b000000000000000000000000000(bitIndex23) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_384,axiom,
% 31.96/31.97 ~ b000000000000000000000000000(bitIndex22) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_383,axiom,
% 31.96/31.97 ~ b000000000000000000000000000(bitIndex21) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_382,axiom,
% 31.96/31.97 ~ b000000000000000000000000000(bitIndex20) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_381,axiom,
% 31.96/31.97 ~ b000000000000000000000000000(bitIndex19) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_380,axiom,
% 31.96/31.97 ~ b000000000000000000000000000(bitIndex18) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_379,axiom,
% 31.96/31.97 ~ b000000000000000000000000000(bitIndex17) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_378,axiom,
% 31.96/31.97 ~ b000000000000000000000000000(bitIndex16) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_377,axiom,
% 31.96/31.97 ~ b000000000000000000000000000(bitIndex15) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_376,axiom,
% 31.96/31.97 ~ b000000000000000000000000000(bitIndex14) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_375,axiom,
% 31.96/31.97 ~ b000000000000000000000000000(bitIndex13) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_374,axiom,
% 31.96/31.97 ~ b000000000000000000000000000(bitIndex12) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_373,axiom,
% 31.96/31.97 ~ b000000000000000000000000000(bitIndex11) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_372,axiom,
% 31.96/31.97 ~ b000000000000000000000000000(bitIndex10) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_371,axiom,
% 31.96/31.97 ~ b000000000000000000000000000(bitIndex9) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_370,axiom,
% 31.96/31.97 ~ b000000000000000000000000000(bitIndex8) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_369,axiom,
% 31.96/31.97 ~ b000000000000000000000000000(bitIndex7) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_368,axiom,
% 31.96/31.97 ~ b000000000000000000000000000(bitIndex6) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_367,axiom,
% 31.96/31.97 ~ b000000000000000000000000000(bitIndex5) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_366,axiom,
% 31.96/31.97 ~ b000000000000000000000000000(bitIndex4) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_365,axiom,
% 31.96/31.97 ~ b000000000000000000000000000(bitIndex3) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_364,axiom,
% 31.96/31.97 ~ b000000000000000000000000000(bitIndex2) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_363,axiom,
% 31.96/31.97 ~ b000000000000000000000000000(bitIndex1) ).
% 31.96/31.97
% 31.96/31.97 fof(bitBlastConstant_362,axiom,
% 31.96/31.97 ~ b000000000000000000000000000(bitIndex0) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_419,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2091(VarCurr)
% 31.96/31.97 <=> v2093(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_418,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2093(VarCurr)
% 31.96/31.97 <=> v2095(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_417,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2095(VarCurr)
% 31.96/31.97 <=> v2097(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_416,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2097(VarCurr)
% 31.96/31.97 <=> v2099(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_415,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2067(VarCurr)
% 31.96/31.97 <=> v2069(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_414,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2069(VarCurr)
% 31.96/31.97 <=> v2071(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_413,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2071(VarCurr)
% 31.96/31.97 <=> v2073(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_412,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2073(VarCurr)
% 31.96/31.97 <=> v2075(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_411,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2075(VarCurr)
% 31.96/31.97 <=> v2077(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_410,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2077(VarCurr)
% 31.96/31.97 <=> v2079(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_409,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2079(VarCurr)
% 31.96/31.97 <=> v2081(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_408,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2081(VarCurr)
% 31.96/31.97 <=> v2083(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_407,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2083(VarCurr)
% 31.96/31.97 <=> v2085(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_406,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2085(VarCurr)
% 31.96/31.97 <=> v2087(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_405,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2087(VarCurr)
% 31.96/31.97 <=> v2089(VarCurr) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignmentInitValueVector_17,axiom,
% 31.96/31.97 ( v2089(constB0)
% 31.96/31.97 <=> $true ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_404,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v2039(VarCurr)
% 31.96/31.97 <=> $false ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_403,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v1964(VarCurr)
% 31.96/31.97 <=> v1966(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_402,axiom,
% 31.96/31.97 ! [VarCurr] :
% 31.96/31.97 ( v1966(VarCurr,bitIndex0)
% 31.96/31.97 <=> v1968(VarCurr,bitIndex0) ) ).
% 31.96/31.97
% 31.96/31.97 fof(addAssignment_401,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1968(VarCurr,bitIndex0)
% 31.96/31.98 <=> v1970(VarCurr,bitIndex0) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_400,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1970(VarCurr,bitIndex0)
% 31.96/31.98 <=> v1972(VarCurr,bitIndex0) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_399,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1972(VarCurr,bitIndex0)
% 31.96/31.98 <=> v1974(VarCurr,bitIndex0) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_398,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1974(VarCurr,bitIndex0)
% 31.96/31.98 <=> v1976(VarCurr,bitIndex0) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_397,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1976(VarCurr,bitIndex0)
% 31.96/31.98 <=> v1978(VarCurr,bitIndex0) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_396,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1978(VarCurr,bitIndex0)
% 31.96/31.98 <=> v1980(VarCurr,bitIndex0) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_395,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1980(VarCurr,bitIndex0)
% 31.96/31.98 <=> v1982(VarCurr,bitIndex0) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_394,axiom,
% 31.96/31.98 ! [VarNext] :
% 31.96/31.98 ( v1982(VarNext,bitIndex0)
% 31.96/31.98 <=> v2023(VarNext,bitIndex0) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addCaseBooleanConditionEqualRanges1_20,axiom,
% 31.96/31.98 ! [VarNext,VarCurr] :
% 31.96/31.98 ( nextState(VarCurr,VarNext)
% 31.96/31.98 => ( ~ v2024(VarNext)
% 31.96/31.98 => ! [B] :
% 31.96/31.98 ( range_63_0(B)
% 31.96/31.98 => ( v2023(VarNext,B)
% 31.96/31.98 <=> v1982(VarCurr,B) ) ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addCaseBooleanConditionEqualRanges0_32,axiom,
% 31.96/31.98 ! [VarNext] :
% 31.96/31.98 ( v2024(VarNext)
% 31.96/31.98 => ! [B] :
% 31.96/31.98 ( range_63_0(B)
% 31.96/31.98 => ( v2023(VarNext,B)
% 31.96/31.98 <=> v2034(VarNext,B) ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_393,axiom,
% 31.96/31.98 ! [VarNext,VarCurr] :
% 31.96/31.98 ( nextState(VarCurr,VarNext)
% 31.96/31.98 => ! [B] :
% 31.96/31.98 ( range_63_0(B)
% 31.96/31.98 => ( v2034(VarNext,B)
% 31.96/31.98 <=> v2032(VarCurr,B) ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(aaddConditionBooleanCondEqualRangesElseBranch_59,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( ~ v2035(VarCurr)
% 31.96/31.98 => ! [B] :
% 31.96/31.98 ( range_63_0(B)
% 31.96/31.98 => ( v2032(VarCurr,B)
% 31.96/31.98 <=> v1987(VarCurr,B) ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addConditionBooleanCondEqualRangesThenBranch_62,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v2035(VarCurr)
% 31.96/31.98 => ! [B] :
% 31.96/31.98 ( range_63_0(B)
% 31.96/31.98 => ( v2032(VarCurr,B)
% 31.96/31.98 <=> $false ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(range_axiom_14,axiom,
% 31.96/31.98 ! [B] :
% 31.96/31.98 ( range_63_0(B)
% 31.96/31.98 <=> ( $false
% 31.96/31.98 | bitIndex0 = B
% 31.96/31.98 | bitIndex1 = B
% 31.96/31.98 | bitIndex2 = B
% 31.96/31.98 | bitIndex3 = B
% 31.96/31.98 | bitIndex4 = B
% 31.96/31.98 | bitIndex5 = B
% 31.96/31.98 | bitIndex6 = B
% 31.96/31.98 | bitIndex7 = B
% 31.96/31.98 | bitIndex8 = B
% 31.96/31.98 | bitIndex9 = B
% 31.96/31.98 | bitIndex10 = B
% 31.96/31.98 | bitIndex11 = B
% 31.96/31.98 | bitIndex12 = B
% 31.96/31.98 | bitIndex13 = B
% 31.96/31.98 | bitIndex14 = B
% 31.96/31.98 | bitIndex15 = B
% 31.96/31.98 | bitIndex16 = B
% 31.96/31.98 | bitIndex17 = B
% 31.96/31.98 | bitIndex18 = B
% 31.96/31.98 | bitIndex19 = B
% 31.96/31.98 | bitIndex20 = B
% 31.96/31.98 | bitIndex21 = B
% 31.96/31.98 | bitIndex22 = B
% 31.96/31.98 | bitIndex23 = B
% 31.96/31.98 | bitIndex24 = B
% 31.96/31.98 | bitIndex25 = B
% 31.96/31.98 | bitIndex26 = B
% 31.96/31.98 | bitIndex27 = B
% 31.96/31.98 | bitIndex28 = B
% 31.96/31.98 | bitIndex29 = B
% 31.96/31.98 | bitIndex30 = B
% 31.96/31.98 | bitIndex31 = B
% 31.96/31.98 | bitIndex32 = B
% 31.96/31.98 | bitIndex33 = B
% 31.96/31.98 | bitIndex34 = B
% 31.96/31.98 | bitIndex35 = B
% 31.96/31.98 | bitIndex36 = B
% 31.96/31.98 | bitIndex37 = B
% 31.96/31.98 | bitIndex38 = B
% 31.96/31.98 | bitIndex39 = B
% 31.96/31.98 | bitIndex40 = B
% 31.96/31.98 | bitIndex41 = B
% 31.96/31.98 | bitIndex42 = B
% 31.96/31.98 | bitIndex43 = B
% 31.96/31.98 | bitIndex44 = B
% 31.96/31.98 | bitIndex45 = B
% 31.96/31.98 | bitIndex46 = B
% 31.96/31.98 | bitIndex47 = B
% 31.96/31.98 | bitIndex48 = B
% 31.96/31.98 | bitIndex49 = B
% 31.96/31.98 | bitIndex50 = B
% 31.96/31.98 | bitIndex51 = B
% 31.96/31.98 | bitIndex52 = B
% 31.96/31.98 | bitIndex53 = B
% 31.96/31.98 | bitIndex54 = B
% 31.96/31.98 | bitIndex55 = B
% 31.96/31.98 | bitIndex56 = B
% 31.96/31.98 | bitIndex57 = B
% 31.96/31.98 | bitIndex58 = B
% 31.96/31.98 | bitIndex59 = B
% 31.96/31.98 | bitIndex60 = B
% 31.96/31.98 | bitIndex61 = B
% 31.96/31.98 | bitIndex62 = B
% 31.96/31.98 | bitIndex63 = B ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_361,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex63) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_360,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex62) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_359,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex61) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_358,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex60) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_357,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex59) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_356,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex58) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_355,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex57) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_354,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex56) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_353,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex55) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_352,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex54) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_351,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex53) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_350,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex52) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_349,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex51) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_348,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex50) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_347,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex49) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_346,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex48) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_345,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex47) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_344,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex46) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_343,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex45) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_342,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex44) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_341,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex43) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_340,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex42) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_339,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex41) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_338,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex40) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_337,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex39) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_336,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex38) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_335,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex37) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_334,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex36) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_333,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex35) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_332,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex34) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_331,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex33) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_330,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex32) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_329,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex31) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_328,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex30) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_327,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex29) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_326,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex28) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_325,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex27) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_324,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex26) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_323,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex25) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_322,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex24) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_321,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex23) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_320,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex22) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_319,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex21) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_318,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex20) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_317,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex19) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_316,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex18) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_315,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex17) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_314,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex16) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_313,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex15) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_312,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex14) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_311,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex13) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_310,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex12) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_309,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex11) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_308,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex10) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_307,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex9) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_306,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex8) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_305,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex7) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_304,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex6) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_303,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex5) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_302,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex4) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_301,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex3) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_300,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex2) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_299,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex1) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_298,axiom,
% 31.96/31.98 ~ b0000000000000000000000000000000000000000000000000000000000000000(bitIndex0) ).
% 31.96/31.98
% 31.96/31.98 fof(writeUnaryOperator_195,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( ~ v2035(VarCurr)
% 31.96/31.98 <=> v1984(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_414,axiom,
% 31.96/31.98 ! [VarNext,VarCurr] :
% 31.96/31.98 ( nextState(VarCurr,VarNext)
% 31.96/31.98 => ( v2024(VarNext)
% 31.96/31.98 <=> v2025(VarNext) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_413,axiom,
% 31.96/31.98 ! [VarNext,VarCurr] :
% 31.96/31.98 ( nextState(VarCurr,VarNext)
% 31.96/31.98 => ( v2025(VarNext)
% 31.96/31.98 <=> ( v2026(VarNext)
% 31.96/31.98 & v2013(VarNext) ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeUnaryOperator_194,axiom,
% 31.96/31.98 ! [VarNext,VarCurr] :
% 31.96/31.98 ( nextState(VarCurr,VarNext)
% 31.96/31.98 => ( ~ v2026(VarNext)
% 31.96/31.98 <=> v2028(VarNext) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_392,axiom,
% 31.96/31.98 ! [VarNext,VarCurr] :
% 31.96/31.98 ( nextState(VarCurr,VarNext)
% 31.96/31.98 => ( v2028(VarNext)
% 31.96/31.98 <=> v2013(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignmentInitValue_16,axiom,
% 31.96/31.98 ~ v1982(constB0,bitIndex1) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignmentInitValue_15,axiom,
% 31.96/31.98 ~ v1982(constB0,bitIndex0) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_297,axiom,
% 31.96/31.98 ~ bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx00(bitIndex1) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_296,axiom,
% 31.96/31.98 ~ bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx00(bitIndex0) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_391,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v2013(VarCurr)
% 31.96/31.98 <=> v2015(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_390,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v2015(VarCurr)
% 31.96/31.98 <=> v2017(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_389,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v2017(VarCurr)
% 31.96/31.98 <=> v2019(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_388,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v2019(VarCurr)
% 31.96/31.98 <=> v1(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_387,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1987(VarCurr,bitIndex0)
% 31.96/31.98 <=> v1989(VarCurr,bitIndex0) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_386,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1989(VarCurr,bitIndex0)
% 31.96/31.98 <=> v1991(VarCurr,bitIndex0) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_385,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1991(VarCurr,bitIndex0)
% 31.96/31.98 <=> v1993(VarCurr,bitIndex0) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_384,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1993(VarCurr,bitIndex0)
% 31.96/31.98 <=> v1995(VarCurr,bitIndex0) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_383,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1995(VarCurr,bitIndex0)
% 31.96/31.98 <=> v1997(VarCurr,bitIndex0) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_382,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1997(VarCurr,bitIndex0)
% 31.96/31.98 <=> v1999(VarCurr,bitIndex0) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_381,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1999(VarCurr,bitIndex0)
% 31.96/31.98 <=> v2001(VarCurr,bitIndex0) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_380,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v2001(VarCurr,bitIndex0)
% 31.96/31.98 <=> v2003(VarCurr,bitIndex0) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_379,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v2003(VarCurr,bitIndex0)
% 31.96/31.98 <=> v2005(VarCurr,bitIndex0) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_378,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v2005(VarCurr,bitIndex0)
% 31.96/31.98 <=> v2007(VarCurr,bitIndex0) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_377,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v2007(VarCurr,bitIndex0)
% 31.96/31.98 <=> v2009(VarCurr,bitIndex0) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignmentInitValue_14,axiom,
% 31.96/31.98 ~ v2009(constB0,bitIndex1) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignmentInitValue_13,axiom,
% 31.96/31.98 ~ v2009(constB0,bitIndex0) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_295,axiom,
% 31.96/31.98 ~ bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx00(bitIndex1) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_294,axiom,
% 31.96/31.98 ~ bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx00(bitIndex0) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_376,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1984(VarCurr)
% 31.96/31.98 <=> v1948(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_375,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1961(VarCurr)
% 31.96/31.98 <=> $false ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_374,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1959(VarCurr)
% 31.96/31.98 <=> $false ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_373,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1957(VarCurr)
% 31.96/31.98 <=> $true ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_372,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1955(VarCurr)
% 31.96/31.98 <=> $false ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_371,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1932(VarCurr)
% 31.96/31.98 <=> v1934(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeUnaryOperator_193,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( ~ v1934(VarCurr)
% 31.96/31.98 <=> v1936(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_370,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1936(VarCurr)
% 31.96/31.98 <=> v1938(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_369,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1938(VarCurr)
% 31.96/31.98 <=> v1940(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_368,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1940(VarCurr)
% 31.96/31.98 <=> v1942(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_367,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1942(VarCurr)
% 31.96/31.98 <=> v1944(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_366,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1944(VarCurr)
% 31.96/31.98 <=> v1946(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_365,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1946(VarCurr)
% 31.96/31.98 <=> v1948(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_364,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1948(VarCurr)
% 31.96/31.98 <=> v1950(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_363,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1950(VarCurr)
% 31.96/31.98 <=> v1952(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_362,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1952(VarCurr)
% 31.96/31.98 <=> v16(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addCaseBooleanConditionEqualRanges1_19,axiom,
% 31.96/31.98 ! [VarNext,VarCurr] :
% 31.96/31.98 ( nextState(VarCurr,VarNext)
% 31.96/31.98 => ( ~ v1887(VarNext)
% 31.96/31.98 => ( v318(VarNext)
% 31.96/31.98 <=> v318(VarCurr) ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addCaseBooleanConditionEqualRanges0_31,axiom,
% 31.96/31.98 ! [VarNext] :
% 31.96/31.98 ( v1887(VarNext)
% 31.96/31.98 => ( v318(VarNext)
% 31.96/31.98 <=> v1903(VarNext) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_361,axiom,
% 31.96/31.98 ! [VarNext,VarCurr] :
% 31.96/31.98 ( nextState(VarCurr,VarNext)
% 31.96/31.98 => ( v1903(VarNext)
% 31.96/31.98 <=> v1901(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(aaddConditionBooleanCondEqualRangesElseBranch_58,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( ~ v1900(VarCurr)
% 31.96/31.98 => ( v1901(VarCurr)
% 31.96/31.98 <=> v1904(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addConditionBooleanCondEqualRangesThenBranch_61,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1900(VarCurr)
% 31.96/31.98 => ( v1901(VarCurr)
% 31.96/31.98 <=> $false ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(aaddConditionBooleanCondEqualRangesElseBranch_57,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( ~ v320(VarCurr)
% 31.96/31.98 => ( v1904(VarCurr)
% 31.96/31.98 <=> $true ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addConditionBooleanCondEqualRangesThenBranch_60,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v320(VarCurr)
% 31.96/31.98 => ( v1904(VarCurr)
% 31.96/31.98 <=> $false ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_412,axiom,
% 31.96/31.98 ! [VarNext,VarCurr] :
% 31.96/31.98 ( nextState(VarCurr,VarNext)
% 31.96/31.98 => ( v1887(VarNext)
% 31.96/31.98 <=> ( v1888(VarNext)
% 31.96/31.98 & v1897(VarNext) ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_360,axiom,
% 31.96/31.98 ! [VarNext,VarCurr] :
% 31.96/31.98 ( nextState(VarCurr,VarNext)
% 31.96/31.98 => ( v1897(VarNext)
% 31.96/31.98 <=> v1895(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_411,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1895(VarCurr)
% 31.96/31.98 <=> ( v1898(VarCurr)
% 31.96/31.98 | v1900(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeUnaryOperator_192,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( ~ v1900(VarCurr)
% 31.96/31.98 <=> v12(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_410,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1898(VarCurr)
% 31.96/31.98 <=> ( v1899(VarCurr)
% 31.96/31.98 | v320(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_409,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1899(VarCurr)
% 31.96/31.98 <=> ( v664(VarCurr)
% 31.96/31.98 & v741(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_408,axiom,
% 31.96/31.98 ! [VarNext,VarCurr] :
% 31.96/31.98 ( nextState(VarCurr,VarNext)
% 31.96/31.98 => ( v1888(VarNext)
% 31.96/31.98 <=> ( v1889(VarNext)
% 31.96/31.98 & v288(VarNext) ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeUnaryOperator_191,axiom,
% 31.96/31.98 ! [VarNext,VarCurr] :
% 31.96/31.98 ( nextState(VarCurr,VarNext)
% 31.96/31.98 => ( ~ v1889(VarNext)
% 31.96/31.98 <=> v1891(VarNext) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_359,axiom,
% 31.96/31.98 ! [VarNext,VarCurr] :
% 31.96/31.98 ( nextState(VarCurr,VarNext)
% 31.96/31.98 => ( v1891(VarNext)
% 31.96/31.98 <=> v288(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignmentInitValueVector_16,axiom,
% 31.96/31.98 ( v318(constB0)
% 31.96/31.98 <=> $false ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_407,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v741(VarCurr)
% 31.96/31.98 <=> ( v1882(VarCurr)
% 31.96/31.98 & v875(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_406,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1882(VarCurr)
% 31.96/31.98 <=> ( v1883(VarCurr)
% 31.96/31.98 | v1884(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addBitVectorEqualityBitBlasted_70,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1884(VarCurr)
% 31.96/31.98 <=> ( ( v743(VarCurr,bitIndex3)
% 31.96/31.98 <=> $false )
% 31.96/31.98 & ( v743(VarCurr,bitIndex2)
% 31.96/31.98 <=> $true )
% 31.96/31.98 & ( v743(VarCurr,bitIndex1)
% 31.96/31.98 <=> $true )
% 31.96/31.98 & ( v743(VarCurr,bitIndex0)
% 31.96/31.98 <=> $true ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_293,axiom,
% 31.96/31.98 ~ b0111(bitIndex3) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_292,axiom,
% 31.96/31.98 b0111(bitIndex2) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_291,axiom,
% 31.96/31.98 b0111(bitIndex1) ).
% 31.96/31.98
% 31.96/31.98 fof(bitBlastConstant_290,axiom,
% 31.96/31.98 b0111(bitIndex0) ).
% 31.96/31.98
% 31.96/31.98 fof(addBitVectorEqualityBitBlasted_69,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1883(VarCurr)
% 31.96/31.98 <=> ( ( v743(VarCurr,bitIndex3)
% 31.96/31.98 <=> $false )
% 31.96/31.98 & ( v743(VarCurr,bitIndex2)
% 31.96/31.98 <=> $true )
% 31.96/31.98 & ( v743(VarCurr,bitIndex1)
% 31.96/31.98 <=> $true )
% 31.96/31.98 & ( v743(VarCurr,bitIndex0)
% 31.96/31.98 <=> $false ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_358,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( ( v743(VarCurr,bitIndex3)
% 31.96/31.98 <=> v745(VarCurr,bitIndex66) )
% 31.96/31.98 & ( v743(VarCurr,bitIndex2)
% 31.96/31.98 <=> v745(VarCurr,bitIndex65) )
% 31.96/31.98 & ( v743(VarCurr,bitIndex1)
% 31.96/31.98 <=> v745(VarCurr,bitIndex64) )
% 31.96/31.98 & ( v743(VarCurr,bitIndex0)
% 31.96/31.98 <=> v745(VarCurr,bitIndex63) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_357,axiom,
% 31.96/31.98 ! [VarCurr,B] :
% 31.96/31.98 ( range_66_63(B)
% 31.96/31.98 => ( v745(VarCurr,B)
% 31.96/31.98 <=> v747(VarCurr,B) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_356,axiom,
% 31.96/31.98 ! [VarCurr,B] :
% 31.96/31.98 ( range_66_63(B)
% 31.96/31.98 => ( v747(VarCurr,B)
% 31.96/31.98 <=> v867(VarCurr,B) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(range_axiom_13,axiom,
% 31.96/31.98 ! [B] :
% 31.96/31.98 ( range_66_63(B)
% 31.96/31.98 <=> ( $false
% 31.96/31.98 | bitIndex63 = B
% 31.96/31.98 | bitIndex64 = B
% 31.96/31.98 | bitIndex65 = B
% 31.96/31.98 | bitIndex66 = B ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addCaseBooleanConditionEqualRanges1_18,axiom,
% 31.96/31.98 ! [VarNext,VarCurr] :
% 31.96/31.98 ( nextState(VarCurr,VarNext)
% 31.96/31.98 => ( ~ v1869(VarNext)
% 31.96/31.98 => ! [B] :
% 31.96/31.98 ( range_3_0(B)
% 31.96/31.98 => ( v869(VarNext,B)
% 31.96/31.98 <=> v869(VarCurr,B) ) ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addCaseBooleanConditionEqualRanges0_30,axiom,
% 31.96/31.98 ! [VarNext] :
% 31.96/31.98 ( v1869(VarNext)
% 31.96/31.98 => ! [B] :
% 31.96/31.98 ( range_3_0(B)
% 31.96/31.98 => ( v869(VarNext,B)
% 31.96/31.98 <=> v1877(VarNext,B) ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_355,axiom,
% 31.96/31.98 ! [VarNext,VarCurr] :
% 31.96/31.98 ( nextState(VarCurr,VarNext)
% 31.96/31.98 => ! [B] :
% 31.96/31.98 ( range_3_0(B)
% 31.96/31.98 => ( v1877(VarNext,B)
% 31.96/31.98 <=> v1875(VarCurr,B) ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(aaddConditionBooleanCondEqualRangesElseBranch_56,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( ~ v830(VarCurr)
% 31.96/31.98 => ! [B] :
% 31.96/31.98 ( range_3_0(B)
% 31.96/31.98 => ( v1875(VarCurr,B)
% 31.96/31.98 <=> v871(VarCurr,B) ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addConditionBooleanCondEqualRangesThenBranch_59,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v830(VarCurr)
% 31.96/31.98 => ! [B] :
% 31.96/31.98 ( range_3_0(B)
% 31.96/31.98 => ( v1875(VarCurr,B)
% 31.96/31.98 <=> $false ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_405,axiom,
% 31.96/31.98 ! [VarNext,VarCurr] :
% 31.96/31.98 ( nextState(VarCurr,VarNext)
% 31.96/31.98 => ( v1869(VarNext)
% 31.96/31.98 <=> v1870(VarNext) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_404,axiom,
% 31.96/31.98 ! [VarNext,VarCurr] :
% 31.96/31.98 ( nextState(VarCurr,VarNext)
% 31.96/31.98 => ( v1870(VarNext)
% 31.96/31.98 <=> ( v1872(VarNext)
% 31.96/31.98 & v751(VarNext) ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeUnaryOperator_190,axiom,
% 31.96/31.98 ! [VarNext,VarCurr] :
% 31.96/31.98 ( nextState(VarCurr,VarNext)
% 31.96/31.98 => ( ~ v1872(VarNext)
% 31.96/31.98 <=> v823(VarNext) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(aaddConditionBooleanCondEqualRangesElseBranch_55,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( ~ v873(VarCurr)
% 31.96/31.98 => ! [B] :
% 31.96/31.98 ( range_3_0(B)
% 31.96/31.98 => ( v871(VarCurr,B)
% 31.96/31.98 <=> v869(VarCurr,B) ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addConditionBooleanCondEqualRangesThenBranch_58,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v873(VarCurr)
% 31.96/31.98 => ! [B] :
% 31.96/31.98 ( range_3_0(B)
% 31.96/31.98 => ( v871(VarCurr,B)
% 31.96/31.98 <=> v1846(VarCurr,B) ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(aaddConditionBooleanCondEqualRangesElseBranch_54,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( ~ v1847(VarCurr)
% 31.96/31.98 => ! [B] :
% 31.96/31.98 ( range_3_0(B)
% 31.96/31.98 => ( v1846(VarCurr,B)
% 31.96/31.98 <=> v1848(VarCurr,B) ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addConditionBooleanCondEqualRangesThenBranch_57,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1847(VarCurr)
% 31.96/31.98 => ! [B] :
% 31.96/31.98 ( range_3_0(B)
% 31.96/31.98 => ( v1846(VarCurr,B)
% 31.96/31.98 <=> $false ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_354,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1848(VarCurr,bitIndex0)
% 31.96/31.98 <=> v1864(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_353,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1848(VarCurr,bitIndex1)
% 31.96/31.98 <=> v1862(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_352,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1848(VarCurr,bitIndex2)
% 31.96/31.98 <=> v1857(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_351,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1848(VarCurr,bitIndex3)
% 31.96/31.98 <=> v1850(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_403,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1862(VarCurr)
% 31.96/31.98 <=> ( v1863(VarCurr)
% 31.96/31.98 & v1866(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorShiftedRanges_90,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1866(VarCurr)
% 31.96/31.98 <=> ( v869(VarCurr,bitIndex0)
% 31.96/31.98 | v869(VarCurr,bitIndex1) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_402,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1863(VarCurr)
% 31.96/31.98 <=> ( v1864(VarCurr)
% 31.96/31.98 | v1865(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeUnaryOperator_189,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( ~ v1865(VarCurr)
% 31.96/31.98 <=> v869(VarCurr,bitIndex1) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeUnaryOperator_188,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( ~ v1864(VarCurr)
% 31.96/31.98 <=> v869(VarCurr,bitIndex0) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_401,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1857(VarCurr)
% 31.96/31.98 <=> ( v1858(VarCurr)
% 31.96/31.98 & v1861(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorShiftedRanges_89,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1861(VarCurr)
% 31.96/31.98 <=> ( v1854(VarCurr)
% 31.96/31.98 | v869(VarCurr,bitIndex2) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_400,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1858(VarCurr)
% 31.96/31.98 <=> ( v1859(VarCurr)
% 31.96/31.98 | v1860(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeUnaryOperator_187,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( ~ v1860(VarCurr)
% 31.96/31.98 <=> v869(VarCurr,bitIndex2) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeUnaryOperator_186,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( ~ v1859(VarCurr)
% 31.96/31.98 <=> v1854(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_399,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1850(VarCurr)
% 31.96/31.98 <=> ( v1851(VarCurr)
% 31.96/31.98 & v1856(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorShiftedRanges_88,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1856(VarCurr)
% 31.96/31.98 <=> ( v1853(VarCurr)
% 31.96/31.98 | v869(VarCurr,bitIndex3) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_398,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1851(VarCurr)
% 31.96/31.98 <=> ( v1852(VarCurr)
% 31.96/31.98 | v1855(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeUnaryOperator_185,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( ~ v1855(VarCurr)
% 31.96/31.98 <=> v869(VarCurr,bitIndex3) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeUnaryOperator_184,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( ~ v1852(VarCurr)
% 31.96/31.98 <=> v1853(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorShiftedRanges_87,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1853(VarCurr)
% 31.96/31.98 <=> ( v1854(VarCurr)
% 31.96/31.98 & v869(VarCurr,bitIndex2) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorShiftedRanges_86,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1854(VarCurr)
% 31.96/31.98 <=> ( v869(VarCurr,bitIndex0)
% 31.96/31.98 & v869(VarCurr,bitIndex1) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addBitVectorEqualityBitBlasted_68,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1847(VarCurr)
% 31.96/31.98 <=> ( ( v869(VarCurr,bitIndex3)
% 31.96/31.98 <=> $true )
% 31.96/31.98 & ( v869(VarCurr,bitIndex2)
% 31.96/31.98 <=> $true )
% 31.96/31.98 & ( v869(VarCurr,bitIndex1)
% 31.96/31.98 <=> $true )
% 31.96/31.98 & ( v869(VarCurr,bitIndex0)
% 31.96/31.98 <=> $true ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_350,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v873(VarCurr)
% 31.96/31.98 <=> v875(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_349,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v875(VarCurr)
% 31.96/31.98 <=> v877(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_397,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v877(VarCurr)
% 31.96/31.98 <=> ( v879(VarCurr)
% 31.96/31.98 | v1843(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_348,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1843(VarCurr)
% 31.96/31.98 <=> v31(VarCurr,bitIndex4) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_347,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v879(VarCurr)
% 31.96/31.98 <=> v36(VarCurr,bitIndex6) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addConditionBooleanCondShiftedRangesElseBranch_15,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( ~ v1831(VarCurr)
% 31.96/31.98 => ( v36(VarCurr,bitIndex6)
% 31.96/31.98 <=> $false ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addConditionBooleanCondShiftedRangesThenBranch_12,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1831(VarCurr)
% 31.96/31.98 => ( v36(VarCurr,bitIndex6)
% 31.96/31.98 <=> $true ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_396,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1831(VarCurr)
% 31.96/31.98 <=> ( v1832(VarCurr)
% 31.96/31.98 | v1840(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_395,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1840(VarCurr)
% 31.96/31.98 <=> ( v1841(VarCurr)
% 31.96/31.98 & v1821(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeUnaryOperator_183,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( ~ v1841(VarCurr)
% 31.96/31.98 <=> v38(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_394,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1832(VarCurr)
% 31.96/31.98 <=> ( v1833(VarCurr)
% 31.96/31.98 | v1838(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_393,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1838(VarCurr)
% 31.96/31.98 <=> ( v1839(VarCurr)
% 31.96/31.98 & v1360(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_392,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1839(VarCurr)
% 31.96/31.98 <=> ( v1342(VarCurr)
% 31.96/31.98 & v1812(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_391,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1833(VarCurr)
% 31.96/31.98 <=> ( v1834(VarCurr)
% 31.96/31.98 | v1836(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_390,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1836(VarCurr)
% 31.96/31.98 <=> ( v1837(VarCurr)
% 31.96/31.98 & v1355(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_389,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1837(VarCurr)
% 31.96/31.98 <=> ( v1342(VarCurr)
% 31.96/31.98 & v1812(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_388,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1834(VarCurr)
% 31.96/31.98 <=> ( v1835(VarCurr)
% 31.96/31.98 & v1348(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_387,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1835(VarCurr)
% 31.96/31.98 <=> ( v1342(VarCurr)
% 31.96/31.98 & v1812(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_346,axiom,
% 31.96/31.98 ! [VarNext] :
% 31.96/31.98 ( v31(VarNext,bitIndex11)
% 31.96/31.98 <=> v1823(VarNext,bitIndex10) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addCaseBooleanConditionShiftedRanges1_12,axiom,
% 31.96/31.98 ! [VarNext,VarCurr] :
% 31.96/31.98 ( nextState(VarCurr,VarNext)
% 31.96/31.98 => ( ~ v1824(VarNext)
% 31.96/31.98 => ( ( v1823(VarNext,bitIndex10)
% 31.96/31.98 <=> v31(VarCurr,bitIndex11) )
% 31.96/31.98 & ( v1823(VarNext,bitIndex9)
% 31.96/31.98 <=> v31(VarCurr,bitIndex10) )
% 31.96/31.98 & ( v1823(VarNext,bitIndex8)
% 31.96/31.98 <=> v31(VarCurr,bitIndex9) )
% 31.96/31.98 & ( v1823(VarNext,bitIndex7)
% 31.96/31.98 <=> v31(VarCurr,bitIndex8) )
% 31.96/31.98 & ( v1823(VarNext,bitIndex6)
% 31.96/31.98 <=> v31(VarCurr,bitIndex7) )
% 31.96/31.98 & ( v1823(VarNext,bitIndex5)
% 31.96/31.98 <=> v31(VarCurr,bitIndex6) )
% 31.96/31.98 & ( v1823(VarNext,bitIndex4)
% 31.96/31.98 <=> v31(VarCurr,bitIndex5) )
% 31.96/31.98 & ( v1823(VarNext,bitIndex3)
% 31.96/31.98 <=> v31(VarCurr,bitIndex4) )
% 31.96/31.98 & ( v1823(VarNext,bitIndex2)
% 31.96/31.98 <=> v31(VarCurr,bitIndex3) )
% 31.96/31.98 & ( v1823(VarNext,bitIndex1)
% 31.96/31.98 <=> v31(VarCurr,bitIndex2) )
% 31.96/31.98 & ( v1823(VarNext,bitIndex0)
% 31.96/31.98 <=> v31(VarCurr,bitIndex1) ) ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addCaseBooleanConditionEqualRanges0_29,axiom,
% 31.96/31.98 ! [VarNext] :
% 31.96/31.98 ( v1824(VarNext)
% 31.96/31.98 => ! [B] :
% 31.96/31.98 ( range_10_0(B)
% 31.96/31.98 => ( v1823(VarNext,B)
% 31.96/31.98 <=> v1253(VarNext,B) ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_386,axiom,
% 31.96/31.98 ! [VarNext,VarCurr] :
% 31.96/31.98 ( nextState(VarCurr,VarNext)
% 31.96/31.98 => ( v1824(VarNext)
% 31.96/31.98 <=> v1825(VarNext) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_385,axiom,
% 31.96/31.98 ! [VarNext,VarCurr] :
% 31.96/31.98 ( nextState(VarCurr,VarNext)
% 31.96/31.98 => ( v1825(VarNext)
% 31.96/31.98 <=> ( v1827(VarNext)
% 31.96/31.98 & v1240(VarNext) ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeUnaryOperator_182,axiom,
% 31.96/31.98 ! [VarNext,VarCurr] :
% 31.96/31.98 ( nextState(VarCurr,VarNext)
% 31.96/31.98 => ( ~ v1827(VarNext)
% 31.96/31.98 <=> v1247(VarNext) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addConditionBooleanCondShiftedRangesElseBranch_14,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( ~ v1805(VarCurr)
% 31.96/31.98 => ( v36(VarCurr,bitIndex11)
% 31.96/31.98 <=> $false ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addConditionBooleanCondShiftedRangesThenBranch_11,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1805(VarCurr)
% 31.96/31.98 => ( v36(VarCurr,bitIndex11)
% 31.96/31.98 <=> $true ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_384,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1805(VarCurr)
% 31.96/31.98 <=> ( v1806(VarCurr)
% 31.96/31.98 | v1820(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_383,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1820(VarCurr)
% 31.96/31.98 <=> ( v38(VarCurr)
% 31.96/31.98 & v1821(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addBitVectorEqualityBitBlasted_67,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1821(VarCurr)
% 31.96/31.98 <=> ( $true
% 31.96/31.98 <=> v31(VarCurr,bitIndex11) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_382,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1806(VarCurr)
% 31.96/31.98 <=> ( v1807(VarCurr)
% 31.96/31.98 | v1817(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_381,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1817(VarCurr)
% 31.96/31.98 <=> ( v1818(VarCurr)
% 31.96/31.98 & v1323(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_380,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1818(VarCurr)
% 31.96/31.98 <=> ( v1342(VarCurr)
% 31.96/31.98 & v1812(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_379,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1807(VarCurr)
% 31.96/31.98 <=> ( v1808(VarCurr)
% 31.96/31.98 | v1815(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_378,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1815(VarCurr)
% 31.96/31.98 <=> ( v1816(VarCurr)
% 31.96/31.98 & v1300(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_377,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1816(VarCurr)
% 31.96/31.98 <=> ( v1352(VarCurr)
% 31.96/31.98 & v1812(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_376,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1808(VarCurr)
% 31.96/31.98 <=> ( v1809(VarCurr)
% 31.96/31.98 | v1813(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_375,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1813(VarCurr)
% 31.96/31.98 <=> ( v1814(VarCurr)
% 31.96/31.98 & v1278(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_374,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1814(VarCurr)
% 31.96/31.98 <=> ( v1352(VarCurr)
% 31.96/31.98 & v1812(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_373,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1809(VarCurr)
% 31.96/31.98 <=> ( v1810(VarCurr)
% 31.96/31.98 & v1238(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_372,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1810(VarCurr)
% 31.96/31.98 <=> ( v1352(VarCurr)
% 31.96/31.98 & v1812(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeUnaryOperator_181,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( ~ v1812(VarCurr)
% 31.96/31.98 <=> v1168(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_371,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v907(VarCurr)
% 31.96/31.98 <=> ( v909(VarCurr)
% 31.96/31.98 & v1150(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_345,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v909(VarCurr)
% 31.96/31.98 <=> v911(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_344,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v911(VarCurr)
% 31.96/31.98 <=> v913(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_370,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v913(VarCurr)
% 31.96/31.98 <=> ( v1799(VarCurr)
% 31.96/31.98 & v1800(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeUnaryOperator_180,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( ~ v1800(VarCurr)
% 31.96/31.98 <=> v1138(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeUnaryOperator_179,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( ~ v1799(VarCurr)
% 31.96/31.98 <=> v915(VarCurr,bitIndex1) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_343,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v915(VarCurr,bitIndex1)
% 31.96/31.98 <=> v917(VarCurr,bitIndex1) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_342,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v917(VarCurr,bitIndex1)
% 31.96/31.98 <=> v919(VarCurr,bitIndex17) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_341,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v919(VarCurr,bitIndex17)
% 31.96/31.98 <=> v921(VarCurr,bitIndex17) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_340,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v921(VarCurr,bitIndex17)
% 31.96/31.98 <=> v1017(VarCurr,bitIndex17) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addCaseBooleanConditionEqualRanges1_17,axiom,
% 31.96/31.98 ! [VarNext,VarCurr] :
% 31.96/31.98 ( nextState(VarCurr,VarNext)
% 31.96/31.98 => ( ~ v1787(VarNext)
% 31.96/31.98 => ! [B] :
% 31.96/31.98 ( range_3_0(B)
% 31.96/31.98 => ( v1019(VarNext,B)
% 31.96/31.98 <=> v1019(VarCurr,B) ) ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addCaseBooleanConditionEqualRanges0_28,axiom,
% 31.96/31.98 ! [VarNext] :
% 31.96/31.98 ( v1787(VarNext)
% 31.96/31.98 => ! [B] :
% 31.96/31.98 ( range_3_0(B)
% 31.96/31.98 => ( v1019(VarNext,B)
% 31.96/31.98 <=> v1795(VarNext,B) ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_339,axiom,
% 31.96/31.98 ! [VarNext,VarCurr] :
% 31.96/31.98 ( nextState(VarCurr,VarNext)
% 31.96/31.98 => ! [B] :
% 31.96/31.98 ( range_3_0(B)
% 31.96/31.98 => ( v1795(VarNext,B)
% 31.96/31.98 <=> v1793(VarCurr,B) ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(aaddConditionBooleanCondEqualRangesElseBranch_53,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( ~ v991(VarCurr)
% 31.96/31.98 => ! [B] :
% 31.96/31.98 ( range_3_0(B)
% 31.96/31.98 => ( v1793(VarCurr,B)
% 31.96/31.98 <=> v1021(VarCurr,B) ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addConditionBooleanCondEqualRangesThenBranch_56,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v991(VarCurr)
% 31.96/31.98 => ! [B] :
% 31.96/31.98 ( range_3_0(B)
% 31.96/31.98 => ( v1793(VarCurr,B)
% 31.96/31.98 <=> $false ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_369,axiom,
% 31.96/31.98 ! [VarNext,VarCurr] :
% 31.96/31.98 ( nextState(VarCurr,VarNext)
% 31.96/31.98 => ( v1787(VarNext)
% 31.96/31.98 <=> v1788(VarNext) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_368,axiom,
% 31.96/31.98 ! [VarNext,VarCurr] :
% 31.96/31.98 ( nextState(VarCurr,VarNext)
% 31.96/31.98 => ( v1788(VarNext)
% 31.96/31.98 <=> ( v1790(VarNext)
% 31.96/31.98 & v925(VarNext) ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeUnaryOperator_178,axiom,
% 31.96/31.98 ! [VarNext,VarCurr] :
% 31.96/31.98 ( nextState(VarCurr,VarNext)
% 31.96/31.98 => ( ~ v1790(VarNext)
% 31.96/31.98 <=> v984(VarNext) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(aaddConditionBooleanCondEqualRangesElseBranch_52,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( ~ v1023(VarCurr)
% 31.96/31.98 => ! [B] :
% 31.96/31.98 ( range_3_0(B)
% 31.96/31.98 => ( v1021(VarCurr,B)
% 31.96/31.98 <=> v1019(VarCurr,B) ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addConditionBooleanCondEqualRangesThenBranch_55,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1023(VarCurr)
% 31.96/31.98 => ! [B] :
% 31.96/31.98 ( range_3_0(B)
% 31.96/31.98 => ( v1021(VarCurr,B)
% 31.96/31.98 <=> v1764(VarCurr,B) ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(aaddConditionBooleanCondEqualRangesElseBranch_51,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( ~ v1765(VarCurr)
% 31.96/31.98 => ! [B] :
% 31.96/31.98 ( range_3_0(B)
% 31.96/31.98 => ( v1764(VarCurr,B)
% 31.96/31.98 <=> v1766(VarCurr,B) ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addConditionBooleanCondEqualRangesThenBranch_54,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1765(VarCurr)
% 31.96/31.98 => ! [B] :
% 31.96/31.98 ( range_3_0(B)
% 31.96/31.98 => ( v1764(VarCurr,B)
% 31.96/31.98 <=> $false ) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_338,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1766(VarCurr,bitIndex0)
% 31.96/31.98 <=> v1782(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_337,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1766(VarCurr,bitIndex1)
% 31.96/31.98 <=> v1780(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_336,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1766(VarCurr,bitIndex2)
% 31.96/31.98 <=> v1775(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(addAssignment_335,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1766(VarCurr,bitIndex3)
% 31.96/31.98 <=> v1768(VarCurr) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_367,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1780(VarCurr)
% 31.96/31.98 <=> ( v1781(VarCurr)
% 31.96/31.98 & v1784(VarCurr) ) ) ).
% 31.96/31.98
% 31.96/31.98 fof(writeBinaryOperatorShiftedRanges_85,axiom,
% 31.96/31.98 ! [VarCurr] :
% 31.96/31.98 ( v1784(VarCurr)
% 32.24/31.98 <=> ( v1019(VarCurr,bitIndex0)
% 32.24/31.98 | v1019(VarCurr,bitIndex1) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_366,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1781(VarCurr)
% 32.24/31.98 <=> ( v1782(VarCurr)
% 32.24/31.98 | v1783(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeUnaryOperator_177,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( ~ v1783(VarCurr)
% 32.24/31.98 <=> v1019(VarCurr,bitIndex1) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeUnaryOperator_176,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( ~ v1782(VarCurr)
% 32.24/31.98 <=> v1019(VarCurr,bitIndex0) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_365,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1775(VarCurr)
% 32.24/31.98 <=> ( v1776(VarCurr)
% 32.24/31.98 & v1779(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorShiftedRanges_84,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1779(VarCurr)
% 32.24/31.98 <=> ( v1772(VarCurr)
% 32.24/31.98 | v1019(VarCurr,bitIndex2) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_364,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1776(VarCurr)
% 32.24/31.98 <=> ( v1777(VarCurr)
% 32.24/31.98 | v1778(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeUnaryOperator_175,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( ~ v1778(VarCurr)
% 32.24/31.98 <=> v1019(VarCurr,bitIndex2) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeUnaryOperator_174,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( ~ v1777(VarCurr)
% 32.24/31.98 <=> v1772(VarCurr) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_363,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1768(VarCurr)
% 32.24/31.98 <=> ( v1769(VarCurr)
% 32.24/31.98 & v1774(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorShiftedRanges_83,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1774(VarCurr)
% 32.24/31.98 <=> ( v1771(VarCurr)
% 32.24/31.98 | v1019(VarCurr,bitIndex3) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_362,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1769(VarCurr)
% 32.24/31.98 <=> ( v1770(VarCurr)
% 32.24/31.98 | v1773(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeUnaryOperator_173,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( ~ v1773(VarCurr)
% 32.24/31.98 <=> v1019(VarCurr,bitIndex3) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeUnaryOperator_172,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( ~ v1770(VarCurr)
% 32.24/31.98 <=> v1771(VarCurr) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorShiftedRanges_82,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1771(VarCurr)
% 32.24/31.98 <=> ( v1772(VarCurr)
% 32.24/31.98 & v1019(VarCurr,bitIndex2) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorShiftedRanges_81,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1772(VarCurr)
% 32.24/31.98 <=> ( v1019(VarCurr,bitIndex0)
% 32.24/31.98 & v1019(VarCurr,bitIndex1) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addBitVectorEqualityBitBlasted_66,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1765(VarCurr)
% 32.24/31.98 <=> ( ( v1019(VarCurr,bitIndex3)
% 32.24/31.98 <=> $true )
% 32.24/31.98 & ( v1019(VarCurr,bitIndex2)
% 32.24/31.98 <=> $true )
% 32.24/31.98 & ( v1019(VarCurr,bitIndex1)
% 32.24/31.98 <=> $true )
% 32.24/31.98 & ( v1019(VarCurr,bitIndex0)
% 32.24/31.98 <=> $true ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addAssignment_334,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1023(VarCurr)
% 32.24/31.98 <=> v1025(VarCurr) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addAssignment_333,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1025(VarCurr)
% 32.24/31.98 <=> v1027(VarCurr) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_361,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1027(VarCurr)
% 32.24/31.98 <=> ( v1761(VarCurr)
% 32.24/31.98 | v1160(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_360,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1761(VarCurr)
% 32.24/31.98 <=> ( v1762(VarCurr)
% 32.24/31.98 | v85(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_359,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1762(VarCurr)
% 32.24/31.98 <=> ( v1029(VarCurr)
% 32.24/31.98 | v1148(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addAssignment_332,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1160(VarCurr)
% 32.24/31.98 <=> v31(VarCurr,bitIndex1) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addAssignment_331,axiom,
% 32.24/31.98 ! [VarNext] :
% 32.24/31.98 ( v31(VarNext,bitIndex1)
% 32.24/31.98 <=> v1753(VarNext,bitIndex0) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addCaseBooleanConditionShiftedRanges1_11,axiom,
% 32.24/31.98 ! [VarNext,VarCurr] :
% 32.24/31.98 ( nextState(VarCurr,VarNext)
% 32.24/31.98 => ( ~ v1754(VarNext)
% 32.24/31.98 => ( ( v1753(VarNext,bitIndex10)
% 32.24/31.98 <=> v31(VarCurr,bitIndex11) )
% 32.24/31.98 & ( v1753(VarNext,bitIndex9)
% 32.24/31.98 <=> v31(VarCurr,bitIndex10) )
% 32.24/31.98 & ( v1753(VarNext,bitIndex8)
% 32.24/31.98 <=> v31(VarCurr,bitIndex9) )
% 32.24/31.98 & ( v1753(VarNext,bitIndex7)
% 32.24/31.98 <=> v31(VarCurr,bitIndex8) )
% 32.24/31.98 & ( v1753(VarNext,bitIndex6)
% 32.24/31.98 <=> v31(VarCurr,bitIndex7) )
% 32.24/31.98 & ( v1753(VarNext,bitIndex5)
% 32.24/31.98 <=> v31(VarCurr,bitIndex6) )
% 32.24/31.98 & ( v1753(VarNext,bitIndex4)
% 32.24/31.98 <=> v31(VarCurr,bitIndex5) )
% 32.24/31.98 & ( v1753(VarNext,bitIndex3)
% 32.24/31.98 <=> v31(VarCurr,bitIndex4) )
% 32.24/31.98 & ( v1753(VarNext,bitIndex2)
% 32.24/31.98 <=> v31(VarCurr,bitIndex3) )
% 32.24/31.98 & ( v1753(VarNext,bitIndex1)
% 32.24/31.98 <=> v31(VarCurr,bitIndex2) )
% 32.24/31.98 & ( v1753(VarNext,bitIndex0)
% 32.24/31.98 <=> v31(VarCurr,bitIndex1) ) ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addCaseBooleanConditionEqualRanges0_27,axiom,
% 32.24/31.98 ! [VarNext] :
% 32.24/31.98 ( v1754(VarNext)
% 32.24/31.98 => ! [B] :
% 32.24/31.98 ( range_10_0(B)
% 32.24/31.98 => ( v1753(VarNext,B)
% 32.24/31.98 <=> v1253(VarNext,B) ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_358,axiom,
% 32.24/31.98 ! [VarNext,VarCurr] :
% 32.24/31.98 ( nextState(VarCurr,VarNext)
% 32.24/31.98 => ( v1754(VarNext)
% 32.24/31.98 <=> v1755(VarNext) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_357,axiom,
% 32.24/31.98 ! [VarNext,VarCurr] :
% 32.24/31.98 ( nextState(VarCurr,VarNext)
% 32.24/31.98 => ( v1755(VarNext)
% 32.24/31.98 <=> ( v1757(VarNext)
% 32.24/31.98 & v1240(VarNext) ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeUnaryOperator_171,axiom,
% 32.24/31.98 ! [VarNext,VarCurr] :
% 32.24/31.98 ( nextState(VarCurr,VarNext)
% 32.24/31.98 => ( ~ v1757(VarNext)
% 32.24/31.98 <=> v1247(VarNext) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addConditionBooleanCondShiftedRangesElseBranch_13,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( ~ v1730(VarCurr)
% 32.24/31.98 => ( v36(VarCurr,bitIndex1)
% 32.24/31.98 <=> $false ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addConditionBooleanCondShiftedRangesThenBranch_10,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1730(VarCurr)
% 32.24/31.98 => ( v36(VarCurr,bitIndex1)
% 32.24/31.98 <=> $true ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_356,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1730(VarCurr)
% 32.24/31.98 <=> ( v1731(VarCurr)
% 32.24/31.98 | v1750(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_355,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1750(VarCurr)
% 32.24/31.98 <=> ( v1751(VarCurr)
% 32.24/31.98 & v1323(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_354,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1751(VarCurr)
% 32.24/31.98 <=> ( v1677(VarCurr)
% 32.24/31.98 & v907(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_353,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1731(VarCurr)
% 32.24/31.98 <=> ( v1732(VarCurr)
% 32.24/31.98 | v1748(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_352,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1748(VarCurr)
% 32.24/31.98 <=> ( v1749(VarCurr)
% 32.24/31.98 & v1300(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_351,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1749(VarCurr)
% 32.24/31.98 <=> ( v1689(VarCurr)
% 32.24/31.98 & v907(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_350,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1732(VarCurr)
% 32.24/31.98 <=> ( v1733(VarCurr)
% 32.24/31.98 | v1746(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_349,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1746(VarCurr)
% 32.24/31.98 <=> ( v1747(VarCurr)
% 32.24/31.98 & v1360(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_348,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1747(VarCurr)
% 32.24/31.98 <=> ( v1677(VarCurr)
% 32.24/31.98 & v907(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_347,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1733(VarCurr)
% 32.24/31.98 <=> ( v1734(VarCurr)
% 32.24/31.98 | v1744(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_346,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1744(VarCurr)
% 32.24/31.98 <=> ( v1745(VarCurr)
% 32.24/31.98 & v1278(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_345,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1745(VarCurr)
% 32.24/31.98 <=> ( v1689(VarCurr)
% 32.24/31.98 & v907(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_344,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1734(VarCurr)
% 32.24/31.98 <=> ( v1735(VarCurr)
% 32.24/31.98 | v1742(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_343,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1742(VarCurr)
% 32.24/31.98 <=> ( v1743(VarCurr)
% 32.24/31.98 & v1355(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_342,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1743(VarCurr)
% 32.24/31.98 <=> ( v1677(VarCurr)
% 32.24/31.98 & v907(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_341,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1735(VarCurr)
% 32.24/31.98 <=> ( v1736(VarCurr)
% 32.24/31.98 | v1739(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_340,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1739(VarCurr)
% 32.24/31.98 <=> ( v1740(VarCurr)
% 32.24/31.98 & v1238(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_339,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1740(VarCurr)
% 32.24/31.98 <=> ( v1689(VarCurr)
% 32.24/31.98 & v907(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_338,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1736(VarCurr)
% 32.24/31.98 <=> ( v1737(VarCurr)
% 32.24/31.98 & v1348(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_337,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1737(VarCurr)
% 32.24/31.98 <=> ( v1677(VarCurr)
% 32.24/31.98 & v907(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addCaseBooleanConditionEqualRanges1_16,axiom,
% 32.24/31.98 ! [VarNext,VarCurr] :
% 32.24/31.98 ( nextState(VarCurr,VarNext)
% 32.24/31.98 => ( ~ v1717(VarNext)
% 32.24/31.98 => ( v31(VarNext,bitIndex0)
% 32.24/31.98 <=> v31(VarCurr,bitIndex0) ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addCaseBooleanConditionEqualRanges0_26,axiom,
% 32.24/31.98 ! [VarNext] :
% 32.24/31.98 ( v1717(VarNext)
% 32.24/31.98 => ( v31(VarNext,bitIndex0)
% 32.24/31.98 <=> v1725(VarNext) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addAssignment_330,axiom,
% 32.24/31.98 ! [VarNext,VarCurr] :
% 32.24/31.98 ( nextState(VarCurr,VarNext)
% 32.24/31.98 => ( v1725(VarNext)
% 32.24/31.98 <=> v1723(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(aaddConditionBooleanCondEqualRangesElseBranch_50,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( ~ v1254(VarCurr)
% 32.24/31.98 => ( v1723(VarCurr)
% 32.24/31.98 <=> v36(VarCurr,bitIndex0) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addConditionBooleanCondEqualRangesThenBranch_53,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1254(VarCurr)
% 32.24/31.98 => ( v1723(VarCurr)
% 32.24/31.98 <=> $true ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_336,axiom,
% 32.24/31.98 ! [VarNext,VarCurr] :
% 32.24/31.98 ( nextState(VarCurr,VarNext)
% 32.24/31.98 => ( v1717(VarNext)
% 32.24/31.98 <=> v1718(VarNext) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_335,axiom,
% 32.24/31.98 ! [VarNext,VarCurr] :
% 32.24/31.98 ( nextState(VarCurr,VarNext)
% 32.24/31.98 => ( v1718(VarNext)
% 32.24/31.98 <=> ( v1720(VarNext)
% 32.24/31.98 & v1240(VarNext) ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeUnaryOperator_170,axiom,
% 32.24/31.98 ! [VarNext,VarCurr] :
% 32.24/31.98 ( nextState(VarCurr,VarNext)
% 32.24/31.98 => ( ~ v1720(VarNext)
% 32.24/31.98 <=> v1247(VarNext) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(aaddConditionBooleanCondEqualRangesElseBranch_49,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( ~ v1660(VarCurr)
% 32.24/31.98 => ( v36(VarCurr,bitIndex0)
% 32.24/31.98 <=> $false ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addConditionBooleanCondEqualRangesThenBranch_52,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1660(VarCurr)
% 32.24/31.98 => ( v36(VarCurr,bitIndex0)
% 32.24/31.98 <=> $true ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_334,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1660(VarCurr)
% 32.24/31.98 <=> ( v1661(VarCurr)
% 32.24/31.98 | v1711(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_333,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1711(VarCurr)
% 32.24/31.98 <=> ( v1712(VarCurr)
% 32.24/31.98 & v1323(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_332,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1712(VarCurr)
% 32.24/31.98 <=> ( v1713(VarCurr)
% 32.24/31.98 | v1714(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_331,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1714(VarCurr)
% 32.24/31.98 <=> ( v1677(VarCurr)
% 32.24/31.98 & v1682(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addAssignment_329,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1713(VarCurr)
% 32.24/31.98 <=> v1671(VarCurr) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_330,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1661(VarCurr)
% 32.24/31.98 <=> ( v1662(VarCurr)
% 32.24/31.98 | v1707(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_329,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1707(VarCurr)
% 32.24/31.98 <=> ( v1708(VarCurr)
% 32.24/31.98 & v1300(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_328,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1708(VarCurr)
% 32.24/31.98 <=> ( v1709(VarCurr)
% 32.24/31.98 | v1710(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_327,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1710(VarCurr)
% 32.24/31.98 <=> ( v1689(VarCurr)
% 32.24/31.98 & v1682(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_326,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1709(VarCurr)
% 32.24/31.98 <=> ( v1671(VarCurr)
% 32.24/31.98 & v1180(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_325,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1662(VarCurr)
% 32.24/31.98 <=> ( v1663(VarCurr)
% 32.24/31.98 | v1701(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_324,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1701(VarCurr)
% 32.24/31.98 <=> ( v1702(VarCurr)
% 32.24/31.98 & v1360(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_323,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1702(VarCurr)
% 32.24/31.98 <=> ( v1703(VarCurr)
% 32.24/31.98 | v1706(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_322,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1706(VarCurr)
% 32.24/31.98 <=> ( v1677(VarCurr)
% 32.24/31.98 & v1682(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_321,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1703(VarCurr)
% 32.24/31.98 <=> ( v1704(VarCurr)
% 32.24/31.98 | v1705(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addAssignment_328,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1705(VarCurr)
% 32.24/31.98 <=> v1671(VarCurr) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addAssignment_327,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1704(VarCurr)
% 32.24/31.98 <=> v38(VarCurr) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_320,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1663(VarCurr)
% 32.24/31.98 <=> ( v1664(VarCurr)
% 32.24/31.98 | v1697(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_319,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1697(VarCurr)
% 32.24/31.98 <=> ( v1698(VarCurr)
% 32.24/31.98 & v1278(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_318,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1698(VarCurr)
% 32.24/31.98 <=> ( v1699(VarCurr)
% 32.24/31.98 | v1700(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_317,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1700(VarCurr)
% 32.24/31.98 <=> ( v1689(VarCurr)
% 32.24/31.98 & v1682(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_316,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1699(VarCurr)
% 32.24/31.98 <=> ( v1671(VarCurr)
% 32.24/31.98 & v1180(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_315,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1664(VarCurr)
% 32.24/31.98 <=> ( v1665(VarCurr)
% 32.24/31.98 | v1691(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_314,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1691(VarCurr)
% 32.24/31.98 <=> ( v1692(VarCurr)
% 32.24/31.98 & v1355(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_313,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1692(VarCurr)
% 32.24/31.98 <=> ( v1693(VarCurr)
% 32.24/31.98 | v1696(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_312,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1696(VarCurr)
% 32.24/31.98 <=> ( v1677(VarCurr)
% 32.24/31.98 & v1682(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_311,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1693(VarCurr)
% 32.24/31.98 <=> ( v1694(VarCurr)
% 32.24/31.98 | v1695(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addAssignment_326,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1695(VarCurr)
% 32.24/31.98 <=> v1671(VarCurr) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addAssignment_325,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1694(VarCurr)
% 32.24/31.98 <=> v38(VarCurr) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_310,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1665(VarCurr)
% 32.24/31.98 <=> ( v1666(VarCurr)
% 32.24/31.98 | v1683(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_309,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1683(VarCurr)
% 32.24/31.98 <=> ( v1684(VarCurr)
% 32.24/31.98 & v1238(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_308,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1684(VarCurr)
% 32.24/31.98 <=> ( v1685(VarCurr)
% 32.24/31.98 | v1687(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_307,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1687(VarCurr)
% 32.24/31.98 <=> ( v1689(VarCurr)
% 32.24/31.98 & v1682(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_306,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1689(VarCurr)
% 32.24/31.98 <=> ( v1690(VarCurr)
% 32.24/31.98 & v1681(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_305,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1690(VarCurr)
% 32.24/31.98 <=> ( v1678(VarCurr)
% 32.24/31.98 & v1180(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_304,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1685(VarCurr)
% 32.24/31.98 <=> ( v1671(VarCurr)
% 32.24/31.98 & v1180(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_303,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1671(VarCurr)
% 32.24/31.98 <=> ( v1672(VarCurr)
% 32.24/31.98 & v1347(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_302,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1666(VarCurr)
% 32.24/31.98 <=> ( v1667(VarCurr)
% 32.24/31.98 & v1348(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_301,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1667(VarCurr)
% 32.24/31.98 <=> ( v1668(VarCurr)
% 32.24/31.98 | v1675(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_300,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1675(VarCurr)
% 32.24/31.98 <=> ( v1677(VarCurr)
% 32.24/31.98 & v1682(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeUnaryOperator_169,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( ~ v1682(VarCurr)
% 32.24/31.98 <=> v907(VarCurr) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_299,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1677(VarCurr)
% 32.24/31.98 <=> ( v1678(VarCurr)
% 32.24/31.98 & v1681(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeUnaryOperator_168,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( ~ v1681(VarCurr)
% 32.24/31.98 <=> v1162(VarCurr) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_298,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1678(VarCurr)
% 32.24/31.98 <=> ( v1679(VarCurr)
% 32.24/31.98 & v1347(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_297,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1679(VarCurr)
% 32.24/31.98 <=> ( v1680(VarCurr)
% 32.24/31.98 & v1346(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_296,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1680(VarCurr)
% 32.24/31.98 <=> ( v87(VarCurr)
% 32.24/31.98 & v1674(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_295,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1668(VarCurr)
% 32.24/31.98 <=> ( v1669(VarCurr)
% 32.24/31.98 | v1670(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_294,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1670(VarCurr)
% 32.24/31.98 <=> ( v1672(VarCurr)
% 32.24/31.98 & v1347(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_293,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1672(VarCurr)
% 32.24/31.98 <=> ( v1673(VarCurr)
% 32.24/31.98 & v1346(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_292,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1673(VarCurr)
% 32.24/31.98 <=> ( v1345(VarCurr)
% 32.24/31.98 & v1674(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeUnaryOperator_167,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( ~ v1674(VarCurr)
% 32.24/31.98 <=> v881(VarCurr) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addAssignment_324,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1669(VarCurr)
% 32.24/31.98 <=> v38(VarCurr) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addAssignment_323,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1180(VarCurr)
% 32.24/31.98 <=> v1182(VarCurr) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addAssignment_322,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1182(VarCurr)
% 32.24/31.98 <=> v1184(VarCurr) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_291,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1184(VarCurr)
% 32.24/31.98 <=> ( v1186(VarCurr)
% 32.24/31.98 & v1656(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorShiftedRanges_80,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1656(VarCurr)
% 32.24/31.98 <=> ( v1377(VarCurr,bitIndex2)
% 32.24/31.98 | v1377(VarCurr,bitIndex4) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addAssignment_321,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1186(VarCurr)
% 32.24/31.98 <=> v1188(VarCurr) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addAssignment_320,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1188(VarCurr)
% 32.24/31.98 <=> v1190(VarCurr) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addAssignment_319,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1190(VarCurr)
% 32.24/31.98 <=> v1192(VarCurr) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addAssignment_318,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1192(VarCurr)
% 32.24/31.98 <=> v1194(VarCurr) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addAssignment_317,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1194(VarCurr)
% 32.24/31.98 <=> v1196(VarCurr) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addCaseBooleanConditionEqualRanges1_15,axiom,
% 32.24/31.98 ! [VarNext,VarCurr] :
% 32.24/31.98 ( nextState(VarCurr,VarNext)
% 32.24/31.98 => ( ~ v1643(VarNext)
% 32.24/31.98 => ( v1196(VarNext)
% 32.24/31.98 <=> v1196(VarCurr) ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addCaseBooleanConditionEqualRanges0_25,axiom,
% 32.24/31.98 ! [VarNext] :
% 32.24/31.98 ( v1643(VarNext)
% 32.24/31.98 => ( v1196(VarNext)
% 32.24/31.98 <=> v1651(VarNext) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addAssignment_316,axiom,
% 32.24/31.98 ! [VarNext,VarCurr] :
% 32.24/31.98 ( nextState(VarCurr,VarNext)
% 32.24/31.98 => ( v1651(VarNext)
% 32.24/31.98 <=> v1649(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(aaddConditionBooleanCondEqualRangesElseBranch_48,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( ~ v1652(VarCurr)
% 32.24/31.98 => ( v1649(VarCurr)
% 32.24/31.98 <=> v1202(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addConditionBooleanCondEqualRangesThenBranch_51,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1652(VarCurr)
% 32.24/31.98 => ( v1649(VarCurr)
% 32.24/31.98 <=> $false ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeUnaryOperator_166,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( ~ v1652(VarCurr)
% 32.24/31.98 <=> v1198(VarCurr) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_290,axiom,
% 32.24/31.98 ! [VarNext,VarCurr] :
% 32.24/31.98 ( nextState(VarCurr,VarNext)
% 32.24/31.98 => ( v1643(VarNext)
% 32.24/31.98 <=> v1644(VarNext) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_289,axiom,
% 32.24/31.98 ! [VarNext,VarCurr] :
% 32.24/31.98 ( nextState(VarCurr,VarNext)
% 32.24/31.98 => ( v1644(VarNext)
% 32.24/31.98 <=> ( v1645(VarNext)
% 32.24/31.98 & v1540(VarNext) ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeUnaryOperator_165,axiom,
% 32.24/31.98 ! [VarNext,VarCurr] :
% 32.24/31.98 ( nextState(VarCurr,VarNext)
% 32.24/31.98 => ( ~ v1645(VarNext)
% 32.24/31.98 <=> v1549(VarNext) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(aaddConditionBooleanCondEqualRangesElseBranch_47,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( ~ v1602(VarCurr)
% 32.24/31.98 => ( v1202(VarCurr)
% 32.24/31.98 <=> $false ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addConditionBooleanCondEqualRangesThenBranch_50,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1602(VarCurr)
% 32.24/31.98 => ( v1202(VarCurr)
% 32.24/31.98 <=> v1626(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addParallelCaseBooleanConditionEqualRanges1_11,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( ~ v1563(VarCurr)
% 32.24/31.98 => ( v1626(VarCurr)
% 32.24/31.98 <=> $false ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addParallelCaseBooleanConditionEqualRanges0_11,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1563(VarCurr)
% 32.24/31.98 => ( v1626(VarCurr)
% 32.24/31.98 <=> v1627(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_288,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1633(VarCurr)
% 32.24/31.98 <=> ( v1635(VarCurr)
% 32.24/31.98 | v1615(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_287,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1635(VarCurr)
% 32.24/31.98 <=> ( v1636(VarCurr)
% 32.24/31.98 | v1614(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_286,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1636(VarCurr)
% 32.24/31.98 <=> ( v1637(VarCurr)
% 32.24/31.98 | v1613(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_285,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1637(VarCurr)
% 32.24/31.98 <=> ( v1638(VarCurr)
% 32.24/31.98 | v1583(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_284,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1638(VarCurr)
% 32.24/31.98 <=> ( v1639(VarCurr)
% 32.24/31.98 | v1582(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_283,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1639(VarCurr)
% 32.24/31.98 <=> ( v1640(VarCurr)
% 32.24/31.98 | v1581(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_282,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1640(VarCurr)
% 32.24/31.98 <=> ( v1566(VarCurr)
% 32.24/31.98 | v1580(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_281,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1566(VarCurr)
% 32.24/31.98 <=> ( v1567(VarCurr)
% 32.24/31.98 | v1572(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(aaddConditionBooleanCondEqualRangesElseBranch_46,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( ~ v1208(VarCurr)
% 32.24/31.98 => ( v1627(VarCurr)
% 32.24/31.98 <=> $false ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addConditionBooleanCondEqualRangesThenBranch_49,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1208(VarCurr)
% 32.24/31.98 => ( v1627(VarCurr)
% 32.24/31.98 <=> v1628(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(aaddConditionBooleanCondEqualRangesElseBranch_45,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( ~ v1629(VarCurr)
% 32.24/31.98 => ( v1628(VarCurr)
% 32.24/31.98 <=> $true ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addConditionBooleanCondEqualRangesThenBranch_48,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1629(VarCurr)
% 32.24/31.98 => ( v1628(VarCurr)
% 32.24/31.98 <=> $false ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_280,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1629(VarCurr)
% 32.24/31.98 <=> ( v1630(VarCurr)
% 32.24/31.98 & v1538(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_279,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1630(VarCurr)
% 32.24/31.98 <=> ( v1631(VarCurr)
% 32.24/31.98 | v1632(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addBitVectorEqualityBitBlasted_65,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1632(VarCurr)
% 32.24/31.98 <=> ( ( v1497(VarCurr,bitIndex3)
% 32.24/31.98 <=> $true )
% 32.24/31.98 & ( v1497(VarCurr,bitIndex2)
% 32.24/31.98 <=> $true )
% 32.24/31.98 & ( v1497(VarCurr,bitIndex1)
% 32.24/31.98 <=> $false )
% 32.24/31.98 & ( v1497(VarCurr,bitIndex0)
% 32.24/31.98 <=> $true ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addBitVectorEqualityBitBlasted_64,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1631(VarCurr)
% 32.24/31.98 <=> ( ( v1497(VarCurr,bitIndex3)
% 32.24/31.98 <=> $false )
% 32.24/31.98 & ( v1497(VarCurr,bitIndex2)
% 32.24/31.98 <=> $true )
% 32.24/31.98 & ( v1497(VarCurr,bitIndex1)
% 32.24/31.98 <=> $false )
% 32.24/31.98 & ( v1497(VarCurr,bitIndex0)
% 32.24/31.98 <=> $true ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_278,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1602(VarCurr)
% 32.24/31.98 <=> ( v1603(VarCurr)
% 32.24/31.98 | v1615(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeUnaryOperator_164,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( ~ v1615(VarCurr)
% 32.24/31.98 <=> v1616(VarCurr) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_277,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1616(VarCurr)
% 32.24/31.98 <=> ( v1617(VarCurr)
% 32.24/31.98 | v1584(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_276,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1617(VarCurr)
% 32.24/31.98 <=> ( v1618(VarCurr)
% 32.24/31.98 | v1583(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_275,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1618(VarCurr)
% 32.24/31.98 <=> ( v1619(VarCurr)
% 32.24/31.98 | v1582(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_274,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1619(VarCurr)
% 32.24/31.98 <=> ( v1620(VarCurr)
% 32.24/31.98 | v1581(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_273,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1620(VarCurr)
% 32.24/31.98 <=> ( v1621(VarCurr)
% 32.24/31.98 | v1580(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_272,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1621(VarCurr)
% 32.24/31.98 <=> ( v1622(VarCurr)
% 32.24/31.98 | v1573(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_271,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1622(VarCurr)
% 32.24/31.98 <=> ( v1623(VarCurr)
% 32.24/31.98 | v1572(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_270,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1623(VarCurr)
% 32.24/31.98 <=> ( v1624(VarCurr)
% 32.24/31.98 | v1571(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_269,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1624(VarCurr)
% 32.24/31.98 <=> ( v1625(VarCurr)
% 32.24/31.98 | v1570(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_268,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1625(VarCurr)
% 32.24/31.98 <=> ( v1563(VarCurr)
% 32.24/31.98 | v1569(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_267,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1603(VarCurr)
% 32.24/31.98 <=> ( v1604(VarCurr)
% 32.24/31.98 | v1614(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_266,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1614(VarCurr)
% 32.24/31.98 <=> ( v1586(VarCurr)
% 32.24/31.98 & v1584(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_265,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1604(VarCurr)
% 32.24/31.98 <=> ( v1605(VarCurr)
% 32.24/31.98 | v1583(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_264,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1605(VarCurr)
% 32.24/31.98 <=> ( v1606(VarCurr)
% 32.24/31.98 | v1582(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_263,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1606(VarCurr)
% 32.24/31.98 <=> ( v1607(VarCurr)
% 32.24/31.98 | v1581(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_262,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1607(VarCurr)
% 32.24/31.98 <=> ( v1608(VarCurr)
% 32.24/31.98 | v1580(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_261,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1608(VarCurr)
% 32.24/31.98 <=> ( v1609(VarCurr)
% 32.24/31.98 | v1613(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_260,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1613(VarCurr)
% 32.24/31.98 <=> ( v1575(VarCurr)
% 32.24/31.98 & v1573(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_259,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1609(VarCurr)
% 32.24/31.98 <=> ( v1610(VarCurr)
% 32.24/31.98 | v1572(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_258,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1610(VarCurr)
% 32.24/31.98 <=> ( v1611(VarCurr)
% 32.24/31.98 | v1571(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_257,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1611(VarCurr)
% 32.24/31.98 <=> ( v1612(VarCurr)
% 32.24/31.98 | v1570(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_256,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1612(VarCurr)
% 32.24/31.98 <=> ( v1563(VarCurr)
% 32.24/31.98 | v1569(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addCaseBooleanConditionEqualRanges1_14,axiom,
% 32.24/31.98 ! [VarNext,VarCurr] :
% 32.24/31.98 ( nextState(VarCurr,VarNext)
% 32.24/31.98 => ( ~ v1589(VarNext)
% 32.24/31.98 => ! [B] :
% 32.24/31.98 ( range_3_0(B)
% 32.24/31.98 => ( v1204(VarNext,B)
% 32.24/31.98 <=> v1204(VarCurr,B) ) ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addCaseBooleanConditionEqualRanges0_24,axiom,
% 32.24/31.98 ! [VarNext] :
% 32.24/31.98 ( v1589(VarNext)
% 32.24/31.98 => ! [B] :
% 32.24/31.98 ( range_3_0(B)
% 32.24/31.98 => ( v1204(VarNext,B)
% 32.24/31.98 <=> v1597(VarNext,B) ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addAssignment_315,axiom,
% 32.24/31.98 ! [VarNext,VarCurr] :
% 32.24/31.98 ( nextState(VarCurr,VarNext)
% 32.24/31.98 => ! [B] :
% 32.24/31.98 ( range_3_0(B)
% 32.24/31.98 => ( v1597(VarNext,B)
% 32.24/31.98 <=> v1595(VarCurr,B) ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(aaddConditionBooleanCondEqualRangesElseBranch_44,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( ~ v1598(VarCurr)
% 32.24/31.98 => ! [B] :
% 32.24/31.98 ( range_3_0(B)
% 32.24/31.98 => ( v1595(VarCurr,B)
% 32.24/31.98 <=> v1206(VarCurr,B) ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addConditionBooleanCondEqualRangesThenBranch_47,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1598(VarCurr)
% 32.24/31.98 => ! [B] :
% 32.24/31.98 ( range_3_0(B)
% 32.24/31.98 => ( v1595(VarCurr,B)
% 32.24/31.98 <=> $false ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeUnaryOperator_163,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( ~ v1598(VarCurr)
% 32.24/31.98 <=> v1198(VarCurr) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_255,axiom,
% 32.24/31.98 ! [VarNext,VarCurr] :
% 32.24/31.98 ( nextState(VarCurr,VarNext)
% 32.24/31.98 => ( v1589(VarNext)
% 32.24/31.98 <=> v1590(VarNext) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_254,axiom,
% 32.24/31.98 ! [VarNext,VarCurr] :
% 32.24/31.98 ( nextState(VarCurr,VarNext)
% 32.24/31.98 => ( v1590(VarNext)
% 32.24/31.98 <=> ( v1591(VarNext)
% 32.24/31.98 & v1540(VarNext) ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeUnaryOperator_162,axiom,
% 32.24/31.98 ! [VarNext,VarCurr] :
% 32.24/31.98 ( nextState(VarCurr,VarNext)
% 32.24/31.98 => ( ~ v1591(VarNext)
% 32.24/31.98 <=> v1549(VarNext) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addParallelCaseBooleanConditionEqualRanges5,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( ( ~ v1563(VarCurr)
% 32.24/31.98 & ~ v1565(VarCurr)
% 32.24/31.98 & ~ v1573(VarCurr)
% 32.24/31.98 & ~ v1576(VarCurr)
% 32.24/31.98 & ~ v1584(VarCurr) )
% 32.24/31.98 => ! [B] :
% 32.24/31.98 ( range_3_0(B)
% 32.24/31.98 => ( v1206(VarCurr,B)
% 32.24/31.98 <=> $false ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addParallelCaseBooleanConditionEqualRanges4,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1584(VarCurr)
% 32.24/31.98 => ! [B] :
% 32.24/31.98 ( range_3_0(B)
% 32.24/31.98 => ( v1206(VarCurr,B)
% 32.24/31.98 <=> v1585(VarCurr,B) ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addParallelCaseBooleanConditionEqualRanges3_4,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1576(VarCurr)
% 32.24/31.98 => ! [B] :
% 32.24/31.98 ( range_3_0(B)
% 32.24/31.98 => ( v1206(VarCurr,B)
% 32.24/31.98 <=> $false ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addParallelCaseBooleanConditionEqualRanges2_4,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1573(VarCurr)
% 32.24/31.98 => ! [B] :
% 32.24/31.98 ( range_3_0(B)
% 32.24/31.98 => ( v1206(VarCurr,B)
% 32.24/31.98 <=> v1574(VarCurr,B) ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addParallelCaseBooleanConditionEqualRanges1_10,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1565(VarCurr)
% 32.24/31.98 => ! [B] :
% 32.24/31.98 ( range_3_0(B)
% 32.24/31.98 => ( v1206(VarCurr,B)
% 32.24/31.98 <=> $false ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addParallelCaseBooleanConditionEqualRanges0_10,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1563(VarCurr)
% 32.24/31.98 => ! [B] :
% 32.24/31.98 ( range_3_0(B)
% 32.24/31.98 => ( v1206(VarCurr,B)
% 32.24/31.98 <=> v1564(VarCurr,B) ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(aaddConditionBooleanCondEqualRangesElseBranch_43,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( ~ v1586(VarCurr)
% 32.24/31.98 => ! [B] :
% 32.24/31.98 ( range_3_0(B)
% 32.24/31.98 => ( v1585(VarCurr,B)
% 32.24/31.98 <=> $false ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addConditionBooleanCondEqualRangesThenBranch_46,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1586(VarCurr)
% 32.24/31.98 => ! [B] :
% 32.24/31.98 ( range_3_0(B)
% 32.24/31.98 => ( v1585(VarCurr,B)
% 32.24/31.98 <=> $false ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeUnaryOperator_161,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( ~ v1586(VarCurr)
% 32.24/31.98 <=> v1536(VarCurr) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addBitVectorEqualityBitBlasted_63,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1584(VarCurr)
% 32.24/31.98 <=> ( ( v1204(VarCurr,bitIndex3)
% 32.24/31.98 <=> $true )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex2)
% 32.24/31.98 <=> $true )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex1)
% 32.24/31.98 <=> $false )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex0)
% 32.24/31.98 <=> $true ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(bitBlastConstant_289,axiom,
% 32.24/31.98 b1101(bitIndex3) ).
% 32.24/31.98
% 32.24/31.98 fof(bitBlastConstant_288,axiom,
% 32.24/31.98 b1101(bitIndex2) ).
% 32.24/31.98
% 32.24/31.98 fof(bitBlastConstant_287,axiom,
% 32.24/31.98 ~ b1101(bitIndex1) ).
% 32.24/31.98
% 32.24/31.98 fof(bitBlastConstant_286,axiom,
% 32.24/31.98 b1101(bitIndex0) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_253,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1576(VarCurr)
% 32.24/31.98 <=> ( v1578(VarCurr)
% 32.24/31.98 | v1583(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addBitVectorEqualityBitBlasted_62,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1583(VarCurr)
% 32.24/31.98 <=> ( ( v1204(VarCurr,bitIndex3)
% 32.24/31.98 <=> $true )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex2)
% 32.24/31.98 <=> $true )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex1)
% 32.24/31.98 <=> $false )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex0)
% 32.24/31.98 <=> $false ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_252,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1578(VarCurr)
% 32.24/31.98 <=> ( v1579(VarCurr)
% 32.24/31.98 | v1582(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addBitVectorEqualityBitBlasted_61,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1582(VarCurr)
% 32.24/31.98 <=> ( ( v1204(VarCurr,bitIndex3)
% 32.24/31.98 <=> $true )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex2)
% 32.24/31.98 <=> $false )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex1)
% 32.24/31.98 <=> $true )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex0)
% 32.24/31.98 <=> $true ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(bitBlastConstant_285,axiom,
% 32.24/31.98 b1011(bitIndex3) ).
% 32.24/31.98
% 32.24/31.98 fof(bitBlastConstant_284,axiom,
% 32.24/31.98 ~ b1011(bitIndex2) ).
% 32.24/31.98
% 32.24/31.98 fof(bitBlastConstant_283,axiom,
% 32.24/31.98 b1011(bitIndex1) ).
% 32.24/31.98
% 32.24/31.98 fof(bitBlastConstant_282,axiom,
% 32.24/31.98 b1011(bitIndex0) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_251,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1579(VarCurr)
% 32.24/31.98 <=> ( v1580(VarCurr)
% 32.24/31.98 | v1581(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addBitVectorEqualityBitBlasted_60,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1581(VarCurr)
% 32.24/31.98 <=> ( ( v1204(VarCurr,bitIndex3)
% 32.24/31.98 <=> $true )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex2)
% 32.24/31.98 <=> $false )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex1)
% 32.24/31.98 <=> $true )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex0)
% 32.24/31.98 <=> $false ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(bitBlastConstant_281,axiom,
% 32.24/31.98 b1010(bitIndex3) ).
% 32.24/31.98
% 32.24/31.98 fof(bitBlastConstant_280,axiom,
% 32.24/31.98 ~ b1010(bitIndex2) ).
% 32.24/31.98
% 32.24/31.98 fof(bitBlastConstant_279,axiom,
% 32.24/31.98 b1010(bitIndex1) ).
% 32.24/31.98
% 32.24/31.98 fof(bitBlastConstant_278,axiom,
% 32.24/31.98 ~ b1010(bitIndex0) ).
% 32.24/31.98
% 32.24/31.98 fof(addBitVectorEqualityBitBlasted_59,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1580(VarCurr)
% 32.24/31.98 <=> ( ( v1204(VarCurr,bitIndex3)
% 32.24/31.98 <=> $true )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex2)
% 32.24/31.98 <=> $false )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex1)
% 32.24/31.98 <=> $false )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex0)
% 32.24/31.98 <=> $true ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(bitBlastConstant_277,axiom,
% 32.24/31.98 b1001(bitIndex3) ).
% 32.24/31.98
% 32.24/31.98 fof(bitBlastConstant_276,axiom,
% 32.24/31.98 ~ b1001(bitIndex2) ).
% 32.24/31.98
% 32.24/31.98 fof(bitBlastConstant_275,axiom,
% 32.24/31.98 ~ b1001(bitIndex1) ).
% 32.24/31.98
% 32.24/31.98 fof(bitBlastConstant_274,axiom,
% 32.24/31.98 b1001(bitIndex0) ).
% 32.24/31.98
% 32.24/31.98 fof(aaddConditionBooleanCondEqualRangesElseBranch_42,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( ~ v1575(VarCurr)
% 32.24/31.98 => ! [B] :
% 32.24/31.98 ( range_3_0(B)
% 32.24/31.98 => ( v1574(VarCurr,B)
% 32.24/31.98 <=> $false ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addConditionBooleanCondEqualRangesThenBranch_45,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1575(VarCurr)
% 32.24/31.98 => ! [B] :
% 32.24/31.98 ( range_3_0(B)
% 32.24/31.98 => ( v1574(VarCurr,B)
% 32.24/31.98 <=> $false ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeUnaryOperator_160,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( ~ v1575(VarCurr)
% 32.24/31.98 <=> v1536(VarCurr) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addBitVectorEqualityBitBlasted_58,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1573(VarCurr)
% 32.24/31.98 <=> ( ( v1204(VarCurr,bitIndex3)
% 32.24/31.98 <=> $false )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex2)
% 32.24/31.98 <=> $true )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex1)
% 32.24/31.98 <=> $false )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex0)
% 32.24/31.98 <=> $true ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_250,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1565(VarCurr)
% 32.24/31.98 <=> ( v1567(VarCurr)
% 32.24/31.98 | v1572(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addBitVectorEqualityBitBlasted_57,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1572(VarCurr)
% 32.24/31.98 <=> ( ( v1204(VarCurr,bitIndex3)
% 32.24/31.98 <=> $false )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex2)
% 32.24/31.98 <=> $true )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex1)
% 32.24/31.98 <=> $false )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex0)
% 32.24/31.98 <=> $false ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(bitBlastConstant_273,axiom,
% 32.24/31.98 ~ b0100(bitIndex3) ).
% 32.24/31.98
% 32.24/31.98 fof(bitBlastConstant_272,axiom,
% 32.24/31.98 b0100(bitIndex2) ).
% 32.24/31.98
% 32.24/31.98 fof(bitBlastConstant_271,axiom,
% 32.24/31.98 ~ b0100(bitIndex1) ).
% 32.24/31.98
% 32.24/31.98 fof(bitBlastConstant_270,axiom,
% 32.24/31.98 ~ b0100(bitIndex0) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_249,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1567(VarCurr)
% 32.24/31.98 <=> ( v1568(VarCurr)
% 32.24/31.98 | v1571(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addBitVectorEqualityBitBlasted_56,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1571(VarCurr)
% 32.24/31.98 <=> ( ( v1204(VarCurr,bitIndex3)
% 32.24/31.98 <=> $false )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex2)
% 32.24/31.98 <=> $false )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex1)
% 32.24/31.98 <=> $true )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex0)
% 32.24/31.98 <=> $true ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(writeBinaryOperatorEqualRangesSingleBits_248,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1568(VarCurr)
% 32.24/31.98 <=> ( v1569(VarCurr)
% 32.24/31.98 | v1570(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addBitVectorEqualityBitBlasted_55,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1570(VarCurr)
% 32.24/31.98 <=> ( ( v1204(VarCurr,bitIndex3)
% 32.24/31.98 <=> $false )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex2)
% 32.24/31.98 <=> $false )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex1)
% 32.24/31.98 <=> $true )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex0)
% 32.24/31.98 <=> $false ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(bitBlastConstant_269,axiom,
% 32.24/31.98 ~ b0010(bitIndex3) ).
% 32.24/31.98
% 32.24/31.98 fof(bitBlastConstant_268,axiom,
% 32.24/31.98 ~ b0010(bitIndex2) ).
% 32.24/31.98
% 32.24/31.98 fof(bitBlastConstant_267,axiom,
% 32.24/31.98 b0010(bitIndex1) ).
% 32.24/31.98
% 32.24/31.98 fof(bitBlastConstant_266,axiom,
% 32.24/31.98 ~ b0010(bitIndex0) ).
% 32.24/31.98
% 32.24/31.98 fof(addBitVectorEqualityBitBlasted_54,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1569(VarCurr)
% 32.24/31.98 <=> ( ( v1204(VarCurr,bitIndex3)
% 32.24/31.98 <=> $false )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex2)
% 32.24/31.98 <=> $false )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex1)
% 32.24/31.98 <=> $false )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex0)
% 32.24/31.98 <=> $true ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(aaddConditionBooleanCondEqualRangesElseBranch_41,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( ~ v1208(VarCurr)
% 32.24/31.98 => ! [B] :
% 32.24/31.98 ( range_3_0(B)
% 32.24/31.98 => ( v1564(VarCurr,B)
% 32.24/31.98 <=> $false ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addConditionBooleanCondEqualRangesThenBranch_44,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1208(VarCurr)
% 32.24/31.98 => ! [B] :
% 32.24/31.98 ( range_3_0(B)
% 32.24/31.98 => ( v1564(VarCurr,B)
% 32.24/31.98 <=> v1497(VarCurr,B) ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addBitVectorEqualityBitBlasted_53,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( v1563(VarCurr)
% 32.24/31.98 <=> ( ( v1204(VarCurr,bitIndex3)
% 32.24/31.98 <=> $false )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex2)
% 32.24/31.98 <=> $false )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex1)
% 32.24/31.98 <=> $false )
% 32.24/31.98 & ( v1204(VarCurr,bitIndex0)
% 32.24/31.98 <=> $false ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addAssignmentInitValueVector_15,axiom,
% 32.24/31.98 ! [B] :
% 32.24/31.98 ( range_3_0(B)
% 32.24/31.98 => ( v1204(constB0,B)
% 32.24/31.98 <=> $false ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addCaseBooleanConditionEqualRanges1_13,axiom,
% 32.24/31.98 ! [VarNext,VarCurr] :
% 32.24/31.98 ( nextState(VarCurr,VarNext)
% 32.24/31.98 => ( ~ v1545(VarNext)
% 32.24/31.98 => ( v1536(VarNext)
% 32.24/31.98 <=> v1536(VarCurr) ) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addCaseBooleanConditionEqualRanges0_23,axiom,
% 32.24/31.98 ! [VarNext] :
% 32.24/31.98 ( v1545(VarNext)
% 32.24/31.98 => ( v1536(VarNext)
% 32.24/31.98 <=> v1555(VarNext) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(addAssignment_314,axiom,
% 32.24/31.98 ! [VarNext,VarCurr] :
% 32.24/31.98 ( nextState(VarCurr,VarNext)
% 32.24/31.98 => ( v1555(VarNext)
% 32.24/31.98 <=> v1553(VarCurr) ) ) ).
% 32.24/31.98
% 32.24/31.98 fof(aaddConditionBooleanCondEqualRangesElseBranch_40,axiom,
% 32.24/31.98 ! [VarCurr] :
% 32.24/31.98 ( ~ v1556(VarCurr)
% 32.24/31.98 => ( v1553(VarCurr)
% 32.24/31.98 <=> v1538(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addConditionBooleanCondEqualRangesThenBranch_43,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1556(VarCurr)
% 32.24/31.99 => ( v1553(VarCurr)
% 32.24/31.99 <=> $false ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_159,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1556(VarCurr)
% 32.24/31.99 <=> v1198(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_247,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1545(VarNext)
% 32.24/31.99 <=> v1546(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_246,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1546(VarNext)
% 32.24/31.99 <=> ( v1547(VarNext)
% 32.24/31.99 & v1540(VarNext) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_158,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( ~ v1547(VarNext)
% 32.24/31.99 <=> v1549(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_313,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1549(VarNext)
% 32.24/31.99 <=> v1540(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignmentInitValueVector_14,axiom,
% 32.24/31.99 ( v1536(constB0)
% 32.24/31.99 <=> $false ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_312,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1540(VarCurr)
% 32.24/31.99 <=> v1542(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_311,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1542(VarCurr)
% 32.24/31.99 <=> v1(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_310,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1538(VarCurr)
% 32.24/31.99 <=> $false ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_309,axiom,
% 32.24/31.99 ! [VarCurr,B] :
% 32.24/31.99 ( range_3_0(B)
% 32.24/31.99 => ( v1497(VarCurr,B)
% 32.24/31.99 <=> v1499(VarCurr,B) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_308,axiom,
% 32.24/31.99 ! [VarCurr,B] :
% 32.24/31.99 ( range_3_0(B)
% 32.24/31.99 => ( v1499(VarCurr,B)
% 32.24/31.99 <=> v1501(VarCurr,B) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_307,axiom,
% 32.24/31.99 ! [VarCurr,B] :
% 32.24/31.99 ( range_3_0(B)
% 32.24/31.99 => ( v1501(VarCurr,B)
% 32.24/31.99 <=> v1503(VarCurr,B) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_306,axiom,
% 32.24/31.99 ! [VarCurr,B] :
% 32.24/31.99 ( range_3_0(B)
% 32.24/31.99 => ( v1503(VarCurr,B)
% 32.24/31.99 <=> v1505(VarCurr,B) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_305,axiom,
% 32.24/31.99 ! [VarCurr,B] :
% 32.24/31.99 ( range_3_0(B)
% 32.24/31.99 => ( v1505(VarCurr,B)
% 32.24/31.99 <=> v1507(VarCurr,B) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addCaseBooleanConditionEqualRanges1_12,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( ~ v1512(VarNext)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_3_0(B)
% 32.24/31.99 => ( v1507(VarNext,B)
% 32.24/31.99 <=> v1507(VarCurr,B) ) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addCaseBooleanConditionEqualRanges0_22,axiom,
% 32.24/31.99 ! [VarNext] :
% 32.24/31.99 ( v1512(VarNext)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_3_0(B)
% 32.24/31.99 => ( v1507(VarNext,B)
% 32.24/31.99 <=> v1529(VarNext,B) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_304,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_3_0(B)
% 32.24/31.99 => ( v1529(VarNext,B)
% 32.24/31.99 <=> v1527(VarCurr,B) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addParallelCaseBooleanConditionEqualRanges1_9,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1521(VarCurr)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_3_0(B)
% 32.24/31.99 => ( v1527(VarCurr,B)
% 32.24/31.99 <=> v1530(VarCurr,B) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addParallelCaseBooleanConditionEqualRanges0_9,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1521(VarCurr)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_3_0(B)
% 32.24/31.99 => ( v1527(VarCurr,B)
% 32.24/31.99 <=> $false ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addParallelCaseBooleanConditionEqualRanges1_8,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1222(VarCurr,bitIndex3)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_3_0(B)
% 32.24/31.99 => ( v1530(VarCurr,B)
% 32.24/31.99 <=> b0011(B) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_265,axiom,
% 32.24/31.99 ~ b0011(bitIndex3) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_264,axiom,
% 32.24/31.99 ~ b0011(bitIndex2) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_263,axiom,
% 32.24/31.99 b0011(bitIndex1) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_262,axiom,
% 32.24/31.99 b0011(bitIndex0) ).
% 32.24/31.99
% 32.24/31.99 fof(addParallelCaseBooleanConditionEqualRanges0_8,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1222(VarCurr,bitIndex3)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_3_0(B)
% 32.24/31.99 => ( v1530(VarCurr,B)
% 32.24/31.99 <=> b1100(B) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_261,axiom,
% 32.24/31.99 b1100(bitIndex3) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_260,axiom,
% 32.24/31.99 b1100(bitIndex2) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_259,axiom,
% 32.24/31.99 ~ b1100(bitIndex1) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_258,axiom,
% 32.24/31.99 ~ b1100(bitIndex0) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_245,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1512(VarNext)
% 32.24/31.99 <=> ( v1513(VarNext)
% 32.24/31.99 & v1520(VarNext) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_303,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1520(VarNext)
% 32.24/31.99 <=> v1518(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_244,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1518(VarCurr)
% 32.24/31.99 <=> ( v1521(VarCurr)
% 32.24/31.99 | v1522(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_243,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1522(VarCurr)
% 32.24/31.99 <=> ( v1523(VarCurr)
% 32.24/31.99 & v1526(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_157,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1526(VarCurr)
% 32.24/31.99 <=> v1521(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorShiftedRanges_79,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1523(VarCurr)
% 32.24/31.99 <=> ( v1222(VarCurr,bitIndex3)
% 32.24/31.99 | v1524(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorShiftedRanges_78,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1524(VarCurr)
% 32.24/31.99 <=> ( v1222(VarCurr,bitIndex1)
% 32.24/31.99 & v1525(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_156,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1525(VarCurr)
% 32.24/31.99 <=> v1222(VarCurr,bitIndex3) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_155,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1521(VarCurr)
% 32.24/31.99 <=> v1220(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_242,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1513(VarNext)
% 32.24/31.99 <=> ( v1514(VarNext)
% 32.24/31.99 & v1402(VarNext) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_154,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( ~ v1514(VarNext)
% 32.24/31.99 <=> v1409(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_302,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1208(VarCurr)
% 32.24/31.99 <=> v1210(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_301,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1210(VarCurr)
% 32.24/31.99 <=> v1212(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_300,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1212(VarCurr)
% 32.24/31.99 <=> v1214(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_299,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1214(VarCurr)
% 32.24/31.99 <=> v1216(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_298,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1216(VarCurr)
% 32.24/31.99 <=> v1218(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addCaseBooleanConditionEqualRanges1_11,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( ~ v1482(VarNext)
% 32.24/31.99 => ( v1218(VarNext)
% 32.24/31.99 <=> v1218(VarCurr) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addCaseBooleanConditionEqualRanges0_21,axiom,
% 32.24/31.99 ! [VarNext] :
% 32.24/31.99 ( v1482(VarNext)
% 32.24/31.99 => ( v1218(VarNext)
% 32.24/31.99 <=> v1490(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_297,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1490(VarNext)
% 32.24/31.99 <=> v1488(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(aaddConditionBooleanCondEqualRangesElseBranch_39,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1491(VarCurr)
% 32.24/31.99 => ( v1488(VarCurr)
% 32.24/31.99 <=> v1492(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addConditionBooleanCondEqualRangesThenBranch_42,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1491(VarCurr)
% 32.24/31.99 => ( v1488(VarCurr)
% 32.24/31.99 <=> $false ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(aaddConditionBooleanCondEqualRangesElseBranch_38,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1493(VarCurr)
% 32.24/31.99 => ( v1492(VarCurr)
% 32.24/31.99 <=> $false ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addConditionBooleanCondEqualRangesThenBranch_41,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1493(VarCurr)
% 32.24/31.99 => ( v1492(VarCurr)
% 32.24/31.99 <=> $true ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_153,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1493(VarCurr)
% 32.24/31.99 <=> v1222(VarCurr,bitIndex0) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_152,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1491(VarCurr)
% 32.24/31.99 <=> v1220(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_241,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1482(VarNext)
% 32.24/31.99 <=> v1483(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_240,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1483(VarNext)
% 32.24/31.99 <=> ( v1484(VarNext)
% 32.24/31.99 & v1402(VarNext) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_151,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( ~ v1484(VarNext)
% 32.24/31.99 <=> v1409(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(aaddConditionBooleanCondEqualRangesElseBranch_37,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1470(VarCurr)
% 32.24/31.99 => ( v1222(VarCurr,bitIndex0)
% 32.24/31.99 <=> $false ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addConditionBooleanCondEqualRangesThenBranch_40,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1470(VarCurr)
% 32.24/31.99 => ( v1222(VarCurr,bitIndex0)
% 32.24/31.99 <=> $true ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_239,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1470(VarCurr)
% 32.24/31.99 <=> ( v1471(VarCurr)
% 32.24/31.99 | v1478(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_238,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1478(VarCurr)
% 32.24/31.99 <=> ( v1479(VarCurr)
% 32.24/31.99 & v1400(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_237,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1479(VarCurr)
% 32.24/31.99 <=> ( v1474(VarCurr)
% 32.24/31.99 & v1186(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_236,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1471(VarCurr)
% 32.24/31.99 <=> ( v1472(VarCurr)
% 32.24/31.99 | v1475(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_235,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1475(VarCurr)
% 32.24/31.99 <=> ( v1476(VarCurr)
% 32.24/31.99 & v1397(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_234,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1476(VarCurr)
% 32.24/31.99 <=> ( v1474(VarCurr)
% 32.24/31.99 & v1186(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_150,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1474(VarCurr)
% 32.24/31.99 <=> v1224(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_233,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1472(VarCurr)
% 32.24/31.99 <=> ( v1473(VarCurr)
% 32.24/31.99 & v1391(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_149,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1473(VarCurr)
% 32.24/31.99 <=> v1224(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_296,axiom,
% 32.24/31.99 ! [VarNext] :
% 32.24/31.99 ( v1377(VarNext,bitIndex2)
% 32.24/31.99 <=> v1462(VarNext,bitIndex1) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addCaseBooleanConditionShiftedRanges1_10,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( ~ v1463(VarNext)
% 32.24/31.99 => ( ( v1462(VarNext,bitIndex3)
% 32.24/31.99 <=> v1377(VarCurr,bitIndex4) )
% 32.24/31.99 & ( v1462(VarNext,bitIndex2)
% 32.24/31.99 <=> v1377(VarCurr,bitIndex3) )
% 32.24/31.99 & ( v1462(VarNext,bitIndex1)
% 32.24/31.99 <=> v1377(VarCurr,bitIndex2) )
% 32.24/31.99 & ( v1462(VarNext,bitIndex0)
% 32.24/31.99 <=> v1377(VarCurr,bitIndex1) ) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addCaseBooleanConditionEqualRanges0_20,axiom,
% 32.24/31.99 ! [VarNext] :
% 32.24/31.99 ( v1463(VarNext)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_3_0(B)
% 32.24/31.99 => ( v1462(VarNext,B)
% 32.24/31.99 <=> v1415(VarNext,B) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_232,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1463(VarNext)
% 32.24/31.99 <=> v1464(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_231,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1464(VarNext)
% 32.24/31.99 <=> ( v1466(VarNext)
% 32.24/31.99 & v1402(VarNext) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_148,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( ~ v1466(VarNext)
% 32.24/31.99 <=> v1409(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addConditionBooleanCondShiftedRangesElseBranch_12,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1457(VarCurr)
% 32.24/31.99 => ( v1222(VarCurr,bitIndex2)
% 32.24/31.99 <=> $false ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addConditionBooleanCondShiftedRangesThenBranch_9,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1457(VarCurr)
% 32.24/31.99 => ( v1222(VarCurr,bitIndex2)
% 32.24/31.99 <=> $true ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_230,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1457(VarCurr)
% 32.24/31.99 <=> ( v1458(VarCurr)
% 32.24/31.99 | v1459(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_229,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1459(VarCurr)
% 32.24/31.99 <=> ( v1460(VarCurr)
% 32.24/31.99 & v1397(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_147,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1460(VarCurr)
% 32.24/31.99 <=> v1186(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addBitVectorEqualityBitBlasted_52,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1458(VarCurr)
% 32.24/31.99 <=> ( $true
% 32.24/31.99 <=> v1377(VarCurr,bitIndex1) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_295,axiom,
% 32.24/31.99 ! [VarNext] :
% 32.24/31.99 ( v1377(VarNext,bitIndex1)
% 32.24/31.99 <=> v1449(VarNext,bitIndex0) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addCaseBooleanConditionShiftedRanges1_9,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( ~ v1450(VarNext)
% 32.24/31.99 => ( ( v1449(VarNext,bitIndex3)
% 32.24/31.99 <=> v1377(VarCurr,bitIndex4) )
% 32.24/31.99 & ( v1449(VarNext,bitIndex2)
% 32.24/31.99 <=> v1377(VarCurr,bitIndex3) )
% 32.24/31.99 & ( v1449(VarNext,bitIndex1)
% 32.24/31.99 <=> v1377(VarCurr,bitIndex2) )
% 32.24/31.99 & ( v1449(VarNext,bitIndex0)
% 32.24/31.99 <=> v1377(VarCurr,bitIndex1) ) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addCaseBooleanConditionEqualRanges0_19,axiom,
% 32.24/31.99 ! [VarNext] :
% 32.24/31.99 ( v1450(VarNext)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_3_0(B)
% 32.24/31.99 => ( v1449(VarNext,B)
% 32.24/31.99 <=> v1415(VarNext,B) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_228,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1450(VarNext)
% 32.24/31.99 <=> v1451(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_227,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1451(VarNext)
% 32.24/31.99 <=> ( v1453(VarNext)
% 32.24/31.99 & v1402(VarNext) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_146,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( ~ v1453(VarNext)
% 32.24/31.99 <=> v1409(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addConditionBooleanCondShiftedRangesElseBranch_11,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1435(VarCurr)
% 32.24/31.99 => ( v1222(VarCurr,bitIndex1)
% 32.24/31.99 <=> $false ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addConditionBooleanCondShiftedRangesThenBranch_8,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1435(VarCurr)
% 32.24/31.99 => ( v1222(VarCurr,bitIndex1)
% 32.24/31.99 <=> $true ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_226,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1435(VarCurr)
% 32.24/31.99 <=> ( v1436(VarCurr)
% 32.24/31.99 | v1446(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_225,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1446(VarCurr)
% 32.24/31.99 <=> ( v1447(VarCurr)
% 32.24/31.99 & v1400(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorShiftedRanges_77,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1447(VarCurr)
% 32.24/31.99 <=> ( v1445(VarCurr)
% 32.24/31.99 & v1368(VarCurr,bitIndex1) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_224,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1436(VarCurr)
% 32.24/31.99 <=> ( v1437(VarCurr)
% 32.24/31.99 | v1442(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_223,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1442(VarCurr)
% 32.24/31.99 <=> ( v1443(VarCurr)
% 32.24/31.99 & v1397(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorShiftedRanges_76,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1443(VarCurr)
% 32.24/31.99 <=> ( v1445(VarCurr)
% 32.24/31.99 & v1368(VarCurr,bitIndex1) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_222,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1445(VarCurr)
% 32.24/31.99 <=> ( v1396(VarCurr)
% 32.24/31.99 & v1441(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_221,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1437(VarCurr)
% 32.24/31.99 <=> ( v1438(VarCurr)
% 32.24/31.99 & v1391(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorShiftedRanges_75,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1438(VarCurr)
% 32.24/31.99 <=> ( v1440(VarCurr)
% 32.24/31.99 & v1368(VarCurr,bitIndex1) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_220,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1440(VarCurr)
% 32.24/31.99 <=> ( v1224(VarCurr)
% 32.24/31.99 & v1441(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_145,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1441(VarCurr)
% 32.24/31.99 <=> v1368(VarCurr,bitIndex0) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_294,axiom,
% 32.24/31.99 ! [VarNext] :
% 32.24/31.99 ( v1377(VarNext,bitIndex4)
% 32.24/31.99 <=> v1427(VarNext,bitIndex3) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addCaseBooleanConditionShiftedRanges1_8,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( ~ v1428(VarNext)
% 32.24/31.99 => ( ( v1427(VarNext,bitIndex3)
% 32.24/31.99 <=> v1377(VarCurr,bitIndex4) )
% 32.24/31.99 & ( v1427(VarNext,bitIndex2)
% 32.24/31.99 <=> v1377(VarCurr,bitIndex3) )
% 32.24/31.99 & ( v1427(VarNext,bitIndex1)
% 32.24/31.99 <=> v1377(VarCurr,bitIndex2) )
% 32.24/31.99 & ( v1427(VarNext,bitIndex0)
% 32.24/31.99 <=> v1377(VarCurr,bitIndex1) ) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addCaseBooleanConditionEqualRanges0_18,axiom,
% 32.24/31.99 ! [VarNext] :
% 32.24/31.99 ( v1428(VarNext)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_3_0(B)
% 32.24/31.99 => ( v1427(VarNext,B)
% 32.24/31.99 <=> v1415(VarNext,B) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_219,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1428(VarNext)
% 32.24/31.99 <=> v1429(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_218,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1429(VarNext)
% 32.24/31.99 <=> ( v1431(VarNext)
% 32.24/31.99 & v1402(VarNext) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_144,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( ~ v1431(VarNext)
% 32.24/31.99 <=> v1409(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addConditionBooleanCondShiftedRangesElseBranch_10,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1421(VarCurr)
% 32.24/31.99 => ( v1222(VarCurr,bitIndex4)
% 32.24/31.99 <=> $false ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addConditionBooleanCondShiftedRangesThenBranch_7,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1421(VarCurr)
% 32.24/31.99 => ( v1222(VarCurr,bitIndex4)
% 32.24/31.99 <=> $true ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_217,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1421(VarCurr)
% 32.24/31.99 <=> ( v1422(VarCurr)
% 32.24/31.99 | v1423(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_216,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1423(VarCurr)
% 32.24/31.99 <=> ( v1424(VarCurr)
% 32.24/31.99 & v1400(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_143,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1424(VarCurr)
% 32.24/31.99 <=> v1186(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addBitVectorEqualityBitBlasted_51,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1422(VarCurr)
% 32.24/31.99 <=> ( $true
% 32.24/31.99 <=> v1377(VarCurr,bitIndex3) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_293,axiom,
% 32.24/31.99 ! [VarNext] :
% 32.24/31.99 ( v1377(VarNext,bitIndex3)
% 32.24/31.99 <=> v1404(VarNext,bitIndex2) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addCaseBooleanConditionShiftedRanges1_7,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( ~ v1405(VarNext)
% 32.24/31.99 => ( ( v1404(VarNext,bitIndex3)
% 32.24/31.99 <=> v1377(VarCurr,bitIndex4) )
% 32.24/31.99 & ( v1404(VarNext,bitIndex2)
% 32.24/31.99 <=> v1377(VarCurr,bitIndex3) )
% 32.24/31.99 & ( v1404(VarNext,bitIndex1)
% 32.24/31.99 <=> v1377(VarCurr,bitIndex2) )
% 32.24/31.99 & ( v1404(VarNext,bitIndex0)
% 32.24/31.99 <=> v1377(VarCurr,bitIndex1) ) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addCaseBooleanConditionEqualRanges0_17,axiom,
% 32.24/31.99 ! [VarNext] :
% 32.24/31.99 ( v1405(VarNext)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_3_0(B)
% 32.24/31.99 => ( v1404(VarNext,B)
% 32.24/31.99 <=> v1415(VarNext,B) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_292,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_3_0(B)
% 32.24/31.99 => ( v1415(VarNext,B)
% 32.24/31.99 <=> v1413(VarCurr,B) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addConditionBooleanCondShiftedRangesElseBranch_9,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1416(VarCurr)
% 32.24/31.99 => ( ( v1413(VarCurr,bitIndex3)
% 32.24/31.99 <=> v1222(VarCurr,bitIndex4) )
% 32.24/31.99 & ( v1413(VarCurr,bitIndex2)
% 32.24/31.99 <=> v1222(VarCurr,bitIndex3) )
% 32.24/31.99 & ( v1413(VarCurr,bitIndex1)
% 32.24/31.99 <=> v1222(VarCurr,bitIndex2) )
% 32.24/31.99 & ( v1413(VarCurr,bitIndex0)
% 32.24/31.99 <=> v1222(VarCurr,bitIndex1) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addConditionBooleanCondEqualRangesThenBranch_39,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1416(VarCurr)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_3_0(B)
% 32.24/31.99 => ( v1413(VarCurr,B)
% 32.24/31.99 <=> $false ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_142,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1416(VarCurr)
% 32.24/31.99 <=> v1220(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_215,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1405(VarNext)
% 32.24/31.99 <=> v1406(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_214,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1406(VarNext)
% 32.24/31.99 <=> ( v1407(VarNext)
% 32.24/31.99 & v1402(VarNext) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_141,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( ~ v1407(VarNext)
% 32.24/31.99 <=> v1409(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_291,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1409(VarNext)
% 32.24/31.99 <=> v1402(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_290,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1402(VarCurr)
% 32.24/31.99 <=> v288(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addConditionBooleanCondShiftedRangesElseBranch_8,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1384(VarCurr)
% 32.24/31.99 => ( v1222(VarCurr,bitIndex3)
% 32.24/31.99 <=> $false ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addConditionBooleanCondShiftedRangesThenBranch_6,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1384(VarCurr)
% 32.24/31.99 => ( v1222(VarCurr,bitIndex3)
% 32.24/31.99 <=> $true ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_213,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1384(VarCurr)
% 32.24/31.99 <=> ( v1385(VarCurr)
% 32.24/31.99 | v1398(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_212,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1398(VarCurr)
% 32.24/31.99 <=> ( v1399(VarCurr)
% 32.24/31.99 & v1400(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addBitVectorEqualityBitBlasted_50,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1400(VarCurr)
% 32.24/31.99 <=> ( $true
% 32.24/31.99 <=> v1377(VarCurr,bitIndex4) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_211,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1399(VarCurr)
% 32.24/31.99 <=> ( v1395(VarCurr)
% 32.24/31.99 & v1390(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_210,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1385(VarCurr)
% 32.24/31.99 <=> ( v1386(VarCurr)
% 32.24/31.99 | v1392(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_209,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1392(VarCurr)
% 32.24/31.99 <=> ( v1393(VarCurr)
% 32.24/31.99 & v1397(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addBitVectorEqualityBitBlasted_49,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1397(VarCurr)
% 32.24/31.99 <=> ( $true
% 32.24/31.99 <=> v1377(VarCurr,bitIndex2) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_208,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1393(VarCurr)
% 32.24/31.99 <=> ( v1395(VarCurr)
% 32.24/31.99 & v1390(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_207,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1395(VarCurr)
% 32.24/31.99 <=> ( v1396(VarCurr)
% 32.24/31.99 & v1368(VarCurr,bitIndex0) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_206,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1396(VarCurr)
% 32.24/31.99 <=> ( v1224(VarCurr)
% 32.24/31.99 & v1186(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_205,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1386(VarCurr)
% 32.24/31.99 <=> ( v1387(VarCurr)
% 32.24/31.99 & v1391(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addBitVectorEqualityBitBlasted_48,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1391(VarCurr)
% 32.24/31.99 <=> ( $true
% 32.24/31.99 <=> v1377(VarCurr,bitIndex0) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignmentInitValueVector_13,axiom,
% 32.24/31.99 ( ( v1377(constB0,bitIndex4)
% 32.24/31.99 <=> $false )
% 32.24/31.99 & ( v1377(constB0,bitIndex3)
% 32.24/31.99 <=> $false )
% 32.24/31.99 & ( v1377(constB0,bitIndex2)
% 32.24/31.99 <=> $false )
% 32.24/31.99 & ( v1377(constB0,bitIndex1)
% 32.24/31.99 <=> $false ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_204,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1387(VarCurr)
% 32.24/31.99 <=> ( v1389(VarCurr)
% 32.24/31.99 & v1390(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_140,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1390(VarCurr)
% 32.24/31.99 <=> v1368(VarCurr,bitIndex1) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_203,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1389(VarCurr)
% 32.24/31.99 <=> ( v1224(VarCurr)
% 32.24/31.99 & v1368(VarCurr,bitIndex0) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_289,axiom,
% 32.24/31.99 ! [VarCurr,B] :
% 32.24/31.99 ( range_1_0(B)
% 32.24/31.99 => ( v1368(VarCurr,B)
% 32.24/31.99 <=> v1370(VarCurr,B) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_288,axiom,
% 32.24/31.99 ! [VarCurr,B] :
% 32.24/31.99 ( range_1_0(B)
% 32.24/31.99 => ( v1370(VarCurr,B)
% 32.24/31.99 <=> v1372(VarCurr,B) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_287,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1372(VarCurr,bitIndex0)
% 32.24/31.99 <=> v36(VarCurr,bitIndex4) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_286,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1372(VarCurr,bitIndex1)
% 32.24/31.99 <=> v1374(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorShiftedRanges_74,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1374(VarCurr)
% 32.24/31.99 <=> ( v36(VarCurr,bitIndex1)
% 32.24/31.99 | v36(VarCurr,bitIndex7) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_285,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1224(VarCurr)
% 32.24/31.99 <=> v1226(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_284,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1226(VarCurr)
% 32.24/31.99 <=> v1228(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorShiftedRanges_73,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1228(VarCurr)
% 32.24/31.99 <=> ( v1366(VarCurr)
% 32.24/31.99 | v36(VarCurr,bitIndex7) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorShiftedRanges_72,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1366(VarCurr)
% 32.24/31.99 <=> ( v36(VarCurr,bitIndex1)
% 32.24/31.99 | v36(VarCurr,bitIndex4) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addConditionBooleanCondShiftedRangesElseBranch_7,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1333(VarCurr)
% 32.24/31.99 => ( v36(VarCurr,bitIndex4)
% 32.24/31.99 <=> $false ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addConditionBooleanCondShiftedRangesThenBranch_5,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1333(VarCurr)
% 32.24/31.99 => ( v36(VarCurr,bitIndex4)
% 32.24/31.99 <=> $true ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_202,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1333(VarCurr)
% 32.24/31.99 <=> ( v1334(VarCurr)
% 32.24/31.99 | v1363(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_201,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1363(VarCurr)
% 32.24/31.99 <=> ( v1364(VarCurr)
% 32.24/31.99 & v1323(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_200,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1364(VarCurr)
% 32.24/31.99 <=> ( v1342(VarCurr)
% 32.24/31.99 & v1168(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_199,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1334(VarCurr)
% 32.24/31.99 <=> ( v1335(VarCurr)
% 32.24/31.99 | v1361(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_198,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1361(VarCurr)
% 32.24/31.99 <=> ( v1362(VarCurr)
% 32.24/31.99 & v1300(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_197,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1362(VarCurr)
% 32.24/31.99 <=> ( v1352(VarCurr)
% 32.24/31.99 & v1168(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_196,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1335(VarCurr)
% 32.24/31.99 <=> ( v1336(VarCurr)
% 32.24/31.99 | v1358(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_195,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1358(VarCurr)
% 32.24/31.99 <=> ( v1359(VarCurr)
% 32.24/31.99 & v1360(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addBitVectorEqualityBitBlasted_47,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1360(VarCurr)
% 32.24/31.99 <=> ( $true
% 32.24/31.99 <=> v31(VarCurr,bitIndex6) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_194,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1359(VarCurr)
% 32.24/31.99 <=> ( v1342(VarCurr)
% 32.24/31.99 & v1168(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_193,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1336(VarCurr)
% 32.24/31.99 <=> ( v1337(VarCurr)
% 32.24/31.99 | v1356(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_192,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1356(VarCurr)
% 32.24/31.99 <=> ( v1357(VarCurr)
% 32.24/31.99 & v1278(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_191,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1357(VarCurr)
% 32.24/31.99 <=> ( v1352(VarCurr)
% 32.24/31.99 & v1168(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_190,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1337(VarCurr)
% 32.24/31.99 <=> ( v1338(VarCurr)
% 32.24/31.99 | v1353(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_189,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1353(VarCurr)
% 32.24/31.99 <=> ( v1354(VarCurr)
% 32.24/31.99 & v1355(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addBitVectorEqualityBitBlasted_46,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1355(VarCurr)
% 32.24/31.99 <=> ( $true
% 32.24/31.99 <=> v31(VarCurr,bitIndex3) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_188,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1354(VarCurr)
% 32.24/31.99 <=> ( v1342(VarCurr)
% 32.24/31.99 & v1168(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_187,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1338(VarCurr)
% 32.24/31.99 <=> ( v1339(VarCurr)
% 32.24/31.99 | v1349(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_186,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1349(VarCurr)
% 32.24/31.99 <=> ( v1350(VarCurr)
% 32.24/31.99 & v1238(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_185,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1350(VarCurr)
% 32.24/31.99 <=> ( v1352(VarCurr)
% 32.24/31.99 & v1168(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_184,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1352(VarCurr)
% 32.24/31.99 <=> ( v1342(VarCurr)
% 32.24/31.99 & v1180(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_183,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1339(VarCurr)
% 32.24/31.99 <=> ( v1340(VarCurr)
% 32.24/31.99 & v1348(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addBitVectorEqualityBitBlasted_45,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1348(VarCurr)
% 32.24/31.99 <=> ( $true
% 32.24/31.99 <=> v31(VarCurr,bitIndex0) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_182,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1340(VarCurr)
% 32.24/31.99 <=> ( v1342(VarCurr)
% 32.24/31.99 & v1168(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_181,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1342(VarCurr)
% 32.24/31.99 <=> ( v1343(VarCurr)
% 32.24/31.99 & v1347(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_139,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1347(VarCurr)
% 32.24/31.99 <=> v38(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_180,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1343(VarCurr)
% 32.24/31.99 <=> ( v1344(VarCurr)
% 32.24/31.99 & v1346(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_138,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1346(VarCurr)
% 32.24/31.99 <=> v903(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_179,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1344(VarCurr)
% 32.24/31.99 <=> ( v1345(VarCurr)
% 32.24/31.99 & v881(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_137,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1345(VarCurr)
% 32.24/31.99 <=> v87(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_283,axiom,
% 32.24/31.99 ! [VarNext] :
% 32.24/31.99 ( v31(VarNext,bitIndex9)
% 32.24/31.99 <=> v1325(VarNext,bitIndex8) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addCaseBooleanConditionShiftedRanges1_6,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( ~ v1326(VarNext)
% 32.24/31.99 => ( ( v1325(VarNext,bitIndex10)
% 32.24/31.99 <=> v31(VarCurr,bitIndex11) )
% 32.24/31.99 & ( v1325(VarNext,bitIndex9)
% 32.24/31.99 <=> v31(VarCurr,bitIndex10) )
% 32.24/31.99 & ( v1325(VarNext,bitIndex8)
% 32.24/31.99 <=> v31(VarCurr,bitIndex9) )
% 32.24/31.99 & ( v1325(VarNext,bitIndex7)
% 32.24/31.99 <=> v31(VarCurr,bitIndex8) )
% 32.24/31.99 & ( v1325(VarNext,bitIndex6)
% 32.24/31.99 <=> v31(VarCurr,bitIndex7) )
% 32.24/31.99 & ( v1325(VarNext,bitIndex5)
% 32.24/31.99 <=> v31(VarCurr,bitIndex6) )
% 32.24/31.99 & ( v1325(VarNext,bitIndex4)
% 32.24/31.99 <=> v31(VarCurr,bitIndex5) )
% 32.24/31.99 & ( v1325(VarNext,bitIndex3)
% 32.24/31.99 <=> v31(VarCurr,bitIndex4) )
% 32.24/31.99 & ( v1325(VarNext,bitIndex2)
% 32.24/31.99 <=> v31(VarCurr,bitIndex3) )
% 32.24/31.99 & ( v1325(VarNext,bitIndex1)
% 32.24/31.99 <=> v31(VarCurr,bitIndex2) )
% 32.24/31.99 & ( v1325(VarNext,bitIndex0)
% 32.24/31.99 <=> v31(VarCurr,bitIndex1) ) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addCaseBooleanConditionEqualRanges0_16,axiom,
% 32.24/31.99 ! [VarNext] :
% 32.24/31.99 ( v1326(VarNext)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_10_0(B)
% 32.24/31.99 => ( v1325(VarNext,B)
% 32.24/31.99 <=> v1253(VarNext,B) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_178,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1326(VarNext)
% 32.24/31.99 <=> v1327(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_177,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1327(VarNext)
% 32.24/31.99 <=> ( v1329(VarNext)
% 32.24/31.99 & v1240(VarNext) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_136,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( ~ v1329(VarNext)
% 32.24/31.99 <=> v1247(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addConditionBooleanCondShiftedRangesElseBranch_6,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1311(VarCurr)
% 32.24/31.99 => ( v36(VarCurr,bitIndex9)
% 32.24/31.99 <=> $false ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addConditionBooleanCondShiftedRangesThenBranch_4,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1311(VarCurr)
% 32.24/31.99 => ( v36(VarCurr,bitIndex9)
% 32.24/31.99 <=> $true ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_176,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1311(VarCurr)
% 32.24/31.99 <=> ( v1312(VarCurr)
% 32.24/31.99 | v1321(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_175,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1321(VarCurr)
% 32.24/31.99 <=> ( v1322(VarCurr)
% 32.24/31.99 & v1323(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addBitVectorEqualityBitBlasted_44,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1323(VarCurr)
% 32.24/31.99 <=> ( $true
% 32.24/31.99 <=> v31(VarCurr,bitIndex9) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_282,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1322(VarCurr)
% 32.24/31.99 <=> v38(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_174,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1312(VarCurr)
% 32.24/31.99 <=> ( v1313(VarCurr)
% 32.24/31.99 | v1319(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_173,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1319(VarCurr)
% 32.24/31.99 <=> ( v1320(VarCurr)
% 32.24/31.99 & v1300(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_172,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1320(VarCurr)
% 32.24/31.99 <=> ( v38(VarCurr)
% 32.24/31.99 & v1180(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_171,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1313(VarCurr)
% 32.24/31.99 <=> ( v1314(VarCurr)
% 32.24/31.99 | v1317(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_170,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1317(VarCurr)
% 32.24/31.99 <=> ( v1318(VarCurr)
% 32.24/31.99 & v1278(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_169,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1318(VarCurr)
% 32.24/31.99 <=> ( v38(VarCurr)
% 32.24/31.99 & v1180(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_168,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1314(VarCurr)
% 32.24/31.99 <=> ( v1315(VarCurr)
% 32.24/31.99 & v1238(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_167,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1315(VarCurr)
% 32.24/31.99 <=> ( v38(VarCurr)
% 32.24/31.99 & v1180(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_281,axiom,
% 32.24/31.99 ! [VarNext] :
% 32.24/31.99 ( v31(VarNext,bitIndex8)
% 32.24/31.99 <=> v1302(VarNext,bitIndex7) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addCaseBooleanConditionShiftedRanges1_5,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( ~ v1303(VarNext)
% 32.24/31.99 => ( ( v1302(VarNext,bitIndex10)
% 32.24/31.99 <=> v31(VarCurr,bitIndex11) )
% 32.24/31.99 & ( v1302(VarNext,bitIndex9)
% 32.24/31.99 <=> v31(VarCurr,bitIndex10) )
% 32.24/31.99 & ( v1302(VarNext,bitIndex8)
% 32.24/31.99 <=> v31(VarCurr,bitIndex9) )
% 32.24/31.99 & ( v1302(VarNext,bitIndex7)
% 32.24/31.99 <=> v31(VarCurr,bitIndex8) )
% 32.24/31.99 & ( v1302(VarNext,bitIndex6)
% 32.24/31.99 <=> v31(VarCurr,bitIndex7) )
% 32.24/31.99 & ( v1302(VarNext,bitIndex5)
% 32.24/31.99 <=> v31(VarCurr,bitIndex6) )
% 32.24/31.99 & ( v1302(VarNext,bitIndex4)
% 32.24/31.99 <=> v31(VarCurr,bitIndex5) )
% 32.24/31.99 & ( v1302(VarNext,bitIndex3)
% 32.24/31.99 <=> v31(VarCurr,bitIndex4) )
% 32.24/31.99 & ( v1302(VarNext,bitIndex2)
% 32.24/31.99 <=> v31(VarCurr,bitIndex3) )
% 32.24/31.99 & ( v1302(VarNext,bitIndex1)
% 32.24/31.99 <=> v31(VarCurr,bitIndex2) )
% 32.24/31.99 & ( v1302(VarNext,bitIndex0)
% 32.24/31.99 <=> v31(VarCurr,bitIndex1) ) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addCaseBooleanConditionEqualRanges0_15,axiom,
% 32.24/31.99 ! [VarNext] :
% 32.24/31.99 ( v1303(VarNext)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_10_0(B)
% 32.24/31.99 => ( v1302(VarNext,B)
% 32.24/31.99 <=> v1253(VarNext,B) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_166,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1303(VarNext)
% 32.24/31.99 <=> v1304(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_165,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1304(VarNext)
% 32.24/31.99 <=> ( v1306(VarNext)
% 32.24/31.99 & v1240(VarNext) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_135,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( ~ v1306(VarNext)
% 32.24/31.99 <=> v1247(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addConditionBooleanCondShiftedRangesElseBranch_5,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1296(VarCurr)
% 32.24/31.99 => ( v36(VarCurr,bitIndex8)
% 32.24/31.99 <=> $false ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addConditionBooleanCondShiftedRangesThenBranch_3,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1296(VarCurr)
% 32.24/31.99 => ( v36(VarCurr,bitIndex8)
% 32.24/31.99 <=> $true ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_164,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1296(VarCurr)
% 32.24/31.99 <=> ( v1297(VarCurr)
% 32.24/31.99 | v1298(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_163,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1298(VarCurr)
% 32.24/31.99 <=> ( v1299(VarCurr)
% 32.24/31.99 & v1300(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addBitVectorEqualityBitBlasted_43,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1300(VarCurr)
% 32.24/31.99 <=> ( $true
% 32.24/31.99 <=> v31(VarCurr,bitIndex8) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_134,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1299(VarCurr)
% 32.24/31.99 <=> v1180(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addBitVectorEqualityBitBlasted_42,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1297(VarCurr)
% 32.24/31.99 <=> ( $true
% 32.24/31.99 <=> v31(VarCurr,bitIndex7) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_280,axiom,
% 32.24/31.99 ! [VarNext] :
% 32.24/31.99 ( v31(VarNext,bitIndex6)
% 32.24/31.99 <=> v1288(VarNext,bitIndex5) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addCaseBooleanConditionShiftedRanges1_4,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( ~ v1289(VarNext)
% 32.24/31.99 => ( ( v1288(VarNext,bitIndex10)
% 32.24/31.99 <=> v31(VarCurr,bitIndex11) )
% 32.24/31.99 & ( v1288(VarNext,bitIndex9)
% 32.24/31.99 <=> v31(VarCurr,bitIndex10) )
% 32.24/31.99 & ( v1288(VarNext,bitIndex8)
% 32.24/31.99 <=> v31(VarCurr,bitIndex9) )
% 32.24/31.99 & ( v1288(VarNext,bitIndex7)
% 32.24/31.99 <=> v31(VarCurr,bitIndex8) )
% 32.24/31.99 & ( v1288(VarNext,bitIndex6)
% 32.24/31.99 <=> v31(VarCurr,bitIndex7) )
% 32.24/31.99 & ( v1288(VarNext,bitIndex5)
% 32.24/31.99 <=> v31(VarCurr,bitIndex6) )
% 32.24/31.99 & ( v1288(VarNext,bitIndex4)
% 32.24/31.99 <=> v31(VarCurr,bitIndex5) )
% 32.24/31.99 & ( v1288(VarNext,bitIndex3)
% 32.24/31.99 <=> v31(VarCurr,bitIndex4) )
% 32.24/31.99 & ( v1288(VarNext,bitIndex2)
% 32.24/31.99 <=> v31(VarCurr,bitIndex3) )
% 32.24/31.99 & ( v1288(VarNext,bitIndex1)
% 32.24/31.99 <=> v31(VarCurr,bitIndex2) )
% 32.24/31.99 & ( v1288(VarNext,bitIndex0)
% 32.24/31.99 <=> v31(VarCurr,bitIndex1) ) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addCaseBooleanConditionEqualRanges0_14,axiom,
% 32.24/31.99 ! [VarNext] :
% 32.24/31.99 ( v1289(VarNext)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_10_0(B)
% 32.24/31.99 => ( v1288(VarNext,B)
% 32.24/31.99 <=> v1253(VarNext,B) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_162,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1289(VarNext)
% 32.24/31.99 <=> v1290(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_161,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1290(VarNext)
% 32.24/31.99 <=> ( v1292(VarNext)
% 32.24/31.99 & v1240(VarNext) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_133,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( ~ v1292(VarNext)
% 32.24/31.99 <=> v1247(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_279,axiom,
% 32.24/31.99 ! [VarNext] :
% 32.24/31.99 ( v31(VarNext,bitIndex5)
% 32.24/31.99 <=> v1280(VarNext,bitIndex4) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addCaseBooleanConditionShiftedRanges1_3,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( ~ v1281(VarNext)
% 32.24/31.99 => ( ( v1280(VarNext,bitIndex10)
% 32.24/31.99 <=> v31(VarCurr,bitIndex11) )
% 32.24/31.99 & ( v1280(VarNext,bitIndex9)
% 32.24/31.99 <=> v31(VarCurr,bitIndex10) )
% 32.24/31.99 & ( v1280(VarNext,bitIndex8)
% 32.24/31.99 <=> v31(VarCurr,bitIndex9) )
% 32.24/31.99 & ( v1280(VarNext,bitIndex7)
% 32.24/31.99 <=> v31(VarCurr,bitIndex8) )
% 32.24/31.99 & ( v1280(VarNext,bitIndex6)
% 32.24/31.99 <=> v31(VarCurr,bitIndex7) )
% 32.24/31.99 & ( v1280(VarNext,bitIndex5)
% 32.24/31.99 <=> v31(VarCurr,bitIndex6) )
% 32.24/31.99 & ( v1280(VarNext,bitIndex4)
% 32.24/31.99 <=> v31(VarCurr,bitIndex5) )
% 32.24/31.99 & ( v1280(VarNext,bitIndex3)
% 32.24/31.99 <=> v31(VarCurr,bitIndex4) )
% 32.24/31.99 & ( v1280(VarNext,bitIndex2)
% 32.24/31.99 <=> v31(VarCurr,bitIndex3) )
% 32.24/31.99 & ( v1280(VarNext,bitIndex1)
% 32.24/31.99 <=> v31(VarCurr,bitIndex2) )
% 32.24/31.99 & ( v1280(VarNext,bitIndex0)
% 32.24/31.99 <=> v31(VarCurr,bitIndex1) ) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addCaseBooleanConditionEqualRanges0_13,axiom,
% 32.24/31.99 ! [VarNext] :
% 32.24/31.99 ( v1281(VarNext)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_10_0(B)
% 32.24/31.99 => ( v1280(VarNext,B)
% 32.24/31.99 <=> v1253(VarNext,B) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_160,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1281(VarNext)
% 32.24/31.99 <=> v1282(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_159,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1282(VarNext)
% 32.24/31.99 <=> ( v1284(VarNext)
% 32.24/31.99 & v1240(VarNext) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_132,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( ~ v1284(VarNext)
% 32.24/31.99 <=> v1247(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addConditionBooleanCondShiftedRangesElseBranch_4,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1274(VarCurr)
% 32.24/31.99 => ( v36(VarCurr,bitIndex5)
% 32.24/31.99 <=> $false ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addConditionBooleanCondShiftedRangesThenBranch_2,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1274(VarCurr)
% 32.24/31.99 => ( v36(VarCurr,bitIndex5)
% 32.24/31.99 <=> $true ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_158,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1274(VarCurr)
% 32.24/31.99 <=> ( v1275(VarCurr)
% 32.24/31.99 | v1276(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_157,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1276(VarCurr)
% 32.24/31.99 <=> ( v1277(VarCurr)
% 32.24/31.99 & v1278(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addBitVectorEqualityBitBlasted_41,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1278(VarCurr)
% 32.24/31.99 <=> ( $true
% 32.24/31.99 <=> v31(VarCurr,bitIndex5) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_131,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1277(VarCurr)
% 32.24/31.99 <=> v1180(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addBitVectorEqualityBitBlasted_40,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1275(VarCurr)
% 32.24/31.99 <=> ( $true
% 32.24/31.99 <=> v31(VarCurr,bitIndex4) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_278,axiom,
% 32.24/31.99 ! [VarNext] :
% 32.24/31.99 ( v31(VarNext,bitIndex4)
% 32.24/31.99 <=> v1266(VarNext,bitIndex3) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addCaseBooleanConditionShiftedRanges1_2,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( ~ v1267(VarNext)
% 32.24/31.99 => ( ( v1266(VarNext,bitIndex10)
% 32.24/31.99 <=> v31(VarCurr,bitIndex11) )
% 32.24/31.99 & ( v1266(VarNext,bitIndex9)
% 32.24/31.99 <=> v31(VarCurr,bitIndex10) )
% 32.24/31.99 & ( v1266(VarNext,bitIndex8)
% 32.24/31.99 <=> v31(VarCurr,bitIndex9) )
% 32.24/31.99 & ( v1266(VarNext,bitIndex7)
% 32.24/31.99 <=> v31(VarCurr,bitIndex8) )
% 32.24/31.99 & ( v1266(VarNext,bitIndex6)
% 32.24/31.99 <=> v31(VarCurr,bitIndex7) )
% 32.24/31.99 & ( v1266(VarNext,bitIndex5)
% 32.24/31.99 <=> v31(VarCurr,bitIndex6) )
% 32.24/31.99 & ( v1266(VarNext,bitIndex4)
% 32.24/31.99 <=> v31(VarCurr,bitIndex5) )
% 32.24/31.99 & ( v1266(VarNext,bitIndex3)
% 32.24/31.99 <=> v31(VarCurr,bitIndex4) )
% 32.24/31.99 & ( v1266(VarNext,bitIndex2)
% 32.24/31.99 <=> v31(VarCurr,bitIndex3) )
% 32.24/31.99 & ( v1266(VarNext,bitIndex1)
% 32.24/31.99 <=> v31(VarCurr,bitIndex2) )
% 32.24/31.99 & ( v1266(VarNext,bitIndex0)
% 32.24/31.99 <=> v31(VarCurr,bitIndex1) ) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addCaseBooleanConditionEqualRanges0_12,axiom,
% 32.24/31.99 ! [VarNext] :
% 32.24/31.99 ( v1267(VarNext)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_10_0(B)
% 32.24/31.99 => ( v1266(VarNext,B)
% 32.24/31.99 <=> v1253(VarNext,B) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_156,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1267(VarNext)
% 32.24/31.99 <=> v1268(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_155,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1268(VarNext)
% 32.24/31.99 <=> ( v1270(VarNext)
% 32.24/31.99 & v1240(VarNext) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_130,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( ~ v1270(VarNext)
% 32.24/31.99 <=> v1247(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_277,axiom,
% 32.24/31.99 ! [VarNext] :
% 32.24/31.99 ( v31(VarNext,bitIndex3)
% 32.24/31.99 <=> v1258(VarNext,bitIndex2) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addCaseBooleanConditionShiftedRanges1_1,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( ~ v1259(VarNext)
% 32.24/31.99 => ( ( v1258(VarNext,bitIndex10)
% 32.24/31.99 <=> v31(VarCurr,bitIndex11) )
% 32.24/31.99 & ( v1258(VarNext,bitIndex9)
% 32.24/31.99 <=> v31(VarCurr,bitIndex10) )
% 32.24/31.99 & ( v1258(VarNext,bitIndex8)
% 32.24/31.99 <=> v31(VarCurr,bitIndex9) )
% 32.24/31.99 & ( v1258(VarNext,bitIndex7)
% 32.24/31.99 <=> v31(VarCurr,bitIndex8) )
% 32.24/31.99 & ( v1258(VarNext,bitIndex6)
% 32.24/31.99 <=> v31(VarCurr,bitIndex7) )
% 32.24/31.99 & ( v1258(VarNext,bitIndex5)
% 32.24/31.99 <=> v31(VarCurr,bitIndex6) )
% 32.24/31.99 & ( v1258(VarNext,bitIndex4)
% 32.24/31.99 <=> v31(VarCurr,bitIndex5) )
% 32.24/31.99 & ( v1258(VarNext,bitIndex3)
% 32.24/31.99 <=> v31(VarCurr,bitIndex4) )
% 32.24/31.99 & ( v1258(VarNext,bitIndex2)
% 32.24/31.99 <=> v31(VarCurr,bitIndex3) )
% 32.24/31.99 & ( v1258(VarNext,bitIndex1)
% 32.24/31.99 <=> v31(VarCurr,bitIndex2) )
% 32.24/31.99 & ( v1258(VarNext,bitIndex0)
% 32.24/31.99 <=> v31(VarCurr,bitIndex1) ) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addCaseBooleanConditionEqualRanges0_11,axiom,
% 32.24/31.99 ! [VarNext] :
% 32.24/31.99 ( v1259(VarNext)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_10_0(B)
% 32.24/31.99 => ( v1258(VarNext,B)
% 32.24/31.99 <=> v1253(VarNext,B) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_154,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1259(VarNext)
% 32.24/31.99 <=> v1260(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_153,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1260(VarNext)
% 32.24/31.99 <=> ( v1262(VarNext)
% 32.24/31.99 & v1240(VarNext) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_129,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( ~ v1262(VarNext)
% 32.24/31.99 <=> v1247(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_276,axiom,
% 32.24/31.99 ! [VarNext] :
% 32.24/31.99 ( v31(VarNext,bitIndex2)
% 32.24/31.99 <=> v1242(VarNext,bitIndex1) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addCaseBooleanConditionShiftedRanges1,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( ~ v1243(VarNext)
% 32.24/31.99 => ( ( v1242(VarNext,bitIndex10)
% 32.24/31.99 <=> v31(VarCurr,bitIndex11) )
% 32.24/31.99 & ( v1242(VarNext,bitIndex9)
% 32.24/31.99 <=> v31(VarCurr,bitIndex10) )
% 32.24/31.99 & ( v1242(VarNext,bitIndex8)
% 32.24/31.99 <=> v31(VarCurr,bitIndex9) )
% 32.24/31.99 & ( v1242(VarNext,bitIndex7)
% 32.24/31.99 <=> v31(VarCurr,bitIndex8) )
% 32.24/31.99 & ( v1242(VarNext,bitIndex6)
% 32.24/31.99 <=> v31(VarCurr,bitIndex7) )
% 32.24/31.99 & ( v1242(VarNext,bitIndex5)
% 32.24/31.99 <=> v31(VarCurr,bitIndex6) )
% 32.24/31.99 & ( v1242(VarNext,bitIndex4)
% 32.24/31.99 <=> v31(VarCurr,bitIndex5) )
% 32.24/31.99 & ( v1242(VarNext,bitIndex3)
% 32.24/31.99 <=> v31(VarCurr,bitIndex4) )
% 32.24/31.99 & ( v1242(VarNext,bitIndex2)
% 32.24/31.99 <=> v31(VarCurr,bitIndex3) )
% 32.24/31.99 & ( v1242(VarNext,bitIndex1)
% 32.24/31.99 <=> v31(VarCurr,bitIndex2) )
% 32.24/31.99 & ( v1242(VarNext,bitIndex0)
% 32.24/31.99 <=> v31(VarCurr,bitIndex1) ) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addCaseBooleanConditionEqualRanges0_10,axiom,
% 32.24/31.99 ! [VarNext] :
% 32.24/31.99 ( v1243(VarNext)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_10_0(B)
% 32.24/31.99 => ( v1242(VarNext,B)
% 32.24/31.99 <=> v1253(VarNext,B) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_275,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_10_0(B)
% 32.24/31.99 => ( v1253(VarNext,B)
% 32.24/31.99 <=> v1251(VarCurr,B) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addConditionBooleanCondShiftedRangesElseBranch_3,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1254(VarCurr)
% 32.24/31.99 => ( ( v1251(VarCurr,bitIndex10)
% 32.24/31.99 <=> v36(VarCurr,bitIndex11) )
% 32.24/31.99 & ( v1251(VarCurr,bitIndex9)
% 32.24/31.99 <=> v36(VarCurr,bitIndex10) )
% 32.24/31.99 & ( v1251(VarCurr,bitIndex8)
% 32.24/31.99 <=> v36(VarCurr,bitIndex9) )
% 32.24/31.99 & ( v1251(VarCurr,bitIndex7)
% 32.24/31.99 <=> v36(VarCurr,bitIndex8) )
% 32.24/31.99 & ( v1251(VarCurr,bitIndex6)
% 32.24/31.99 <=> v36(VarCurr,bitIndex7) )
% 32.24/31.99 & ( v1251(VarCurr,bitIndex5)
% 32.24/31.99 <=> v36(VarCurr,bitIndex6) )
% 32.24/31.99 & ( v1251(VarCurr,bitIndex4)
% 32.24/31.99 <=> v36(VarCurr,bitIndex5) )
% 32.24/31.99 & ( v1251(VarCurr,bitIndex3)
% 32.24/31.99 <=> v36(VarCurr,bitIndex4) )
% 32.24/31.99 & ( v1251(VarCurr,bitIndex2)
% 32.24/31.99 <=> v36(VarCurr,bitIndex3) )
% 32.24/31.99 & ( v1251(VarCurr,bitIndex1)
% 32.24/31.99 <=> v36(VarCurr,bitIndex2) )
% 32.24/31.99 & ( v1251(VarCurr,bitIndex0)
% 32.24/31.99 <=> v36(VarCurr,bitIndex1) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addConditionBooleanCondEqualRangesThenBranch_38,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1254(VarCurr)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_10_0(B)
% 32.24/31.99 => ( v1251(VarCurr,B)
% 32.24/31.99 <=> $false ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_128,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1254(VarCurr)
% 32.24/31.99 <=> v33(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_152,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1243(VarNext)
% 32.24/31.99 <=> v1244(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_151,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1244(VarNext)
% 32.24/31.99 <=> ( v1245(VarNext)
% 32.24/31.99 & v1240(VarNext) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_127,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( ~ v1245(VarNext)
% 32.24/31.99 <=> v1247(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_274,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1247(VarNext)
% 32.24/31.99 <=> v1240(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_273,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1240(VarCurr)
% 32.24/31.99 <=> v288(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addConditionBooleanCondShiftedRangesElseBranch_2,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1233(VarCurr)
% 32.24/31.99 => ( v36(VarCurr,bitIndex2)
% 32.24/31.99 <=> $false ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addConditionBooleanCondShiftedRangesThenBranch_1,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1233(VarCurr)
% 32.24/31.99 => ( v36(VarCurr,bitIndex2)
% 32.24/31.99 <=> $true ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_150,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1233(VarCurr)
% 32.24/31.99 <=> ( v1234(VarCurr)
% 32.24/31.99 | v1235(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_149,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1235(VarCurr)
% 32.24/31.99 <=> ( v1236(VarCurr)
% 32.24/31.99 & v1238(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addBitVectorEqualityBitBlasted_39,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1238(VarCurr)
% 32.24/31.99 <=> ( $true
% 32.24/31.99 <=> v31(VarCurr,bitIndex2) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_126,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1236(VarCurr)
% 32.24/31.99 <=> v1180(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addBitVectorEqualityBitBlasted_38,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1234(VarCurr)
% 32.24/31.99 <=> ( $true
% 32.24/31.99 <=> v31(VarCurr,bitIndex1) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignmentInitValueVector_12,axiom,
% 32.24/31.99 ( ( v31(constB0,bitIndex11)
% 32.24/31.99 <=> $false )
% 32.24/31.99 & ( v31(constB0,bitIndex10)
% 32.24/31.99 <=> $false )
% 32.24/31.99 & ( v31(constB0,bitIndex9)
% 32.24/31.99 <=> $false )
% 32.24/31.99 & ( v31(constB0,bitIndex8)
% 32.24/31.99 <=> $false )
% 32.24/31.99 & ( v31(constB0,bitIndex7)
% 32.24/31.99 <=> $false )
% 32.24/31.99 & ( v31(constB0,bitIndex6)
% 32.24/31.99 <=> $false )
% 32.24/31.99 & ( v31(constB0,bitIndex5)
% 32.24/31.99 <=> $false )
% 32.24/31.99 & ( v31(constB0,bitIndex4)
% 32.24/31.99 <=> $false )
% 32.24/31.99 & ( v31(constB0,bitIndex3)
% 32.24/31.99 <=> $false )
% 32.24/31.99 & ( v31(constB0,bitIndex2)
% 32.24/31.99 <=> $false )
% 32.24/31.99 & ( v31(constB0,bitIndex1)
% 32.24/31.99 <=> $false ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_257,axiom,
% 32.24/31.99 ~ b00000000000(bitIndex10) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_256,axiom,
% 32.24/31.99 ~ b00000000000(bitIndex9) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_255,axiom,
% 32.24/31.99 ~ b00000000000(bitIndex8) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_254,axiom,
% 32.24/31.99 ~ b00000000000(bitIndex7) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_253,axiom,
% 32.24/31.99 ~ b00000000000(bitIndex6) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_252,axiom,
% 32.24/31.99 ~ b00000000000(bitIndex5) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_251,axiom,
% 32.24/31.99 ~ b00000000000(bitIndex4) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_250,axiom,
% 32.24/31.99 ~ b00000000000(bitIndex3) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_249,axiom,
% 32.24/31.99 ~ b00000000000(bitIndex2) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_248,axiom,
% 32.24/31.99 ~ b00000000000(bitIndex1) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_247,axiom,
% 32.24/31.99 ~ b00000000000(bitIndex0) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignmentInitValueVector_11,axiom,
% 32.24/31.99 ( v31(constB0,bitIndex0)
% 32.24/31.99 <=> $true ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_272,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1220(VarCurr)
% 32.24/31.99 <=> v12(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_271,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1198(VarCurr)
% 32.24/31.99 <=> v1200(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_270,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1200(VarCurr)
% 32.24/31.99 <=> v16(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_269,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1168(VarCurr)
% 32.24/31.99 <=> v1170(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_268,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1170(VarCurr)
% 32.24/31.99 <=> v1172(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_267,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1172(VarCurr)
% 32.24/31.99 <=> v1174(VarCurr,bitIndex3) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_266,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1174(VarCurr,bitIndex3)
% 32.24/31.99 <=> v743(VarCurr,bitIndex3) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_265,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1162(VarCurr)
% 32.24/31.99 <=> v1164(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_264,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1164(VarCurr)
% 32.24/31.99 <=> v1166(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_263,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1166(VarCurr)
% 32.24/31.99 <=> v915(VarCurr,bitIndex1) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_148,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1148(VarCurr)
% 32.24/31.99 <=> ( v1156(VarCurr)
% 32.24/31.99 & v1158(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_125,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1158(VarCurr)
% 32.24/31.99 <=> v1150(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_147,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1156(VarCurr)
% 32.24/31.99 <=> ( v1157(VarCurr)
% 32.24/31.99 & v909(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_124,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1157(VarCurr)
% 32.24/31.99 <=> v1031(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_262,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1150(VarCurr)
% 32.24/31.99 <=> v1152(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_261,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1152(VarCurr)
% 32.24/31.99 <=> v1154(VarCurr,bitIndex0) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_260,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1154(VarCurr,bitIndex0)
% 32.24/31.99 <=> v1142(VarCurr,bitIndex0) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_259,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1142(VarCurr,bitIndex0)
% 32.24/31.99 <=> v919(VarCurr,bitIndex0) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_258,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v919(VarCurr,bitIndex0)
% 32.24/31.99 <=> v921(VarCurr,bitIndex0) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_257,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v921(VarCurr,bitIndex0)
% 32.24/31.99 <=> v1017(VarCurr,bitIndex0) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_146,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1029(VarCurr)
% 32.24/31.99 <=> ( v1146(VarCurr)
% 32.24/31.99 & v1132(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_123,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1146(VarCurr)
% 32.24/31.99 <=> v1031(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_256,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1132(VarCurr)
% 32.24/31.99 <=> v1134(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_255,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1134(VarCurr)
% 32.24/31.99 <=> v1136(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_145,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1136(VarCurr)
% 32.24/31.99 <=> ( v1144(VarCurr)
% 32.24/31.99 & v1138(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_122,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1144(VarCurr)
% 32.24/31.99 <=> v915(VarCurr,bitIndex1) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_254,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1138(VarCurr)
% 32.24/31.99 <=> v1140(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_253,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1140(VarCurr)
% 32.24/31.99 <=> v1142(VarCurr,bitIndex15) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_252,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1142(VarCurr,bitIndex15)
% 32.24/31.99 <=> v919(VarCurr,bitIndex15) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_251,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v919(VarCurr,bitIndex15)
% 32.24/31.99 <=> v921(VarCurr,bitIndex15) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_250,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v921(VarCurr,bitIndex15)
% 32.24/31.99 <=> v1017(VarCurr,bitIndex15) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_249,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1031(VarCurr)
% 32.24/31.99 <=> v1033(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_248,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1033(VarCurr)
% 32.24/31.99 <=> v1035(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addBitVectorEqualityBitBlasted_37,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1035(VarCurr)
% 32.24/31.99 <=> ( ( v1037(VarCurr,bitIndex4)
% 32.24/31.99 <=> $false )
% 32.24/31.99 & ( v1037(VarCurr,bitIndex3)
% 32.24/31.99 <=> $false )
% 32.24/31.99 & ( v1037(VarCurr,bitIndex2)
% 32.24/31.99 <=> $false )
% 32.24/31.99 & ( v1037(VarCurr,bitIndex1)
% 32.24/31.99 <=> $false )
% 32.24/31.99 & ( v1037(VarCurr,bitIndex0)
% 32.24/31.99 <=> $false ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addCaseBooleanConditionEqualRanges1_10,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( ~ v1118(VarNext)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_4_0(B)
% 32.24/31.99 => ( v1037(VarNext,B)
% 32.24/31.99 <=> v1037(VarCurr,B) ) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addCaseBooleanConditionEqualRanges0_9,axiom,
% 32.24/31.99 ! [VarNext] :
% 32.24/31.99 ( v1118(VarNext)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_4_0(B)
% 32.24/31.99 => ( v1037(VarNext,B)
% 32.24/31.99 <=> v1126(VarNext,B) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_247,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_4_0(B)
% 32.24/31.99 => ( v1126(VarNext,B)
% 32.24/31.99 <=> v1124(VarCurr,B) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(aaddConditionBooleanCondEqualRangesElseBranch_36,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1127(VarCurr)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_4_0(B)
% 32.24/31.99 => ( v1124(VarCurr,B)
% 32.24/31.99 <=> v1039(VarCurr,B) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addConditionBooleanCondEqualRangesThenBranch_37,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1127(VarCurr)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_4_0(B)
% 32.24/31.99 => ( v1124(VarCurr,B)
% 32.24/31.99 <=> $false ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_121,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1127(VarCurr)
% 32.24/31.99 <=> v928(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_144,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1118(VarNext)
% 32.24/31.99 <=> v1119(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_143,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1119(VarNext)
% 32.24/31.99 <=> ( v1120(VarNext)
% 32.24/31.99 & v925(VarNext) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_120,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( ~ v1120(VarNext)
% 32.24/31.99 <=> v984(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addParallelCaseBooleanConditionEqualRanges3_3,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ( ~ v1042(VarCurr)
% 32.24/31.99 & ~ v1044(VarCurr)
% 32.24/31.99 & ~ v1085(VarCurr) )
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_4_0(B)
% 32.24/31.99 => ( v1039(VarCurr,B)
% 32.24/31.99 <=> v1037(VarCurr,B) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addParallelCaseBooleanConditionEqualRanges2_3,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1085(VarCurr)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_4_0(B)
% 32.24/31.99 => ( v1039(VarCurr,B)
% 32.24/31.99 <=> v1087(VarCurr,B) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addParallelCaseBooleanConditionEqualRanges1_7,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1044(VarCurr)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_4_0(B)
% 32.24/31.99 => ( v1039(VarCurr,B)
% 32.24/31.99 <=> v1046(VarCurr,B) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addParallelCaseBooleanConditionEqualRanges0_7,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1042(VarCurr)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_4_0(B)
% 32.24/31.99 => ( v1039(VarCurr,B)
% 32.24/31.99 <=> v1037(VarCurr,B) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addBitVectorEqualityBitBlasted_36,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1114(VarCurr)
% 32.24/31.99 <=> ( ( v1115(VarCurr,bitIndex1)
% 32.24/31.99 <=> $true )
% 32.24/31.99 & ( v1115(VarCurr,bitIndex0)
% 32.24/31.99 <=> $true ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_246,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1115(VarCurr,bitIndex0)
% 32.24/31.99 <=> v1023(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_245,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1115(VarCurr,bitIndex1)
% 32.24/31.99 <=> v945(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(aaddConditionBooleanCondEqualRangesElseBranch_35,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1088(VarCurr)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_4_0(B)
% 32.24/31.99 => ( v1087(VarCurr,B)
% 32.24/31.99 <=> v1089(VarCurr,B) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addConditionBooleanCondEqualRangesThenBranch_36,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1088(VarCurr)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_4_0(B)
% 32.24/31.99 => ( v1087(VarCurr,B)
% 32.24/31.99 <=> b10000(B) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_244,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1089(VarCurr,bitIndex0)
% 32.24/31.99 <=> v1111(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_243,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1089(VarCurr,bitIndex1)
% 32.24/31.99 <=> v1109(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_242,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1089(VarCurr,bitIndex2)
% 32.24/31.99 <=> v1104(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_241,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1089(VarCurr,bitIndex3)
% 32.24/31.99 <=> v1099(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_240,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1089(VarCurr,bitIndex4)
% 32.24/31.99 <=> v1091(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_142,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1109(VarCurr)
% 32.24/31.99 <=> ( v1110(VarCurr)
% 32.24/31.99 & v1113(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorShiftedRanges_71,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1113(VarCurr)
% 32.24/31.99 <=> ( v1037(VarCurr,bitIndex0)
% 32.24/31.99 | v1037(VarCurr,bitIndex1) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_141,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1110(VarCurr)
% 32.24/31.99 <=> ( v1111(VarCurr)
% 32.24/31.99 | v1112(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_119,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1112(VarCurr)
% 32.24/31.99 <=> v1037(VarCurr,bitIndex1) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_118,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1111(VarCurr)
% 32.24/31.99 <=> v1037(VarCurr,bitIndex0) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_140,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1104(VarCurr)
% 32.24/31.99 <=> ( v1105(VarCurr)
% 32.24/31.99 & v1108(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorShiftedRanges_70,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1108(VarCurr)
% 32.24/31.99 <=> ( v1096(VarCurr)
% 32.24/31.99 | v1037(VarCurr,bitIndex2) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_139,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1105(VarCurr)
% 32.24/31.99 <=> ( v1106(VarCurr)
% 32.24/31.99 | v1107(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_117,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1107(VarCurr)
% 32.24/31.99 <=> v1037(VarCurr,bitIndex2) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_116,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1106(VarCurr)
% 32.24/31.99 <=> v1096(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_138,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1099(VarCurr)
% 32.24/31.99 <=> ( v1100(VarCurr)
% 32.24/31.99 & v1103(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorShiftedRanges_69,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1103(VarCurr)
% 32.24/31.99 <=> ( v1095(VarCurr)
% 32.24/31.99 | v1037(VarCurr,bitIndex3) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_137,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1100(VarCurr)
% 32.24/31.99 <=> ( v1101(VarCurr)
% 32.24/31.99 | v1102(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_115,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1102(VarCurr)
% 32.24/31.99 <=> v1037(VarCurr,bitIndex3) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_114,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1101(VarCurr)
% 32.24/31.99 <=> v1095(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_136,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1091(VarCurr)
% 32.24/31.99 <=> ( v1092(VarCurr)
% 32.24/31.99 & v1098(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorShiftedRanges_68,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1098(VarCurr)
% 32.24/31.99 <=> ( v1094(VarCurr)
% 32.24/31.99 | v1037(VarCurr,bitIndex4) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_135,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1092(VarCurr)
% 32.24/31.99 <=> ( v1093(VarCurr)
% 32.24/31.99 | v1097(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_113,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1097(VarCurr)
% 32.24/31.99 <=> v1037(VarCurr,bitIndex4) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_112,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1093(VarCurr)
% 32.24/31.99 <=> v1094(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorShiftedRanges_67,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1094(VarCurr)
% 32.24/31.99 <=> ( v1095(VarCurr)
% 32.24/31.99 & v1037(VarCurr,bitIndex3) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorShiftedRanges_66,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1095(VarCurr)
% 32.24/31.99 <=> ( v1096(VarCurr)
% 32.24/31.99 & v1037(VarCurr,bitIndex2) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorShiftedRanges_65,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1096(VarCurr)
% 32.24/31.99 <=> ( v1037(VarCurr,bitIndex0)
% 32.24/31.99 & v1037(VarCurr,bitIndex1) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addBitVectorEqualityBitBlasted_35,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1088(VarCurr)
% 32.24/31.99 <=> ( ( v1037(VarCurr,bitIndex4)
% 32.24/31.99 <=> $true )
% 32.24/31.99 & ( v1037(VarCurr,bitIndex3)
% 32.24/31.99 <=> $false )
% 32.24/31.99 & ( v1037(VarCurr,bitIndex2)
% 32.24/31.99 <=> $false )
% 32.24/31.99 & ( v1037(VarCurr,bitIndex1)
% 32.24/31.99 <=> $false )
% 32.24/31.99 & ( v1037(VarCurr,bitIndex0)
% 32.24/31.99 <=> $false ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_246,axiom,
% 32.24/31.99 b10000(bitIndex4) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_245,axiom,
% 32.24/31.99 ~ b10000(bitIndex3) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_244,axiom,
% 32.24/31.99 ~ b10000(bitIndex2) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_243,axiom,
% 32.24/31.99 ~ b10000(bitIndex1) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_242,axiom,
% 32.24/31.99 ~ b10000(bitIndex0) ).
% 32.24/31.99
% 32.24/31.99 fof(addBitVectorEqualityBitBlasted_34,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1085(VarCurr)
% 32.24/31.99 <=> ( ( v1086(VarCurr,bitIndex1)
% 32.24/31.99 <=> $true )
% 32.24/31.99 & ( v1086(VarCurr,bitIndex0)
% 32.24/31.99 <=> $false ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_239,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1086(VarCurr,bitIndex0)
% 32.24/31.99 <=> v1023(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_238,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1086(VarCurr,bitIndex1)
% 32.24/31.99 <=> v945(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(aaddConditionBooleanCondEqualRangesElseBranch_34,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1047(VarCurr)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_31_0(B)
% 32.24/31.99 => ( v1046(VarCurr,B)
% 32.24/31.99 <=> v1048(VarCurr,B) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addConditionBooleanCondEqualRangesThenBranch_35,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1047(VarCurr)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_31_0(B)
% 32.24/31.99 => ( v1046(VarCurr,B)
% 32.24/31.99 <=> $false ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addSignExtensionConstraint_104,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1048(VarCurr,bitIndex6)
% 32.24/31.99 <=> v1049(VarCurr,bitIndex5) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addSignExtensionConstraint_103,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1048(VarCurr,bitIndex7)
% 32.24/31.99 <=> v1049(VarCurr,bitIndex5) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addSignExtensionConstraint_102,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1048(VarCurr,bitIndex8)
% 32.24/31.99 <=> v1049(VarCurr,bitIndex5) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addSignExtensionConstraint_101,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1048(VarCurr,bitIndex9)
% 32.24/31.99 <=> v1049(VarCurr,bitIndex5) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addSignExtensionConstraint_100,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1048(VarCurr,bitIndex10)
% 32.24/31.99 <=> v1049(VarCurr,bitIndex5) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addSignExtensionConstraint_99,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1048(VarCurr,bitIndex11)
% 32.24/31.99 <=> v1049(VarCurr,bitIndex5) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addSignExtensionConstraint_98,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1048(VarCurr,bitIndex12)
% 32.24/31.99 <=> v1049(VarCurr,bitIndex5) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addSignExtensionConstraint_97,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1048(VarCurr,bitIndex13)
% 32.24/31.99 <=> v1049(VarCurr,bitIndex5) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addSignExtensionConstraint_96,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1048(VarCurr,bitIndex14)
% 32.24/31.99 <=> v1049(VarCurr,bitIndex5) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addSignExtensionConstraint_95,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1048(VarCurr,bitIndex15)
% 32.24/31.99 <=> v1049(VarCurr,bitIndex5) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addSignExtensionConstraint_94,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1048(VarCurr,bitIndex16)
% 32.24/31.99 <=> v1049(VarCurr,bitIndex5) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addSignExtensionConstraint_93,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1048(VarCurr,bitIndex17)
% 32.24/31.99 <=> v1049(VarCurr,bitIndex5) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addSignExtensionConstraint_92,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1048(VarCurr,bitIndex18)
% 32.24/31.99 <=> v1049(VarCurr,bitIndex5) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addSignExtensionConstraint_91,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1048(VarCurr,bitIndex19)
% 32.24/31.99 <=> v1049(VarCurr,bitIndex5) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addSignExtensionConstraint_90,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1048(VarCurr,bitIndex20)
% 32.24/31.99 <=> v1049(VarCurr,bitIndex5) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addSignExtensionConstraint_89,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1048(VarCurr,bitIndex21)
% 32.24/31.99 <=> v1049(VarCurr,bitIndex5) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addSignExtensionConstraint_88,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1048(VarCurr,bitIndex22)
% 32.24/31.99 <=> v1049(VarCurr,bitIndex5) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addSignExtensionConstraint_87,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1048(VarCurr,bitIndex23)
% 32.24/31.99 <=> v1049(VarCurr,bitIndex5) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addSignExtensionConstraint_86,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1048(VarCurr,bitIndex24)
% 32.24/31.99 <=> v1049(VarCurr,bitIndex5) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addSignExtensionConstraint_85,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1048(VarCurr,bitIndex25)
% 32.24/31.99 <=> v1049(VarCurr,bitIndex5) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addSignExtensionConstraint_84,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1048(VarCurr,bitIndex26)
% 32.24/31.99 <=> v1049(VarCurr,bitIndex5) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addSignExtensionConstraint_83,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1048(VarCurr,bitIndex27)
% 32.24/31.99 <=> v1049(VarCurr,bitIndex5) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addSignExtensionConstraint_82,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1048(VarCurr,bitIndex28)
% 32.24/31.99 <=> v1049(VarCurr,bitIndex5) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addSignExtensionConstraint_81,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1048(VarCurr,bitIndex29)
% 32.24/31.99 <=> v1049(VarCurr,bitIndex5) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addSignExtensionConstraint_80,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1048(VarCurr,bitIndex30)
% 32.24/31.99 <=> v1049(VarCurr,bitIndex5) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addSignExtensionConstraint_79,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1048(VarCurr,bitIndex31)
% 32.24/31.99 <=> v1049(VarCurr,bitIndex5) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_237,axiom,
% 32.24/31.99 ! [VarCurr,B] :
% 32.24/31.99 ( range_5_0(B)
% 32.24/31.99 => ( v1048(VarCurr,B)
% 32.24/31.99 <=> v1049(VarCurr,B) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_236,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1049(VarCurr,bitIndex0)
% 32.24/31.99 <=> v1083(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_235,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1049(VarCurr,bitIndex1)
% 32.24/31.99 <=> v1081(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_234,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1049(VarCurr,bitIndex2)
% 32.24/31.99 <=> v1077(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_233,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1049(VarCurr,bitIndex3)
% 32.24/31.99 <=> v1073(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_232,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1049(VarCurr,bitIndex4)
% 32.24/31.99 <=> v1069(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_231,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1049(VarCurr,bitIndex5)
% 32.24/31.99 <=> v1051(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_134,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1081(VarCurr)
% 32.24/31.99 <=> ( v1082(VarCurr)
% 32.24/31.99 & v1084(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_133,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1084(VarCurr)
% 32.24/31.99 <=> ( v1055(VarCurr,bitIndex0)
% 32.24/31.99 | v1063(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorShiftedRanges_64,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1082(VarCurr)
% 32.24/31.99 <=> ( v1083(VarCurr)
% 32.24/31.99 | v1055(VarCurr,bitIndex1) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_111,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1083(VarCurr)
% 32.24/31.99 <=> v1055(VarCurr,bitIndex0) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_132,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1077(VarCurr)
% 32.24/31.99 <=> ( v1078(VarCurr)
% 32.24/31.99 & v1080(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_131,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1080(VarCurr)
% 32.24/31.99 <=> ( v1061(VarCurr)
% 32.24/31.99 | v1064(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorShiftedRanges_63,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1078(VarCurr)
% 32.24/31.99 <=> ( v1079(VarCurr)
% 32.24/31.99 | v1055(VarCurr,bitIndex2) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_110,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1079(VarCurr)
% 32.24/31.99 <=> v1061(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_130,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1073(VarCurr)
% 32.24/31.99 <=> ( v1074(VarCurr)
% 32.24/31.99 & v1076(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_129,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1076(VarCurr)
% 32.24/31.99 <=> ( v1059(VarCurr)
% 32.24/31.99 | v1065(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorShiftedRanges_62,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1074(VarCurr)
% 32.24/31.99 <=> ( v1075(VarCurr)
% 32.24/31.99 | v1055(VarCurr,bitIndex3) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_109,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1075(VarCurr)
% 32.24/31.99 <=> v1059(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_128,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1069(VarCurr)
% 32.24/31.99 <=> ( v1070(VarCurr)
% 32.24/31.99 & v1072(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_127,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1072(VarCurr)
% 32.24/31.99 <=> ( v1057(VarCurr)
% 32.24/31.99 | v1066(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorShiftedRanges_61,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1070(VarCurr)
% 32.24/31.99 <=> ( v1071(VarCurr)
% 32.24/31.99 | v1055(VarCurr,bitIndex4) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_108,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1071(VarCurr)
% 32.24/31.99 <=> v1057(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_126,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1051(VarCurr)
% 32.24/31.99 <=> ( v1052(VarCurr)
% 32.24/31.99 & v1067(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_125,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1067(VarCurr)
% 32.24/31.99 <=> ( v1054(VarCurr)
% 32.24/31.99 | v1068(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_107,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1068(VarCurr)
% 32.24/31.99 <=> v1055(VarCurr,bitIndex5) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorShiftedRanges_60,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1052(VarCurr)
% 32.24/31.99 <=> ( v1053(VarCurr)
% 32.24/31.99 | v1055(VarCurr,bitIndex5) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_106,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1053(VarCurr)
% 32.24/31.99 <=> v1054(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorShiftedRanges_59,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1054(VarCurr)
% 32.24/31.99 <=> ( v1055(VarCurr,bitIndex4)
% 32.24/31.99 | v1056(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_124,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1056(VarCurr)
% 32.24/31.99 <=> ( v1057(VarCurr)
% 32.24/31.99 & v1066(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_105,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1066(VarCurr)
% 32.24/31.99 <=> v1055(VarCurr,bitIndex4) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorShiftedRanges_58,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1057(VarCurr)
% 32.24/31.99 <=> ( v1055(VarCurr,bitIndex3)
% 32.24/31.99 | v1058(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_123,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1058(VarCurr)
% 32.24/31.99 <=> ( v1059(VarCurr)
% 32.24/31.99 & v1065(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_104,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1065(VarCurr)
% 32.24/31.99 <=> v1055(VarCurr,bitIndex3) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorShiftedRanges_57,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1059(VarCurr)
% 32.24/31.99 <=> ( v1055(VarCurr,bitIndex2)
% 32.24/31.99 | v1060(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_122,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1060(VarCurr)
% 32.24/31.99 <=> ( v1061(VarCurr)
% 32.24/31.99 & v1064(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_103,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1064(VarCurr)
% 32.24/31.99 <=> v1055(VarCurr,bitIndex2) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorShiftedRanges_56,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1061(VarCurr)
% 32.24/31.99 <=> ( v1055(VarCurr,bitIndex1)
% 32.24/31.99 | v1062(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_121,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1062(VarCurr)
% 32.24/31.99 <=> ( v1055(VarCurr,bitIndex0)
% 32.24/31.99 & v1063(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_102,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( ~ v1063(VarCurr)
% 32.24/31.99 <=> v1055(VarCurr,bitIndex1) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addZeroExtensionConstraint_3,axiom,
% 32.24/31.99 ! [VarCurr] : ~ v1055(VarCurr,bitIndex5) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_230,axiom,
% 32.24/31.99 ! [VarCurr,B] :
% 32.24/31.99 ( range_4_0(B)
% 32.24/31.99 => ( v1055(VarCurr,B)
% 32.24/31.99 <=> v1037(VarCurr,B) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addBitVectorEqualityBitBlasted_33,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1047(VarCurr)
% 32.24/31.99 <=> ( ( v1037(VarCurr,bitIndex4)
% 32.24/31.99 <=> $false )
% 32.24/31.99 & ( v1037(VarCurr,bitIndex3)
% 32.24/31.99 <=> $false )
% 32.24/31.99 & ( v1037(VarCurr,bitIndex2)
% 32.24/31.99 <=> $false )
% 32.24/31.99 & ( v1037(VarCurr,bitIndex1)
% 32.24/31.99 <=> $false )
% 32.24/31.99 & ( v1037(VarCurr,bitIndex0)
% 32.24/31.99 <=> $false ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addBitVectorEqualityBitBlasted_32,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1044(VarCurr)
% 32.24/31.99 <=> ( ( v1045(VarCurr,bitIndex1)
% 32.24/31.99 <=> $false )
% 32.24/31.99 & ( v1045(VarCurr,bitIndex0)
% 32.24/31.99 <=> $true ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_229,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1045(VarCurr,bitIndex0)
% 32.24/31.99 <=> v1023(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_228,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1045(VarCurr,bitIndex1)
% 32.24/31.99 <=> v945(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignmentInitValue_12,axiom,
% 32.24/31.99 ~ v1037(constB0,bitIndex4) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignmentInitValue_11,axiom,
% 32.24/31.99 ~ v1037(constB0,bitIndex3) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignmentInitValue_10,axiom,
% 32.24/31.99 ~ v1037(constB0,bitIndex2) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignmentInitValue_9,axiom,
% 32.24/31.99 ~ v1037(constB0,bitIndex1) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignmentInitValue_8,axiom,
% 32.24/31.99 v1037(constB0,bitIndex0) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_241,axiom,
% 32.24/31.99 ~ b00001(bitIndex4) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_240,axiom,
% 32.24/31.99 ~ b00001(bitIndex3) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_239,axiom,
% 32.24/31.99 ~ b00001(bitIndex2) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_238,axiom,
% 32.24/31.99 ~ b00001(bitIndex1) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_237,axiom,
% 32.24/31.99 b00001(bitIndex0) ).
% 32.24/31.99
% 32.24/31.99 fof(addBitVectorEqualityBitBlasted_31,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1042(VarCurr)
% 32.24/31.99 <=> ( ( v1043(VarCurr,bitIndex1)
% 32.24/31.99 <=> $false )
% 32.24/31.99 & ( v1043(VarCurr,bitIndex0)
% 32.24/31.99 <=> $false ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_227,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1043(VarCurr,bitIndex0)
% 32.24/31.99 <=> v1023(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_226,axiom,
% 32.24/31.99 ! [VarCurr] :
% 32.24/31.99 ( v1043(VarCurr,bitIndex1)
% 32.24/31.99 <=> v945(VarCurr) ) ).
% 32.24/31.99
% 32.24/31.99 fof(memoryReadIntoBuffer_1,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ! [AssociatedAddressVar] :
% 32.24/31.99 ( v1019_range_3_to_0_address_association(VarNext,AssociatedAddressVar)
% 32.24/31.99 => ! [A] :
% 32.24/31.99 ( address(A)
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( A = AssociatedAddressVar
% 32.24/31.99 => ( range_17_0(B)
% 32.24/31.99 => ( v1017(VarNext,B)
% 32.24/31.99 <=> v923_array(VarNext,A,B) ) ) ) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignmentInitValueVector_10,axiom,
% 32.24/31.99 ! [B] :
% 32.24/31.99 ( range_3_0(B)
% 32.24/31.99 => ( v1019(constB0,B)
% 32.24/31.99 <=> $false ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(memoryConstantWriteDisabled_1,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ! [A] :
% 32.24/31.99 ( ~ ( $true
% 32.24/31.99 & v1009(VarNext) )
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_17_0(B)
% 32.24/31.99 => ( v923_array(VarNext,A,B)
% 32.24/31.99 <=> v923_1__array(VarNext,A,B) ) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(memoryConstantWriteEnabledInsideRange_1,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ! [A] :
% 32.24/31.99 ( ( $true
% 32.24/31.99 & v1009(VarNext) )
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_17_0(B)
% 32.24/31.99 => ( v923_array(VarNext,A,B)
% 32.24/31.99 <=> b000000000000000000(B) ) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_236,axiom,
% 32.24/31.99 ~ b000000000000000000(bitIndex17) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_235,axiom,
% 32.24/31.99 ~ b000000000000000000(bitIndex16) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_234,axiom,
% 32.24/31.99 ~ b000000000000000000(bitIndex15) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_233,axiom,
% 32.24/31.99 ~ b000000000000000000(bitIndex14) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_232,axiom,
% 32.24/31.99 ~ b000000000000000000(bitIndex13) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_231,axiom,
% 32.24/31.99 ~ b000000000000000000(bitIndex12) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_230,axiom,
% 32.24/31.99 ~ b000000000000000000(bitIndex11) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_229,axiom,
% 32.24/31.99 ~ b000000000000000000(bitIndex10) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_228,axiom,
% 32.24/31.99 ~ b000000000000000000(bitIndex9) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_227,axiom,
% 32.24/31.99 ~ b000000000000000000(bitIndex8) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_226,axiom,
% 32.24/31.99 ~ b000000000000000000(bitIndex7) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_225,axiom,
% 32.24/31.99 ~ b000000000000000000(bitIndex6) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_224,axiom,
% 32.24/31.99 ~ b000000000000000000(bitIndex5) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_223,axiom,
% 32.24/31.99 ~ b000000000000000000(bitIndex4) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_222,axiom,
% 32.24/31.99 ~ b000000000000000000(bitIndex3) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_221,axiom,
% 32.24/31.99 ~ b000000000000000000(bitIndex2) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_220,axiom,
% 32.24/31.99 ~ b000000000000000000(bitIndex1) ).
% 32.24/31.99
% 32.24/31.99 fof(bitBlastConstant_219,axiom,
% 32.24/31.99 ~ b000000000000000000(bitIndex0) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_120,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1009(VarNext)
% 32.24/31.99 <=> ( v1010(VarNext)
% 32.24/31.99 & v1015(VarNext) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(addAssignment_225,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1015(VarNext)
% 32.24/31.99 <=> v1006(VarCurr) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeBinaryOperatorEqualRangesSingleBits_119,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( v1010(VarNext)
% 32.24/31.99 <=> ( v1012(VarNext)
% 32.24/31.99 & v925(VarNext) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(writeUnaryOperator_101,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ( ~ v1012(VarNext)
% 32.24/31.99 <=> v984(VarNext) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(memoryWriteDisabled_1,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ! [AssociatedAddressVar] :
% 32.24/31.99 ( v953_range_3_to_0_address_association(VarNext,AssociatedAddressVar)
% 32.24/31.99 => ! [A] :
% 32.24/31.99 ( ~ ( A = AssociatedAddressVar
% 32.24/31.99 & v997(VarNext) )
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_17_0(B)
% 32.24/31.99 => ( v923_1__array(VarNext,A,B)
% 32.24/31.99 <=> v923_array(VarCurr,A,B) ) ) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(memoryWriteEnabledInsideRange_1,axiom,
% 32.24/31.99 ! [VarNext,VarCurr] :
% 32.24/31.99 ( nextState(VarCurr,VarNext)
% 32.24/31.99 => ! [AssociatedAddressVar] :
% 32.24/31.99 ( v953_range_3_to_0_address_association(VarNext,AssociatedAddressVar)
% 32.24/31.99 => ! [A] :
% 32.24/31.99 ( ( A = AssociatedAddressVar
% 32.24/31.99 & v997(VarNext) )
% 32.24/31.99 => ! [B] :
% 32.24/31.99 ( range_17_0(B)
% 32.24/31.99 => ( v923_1__array(VarNext,A,B)
% 32.24/31.99 <=> v930(VarNext,B) ) ) ) ) ) ).
% 32.24/31.99
% 32.24/31.99 fof(range_axiom_12,axiom,
% 32.24/31.99 ! [B] :
% 32.24/31.99 ( range_17_0(B)
% 32.24/31.99 <=> ( $false
% 32.24/31.99 | bitIndex0 = B
% 32.24/31.99 | bitIndex1 = B
% 32.24/31.99 | bitIndex2 = B
% 32.24/32.00 | bitIndex3 = B
% 32.24/32.00 | bitIndex4 = B
% 32.24/32.00 | bitIndex5 = B
% 32.24/32.00 | bitIndex6 = B
% 32.24/32.00 | bitIndex7 = B
% 32.24/32.00 | bitIndex8 = B
% 32.24/32.00 | bitIndex9 = B
% 32.24/32.00 | bitIndex10 = B
% 32.24/32.00 | bitIndex11 = B
% 32.24/32.00 | bitIndex12 = B
% 32.24/32.00 | bitIndex13 = B
% 32.24/32.00 | bitIndex14 = B
% 32.24/32.00 | bitIndex15 = B
% 32.24/32.00 | bitIndex16 = B
% 32.24/32.00 | bitIndex17 = B ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_118,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( v997(VarNext)
% 32.24/32.00 <=> ( v998(VarNext)
% 32.24/32.00 & v1004(VarNext) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_224,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( v1004(VarNext)
% 32.24/32.00 <=> v1002(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_117,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v1002(VarCurr)
% 32.24/32.00 <=> ( v1005(VarCurr)
% 32.24/32.00 & v945(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_100,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v1005(VarCurr)
% 32.24/32.00 <=> v1006(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_99,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v1006(VarCurr)
% 32.24/32.00 <=> v928(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_116,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( v998(VarNext)
% 32.24/32.00 <=> ( v999(VarNext)
% 32.24/32.00 & v925(VarNext) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_98,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( ~ v999(VarNext)
% 32.24/32.00 <=> v984(VarNext) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_111,axiom,
% 32.24/32.00 ~ v923_array(constB0,b1111_address_term,bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_110,axiom,
% 32.24/32.00 ~ v923_array(constB0,b1111_address_term,bitIndex15) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_109,axiom,
% 32.24/32.00 ~ v923_array(constB0,b1111_address_term,bitIndex17) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_108,axiom,
% 32.24/32.00 ~ v923_array(constB0,b1110_address_term,bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_107,axiom,
% 32.24/32.00 ~ v923_array(constB0,b1110_address_term,bitIndex15) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_106,axiom,
% 32.24/32.00 ~ v923_array(constB0,b1110_address_term,bitIndex17) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_105,axiom,
% 32.24/32.00 ~ v923_array(constB0,b1101_address_term,bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_104,axiom,
% 32.24/32.00 ~ v923_array(constB0,b1101_address_term,bitIndex15) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_103,axiom,
% 32.24/32.00 ~ v923_array(constB0,b1101_address_term,bitIndex17) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_102,axiom,
% 32.24/32.00 ~ v923_array(constB0,b1100_address_term,bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_101,axiom,
% 32.24/32.00 ~ v923_array(constB0,b1100_address_term,bitIndex15) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_100,axiom,
% 32.24/32.00 ~ v923_array(constB0,b1100_address_term,bitIndex17) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_99,axiom,
% 32.24/32.00 ~ v923_array(constB0,b1011_address_term,bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_98,axiom,
% 32.24/32.00 ~ v923_array(constB0,b1011_address_term,bitIndex15) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_97,axiom,
% 32.24/32.00 ~ v923_array(constB0,b1011_address_term,bitIndex17) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_96,axiom,
% 32.24/32.00 ~ v923_array(constB0,b1010_address_term,bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_95,axiom,
% 32.24/32.00 ~ v923_array(constB0,b1010_address_term,bitIndex15) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_94,axiom,
% 32.24/32.00 ~ v923_array(constB0,b1010_address_term,bitIndex17) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_93,axiom,
% 32.24/32.00 ~ v923_array(constB0,b1001_address_term,bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_92,axiom,
% 32.24/32.00 ~ v923_array(constB0,b1001_address_term,bitIndex15) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_91,axiom,
% 32.24/32.00 ~ v923_array(constB0,b1001_address_term,bitIndex17) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_90,axiom,
% 32.24/32.00 ~ v923_array(constB0,b1000_address_term,bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_89,axiom,
% 32.24/32.00 ~ v923_array(constB0,b1000_address_term,bitIndex15) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_88,axiom,
% 32.24/32.00 ~ v923_array(constB0,b1000_address_term,bitIndex17) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_87,axiom,
% 32.24/32.00 ~ v923_array(constB0,b0111_address_term,bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_86,axiom,
% 32.24/32.00 ~ v923_array(constB0,b0111_address_term,bitIndex15) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_85,axiom,
% 32.24/32.00 ~ v923_array(constB0,b0111_address_term,bitIndex17) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_84,axiom,
% 32.24/32.00 ~ v923_array(constB0,b0110_address_term,bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_83,axiom,
% 32.24/32.00 ~ v923_array(constB0,b0110_address_term,bitIndex15) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_82,axiom,
% 32.24/32.00 ~ v923_array(constB0,b0110_address_term,bitIndex17) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_81,axiom,
% 32.24/32.00 ~ v923_array(constB0,b0101_address_term,bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_80,axiom,
% 32.24/32.00 ~ v923_array(constB0,b0101_address_term,bitIndex15) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_79,axiom,
% 32.24/32.00 ~ v923_array(constB0,b0101_address_term,bitIndex17) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_78,axiom,
% 32.24/32.00 ~ v923_array(constB0,b0100_address_term,bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_77,axiom,
% 32.24/32.00 ~ v923_array(constB0,b0100_address_term,bitIndex15) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_76,axiom,
% 32.24/32.00 ~ v923_array(constB0,b0100_address_term,bitIndex17) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_75,axiom,
% 32.24/32.00 ~ v923_array(constB0,b0011_address_term,bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_74,axiom,
% 32.24/32.00 ~ v923_array(constB0,b0011_address_term,bitIndex15) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_73,axiom,
% 32.24/32.00 ~ v923_array(constB0,b0011_address_term,bitIndex17) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_72,axiom,
% 32.24/32.00 ~ v923_array(constB0,b0010_address_term,bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_71,axiom,
% 32.24/32.00 ~ v923_array(constB0,b0010_address_term,bitIndex15) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_70,axiom,
% 32.24/32.00 ~ v923_array(constB0,b0010_address_term,bitIndex17) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_69,axiom,
% 32.24/32.00 ~ v923_array(constB0,b0001_address_term,bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_68,axiom,
% 32.24/32.00 ~ v923_array(constB0,b0001_address_term,bitIndex15) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_67,axiom,
% 32.24/32.00 ~ v923_array(constB0,b0001_address_term,bitIndex17) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_66,axiom,
% 32.24/32.00 ~ v923_array(constB0,b0000_address_term,bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_65,axiom,
% 32.24/32.00 ~ v923_array(constB0,b0000_address_term,bitIndex15) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_64,axiom,
% 32.24/32.00 ~ v923_array(constB0,b0000_address_term,bitIndex17) ).
% 32.24/32.00
% 32.24/32.00 fof(addCaseBooleanConditionEqualRanges1_9,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( ~ v980(VarNext)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_3_0(B)
% 32.24/32.00 => ( v953(VarNext,B)
% 32.24/32.00 <=> v953(VarCurr,B) ) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addCaseBooleanConditionEqualRanges0_8,axiom,
% 32.24/32.00 ! [VarNext] :
% 32.24/32.00 ( v980(VarNext)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_3_0(B)
% 32.24/32.00 => ( v953(VarNext,B)
% 32.24/32.00 <=> v990(VarNext,B) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_223,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_3_0(B)
% 32.24/32.00 => ( v990(VarNext,B)
% 32.24/32.00 <=> v988(VarCurr,B) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(aaddConditionBooleanCondEqualRangesElseBranch_33,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v991(VarCurr)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_3_0(B)
% 32.24/32.00 => ( v988(VarCurr,B)
% 32.24/32.00 <=> v955(VarCurr,B) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addConditionBooleanCondEqualRangesThenBranch_34,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v991(VarCurr)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_3_0(B)
% 32.24/32.00 => ( v988(VarCurr,B)
% 32.24/32.00 <=> $false ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_97,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v991(VarCurr)
% 32.24/32.00 <=> v928(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_115,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( v980(VarNext)
% 32.24/32.00 <=> v981(VarNext) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_114,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( v981(VarNext)
% 32.24/32.00 <=> ( v982(VarNext)
% 32.24/32.00 & v925(VarNext) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_96,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( ~ v982(VarNext)
% 32.24/32.00 <=> v984(VarNext) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_222,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( v984(VarNext)
% 32.24/32.00 <=> v925(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(aaddConditionBooleanCondEqualRangesElseBranch_32,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v945(VarCurr)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_3_0(B)
% 32.24/32.00 => ( v955(VarCurr,B)
% 32.24/32.00 <=> v953(VarCurr,B) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addConditionBooleanCondEqualRangesThenBranch_33,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v945(VarCurr)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_3_0(B)
% 32.24/32.00 => ( v955(VarCurr,B)
% 32.24/32.00 <=> v957(VarCurr,B) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(aaddConditionBooleanCondEqualRangesElseBranch_31,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v958(VarCurr)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_3_0(B)
% 32.24/32.00 => ( v957(VarCurr,B)
% 32.24/32.00 <=> v959(VarCurr,B) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addConditionBooleanCondEqualRangesThenBranch_32,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v958(VarCurr)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_3_0(B)
% 32.24/32.00 => ( v957(VarCurr,B)
% 32.24/32.00 <=> $false ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_221,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v959(VarCurr,bitIndex0)
% 32.24/32.00 <=> v975(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_220,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v959(VarCurr,bitIndex1)
% 32.24/32.00 <=> v973(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_219,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v959(VarCurr,bitIndex2)
% 32.24/32.00 <=> v968(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_218,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v959(VarCurr,bitIndex3)
% 32.24/32.00 <=> v961(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_113,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v973(VarCurr)
% 32.24/32.00 <=> ( v974(VarCurr)
% 32.24/32.00 & v977(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorShiftedRanges_55,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v977(VarCurr)
% 32.24/32.00 <=> ( v953(VarCurr,bitIndex0)
% 32.24/32.00 | v953(VarCurr,bitIndex1) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_112,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v974(VarCurr)
% 32.24/32.00 <=> ( v975(VarCurr)
% 32.24/32.00 | v976(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_95,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v976(VarCurr)
% 32.24/32.00 <=> v953(VarCurr,bitIndex1) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_94,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v975(VarCurr)
% 32.24/32.00 <=> v953(VarCurr,bitIndex0) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_111,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v968(VarCurr)
% 32.24/32.00 <=> ( v969(VarCurr)
% 32.24/32.00 & v972(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorShiftedRanges_54,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v972(VarCurr)
% 32.24/32.00 <=> ( v965(VarCurr)
% 32.24/32.00 | v953(VarCurr,bitIndex2) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_110,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v969(VarCurr)
% 32.24/32.00 <=> ( v970(VarCurr)
% 32.24/32.00 | v971(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_93,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v971(VarCurr)
% 32.24/32.00 <=> v953(VarCurr,bitIndex2) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_92,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v970(VarCurr)
% 32.24/32.00 <=> v965(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_109,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v961(VarCurr)
% 32.24/32.00 <=> ( v962(VarCurr)
% 32.24/32.00 & v967(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorShiftedRanges_53,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v967(VarCurr)
% 32.24/32.00 <=> ( v964(VarCurr)
% 32.24/32.00 | v953(VarCurr,bitIndex3) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_108,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v962(VarCurr)
% 32.24/32.00 <=> ( v963(VarCurr)
% 32.24/32.00 | v966(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_91,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v966(VarCurr)
% 32.24/32.00 <=> v953(VarCurr,bitIndex3) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_90,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v963(VarCurr)
% 32.24/32.00 <=> v964(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorShiftedRanges_52,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v964(VarCurr)
% 32.24/32.00 <=> ( v965(VarCurr)
% 32.24/32.00 & v953(VarCurr,bitIndex2) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorShiftedRanges_51,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v965(VarCurr)
% 32.24/32.00 <=> ( v953(VarCurr,bitIndex0)
% 32.24/32.00 & v953(VarCurr,bitIndex1) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addBitVectorEqualityBitBlasted_30,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v958(VarCurr)
% 32.24/32.00 <=> ( ( v953(VarCurr,bitIndex3)
% 32.24/32.00 <=> $true )
% 32.24/32.00 & ( v953(VarCurr,bitIndex2)
% 32.24/32.00 <=> $true )
% 32.24/32.00 & ( v953(VarCurr,bitIndex1)
% 32.24/32.00 <=> $true )
% 32.24/32.00 & ( v953(VarCurr,bitIndex0)
% 32.24/32.00 <=> $true ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignmentInitValue_7,axiom,
% 32.24/32.00 ~ v953(constB0,bitIndex3) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignmentInitValue_6,axiom,
% 32.24/32.00 ~ v953(constB0,bitIndex2) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignmentInitValue_5,axiom,
% 32.24/32.00 ~ v953(constB0,bitIndex1) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignmentInitValue_4,axiom,
% 32.24/32.00 v953(constB0,bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_217,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v945(VarCurr)
% 32.24/32.00 <=> v947(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_216,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v947(VarCurr)
% 32.24/32.00 <=> v949(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_215,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v949(VarCurr)
% 32.24/32.00 <=> v951(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_214,axiom,
% 32.24/32.00 ! [VarCurr,B] :
% 32.24/32.00 ( range_15_0(B)
% 32.24/32.00 => ( v930(VarCurr,B)
% 32.24/32.00 <=> v938(VarCurr,B) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_213,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ( v930(VarCurr,bitIndex17)
% 32.24/32.00 <=> v932(VarCurr,bitIndex1) )
% 32.24/32.00 & ( v930(VarCurr,bitIndex16)
% 32.24/32.00 <=> v932(VarCurr,bitIndex0) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_212,axiom,
% 32.24/32.00 ! [VarCurr,B] :
% 32.24/32.00 ( range_15_0(B)
% 32.24/32.00 => ( v938(VarCurr,B)
% 32.24/32.00 <=> v940(VarCurr,B) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_211,axiom,
% 32.24/32.00 ! [VarCurr,B] :
% 32.24/32.00 ( range_15_0(B)
% 32.24/32.00 => ( v940(VarCurr,B)
% 32.24/32.00 <=> v942(VarCurr,B) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_210,axiom,
% 32.24/32.00 ! [VarCurr,B] :
% 32.24/32.00 ( range_1_0(B)
% 32.24/32.00 => ( v932(VarCurr,B)
% 32.24/32.00 <=> v934(VarCurr,B) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_209,axiom,
% 32.24/32.00 ! [VarCurr,B] :
% 32.24/32.00 ( range_1_0(B)
% 32.24/32.00 => ( v934(VarCurr,B)
% 32.24/32.00 <=> v936(VarCurr,B) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_208,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v928(VarCurr)
% 32.24/32.00 <=> v12(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_207,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v925(VarCurr)
% 32.24/32.00 <=> v288(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_206,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v903(VarCurr)
% 32.24/32.00 <=> v905(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_205,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v905(VarCurr)
% 32.24/32.00 <=> v91(VarCurr,bitIndex2) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_204,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v91(VarCurr,bitIndex2)
% 32.24/32.00 <=> v898(VarCurr,bitIndex2) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_203,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v892(VarCurr,bitIndex2)
% 32.24/32.00 <=> v896(VarCurr,bitIndex2) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_202,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v894(VarCurr,bitIndex2)
% 32.24/32.00 <=> v895(VarCurr,bitIndex1) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_201,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v885(VarCurr,bitIndex2)
% 32.24/32.00 <=> v889(VarCurr,bitIndex2) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_200,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v887(VarCurr,bitIndex2)
% 32.24/32.00 <=> v888(VarCurr,bitIndex1) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_199,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v881(VarCurr)
% 32.24/32.00 <=> v883(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_198,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v883(VarCurr)
% 32.24/32.00 <=> v91(VarCurr,bitIndex1) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_197,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v91(VarCurr,bitIndex1)
% 32.24/32.00 <=> v898(VarCurr,bitIndex1) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesMultipleBits_5,axiom,
% 32.24/32.00 ! [VarCurr,B] :
% 32.24/32.00 ( range_2_0(B)
% 32.24/32.00 => ( v898(VarCurr,B)
% 32.24/32.00 <=> ( v899(VarCurr,B)
% 32.24/32.00 | v892(VarCurr,B) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesMultipleBits_4,axiom,
% 32.24/32.00 ! [VarCurr,B] :
% 32.24/32.00 ( range_2_0(B)
% 32.24/32.00 => ( v899(VarCurr,B)
% 32.24/32.00 <=> ( v900(VarCurr,B)
% 32.24/32.00 & v885(VarCurr,B) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_196,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v900(VarCurr,bitIndex0)
% 32.24/32.00 <=> v901(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_195,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v900(VarCurr,bitIndex1)
% 32.24/32.00 <=> v901(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_194,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v900(VarCurr,bitIndex2)
% 32.24/32.00 <=> v901(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_193,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v901(VarCurr)
% 32.24/32.00 <=> v93(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_192,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v892(VarCurr,bitIndex1)
% 32.24/32.00 <=> v896(VarCurr,bitIndex1) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesMultipleBits_3,axiom,
% 32.24/32.00 ! [VarCurr,B] :
% 32.24/32.00 ( range_2_0(B)
% 32.24/32.00 => ( v896(VarCurr,B)
% 32.24/32.00 <=> ( v95(VarCurr,B)
% 32.24/32.00 & v897(VarCurr,B) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_89,axiom,
% 32.24/32.00 ! [VarCurr,B] :
% 32.24/32.00 ( range_2_0(B)
% 32.24/32.00 => ( v897(VarCurr,B)
% 32.24/32.00 <=> ~ v894(VarCurr,B) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_191,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v894(VarCurr,bitIndex1)
% 32.24/32.00 <=> v895(VarCurr,bitIndex0) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesMultipleBits_2,axiom,
% 32.24/32.00 ! [VarCurr,B] :
% 32.24/32.00 ( range_1_0(B)
% 32.24/32.00 => ( v895(VarCurr,B)
% 32.24/32.00 <=> ( v894(VarCurr,B)
% 32.24/32.00 | v95(VarCurr,B) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_190,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v894(VarCurr,bitIndex0)
% 32.24/32.00 <=> $false ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_189,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v885(VarCurr,bitIndex1)
% 32.24/32.00 <=> v889(VarCurr,bitIndex1) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesMultipleBits_1,axiom,
% 32.24/32.00 ! [VarCurr,B] :
% 32.24/32.00 ( range_2_0(B)
% 32.24/32.00 => ( v889(VarCurr,B)
% 32.24/32.00 <=> ( v97(VarCurr,B)
% 32.24/32.00 & v890(VarCurr,B) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_88,axiom,
% 32.24/32.00 ! [VarCurr,B] :
% 32.24/32.00 ( range_2_0(B)
% 32.24/32.00 => ( v890(VarCurr,B)
% 32.24/32.00 <=> ~ v887(VarCurr,B) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_188,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v887(VarCurr,bitIndex1)
% 32.24/32.00 <=> v888(VarCurr,bitIndex0) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesMultipleBits,axiom,
% 32.24/32.00 ! [VarCurr,B] :
% 32.24/32.00 ( range_1_0(B)
% 32.24/32.00 => ( v888(VarCurr,B)
% 32.24/32.00 <=> ( v887(VarCurr,B)
% 32.24/32.00 | v97(VarCurr,B) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(range_axiom_11,axiom,
% 32.24/32.00 ! [B] :
% 32.24/32.00 ( range_1_0(B)
% 32.24/32.00 <=> ( $false
% 32.24/32.00 | bitIndex0 = B
% 32.24/32.00 | bitIndex1 = B ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_187,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v887(VarCurr,bitIndex0)
% 32.24/32.00 <=> $false ) ).
% 32.24/32.00
% 32.24/32.00 fof(memoryReadIntoBuffer,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ! [AssociatedAddressVar] :
% 32.24/32.00 ( v869_range_3_to_0_address_association(VarNext,AssociatedAddressVar)
% 32.24/32.00 => ! [A] :
% 32.24/32.00 ( address(A)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( A = AssociatedAddressVar
% 32.24/32.00 => ( range_66_0(B)
% 32.24/32.00 => ( v867(VarNext,B)
% 32.24/32.00 <=> v749_array(VarNext,A,B) ) ) ) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignmentInitValueVector_9,axiom,
% 32.24/32.00 ! [B] :
% 32.24/32.00 ( range_3_0(B)
% 32.24/32.00 => ( v869(constB0,B)
% 32.24/32.00 <=> $false ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(memoryConstantWriteDisabled,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ! [A] :
% 32.24/32.00 ( ~ ( $true
% 32.24/32.00 & v859(VarNext) )
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_66_0(B)
% 32.24/32.00 => ( v749_array(VarNext,A,B)
% 32.24/32.00 <=> v749_1__array(VarNext,A,B) ) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(memoryConstantWriteEnabledInsideRange,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ! [A] :
% 32.24/32.00 ( ( $true
% 32.24/32.00 & v859(VarNext) )
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_66_0(B)
% 32.24/32.00 => ( v749_array(VarNext,A,B)
% 32.24/32.00 <=> b0000000000000000000000000000000000000000000000000000000000000000000(B) ) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_218,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex66) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_217,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex65) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_216,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex64) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_215,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex63) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_214,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex62) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_213,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex61) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_212,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex60) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_211,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex59) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_210,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex58) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_209,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex57) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_208,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex56) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_207,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex55) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_206,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex54) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_205,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex53) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_204,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex52) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_203,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex51) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_202,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex50) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_201,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex49) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_200,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex48) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_199,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex47) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_198,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex46) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_197,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex45) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_196,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex44) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_195,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex43) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_194,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex42) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_193,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex41) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_192,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex40) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_191,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex39) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_190,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex38) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_189,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex37) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_188,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex36) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_187,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex35) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_186,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex34) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_185,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex33) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_184,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex32) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_183,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex31) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_182,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex30) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_181,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex29) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_180,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex28) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_179,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex27) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_178,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex26) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_177,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex25) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_176,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex24) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_175,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex23) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_174,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex22) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_173,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex21) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_172,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex20) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_171,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex19) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_170,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex18) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_169,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex17) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_168,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex16) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_167,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex15) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_166,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex14) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_165,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex13) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_164,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex12) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_163,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex11) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_162,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex10) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_161,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex9) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_160,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex8) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_159,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex7) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_158,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex6) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_157,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex5) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_156,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex4) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_155,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex3) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_154,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex2) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_153,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex1) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_152,axiom,
% 32.24/32.00 ~ b0000000000000000000000000000000000000000000000000000000000000000000(bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_107,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( v859(VarNext)
% 32.24/32.00 <=> ( v860(VarNext)
% 32.24/32.00 & v865(VarNext) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_186,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( v865(VarNext)
% 32.24/32.00 <=> v856(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_106,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( v860(VarNext)
% 32.24/32.00 <=> ( v862(VarNext)
% 32.24/32.00 & v751(VarNext) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_87,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( ~ v862(VarNext)
% 32.24/32.00 <=> v823(VarNext) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(memoryWriteDisabled,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ! [AssociatedAddressVar] :
% 32.24/32.00 ( v791_range_3_to_0_address_association(VarNext,AssociatedAddressVar)
% 32.24/32.00 => ! [A] :
% 32.24/32.00 ( ~ ( A = AssociatedAddressVar
% 32.24/32.00 & v847(VarNext) )
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_66_0(B)
% 32.24/32.00 => ( v749_1__array(VarNext,A,B)
% 32.24/32.00 <=> v749_array(VarCurr,A,B) ) ) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(memoryWriteEnabledInsideRange,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ! [AssociatedAddressVar] :
% 32.24/32.00 ( v791_range_3_to_0_address_association(VarNext,AssociatedAddressVar)
% 32.24/32.00 => ! [A] :
% 32.24/32.00 ( ( A = AssociatedAddressVar
% 32.24/32.00 & v847(VarNext) )
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_66_0(B)
% 32.24/32.00 => ( v749_1__array(VarNext,A,B)
% 32.24/32.00 <=> v756(VarNext,B) ) ) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(range_axiom_10,axiom,
% 32.24/32.00 ! [B] :
% 32.24/32.00 ( range_66_0(B)
% 32.24/32.00 <=> ( $false
% 32.24/32.00 | bitIndex0 = B
% 32.24/32.00 | bitIndex1 = B
% 32.24/32.00 | bitIndex2 = B
% 32.24/32.00 | bitIndex3 = B
% 32.24/32.00 | bitIndex4 = B
% 32.24/32.00 | bitIndex5 = B
% 32.24/32.00 | bitIndex6 = B
% 32.24/32.00 | bitIndex7 = B
% 32.24/32.00 | bitIndex8 = B
% 32.24/32.00 | bitIndex9 = B
% 32.24/32.00 | bitIndex10 = B
% 32.24/32.00 | bitIndex11 = B
% 32.24/32.00 | bitIndex12 = B
% 32.24/32.00 | bitIndex13 = B
% 32.24/32.00 | bitIndex14 = B
% 32.24/32.00 | bitIndex15 = B
% 32.24/32.00 | bitIndex16 = B
% 32.24/32.00 | bitIndex17 = B
% 32.24/32.00 | bitIndex18 = B
% 32.24/32.00 | bitIndex19 = B
% 32.24/32.00 | bitIndex20 = B
% 32.24/32.00 | bitIndex21 = B
% 32.24/32.00 | bitIndex22 = B
% 32.24/32.00 | bitIndex23 = B
% 32.24/32.00 | bitIndex24 = B
% 32.24/32.00 | bitIndex25 = B
% 32.24/32.00 | bitIndex26 = B
% 32.24/32.00 | bitIndex27 = B
% 32.24/32.00 | bitIndex28 = B
% 32.24/32.00 | bitIndex29 = B
% 32.24/32.00 | bitIndex30 = B
% 32.24/32.00 | bitIndex31 = B
% 32.24/32.00 | bitIndex32 = B
% 32.24/32.00 | bitIndex33 = B
% 32.24/32.00 | bitIndex34 = B
% 32.24/32.00 | bitIndex35 = B
% 32.24/32.00 | bitIndex36 = B
% 32.24/32.00 | bitIndex37 = B
% 32.24/32.00 | bitIndex38 = B
% 32.24/32.00 | bitIndex39 = B
% 32.24/32.00 | bitIndex40 = B
% 32.24/32.00 | bitIndex41 = B
% 32.24/32.00 | bitIndex42 = B
% 32.24/32.00 | bitIndex43 = B
% 32.24/32.00 | bitIndex44 = B
% 32.24/32.00 | bitIndex45 = B
% 32.24/32.00 | bitIndex46 = B
% 32.24/32.00 | bitIndex47 = B
% 32.24/32.00 | bitIndex48 = B
% 32.24/32.00 | bitIndex49 = B
% 32.24/32.00 | bitIndex50 = B
% 32.24/32.00 | bitIndex51 = B
% 32.24/32.00 | bitIndex52 = B
% 32.24/32.00 | bitIndex53 = B
% 32.24/32.00 | bitIndex54 = B
% 32.24/32.00 | bitIndex55 = B
% 32.24/32.00 | bitIndex56 = B
% 32.24/32.00 | bitIndex57 = B
% 32.24/32.00 | bitIndex58 = B
% 32.24/32.00 | bitIndex59 = B
% 32.24/32.00 | bitIndex60 = B
% 32.24/32.00 | bitIndex61 = B
% 32.24/32.00 | bitIndex62 = B
% 32.24/32.00 | bitIndex63 = B
% 32.24/32.00 | bitIndex64 = B
% 32.24/32.00 | bitIndex65 = B
% 32.24/32.00 | bitIndex66 = B ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_105,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( v847(VarNext)
% 32.24/32.00 <=> ( v848(VarNext)
% 32.24/32.00 & v854(VarNext) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_185,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( v854(VarNext)
% 32.24/32.00 <=> v852(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_104,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v852(VarCurr)
% 32.24/32.00 <=> ( v855(VarCurr)
% 32.24/32.00 & v783(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_86,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v855(VarCurr)
% 32.24/32.00 <=> v856(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_85,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v856(VarCurr)
% 32.24/32.00 <=> v754(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_103,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( v848(VarNext)
% 32.24/32.00 <=> ( v849(VarNext)
% 32.24/32.00 & v751(VarNext) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_84,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( ~ v849(VarNext)
% 32.24/32.00 <=> v823(VarNext) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_63,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1111_address_term,bitIndex63) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_62,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1111_address_term,bitIndex64) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_61,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1111_address_term,bitIndex65) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_60,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1111_address_term,bitIndex66) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_59,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1110_address_term,bitIndex63) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_58,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1110_address_term,bitIndex64) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_57,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1110_address_term,bitIndex65) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_56,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1110_address_term,bitIndex66) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_151,axiom,
% 32.24/32.00 b1110(bitIndex3) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_150,axiom,
% 32.24/32.00 b1110(bitIndex2) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_149,axiom,
% 32.24/32.00 b1110(bitIndex1) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_148,axiom,
% 32.24/32.00 ~ b1110(bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_55,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1101_address_term,bitIndex63) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_54,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1101_address_term,bitIndex64) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_53,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1101_address_term,bitIndex65) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_52,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1101_address_term,bitIndex66) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_147,axiom,
% 32.24/32.00 b1101(bitIndex3) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_146,axiom,
% 32.24/32.00 b1101(bitIndex2) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_145,axiom,
% 32.24/32.00 ~ b1101(bitIndex1) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_144,axiom,
% 32.24/32.00 b1101(bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_51,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1100_address_term,bitIndex63) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_50,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1100_address_term,bitIndex64) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_49,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1100_address_term,bitIndex65) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_48,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1100_address_term,bitIndex66) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_143,axiom,
% 32.24/32.00 b1100(bitIndex3) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_142,axiom,
% 32.24/32.00 b1100(bitIndex2) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_141,axiom,
% 32.24/32.00 ~ b1100(bitIndex1) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_140,axiom,
% 32.24/32.00 ~ b1100(bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_47,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1011_address_term,bitIndex63) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_46,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1011_address_term,bitIndex64) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_45,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1011_address_term,bitIndex65) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_44,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1011_address_term,bitIndex66) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_139,axiom,
% 32.24/32.00 b1011(bitIndex3) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_138,axiom,
% 32.24/32.00 ~ b1011(bitIndex2) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_137,axiom,
% 32.24/32.00 b1011(bitIndex1) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_136,axiom,
% 32.24/32.00 b1011(bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_43,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1010_address_term,bitIndex63) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_42,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1010_address_term,bitIndex64) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_41,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1010_address_term,bitIndex65) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_40,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1010_address_term,bitIndex66) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_135,axiom,
% 32.24/32.00 b1010(bitIndex3) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_134,axiom,
% 32.24/32.00 ~ b1010(bitIndex2) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_133,axiom,
% 32.24/32.00 b1010(bitIndex1) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_132,axiom,
% 32.24/32.00 ~ b1010(bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_39,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1001_address_term,bitIndex63) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_38,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1001_address_term,bitIndex64) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_37,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1001_address_term,bitIndex65) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_36,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1001_address_term,bitIndex66) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_131,axiom,
% 32.24/32.00 b1001(bitIndex3) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_130,axiom,
% 32.24/32.00 ~ b1001(bitIndex2) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_129,axiom,
% 32.24/32.00 ~ b1001(bitIndex1) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_128,axiom,
% 32.24/32.00 b1001(bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_35,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1000_address_term,bitIndex63) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_34,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1000_address_term,bitIndex64) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_33,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1000_address_term,bitIndex65) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_32,axiom,
% 32.24/32.00 ~ v749_array(constB0,b1000_address_term,bitIndex66) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_127,axiom,
% 32.24/32.00 b1000(bitIndex3) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_126,axiom,
% 32.24/32.00 ~ b1000(bitIndex2) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_125,axiom,
% 32.24/32.00 ~ b1000(bitIndex1) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_124,axiom,
% 32.24/32.00 ~ b1000(bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_31,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0111_address_term,bitIndex63) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_30,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0111_address_term,bitIndex64) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_29,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0111_address_term,bitIndex65) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_28,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0111_address_term,bitIndex66) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_123,axiom,
% 32.24/32.00 ~ b0111(bitIndex3) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_122,axiom,
% 32.24/32.00 b0111(bitIndex2) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_121,axiom,
% 32.24/32.00 b0111(bitIndex1) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_120,axiom,
% 32.24/32.00 b0111(bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_27,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0110_address_term,bitIndex63) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_26,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0110_address_term,bitIndex64) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_25,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0110_address_term,bitIndex65) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_24,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0110_address_term,bitIndex66) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_23,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0101_address_term,bitIndex63) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_22,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0101_address_term,bitIndex64) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_21,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0101_address_term,bitIndex65) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_20,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0101_address_term,bitIndex66) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_119,axiom,
% 32.24/32.00 ~ b0101(bitIndex3) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_118,axiom,
% 32.24/32.00 b0101(bitIndex2) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_117,axiom,
% 32.24/32.00 ~ b0101(bitIndex1) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_116,axiom,
% 32.24/32.00 b0101(bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_19,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0100_address_term,bitIndex63) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_18,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0100_address_term,bitIndex64) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_17,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0100_address_term,bitIndex65) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_16,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0100_address_term,bitIndex66) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_115,axiom,
% 32.24/32.00 ~ b0100(bitIndex3) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_114,axiom,
% 32.24/32.00 b0100(bitIndex2) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_113,axiom,
% 32.24/32.00 ~ b0100(bitIndex1) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_112,axiom,
% 32.24/32.00 ~ b0100(bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_15,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0011_address_term,bitIndex63) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_14,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0011_address_term,bitIndex64) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_13,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0011_address_term,bitIndex65) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_12,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0011_address_term,bitIndex66) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_111,axiom,
% 32.24/32.00 ~ b0011(bitIndex3) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_110,axiom,
% 32.24/32.00 ~ b0011(bitIndex2) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_109,axiom,
% 32.24/32.00 b0011(bitIndex1) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_108,axiom,
% 32.24/32.00 b0011(bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_11,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0010_address_term,bitIndex63) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_10,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0010_address_term,bitIndex64) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_9,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0010_address_term,bitIndex65) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_8,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0010_address_term,bitIndex66) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_107,axiom,
% 32.24/32.00 ~ b0010(bitIndex3) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_106,axiom,
% 32.24/32.00 ~ b0010(bitIndex2) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_105,axiom,
% 32.24/32.00 b0010(bitIndex1) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_104,axiom,
% 32.24/32.00 ~ b0010(bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_7,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0001_address_term,bitIndex63) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_6,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0001_address_term,bitIndex64) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_5,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0001_address_term,bitIndex65) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_4,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0001_address_term,bitIndex66) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_3,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0000_address_term,bitIndex63) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_2,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0000_address_term,bitIndex64) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint_1,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0000_address_term,bitIndex65) ).
% 32.24/32.00
% 32.24/32.00 fof(initSateConstraint,axiom,
% 32.24/32.00 ~ v749_array(constB0,b0000_address_term,bitIndex66) ).
% 32.24/32.00
% 32.24/32.00 fof(addCaseBooleanConditionEqualRanges1_8,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( ~ v819(VarNext)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_3_0(B)
% 32.24/32.00 => ( v791(VarNext,B)
% 32.24/32.00 <=> v791(VarCurr,B) ) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addCaseBooleanConditionEqualRanges0_7,axiom,
% 32.24/32.00 ! [VarNext] :
% 32.24/32.00 ( v819(VarNext)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_3_0(B)
% 32.24/32.00 => ( v791(VarNext,B)
% 32.24/32.00 <=> v829(VarNext,B) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_184,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_3_0(B)
% 32.24/32.00 => ( v829(VarNext,B)
% 32.24/32.00 <=> v827(VarCurr,B) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(aaddConditionBooleanCondEqualRangesElseBranch_30,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v830(VarCurr)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_3_0(B)
% 32.24/32.00 => ( v827(VarCurr,B)
% 32.24/32.00 <=> v793(VarCurr,B) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addConditionBooleanCondEqualRangesThenBranch_31,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v830(VarCurr)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_3_0(B)
% 32.24/32.00 => ( v827(VarCurr,B)
% 32.24/32.00 <=> $false ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_83,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v830(VarCurr)
% 32.24/32.00 <=> v754(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_102,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( v819(VarNext)
% 32.24/32.00 <=> v820(VarNext) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_101,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( v820(VarNext)
% 32.24/32.00 <=> ( v821(VarNext)
% 32.24/32.00 & v751(VarNext) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_82,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( ~ v821(VarNext)
% 32.24/32.00 <=> v823(VarNext) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_183,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( v823(VarNext)
% 32.24/32.00 <=> v751(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(aaddConditionBooleanCondEqualRangesElseBranch_29,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v783(VarCurr)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_3_0(B)
% 32.24/32.00 => ( v793(VarCurr,B)
% 32.24/32.00 <=> v791(VarCurr,B) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addConditionBooleanCondEqualRangesThenBranch_30,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v783(VarCurr)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_3_0(B)
% 32.24/32.00 => ( v793(VarCurr,B)
% 32.24/32.00 <=> v796(VarCurr,B) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(aaddConditionBooleanCondEqualRangesElseBranch_28,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v797(VarCurr)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_3_0(B)
% 32.24/32.00 => ( v796(VarCurr,B)
% 32.24/32.00 <=> v798(VarCurr,B) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addConditionBooleanCondEqualRangesThenBranch_29,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v797(VarCurr)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_3_0(B)
% 32.24/32.00 => ( v796(VarCurr,B)
% 32.24/32.00 <=> $false ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_182,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v798(VarCurr,bitIndex0)
% 32.24/32.00 <=> v814(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_181,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v798(VarCurr,bitIndex1)
% 32.24/32.00 <=> v812(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_180,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v798(VarCurr,bitIndex2)
% 32.24/32.00 <=> v807(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_179,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v798(VarCurr,bitIndex3)
% 32.24/32.00 <=> v800(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_100,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v812(VarCurr)
% 32.24/32.00 <=> ( v813(VarCurr)
% 32.24/32.00 & v816(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorShiftedRanges_50,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v816(VarCurr)
% 32.24/32.00 <=> ( v791(VarCurr,bitIndex0)
% 32.24/32.00 | v791(VarCurr,bitIndex1) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_99,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v813(VarCurr)
% 32.24/32.00 <=> ( v814(VarCurr)
% 32.24/32.00 | v815(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_81,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v815(VarCurr)
% 32.24/32.00 <=> v791(VarCurr,bitIndex1) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_80,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v814(VarCurr)
% 32.24/32.00 <=> v791(VarCurr,bitIndex0) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_98,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v807(VarCurr)
% 32.24/32.00 <=> ( v808(VarCurr)
% 32.24/32.00 & v811(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorShiftedRanges_49,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v811(VarCurr)
% 32.24/32.00 <=> ( v804(VarCurr)
% 32.24/32.00 | v791(VarCurr,bitIndex2) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_97,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v808(VarCurr)
% 32.24/32.00 <=> ( v809(VarCurr)
% 32.24/32.00 | v810(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_79,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v810(VarCurr)
% 32.24/32.00 <=> v791(VarCurr,bitIndex2) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_78,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v809(VarCurr)
% 32.24/32.00 <=> v804(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_96,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v800(VarCurr)
% 32.24/32.00 <=> ( v801(VarCurr)
% 32.24/32.00 & v806(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorShiftedRanges_48,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v806(VarCurr)
% 32.24/32.00 <=> ( v803(VarCurr)
% 32.24/32.00 | v791(VarCurr,bitIndex3) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_95,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v801(VarCurr)
% 32.24/32.00 <=> ( v802(VarCurr)
% 32.24/32.00 | v805(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_77,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v805(VarCurr)
% 32.24/32.00 <=> v791(VarCurr,bitIndex3) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_76,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v802(VarCurr)
% 32.24/32.00 <=> v803(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorShiftedRanges_47,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v803(VarCurr)
% 32.24/32.00 <=> ( v804(VarCurr)
% 32.24/32.00 & v791(VarCurr,bitIndex2) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorShiftedRanges_46,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v804(VarCurr)
% 32.24/32.00 <=> ( v791(VarCurr,bitIndex0)
% 32.24/32.00 & v791(VarCurr,bitIndex1) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addBitVectorEqualityBitBlasted_29,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v797(VarCurr)
% 32.24/32.00 <=> ( ( v791(VarCurr,bitIndex3)
% 32.24/32.00 <=> $true )
% 32.24/32.00 & ( v791(VarCurr,bitIndex2)
% 32.24/32.00 <=> $true )
% 32.24/32.00 & ( v791(VarCurr,bitIndex1)
% 32.24/32.00 <=> $true )
% 32.24/32.00 & ( v791(VarCurr,bitIndex0)
% 32.24/32.00 <=> $true ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_103,axiom,
% 32.24/32.00 b1111(bitIndex3) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_102,axiom,
% 32.24/32.00 b1111(bitIndex2) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_101,axiom,
% 32.24/32.00 b1111(bitIndex1) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_100,axiom,
% 32.24/32.00 b1111(bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignmentInitValue_3,axiom,
% 32.24/32.00 ~ v791(constB0,bitIndex3) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignmentInitValue_2,axiom,
% 32.24/32.00 ~ v791(constB0,bitIndex2) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignmentInitValue_1,axiom,
% 32.24/32.00 ~ v791(constB0,bitIndex1) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignmentInitValue,axiom,
% 32.24/32.00 v791(constB0,bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_99,axiom,
% 32.24/32.00 ~ b0001(bitIndex3) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_98,axiom,
% 32.24/32.00 ~ b0001(bitIndex2) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_97,axiom,
% 32.24/32.00 ~ b0001(bitIndex1) ).
% 32.24/32.00
% 32.24/32.00 fof(bitBlastConstant_96,axiom,
% 32.24/32.00 b0001(bitIndex0) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_178,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v783(VarCurr)
% 32.24/32.00 <=> v785(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_177,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v785(VarCurr)
% 32.24/32.00 <=> v787(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_176,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v787(VarCurr)
% 32.24/32.00 <=> v789(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_175,axiom,
% 32.24/32.00 ! [VarCurr,B] :
% 32.24/32.00 ( range_10_0(B)
% 32.24/32.00 => ( v756(VarCurr,B)
% 32.24/32.00 <=> v776(VarCurr,B) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_174,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ( v756(VarCurr,bitIndex26)
% 32.24/32.00 <=> v770(VarCurr,bitIndex15) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex25)
% 32.24/32.00 <=> v770(VarCurr,bitIndex14) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex24)
% 32.24/32.00 <=> v770(VarCurr,bitIndex13) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex23)
% 32.24/32.00 <=> v770(VarCurr,bitIndex12) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex22)
% 32.24/32.00 <=> v770(VarCurr,bitIndex11) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex21)
% 32.24/32.00 <=> v770(VarCurr,bitIndex10) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex20)
% 32.24/32.00 <=> v770(VarCurr,bitIndex9) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex19)
% 32.24/32.00 <=> v770(VarCurr,bitIndex8) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex18)
% 32.24/32.00 <=> v770(VarCurr,bitIndex7) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex17)
% 32.24/32.00 <=> v770(VarCurr,bitIndex6) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex16)
% 32.24/32.00 <=> v770(VarCurr,bitIndex5) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex15)
% 32.24/32.00 <=> v770(VarCurr,bitIndex4) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex14)
% 32.24/32.00 <=> v770(VarCurr,bitIndex3) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex13)
% 32.24/32.00 <=> v770(VarCurr,bitIndex2) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex12)
% 32.24/32.00 <=> v770(VarCurr,bitIndex1) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex11)
% 32.24/32.00 <=> v770(VarCurr,bitIndex0) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_173,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ( v756(VarCurr,bitIndex62)
% 32.24/32.00 <=> v764(VarCurr,bitIndex35) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex61)
% 32.24/32.00 <=> v764(VarCurr,bitIndex34) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex60)
% 32.24/32.00 <=> v764(VarCurr,bitIndex33) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex59)
% 32.24/32.00 <=> v764(VarCurr,bitIndex32) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex58)
% 32.24/32.00 <=> v764(VarCurr,bitIndex31) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex57)
% 32.24/32.00 <=> v764(VarCurr,bitIndex30) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex56)
% 32.24/32.00 <=> v764(VarCurr,bitIndex29) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex55)
% 32.24/32.00 <=> v764(VarCurr,bitIndex28) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex54)
% 32.24/32.00 <=> v764(VarCurr,bitIndex27) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex53)
% 32.24/32.00 <=> v764(VarCurr,bitIndex26) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex52)
% 32.24/32.00 <=> v764(VarCurr,bitIndex25) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex51)
% 32.24/32.00 <=> v764(VarCurr,bitIndex24) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex50)
% 32.24/32.00 <=> v764(VarCurr,bitIndex23) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex49)
% 32.24/32.00 <=> v764(VarCurr,bitIndex22) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex48)
% 32.24/32.00 <=> v764(VarCurr,bitIndex21) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex47)
% 32.24/32.00 <=> v764(VarCurr,bitIndex20) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex46)
% 32.24/32.00 <=> v764(VarCurr,bitIndex19) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex45)
% 32.24/32.00 <=> v764(VarCurr,bitIndex18) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex44)
% 32.24/32.00 <=> v764(VarCurr,bitIndex17) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex43)
% 32.24/32.00 <=> v764(VarCurr,bitIndex16) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex42)
% 32.24/32.00 <=> v764(VarCurr,bitIndex15) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex41)
% 32.24/32.00 <=> v764(VarCurr,bitIndex14) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex40)
% 32.24/32.00 <=> v764(VarCurr,bitIndex13) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex39)
% 32.24/32.00 <=> v764(VarCurr,bitIndex12) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex38)
% 32.24/32.00 <=> v764(VarCurr,bitIndex11) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex37)
% 32.24/32.00 <=> v764(VarCurr,bitIndex10) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex36)
% 32.24/32.00 <=> v764(VarCurr,bitIndex9) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex35)
% 32.24/32.00 <=> v764(VarCurr,bitIndex8) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex34)
% 32.24/32.00 <=> v764(VarCurr,bitIndex7) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex33)
% 32.24/32.00 <=> v764(VarCurr,bitIndex6) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex32)
% 32.24/32.00 <=> v764(VarCurr,bitIndex5) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex31)
% 32.24/32.00 <=> v764(VarCurr,bitIndex4) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex30)
% 32.24/32.00 <=> v764(VarCurr,bitIndex3) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex29)
% 32.24/32.00 <=> v764(VarCurr,bitIndex2) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex28)
% 32.24/32.00 <=> v764(VarCurr,bitIndex1) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex27)
% 32.24/32.00 <=> v764(VarCurr,bitIndex0) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_172,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ( v756(VarCurr,bitIndex66)
% 32.24/32.00 <=> v758(VarCurr,bitIndex3) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex65)
% 32.24/32.00 <=> v758(VarCurr,bitIndex2) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex64)
% 32.24/32.00 <=> v758(VarCurr,bitIndex1) )
% 32.24/32.00 & ( v756(VarCurr,bitIndex63)
% 32.24/32.00 <=> v758(VarCurr,bitIndex0) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_171,axiom,
% 32.24/32.00 ! [VarCurr,B] :
% 32.24/32.00 ( range_10_0(B)
% 32.24/32.00 => ( v776(VarCurr,B)
% 32.24/32.00 <=> v778(VarCurr,B) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_170,axiom,
% 32.24/32.00 ! [VarCurr,B] :
% 32.24/32.00 ( range_10_0(B)
% 32.24/32.00 => ( v778(VarCurr,B)
% 32.24/32.00 <=> v780(VarCurr,B) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(range_axiom_9,axiom,
% 32.24/32.00 ! [B] :
% 32.24/32.00 ( range_10_0(B)
% 32.24/32.00 <=> ( $false
% 32.24/32.00 | bitIndex0 = B
% 32.24/32.00 | bitIndex1 = B
% 32.24/32.00 | bitIndex2 = B
% 32.24/32.00 | bitIndex3 = B
% 32.24/32.00 | bitIndex4 = B
% 32.24/32.00 | bitIndex5 = B
% 32.24/32.00 | bitIndex6 = B
% 32.24/32.00 | bitIndex7 = B
% 32.24/32.00 | bitIndex8 = B
% 32.24/32.00 | bitIndex9 = B
% 32.24/32.00 | bitIndex10 = B ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_169,axiom,
% 32.24/32.00 ! [VarCurr,B] :
% 32.24/32.00 ( range_15_0(B)
% 32.24/32.00 => ( v770(VarCurr,B)
% 32.24/32.00 <=> v772(VarCurr,B) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_168,axiom,
% 32.24/32.00 ! [VarCurr,B] :
% 32.24/32.00 ( range_15_0(B)
% 32.24/32.00 => ( v772(VarCurr,B)
% 32.24/32.00 <=> v774(VarCurr,B) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(range_axiom_8,axiom,
% 32.24/32.00 ! [B] :
% 32.24/32.00 ( range_15_0(B)
% 32.24/32.00 <=> ( $false
% 32.24/32.00 | bitIndex0 = B
% 32.24/32.00 | bitIndex1 = B
% 32.24/32.00 | bitIndex2 = B
% 32.24/32.00 | bitIndex3 = B
% 32.24/32.00 | bitIndex4 = B
% 32.24/32.00 | bitIndex5 = B
% 32.24/32.00 | bitIndex6 = B
% 32.24/32.00 | bitIndex7 = B
% 32.24/32.00 | bitIndex8 = B
% 32.24/32.00 | bitIndex9 = B
% 32.24/32.00 | bitIndex10 = B
% 32.24/32.00 | bitIndex11 = B
% 32.24/32.00 | bitIndex12 = B
% 32.24/32.00 | bitIndex13 = B
% 32.24/32.00 | bitIndex14 = B
% 32.24/32.00 | bitIndex15 = B ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_167,axiom,
% 32.24/32.00 ! [VarCurr,B] :
% 32.24/32.00 ( range_35_0(B)
% 32.24/32.00 => ( v764(VarCurr,B)
% 32.24/32.00 <=> v766(VarCurr,B) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_166,axiom,
% 32.24/32.00 ! [VarCurr,B] :
% 32.24/32.00 ( range_35_0(B)
% 32.24/32.00 => ( v766(VarCurr,B)
% 32.24/32.00 <=> v768(VarCurr,B) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(range_axiom_7,axiom,
% 32.24/32.00 ! [B] :
% 32.24/32.00 ( range_35_0(B)
% 32.24/32.00 <=> ( $false
% 32.24/32.00 | bitIndex0 = B
% 32.24/32.00 | bitIndex1 = B
% 32.24/32.00 | bitIndex2 = B
% 32.24/32.00 | bitIndex3 = B
% 32.24/32.00 | bitIndex4 = B
% 32.24/32.00 | bitIndex5 = B
% 32.24/32.00 | bitIndex6 = B
% 32.24/32.00 | bitIndex7 = B
% 32.24/32.00 | bitIndex8 = B
% 32.24/32.00 | bitIndex9 = B
% 32.24/32.00 | bitIndex10 = B
% 32.24/32.00 | bitIndex11 = B
% 32.24/32.00 | bitIndex12 = B
% 32.24/32.00 | bitIndex13 = B
% 32.24/32.00 | bitIndex14 = B
% 32.24/32.00 | bitIndex15 = B
% 32.24/32.00 | bitIndex16 = B
% 32.24/32.00 | bitIndex17 = B
% 32.24/32.00 | bitIndex18 = B
% 32.24/32.00 | bitIndex19 = B
% 32.24/32.00 | bitIndex20 = B
% 32.24/32.00 | bitIndex21 = B
% 32.24/32.00 | bitIndex22 = B
% 32.24/32.00 | bitIndex23 = B
% 32.24/32.00 | bitIndex24 = B
% 32.24/32.00 | bitIndex25 = B
% 32.24/32.00 | bitIndex26 = B
% 32.24/32.00 | bitIndex27 = B
% 32.24/32.00 | bitIndex28 = B
% 32.24/32.00 | bitIndex29 = B
% 32.24/32.00 | bitIndex30 = B
% 32.24/32.00 | bitIndex31 = B
% 32.24/32.00 | bitIndex32 = B
% 32.24/32.00 | bitIndex33 = B
% 32.24/32.00 | bitIndex34 = B
% 32.24/32.00 | bitIndex35 = B ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_165,axiom,
% 32.24/32.00 ! [VarCurr,B] :
% 32.24/32.00 ( range_3_0(B)
% 32.24/32.00 => ( v758(VarCurr,B)
% 32.24/32.00 <=> v760(VarCurr,B) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_164,axiom,
% 32.24/32.00 ! [VarCurr,B] :
% 32.24/32.00 ( range_3_0(B)
% 32.24/32.00 => ( v760(VarCurr,B)
% 32.24/32.00 <=> v762(VarCurr,B) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_163,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v754(VarCurr)
% 32.24/32.00 <=> v12(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_162,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v751(VarCurr)
% 32.24/32.00 <=> v288(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_161,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v664(VarCurr)
% 32.24/32.00 <=> v666(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_160,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v666(VarCurr)
% 32.24/32.00 <=> v668(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addCaseBooleanConditionEqualRanges1_7,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( ~ v724(VarNext)
% 32.24/32.00 => ( v668(VarNext)
% 32.24/32.00 <=> v668(VarCurr) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addCaseBooleanConditionEqualRanges0_6,axiom,
% 32.24/32.00 ! [VarNext] :
% 32.24/32.00 ( v724(VarNext)
% 32.24/32.00 => ( v668(VarNext)
% 32.24/32.00 <=> v734(VarNext) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_159,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( v734(VarNext)
% 32.24/32.00 <=> v732(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(aaddConditionBooleanCondEqualRangesElseBranch_27,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v735(VarCurr)
% 32.24/32.00 => ( v732(VarCurr)
% 32.24/32.00 <=> x697(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addConditionBooleanCondEqualRangesThenBranch_28,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v735(VarCurr)
% 32.24/32.00 => ( v732(VarCurr)
% 32.24/32.00 <=> v678(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_94,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v735(VarCurr)
% 32.24/32.00 <=> ( v736(VarCurr)
% 32.24/32.00 & v737(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_75,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v737(VarCurr)
% 32.24/32.00 <=> v674(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_74,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v736(VarCurr)
% 32.24/32.00 <=> v670(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_93,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( v724(VarNext)
% 32.24/32.00 <=> v725(VarNext) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_92,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( v725(VarNext)
% 32.24/32.00 <=> ( v726(VarNext)
% 32.24/32.00 & v721(VarNext) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_73,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( ~ v726(VarNext)
% 32.24/32.00 <=> v728(VarNext) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_158,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( v728(VarNext)
% 32.24/32.00 <=> v721(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_157,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v721(VarCurr)
% 32.24/32.00 <=> v701(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_156,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v678(VarCurr)
% 32.24/32.00 <=> v680(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_155,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v680(VarCurr)
% 32.24/32.00 <=> v682(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addCaseBooleanConditionEqualRanges1_6,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( ~ v704(VarNext)
% 32.24/32.00 => ( v682(VarNext)
% 32.24/32.00 <=> v682(VarCurr) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addCaseBooleanConditionEqualRanges0_5,axiom,
% 32.24/32.00 ! [VarNext] :
% 32.24/32.00 ( v704(VarNext)
% 32.24/32.00 => ( v682(VarNext)
% 32.24/32.00 <=> v714(VarNext) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_154,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( v714(VarNext)
% 32.24/32.00 <=> v712(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(aaddConditionBooleanCondEqualRangesElseBranch_26,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v715(VarCurr)
% 32.24/32.00 => ( v712(VarCurr)
% 32.24/32.00 <=> x697(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addConditionBooleanCondEqualRangesThenBranch_27,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v715(VarCurr)
% 32.24/32.00 => ( v712(VarCurr)
% 32.24/32.00 <=> v688(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_91,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v715(VarCurr)
% 32.24/32.00 <=> ( v716(VarCurr)
% 32.24/32.00 & v717(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_72,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v717(VarCurr)
% 32.24/32.00 <=> v686(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_71,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v716(VarCurr)
% 32.24/32.00 <=> v684(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_90,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( v704(VarNext)
% 32.24/32.00 <=> v705(VarNext) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_89,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( v705(VarNext)
% 32.24/32.00 <=> ( v706(VarNext)
% 32.24/32.00 & v699(VarNext) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_70,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( ~ v706(VarNext)
% 32.24/32.00 <=> v708(VarNext) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_153,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( v708(VarNext)
% 32.24/32.00 <=> v699(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignmentInitValueVector_8,axiom,
% 32.24/32.00 ( v682(constB0)
% 32.24/32.00 <=> $false ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_152,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v699(VarCurr)
% 32.24/32.00 <=> v701(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_151,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v701(VarCurr)
% 32.24/32.00 <=> v288(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_150,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v688(VarCurr)
% 32.24/32.00 <=> v690(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_149,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v690(VarCurr)
% 32.24/32.00 <=> v692(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_148,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v692(VarCurr)
% 32.24/32.00 <=> v694(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_147,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v694(VarCurr)
% 32.24/32.00 <=> v696(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_146,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v686(VarCurr)
% 32.24/32.00 <=> v676(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_145,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v684(VarCurr)
% 32.24/32.00 <=> v672(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_144,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v674(VarCurr)
% 32.24/32.00 <=> v676(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_143,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v676(VarCurr)
% 32.24/32.00 <=> $false ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_142,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v670(VarCurr)
% 32.24/32.00 <=> v672(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_141,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v672(VarCurr)
% 32.24/32.00 <=> $false ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_140,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v320(VarCurr)
% 32.24/32.00 <=> v322(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_139,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v322(VarCurr)
% 32.24/32.00 <=> v324(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_138,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v324(VarCurr)
% 32.24/32.00 <=> v326(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_137,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v326(VarCurr)
% 32.24/32.00 <=> v328(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_136,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v328(VarCurr)
% 32.24/32.00 <=> v330(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_135,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v330(VarCurr)
% 32.24/32.00 <=> v332(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(aaddConditionBooleanCondEqualRangesElseBranch_25,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v657(VarCurr)
% 32.24/32.00 => ( v332(VarCurr)
% 32.24/32.00 <=> $false ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addConditionBooleanCondEqualRangesThenBranch_26,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v657(VarCurr)
% 32.24/32.00 => ( v332(VarCurr)
% 32.24/32.00 <=> v658(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addParallelCaseBooleanConditionEqualRanges1_6,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v510(VarCurr)
% 32.24/32.00 => ( v658(VarCurr)
% 32.24/32.00 <=> v661(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addParallelCaseBooleanConditionEqualRanges0_6,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v510(VarCurr)
% 32.24/32.00 => ( v658(VarCurr)
% 32.24/32.00 <=> v659(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(aaddConditionBooleanCondEqualRangesElseBranch_24,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v513(VarCurr)
% 32.24/32.00 => ( v661(VarCurr)
% 32.24/32.00 <=> v662(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addConditionBooleanCondEqualRangesThenBranch_25,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v513(VarCurr)
% 32.24/32.00 => ( v661(VarCurr)
% 32.24/32.00 <=> $true ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(aaddConditionBooleanCondEqualRangesElseBranch_23,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v517(VarCurr)
% 32.24/32.00 => ( v662(VarCurr)
% 32.24/32.00 <=> $false ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addConditionBooleanCondEqualRangesThenBranch_24,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v517(VarCurr)
% 32.24/32.00 => ( v662(VarCurr)
% 32.24/32.00 <=> $false ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(aaddConditionBooleanCondEqualRangesElseBranch_22,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v509(VarCurr)
% 32.24/32.00 => ( v659(VarCurr)
% 32.24/32.00 <=> v660(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addConditionBooleanCondEqualRangesThenBranch_23,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v509(VarCurr)
% 32.24/32.00 => ( v659(VarCurr)
% 32.24/32.00 <=> $false ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(aaddConditionBooleanCondEqualRangesElseBranch_21,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v539(VarCurr)
% 32.24/32.00 => ( v660(VarCurr)
% 32.24/32.00 <=> $false ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addConditionBooleanCondEqualRangesThenBranch_22,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v539(VarCurr)
% 32.24/32.00 => ( v660(VarCurr)
% 32.24/32.00 <=> $true ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_88,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v657(VarCurr)
% 32.24/32.00 <=> ( v510(VarCurr)
% 32.24/32.00 | v514(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addCaseBooleanConditionEqualRanges1_5,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( ~ v645(VarNext)
% 32.24/32.00 => ( v334(VarNext,bitIndex0)
% 32.24/32.00 <=> v334(VarCurr,bitIndex0) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addCaseBooleanConditionEqualRanges0_4,axiom,
% 32.24/32.00 ! [VarNext] :
% 32.24/32.00 ( v645(VarNext)
% 32.24/32.00 => ( v334(VarNext,bitIndex0)
% 32.24/32.00 <=> v653(VarNext) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_134,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( v653(VarNext)
% 32.24/32.00 <=> v651(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(aaddConditionBooleanCondEqualRangesElseBranch_20,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v531(VarCurr)
% 32.24/32.00 => ( v651(VarCurr)
% 32.24/32.00 <=> v342(VarCurr,bitIndex0) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addConditionBooleanCondEqualRangesThenBranch_21,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v531(VarCurr)
% 32.24/32.00 => ( v651(VarCurr)
% 32.24/32.00 <=> $true ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_87,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( v645(VarNext)
% 32.24/32.00 <=> v646(VarNext) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_86,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( v646(VarNext)
% 32.24/32.00 <=> ( v648(VarNext)
% 32.24/32.00 & v484(VarNext) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_69,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( ~ v648(VarNext)
% 32.24/32.00 <=> v524(VarNext) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(aaddConditionBooleanCondEqualRangesElseBranch_19,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v637(VarCurr)
% 32.24/32.00 => ( v342(VarCurr,bitIndex0)
% 32.24/32.00 <=> $false ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addConditionBooleanCondEqualRangesThenBranch_20,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v637(VarCurr)
% 32.24/32.00 => ( v342(VarCurr,bitIndex0)
% 32.24/32.00 <=> v641(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addParallelCaseBooleanConditionEqualRanges1_5,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v638(VarCurr)
% 32.24/32.00 => ( v641(VarCurr)
% 32.24/32.00 <=> $true ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addParallelCaseBooleanConditionEqualRanges0_5,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v638(VarCurr)
% 32.24/32.00 => ( v641(VarCurr)
% 32.24/32.00 <=> v642(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(aaddConditionBooleanCondEqualRangesElseBranch_18,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v539(VarCurr)
% 32.24/32.00 => ( v642(VarCurr)
% 32.24/32.00 <=> $true ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addConditionBooleanCondEqualRangesThenBranch_19,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v539(VarCurr)
% 32.24/32.00 => ( v642(VarCurr)
% 32.24/32.00 <=> $true ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_85,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v637(VarCurr)
% 32.24/32.00 <=> ( v638(VarCurr)
% 32.24/32.00 | v640(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_84,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v640(VarCurr)
% 32.24/32.00 <=> ( v513(VarCurr)
% 32.24/32.00 & v514(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_83,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v638(VarCurr)
% 32.24/32.00 <=> ( v639(VarCurr)
% 32.24/32.00 & v510(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_68,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v639(VarCurr)
% 32.24/32.00 <=> v509(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_133,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v344(VarCurr)
% 32.24/32.00 <=> v346(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addBitVectorEqualityBitBlasted_28,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v346(VarCurr)
% 32.24/32.00 <=> ( ( v348(VarCurr,bitIndex4)
% 32.24/32.00 <=> $false )
% 32.24/32.00 & ( v348(VarCurr,bitIndex3)
% 32.24/32.00 <=> $false )
% 32.24/32.00 & ( v348(VarCurr,bitIndex2)
% 32.24/32.00 <=> $false )
% 32.24/32.00 & ( v348(VarCurr,bitIndex1)
% 32.24/32.00 <=> $false )
% 32.24/32.00 & ( v348(VarCurr,bitIndex0)
% 32.24/32.00 <=> $false ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addCaseBooleanConditionEqualRanges1_4,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( ~ v621(VarNext)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_4_0(B)
% 32.24/32.00 => ( v348(VarNext,B)
% 32.24/32.00 <=> v348(VarCurr,B) ) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addCaseBooleanConditionEqualRanges0_3,axiom,
% 32.24/32.00 ! [VarNext] :
% 32.24/32.00 ( v621(VarNext)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_4_0(B)
% 32.24/32.00 => ( v348(VarNext,B)
% 32.24/32.00 <=> v631(VarNext,B) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_132,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_4_0(B)
% 32.24/32.00 => ( v631(VarNext,B)
% 32.24/32.00 <=> v629(VarCurr,B) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(aaddConditionBooleanCondEqualRangesElseBranch_17,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v632(VarCurr)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_4_0(B)
% 32.24/32.00 => ( v629(VarCurr,B)
% 32.24/32.00 <=> v352(VarCurr,B) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addConditionBooleanCondEqualRangesThenBranch_18,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v632(VarCurr)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_4_0(B)
% 32.24/32.00 => ( v629(VarCurr,B)
% 32.24/32.00 <=> $false ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_67,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v632(VarCurr)
% 32.24/32.00 <=> v350(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_82,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( v621(VarNext)
% 32.24/32.00 <=> v622(VarNext) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_81,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( v622(VarNext)
% 32.24/32.00 <=> ( v623(VarNext)
% 32.24/32.00 & v618(VarNext) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_66,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( ~ v623(VarNext)
% 32.24/32.00 <=> v625(VarNext) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_131,axiom,
% 32.24/32.00 ! [VarNext,VarCurr] :
% 32.24/32.00 ( nextState(VarCurr,VarNext)
% 32.24/32.00 => ( v625(VarNext)
% 32.24/32.00 <=> v618(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_130,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v618(VarCurr)
% 32.24/32.00 <=> v484(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addParallelCaseBooleanConditionEqualRanges3_2,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ( ~ v543(VarCurr)
% 32.24/32.00 & ~ v545(VarCurr)
% 32.24/32.00 & ~ v586(VarCurr) )
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_4_0(B)
% 32.24/32.00 => ( v352(VarCurr,B)
% 32.24/32.00 <=> v348(VarCurr,B) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addParallelCaseBooleanConditionEqualRanges2_2,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v586(VarCurr)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_4_0(B)
% 32.24/32.00 => ( v352(VarCurr,B)
% 32.24/32.00 <=> v588(VarCurr,B) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addParallelCaseBooleanConditionEqualRanges1_4,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v545(VarCurr)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_4_0(B)
% 32.24/32.00 => ( v352(VarCurr,B)
% 32.24/32.00 <=> v547(VarCurr,B) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addParallelCaseBooleanConditionEqualRanges0_4,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v543(VarCurr)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_4_0(B)
% 32.24/32.00 => ( v352(VarCurr,B)
% 32.24/32.00 <=> v348(VarCurr,B) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addBitVectorEqualityBitBlasted_27,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v615(VarCurr)
% 32.24/32.00 <=> ( ( v616(VarCurr,bitIndex1)
% 32.24/32.00 <=> $true )
% 32.24/32.00 & ( v616(VarCurr,bitIndex0)
% 32.24/32.00 <=> $true ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_129,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v616(VarCurr,bitIndex0)
% 32.24/32.00 <=> v377(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_128,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v616(VarCurr,bitIndex1)
% 32.24/32.00 <=> v354(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(aaddConditionBooleanCondEqualRangesElseBranch_16,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v589(VarCurr)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_4_0(B)
% 32.24/32.00 => ( v588(VarCurr,B)
% 32.24/32.00 <=> v590(VarCurr,B) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addConditionBooleanCondEqualRangesThenBranch_17,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v589(VarCurr)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_4_0(B)
% 32.24/32.00 => ( v588(VarCurr,B)
% 32.24/32.00 <=> b01111(B) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_127,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v590(VarCurr,bitIndex0)
% 32.24/32.00 <=> v612(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_126,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v590(VarCurr,bitIndex1)
% 32.24/32.00 <=> v610(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_125,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v590(VarCurr,bitIndex2)
% 32.24/32.00 <=> v605(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_124,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v590(VarCurr,bitIndex3)
% 32.24/32.00 <=> v600(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_123,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v590(VarCurr,bitIndex4)
% 32.24/32.00 <=> v592(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_80,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v610(VarCurr)
% 32.24/32.00 <=> ( v611(VarCurr)
% 32.24/32.00 & v614(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorShiftedRanges_45,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v614(VarCurr)
% 32.24/32.00 <=> ( v348(VarCurr,bitIndex0)
% 32.24/32.00 | v348(VarCurr,bitIndex1) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_79,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v611(VarCurr)
% 32.24/32.00 <=> ( v612(VarCurr)
% 32.24/32.00 | v613(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_65,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v613(VarCurr)
% 32.24/32.00 <=> v348(VarCurr,bitIndex1) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_64,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v612(VarCurr)
% 32.24/32.00 <=> v348(VarCurr,bitIndex0) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_78,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v605(VarCurr)
% 32.24/32.00 <=> ( v606(VarCurr)
% 32.24/32.00 & v609(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorShiftedRanges_44,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v609(VarCurr)
% 32.24/32.00 <=> ( v597(VarCurr)
% 32.24/32.00 | v348(VarCurr,bitIndex2) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_77,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v606(VarCurr)
% 32.24/32.00 <=> ( v607(VarCurr)
% 32.24/32.00 | v608(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_63,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v608(VarCurr)
% 32.24/32.00 <=> v348(VarCurr,bitIndex2) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_62,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v607(VarCurr)
% 32.24/32.00 <=> v597(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_76,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v600(VarCurr)
% 32.24/32.00 <=> ( v601(VarCurr)
% 32.24/32.00 & v604(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorShiftedRanges_43,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v604(VarCurr)
% 32.24/32.00 <=> ( v596(VarCurr)
% 32.24/32.00 | v348(VarCurr,bitIndex3) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_75,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v601(VarCurr)
% 32.24/32.00 <=> ( v602(VarCurr)
% 32.24/32.00 | v603(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_61,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v603(VarCurr)
% 32.24/32.00 <=> v348(VarCurr,bitIndex3) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_60,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v602(VarCurr)
% 32.24/32.00 <=> v596(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_74,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v592(VarCurr)
% 32.24/32.00 <=> ( v593(VarCurr)
% 32.24/32.00 & v599(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorShiftedRanges_42,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v599(VarCurr)
% 32.24/32.00 <=> ( v595(VarCurr)
% 32.24/32.00 | v348(VarCurr,bitIndex4) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_73,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v593(VarCurr)
% 32.24/32.00 <=> ( v594(VarCurr)
% 32.24/32.00 | v598(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_59,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v598(VarCurr)
% 32.24/32.00 <=> v348(VarCurr,bitIndex4) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_58,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v594(VarCurr)
% 32.24/32.00 <=> v595(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorShiftedRanges_41,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v595(VarCurr)
% 32.24/32.00 <=> ( v596(VarCurr)
% 32.24/32.00 & v348(VarCurr,bitIndex3) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorShiftedRanges_40,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v596(VarCurr)
% 32.24/32.00 <=> ( v597(VarCurr)
% 32.24/32.00 & v348(VarCurr,bitIndex2) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorShiftedRanges_39,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v597(VarCurr)
% 32.24/32.00 <=> ( v348(VarCurr,bitIndex0)
% 32.24/32.00 & v348(VarCurr,bitIndex1) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addBitVectorEqualityBitBlasted_26,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v589(VarCurr)
% 32.24/32.00 <=> ( ( v348(VarCurr,bitIndex4)
% 32.24/32.00 <=> $false )
% 32.24/32.00 & ( v348(VarCurr,bitIndex3)
% 32.24/32.00 <=> $true )
% 32.24/32.00 & ( v348(VarCurr,bitIndex2)
% 32.24/32.00 <=> $true )
% 32.24/32.00 & ( v348(VarCurr,bitIndex1)
% 32.24/32.00 <=> $true )
% 32.24/32.00 & ( v348(VarCurr,bitIndex0)
% 32.24/32.00 <=> $true ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addBitVectorEqualityBitBlasted_25,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v586(VarCurr)
% 32.24/32.00 <=> ( ( v587(VarCurr,bitIndex1)
% 32.24/32.00 <=> $true )
% 32.24/32.00 & ( v587(VarCurr,bitIndex0)
% 32.24/32.00 <=> $false ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_122,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v587(VarCurr,bitIndex0)
% 32.24/32.00 <=> v377(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_121,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v587(VarCurr,bitIndex1)
% 32.24/32.00 <=> v354(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(aaddConditionBooleanCondEqualRangesElseBranch_15,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v548(VarCurr)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_31_0(B)
% 32.24/32.00 => ( v547(VarCurr,B)
% 32.24/32.00 <=> v549(VarCurr,B) ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addConditionBooleanCondEqualRangesThenBranch_16,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v548(VarCurr)
% 32.24/32.00 => ! [B] :
% 32.24/32.00 ( range_31_0(B)
% 32.24/32.00 => ( v547(VarCurr,B)
% 32.24/32.00 <=> $false ) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addSignExtensionConstraint_78,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v549(VarCurr,bitIndex6)
% 32.24/32.00 <=> v550(VarCurr,bitIndex5) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addSignExtensionConstraint_77,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v549(VarCurr,bitIndex7)
% 32.24/32.00 <=> v550(VarCurr,bitIndex5) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addSignExtensionConstraint_76,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v549(VarCurr,bitIndex8)
% 32.24/32.00 <=> v550(VarCurr,bitIndex5) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addSignExtensionConstraint_75,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v549(VarCurr,bitIndex9)
% 32.24/32.00 <=> v550(VarCurr,bitIndex5) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addSignExtensionConstraint_74,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v549(VarCurr,bitIndex10)
% 32.24/32.00 <=> v550(VarCurr,bitIndex5) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addSignExtensionConstraint_73,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v549(VarCurr,bitIndex11)
% 32.24/32.00 <=> v550(VarCurr,bitIndex5) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addSignExtensionConstraint_72,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v549(VarCurr,bitIndex12)
% 32.24/32.00 <=> v550(VarCurr,bitIndex5) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addSignExtensionConstraint_71,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v549(VarCurr,bitIndex13)
% 32.24/32.00 <=> v550(VarCurr,bitIndex5) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addSignExtensionConstraint_70,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v549(VarCurr,bitIndex14)
% 32.24/32.00 <=> v550(VarCurr,bitIndex5) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addSignExtensionConstraint_69,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v549(VarCurr,bitIndex15)
% 32.24/32.00 <=> v550(VarCurr,bitIndex5) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addSignExtensionConstraint_68,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v549(VarCurr,bitIndex16)
% 32.24/32.00 <=> v550(VarCurr,bitIndex5) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addSignExtensionConstraint_67,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v549(VarCurr,bitIndex17)
% 32.24/32.00 <=> v550(VarCurr,bitIndex5) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addSignExtensionConstraint_66,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v549(VarCurr,bitIndex18)
% 32.24/32.00 <=> v550(VarCurr,bitIndex5) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addSignExtensionConstraint_65,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v549(VarCurr,bitIndex19)
% 32.24/32.00 <=> v550(VarCurr,bitIndex5) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addSignExtensionConstraint_64,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v549(VarCurr,bitIndex20)
% 32.24/32.00 <=> v550(VarCurr,bitIndex5) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addSignExtensionConstraint_63,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v549(VarCurr,bitIndex21)
% 32.24/32.00 <=> v550(VarCurr,bitIndex5) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addSignExtensionConstraint_62,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v549(VarCurr,bitIndex22)
% 32.24/32.00 <=> v550(VarCurr,bitIndex5) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addSignExtensionConstraint_61,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v549(VarCurr,bitIndex23)
% 32.24/32.00 <=> v550(VarCurr,bitIndex5) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addSignExtensionConstraint_60,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v549(VarCurr,bitIndex24)
% 32.24/32.00 <=> v550(VarCurr,bitIndex5) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addSignExtensionConstraint_59,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v549(VarCurr,bitIndex25)
% 32.24/32.00 <=> v550(VarCurr,bitIndex5) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addSignExtensionConstraint_58,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v549(VarCurr,bitIndex26)
% 32.24/32.00 <=> v550(VarCurr,bitIndex5) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addSignExtensionConstraint_57,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v549(VarCurr,bitIndex27)
% 32.24/32.00 <=> v550(VarCurr,bitIndex5) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addSignExtensionConstraint_56,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v549(VarCurr,bitIndex28)
% 32.24/32.00 <=> v550(VarCurr,bitIndex5) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addSignExtensionConstraint_55,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v549(VarCurr,bitIndex29)
% 32.24/32.00 <=> v550(VarCurr,bitIndex5) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addSignExtensionConstraint_54,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v549(VarCurr,bitIndex30)
% 32.24/32.00 <=> v550(VarCurr,bitIndex5) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addSignExtensionConstraint_53,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v549(VarCurr,bitIndex31)
% 32.24/32.00 <=> v550(VarCurr,bitIndex5) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_120,axiom,
% 32.24/32.00 ! [VarCurr,B] :
% 32.24/32.00 ( range_5_0(B)
% 32.24/32.00 => ( v549(VarCurr,B)
% 32.24/32.00 <=> v550(VarCurr,B) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_119,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v550(VarCurr,bitIndex0)
% 32.24/32.00 <=> v584(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_118,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v550(VarCurr,bitIndex1)
% 32.24/32.00 <=> v582(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_117,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v550(VarCurr,bitIndex2)
% 32.24/32.00 <=> v578(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_116,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v550(VarCurr,bitIndex3)
% 32.24/32.00 <=> v574(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_115,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v550(VarCurr,bitIndex4)
% 32.24/32.00 <=> v570(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(addAssignment_114,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v550(VarCurr,bitIndex5)
% 32.24/32.00 <=> v552(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_72,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v582(VarCurr)
% 32.24/32.00 <=> ( v583(VarCurr)
% 32.24/32.00 & v585(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_71,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v585(VarCurr)
% 32.24/32.00 <=> ( v556(VarCurr,bitIndex0)
% 32.24/32.00 | v564(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorShiftedRanges_38,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v583(VarCurr)
% 32.24/32.00 <=> ( v584(VarCurr)
% 32.24/32.00 | v556(VarCurr,bitIndex1) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_57,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v584(VarCurr)
% 32.24/32.00 <=> v556(VarCurr,bitIndex0) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_70,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v578(VarCurr)
% 32.24/32.00 <=> ( v579(VarCurr)
% 32.24/32.00 & v581(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_69,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v581(VarCurr)
% 32.24/32.00 <=> ( v562(VarCurr)
% 32.24/32.00 | v565(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorShiftedRanges_37,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v579(VarCurr)
% 32.24/32.00 <=> ( v580(VarCurr)
% 32.24/32.00 | v556(VarCurr,bitIndex2) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_56,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v580(VarCurr)
% 32.24/32.00 <=> v562(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_68,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v574(VarCurr)
% 32.24/32.00 <=> ( v575(VarCurr)
% 32.24/32.00 & v577(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_67,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v577(VarCurr)
% 32.24/32.00 <=> ( v560(VarCurr)
% 32.24/32.00 | v566(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorShiftedRanges_36,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v575(VarCurr)
% 32.24/32.00 <=> ( v576(VarCurr)
% 32.24/32.00 | v556(VarCurr,bitIndex3) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_55,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v576(VarCurr)
% 32.24/32.00 <=> v560(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_66,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v570(VarCurr)
% 32.24/32.00 <=> ( v571(VarCurr)
% 32.24/32.00 & v573(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_65,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v573(VarCurr)
% 32.24/32.00 <=> ( v558(VarCurr)
% 32.24/32.00 | v567(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorShiftedRanges_35,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v571(VarCurr)
% 32.24/32.00 <=> ( v572(VarCurr)
% 32.24/32.00 | v556(VarCurr,bitIndex4) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_54,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v572(VarCurr)
% 32.24/32.00 <=> v558(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_64,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v552(VarCurr)
% 32.24/32.00 <=> ( v553(VarCurr)
% 32.24/32.00 & v568(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_63,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v568(VarCurr)
% 32.24/32.00 <=> ( v555(VarCurr)
% 32.24/32.00 | v569(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_53,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v569(VarCurr)
% 32.24/32.00 <=> v556(VarCurr,bitIndex5) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorShiftedRanges_34,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v553(VarCurr)
% 32.24/32.00 <=> ( v554(VarCurr)
% 32.24/32.00 | v556(VarCurr,bitIndex5) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_52,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v554(VarCurr)
% 32.24/32.00 <=> v555(VarCurr) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorShiftedRanges_33,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v555(VarCurr)
% 32.24/32.00 <=> ( v556(VarCurr,bitIndex4)
% 32.24/32.00 | v557(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorEqualRangesSingleBits_62,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v557(VarCurr)
% 32.24/32.00 <=> ( v558(VarCurr)
% 32.24/32.00 & v567(VarCurr) ) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeUnaryOperator_51,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( ~ v567(VarCurr)
% 32.24/32.00 <=> v556(VarCurr,bitIndex4) ) ).
% 32.24/32.00
% 32.24/32.00 fof(writeBinaryOperatorShiftedRanges_32,axiom,
% 32.24/32.00 ! [VarCurr] :
% 32.24/32.00 ( v558(VarCurr)
% 32.24/32.00 <=> ( v556(VarCurr,bitIndex3)
% 32.24/32.00 | v559(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_61,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v559(VarCurr)
% 32.24/32.01 <=> ( v560(VarCurr)
% 32.24/32.01 & v566(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_50,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v566(VarCurr)
% 32.24/32.01 <=> v556(VarCurr,bitIndex3) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_31,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v560(VarCurr)
% 32.24/32.01 <=> ( v556(VarCurr,bitIndex2)
% 32.24/32.01 | v561(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_60,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v561(VarCurr)
% 32.24/32.01 <=> ( v562(VarCurr)
% 32.24/32.01 & v565(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_49,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v565(VarCurr)
% 32.24/32.01 <=> v556(VarCurr,bitIndex2) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_30,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v562(VarCurr)
% 32.24/32.01 <=> ( v556(VarCurr,bitIndex1)
% 32.24/32.01 | v563(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_59,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v563(VarCurr)
% 32.24/32.01 <=> ( v556(VarCurr,bitIndex0)
% 32.24/32.01 & v564(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_48,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v564(VarCurr)
% 32.24/32.01 <=> v556(VarCurr,bitIndex1) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addZeroExtensionConstraint_2,axiom,
% 32.24/32.01 ! [VarCurr] : ~ v556(VarCurr,bitIndex5) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_113,axiom,
% 32.24/32.01 ! [VarCurr,B] :
% 32.24/32.01 ( range_4_0(B)
% 32.24/32.01 => ( v556(VarCurr,B)
% 32.24/32.01 <=> v348(VarCurr,B) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addBitVectorEqualityBitBlasted_24,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v548(VarCurr)
% 32.24/32.01 <=> ( ( v348(VarCurr,bitIndex4)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v348(VarCurr,bitIndex3)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v348(VarCurr,bitIndex2)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v348(VarCurr,bitIndex1)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v348(VarCurr,bitIndex0)
% 32.24/32.01 <=> $false ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addBitVectorEqualityBitBlasted_23,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v545(VarCurr)
% 32.24/32.01 <=> ( ( v546(VarCurr,bitIndex1)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v546(VarCurr,bitIndex0)
% 32.24/32.01 <=> $true ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_112,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v546(VarCurr,bitIndex0)
% 32.24/32.01 <=> v377(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_111,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v546(VarCurr,bitIndex1)
% 32.24/32.01 <=> v354(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignmentInitValueVector_7,axiom,
% 32.24/32.01 ! [B] :
% 32.24/32.01 ( range_4_0(B)
% 32.24/32.01 => ( v348(constB0,B)
% 32.24/32.01 <=> $false ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addBitVectorEqualityBitBlasted_22,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v543(VarCurr)
% 32.24/32.01 <=> ( ( v544(VarCurr,bitIndex1)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v544(VarCurr,bitIndex0)
% 32.24/32.01 <=> $false ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_110,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v544(VarCurr,bitIndex0)
% 32.24/32.01 <=> v377(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_109,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v544(VarCurr,bitIndex1)
% 32.24/32.01 <=> v354(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_108,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v377(VarCurr)
% 32.24/32.01 <=> v379(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(aaddConditionBooleanCondEqualRangesElseBranch_14,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v535(VarCurr)
% 32.24/32.01 => ( v379(VarCurr)
% 32.24/32.01 <=> $false ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addConditionBooleanCondEqualRangesThenBranch_15,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v535(VarCurr)
% 32.24/32.01 => ( v379(VarCurr)
% 32.24/32.01 <=> v536(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addParallelCaseBooleanConditionEqualRanges1_3,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v510(VarCurr)
% 32.24/32.01 => ( v536(VarCurr)
% 32.24/32.01 <=> v540(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addParallelCaseBooleanConditionEqualRanges0_3,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v510(VarCurr)
% 32.24/32.01 => ( v536(VarCurr)
% 32.24/32.01 <=> v537(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(aaddConditionBooleanCondEqualRangesElseBranch_13,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v513(VarCurr)
% 32.24/32.01 => ( v540(VarCurr)
% 32.24/32.01 <=> v541(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addConditionBooleanCondEqualRangesThenBranch_14,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v513(VarCurr)
% 32.24/32.01 => ( v540(VarCurr)
% 32.24/32.01 <=> $false ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(aaddConditionBooleanCondEqualRangesElseBranch_12,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v517(VarCurr)
% 32.24/32.01 => ( v541(VarCurr)
% 32.24/32.01 <=> $false ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addConditionBooleanCondEqualRangesThenBranch_13,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v517(VarCurr)
% 32.24/32.01 => ( v541(VarCurr)
% 32.24/32.01 <=> $true ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(aaddConditionBooleanCondEqualRangesElseBranch_11,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v509(VarCurr)
% 32.24/32.01 => ( v537(VarCurr)
% 32.24/32.01 <=> v538(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addConditionBooleanCondEqualRangesThenBranch_12,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v509(VarCurr)
% 32.24/32.01 => ( v537(VarCurr)
% 32.24/32.01 <=> $true ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(aaddConditionBooleanCondEqualRangesElseBranch_10,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v539(VarCurr)
% 32.24/32.01 => ( v538(VarCurr)
% 32.24/32.01 <=> $false ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addConditionBooleanCondEqualRangesThenBranch_11,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v539(VarCurr)
% 32.24/32.01 => ( v538(VarCurr)
% 32.24/32.01 <=> $false ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_47,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v539(VarCurr)
% 32.24/32.01 <=> v381(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_58,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v535(VarCurr)
% 32.24/32.01 <=> ( v510(VarCurr)
% 32.24/32.01 | v514(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addCaseBooleanConditionEqualRanges1_3,axiom,
% 32.24/32.01 ! [VarNext,VarCurr] :
% 32.24/32.01 ( nextState(VarCurr,VarNext)
% 32.24/32.01 => ( ~ v520(VarNext)
% 32.24/32.01 => ( v334(VarNext,bitIndex1)
% 32.24/32.01 <=> v334(VarCurr,bitIndex1) ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addCaseBooleanConditionShiftedRanges0,axiom,
% 32.24/32.01 ! [VarNext] :
% 32.24/32.01 ( v520(VarNext)
% 32.24/32.01 => ( v334(VarNext,bitIndex1)
% 32.24/32.01 <=> v530(VarNext) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_107,axiom,
% 32.24/32.01 ! [VarNext,VarCurr] :
% 32.24/32.01 ( nextState(VarCurr,VarNext)
% 32.24/32.01 => ( v530(VarNext)
% 32.24/32.01 <=> v528(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addConditionBooleanCondShiftedRangesElseBranch_1,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v531(VarCurr)
% 32.24/32.01 => ( v528(VarCurr)
% 32.24/32.01 <=> v342(VarCurr,bitIndex1) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addConditionBooleanCondEqualRangesThenBranch_10,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v531(VarCurr)
% 32.24/32.01 => ( v528(VarCurr)
% 32.24/32.01 <=> $false ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_46,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v531(VarCurr)
% 32.24/32.01 <=> v336(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_57,axiom,
% 32.24/32.01 ! [VarNext,VarCurr] :
% 32.24/32.01 ( nextState(VarCurr,VarNext)
% 32.24/32.01 => ( v520(VarNext)
% 32.24/32.01 <=> v521(VarNext) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_56,axiom,
% 32.24/32.01 ! [VarNext,VarCurr] :
% 32.24/32.01 ( nextState(VarCurr,VarNext)
% 32.24/32.01 => ( v521(VarNext)
% 32.24/32.01 <=> ( v522(VarNext)
% 32.24/32.01 & v484(VarNext) ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_45,axiom,
% 32.24/32.01 ! [VarNext,VarCurr] :
% 32.24/32.01 ( nextState(VarCurr,VarNext)
% 32.24/32.01 => ( ~ v522(VarNext)
% 32.24/32.01 <=> v524(VarNext) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_106,axiom,
% 32.24/32.01 ! [VarNext,VarCurr] :
% 32.24/32.01 ( nextState(VarCurr,VarNext)
% 32.24/32.01 => ( v524(VarNext)
% 32.24/32.01 <=> v484(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addConditionBooleanCondShiftedRangesElseBranch,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v507(VarCurr)
% 32.24/32.01 => ( v342(VarCurr,bitIndex1)
% 32.24/32.01 <=> $false ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addConditionBooleanCondShiftedRangesThenBranch,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v507(VarCurr)
% 32.24/32.01 => ( v342(VarCurr,bitIndex1)
% 32.24/32.01 <=> v515(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addParallelCaseBooleanConditionEqualRanges1_2,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v508(VarCurr)
% 32.24/32.01 => ( v515(VarCurr)
% 32.24/32.01 <=> v516(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addParallelCaseBooleanConditionEqualRanges0_2,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v508(VarCurr)
% 32.24/32.01 => ( v515(VarCurr)
% 32.24/32.01 <=> $true ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(aaddConditionBooleanCondEqualRangesElseBranch_9,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v517(VarCurr)
% 32.24/32.01 => ( v516(VarCurr)
% 32.24/32.01 <=> $true ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addConditionBooleanCondEqualRangesThenBranch_9,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v517(VarCurr)
% 32.24/32.01 => ( v516(VarCurr)
% 32.24/32.01 <=> $true ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_44,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v517(VarCurr)
% 32.24/32.01 <=> v344(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_55,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v507(VarCurr)
% 32.24/32.01 <=> ( v508(VarCurr)
% 32.24/32.01 | v511(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_54,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v511(VarCurr)
% 32.24/32.01 <=> ( v512(VarCurr)
% 32.24/32.01 & v514(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addBitVectorEqualityBitBlasted_21,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v514(VarCurr)
% 32.24/32.01 <=> ( $true
% 32.24/32.01 <=> v334(VarCurr,bitIndex1) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_43,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v512(VarCurr)
% 32.24/32.01 <=> v513(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_42,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v513(VarCurr)
% 32.24/32.01 <=> v381(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_53,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v508(VarCurr)
% 32.24/32.01 <=> ( v509(VarCurr)
% 32.24/32.01 & v510(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addBitVectorEqualityBitBlasted_20,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v510(VarCurr)
% 32.24/32.01 <=> ( $true
% 32.24/32.01 <=> v334(VarCurr,bitIndex0) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignmentInitValueVector_6,axiom,
% 32.24/32.01 ( v334(constB0,bitIndex1)
% 32.24/32.01 <=> $false ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignmentInitValueVector_5,axiom,
% 32.24/32.01 ( v334(constB0,bitIndex0)
% 32.24/32.01 <=> $true ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_41,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v509(VarCurr)
% 32.24/32.01 <=> v344(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_105,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v381(VarCurr)
% 32.24/32.01 <=> v383(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addBitVectorEqualityBitBlasted_19,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v383(VarCurr)
% 32.24/32.01 <=> ( ( v385(VarCurr,bitIndex4)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v385(VarCurr,bitIndex3)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v385(VarCurr,bitIndex2)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v385(VarCurr,bitIndex1)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v385(VarCurr,bitIndex0)
% 32.24/32.01 <=> $false ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addCaseBooleanConditionEqualRanges1_2,axiom,
% 32.24/32.01 ! [VarNext,VarCurr] :
% 32.24/32.01 ( nextState(VarCurr,VarNext)
% 32.24/32.01 => ( ~ v491(VarNext)
% 32.24/32.01 => ! [B] :
% 32.24/32.01 ( range_4_0(B)
% 32.24/32.01 => ( v385(VarNext,B)
% 32.24/32.01 <=> v385(VarCurr,B) ) ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addCaseBooleanConditionEqualRanges0_2,axiom,
% 32.24/32.01 ! [VarNext] :
% 32.24/32.01 ( v491(VarNext)
% 32.24/32.01 => ! [B] :
% 32.24/32.01 ( range_4_0(B)
% 32.24/32.01 => ( v385(VarNext,B)
% 32.24/32.01 <=> v501(VarNext,B) ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_104,axiom,
% 32.24/32.01 ! [VarNext,VarCurr] :
% 32.24/32.01 ( nextState(VarCurr,VarNext)
% 32.24/32.01 => ! [B] :
% 32.24/32.01 ( range_4_0(B)
% 32.24/32.01 => ( v501(VarNext,B)
% 32.24/32.01 <=> v499(VarCurr,B) ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(aaddConditionBooleanCondEqualRangesElseBranch_8,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v502(VarCurr)
% 32.24/32.01 => ! [B] :
% 32.24/32.01 ( range_4_0(B)
% 32.24/32.01 => ( v499(VarCurr,B)
% 32.24/32.01 <=> v389(VarCurr,B) ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addConditionBooleanCondEqualRangesThenBranch_8,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v502(VarCurr)
% 32.24/32.01 => ! [B] :
% 32.24/32.01 ( range_4_0(B)
% 32.24/32.01 => ( v499(VarCurr,B)
% 32.24/32.01 <=> $false ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_40,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v502(VarCurr)
% 32.24/32.01 <=> v387(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_52,axiom,
% 32.24/32.01 ! [VarNext,VarCurr] :
% 32.24/32.01 ( nextState(VarCurr,VarNext)
% 32.24/32.01 => ( v491(VarNext)
% 32.24/32.01 <=> v492(VarNext) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_51,axiom,
% 32.24/32.01 ! [VarNext,VarCurr] :
% 32.24/32.01 ( nextState(VarCurr,VarNext)
% 32.24/32.01 => ( v492(VarNext)
% 32.24/32.01 <=> ( v493(VarNext)
% 32.24/32.01 & v482(VarNext) ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_39,axiom,
% 32.24/32.01 ! [VarNext,VarCurr] :
% 32.24/32.01 ( nextState(VarCurr,VarNext)
% 32.24/32.01 => ( ~ v493(VarNext)
% 32.24/32.01 <=> v495(VarNext) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_103,axiom,
% 32.24/32.01 ! [VarNext,VarCurr] :
% 32.24/32.01 ( nextState(VarCurr,VarNext)
% 32.24/32.01 => ( v495(VarNext)
% 32.24/32.01 <=> v482(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_102,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v482(VarCurr)
% 32.24/32.01 <=> v484(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_101,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v484(VarCurr)
% 32.24/32.01 <=> v486(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_100,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v486(VarCurr)
% 32.24/32.01 <=> v488(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_99,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v488(VarCurr)
% 32.24/32.01 <=> v1(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addParallelCaseBooleanConditionEqualRanges3_1,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ( ~ v407(VarCurr)
% 32.24/32.01 & ~ v409(VarCurr)
% 32.24/32.01 & ~ v450(VarCurr) )
% 32.24/32.01 => ! [B] :
% 32.24/32.01 ( range_4_0(B)
% 32.24/32.01 => ( v389(VarCurr,B)
% 32.24/32.01 <=> v385(VarCurr,B) ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addParallelCaseBooleanConditionEqualRanges2_1,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v450(VarCurr)
% 32.24/32.01 => ! [B] :
% 32.24/32.01 ( range_4_0(B)
% 32.24/32.01 => ( v389(VarCurr,B)
% 32.24/32.01 <=> v452(VarCurr,B) ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addParallelCaseBooleanConditionEqualRanges1_1,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v409(VarCurr)
% 32.24/32.01 => ! [B] :
% 32.24/32.01 ( range_4_0(B)
% 32.24/32.01 => ( v389(VarCurr,B)
% 32.24/32.01 <=> v411(VarCurr,B) ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addParallelCaseBooleanConditionEqualRanges0_1,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v407(VarCurr)
% 32.24/32.01 => ! [B] :
% 32.24/32.01 ( range_4_0(B)
% 32.24/32.01 => ( v389(VarCurr,B)
% 32.24/32.01 <=> v385(VarCurr,B) ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addBitVectorEqualityBitBlasted_18,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v479(VarCurr)
% 32.24/32.01 <=> ( ( v480(VarCurr,bitIndex1)
% 32.24/32.01 <=> $true )
% 32.24/32.01 & ( v480(VarCurr,bitIndex0)
% 32.24/32.01 <=> $true ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_98,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v480(VarCurr,bitIndex0)
% 32.24/32.01 <=> v403(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_97,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v480(VarCurr,bitIndex1)
% 32.24/32.01 <=> v391(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(aaddConditionBooleanCondEqualRangesElseBranch_7,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v453(VarCurr)
% 32.24/32.01 => ! [B] :
% 32.24/32.01 ( range_4_0(B)
% 32.24/32.01 => ( v452(VarCurr,B)
% 32.24/32.01 <=> v454(VarCurr,B) ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addConditionBooleanCondEqualRangesThenBranch_7,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v453(VarCurr)
% 32.24/32.01 => ! [B] :
% 32.24/32.01 ( range_4_0(B)
% 32.24/32.01 => ( v452(VarCurr,B)
% 32.24/32.01 <=> b01111(B) ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_96,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v454(VarCurr,bitIndex0)
% 32.24/32.01 <=> v476(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_95,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v454(VarCurr,bitIndex1)
% 32.24/32.01 <=> v474(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_94,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v454(VarCurr,bitIndex2)
% 32.24/32.01 <=> v469(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_93,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v454(VarCurr,bitIndex3)
% 32.24/32.01 <=> v464(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_92,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v454(VarCurr,bitIndex4)
% 32.24/32.01 <=> v456(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_50,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v474(VarCurr)
% 32.24/32.01 <=> ( v475(VarCurr)
% 32.24/32.01 & v478(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_29,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v478(VarCurr)
% 32.24/32.01 <=> ( v385(VarCurr,bitIndex0)
% 32.24/32.01 | v385(VarCurr,bitIndex1) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_49,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v475(VarCurr)
% 32.24/32.01 <=> ( v476(VarCurr)
% 32.24/32.01 | v477(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_38,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v477(VarCurr)
% 32.24/32.01 <=> v385(VarCurr,bitIndex1) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_37,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v476(VarCurr)
% 32.24/32.01 <=> v385(VarCurr,bitIndex0) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_48,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v469(VarCurr)
% 32.24/32.01 <=> ( v470(VarCurr)
% 32.24/32.01 & v473(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_28,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v473(VarCurr)
% 32.24/32.01 <=> ( v461(VarCurr)
% 32.24/32.01 | v385(VarCurr,bitIndex2) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_47,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v470(VarCurr)
% 32.24/32.01 <=> ( v471(VarCurr)
% 32.24/32.01 | v472(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_36,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v472(VarCurr)
% 32.24/32.01 <=> v385(VarCurr,bitIndex2) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_35,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v471(VarCurr)
% 32.24/32.01 <=> v461(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_46,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v464(VarCurr)
% 32.24/32.01 <=> ( v465(VarCurr)
% 32.24/32.01 & v468(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_27,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v468(VarCurr)
% 32.24/32.01 <=> ( v460(VarCurr)
% 32.24/32.01 | v385(VarCurr,bitIndex3) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_45,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v465(VarCurr)
% 32.24/32.01 <=> ( v466(VarCurr)
% 32.24/32.01 | v467(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_34,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v467(VarCurr)
% 32.24/32.01 <=> v385(VarCurr,bitIndex3) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_33,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v466(VarCurr)
% 32.24/32.01 <=> v460(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_44,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v456(VarCurr)
% 32.24/32.01 <=> ( v457(VarCurr)
% 32.24/32.01 & v463(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_26,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v463(VarCurr)
% 32.24/32.01 <=> ( v459(VarCurr)
% 32.24/32.01 | v385(VarCurr,bitIndex4) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_43,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v457(VarCurr)
% 32.24/32.01 <=> ( v458(VarCurr)
% 32.24/32.01 | v462(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_32,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v462(VarCurr)
% 32.24/32.01 <=> v385(VarCurr,bitIndex4) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_31,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v458(VarCurr)
% 32.24/32.01 <=> v459(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_25,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v459(VarCurr)
% 32.24/32.01 <=> ( v460(VarCurr)
% 32.24/32.01 & v385(VarCurr,bitIndex3) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_24,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v460(VarCurr)
% 32.24/32.01 <=> ( v461(VarCurr)
% 32.24/32.01 & v385(VarCurr,bitIndex2) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_23,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v461(VarCurr)
% 32.24/32.01 <=> ( v385(VarCurr,bitIndex0)
% 32.24/32.01 & v385(VarCurr,bitIndex1) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addBitVectorEqualityBitBlasted_17,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v453(VarCurr)
% 32.24/32.01 <=> ( ( v385(VarCurr,bitIndex4)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v385(VarCurr,bitIndex3)
% 32.24/32.01 <=> $true )
% 32.24/32.01 & ( v385(VarCurr,bitIndex2)
% 32.24/32.01 <=> $true )
% 32.24/32.01 & ( v385(VarCurr,bitIndex1)
% 32.24/32.01 <=> $true )
% 32.24/32.01 & ( v385(VarCurr,bitIndex0)
% 32.24/32.01 <=> $true ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_95,axiom,
% 32.24/32.01 ~ b01111(bitIndex4) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_94,axiom,
% 32.24/32.01 b01111(bitIndex3) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_93,axiom,
% 32.24/32.01 b01111(bitIndex2) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_92,axiom,
% 32.24/32.01 b01111(bitIndex1) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_91,axiom,
% 32.24/32.01 b01111(bitIndex0) ).
% 32.24/32.01
% 32.24/32.01 fof(addBitVectorEqualityBitBlasted_16,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v450(VarCurr)
% 32.24/32.01 <=> ( ( v451(VarCurr,bitIndex1)
% 32.24/32.01 <=> $true )
% 32.24/32.01 & ( v451(VarCurr,bitIndex0)
% 32.24/32.01 <=> $false ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_91,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v451(VarCurr,bitIndex0)
% 32.24/32.01 <=> v403(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_90,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v451(VarCurr,bitIndex1)
% 32.24/32.01 <=> v391(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(aaddConditionBooleanCondEqualRangesElseBranch_6,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v412(VarCurr)
% 32.24/32.01 => ! [B] :
% 32.24/32.01 ( range_31_0(B)
% 32.24/32.01 => ( v411(VarCurr,B)
% 32.24/32.01 <=> v413(VarCurr,B) ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addConditionBooleanCondEqualRangesThenBranch_6,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v412(VarCurr)
% 32.24/32.01 => ! [B] :
% 32.24/32.01 ( range_31_0(B)
% 32.24/32.01 => ( v411(VarCurr,B)
% 32.24/32.01 <=> $false ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_52,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v413(VarCurr,bitIndex6)
% 32.24/32.01 <=> v414(VarCurr,bitIndex5) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_51,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v413(VarCurr,bitIndex7)
% 32.24/32.01 <=> v414(VarCurr,bitIndex5) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_50,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v413(VarCurr,bitIndex8)
% 32.24/32.01 <=> v414(VarCurr,bitIndex5) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_49,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v413(VarCurr,bitIndex9)
% 32.24/32.01 <=> v414(VarCurr,bitIndex5) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_48,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v413(VarCurr,bitIndex10)
% 32.24/32.01 <=> v414(VarCurr,bitIndex5) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_47,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v413(VarCurr,bitIndex11)
% 32.24/32.01 <=> v414(VarCurr,bitIndex5) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_46,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v413(VarCurr,bitIndex12)
% 32.24/32.01 <=> v414(VarCurr,bitIndex5) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_45,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v413(VarCurr,bitIndex13)
% 32.24/32.01 <=> v414(VarCurr,bitIndex5) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_44,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v413(VarCurr,bitIndex14)
% 32.24/32.01 <=> v414(VarCurr,bitIndex5) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_43,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v413(VarCurr,bitIndex15)
% 32.24/32.01 <=> v414(VarCurr,bitIndex5) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_42,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v413(VarCurr,bitIndex16)
% 32.24/32.01 <=> v414(VarCurr,bitIndex5) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_41,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v413(VarCurr,bitIndex17)
% 32.24/32.01 <=> v414(VarCurr,bitIndex5) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_40,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v413(VarCurr,bitIndex18)
% 32.24/32.01 <=> v414(VarCurr,bitIndex5) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_39,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v413(VarCurr,bitIndex19)
% 32.24/32.01 <=> v414(VarCurr,bitIndex5) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_38,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v413(VarCurr,bitIndex20)
% 32.24/32.01 <=> v414(VarCurr,bitIndex5) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_37,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v413(VarCurr,bitIndex21)
% 32.24/32.01 <=> v414(VarCurr,bitIndex5) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_36,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v413(VarCurr,bitIndex22)
% 32.24/32.01 <=> v414(VarCurr,bitIndex5) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_35,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v413(VarCurr,bitIndex23)
% 32.24/32.01 <=> v414(VarCurr,bitIndex5) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_34,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v413(VarCurr,bitIndex24)
% 32.24/32.01 <=> v414(VarCurr,bitIndex5) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_33,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v413(VarCurr,bitIndex25)
% 32.24/32.01 <=> v414(VarCurr,bitIndex5) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_32,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v413(VarCurr,bitIndex26)
% 32.24/32.01 <=> v414(VarCurr,bitIndex5) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_31,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v413(VarCurr,bitIndex27)
% 32.24/32.01 <=> v414(VarCurr,bitIndex5) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_30,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v413(VarCurr,bitIndex28)
% 32.24/32.01 <=> v414(VarCurr,bitIndex5) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_29,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v413(VarCurr,bitIndex29)
% 32.24/32.01 <=> v414(VarCurr,bitIndex5) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_28,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v413(VarCurr,bitIndex30)
% 32.24/32.01 <=> v414(VarCurr,bitIndex5) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_27,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v413(VarCurr,bitIndex31)
% 32.24/32.01 <=> v414(VarCurr,bitIndex5) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_89,axiom,
% 32.24/32.01 ! [VarCurr,B] :
% 32.24/32.01 ( range_5_0(B)
% 32.24/32.01 => ( v413(VarCurr,B)
% 32.24/32.01 <=> v414(VarCurr,B) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(range_axiom_6,axiom,
% 32.24/32.01 ! [B] :
% 32.24/32.01 ( range_5_0(B)
% 32.24/32.01 <=> ( $false
% 32.24/32.01 | bitIndex0 = B
% 32.24/32.01 | bitIndex1 = B
% 32.24/32.01 | bitIndex2 = B
% 32.24/32.01 | bitIndex3 = B
% 32.24/32.01 | bitIndex4 = B
% 32.24/32.01 | bitIndex5 = B ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_88,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v414(VarCurr,bitIndex0)
% 32.24/32.01 <=> v448(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_87,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v414(VarCurr,bitIndex1)
% 32.24/32.01 <=> v446(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_86,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v414(VarCurr,bitIndex2)
% 32.24/32.01 <=> v442(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_85,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v414(VarCurr,bitIndex3)
% 32.24/32.01 <=> v438(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_84,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v414(VarCurr,bitIndex4)
% 32.24/32.01 <=> v434(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_83,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v414(VarCurr,bitIndex5)
% 32.24/32.01 <=> v416(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_42,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v446(VarCurr)
% 32.24/32.01 <=> ( v447(VarCurr)
% 32.24/32.01 & v449(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_41,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v449(VarCurr)
% 32.24/32.01 <=> ( v420(VarCurr,bitIndex0)
% 32.24/32.01 | v428(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_22,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v447(VarCurr)
% 32.24/32.01 <=> ( v448(VarCurr)
% 32.24/32.01 | v420(VarCurr,bitIndex1) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_30,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v448(VarCurr)
% 32.24/32.01 <=> v420(VarCurr,bitIndex0) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_40,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v442(VarCurr)
% 32.24/32.01 <=> ( v443(VarCurr)
% 32.24/32.01 & v445(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_39,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v445(VarCurr)
% 32.24/32.01 <=> ( v426(VarCurr)
% 32.24/32.01 | v429(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_21,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v443(VarCurr)
% 32.24/32.01 <=> ( v444(VarCurr)
% 32.24/32.01 | v420(VarCurr,bitIndex2) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_29,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v444(VarCurr)
% 32.24/32.01 <=> v426(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_38,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v438(VarCurr)
% 32.24/32.01 <=> ( v439(VarCurr)
% 32.24/32.01 & v441(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_37,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v441(VarCurr)
% 32.24/32.01 <=> ( v424(VarCurr)
% 32.24/32.01 | v430(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_20,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v439(VarCurr)
% 32.24/32.01 <=> ( v440(VarCurr)
% 32.24/32.01 | v420(VarCurr,bitIndex3) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_28,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v440(VarCurr)
% 32.24/32.01 <=> v424(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_36,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v434(VarCurr)
% 32.24/32.01 <=> ( v435(VarCurr)
% 32.24/32.01 & v437(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_35,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v437(VarCurr)
% 32.24/32.01 <=> ( v422(VarCurr)
% 32.24/32.01 | v431(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_19,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v435(VarCurr)
% 32.24/32.01 <=> ( v436(VarCurr)
% 32.24/32.01 | v420(VarCurr,bitIndex4) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_27,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v436(VarCurr)
% 32.24/32.01 <=> v422(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_34,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v416(VarCurr)
% 32.24/32.01 <=> ( v417(VarCurr)
% 32.24/32.01 & v432(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_33,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v432(VarCurr)
% 32.24/32.01 <=> ( v419(VarCurr)
% 32.24/32.01 | v433(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_26,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v433(VarCurr)
% 32.24/32.01 <=> v420(VarCurr,bitIndex5) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_18,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v417(VarCurr)
% 32.24/32.01 <=> ( v418(VarCurr)
% 32.24/32.01 | v420(VarCurr,bitIndex5) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_25,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v418(VarCurr)
% 32.24/32.01 <=> v419(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_17,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v419(VarCurr)
% 32.24/32.01 <=> ( v420(VarCurr,bitIndex4)
% 32.24/32.01 | v421(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_32,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v421(VarCurr)
% 32.24/32.01 <=> ( v422(VarCurr)
% 32.24/32.01 & v431(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_24,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v431(VarCurr)
% 32.24/32.01 <=> v420(VarCurr,bitIndex4) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_16,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v422(VarCurr)
% 32.24/32.01 <=> ( v420(VarCurr,bitIndex3)
% 32.24/32.01 | v423(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_31,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v423(VarCurr)
% 32.24/32.01 <=> ( v424(VarCurr)
% 32.24/32.01 & v430(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_23,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v430(VarCurr)
% 32.24/32.01 <=> v420(VarCurr,bitIndex3) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_15,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v424(VarCurr)
% 32.24/32.01 <=> ( v420(VarCurr,bitIndex2)
% 32.24/32.01 | v425(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_30,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v425(VarCurr)
% 32.24/32.01 <=> ( v426(VarCurr)
% 32.24/32.01 & v429(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_22,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v429(VarCurr)
% 32.24/32.01 <=> v420(VarCurr,bitIndex2) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_14,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v426(VarCurr)
% 32.24/32.01 <=> ( v420(VarCurr,bitIndex1)
% 32.24/32.01 | v427(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_29,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v427(VarCurr)
% 32.24/32.01 <=> ( v420(VarCurr,bitIndex0)
% 32.24/32.01 & v428(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_21,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v428(VarCurr)
% 32.24/32.01 <=> v420(VarCurr,bitIndex1) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addZeroExtensionConstraint_1,axiom,
% 32.24/32.01 ! [VarCurr] : ~ v420(VarCurr,bitIndex5) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_82,axiom,
% 32.24/32.01 ! [VarCurr,B] :
% 32.24/32.01 ( range_4_0(B)
% 32.24/32.01 => ( v420(VarCurr,B)
% 32.24/32.01 <=> v385(VarCurr,B) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addBitVectorEqualityBitBlasted_15,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v412(VarCurr)
% 32.24/32.01 <=> ( ( v385(VarCurr,bitIndex4)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v385(VarCurr,bitIndex3)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v385(VarCurr,bitIndex2)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v385(VarCurr,bitIndex1)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v385(VarCurr,bitIndex0)
% 32.24/32.01 <=> $false ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addBitVectorEqualityBitBlasted_14,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v409(VarCurr)
% 32.24/32.01 <=> ( ( v410(VarCurr,bitIndex1)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v410(VarCurr,bitIndex0)
% 32.24/32.01 <=> $true ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_81,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v410(VarCurr,bitIndex0)
% 32.24/32.01 <=> v403(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_80,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v410(VarCurr,bitIndex1)
% 32.24/32.01 <=> v391(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignmentInitValueVector_4,axiom,
% 32.24/32.01 ! [B] :
% 32.24/32.01 ( range_4_0(B)
% 32.24/32.01 => ( v385(constB0,B)
% 32.24/32.01 <=> $false ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addBitVectorEqualityBitBlasted_13,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v407(VarCurr)
% 32.24/32.01 <=> ( ( v408(VarCurr,bitIndex1)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v408(VarCurr,bitIndex0)
% 32.24/32.01 <=> $false ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_79,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v408(VarCurr,bitIndex0)
% 32.24/32.01 <=> v403(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_78,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v408(VarCurr,bitIndex1)
% 32.24/32.01 <=> v391(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_77,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v403(VarCurr)
% 32.24/32.01 <=> v332(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_76,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v391(VarCurr)
% 32.24/32.01 <=> v393(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_75,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v393(VarCurr)
% 32.24/32.01 <=> v395(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_74,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v395(VarCurr)
% 32.24/32.01 <=> v397(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_73,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v397(VarCurr)
% 32.24/32.01 <=> v399(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_72,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v399(VarCurr)
% 32.24/32.01 <=> v401(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_71,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v387(VarCurr)
% 32.24/32.01 <=> v336(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_70,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v354(VarCurr)
% 32.24/32.01 <=> v356(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(aaddConditionBooleanCondEqualRangesElseBranch_5,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v374(VarCurr)
% 32.24/32.01 => ( v356(VarCurr)
% 32.24/32.01 <=> $false ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addConditionBooleanCondEqualRangesThenBranch_5,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v374(VarCurr)
% 32.24/32.01 => ( v356(VarCurr)
% 32.24/32.01 <=> $true ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_28,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v374(VarCurr)
% 32.24/32.01 <=> ( v375(VarCurr)
% 32.24/32.01 & v366(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_20,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v375(VarCurr)
% 32.24/32.01 <=> v358(VarCurr,bitIndex8) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_69,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v366(VarCurr)
% 32.24/32.01 <=> v368(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_68,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v368(VarCurr)
% 32.24/32.01 <=> v370(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_67,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v370(VarCurr)
% 32.24/32.01 <=> v372(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_66,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v358(VarCurr,bitIndex8)
% 32.24/32.01 <=> v360(VarCurr,bitIndex8) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_65,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v360(VarCurr,bitIndex8)
% 32.24/32.01 <=> v362(VarCurr,bitIndex8) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_64,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v362(VarCurr,bitIndex8)
% 32.24/32.01 <=> v364(VarCurr,bitIndex8) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_63,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v350(VarCurr)
% 32.24/32.01 <=> v336(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_62,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v336(VarCurr)
% 32.24/32.01 <=> v338(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_61,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v338(VarCurr)
% 32.24/32.01 <=> v340(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_60,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v340(VarCurr)
% 32.24/32.01 <=> v16(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_59,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v99(VarCurr)
% 32.24/32.01 <=> v101(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_19,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v101(VarCurr)
% 32.24/32.01 <=> v103(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_58,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v103(VarCurr)
% 32.24/32.01 <=> v105(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_57,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v105(VarCurr)
% 32.24/32.01 <=> v107(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addBitVectorEqualityBitBlasted_12,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v107(VarCurr)
% 32.24/32.01 <=> ( ( v109(VarCurr,bitIndex3)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v109(VarCurr,bitIndex2)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v109(VarCurr,bitIndex1)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v109(VarCurr,bitIndex0)
% 32.24/32.01 <=> $false ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addCaseBooleanConditionEqualRanges1_1,axiom,
% 32.24/32.01 ! [VarNext,VarCurr] :
% 32.24/32.01 ( nextState(VarCurr,VarNext)
% 32.24/32.01 => ( ~ v291(VarNext)
% 32.24/32.01 => ! [B] :
% 32.24/32.01 ( range_3_0(B)
% 32.24/32.01 => ( v109(VarNext,B)
% 32.24/32.01 <=> v109(VarCurr,B) ) ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addCaseBooleanConditionEqualRanges0_1,axiom,
% 32.24/32.01 ! [VarNext] :
% 32.24/32.01 ( v291(VarNext)
% 32.24/32.01 => ! [B] :
% 32.24/32.01 ( range_3_0(B)
% 32.24/32.01 => ( v109(VarNext,B)
% 32.24/32.01 <=> v301(VarNext,B) ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_56,axiom,
% 32.24/32.01 ! [VarNext,VarCurr] :
% 32.24/32.01 ( nextState(VarCurr,VarNext)
% 32.24/32.01 => ! [B] :
% 32.24/32.01 ( range_3_0(B)
% 32.24/32.01 => ( v301(VarNext,B)
% 32.24/32.01 <=> v299(VarCurr,B) ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(aaddConditionBooleanCondEqualRangesElseBranch_4,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v302(VarCurr)
% 32.24/32.01 => ! [B] :
% 32.24/32.01 ( range_3_0(B)
% 32.24/32.01 => ( v299(VarCurr,B)
% 32.24/32.01 <=> v111(VarCurr,B) ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addConditionBooleanCondEqualRangesThenBranch_4,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v302(VarCurr)
% 32.24/32.01 => ! [B] :
% 32.24/32.01 ( range_3_0(B)
% 32.24/32.01 => ( v299(VarCurr,B)
% 32.24/32.01 <=> $false ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_18,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v302(VarCurr)
% 32.24/32.01 <=> v10(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_27,axiom,
% 32.24/32.01 ! [VarNext,VarCurr] :
% 32.24/32.01 ( nextState(VarCurr,VarNext)
% 32.24/32.01 => ( v291(VarNext)
% 32.24/32.01 <=> v292(VarNext) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_26,axiom,
% 32.24/32.01 ! [VarNext,VarCurr] :
% 32.24/32.01 ( nextState(VarCurr,VarNext)
% 32.24/32.01 => ( v292(VarNext)
% 32.24/32.01 <=> ( v293(VarNext)
% 32.24/32.01 & v286(VarNext) ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_17,axiom,
% 32.24/32.01 ! [VarNext,VarCurr] :
% 32.24/32.01 ( nextState(VarCurr,VarNext)
% 32.24/32.01 => ( ~ v293(VarNext)
% 32.24/32.01 <=> v295(VarNext) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_55,axiom,
% 32.24/32.01 ! [VarNext,VarCurr] :
% 32.24/32.01 ( nextState(VarCurr,VarNext)
% 32.24/32.01 => ( v295(VarNext)
% 32.24/32.01 <=> v286(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_54,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v286(VarCurr)
% 32.24/32.01 <=> v288(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_53,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v288(VarCurr)
% 32.24/32.01 <=> v197(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addParallelCaseBooleanConditionEqualRanges3,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ( ~ v223(VarCurr)
% 32.24/32.01 & ~ v225(VarCurr)
% 32.24/32.01 & ~ v260(VarCurr) )
% 32.24/32.01 => ! [B] :
% 32.24/32.01 ( range_3_0(B)
% 32.24/32.01 => ( v111(VarCurr,B)
% 32.24/32.01 <=> v109(VarCurr,B) ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addParallelCaseBooleanConditionEqualRanges2,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v260(VarCurr)
% 32.24/32.01 => ! [B] :
% 32.24/32.01 ( range_3_0(B)
% 32.24/32.01 => ( v111(VarCurr,B)
% 32.24/32.01 <=> v262(VarCurr,B) ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addParallelCaseBooleanConditionEqualRanges1,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v225(VarCurr)
% 32.24/32.01 => ! [B] :
% 32.24/32.01 ( range_3_0(B)
% 32.24/32.01 => ( v111(VarCurr,B)
% 32.24/32.01 <=> v227(VarCurr,B) ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addParallelCaseBooleanConditionEqualRanges0,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v223(VarCurr)
% 32.24/32.01 => ! [B] :
% 32.24/32.01 ( range_3_0(B)
% 32.24/32.01 => ( v111(VarCurr,B)
% 32.24/32.01 <=> v109(VarCurr,B) ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addBitVectorEqualityBitBlasted_11,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v283(VarCurr)
% 32.24/32.01 <=> ( ( v284(VarCurr,bitIndex1)
% 32.24/32.01 <=> $true )
% 32.24/32.01 & ( v284(VarCurr,bitIndex0)
% 32.24/32.01 <=> $true ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_90,axiom,
% 32.24/32.01 b11(bitIndex1) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_89,axiom,
% 32.24/32.01 b11(bitIndex0) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_52,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v284(VarCurr,bitIndex0)
% 32.24/32.01 <=> v23(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_51,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v284(VarCurr,bitIndex1)
% 32.24/32.01 <=> v113(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(aaddConditionBooleanCondEqualRangesElseBranch_3,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v263(VarCurr)
% 32.24/32.01 => ! [B] :
% 32.24/32.01 ( range_3_0(B)
% 32.24/32.01 => ( v262(VarCurr,B)
% 32.24/32.01 <=> v264(VarCurr,B) ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addConditionBooleanCondEqualRangesThenBranch_3,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v263(VarCurr)
% 32.24/32.01 => ! [B] :
% 32.24/32.01 ( range_3_0(B)
% 32.24/32.01 => ( v262(VarCurr,B)
% 32.24/32.01 <=> b0110(B) ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_50,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v264(VarCurr,bitIndex0)
% 32.24/32.01 <=> v280(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_49,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v264(VarCurr,bitIndex1)
% 32.24/32.01 <=> v278(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_48,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v264(VarCurr,bitIndex2)
% 32.24/32.01 <=> v273(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_47,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v264(VarCurr,bitIndex3)
% 32.24/32.01 <=> v266(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_25,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v278(VarCurr)
% 32.24/32.01 <=> ( v279(VarCurr)
% 32.24/32.01 & v282(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_13,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v282(VarCurr)
% 32.24/32.01 <=> ( v109(VarCurr,bitIndex0)
% 32.24/32.01 | v109(VarCurr,bitIndex1) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_24,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v279(VarCurr)
% 32.24/32.01 <=> ( v280(VarCurr)
% 32.24/32.01 | v281(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_16,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v281(VarCurr)
% 32.24/32.01 <=> v109(VarCurr,bitIndex1) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_15,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v280(VarCurr)
% 32.24/32.01 <=> v109(VarCurr,bitIndex0) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_23,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v273(VarCurr)
% 32.24/32.01 <=> ( v274(VarCurr)
% 32.24/32.01 & v277(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_12,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v277(VarCurr)
% 32.24/32.01 <=> ( v270(VarCurr)
% 32.24/32.01 | v109(VarCurr,bitIndex2) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_22,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v274(VarCurr)
% 32.24/32.01 <=> ( v275(VarCurr)
% 32.24/32.01 | v276(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_14,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v276(VarCurr)
% 32.24/32.01 <=> v109(VarCurr,bitIndex2) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_13,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v275(VarCurr)
% 32.24/32.01 <=> v270(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_21,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v266(VarCurr)
% 32.24/32.01 <=> ( v267(VarCurr)
% 32.24/32.01 & v272(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_11,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v272(VarCurr)
% 32.24/32.01 <=> ( v269(VarCurr)
% 32.24/32.01 | v109(VarCurr,bitIndex3) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_20,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v267(VarCurr)
% 32.24/32.01 <=> ( v268(VarCurr)
% 32.24/32.01 | v271(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_12,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v271(VarCurr)
% 32.24/32.01 <=> v109(VarCurr,bitIndex3) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_11,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v268(VarCurr)
% 32.24/32.01 <=> v269(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_10,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v269(VarCurr)
% 32.24/32.01 <=> ( v270(VarCurr)
% 32.24/32.01 & v109(VarCurr,bitIndex2) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_9,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v270(VarCurr)
% 32.24/32.01 <=> ( v109(VarCurr,bitIndex0)
% 32.24/32.01 & v109(VarCurr,bitIndex1) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addBitVectorEqualityBitBlasted_10,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v263(VarCurr)
% 32.24/32.01 <=> ( ( v109(VarCurr,bitIndex3)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v109(VarCurr,bitIndex2)
% 32.24/32.01 <=> $true )
% 32.24/32.01 & ( v109(VarCurr,bitIndex1)
% 32.24/32.01 <=> $true )
% 32.24/32.01 & ( v109(VarCurr,bitIndex0)
% 32.24/32.01 <=> $false ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_88,axiom,
% 32.24/32.01 ~ b0110(bitIndex3) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_87,axiom,
% 32.24/32.01 b0110(bitIndex2) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_86,axiom,
% 32.24/32.01 b0110(bitIndex1) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_85,axiom,
% 32.24/32.01 ~ b0110(bitIndex0) ).
% 32.24/32.01
% 32.24/32.01 fof(addBitVectorEqualityBitBlasted_9,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v260(VarCurr)
% 32.24/32.01 <=> ( ( v261(VarCurr,bitIndex1)
% 32.24/32.01 <=> $true )
% 32.24/32.01 & ( v261(VarCurr,bitIndex0)
% 32.24/32.01 <=> $false ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_84,axiom,
% 32.24/32.01 b10(bitIndex1) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_83,axiom,
% 32.24/32.01 ~ b10(bitIndex0) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_46,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v261(VarCurr,bitIndex0)
% 32.24/32.01 <=> v23(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_45,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v261(VarCurr,bitIndex1)
% 32.24/32.01 <=> v113(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(aaddConditionBooleanCondEqualRangesElseBranch_2,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v228(VarCurr)
% 32.24/32.01 => ! [B] :
% 32.24/32.01 ( range_31_0(B)
% 32.24/32.01 => ( v227(VarCurr,B)
% 32.24/32.01 <=> v229(VarCurr,B) ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addConditionBooleanCondEqualRangesThenBranch_2,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v228(VarCurr)
% 32.24/32.01 => ! [B] :
% 32.24/32.01 ( range_31_0(B)
% 32.24/32.01 => ( v227(VarCurr,B)
% 32.24/32.01 <=> $false ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(range_axiom_5,axiom,
% 32.24/32.01 ! [B] :
% 32.24/32.01 ( range_31_0(B)
% 32.24/32.01 <=> ( $false
% 32.24/32.01 | bitIndex0 = B
% 32.24/32.01 | bitIndex1 = B
% 32.24/32.01 | bitIndex2 = B
% 32.24/32.01 | bitIndex3 = B
% 32.24/32.01 | bitIndex4 = B
% 32.24/32.01 | bitIndex5 = B
% 32.24/32.01 | bitIndex6 = B
% 32.24/32.01 | bitIndex7 = B
% 32.24/32.01 | bitIndex8 = B
% 32.24/32.01 | bitIndex9 = B
% 32.24/32.01 | bitIndex10 = B
% 32.24/32.01 | bitIndex11 = B
% 32.24/32.01 | bitIndex12 = B
% 32.24/32.01 | bitIndex13 = B
% 32.24/32.01 | bitIndex14 = B
% 32.24/32.01 | bitIndex15 = B
% 32.24/32.01 | bitIndex16 = B
% 32.24/32.01 | bitIndex17 = B
% 32.24/32.01 | bitIndex18 = B
% 32.24/32.01 | bitIndex19 = B
% 32.24/32.01 | bitIndex20 = B
% 32.24/32.01 | bitIndex21 = B
% 32.24/32.01 | bitIndex22 = B
% 32.24/32.01 | bitIndex23 = B
% 32.24/32.01 | bitIndex24 = B
% 32.24/32.01 | bitIndex25 = B
% 32.24/32.01 | bitIndex26 = B
% 32.24/32.01 | bitIndex27 = B
% 32.24/32.01 | bitIndex28 = B
% 32.24/32.01 | bitIndex29 = B
% 32.24/32.01 | bitIndex30 = B
% 32.24/32.01 | bitIndex31 = B ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_82,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex31) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_81,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex30) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_80,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex29) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_79,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex28) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_78,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex27) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_77,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex26) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_76,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex25) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_75,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex24) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_74,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex23) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_73,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex22) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_72,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex21) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_71,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex20) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_70,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex19) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_69,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex18) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_68,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex17) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_67,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex16) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_66,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex15) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_65,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex14) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_64,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex13) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_63,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex12) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_62,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex11) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_61,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex10) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_60,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex9) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_59,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex8) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_58,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex7) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_57,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex6) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_56,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex5) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_55,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex4) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_54,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex3) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_53,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex2) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_52,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex1) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_51,axiom,
% 32.24/32.01 ~ b00000000000000000000000000000000(bitIndex0) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_26,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v229(VarCurr,bitIndex5)
% 32.24/32.01 <=> v230(VarCurr,bitIndex4) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_25,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v229(VarCurr,bitIndex6)
% 32.24/32.01 <=> v230(VarCurr,bitIndex4) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_24,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v229(VarCurr,bitIndex7)
% 32.24/32.01 <=> v230(VarCurr,bitIndex4) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_23,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v229(VarCurr,bitIndex8)
% 32.24/32.01 <=> v230(VarCurr,bitIndex4) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_22,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v229(VarCurr,bitIndex9)
% 32.24/32.01 <=> v230(VarCurr,bitIndex4) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_21,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v229(VarCurr,bitIndex10)
% 32.24/32.01 <=> v230(VarCurr,bitIndex4) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_20,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v229(VarCurr,bitIndex11)
% 32.24/32.01 <=> v230(VarCurr,bitIndex4) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_19,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v229(VarCurr,bitIndex12)
% 32.24/32.01 <=> v230(VarCurr,bitIndex4) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_18,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v229(VarCurr,bitIndex13)
% 32.24/32.01 <=> v230(VarCurr,bitIndex4) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_17,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v229(VarCurr,bitIndex14)
% 32.24/32.01 <=> v230(VarCurr,bitIndex4) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_16,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v229(VarCurr,bitIndex15)
% 32.24/32.01 <=> v230(VarCurr,bitIndex4) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_15,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v229(VarCurr,bitIndex16)
% 32.24/32.01 <=> v230(VarCurr,bitIndex4) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_14,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v229(VarCurr,bitIndex17)
% 32.24/32.01 <=> v230(VarCurr,bitIndex4) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_13,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v229(VarCurr,bitIndex18)
% 32.24/32.01 <=> v230(VarCurr,bitIndex4) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_12,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v229(VarCurr,bitIndex19)
% 32.24/32.01 <=> v230(VarCurr,bitIndex4) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_11,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v229(VarCurr,bitIndex20)
% 32.24/32.01 <=> v230(VarCurr,bitIndex4) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_10,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v229(VarCurr,bitIndex21)
% 32.24/32.01 <=> v230(VarCurr,bitIndex4) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_9,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v229(VarCurr,bitIndex22)
% 32.24/32.01 <=> v230(VarCurr,bitIndex4) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_8,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v229(VarCurr,bitIndex23)
% 32.24/32.01 <=> v230(VarCurr,bitIndex4) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_7,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v229(VarCurr,bitIndex24)
% 32.24/32.01 <=> v230(VarCurr,bitIndex4) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_6,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v229(VarCurr,bitIndex25)
% 32.24/32.01 <=> v230(VarCurr,bitIndex4) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_5,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v229(VarCurr,bitIndex26)
% 32.24/32.01 <=> v230(VarCurr,bitIndex4) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_4,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v229(VarCurr,bitIndex27)
% 32.24/32.01 <=> v230(VarCurr,bitIndex4) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_3,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v229(VarCurr,bitIndex28)
% 32.24/32.01 <=> v230(VarCurr,bitIndex4) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_2,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v229(VarCurr,bitIndex29)
% 32.24/32.01 <=> v230(VarCurr,bitIndex4) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint_1,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v229(VarCurr,bitIndex30)
% 32.24/32.01 <=> v230(VarCurr,bitIndex4) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addSignExtensionConstraint,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v229(VarCurr,bitIndex31)
% 32.24/32.01 <=> v230(VarCurr,bitIndex4) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_44,axiom,
% 32.24/32.01 ! [VarCurr,B] :
% 32.24/32.01 ( range_4_0(B)
% 32.24/32.01 => ( v229(VarCurr,B)
% 32.24/32.01 <=> v230(VarCurr,B) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_43,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v230(VarCurr,bitIndex0)
% 32.24/32.01 <=> v258(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_42,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v230(VarCurr,bitIndex1)
% 32.24/32.01 <=> v256(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_41,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v230(VarCurr,bitIndex2)
% 32.24/32.01 <=> v252(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_40,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v230(VarCurr,bitIndex3)
% 32.24/32.01 <=> v248(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_39,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v230(VarCurr,bitIndex4)
% 32.24/32.01 <=> v232(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_19,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v256(VarCurr)
% 32.24/32.01 <=> ( v257(VarCurr)
% 32.24/32.01 & v259(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_18,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v259(VarCurr)
% 32.24/32.01 <=> ( v236(VarCurr,bitIndex0)
% 32.24/32.01 | v243(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_8,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v257(VarCurr)
% 32.24/32.01 <=> ( v258(VarCurr)
% 32.24/32.01 | v236(VarCurr,bitIndex1) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_10,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v258(VarCurr)
% 32.24/32.01 <=> v236(VarCurr,bitIndex0) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_17,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v252(VarCurr)
% 32.24/32.01 <=> ( v253(VarCurr)
% 32.24/32.01 & v255(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_16,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v255(VarCurr)
% 32.24/32.01 <=> ( v241(VarCurr)
% 32.24/32.01 | v244(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_7,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v253(VarCurr)
% 32.24/32.01 <=> ( v254(VarCurr)
% 32.24/32.01 | v236(VarCurr,bitIndex2) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_9,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v254(VarCurr)
% 32.24/32.01 <=> v241(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_15,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v248(VarCurr)
% 32.24/32.01 <=> ( v249(VarCurr)
% 32.24/32.01 & v251(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_14,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v251(VarCurr)
% 32.24/32.01 <=> ( v239(VarCurr)
% 32.24/32.01 | v245(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_6,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v249(VarCurr)
% 32.24/32.01 <=> ( v250(VarCurr)
% 32.24/32.01 | v236(VarCurr,bitIndex3) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_8,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v250(VarCurr)
% 32.24/32.01 <=> v239(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_13,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v232(VarCurr)
% 32.24/32.01 <=> ( v233(VarCurr)
% 32.24/32.01 & v246(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_12,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v246(VarCurr)
% 32.24/32.01 <=> ( v235(VarCurr)
% 32.24/32.01 | v247(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_7,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v247(VarCurr)
% 32.24/32.01 <=> v236(VarCurr,bitIndex4) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_5,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v233(VarCurr)
% 32.24/32.01 <=> ( v234(VarCurr)
% 32.24/32.01 | v236(VarCurr,bitIndex4) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_6,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v234(VarCurr)
% 32.24/32.01 <=> v235(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_4,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v235(VarCurr)
% 32.24/32.01 <=> ( v236(VarCurr,bitIndex3)
% 32.24/32.01 | v238(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_11,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v238(VarCurr)
% 32.24/32.01 <=> ( v239(VarCurr)
% 32.24/32.01 & v245(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_5,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v245(VarCurr)
% 32.24/32.01 <=> v236(VarCurr,bitIndex3) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_3,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v239(VarCurr)
% 32.24/32.01 <=> ( v236(VarCurr,bitIndex2)
% 32.24/32.01 | v240(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_10,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v240(VarCurr)
% 32.24/32.01 <=> ( v241(VarCurr)
% 32.24/32.01 & v244(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_4,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v244(VarCurr)
% 32.24/32.01 <=> v236(VarCurr,bitIndex2) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_2,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v241(VarCurr)
% 32.24/32.01 <=> ( v236(VarCurr,bitIndex1)
% 32.24/32.01 | v242(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_9,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v242(VarCurr)
% 32.24/32.01 <=> ( v236(VarCurr,bitIndex0)
% 32.24/32.01 & v243(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_3,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v243(VarCurr)
% 32.24/32.01 <=> v236(VarCurr,bitIndex1) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addZeroExtensionConstraint,axiom,
% 32.24/32.01 ! [VarCurr] : ~ v236(VarCurr,bitIndex4) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_38,axiom,
% 32.24/32.01 ! [VarCurr,B] :
% 32.24/32.01 ( range_3_0(B)
% 32.24/32.01 => ( v236(VarCurr,B)
% 32.24/32.01 <=> v109(VarCurr,B) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addBitVectorEqualityBitBlasted_8,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v228(VarCurr)
% 32.24/32.01 <=> ( ( v109(VarCurr,bitIndex3)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v109(VarCurr,bitIndex2)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v109(VarCurr,bitIndex1)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v109(VarCurr,bitIndex0)
% 32.24/32.01 <=> $false ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addBitVectorEqualityBitBlasted_7,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v225(VarCurr)
% 32.24/32.01 <=> ( ( v226(VarCurr,bitIndex1)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v226(VarCurr,bitIndex0)
% 32.24/32.01 <=> $true ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_50,axiom,
% 32.24/32.01 ~ b01(bitIndex1) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_49,axiom,
% 32.24/32.01 b01(bitIndex0) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_37,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v226(VarCurr,bitIndex0)
% 32.24/32.01 <=> v23(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_36,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v226(VarCurr,bitIndex1)
% 32.24/32.01 <=> v113(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignmentInitValueVector_3,axiom,
% 32.24/32.01 ! [B] :
% 32.24/32.01 ( range_3_0(B)
% 32.24/32.01 => ( v109(constB0,B)
% 32.24/32.01 <=> $false ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addBitVectorEqualityBitBlasted_6,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v223(VarCurr)
% 32.24/32.01 <=> ( ( v224(VarCurr,bitIndex1)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v224(VarCurr,bitIndex0)
% 32.24/32.01 <=> $false ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_48,axiom,
% 32.24/32.01 ~ b00(bitIndex1) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_47,axiom,
% 32.24/32.01 ~ b00(bitIndex0) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_35,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v224(VarCurr,bitIndex0)
% 32.24/32.01 <=> v23(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_34,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v224(VarCurr,bitIndex1)
% 32.24/32.01 <=> v113(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_33,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v113(VarCurr)
% 32.24/32.01 <=> v115(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_32,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v115(VarCurr)
% 32.24/32.01 <=> v117(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_31,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v117(VarCurr)
% 32.24/32.01 <=> v119(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_30,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v119(VarCurr)
% 32.24/32.01 <=> v121(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addCaseBooleanConditionEqualRanges1,axiom,
% 32.24/32.01 ! [VarNext,VarCurr] :
% 32.24/32.01 ( nextState(VarCurr,VarNext)
% 32.24/32.01 => ( ~ v200(VarNext)
% 32.24/32.01 => ( v121(VarNext)
% 32.24/32.01 <=> v121(VarCurr) ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addCaseBooleanConditionEqualRanges0,axiom,
% 32.24/32.01 ! [VarNext] :
% 32.24/32.01 ( v200(VarNext)
% 32.24/32.01 => ( v121(VarNext)
% 32.24/32.01 <=> v210(VarNext) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_29,axiom,
% 32.24/32.01 ! [VarNext,VarCurr] :
% 32.24/32.01 ( nextState(VarCurr,VarNext)
% 32.24/32.01 => ( v210(VarNext)
% 32.24/32.01 <=> v208(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(aaddConditionBooleanCondEqualRangesElseBranch_1,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v211(VarCurr)
% 32.24/32.01 => ( v208(VarCurr)
% 32.24/32.01 <=> v127(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addConditionBooleanCondEqualRangesThenBranch_1,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v211(VarCurr)
% 32.24/32.01 => ( v208(VarCurr)
% 32.24/32.01 <=> $false ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_2,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v211(VarCurr)
% 32.24/32.01 <=> v123(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_8,axiom,
% 32.24/32.01 ! [VarNext,VarCurr] :
% 32.24/32.01 ( nextState(VarCurr,VarNext)
% 32.24/32.01 => ( v200(VarNext)
% 32.24/32.01 <=> v201(VarNext) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_7,axiom,
% 32.24/32.01 ! [VarNext,VarCurr] :
% 32.24/32.01 ( nextState(VarCurr,VarNext)
% 32.24/32.01 => ( v201(VarNext)
% 32.24/32.01 <=> ( v202(VarNext)
% 32.24/32.01 & v193(VarNext) ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator_1,axiom,
% 32.24/32.01 ! [VarNext,VarCurr] :
% 32.24/32.01 ( nextState(VarCurr,VarNext)
% 32.24/32.01 => ( ~ v202(VarNext)
% 32.24/32.01 <=> v204(VarNext) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_28,axiom,
% 32.24/32.01 ! [VarNext,VarCurr] :
% 32.24/32.01 ( nextState(VarCurr,VarNext)
% 32.24/32.01 => ( v204(VarNext)
% 32.24/32.01 <=> v193(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_27,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v193(VarCurr)
% 32.24/32.01 <=> v195(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_26,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v195(VarCurr)
% 32.24/32.01 <=> v197(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_25,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v197(VarCurr)
% 32.24/32.01 <=> v1(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_6,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v127(VarCurr)
% 32.24/32.01 <=> ( v190(VarCurr)
% 32.24/32.01 & v178(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_5,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v190(VarCurr)
% 32.24/32.01 <=> ( v191(VarCurr)
% 32.24/32.01 & v139(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeUnaryOperator,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v191(VarCurr)
% 32.24/32.01 <=> v129(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_24,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v178(VarCurr)
% 32.24/32.01 <=> v180(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_23,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v180(VarCurr)
% 32.24/32.01 <=> v182(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges_1,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v182(VarCurr)
% 32.24/32.01 <=> ( v187(VarCurr)
% 32.24/32.01 | v184(VarCurr,bitIndex2) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorShiftedRanges,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v187(VarCurr)
% 32.24/32.01 <=> ( v184(VarCurr,bitIndex0)
% 32.24/32.01 | v184(VarCurr,bitIndex1) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignmentInitValueVector_2,axiom,
% 32.24/32.01 ! [B] :
% 32.24/32.01 ( range_2_0(B)
% 32.24/32.01 => ( v184(constB0,B)
% 32.24/32.01 <=> $true ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(range_axiom_4,axiom,
% 32.24/32.01 ! [B] :
% 32.24/32.01 ( range_2_0(B)
% 32.24/32.01 <=> ( $false
% 32.24/32.01 | bitIndex0 = B
% 32.24/32.01 | bitIndex1 = B
% 32.24/32.01 | bitIndex2 = B ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_46,axiom,
% 32.24/32.01 b111(bitIndex2) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_45,axiom,
% 32.24/32.01 b111(bitIndex1) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_44,axiom,
% 32.24/32.01 b111(bitIndex0) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_22,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v139(VarCurr)
% 32.24/32.01 <=> v141(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_21,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v141(VarCurr)
% 32.24/32.01 <=> v143(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(aaddConditionBooleanCondEqualRangesElseBranch,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ~ v167(VarCurr)
% 32.24/32.01 => ( v143(VarCurr)
% 32.24/32.01 <=> $false ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addConditionBooleanCondEqualRangesThenBranch,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v167(VarCurr)
% 32.24/32.01 => ( v143(VarCurr)
% 32.24/32.01 <=> $true ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_4,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v167(VarCurr)
% 32.24/32.01 <=> ( v168(VarCurr)
% 32.24/32.01 | v176(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addBitVectorEqualityBitBlasted_5,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v176(VarCurr)
% 32.24/32.01 <=> ( ( v158(VarCurr,bitIndex6)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v158(VarCurr,bitIndex5)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v158(VarCurr,bitIndex4)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v158(VarCurr,bitIndex3)
% 32.24/32.01 <=> $true )
% 32.24/32.01 & ( v158(VarCurr,bitIndex2)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v158(VarCurr,bitIndex1)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v158(VarCurr,bitIndex0)
% 32.24/32.01 <=> $true ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_43,axiom,
% 32.24/32.01 ~ b0001001(bitIndex6) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_42,axiom,
% 32.24/32.01 ~ b0001001(bitIndex5) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_41,axiom,
% 32.24/32.01 ~ b0001001(bitIndex4) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_40,axiom,
% 32.24/32.01 b0001001(bitIndex3) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_39,axiom,
% 32.24/32.01 ~ b0001001(bitIndex2) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_38,axiom,
% 32.24/32.01 ~ b0001001(bitIndex1) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_37,axiom,
% 32.24/32.01 b0001001(bitIndex0) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_3,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v168(VarCurr)
% 32.24/32.01 <=> ( v169(VarCurr)
% 32.24/32.01 | v173(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_2,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v173(VarCurr)
% 32.24/32.01 <=> ( v174(VarCurr)
% 32.24/32.01 | v175(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addBitVectorEqualityBitBlasted_4,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v175(VarCurr)
% 32.24/32.01 <=> ( ( v158(VarCurr,bitIndex6)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v158(VarCurr,bitIndex5)
% 32.24/32.01 <=> $true )
% 32.24/32.01 & ( v158(VarCurr,bitIndex4)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v158(VarCurr,bitIndex3)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v158(VarCurr,bitIndex2)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v158(VarCurr,bitIndex1)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v158(VarCurr,bitIndex0)
% 32.24/32.01 <=> $true ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_36,axiom,
% 32.24/32.01 ~ b0100001(bitIndex6) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_35,axiom,
% 32.24/32.01 b0100001(bitIndex5) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_34,axiom,
% 32.24/32.01 ~ b0100001(bitIndex4) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_33,axiom,
% 32.24/32.01 ~ b0100001(bitIndex3) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_32,axiom,
% 32.24/32.01 ~ b0100001(bitIndex2) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_31,axiom,
% 32.24/32.01 ~ b0100001(bitIndex1) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_30,axiom,
% 32.24/32.01 b0100001(bitIndex0) ).
% 32.24/32.01
% 32.24/32.01 fof(addBitVectorEqualityBitBlasted_3,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v174(VarCurr)
% 32.24/32.01 <=> ( ( v158(VarCurr,bitIndex6)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v158(VarCurr,bitIndex5)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v158(VarCurr,bitIndex4)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v158(VarCurr,bitIndex3)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v158(VarCurr,bitIndex2)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v158(VarCurr,bitIndex1)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v158(VarCurr,bitIndex0)
% 32.24/32.01 <=> $true ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_29,axiom,
% 32.24/32.01 ~ b0000001(bitIndex6) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_28,axiom,
% 32.24/32.01 ~ b0000001(bitIndex5) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_27,axiom,
% 32.24/32.01 ~ b0000001(bitIndex4) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_26,axiom,
% 32.24/32.01 ~ b0000001(bitIndex3) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_25,axiom,
% 32.24/32.01 ~ b0000001(bitIndex2) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_24,axiom,
% 32.24/32.01 ~ b0000001(bitIndex1) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_23,axiom,
% 32.24/32.01 b0000001(bitIndex0) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits_1,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v169(VarCurr)
% 32.24/32.01 <=> ( v145(VarCurr,bitIndex0)
% 32.24/32.01 & v170(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(writeBinaryOperatorEqualRangesSingleBits,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v170(VarCurr)
% 32.24/32.01 <=> ( v171(VarCurr)
% 32.24/32.01 | v172(VarCurr) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addBitVectorEqualityBitBlasted_2,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v172(VarCurr)
% 32.24/32.01 <=> ( ( v158(VarCurr,bitIndex6)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v158(VarCurr,bitIndex5)
% 32.24/32.01 <=> $true )
% 32.24/32.01 & ( v158(VarCurr,bitIndex4)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v158(VarCurr,bitIndex3)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v158(VarCurr,bitIndex2)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v158(VarCurr,bitIndex1)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v158(VarCurr,bitIndex0)
% 32.24/32.01 <=> $false ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_22,axiom,
% 32.24/32.01 ~ b0100000(bitIndex6) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_21,axiom,
% 32.24/32.01 b0100000(bitIndex5) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_20,axiom,
% 32.24/32.01 ~ b0100000(bitIndex4) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_19,axiom,
% 32.24/32.01 ~ b0100000(bitIndex3) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_18,axiom,
% 32.24/32.01 ~ b0100000(bitIndex2) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_17,axiom,
% 32.24/32.01 ~ b0100000(bitIndex1) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_16,axiom,
% 32.24/32.01 ~ b0100000(bitIndex0) ).
% 32.24/32.01
% 32.24/32.01 fof(addBitVectorEqualityBitBlasted_1,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v171(VarCurr)
% 32.24/32.01 <=> ( ( v158(VarCurr,bitIndex6)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v158(VarCurr,bitIndex5)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v158(VarCurr,bitIndex4)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v158(VarCurr,bitIndex3)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v158(VarCurr,bitIndex2)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v158(VarCurr,bitIndex1)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v158(VarCurr,bitIndex0)
% 32.24/32.01 <=> $false ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_15,axiom,
% 32.24/32.01 ~ b0000000(bitIndex6) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_14,axiom,
% 32.24/32.01 ~ b0000000(bitIndex5) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_13,axiom,
% 32.24/32.01 ~ b0000000(bitIndex4) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_12,axiom,
% 32.24/32.01 ~ b0000000(bitIndex3) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_11,axiom,
% 32.24/32.01 ~ b0000000(bitIndex2) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_10,axiom,
% 32.24/32.01 ~ b0000000(bitIndex1) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_9,axiom,
% 32.24/32.01 ~ b0000000(bitIndex0) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_20,axiom,
% 32.24/32.01 ! [VarCurr,B] :
% 32.24/32.01 ( range_6_0(B)
% 32.24/32.01 => ( v158(VarCurr,B)
% 32.24/32.01 <=> v160(VarCurr,B) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(range_axiom_3,axiom,
% 32.24/32.01 ! [B] :
% 32.24/32.01 ( range_6_0(B)
% 32.24/32.01 <=> ( $false
% 32.24/32.01 | bitIndex0 = B
% 32.24/32.01 | bitIndex1 = B
% 32.24/32.01 | bitIndex2 = B
% 32.24/32.01 | bitIndex3 = B
% 32.24/32.01 | bitIndex4 = B
% 32.24/32.01 | bitIndex5 = B
% 32.24/32.01 | bitIndex6 = B ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_19,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( ( v160(VarCurr,bitIndex6)
% 32.24/32.01 <=> v149(VarCurr,bitIndex60) )
% 32.24/32.01 & ( v160(VarCurr,bitIndex5)
% 32.24/32.01 <=> v149(VarCurr,bitIndex59) )
% 32.24/32.01 & ( v160(VarCurr,bitIndex4)
% 32.24/32.01 <=> v149(VarCurr,bitIndex58) )
% 32.24/32.01 & ( v160(VarCurr,bitIndex3)
% 32.24/32.01 <=> v149(VarCurr,bitIndex57) )
% 32.24/32.01 & ( v160(VarCurr,bitIndex2)
% 32.24/32.01 <=> v149(VarCurr,bitIndex56) )
% 32.24/32.01 & ( v160(VarCurr,bitIndex1)
% 32.24/32.01 <=> v149(VarCurr,bitIndex55) )
% 32.24/32.01 & ( v160(VarCurr,bitIndex0)
% 32.24/32.01 <=> v149(VarCurr,bitIndex54) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_18,axiom,
% 32.24/32.01 ! [VarCurr,B] :
% 32.24/32.01 ( range_60_54(B)
% 32.24/32.01 => ( v149(VarCurr,B)
% 32.24/32.01 <=> v151(VarCurr,B) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_17,axiom,
% 32.24/32.01 ! [VarCurr,B] :
% 32.24/32.01 ( range_60_54(B)
% 32.24/32.01 => ( v151(VarCurr,B)
% 32.24/32.01 <=> v156(VarCurr,B) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(range_axiom_2,axiom,
% 32.24/32.01 ! [B] :
% 32.24/32.01 ( range_60_54(B)
% 32.24/32.01 <=> ( $false
% 32.24/32.01 | bitIndex54 = B
% 32.24/32.01 | bitIndex55 = B
% 32.24/32.01 | bitIndex56 = B
% 32.24/32.01 | bitIndex57 = B
% 32.24/32.01 | bitIndex58 = B
% 32.24/32.01 | bitIndex59 = B
% 32.24/32.01 | bitIndex60 = B ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_16,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v145(VarCurr,bitIndex0)
% 32.24/32.01 <=> v147(VarCurr,bitIndex0) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_15,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v147(VarCurr,bitIndex0)
% 32.24/32.01 <=> v149(VarCurr,bitIndex12) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_14,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v149(VarCurr,bitIndex12)
% 32.24/32.01 <=> v151(VarCurr,bitIndex12) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_13,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v151(VarCurr,bitIndex12)
% 32.24/32.01 <=> v156(VarCurr,bitIndex12) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignmentInitValueVector_1,axiom,
% 32.24/32.01 ! [B] :
% 32.24/32.01 ( range_3_0(B)
% 32.24/32.01 => ( v155(constB0,B)
% 32.24/32.01 <=> $false ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(range_axiom_1,axiom,
% 32.24/32.01 ! [B] :
% 32.24/32.01 ( range_3_0(B)
% 32.24/32.01 <=> ( $false
% 32.24/32.01 | bitIndex0 = B
% 32.24/32.01 | bitIndex1 = B
% 32.24/32.01 | bitIndex2 = B
% 32.24/32.01 | bitIndex3 = B ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_8,axiom,
% 32.24/32.01 ~ b0000(bitIndex3) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_7,axiom,
% 32.24/32.01 ~ b0000(bitIndex2) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_6,axiom,
% 32.24/32.01 ~ b0000(bitIndex1) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_5,axiom,
% 32.24/32.01 ~ b0000(bitIndex0) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_12,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v129(VarCurr)
% 32.24/32.01 <=> v131(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_11,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v131(VarCurr)
% 32.24/32.01 <=> v133(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addBitVectorEqualityBitBlasted,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v133(VarCurr)
% 32.24/32.01 <=> ( ( v135(VarCurr,bitIndex4)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v135(VarCurr,bitIndex3)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v135(VarCurr,bitIndex2)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v135(VarCurr,bitIndex1)
% 32.24/32.01 <=> $false )
% 32.24/32.01 & ( v135(VarCurr,bitIndex0)
% 32.24/32.01 <=> $false ) ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignmentInitValueVector,axiom,
% 32.24/32.01 ! [B] :
% 32.24/32.01 ( range_4_0(B)
% 32.24/32.01 => ( v135(constB0,B)
% 32.24/32.01 <=> $false ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(range_axiom,axiom,
% 32.24/32.01 ! [B] :
% 32.24/32.01 ( range_4_0(B)
% 32.24/32.01 <=> ( $false
% 32.24/32.01 | bitIndex0 = B
% 32.24/32.01 | bitIndex1 = B
% 32.24/32.01 | bitIndex2 = B
% 32.24/32.01 | bitIndex3 = B
% 32.24/32.01 | bitIndex4 = B ) ) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_4,axiom,
% 32.24/32.01 ~ b00000(bitIndex4) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_3,axiom,
% 32.24/32.01 ~ b00000(bitIndex3) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_2,axiom,
% 32.24/32.01 ~ b00000(bitIndex2) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant_1,axiom,
% 32.24/32.01 ~ b00000(bitIndex1) ).
% 32.24/32.01
% 32.24/32.01 fof(bitBlastConstant,axiom,
% 32.24/32.01 ~ b00000(bitIndex0) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_10,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v123(VarCurr)
% 32.24/32.01 <=> v125(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_9,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v125(VarCurr)
% 32.24/32.01 <=> v14(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_8,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v58(VarCurr)
% 32.24/32.01 <=> v60(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_7,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v60(VarCurr)
% 32.24/32.01 <=> v62(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_6,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v62(VarCurr)
% 32.24/32.01 <=> v64(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_5,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v64(VarCurr)
% 32.24/32.01 <=> v16(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_4,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v33(VarCurr)
% 32.24/32.01 <=> v12(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_3,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v10(VarCurr)
% 32.24/32.01 <=> v12(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_2,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v12(VarCurr)
% 32.24/32.01 <=> v14(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment_1,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v14(VarCurr)
% 32.24/32.01 <=> v16(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 fof(addAssignment,axiom,
% 32.24/32.01 ! [VarCurr] :
% 32.24/32.01 ( v16(VarCurr)
% 32.24/32.01 <=> v18(VarCurr) ) ).
% 32.24/32.01
% 32.24/32.01 %------------------------------------------------------------------------------
% 32.24/32.01 %-------------------------------------------
% 32.24/32.01 % Proof found
% 32.24/32.01 % SZS status Theorem for theBenchmark
% 32.24/32.01 % SZS output start Proof
% 32.24/32.02 %ClaNum:17913(EqnAxiom:3184)
% 32.24/32.02 %VarNum:34788(SingletonVarNum:15632)
% 32.24/32.02 %MaxLitNum:26
% 32.24/32.02 %MaxfuncDepth:0
% 32.24/32.02 %SharedTerms:1098
% 32.24/32.02 %goalClause: 3206 3653
% 32.24/32.02 %singleGoalClaCount:2
% 32.24/32.02 [3185]P1(a1)
% 32.24/32.02 [3186]P1(a104)
% 32.24/32.02 [3187]P1(a2)
% 32.24/32.02 [3188]P1(a3)
% 32.24/32.02 [3189]P1(a4)
% 32.24/32.02 [3190]P1(a5)
% 32.24/32.02 [3191]P1(a6)
% 32.24/32.02 [3192]P1(a7)
% 32.24/32.02 [3193]P1(a8)
% 32.24/32.02 [3194]P1(a9)
% 32.24/32.02 [3195]P1(a93)
% 32.24/32.02 [3196]P1(a94)
% 32.24/32.02 [3197]P1(a95)
% 32.24/32.02 [3198]P1(a96)
% 32.24/32.02 [3199]P1(a97)
% 32.24/32.02 [3200]P1(a98)
% 32.24/32.02 [3201]P1(a99)
% 32.24/32.02 [3202]P1(a100)
% 32.24/32.02 [3203]P1(a101)
% 32.24/32.02 [3204]P1(a102)
% 32.24/32.02 [3205]P1(a103)
% 32.24/32.02 [3206]P1(a105)
% 32.24/32.02 [3207]P2(a106)
% 32.24/32.02 [3208]P2(a107)
% 32.24/32.02 [3209]P2(a108)
% 32.24/32.02 [3210]P2(a109)
% 32.24/32.02 [3211]P2(a110)
% 32.24/32.02 [3212]P2(a111)
% 32.24/32.02 [3213]P2(a112)
% 32.24/32.02 [3214]P2(a113)
% 32.24/32.02 [3215]P2(a114)
% 32.24/32.02 [3216]P2(a115)
% 32.24/32.02 [3217]P2(a116)
% 32.24/32.02 [3218]P2(a120)
% 32.24/32.02 [3219]P2(a121)
% 32.24/32.02 [3220]P2(a122)
% 32.24/32.02 [3221]P2(a123)
% 32.24/32.02 [3222]P2(a124)
% 32.24/32.02 [3223]P2(a125)
% 32.24/32.02 [3224]P2(a126)
% 32.24/32.02 [3225]P2(a119)
% 32.24/32.02 [3226]P2(a117)
% 32.24/32.02 [3227]P2(a118)
% 32.24/32.02 [3228]P2(a127)
% 32.24/32.02 [3229]P2(a128)
% 32.24/32.02 [3230]P2(a129)
% 32.24/32.02 [3231]P2(a130)
% 32.24/32.02 [3232]P2(a131)
% 32.24/32.02 [3233]P2(a132)
% 32.24/32.02 [3234]P2(a133)
% 32.24/32.02 [3235]P2(a134)
% 32.24/32.02 [3236]P2(a135)
% 32.24/32.02 [3237]P2(a136)
% 32.24/32.02 [3238]P2(a137)
% 32.24/32.02 [3239]P2(a183)
% 32.24/32.02 [3240]P2(a184)
% 32.24/32.02 [3241]P2(a185)
% 32.24/32.02 [3242]P2(a186)
% 32.24/32.02 [3243]P2(a187)
% 32.24/32.02 [3244]P2(a188)
% 32.24/32.02 [3245]P2(a189)
% 32.24/32.02 [3246]P2(a182)
% 32.24/32.02 [3247]P2(a138)
% 32.24/32.02 [3248]P2(a139)
% 32.24/32.02 [3249]P2(a140)
% 32.24/32.02 [3250]P2(a141)
% 32.24/32.02 [3251]P2(a142)
% 32.24/32.02 [3252]P2(a143)
% 32.24/32.02 [3253]P2(a144)
% 32.24/32.02 [3254]P2(a145)
% 32.24/32.02 [3255]P2(a146)
% 32.24/32.02 [3256]P2(a147)
% 32.24/32.02 [3257]P2(a148)
% 32.24/32.02 [3258]P2(a149)
% 32.24/32.02 [3259]P2(a150)
% 32.24/32.02 [3260]P2(a175)
% 32.24/32.02 [3261]P2(a176)
% 32.24/32.02 [3262]P2(a177)
% 32.24/32.02 [3263]P2(a178)
% 32.24/32.02 [3264]P2(a179)
% 32.24/32.02 [3265]P2(a180)
% 32.24/32.02 [3266]P2(a181)
% 32.24/32.02 [3267]P2(a174)
% 32.24/32.02 [3268]P2(a151)
% 32.24/32.02 [3269]P2(a152)
% 32.24/32.02 [3270]P2(a10)
% 32.24/32.02 [3271]P2(a11)
% 32.24/32.02 [3272]P2(a12)
% 32.24/32.02 [3273]P2(a13)
% 32.24/32.02 [3274]P2(a14)
% 32.24/32.02 [3275]P2(a15)
% 32.24/32.02 [3276]P2(a16)
% 32.24/32.02 [3277]P2(a17)
% 32.24/32.02 [3278]P2(a18)
% 32.24/32.02 [3279]P2(a19)
% 32.24/32.02 [3280]P2(a20)
% 32.24/32.02 [3281]P2(a25)
% 32.24/32.02 [3282]P2(a153)
% 32.24/32.02 [3283]P2(a154)
% 32.24/32.02 [3284]P2(a155)
% 32.24/32.02 [3285]P2(a156)
% 32.24/32.02 [3286]P2(a157)
% 32.24/32.02 [3287]P2(a158)
% 32.24/32.02 [3288]P2(a159)
% 32.24/32.02 [3289]P2(a160)
% 32.24/32.02 [3290]P2(a161)
% 32.24/32.02 [3291]P2(a162)
% 32.24/32.02 [3292]P2(a163)
% 32.24/32.02 [3293]P2(a167)
% 32.24/32.02 [3294]P2(a168)
% 32.24/32.02 [3295]P2(a169)
% 32.24/32.02 [3296]P2(a170)
% 32.24/32.02 [3297]P2(a171)
% 32.24/32.02 [3298]P2(a172)
% 32.24/32.02 [3299]P2(a173)
% 32.24/32.02 [3300]P2(a166)
% 32.24/32.02 [3301]P2(a164)
% 32.24/32.02 [3302]P2(a165)
% 32.24/32.02 [3303]P2(a23)
% 32.24/32.02 [3304]P2(a21)
% 32.24/32.02 [3305]P2(a24)
% 32.24/32.02 [3306]P2(a22)
% 32.24/32.02 [3307]P3(a26)
% 32.24/32.02 [3308]P3(a26)
% 32.24/32.02 [3309]P3(a28)
% 32.24/32.02 [3310]P3(a28)
% 32.24/32.02 [3311]P3(a39)
% 32.24/32.02 [3312]P3(a39)
% 32.24/32.02 [3313]P4(a27)
% 32.24/32.02 [3314]P4(a27)
% 32.24/32.02 [3315]P4(a28)
% 32.24/32.02 [3316]P4(a28)
% 32.24/32.02 [3317]P4(a39)
% 32.24/32.02 [3318]P4(a39)
% 32.24/32.02 [3319]P5(a28)
% 32.24/32.02 [3320]P5(a28)
% 32.24/32.02 [3321]P5(a39)
% 32.24/32.02 [3322]P5(a39)
% 32.24/32.02 [3323]P6(a27)
% 32.24/32.02 [3324]P6(a27)
% 32.24/32.02 [3325]P6(a26)
% 32.24/32.02 [3326]P6(a26)
% 32.24/32.02 [3327]P6(a39)
% 32.24/32.02 [3328]P6(a39)
% 32.24/32.02 [3329]P7(a26)
% 32.24/32.02 [3330]P7(a26)
% 32.24/32.02 [3331]P7(a39)
% 32.24/32.02 [3332]P7(a39)
% 32.24/32.02 [3333]P8(a27)
% 32.24/32.02 [3334]P8(a27)
% 32.24/32.02 [3335]P8(a39)
% 32.24/32.02 [3336]P8(a39)
% 32.24/32.02 [3337]P9(a39)
% 32.24/32.02 [3338]P9(a39)
% 32.24/32.02 [3339]P10(a27)
% 32.24/32.02 [3340]P10(a27)
% 32.24/32.02 [3341]P10(a26)
% 32.24/32.02 [3342]P10(a26)
% 32.24/32.02 [3343]P10(a28)
% 32.24/32.02 [3344]P10(a28)
% 32.24/32.02 [3345]P11(a28)
% 32.24/32.02 [3346]P11(a28)
% 32.24/32.02 [3347]P12(a27)
% 32.24/32.02 [3348]P12(a27)
% 32.24/32.02 [3349]P12(a26)
% 32.24/32.02 [3350]P12(a26)
% 32.24/32.02 [3351]P13(a26)
% 32.24/32.02 [3352]P13(a26)
% 32.24/32.02 [3353]P55(a27)
% 32.24/32.02 [3354]P55(a26)
% 32.24/32.02 [3355]P55(a28)
% 32.24/32.02 [3356]P55(a39)
% 32.24/32.02 [3357]P39(a27)
% 32.24/32.02 [3358]P39(a28)
% 32.24/32.02 [3359]P14(a27)
% 32.24/32.02 [3360]P42(a26)
% 32.24/32.02 [3361]P42(a28)
% 32.24/32.02 [3362]P48(a27)
% 32.24/32.02 [3363]P48(a28)
% 32.24/32.02 [3364]P37(a27)
% 32.24/32.02 [3365]P147(a9)
% 32.24/32.02 [3366]P148(a9)
% 32.24/32.02 [3367]P149(a9)
% 32.24/32.02 [3368]P150(a9)
% 32.24/32.02 [3369]P151(a9)
% 32.24/32.02 [3370]P152(a9)
% 32.24/32.02 [3371]P153(a9)
% 32.24/32.02 [3372]P154(a9)
% 32.24/32.02 [3373]P46(a50)
% 32.24/32.02 [3374]P43(a26)
% 32.24/32.02 [3375]P57(a27)
% 32.24/32.02 [3376]P57(a26)
% 32.24/32.02 [3377]P57(a28)
% 32.24/32.02 [3378]P57(a39)
% 32.24/32.02 [3379]P57(a50)
% 32.24/32.02 [3380]P49(a26)
% 32.24/32.02 [3381]P49(a39)
% 32.24/32.02 [3382]P49(a61)
% 32.24/32.02 [3383]P58(a26)
% 32.24/32.02 [3384]P58(a39)
% 32.24/32.02 [3385]P58(a62)
% 32.24/32.02 [3386]P58(a50)
% 32.24/32.02 [3387]P58(a61)
% 32.24/32.02 [3388]P56(a62)
% 32.24/32.02 [3389]P56(a50)
% 32.24/32.02 [3390]P56(a61)
% 32.24/32.02 [3391]P50(a50)
% 32.24/32.02 [3392]P50(a61)
% 32.24/32.02 [3393]P59(a39)
% 32.24/32.02 [3394]P59(a62)
% 32.24/32.02 [3395]P59(a50)
% 32.24/32.02 [3396]P59(a61)
% 32.24/32.02 [3397]P51(a39)
% 32.24/32.02 [3398]P51(a50)
% 32.24/32.02 [3399]P51(a61)
% 32.24/32.02 [3400]P53(a62)
% 32.24/32.02 [3401]P53(a61)
% 32.24/32.02 [3402]P47(a61)
% 32.24/32.02 [3403]P34(a26)
% 32.24/32.02 [3404]P34(a39)
% 32.24/32.02 [3405]P60(a27)
% 32.24/32.02 [3406]P60(a26)
% 32.24/32.02 [3407]P60(a28)
% 32.24/32.02 [3408]P60(a39)
% 32.24/32.02 [3409]P60(a62)
% 32.24/32.02 [3410]P60(a50)
% 32.24/32.02 [3411]P60(a83)
% 32.24/32.02 [3412]P60(a61)
% 32.24/32.02 [3413]P61(a27)
% 32.24/32.02 [3414]P61(a26)
% 32.24/32.02 [3415]P61(a28)
% 32.24/32.02 [3416]P61(a39)
% 32.24/32.02 [3417]P61(a62)
% 32.24/32.02 [3418]P61(a50)
% 32.24/32.02 [3419]P61(a83)
% 32.24/32.02 [3420]P61(a61)
% 32.24/32.02 [3421]P61(a29)
% 32.24/32.02 [3422]P61(a30)
% 32.24/32.02 [3423]P61(a91)
% 32.24/32.02 [3424]P61(a92)
% 32.24/32.02 [3425]P61(a31)
% 32.24/32.02 [3426]P61(a32)
% 32.24/32.02 [3427]P61(a33)
% 32.24/32.02 [3428]P61(a34)
% 32.24/32.02 [3429]P61(a35)
% 32.24/32.02 [3430]P61(a36)
% 32.24/32.02 [3431]P61(a37)
% 32.24/32.02 [3432]P61(a38)
% 32.24/32.02 [3433]P61(a40)
% 32.24/32.02 [3434]P61(a41)
% 32.24/32.02 [3435]P61(a42)
% 32.24/32.02 [3436]P61(a43)
% 32.24/32.02 [3437]P61(a44)
% 32.24/32.02 [3438]P61(a45)
% 32.24/32.02 [3439]P61(a46)
% 32.24/32.02 [3440]P61(a47)
% 32.24/32.02 [3441]P61(a48)
% 32.24/32.02 [3442]P61(a49)
% 32.24/32.02 [3443]P61(a51)
% 32.24/32.02 [3444]P61(a52)
% 32.24/32.02 [3445]P62(a27)
% 32.24/32.02 [3446]P62(a26)
% 32.24/32.02 [3447]P62(a28)
% 32.24/32.02 [3448]P62(a39)
% 32.24/32.02 [3449]P62(a62)
% 32.24/32.02 [3450]P62(a50)
% 32.24/32.02 [3451]P62(a83)
% 32.24/32.02 [3452]P62(a61)
% 32.24/32.02 [3453]P62(a29)
% 32.24/32.02 [3454]P62(a30)
% 32.24/32.02 [3455]P62(a91)
% 32.24/32.02 [3456]P62(a92)
% 32.24/32.02 [3457]P62(a31)
% 32.24/32.02 [3458]P62(a32)
% 32.24/32.02 [3459]P62(a33)
% 32.24/32.02 [3460]P62(a34)
% 32.24/32.02 [3461]P36(a27)
% 32.24/32.02 [3462]P38(a26)
% 32.24/32.02 [3463]P45(a28)
% 32.24/32.02 [3464]P15(a27)
% 32.24/32.02 [3465]P15(a26)
% 32.24/32.02 [3466]P15(a30)
% 32.24/32.02 [3467]P15(a32)
% 32.24/32.02 [3468]P15(a33)
% 32.24/32.02 [3469]P15(a36)
% 32.24/32.02 [3470]P15(a37)
% 32.24/32.02 [3471]P15(a38)
% 32.24/32.02 [3472]P16(a27)
% 32.24/32.02 [3473]P16(a26)
% 32.24/32.02 [3474]P16(a30)
% 32.24/32.02 [3475]P16(a32)
% 32.24/32.02 [3476]P16(a33)
% 32.24/32.02 [3477]P16(a37)
% 32.24/32.02 [3478]P16(a38)
% 32.24/32.02 [3479]P155(a9)
% 32.24/32.02 [3480]P32(a27)
% 32.24/32.02 [3481]P44(a27)
% 32.24/32.02 [3482]P44(a26)
% 32.24/32.02 [3483]P44(a28)
% 32.24/32.02 [3484]P44(a39)
% 32.24/32.02 [3485]P52(a27)
% 32.24/32.02 [3486]P52(a26)
% 32.24/32.02 [3487]P54(a27)
% 32.24/32.02 [3488]P54(a26)
% 32.24/32.02 [3489]P54(a28)
% 32.24/32.02 [3490]P35(a27)
% 32.24/32.02 [3491]P35(a39)
% 32.24/32.02 [3492]P40(a27)
% 32.24/32.02 [3493]P40(a62)
% 32.24/32.02 [3494]P33(a27)
% 32.24/32.02 [3495]P41(a62)
% 32.24/32.02 [3496]P63(a1,a104)
% 32.24/32.02 [3497]P63(a2,a1)
% 32.24/32.02 [3498]P63(a3,a2)
% 32.24/32.02 [3499]P63(a4,a3)
% 32.24/32.02 [3500]P63(a5,a4)
% 32.24/32.02 [3501]P63(a6,a5)
% 32.24/32.02 [3502]P63(a7,a6)
% 32.24/32.02 [3503]P63(a8,a7)
% 32.24/32.02 [3504]P63(a9,a8)
% 32.24/32.02 [3505]P156(a1,a121)
% 32.24/32.02 [3506]P156(a104,a120)
% 32.24/32.02 [3507]P156(a2,a122)
% 32.24/32.02 [3508]P156(a3,a123)
% 32.24/32.02 [3509]P156(a4,a124)
% 32.24/32.02 [3510]P156(a5,a125)
% 32.24/32.02 [3511]P156(a6,a126)
% 32.24/32.02 [3512]P156(a7,a119)
% 32.24/32.02 [3513]P156(a8,a117)
% 32.24/32.02 [3514]P156(a9,a118)
% 32.24/32.02 [3515]P156(a93,a116)
% 32.24/32.02 [3516]P156(a94,a115)
% 32.24/32.02 [3517]P156(a95,a114)
% 32.24/32.02 [3518]P156(a96,a113)
% 32.24/32.02 [3519]P156(a97,a112)
% 32.24/32.02 [3520]P156(a98,a111)
% 32.24/32.02 [3521]P156(a99,a110)
% 32.24/32.02 [3522]P156(a100,a109)
% 32.24/32.02 [3523]P156(a101,a108)
% 32.24/32.02 [3524]P156(a102,a107)
% 32.24/32.02 [3525]P156(a103,a106)
% 32.24/32.02 [3526]P2016(a9,a27)
% 32.24/32.02 [3527]P2568(a1,a184)
% 32.24/32.02 [3528]P2568(a104,a183)
% 32.24/32.02 [3529]P2568(a2,a185)
% 32.24/32.02 [3530]P2568(a3,a186)
% 32.24/32.02 [3531]P2568(a4,a187)
% 32.24/32.02 [3532]P2568(a5,a188)
% 32.24/32.02 [3533]P2568(a6,a189)
% 32.24/32.02 [3534]P2568(a7,a182)
% 32.24/32.02 [3535]P2568(a8,a138)
% 32.24/32.02 [3536]P2568(a9,a139)
% 32.24/32.02 [3537]P2568(a93,a137)
% 32.24/32.02 [3538]P2568(a94,a136)
% 32.24/32.02 [3539]P2568(a95,a135)
% 32.24/32.02 [3540]P2568(a96,a134)
% 32.24/32.02 [3541]P2568(a97,a133)
% 32.24/32.02 [3542]P2568(a98,a132)
% 32.24/32.02 [3543]P2568(a99,a131)
% 32.24/32.02 [3544]P2568(a100,a130)
% 32.24/32.02 [3545]P2568(a101,a129)
% 32.24/32.02 [3546]P2568(a102,a128)
% 32.24/32.02 [3547]P2568(a103,a127)
% 32.24/32.02 [3548]P2017(a1,a176)
% 32.24/32.02 [3549]P2017(a104,a175)
% 32.24/32.02 [3550]P2017(a2,a177)
% 32.24/32.02 [3551]P2017(a3,a178)
% 32.24/32.02 [3552]P2017(a4,a179)
% 32.24/32.02 [3553]P2017(a5,a180)
% 32.24/32.02 [3554]P2017(a6,a181)
% 32.24/32.02 [3555]P2017(a7,a174)
% 32.24/32.02 [3556]P2017(a8,a151)
% 32.24/32.02 [3557]P2017(a9,a152)
% 32.24/32.02 [3558]P2017(a93,a150)
% 32.24/32.02 [3559]P2017(a94,a149)
% 32.24/32.02 [3560]P2017(a95,a148)
% 32.24/32.02 [3561]P2017(a96,a147)
% 32.24/32.02 [3562]P2017(a97,a146)
% 32.24/32.02 [3563]P2017(a98,a145)
% 32.24/32.02 [3564]P2017(a99,a144)
% 32.24/32.02 [3565]P2017(a100,a143)
% 32.24/32.02 [3566]P2017(a101,a142)
% 32.24/32.02 [3567]P2017(a102,a141)
% 32.24/32.02 [3568]P2017(a103,a140)
% 32.24/32.02 [3569]P2018(a9,a27)
% 32.24/32.02 [3570]P2471(a1,a168)
% 32.24/32.02 [3571]P2471(a104,a167)
% 32.24/32.02 [3572]P2471(a2,a169)
% 32.24/32.02 [3573]P2471(a3,a170)
% 32.24/32.02 [3574]P2471(a4,a171)
% 32.24/32.02 [3575]P2471(a5,a172)
% 32.24/32.02 [3576]P2471(a6,a173)
% 32.24/32.02 [3577]P2471(a7,a166)
% 32.24/32.02 [3578]P2471(a8,a164)
% 32.24/32.02 [3579]P2471(a9,a165)
% 32.24/32.02 [3580]P2471(a93,a163)
% 32.24/32.02 [3581]P2471(a94,a162)
% 32.24/32.02 [3582]P2471(a95,a161)
% 32.24/32.02 [3583]P2471(a96,a160)
% 32.24/32.02 [3584]P2471(a97,a159)
% 32.24/32.02 [3585]P2471(a98,a158)
% 32.24/32.02 [3586]P2471(a99,a157)
% 32.24/32.02 [3587]P2471(a100,a156)
% 32.24/32.02 [3588]P2471(a101,a155)
% 32.24/32.02 [3589]P2471(a102,a154)
% 32.24/32.02 [3590]P2471(a103,a153)
% 32.24/32.02 [3591]P902(a9,a27)
% 32.24/32.02 [3592]P1740(a9,a27)
% 32.24/32.02 [3593]P170(a9,a27)
% 32.24/32.02 [3594]P1814(a9,a27)
% 32.24/32.02 [3599]~P157(a9)
% 32.24/32.02 [3600]~P3(a27)
% 32.24/32.02 [3601]~P3(a27)
% 32.24/32.02 [3602]~P4(a26)
% 32.24/32.02 [3603]~P4(a26)
% 32.24/32.02 [3604]~P5(a27)
% 32.24/32.02 [3605]~P5(a27)
% 32.24/32.02 [3606]~P5(a26)
% 32.24/32.02 [3607]~P5(a26)
% 32.24/32.02 [3608]~P6(a28)
% 32.24/32.02 [3609]~P6(a28)
% 32.24/32.02 [3610]~P7(a27)
% 32.24/32.02 [3611]~P7(a27)
% 32.24/32.02 [3612]~P7(a28)
% 32.24/32.02 [3613]~P7(a28)
% 32.24/32.02 [3614]~P8(a26)
% 32.24/32.02 [3615]~P8(a26)
% 32.24/32.02 [3616]~P8(a28)
% 32.24/32.02 [3617]~P8(a28)
% 32.24/32.02 [3618]~P9(a27)
% 32.24/32.02 [3619]~P9(a27)
% 32.24/32.02 [3620]~P9(a26)
% 32.24/32.02 [3621]~P9(a26)
% 32.24/32.02 [3622]~P9(a28)
% 32.24/32.02 [3623]~P9(a28)
% 32.24/32.02 [3624]~P10(a39)
% 32.24/32.02 [3625]~P10(a39)
% 32.24/32.02 [3626]~P11(a27)
% 32.24/32.02 [3627]~P11(a27)
% 32.24/32.02 [3628]~P11(a26)
% 32.24/32.02 [3629]~P11(a26)
% 32.24/32.02 [3630]~P11(a39)
% 32.24/32.02 [3631]~P11(a39)
% 32.24/32.02 [3632]~P12(a28)
% 32.24/32.02 [3633]~P12(a28)
% 32.24/32.02 [3634]~P12(a39)
% 32.24/32.02 [3635]~P12(a39)
% 32.24/32.02 [3636]~P13(a27)
% 32.24/32.02 [3637]~P13(a27)
% 32.24/32.02 [3638]~P13(a28)
% 32.24/32.02 [3639]~P13(a28)
% 32.24/32.02 [3640]~P13(a39)
% 32.24/32.02 [3641]~P13(a39)
% 32.24/32.02 [3642]~P39(a26)
% 32.24/32.02 [3643]~P39(a39)
% 32.24/32.02 [3644]~P14(a26)
% 32.24/32.02 [3645]~P14(a28)
% 32.24/32.02 [3646]~P14(a39)
% 32.24/32.02 [3647]~P42(a27)
% 32.24/32.02 [3648]~P42(a39)
% 32.24/32.02 [3649]~P17(a27)
% 32.24/32.02 [3650]~P17(a26)
% 32.24/32.02 [3651]~P17(a28)
% 32.24/32.02 [3652]~P17(a39)
% 32.24/32.02 [3653]~P2149(a105)
% 32.24/32.02 [3654]~P18(a27)
% 32.24/32.02 [3655]~P18(a26)
% 32.24/32.02 [3656]~P18(a28)
% 32.24/32.02 [3657]~P48(a26)
% 32.24/32.02 [3658]~P37(a26)
% 32.24/32.02 [3659]~P2021(a9)
% 32.24/32.02 [3660]~P64(a61)
% 32.24/32.02 [3661]~P46(a27)
% 32.24/32.02 [3662]~P46(a26)
% 32.24/32.02 [3663]~P46(a28)
% 32.24/32.02 [3664]~P46(a39)
% 32.24/32.02 [3665]~P1782(a9)
% 32.24/32.02 [3666]~P43(a27)
% 32.24/32.02 [3667]~P49(a27)
% 32.24/32.02 [3668]~P49(a28)
% 32.24/32.02 [3669]~P49(a62)
% 32.24/32.02 [3670]~P49(a50)
% 32.24/32.02 [3671]~P58(a27)
% 32.24/32.02 [3672]~P58(a28)
% 32.24/32.02 [3673]~P56(a27)
% 32.24/32.02 [3674]~P56(a26)
% 32.24/32.02 [3675]~P56(a28)
% 32.24/32.02 [3676]~P56(a39)
% 32.24/32.02 [3677]~P50(a27)
% 32.24/32.02 [3678]~P50(a26)
% 32.24/32.02 [3679]~P50(a28)
% 32.24/32.02 [3680]~P50(a39)
% 32.24/32.02 [3681]~P50(a62)
% 32.24/32.02 [3682]~P59(a27)
% 32.24/32.02 [3683]~P59(a26)
% 32.24/32.02 [3684]~P59(a28)
% 32.24/32.02 [3685]~P51(a27)
% 32.24/32.02 [3686]~P51(a26)
% 32.24/32.02 [3687]~P51(a28)
% 32.24/32.02 [3688]~P51(a62)
% 32.24/32.02 [3689]~P53(a27)
% 32.24/32.02 [3690]~P53(a26)
% 32.24/32.02 [3691]~P53(a28)
% 32.24/32.02 [3692]~P53(a39)
% 32.24/32.02 [3693]~P53(a50)
% 32.24/32.02 [3694]~P47(a27)
% 32.24/32.02 [3695]~P47(a26)
% 32.24/32.02 [3696]~P47(a28)
% 32.24/32.02 [3697]~P47(a39)
% 32.24/32.02 [3698]~P47(a62)
% 32.24/32.02 [3699]~P47(a50)
% 32.24/32.02 [3700]~P980(a9)
% 32.24/32.02 [3701]~P34(a27)
% 32.24/32.02 [3702]~P34(a28)
% 32.24/32.02 [3703]~P34(a62)
% 32.24/32.02 [3704]~P34(a50)
% 32.24/32.02 [3705]~P34(a61)
% 32.24/32.02 [3706]~P22(a27)
% 32.24/32.02 [3707]~P22(a26)
% 32.24/32.02 [3708]~P22(a28)
% 32.24/32.02 [3709]~P22(a39)
% 32.24/32.02 [3710]~P22(a62)
% 32.24/32.02 [3711]~P22(a50)
% 32.24/32.02 [3712]~P22(a83)
% 32.24/32.02 [3713]~P22(a61)
% 32.24/32.02 [3714]~P22(a29)
% 32.24/32.02 [3715]~P22(a30)
% 32.24/32.02 [3716]~P22(a91)
% 32.24/32.02 [3717]~P22(a92)
% 32.24/32.02 [3718]~P22(a31)
% 32.24/32.02 [3719]~P22(a32)
% 32.24/32.02 [3720]~P22(a33)
% 32.24/32.02 [3721]~P22(a34)
% 32.24/32.02 [3722]~P23(a27)
% 32.24/32.02 [3723]~P23(a26)
% 32.24/32.02 [3724]~P23(a28)
% 32.24/32.02 [3725]~P23(a39)
% 32.24/32.02 [3726]~P23(a62)
% 32.24/32.02 [3727]~P23(a50)
% 32.24/32.02 [3728]~P23(a83)
% 32.24/32.02 [3729]~P23(a61)
% 32.24/32.02 [3730]~P65(a27)
% 32.24/32.02 [3731]~P65(a26)
% 32.24/32.02 [3732]~P65(a39)
% 32.24/32.02 [3733]~P65(a50)
% 32.24/32.02 [3734]~P65(a83)
% 32.24/32.02 [3735]~P65(a61)
% 32.24/32.02 [3736]~P65(a29)
% 32.24/32.02 [3737]~P65(a91)
% 32.24/32.02 [3738]~P1052(a9)
% 32.24/32.02 [3739]~P1053(a9)
% 32.24/32.02 [3740]~P1054(a9)
% 32.24/32.02 [3741]~P36(a26)
% 32.24/32.02 [3742]~P36(a28)
% 32.24/32.02 [3743]~P38(a27)
% 32.24/32.02 [3744]~P38(a28)
% 32.24/32.02 [3745]~P45(a27)
% 32.24/32.02 [3746]~P45(a26)
% 32.24/32.02 [3747]~P904(a9)
% 32.24/32.02 [3748]~P945(a9)
% 32.24/32.02 [3749]~P180(a9)
% 32.24/32.02 [3750]~P888(a9)
% 32.24/32.02 [3751]~P15(a28)
% 32.24/32.02 [3752]~P15(a39)
% 32.24/32.02 [3753]~P15(a62)
% 32.24/32.02 [3754]~P15(a50)
% 32.24/32.02 [3755]~P15(a83)
% 32.24/32.02 [3756]~P15(a61)
% 32.24/32.02 [3757]~P15(a29)
% 32.24/32.02 [3758]~P15(a91)
% 32.24/32.02 [3759]~P15(a92)
% 32.24/32.02 [3760]~P15(a31)
% 32.24/32.02 [3761]~P15(a34)
% 32.24/32.02 [3762]~P15(a35)
% 32.24/32.02 [3763]~P15(a40)
% 32.24/32.02 [3764]~P15(a41)
% 32.24/32.02 [3765]~P15(a42)
% 32.24/32.02 [3766]~P15(a43)
% 32.24/32.02 [3767]~P15(a44)
% 32.24/32.02 [3768]~P15(a45)
% 32.24/32.02 [3769]~P15(a46)
% 32.24/32.02 [3770]~P16(a28)
% 32.24/32.02 [3771]~P16(a39)
% 32.24/32.02 [3772]~P16(a62)
% 32.24/32.02 [3773]~P16(a50)
% 32.24/32.02 [3774]~P16(a83)
% 32.24/32.02 [3775]~P16(a61)
% 32.24/32.02 [3776]~P16(a29)
% 32.24/32.02 [3777]~P16(a91)
% 32.24/32.02 [3778]~P16(a92)
% 32.24/32.02 [3779]~P16(a31)
% 32.24/32.02 [3780]~P16(a34)
% 32.24/32.02 [3781]~P16(a35)
% 32.24/32.02 [3782]~P16(a36)
% 32.24/32.02 [3783]~P16(a40)
% 32.24/32.02 [3784]~P16(a41)
% 32.24/32.02 [3785]~P16(a42)
% 32.24/32.02 [3786]~P16(a43)
% 32.24/32.02 [3787]~P16(a44)
% 32.24/32.02 [3788]~P16(a45)
% 32.24/32.02 [3789]~P16(a46)
% 32.24/32.02 [3790]~P27(a27)
% 32.24/32.02 [3791]~P27(a26)
% 32.24/32.02 [3792]~P27(a28)
% 32.24/32.02 [3793]~P27(a39)
% 32.24/32.02 [3794]~P27(a62)
% 32.24/32.02 [3795]~P27(a50)
% 32.24/32.02 [3796]~P27(a83)
% 32.24/32.02 [3797]~P27(a61)
% 32.24/32.02 [3798]~P27(a29)
% 32.24/32.02 [3799]~P27(a30)
% 32.24/32.02 [3800]~P27(a91)
% 32.24/32.02 [3801]~P27(a92)
% 32.24/32.02 [3802]~P27(a31)
% 32.24/32.02 [3803]~P27(a32)
% 32.24/32.02 [3804]~P27(a33)
% 32.24/32.02 [3805]~P27(a34)
% 32.24/32.02 [3806]~P27(a35)
% 32.24/32.02 [3807]~P27(a36)
% 32.24/32.02 [3808]~P27(a37)
% 32.24/32.02 [3809]~P27(a38)
% 32.24/32.02 [3810]~P27(a40)
% 32.24/32.02 [3811]~P27(a41)
% 32.24/32.02 [3812]~P27(a42)
% 32.24/32.02 [3813]~P27(a43)
% 32.24/32.02 [3814]~P27(a44)
% 32.24/32.02 [3815]~P27(a45)
% 32.24/32.02 [3816]~P27(a46)
% 32.24/32.02 [3817]~P29(a27)
% 32.24/32.02 [3818]~P29(a26)
% 32.24/32.02 [3819]~P29(a28)
% 32.24/32.02 [3820]~P29(a39)
% 32.24/32.02 [3821]~P29(a62)
% 32.24/32.02 [3822]~P29(a50)
% 32.24/32.02 [3823]~P29(a83)
% 32.24/32.02 [3824]~P29(a61)
% 32.24/32.02 [3825]~P29(a29)
% 32.24/32.02 [3826]~P29(a30)
% 32.24/32.02 [3827]~P29(a91)
% 32.24/32.02 [3828]~P29(a92)
% 32.24/32.02 [3829]~P29(a31)
% 32.24/32.02 [3830]~P29(a32)
% 32.24/32.02 [3831]~P29(a33)
% 32.24/32.02 [3832]~P29(a34)
% 32.24/32.02 [3833]~P29(a35)
% 32.24/32.02 [3834]~P29(a36)
% 32.24/32.02 [3835]~P29(a37)
% 32.24/32.02 [3836]~P29(a38)
% 32.24/32.02 [3837]~P29(a40)
% 32.24/32.02 [3838]~P29(a41)
% 32.24/32.02 [3839]~P29(a42)
% 32.24/32.02 [3840]~P29(a43)
% 32.24/32.02 [3841]~P29(a44)
% 32.24/32.02 [3842]~P29(a45)
% 32.24/32.02 [3843]~P29(a46)
% 32.24/32.02 [3844]~P29(a47)
% 32.24/32.02 [3845]~P29(a48)
% 32.24/32.02 [3846]~P29(a49)
% 32.24/32.02 [3847]~P29(a51)
% 32.24/32.02 [3848]~P29(a52)
% 32.24/32.02 [3849]~P29(a53)
% 32.24/32.02 [3850]~P29(a54)
% 32.24/32.02 [3851]~P29(a55)
% 32.24/32.02 [3852]~P29(a56)
% 32.24/32.02 [3853]~P29(a57)
% 32.24/32.02 [3854]~P29(a58)
% 32.24/32.02 [3855]~P29(a59)
% 32.24/32.02 [3856]~P29(a60)
% 32.24/32.02 [3857]~P29(a73)
% 32.24/32.02 [3858]~P29(a63)
% 32.24/32.02 [3859]~P29(a64)
% 32.24/32.02 [3860]~P29(a65)
% 32.24/32.02 [3861]~P29(a66)
% 32.24/32.02 [3862]~P29(a67)
% 32.24/32.02 [3863]~P29(a68)
% 32.24/32.02 [3864]~P29(a69)
% 32.24/32.02 [3865]~P29(a70)
% 32.24/32.02 [3866]~P29(a71)
% 32.24/32.02 [3867]~P29(a72)
% 32.24/32.02 [3868]~P29(a74)
% 32.24/32.02 [3869]~P29(a75)
% 32.24/32.02 [3870]~P29(a76)
% 32.24/32.02 [3871]~P29(a77)
% 32.24/32.02 [3872]~P29(a78)
% 32.24/32.02 [3873]~P29(a79)
% 32.24/32.02 [3874]~P29(a80)
% 32.24/32.02 [3875]~P29(a81)
% 32.24/32.02 [3876]~P29(a82)
% 32.24/32.02 [3877]~P29(a84)
% 32.24/32.02 [3878]~P29(a85)
% 32.24/32.02 [3879]~P29(a86)
% 32.24/32.02 [3880]~P29(a87)
% 32.24/32.02 [3881]~P66(a27)
% 32.24/32.02 [3882]~P66(a26)
% 32.24/32.02 [3883]~P67(a27)
% 32.24/32.02 [3884]~P67(a26)
% 32.24/32.02 [3885]~P181(a9)
% 32.24/32.02 [3886]~P26(a27)
% 32.24/32.02 [3887]~P26(a26)
% 32.24/32.02 [3888]~P26(a28)
% 32.24/32.02 [3889]~P26(a39)
% 32.24/32.02 [3890]~P26(a62)
% 32.24/32.02 [3891]~P26(a50)
% 32.24/32.02 [3892]~P26(a83)
% 32.24/32.02 [3893]~P26(a61)
% 32.24/32.02 [3894]~P26(a29)
% 32.24/32.02 [3895]~P26(a91)
% 32.24/32.02 [3896]~P26(a92)
% 32.24/32.02 [3897]~P32(a26)
% 32.24/32.02 [3898]~P32(a28)
% 32.24/32.02 [3899]~P32(a39)
% 32.24/32.02 [3900]~P32(a50)
% 32.24/32.02 [3901]~P28(a27)
% 32.24/32.02 [3902]~P28(a26)
% 32.24/32.02 [3903]~P28(a28)
% 32.24/32.02 [3904]~P28(a39)
% 32.24/32.02 [3905]~P28(a62)
% 32.24/32.02 [3906]~P28(a50)
% 32.24/32.02 [3907]~P28(a83)
% 32.24/32.02 [3908]~P28(a61)
% 32.24/32.02 [3909]~P28(a29)
% 32.24/32.02 [3910]~P28(a30)
% 32.24/32.02 [3911]~P28(a91)
% 32.24/32.02 [3912]~P28(a92)
% 32.24/32.02 [3913]~P28(a31)
% 32.24/32.02 [3914]~P28(a32)
% 32.24/32.02 [3915]~P28(a33)
% 32.24/32.02 [3916]~P28(a34)
% 32.24/32.02 [3917]~P28(a35)
% 32.24/32.02 [3918]~P28(a36)
% 32.24/32.02 [3919]~P31(a27)
% 32.24/32.02 [3920]~P31(a26)
% 32.24/32.02 [3921]~P31(a28)
% 32.24/32.02 [3922]~P31(a39)
% 32.24/32.02 [3923]~P31(a62)
% 32.24/32.02 [3924]~P31(a50)
% 32.24/32.02 [3925]~P31(a83)
% 32.24/32.02 [3926]~P31(a61)
% 32.24/32.02 [3927]~P31(a29)
% 32.24/32.02 [3928]~P31(a30)
% 32.24/32.02 [3929]~P31(a91)
% 32.24/32.02 [3930]~P31(a92)
% 32.24/32.02 [3931]~P31(a31)
% 32.24/32.02 [3932]~P31(a32)
% 32.24/32.02 [3933]~P31(a33)
% 32.24/32.02 [3934]~P31(a34)
% 32.24/32.02 [3935]~P31(a35)
% 32.24/32.02 [3936]~P31(a36)
% 32.24/32.02 [3937]~P31(a37)
% 32.24/32.02 [3938]~P31(a38)
% 32.24/32.02 [3939]~P31(a40)
% 32.24/32.02 [3940]~P31(a41)
% 32.24/32.02 [3941]~P31(a42)
% 32.24/32.02 [3942]~P31(a43)
% 32.24/32.02 [3943]~P31(a44)
% 32.24/32.02 [3944]~P31(a45)
% 32.24/32.02 [3945]~P31(a46)
% 32.24/32.02 [3946]~P31(a47)
% 32.24/32.02 [3947]~P31(a48)
% 32.24/32.02 [3948]~P31(a49)
% 32.24/32.02 [3949]~P31(a51)
% 32.24/32.02 [3950]~P31(a52)
% 32.24/32.02 [3951]~P31(a53)
% 32.24/32.02 [3952]~P31(a54)
% 32.24/32.02 [3953]~P31(a55)
% 32.24/32.02 [3954]~P31(a56)
% 32.24/32.02 [3955]~P31(a57)
% 32.24/32.02 [3956]~P31(a58)
% 32.24/32.02 [3957]~P31(a59)
% 32.24/32.02 [3958]~P31(a60)
% 32.24/32.02 [3959]~P31(a73)
% 32.24/32.02 [3960]~P31(a63)
% 32.24/32.02 [3961]~P31(a64)
% 32.24/32.02 [3962]~P31(a65)
% 32.24/32.02 [3963]~P31(a66)
% 32.24/32.02 [3964]~P31(a67)
% 32.24/32.02 [3965]~P31(a68)
% 32.24/32.02 [3966]~P31(a69)
% 32.24/32.02 [3967]~P31(a70)
% 32.24/32.02 [3968]~P31(a71)
% 32.24/32.02 [3969]~P31(a72)
% 32.24/32.02 [3970]~P31(a74)
% 32.24/32.02 [3971]~P31(a75)
% 32.24/32.02 [3972]~P31(a76)
% 32.24/32.02 [3973]~P31(a77)
% 32.24/32.02 [3974]~P31(a78)
% 32.24/32.02 [3975]~P31(a79)
% 32.24/32.02 [3976]~P31(a80)
% 32.24/32.02 [3977]~P31(a81)
% 32.24/32.02 [3978]~P31(a82)
% 32.24/32.02 [3979]~P31(a84)
% 32.24/32.02 [3980]~P31(a85)
% 32.24/32.02 [3981]~P31(a86)
% 32.24/32.02 [3982]~P31(a87)
% 32.24/32.02 [3983]~P31(a88)
% 32.24/32.02 [3984]~P31(a89)
% 32.24/32.02 [3985]~P31(a90)
% 32.24/32.02 [3986]~P2181(a9)
% 32.24/32.02 [3987]~P44(a50)
% 32.24/32.02 [3988]~P30(a27)
% 32.24/32.02 [3989]~P30(a26)
% 32.24/32.02 [3990]~P30(a28)
% 32.24/32.02 [3991]~P30(a39)
% 32.24/32.02 [3992]~P30(a62)
% 32.24/32.02 [3993]~P30(a50)
% 32.24/32.02 [3994]~P30(a83)
% 32.24/32.02 [3995]~P30(a61)
% 32.24/32.02 [3996]~P30(a29)
% 32.24/32.02 [3997]~P30(a30)
% 32.24/32.02 [3998]~P30(a91)
% 32.24/32.02 [3999]~P30(a92)
% 32.24/32.02 [4000]~P30(a31)
% 32.24/32.02 [4001]~P30(a32)
% 32.24/32.02 [4002]~P30(a33)
% 32.24/32.02 [4003]~P30(a34)
% 32.24/32.02 [4004]~P30(a35)
% 32.24/32.02 [4005]~P30(a36)
% 32.24/32.02 [4006]~P30(a37)
% 32.24/32.02 [4007]~P30(a38)
% 32.24/32.02 [4008]~P30(a40)
% 32.24/32.02 [4009]~P30(a41)
% 32.24/32.02 [4010]~P30(a42)
% 32.24/32.02 [4011]~P30(a43)
% 32.24/32.02 [4012]~P30(a44)
% 32.24/32.02 [4013]~P30(a45)
% 32.24/32.02 [4014]~P30(a46)
% 32.24/32.02 [4015]~P30(a47)
% 32.24/32.02 [4016]~P30(a48)
% 32.24/32.02 [4017]~P30(a49)
% 32.24/32.02 [4018]~P30(a51)
% 32.24/32.02 [4019]~P30(a52)
% 32.24/32.02 [4020]~P19(a27)
% 32.24/32.02 [4021]~P19(a26)
% 32.24/32.02 [4022]~P35(a26)
% 32.24/32.02 [4023]~P35(a28)
% 32.24/32.02 [4024]~P35(a62)
% 32.24/32.02 [4025]~P35(a50)
% 32.24/32.02 [4026]~P35(a61)
% 32.24/32.02 [4027]~P40(a26)
% 32.24/32.02 [4028]~P40(a28)
% 32.24/32.02 [4029]~P40(a39)
% 32.24/32.02 [4030]~P40(a50)
% 32.24/32.02 [4031]~P40(a61)
% 32.24/32.02 [4032]~P33(a26)
% 32.24/32.02 [4033]~P33(a28)
% 32.24/32.02 [4034]~P33(a39)
% 32.24/32.02 [4035]~P33(a62)
% 32.24/32.02 [4036]~P33(a50)
% 32.24/32.02 [4037]~P33(a61)
% 32.24/32.02 [4038]~P41(a27)
% 32.24/32.02 [4039]~P41(a26)
% 32.24/32.02 [4040]~P41(a28)
% 32.24/32.02 [4041]~P41(a39)
% 32.24/32.02 [4042]~P41(a50)
% 32.24/32.02 [4043]~P41(a61)
% 32.24/32.02 [4044]~P24(a27)
% 32.24/32.02 [4045]~P24(a26)
% 32.24/32.02 [4046]~P24(a28)
% 32.24/32.02 [4047]~P24(a39)
% 32.24/32.02 [4048]~P24(a62)
% 32.24/32.02 [4049]~P24(a50)
% 32.24/32.02 [4050]~P24(a61)
% 32.24/32.02 [4051]~P25(a27)
% 32.24/32.02 [4052]~P25(a26)
% 32.24/32.02 [4053]~P25(a28)
% 32.24/32.02 [4054]~P25(a39)
% 32.24/32.02 [4055]~P25(a50)
% 32.24/32.02 [4069]~P2016(a9,a26)
% 32.24/32.02 [4070]~P2016(a9,a28)
% 32.24/32.02 [4071]~P2016(a9,a39)
% 32.24/32.02 [4072]~P2018(a9,a26)
% 32.24/32.02 [4073]~P2018(a9,a28)
% 32.24/32.02 [4074]~P2018(a9,a39)
% 32.24/32.02 [4075]~P902(a9,a26)
% 32.24/32.02 [4076]~P902(a9,a28)
% 32.24/32.02 [4077]~P902(a9,a39)
% 32.24/32.02 [4078]~P902(a9,a62)
% 32.24/32.02 [4079]~P902(a9,a50)
% 32.24/32.02 [4080]~P902(a9,a83)
% 32.24/32.02 [4081]~P902(a9,a61)
% 32.24/32.02 [4082]~P902(a9,a29)
% 32.24/32.02 [4083]~P902(a9,a30)
% 32.24/32.02 [4084]~P902(a9,a91)
% 32.24/32.02 [4085]~P902(a9,a92)
% 32.24/32.02 [4086]~P2029(a9,a61)
% 32.24/32.02 [4087]~P1740(a9,a26)
% 32.24/32.02 [4088]~P1740(a9,a28)
% 32.24/32.02 [4089]~P1740(a9,a39)
% 32.24/32.02 [4090]~P1740(a9,a50)
% 32.24/32.02 [4091]~P839(a9,a27)
% 32.24/32.02 [4092]~P839(a9,a26)
% 32.24/32.02 [4093]~P850(a9,a27)
% 32.24/32.02 [4094]~P850(a9,a26)
% 32.24/32.02 [4095]~P1078(a9,a26)
% 32.24/32.02 [4096]~P1078(a9,a28)
% 32.24/32.02 [4097]~P1078(a9,a62)
% 32.24/32.02 [4098]~P1078(a9,a50)
% 32.24/32.02 [4099]~P1078(a9,a83)
% 32.24/32.02 [4100]~P1078(a9,a29)
% 32.24/32.02 [4101]~P1078(a9,a30)
% 32.24/32.02 [4102]~P1078(a9,a92)
% 32.24/32.02 [4103]~P182(a9,a26)
% 32.24/32.02 [4104]~P182(a9,a28)
% 32.24/32.02 [4105]~P182(a9,a39)
% 32.24/32.02 [4106]~P182(a9,a50)
% 32.24/32.02 [4107]~P170(a9,a26)
% 32.24/32.02 [4108]~P170(a9,a28)
% 32.24/32.02 [4109]~P170(a9,a39)
% 32.24/32.02 [4110]~P170(a9,a50)
% 32.24/32.02 [4111]~P1814(a9,a26)
% 32.24/32.02 [4206]~P2533(a9,a10,a27)
% 32.24/32.02 [4207]~P2533(a9,a10,a34)
% 32.24/32.02 [4208]~P2533(a9,a10,a36)
% 32.24/32.02 [4209]~P2533(a9,a11,a27)
% 32.24/32.02 [4210]~P2533(a9,a11,a34)
% 32.24/32.02 [4211]~P2533(a9,a11,a36)
% 32.24/32.02 [4212]~P2533(a9,a12,a27)
% 32.24/32.02 [4213]~P2533(a9,a12,a34)
% 32.24/32.02 [4214]~P2533(a9,a12,a36)
% 32.24/32.02 [4215]~P2533(a9,a13,a27)
% 32.24/32.02 [4216]~P2533(a9,a13,a34)
% 32.24/32.02 [4217]~P2533(a9,a13,a36)
% 32.24/32.02 [4218]~P2533(a9,a14,a27)
% 32.24/32.02 [4219]~P2533(a9,a14,a34)
% 32.24/32.02 [4220]~P2533(a9,a14,a36)
% 32.24/32.02 [4221]~P2533(a9,a15,a27)
% 32.24/32.02 [4222]~P2533(a9,a15,a34)
% 32.24/32.02 [4223]~P2533(a9,a15,a36)
% 32.24/32.02 [4224]~P2533(a9,a16,a27)
% 32.24/32.02 [4225]~P2533(a9,a16,a34)
% 32.24/32.02 [4226]~P2533(a9,a16,a36)
% 32.24/32.02 [4227]~P2533(a9,a17,a27)
% 32.24/32.02 [4228]~P2533(a9,a17,a34)
% 32.24/32.02 [4229]~P2533(a9,a17,a36)
% 32.24/32.02 [4230]~P2533(a9,a18,a27)
% 32.24/32.02 [4231]~P2533(a9,a18,a34)
% 32.24/32.02 [4232]~P2533(a9,a18,a36)
% 32.24/32.02 [4233]~P2533(a9,a19,a27)
% 32.24/32.02 [4234]~P2533(a9,a19,a34)
% 32.24/32.02 [4235]~P2533(a9,a19,a36)
% 32.24/32.02 [4236]~P2533(a9,a20,a27)
% 32.24/32.02 [4237]~P2533(a9,a20,a34)
% 32.24/32.02 [4238]~P2533(a9,a20,a36)
% 32.24/32.02 [4239]~P2533(a9,a25,a27)
% 32.24/32.02 [4240]~P2533(a9,a25,a34)
% 32.24/32.02 [4241]~P2533(a9,a25,a36)
% 32.24/32.02 [4242]~P2533(a9,a23,a27)
% 32.24/32.02 [4243]~P2533(a9,a23,a34)
% 32.24/32.02 [4244]~P2533(a9,a23,a36)
% 32.24/32.02 [4245]~P2533(a9,a21,a27)
% 32.24/32.02 [4246]~P2533(a9,a21,a34)
% 32.24/32.02 [4247]~P2533(a9,a21,a36)
% 32.24/32.02 [4248]~P2533(a9,a24,a27)
% 32.24/32.02 [4249]~P2533(a9,a24,a34)
% 32.24/32.02 [4250]~P2533(a9,a24,a36)
% 32.24/32.02 [4251]~P2533(a9,a22,a27)
% 32.24/32.02 [4252]~P2533(a9,a22,a34)
% 32.24/32.02 [4253]~P2533(a9,a22,a36)
% 32.24/32.02 [4254]~P2412(a9,a10,a87)
% 32.24/32.02 [4255]~P2412(a9,a10,a88)
% 32.24/32.02 [4256]~P2412(a9,a10,a89)
% 32.24/32.02 [4257]~P2412(a9,a10,a90)
% 32.24/32.02 [4258]~P2412(a9,a11,a87)
% 32.24/32.02 [4259]~P2412(a9,a11,a88)
% 32.24/32.02 [4260]~P2412(a9,a11,a89)
% 32.24/32.02 [4261]~P2412(a9,a11,a90)
% 32.24/32.02 [4262]~P2412(a9,a12,a87)
% 32.24/32.02 [4263]~P2412(a9,a12,a88)
% 32.24/32.02 [4264]~P2412(a9,a12,a89)
% 32.24/32.02 [4265]~P2412(a9,a12,a90)
% 32.24/32.02 [4266]~P2412(a9,a13,a87)
% 32.24/32.02 [4267]~P2412(a9,a13,a88)
% 32.24/32.02 [4268]~P2412(a9,a13,a89)
% 32.24/32.02 [4269]~P2412(a9,a13,a90)
% 32.24/32.02 [4270]~P2412(a9,a14,a87)
% 32.24/32.02 [4271]~P2412(a9,a14,a88)
% 32.24/32.02 [4272]~P2412(a9,a14,a89)
% 32.24/32.02 [4273]~P2412(a9,a14,a90)
% 32.24/32.02 [4274]~P2412(a9,a15,a87)
% 32.24/32.02 [4275]~P2412(a9,a15,a88)
% 32.24/32.02 [4276]~P2412(a9,a15,a89)
% 32.24/32.02 [4277]~P2412(a9,a15,a90)
% 32.24/32.02 [4278]~P2412(a9,a16,a87)
% 32.24/32.02 [4279]~P2412(a9,a16,a88)
% 32.24/32.02 [4280]~P2412(a9,a16,a89)
% 32.24/32.02 [4281]~P2412(a9,a16,a90)
% 32.24/32.02 [4282]~P2412(a9,a17,a87)
% 32.24/32.02 [4283]~P2412(a9,a17,a88)
% 32.24/32.02 [4284]~P2412(a9,a17,a89)
% 32.24/32.02 [4285]~P2412(a9,a17,a90)
% 32.24/32.02 [4286]~P2412(a9,a18,a87)
% 32.24/32.02 [4287]~P2412(a9,a18,a88)
% 32.24/32.02 [4288]~P2412(a9,a18,a89)
% 32.24/32.02 [4289]~P2412(a9,a18,a90)
% 32.24/32.02 [4290]~P2412(a9,a19,a87)
% 32.24/32.02 [4291]~P2412(a9,a19,a88)
% 32.24/32.02 [4292]~P2412(a9,a19,a89)
% 32.24/32.02 [4293]~P2412(a9,a19,a90)
% 32.24/32.02 [4294]~P2412(a9,a20,a87)
% 32.24/32.02 [4295]~P2412(a9,a20,a88)
% 32.24/32.02 [4296]~P2412(a9,a20,a89)
% 32.24/32.02 [4297]~P2412(a9,a20,a90)
% 32.24/32.02 [4298]~P2412(a9,a25,a87)
% 32.24/32.02 [4299]~P2412(a9,a25,a88)
% 32.24/32.02 [4300]~P2412(a9,a25,a89)
% 32.24/32.02 [4301]~P2412(a9,a25,a90)
% 32.24/32.02 [4302]~P2412(a9,a23,a87)
% 32.24/32.02 [4303]~P2412(a9,a23,a88)
% 32.24/32.02 [4304]~P2412(a9,a23,a89)
% 32.24/32.02 [4305]~P2412(a9,a23,a90)
% 32.24/32.02 [4306]~P2412(a9,a21,a87)
% 32.24/32.02 [4307]~P2412(a9,a21,a88)
% 32.24/32.02 [4308]~P2412(a9,a21,a89)
% 32.24/32.02 [4309]~P2412(a9,a21,a90)
% 32.24/32.02 [4310]~P2412(a9,a24,a87)
% 32.24/32.02 [4311]~P2412(a9,a24,a88)
% 32.24/32.02 [4312]~P2412(a9,a24,a89)
% 32.24/32.02 [4313]~P2412(a9,a24,a90)
% 32.24/32.02 [4314]~P2412(a9,a22,a87)
% 32.24/32.02 [4315]~P2412(a9,a22,a88)
% 32.24/32.02 [4316]~P2412(a9,a22,a89)
% 32.24/32.02 [4317]~P2412(a9,a22,a90)
% 32.24/32.02 [3595]P2019(x35951,a26)
% 32.24/32.02 [3596]P2020(x35961,a27)
% 32.24/32.02 [3597]P1741(x35971,a28)
% 32.24/32.02 [3598]P903(x35981,a28)
% 32.24/32.02 [4056]~P1742(x40561)
% 32.24/32.02 [4057]~P1757(x40571)
% 32.24/32.02 [4058]~P1758(x40581)
% 32.24/32.02 [4059]~P1759(x40591)
% 32.24/32.02 [4060]~P1760(x40601)
% 32.24/32.02 [4061]~P522(x40611)
% 32.24/32.02 [4062]~P957(x40621)
% 32.24/32.02 [4063]~P836(x40631)
% 32.24/32.02 [4064]~P837(x40641)
% 32.24/32.02 [4065]~P838(x40651)
% 32.24/32.02 [4066]~P523(x40661)
% 32.24/32.02 [4067]~P2182(x40671)
% 32.24/32.02 [4068]~P2183(x40681)
% 32.24/32.02 [4112]~P2150(x41121,a39)
% 32.24/32.02 [4113]~P2150(x41131,a62)
% 32.24/32.02 [4114]~P2150(x41141,a50)
% 32.24/32.02 [4115]~P2037(x41151,a27)
% 32.24/32.02 [4116]~P2062(x41161,a39)
% 32.24/32.02 [4117]~P2517(x41171,a27)
% 32.24/32.02 [4118]~P2527(x41181,a27)
% 32.24/32.02 [4119]~P1815(x41191,a62)
% 32.24/32.02 [4120]~P1105(x41201,a27)
% 32.24/32.02 [4121]~P1106(x41211,a44)
% 32.24/32.02 [4122]~P1106(x41221,a45)
% 32.24/32.02 [4123]~P1106(x41231,a46)
% 32.24/32.02 [4124]~P1106(x41241,a47)
% 32.24/32.02 [4125]~P1106(x41251,a48)
% 32.24/32.02 [4126]~P1106(x41261,a49)
% 32.24/32.02 [4127]~P1106(x41271,a51)
% 32.24/32.02 [4128]~P1106(x41281,a52)
% 32.24/32.02 [4129]~P1106(x41291,a53)
% 32.24/32.02 [4130]~P1106(x41301,a54)
% 32.24/32.02 [4131]~P1106(x41311,a55)
% 32.24/32.02 [4132]~P1106(x41321,a56)
% 32.24/32.02 [4133]~P1106(x41331,a57)
% 32.24/32.02 [4134]~P1106(x41341,a58)
% 32.24/32.02 [4135]~P1106(x41351,a59)
% 32.24/32.02 [4136]~P1106(x41361,a60)
% 32.24/32.02 [4137]~P1254(x41371,a35)
% 32.24/32.02 [4138]~P1254(x41381,a36)
% 32.24/32.02 [4139]~P1254(x41391,a37)
% 32.24/32.02 [4140]~P1254(x41401,a38)
% 32.24/32.02 [4141]~P1254(x41411,a40)
% 32.24/32.02 [4142]~P1254(x41421,a41)
% 32.24/32.02 [4143]~P1254(x41431,a42)
% 32.24/32.02 [4144]~P1254(x41441,a43)
% 32.24/32.02 [4145]~P1306(x41451,a31)
% 32.24/32.02 [4146]~P1306(x41461,a32)
% 32.24/32.02 [4147]~P1306(x41471,a33)
% 32.24/32.02 [4148]~P1306(x41481,a34)
% 32.24/32.02 [4149]~P1331(x41491,a29)
% 32.24/32.02 [4150]~P1331(x41501,a30)
% 32.24/32.02 [4151]~P1343(x41511,a91)
% 32.24/32.02 [4152]~P1332(x41521,a30)
% 32.24/32.02 [4153]~P1307(x41531,a33)
% 32.24/32.02 [4154]~P1307(x41541,a34)
% 32.24/32.02 [4155]~P1321(x41551,a32)
% 32.24/32.02 [4156]~P1308(x41561,a34)
% 32.24/32.02 [4157]~P1255(x41571,a40)
% 32.24/32.02 [4158]~P1255(x41581,a41)
% 32.24/32.02 [4159]~P1255(x41591,a42)
% 32.24/32.02 [4160]~P1255(x41601,a43)
% 32.24/32.02 [4161]~P1283(x41611,a37)
% 32.24/32.02 [4162]~P1283(x41621,a38)
% 32.24/32.02 [4163]~P1295(x41631,a36)
% 32.24/32.02 [4164]~P1284(x41641,a38)
% 32.24/32.02 [4165]~P1256(x41651,a42)
% 32.24/32.02 [4166]~P1256(x41661,a43)
% 32.24/32.02 [4167]~P1273(x41671,a41)
% 32.24/32.02 [4168]~P1257(x41681,a43)
% 32.24/32.02 [4169]~P1107(x41691,a53)
% 32.24/32.02 [4170]~P1107(x41701,a54)
% 32.24/32.02 [4171]~P1107(x41711,a55)
% 32.24/32.02 [4172]~P1107(x41721,a56)
% 32.24/32.02 [4173]~P1107(x41731,a57)
% 32.24/32.02 [4174]~P1107(x41741,a58)
% 32.24/32.02 [4175]~P1107(x41751,a59)
% 32.24/32.02 [4176]~P1107(x41761,a60)
% 32.24/32.02 [4177]~P1203(x41771,a48)
% 32.24/32.02 [4178]~P1203(x41781,a49)
% 32.24/32.02 [4179]~P1203(x41791,a51)
% 32.24/32.02 [4180]~P1203(x41801,a52)
% 32.24/32.02 [4181]~P1229(x41811,a46)
% 32.24/32.02 [4182]~P1229(x41821,a47)
% 32.24/32.02 [4183]~P1241(x41831,a45)
% 32.24/32.02 [4184]~P1230(x41841,a47)
% 32.24/32.02 [4185]~P1204(x41851,a51)
% 32.24/32.02 [4186]~P1204(x41861,a52)
% 32.24/32.02 [4187]~P1219(x41871,a49)
% 32.24/32.02 [4188]~P1205(x41881,a52)
% 32.24/32.02 [4189]~P1108(x41891,a57)
% 32.24/32.02 [4190]~P1108(x41901,a58)
% 32.24/32.02 [4191]~P1108(x41911,a59)
% 32.24/32.02 [4192]~P1108(x41921,a60)
% 32.24/32.02 [4193]~P1178(x41931,a55)
% 32.24/32.02 [4194]~P1178(x41941,a56)
% 32.24/32.02 [4195]~P1190(x41951,a54)
% 32.24/32.02 [4196]~P1179(x41961,a56)
% 32.24/32.02 [4197]~P1109(x41971,a59)
% 32.24/32.02 [4198]~P1109(x41981,a60)
% 32.24/32.02 [4199]~P1167(x41991,a58)
% 32.24/32.02 [4200]~P1110(x42001,a60)
% 32.24/32.02 [4201]~P1055(x42011,a27)
% 32.24/32.02 [4202]~P183(x42021,a62)
% 32.24/32.02 [4203]~P2184(x42031,a62)
% 32.24/32.02 [4204]~P2185(x42041,a62)
% 32.24/32.02 [4205]~P1065(x42051,a50)
% 32.24/32.02 [4318]P113(x43181)+~E(a27,x43181)
% 32.24/32.02 [4319]P113(x43191)+~E(a26,x43191)
% 32.24/32.02 [4320]P113(x43201)+~E(a28,x43201)
% 32.24/32.02 [4321]P114(x43211)+~E(a27,x43211)
% 32.24/32.02 [4322]P114(x43221)+~E(a26,x43221)
% 32.24/32.02 [4323]P114(x43231)+~E(a28,x43231)
% 32.24/32.02 [4324]P114(x43241)+~E(a39,x43241)
% 32.24/32.02 [4325]P114(x43251)+~E(a62,x43251)
% 32.24/32.02 [4326]P114(x43261)+~E(a50,x43261)
% 32.24/32.02 [4327]P114(x43271)+~E(a83,x43271)
% 32.24/32.02 [4328]P114(x43281)+~E(a61,x43281)
% 32.24/32.02 [4329]P114(x43291)+~E(a29,x43291)
% 32.24/32.02 [4330]P114(x43301)+~E(a91,x43301)
% 32.24/32.02 [4331]P114(x43311)+~E(a92,x43311)
% 32.24/32.02 [4332]P129(x43321)+~E(a27,x43321)
% 32.24/32.02 [4333]P129(x43331)+~E(a26,x43331)
% 32.24/32.02 [4334]P129(x43341)+~E(a28,x43341)
% 32.24/32.02 [4335]P129(x43351)+~E(a39,x43351)
% 32.24/32.02 [4336]P136(x43361)+~E(a26,x43361)
% 32.24/32.02 [4337]P136(x43371)+~E(a28,x43371)
% 32.24/32.02 [4338]P136(x43381)+~E(a39,x43381)
% 32.24/32.02 [4339]P115(x43391)+~E(a27,x43391)
% 32.24/32.02 [4340]P115(x43401)+~E(a26,x43401)
% 32.24/32.02 [4341]P137(x43411)+~E(a27,x43411)
% 32.24/32.02 [4342]P137(x43421)+~E(a26,x43421)
% 32.24/32.02 [4343]P137(x43431)+~E(a28,x43431)
% 32.24/32.02 [4344]P137(x43441)+~E(a39,x43441)
% 32.24/32.02 [4345]P137(x43451)+~E(a50,x43451)
% 32.24/32.02 [4346]P130(x43461)+~E(a44,x43461)
% 32.24/32.02 [4347]P130(x43471)+~E(a45,x43471)
% 32.24/32.02 [4348]P130(x43481)+~E(a46,x43481)
% 32.24/32.02 [4349]P130(x43491)+~E(a47,x43491)
% 32.24/32.02 [4350]P130(x43501)+~E(a48,x43501)
% 32.24/32.02 [4351]P130(x43511)+~E(a49,x43511)
% 32.24/32.02 [4352]P130(x43521)+~E(a51,x43521)
% 32.24/32.02 [4353]P130(x43531)+~E(a52,x43531)
% 32.24/32.02 [4354]P138(x43541)+~E(a27,x43541)
% 32.24/32.02 [4355]P138(x43551)+~E(a26,x43551)
% 32.24/32.02 [4356]P138(x43561)+~E(a28,x43561)
% 32.24/32.02 [4357]P138(x43571)+~E(a39,x43571)
% 32.24/32.02 [4358]P138(x43581)+~E(a62,x43581)
% 32.24/32.02 [4359]P138(x43591)+~E(a50,x43591)
% 32.24/32.02 [4360]P139(x43601)+~E(a73,x43601)
% 32.24/32.02 [4361]P139(x43611)+~E(a71,x43611)
% 32.24/32.02 [4362]P139(x43621)+~E(a72,x43621)
% 32.24/32.02 [4363]P139(x43631)+~E(a74,x43631)
% 32.24/32.02 [4364]P139(x43641)+~E(a75,x43641)
% 32.24/32.02 [4365]P139(x43651)+~E(a76,x43651)
% 32.24/32.02 [4366]P139(x43661)+~E(a77,x43661)
% 32.24/32.02 [4367]P139(x43671)+~E(a78,x43671)
% 32.24/32.02 [4368]P139(x43681)+~E(a79,x43681)
% 32.24/32.02 [4369]P139(x43691)+~E(a80,x43691)
% 32.24/32.02 [4370]P139(x43701)+~E(a81,x43701)
% 32.24/32.02 [4371]P139(x43711)+~E(a82,x43711)
% 32.24/32.02 [4372]P139(x43721)+~E(a84,x43721)
% 32.24/32.02 [4373]P139(x43731)+~E(a85,x43731)
% 32.24/32.02 [4374]P139(x43741)+~E(a86,x43741)
% 32.24/32.02 [4375]P139(x43751)+~E(a87,x43751)
% 32.24/32.02 [4376]P131(x43761)+~E(a26,x43761)
% 32.24/32.02 [4377]P131(x43771)+~E(a28,x43771)
% 32.24/32.02 [4378]P116(x43781)+~E(a32,x43781)
% 32.24/32.02 [4379]P116(x43791)+~E(a33,x43791)
% 32.24/32.02 [4380]P119(x43801)+~E(a27,x43801)
% 32.24/32.02 [4381]P119(x43811)+~E(a26,x43811)
% 32.24/32.02 [4382]P119(x43821)+~E(a28,x43821)
% 32.24/32.02 [4383]P119(x43831)+~E(a39,x43831)
% 32.24/32.02 [4384]P119(x43841)+~E(a62,x43841)
% 32.24/32.02 [4385]P119(x43851)+~E(a50,x43851)
% 32.24/32.02 [4386]P119(x43861)+~E(a83,x43861)
% 32.24/32.02 [4387]P119(x43871)+~E(a61,x43871)
% 32.24/32.02 [4388]P119(x43881)+~E(a29,x43881)
% 32.24/32.02 [4389]P119(x43891)+~E(a30,x43891)
% 32.24/32.02 [4390]P119(x43901)+~E(a91,x43901)
% 32.24/32.02 [4391]P119(x43911)+~E(a92,x43911)
% 32.24/32.02 [4392]P119(x43921)+~E(a31,x43921)
% 32.24/32.02 [4393]P119(x43931)+~E(a32,x43931)
% 32.24/32.02 [4394]P119(x43941)+~E(a33,x43941)
% 32.24/32.02 [4395]P119(x43951)+~E(a34,x43951)
% 32.24/32.02 [4396]P119(x43961)+~E(a35,x43961)
% 32.24/32.02 [4397]P141(x43971)+~E(a27,x43971)
% 32.24/32.02 [4398]P141(x43981)+~E(a26,x43981)
% 32.24/32.02 [4399]P141(x43991)+~E(a28,x43991)
% 32.24/32.02 [4400]P141(x44001)+~E(a39,x44001)
% 32.24/32.02 [4401]P141(x44011)+~E(a62,x44011)
% 32.24/32.02 [4402]P141(x44021)+~E(a50,x44021)
% 32.24/32.02 [4403]P141(x44031)+~E(a83,x44031)
% 32.24/32.02 [4404]P141(x44041)+~E(a61,x44041)
% 32.24/32.02 [4405]P145(x44051)+~E(a62,x44051)
% 32.24/32.02 [4406]P145(x44061)+~E(a83,x44061)
% 32.24/32.02 [4407]P145(x44071)+~E(a61,x44071)
% 32.24/32.02 [4408]P145(x44081)+~E(a92,x44081)
% 32.24/32.02 [4409]P132(x44091)+~E(a44,x44091)
% 32.24/32.02 [4410]P132(x44101)+~E(a45,x44101)
% 32.24/32.02 [4411]P132(x44111)+~E(a46,x44111)
% 32.24/32.02 [4412]P132(x44121)+~E(a47,x44121)
% 32.24/32.02 [4413]P132(x44131)+~E(a48,x44131)
% 32.24/32.02 [4414]P132(x44141)+~E(a49,x44141)
% 32.24/32.02 [4415]P132(x44151)+~E(a51,x44151)
% 32.24/32.02 [4416]P132(x44161)+~E(a52,x44161)
% 32.24/32.02 [4417]P132(x44171)+~E(a53,x44171)
% 32.24/32.02 [4418]P132(x44181)+~E(a54,x44181)
% 32.24/32.02 [4419]P132(x44191)+~E(a55,x44191)
% 32.24/32.02 [4420]P132(x44201)+~E(a56,x44201)
% 32.24/32.02 [4421]P132(x44211)+~E(a57,x44211)
% 32.24/32.02 [4422]P132(x44221)+~E(a58,x44221)
% 32.24/32.02 [4423]P132(x44231)+~E(a59,x44231)
% 32.24/32.02 [4424]P132(x44241)+~E(a60,x44241)
% 32.24/32.02 [4425]P120(x44251)+~E(a27,x44251)
% 32.24/32.02 [4426]P120(x44261)+~E(a26,x44261)
% 32.24/32.02 [4427]P120(x44271)+~E(a28,x44271)
% 32.24/32.02 [4428]P120(x44281)+~E(a39,x44281)
% 32.24/32.02 [4429]P120(x44291)+~E(a62,x44291)
% 32.24/32.02 [4430]P120(x44301)+~E(a50,x44301)
% 32.24/32.02 [4431]P120(x44311)+~E(a83,x44311)
% 32.24/32.02 [4432]P120(x44321)+~E(a61,x44321)
% 32.24/32.02 [4433]P120(x44331)+~E(a29,x44331)
% 32.24/32.02 [4434]P120(x44341)+~E(a30,x44341)
% 32.24/32.02 [4435]P120(x44351)+~E(a91,x44351)
% 32.24/32.02 [4436]P120(x44361)+~E(a92,x44361)
% 32.24/32.02 [4437]P120(x44371)+~E(a31,x44371)
% 32.24/32.02 [4438]P120(x44381)+~E(a32,x44381)
% 32.24/32.02 [4439]P120(x44391)+~E(a33,x44391)
% 32.24/32.02 [4440]P120(x44401)+~E(a34,x44401)
% 32.24/32.02 [4441]P117(x44411)+~E(a27,x44411)
% 32.24/32.02 [4442]P117(x44421)+~E(a26,x44421)
% 32.24/32.02 [4443]P117(x44431)+~E(a28,x44431)
% 32.24/32.02 [4444]P117(x44441)+~E(a39,x44441)
% 32.24/32.02 [4445]P117(x44451)+~E(a62,x44451)
% 32.24/32.02 [4446]P117(x44461)+~E(a50,x44461)
% 32.24/32.02 [4447]P117(x44471)+~E(a83,x44471)
% 32.24/32.02 [4448]P117(x44481)+~E(a61,x44481)
% 32.24/32.02 [4449]P117(x44491)+~E(a29,x44491)
% 32.24/32.02 [4450]P117(x44501)+~E(a30,x44501)
% 32.24/32.02 [4451]P117(x44511)+~E(a91,x44511)
% 32.24/32.02 [4452]P117(x44521)+~E(a92,x44521)
% 32.24/32.02 [4453]P146(x44531)+~E(a27,x44531)
% 32.24/32.02 [4454]P146(x44541)+~E(a26,x44541)
% 32.24/32.02 [4455]P146(x44551)+~E(a28,x44551)
% 32.24/32.02 [4456]P146(x44561)+~E(a39,x44561)
% 32.24/32.02 [4457]P146(x44571)+~E(a62,x44571)
% 32.24/32.02 [4458]P146(x44581)+~E(a50,x44581)
% 32.24/32.02 [4459]P146(x44591)+~E(a83,x44591)
% 32.24/32.02 [4460]P146(x44601)+~E(a61,x44601)
% 32.24/32.02 [4461]P146(x44611)+~E(a91,x44611)
% 32.24/32.02 [4462]P146(x44621)+~E(a92,x44621)
% 32.24/32.02 [4463]P118(x44631)+~E(a27,x44631)
% 32.24/32.02 [4464]P118(x44641)+~E(a26,x44641)
% 32.24/32.02 [4465]P118(x44651)+~E(a28,x44651)
% 32.24/32.02 [4466]P118(x44661)+~E(a39,x44661)
% 32.24/32.02 [4467]P118(x44671)+~E(a62,x44671)
% 32.24/32.02 [4468]P118(x44681)+~E(a50,x44681)
% 32.24/32.02 [4469]P118(x44691)+~E(a83,x44691)
% 32.24/32.02 [4470]P118(x44701)+~E(a61,x44701)
% 32.24/32.02 [4471]P118(x44711)+~E(a29,x44711)
% 32.24/32.02 [4472]P118(x44721)+~E(a30,x44721)
% 32.24/32.02 [4473]P118(x44731)+~E(a91,x44731)
% 32.24/32.02 [4474]P118(x44741)+~E(a92,x44741)
% 32.24/32.02 [4475]P118(x44751)+~E(a31,x44751)
% 32.24/32.02 [4476]P118(x44761)+~E(a32,x44761)
% 32.24/32.02 [4477]P121(x44771)+~E(a27,x44771)
% 32.24/32.02 [4478]P121(x44781)+~E(a26,x44781)
% 32.24/32.02 [4479]P121(x44791)+~E(a28,x44791)
% 32.24/32.02 [4480]P121(x44801)+~E(a39,x44801)
% 32.24/32.02 [4481]P121(x44811)+~E(a62,x44811)
% 32.24/32.02 [4482]P121(x44821)+~E(a50,x44821)
% 32.24/32.02 [4483]P121(x44831)+~E(a83,x44831)
% 32.24/32.02 [4484]P121(x44841)+~E(a61,x44841)
% 32.24/32.02 [4485]P121(x44851)+~E(a29,x44851)
% 32.24/32.02 [4486]P121(x44861)+~E(a30,x44861)
% 32.24/32.02 [4487]P121(x44871)+~E(a91,x44871)
% 32.24/32.02 [4488]P121(x44881)+~E(a92,x44881)
% 32.24/32.02 [4489]P121(x44891)+~E(a31,x44891)
% 32.24/32.02 [4490]P121(x44901)+~E(a32,x44901)
% 32.24/32.02 [4491]P121(x44911)+~E(a33,x44911)
% 32.24/32.02 [4492]P121(x44921)+~E(a34,x44921)
% 32.24/32.02 [4493]P121(x44931)+~E(a35,x44931)
% 32.24/32.02 [4494]P121(x44941)+~E(a36,x44941)
% 32.24/32.02 [4495]P121(x44951)+~E(a37,x44951)
% 32.24/32.02 [4496]P121(x44961)+~E(a38,x44961)
% 32.24/32.02 [4497]P122(x44971)+~E(a27,x44971)
% 32.24/32.02 [4498]P122(x44981)+~E(a26,x44981)
% 32.24/32.02 [4499]P122(x44991)+~E(a28,x44991)
% 32.24/32.02 [4500]P122(x45001)+~E(a39,x45001)
% 32.24/32.02 [4501]P122(x45011)+~E(a62,x45011)
% 32.24/32.02 [4502]P122(x45021)+~E(a50,x45021)
% 32.24/32.02 [4503]P122(x45031)+~E(a83,x45031)
% 32.24/32.02 [4504]P122(x45041)+~E(a61,x45041)
% 32.24/32.02 [4505]P122(x45051)+~E(a29,x45051)
% 32.24/32.02 [4506]P122(x45061)+~E(a30,x45061)
% 32.24/32.02 [4507]P122(x45071)+~E(a91,x45071)
% 32.24/32.02 [4508]P122(x45081)+~E(a92,x45081)
% 32.24/32.02 [4509]P122(x45091)+~E(a31,x45091)
% 32.24/32.02 [4510]P122(x45101)+~E(a32,x45101)
% 32.24/32.02 [4511]P122(x45111)+~E(a33,x45111)
% 32.24/32.02 [4512]P122(x45121)+~E(a34,x45121)
% 32.24/32.02 [4513]P122(x45131)+~E(a35,x45131)
% 32.24/32.02 [4514]P122(x45141)+~E(a36,x45141)
% 32.24/32.02 [4515]P123(x45151)+~E(a27,x45151)
% 32.24/32.02 [4516]P123(x45161)+~E(a26,x45161)
% 32.24/32.02 [4517]P123(x45171)+~E(a28,x45171)
% 32.24/32.02 [4518]P123(x45181)+~E(a39,x45181)
% 32.24/32.02 [4519]P123(x45191)+~E(a62,x45191)
% 32.24/32.02 [4520]P123(x45201)+~E(a50,x45201)
% 32.24/32.02 [4521]P123(x45211)+~E(a83,x45211)
% 32.24/32.02 [4522]P123(x45221)+~E(a61,x45221)
% 32.24/32.02 [4523]P123(x45231)+~E(a29,x45231)
% 32.24/32.02 [4524]P123(x45241)+~E(a30,x45241)
% 32.24/32.02 [4525]P123(x45251)+~E(a91,x45251)
% 32.24/32.02 [4526]P123(x45261)+~E(a92,x45261)
% 32.24/32.02 [4527]P123(x45271)+~E(a31,x45271)
% 32.24/32.02 [4528]P123(x45281)+~E(a32,x45281)
% 32.24/32.02 [4529]P123(x45291)+~E(a33,x45291)
% 32.24/32.02 [4530]P123(x45301)+~E(a34,x45301)
% 32.24/32.02 [4531]P123(x45311)+~E(a35,x45311)
% 32.24/32.02 [4532]P123(x45321)+~E(a36,x45321)
% 32.24/32.02 [4533]P123(x45331)+~E(a37,x45331)
% 32.24/32.02 [4534]P123(x45341)+~E(a38,x45341)
% 32.24/32.02 [4535]P123(x45351)+~E(a40,x45351)
% 32.24/32.02 [4536]P123(x45361)+~E(a41,x45361)
% 32.24/32.02 [4537]P124(x45371)+~E(a44,x45371)
% 32.24/32.02 [4538]P124(x45381)+~E(a45,x45381)
% 32.24/32.02 [4539]P124(x45391)+~E(a46,x45391)
% 32.24/32.02 [4540]P124(x45401)+~E(a47,x45401)
% 32.24/32.02 [4541]P125(x45411)+~E(a44,x45411)
% 32.24/32.02 [4542]P125(x45421)+~E(a45,x45421)
% 32.24/32.02 [4543]P128(x45431)+~E(a44,x45431)
% 32.24/32.02 [4544]P128(x45441)+~E(a45,x45441)
% 32.24/32.02 [4545]P128(x45451)+~E(a46,x45451)
% 32.24/32.02 [4546]P128(x45461)+~E(a47,x45461)
% 32.24/32.02 [4547]P128(x45471)+~E(a48,x45471)
% 32.24/32.02 [4548]P128(x45481)+~E(a49,x45481)
% 32.24/32.02 [4549]P133(x45491)+~E(a44,x45491)
% 32.24/32.02 [4550]P133(x45501)+~E(a45,x45501)
% 32.24/32.02 [4551]P133(x45511)+~E(a46,x45511)
% 32.24/32.02 [4552]P133(x45521)+~E(a47,x45521)
% 32.24/32.02 [4553]P133(x45531)+~E(a48,x45531)
% 32.24/32.02 [4554]P133(x45541)+~E(a49,x45541)
% 32.24/32.02 [4555]P133(x45551)+~E(a51,x45551)
% 32.24/32.02 [4556]P133(x45561)+~E(a52,x45561)
% 32.24/32.02 [4557]P133(x45571)+~E(a53,x45571)
% 32.24/32.02 [4558]P133(x45581)+~E(a54,x45581)
% 32.24/32.02 [4559]P133(x45591)+~E(a55,x45591)
% 32.24/32.02 [4560]P133(x45601)+~E(a56,x45601)
% 32.24/32.02 [4561]P134(x45611)+~E(a44,x45611)
% 32.24/32.02 [4562]P134(x45621)+~E(a45,x45621)
% 32.24/32.02 [4563]P134(x45631)+~E(a46,x45631)
% 32.24/32.02 [4564]P134(x45641)+~E(a47,x45641)
% 32.24/32.02 [4565]P134(x45651)+~E(a48,x45651)
% 32.24/32.02 [4566]P134(x45661)+~E(a49,x45661)
% 32.24/32.02 [4567]P134(x45671)+~E(a51,x45671)
% 32.24/32.02 [4568]P134(x45681)+~E(a52,x45681)
% 32.24/32.02 [4569]P134(x45691)+~E(a53,x45691)
% 32.24/32.02 [4570]P134(x45701)+~E(a54,x45701)
% 32.24/32.02 [4571]P135(x45711)+~E(a44,x45711)
% 32.24/32.02 [4572]P135(x45721)+~E(a45,x45721)
% 32.24/32.02 [4573]P135(x45731)+~E(a46,x45731)
% 32.24/32.02 [4574]P135(x45741)+~E(a47,x45741)
% 32.24/32.02 [4575]P135(x45751)+~E(a48,x45751)
% 32.24/32.02 [4576]P135(x45761)+~E(a49,x45761)
% 32.24/32.02 [4577]P135(x45771)+~E(a51,x45771)
% 32.24/32.02 [4578]P135(x45781)+~E(a52,x45781)
% 32.24/32.02 [4579]P135(x45791)+~E(a53,x45791)
% 32.24/32.02 [4580]P135(x45801)+~E(a54,x45801)
% 32.24/32.02 [4581]P135(x45811)+~E(a55,x45811)
% 32.24/32.02 [4582]P135(x45821)+~E(a56,x45821)
% 32.24/32.02 [4583]P135(x45831)+~E(a57,x45831)
% 32.24/32.02 [4584]P135(x45841)+~E(a58,x45841)
% 32.24/32.02 [4585]P127(x45851)+~E(a44,x45851)
% 32.24/32.02 [4586]P127(x45861)+~E(a45,x45861)
% 32.24/32.02 [4587]P127(x45871)+~E(a46,x45871)
% 32.24/32.02 [4588]P142(x45881)+~E(a87,x45881)
% 32.24/32.02 [4589]P142(x45891)+~E(a88,x45891)
% 32.24/32.02 [4590]P142(x45901)+~E(a89,x45901)
% 32.24/32.02 [4591]P142(x45911)+~E(a90,x45911)
% 32.24/32.02 [4592]P143(x45921)+~E(a73,x45921)
% 32.24/32.02 [4593]P143(x45931)+~E(a71,x45931)
% 32.24/32.02 [4594]P143(x45941)+~E(a72,x45941)
% 32.24/32.02 [4595]P143(x45951)+~E(a74,x45951)
% 32.24/32.02 [4596]P143(x45961)+~E(a75,x45961)
% 32.24/32.02 [4597]P143(x45971)+~E(a76,x45971)
% 32.24/32.02 [4598]P143(x45981)+~E(a77,x45981)
% 32.24/32.02 [4599]P143(x45991)+~E(a78,x45991)
% 32.24/32.02 [4600]P143(x46001)+~E(a79,x46001)
% 32.24/32.02 [4601]P143(x46011)+~E(a80,x46011)
% 32.24/32.02 [4602]P143(x46021)+~E(a81,x46021)
% 32.24/32.02 [4603]P143(x46031)+~E(a82,x46031)
% 32.24/32.02 [4604]P143(x46041)+~E(a84,x46041)
% 32.24/32.02 [4605]P143(x46051)+~E(a85,x46051)
% 32.24/32.02 [4606]P143(x46061)+~E(a86,x46061)
% 32.24/32.02 [4607]P143(x46071)+~E(a87,x46071)
% 32.24/32.02 [4608]P143(x46081)+~E(a88,x46081)
% 32.24/32.02 [4609]P143(x46091)+~E(a89,x46091)
% 32.24/32.02 [4610]P143(x46101)+~E(a90,x46101)
% 32.24/32.02 [4611]P144(x46111)+~E(a27,x46111)
% 32.24/32.02 [4612]P144(x46121)+~E(a26,x46121)
% 32.24/32.02 [4613]P144(x46131)+~E(a28,x46131)
% 32.24/32.02 [4614]P144(x46141)+~E(a39,x46141)
% 32.24/32.02 [4615]P144(x46151)+~E(a62,x46151)
% 32.24/32.02 [4616]P144(x46161)+~E(a50,x46161)
% 32.24/32.02 [4617]P144(x46171)+~E(a61,x46171)
% 32.24/32.02 [4618]P140(x46181)+~E(a77,x46181)
% 32.24/32.02 [4619]P140(x46191)+~E(a78,x46191)
% 32.24/32.02 [4620]P140(x46201)+~E(a79,x46201)
% 32.24/32.02 [4621]P140(x46211)+~E(a80,x46211)
% 32.24/32.02 [4622]P140(x46221)+~E(a81,x46221)
% 32.24/32.02 [4623]P140(x46231)+~E(a82,x46231)
% 32.24/32.02 [4624]P140(x46241)+~E(a84,x46241)
% 32.24/32.02 [4625]P68(x46251)+~E(a27,x46251)
% 32.24/32.02 [4626]P68(x46261)+~E(a26,x46261)
% 32.24/32.02 [4627]P68(x46271)+~E(a28,x46271)
% 32.24/32.02 [4628]P68(x46281)+~E(a39,x46281)
% 32.24/32.02 [4629]P68(x46291)+~E(a62,x46291)
% 32.24/32.02 [4630]P68(x46301)+~E(a50,x46301)
% 32.24/32.02 [4631]P68(x46311)+~E(a83,x46311)
% 32.24/32.02 [4632]P68(x46321)+~E(a61,x46321)
% 32.24/32.02 [4633]P68(x46331)+~E(a29,x46331)
% 32.24/32.02 [4634]P68(x46341)+~E(a30,x46341)
% 32.24/32.02 [4635]P68(x46351)+~E(a91,x46351)
% 32.24/32.02 [4636]P68(x46361)+~E(a92,x46361)
% 32.24/32.02 [4637]P68(x46371)+~E(a31,x46371)
% 32.24/32.02 [4638]P68(x46381)+~E(a32,x46381)
% 32.24/32.02 [4639]P68(x46391)+~E(a33,x46391)
% 32.24/32.02 [4640]P68(x46401)+~E(a34,x46401)
% 32.24/32.02 [4641]P68(x46411)+~E(a35,x46411)
% 32.24/32.02 [4642]P68(x46421)+~E(a36,x46421)
% 32.24/32.02 [4643]P68(x46431)+~E(a37,x46431)
% 32.24/32.02 [4644]P68(x46441)+~E(a38,x46441)
% 32.24/32.02 [4645]P68(x46451)+~E(a40,x46451)
% 32.24/32.02 [4646]P68(x46461)+~E(a41,x46461)
% 32.24/32.02 [4647]P68(x46471)+~E(a42,x46471)
% 32.24/32.02 [4648]P68(x46481)+~E(a43,x46481)
% 32.24/32.02 [4649]P75(x46491)+~E(a44,x46491)
% 32.24/32.02 [4650]P75(x46501)+~E(a45,x46501)
% 32.24/32.02 [4651]P75(x46511)+~E(a46,x46511)
% 32.24/32.02 [4652]P75(x46521)+~E(a47,x46521)
% 32.24/32.02 [4653]P75(x46531)+~E(a48,x46531)
% 32.24/32.02 [4654]P75(x46541)+~E(a49,x46541)
% 32.24/32.02 [4655]P75(x46551)+~E(a51,x46551)
% 32.24/32.02 [4656]P75(x46561)+~E(a52,x46561)
% 32.24/32.02 [4657]P75(x46571)+~E(a53,x46571)
% 32.24/32.02 [4658]P75(x46581)+~E(a54,x46581)
% 32.24/32.02 [4659]P75(x46591)+~E(a55,x46591)
% 32.24/32.02 [4660]P75(x46601)+~E(a56,x46601)
% 32.24/32.02 [4661]P75(x46611)+~E(a57,x46611)
% 32.24/32.02 [4662]P75(x46621)+~E(a58,x46621)
% 32.24/32.02 [4663]P75(x46631)+~E(a59,x46631)
% 32.24/32.02 [4664]P75(x46641)+~E(a60,x46641)
% 32.24/32.02 [4665]P75(x46651)+~E(a63,x46651)
% 32.24/32.02 [4666]P75(x46661)+~E(a64,x46661)
% 32.24/32.02 [4667]P75(x46671)+~E(a65,x46671)
% 32.24/32.02 [4668]P75(x46681)+~E(a66,x46681)
% 32.24/32.02 [4669]P75(x46691)+~E(a67,x46691)
% 32.24/32.02 [4670]P75(x46701)+~E(a68,x46701)
% 32.24/32.02 [4671]P75(x46711)+~E(a69,x46711)
% 32.24/32.02 [4672]P75(x46721)+~E(a70,x46721)
% 32.24/32.02 [4673]P2073(x46731)+P2149(x46731)
% 32.24/32.02 [4674]P2146(x46741)+P2073(x46741)
% 32.24/32.02 [4675]P2148(x46751)+P2147(x46751)
% 32.24/32.02 [4676]P158(x46761)+P2074(x46761)
% 32.24/32.02 [4677]P1408(x46771)+P158(x46771)
% 32.24/32.02 [4678]P2076(x46781)+P2075(x46781)
% 32.24/32.02 [4679]P293(x46791)+P198(x46791)
% 32.24/32.02 [4680]P294(x46801)+P198(x46801)
% 32.24/32.02 [4681]P295(x46811)+P198(x46811)
% 32.24/32.02 [4682]P2155(x46821)+P363(x46821)
% 32.24/32.02 [4683]P364(x46831)+P2534(x46831)
% 32.24/32.02 [4684]P1923(x46841)+P2155(x46841)
% 32.24/32.02 [4685]P524(x46851)+P2155(x46851)
% 32.24/32.02 [4686]P2315(x46861)+P2077(x46861)
% 32.24/32.02 [4687]P2063(x46871)+P2315(x46871)
% 32.24/32.02 [4688]P2340(x46881)+P2038(x46881)
% 32.24/32.02 [4689]P2048(x46891)+P2039(x46891)
% 32.24/32.02 [4690]P1974(x46901)+P2040(x46901)
% 32.24/32.02 [4691]P1830(x46911)+P1975(x46911)
% 32.24/32.02 [4692]P327(x46921)+P1830(x46921)
% 32.24/32.02 [4693]P1985(x46931)+P1976(x46931)
% 32.24/32.02 [4694]P1982(x46941)+P1977(x46941)
% 32.24/32.02 [4695]P1980(x46951)+P1978(x46951)
% 32.24/32.02 [4696]P2542(x46961)+P525(x46961)
% 32.24/32.02 [4697]P365(x46971)+P2518(x46971)
% 32.24/32.02 [4698]P1924(x46981)+P2553(x46981)
% 32.24/32.02 [4699]P1955(x46991)+P1925(x46991)
% 32.24/32.02 [4700]P1899(x47001)+P1925(x47001)
% 32.24/32.02 [4701]P1956(x47011)+P1906(x47011)
% 32.24/32.02 [4702]P1907(x47021)+P1926(x47021)
% 32.24/32.02 [4703]P1927(x47031)+P1907(x47031)
% 32.24/32.02 [4704]P526(x47041)+P199(x47041)
% 32.24/32.02 [4705]P1669(x47051)+P296(x47051)
% 32.24/32.02 [4706]P1409(x47061)+P296(x47061)
% 32.24/32.02 [4707]P1410(x47071)+P296(x47071)
% 32.24/32.02 [4708]P767(x47081)+P296(x47081)
% 32.24/32.02 [4709]P171(x47091)+P1900(x47091)
% 32.24/32.02 [4710]P200(x47101)+P171(x47101)
% 32.24/32.02 [4711]P201(x47111)+P171(x47111)
% 32.24/32.02 [4712]P1744(x47121)+P1743(x47121)
% 32.24/32.02 [4713]P2449(x47131)+P1831(x47131)
% 32.24/32.02 [4714]P2472(x47141)+P2449(x47141)
% 32.24/32.02 [4715]P2503(x47151)+P2449(x47151)
% 32.24/32.02 [4716]P1874(x47161)+P1832(x47161)
% 32.24/32.02 [4717]P1875(x47171)+P1833(x47171)
% 32.24/32.02 [4718]P1835(x47181)+P1834(x47181)
% 32.24/32.02 [4719]P1842(x47191)+P1836(x47191)
% 32.24/32.02 [4720]P1843(x47201)+P1837(x47201)
% 32.24/32.02 [4721]P1844(x47211)+P1838(x47211)
% 32.24/32.02 [4722]P1817(x47221)+P1816(x47221)
% 32.24/32.02 [4723]P807(x47231)+P1795(x47231)
% 32.24/32.02 [4724]P1733(x47241)+P807(x47241)
% 32.24/32.02 [4725]P1609(x47251)+P807(x47251)
% 32.24/32.02 [4726]P1535(x47261)+P807(x47261)
% 32.24/32.02 [4727]P1796(x47271)+P1756(x47271)
% 32.24/32.02 [4728]P1792(x47281)+P1783(x47281)
% 32.24/32.02 [4729]P1787(x47291)+P1784(x47291)
% 32.24/32.02 [4730]P1767(x47301)+P1797(x47301)
% 32.24/32.02 [4731]P826(x47311)+P811(x47311)
% 32.24/32.02 [4732]P1672(x47321)+P1670(x47321)
% 32.24/32.02 [4733]P1702(x47331)+P1673(x47331)
% 32.24/32.02 [4734]P1674(x47341)+P1610(x47341)
% 32.24/32.02 [4735]P1698(x47351)+P1675(x47351)
% 32.24/32.02 [4736]P1679(x47361)+P1611(x47361)
% 32.24/32.02 [4737]P1694(x47371)+P1680(x47371)
% 32.24/32.02 [4738]P1613(x47381)+P1612(x47381)
% 32.24/32.02 [4739]P1685(x47391)+P1684(x47391)
% 32.24/32.02 [4740]P808(x47401)+P1810(x47401)
% 32.24/32.02 [4741]P1653(x47411)+P1614(x47411)
% 32.24/32.02 [4742]P1411(x47421)+P981(x47421)
% 32.24/32.02 [4743]P1625(x47431)+P1615(x47431)
% 32.24/32.02 [4744]P1626(x47441)+P1616(x47441)
% 32.24/32.02 [4745]P1618(x47451)+P1617(x47451)
% 32.24/32.02 [4746]P1575(x47461)+P1536(x47461)
% 32.24/32.02 [4747]P1576(x47471)+P1537(x47471)
% 32.24/32.02 [4748]P1539(x47481)+P1538(x47481)
% 32.24/32.02 [4749]P1551(x47491)+P1540(x47491)
% 32.24/32.02 [4750]P1552(x47501)+P1541(x47501)
% 32.24/32.02 [4751]P1543(x47511)+P1542(x47511)
% 32.24/32.02 [4752]P1020(x47521)+P1532(x47521)
% 32.24/32.02 [4753]P1413(x47531)+P1412(x47531)
% 32.24/32.02 [4754]P307(x47541)+P1414(x47541)
% 32.24/32.02 [4755]P905(x47551)+P307(x47551)
% 32.24/32.02 [4756]P980(x47561)+P1415(x47561)
% 32.24/32.02 [4757]P1111(x47571)+P980(x47571)
% 32.24/32.02 [4758]P1112(x47581)+P980(x47581)
% 32.24/32.02 [4759]P1124(x47591)+P1416(x47591)
% 32.24/32.02 [4760]P1391(x47601)+P1349(x47601)
% 32.24/32.02 [4761]P1392(x47611)+P1350(x47611)
% 32.24/32.02 [4762]P1400(x47621)+P1387(x47621)
% 32.24/32.02 [4763]P1351(x47631)+P1393(x47631)
% 32.24/32.02 [4764]P1376(x47641)+P1375(x47641)
% 32.24/32.02 [4765]P1388(x47651)+P1377(x47651)
% 32.24/32.02 [4766]P1379(x47661)+P1378(x47661)
% 32.24/32.02 [4767]P1035(x47671)+P1079(x47671)
% 32.24/32.02 [4768]P1056(x47681)+P1035(x47681)
% 32.24/32.02 [4769]P1047(x47691)+P1062(x47691)
% 32.24/32.02 [4770]P350(x47701)+P1057(x47701)
% 32.24/32.02 [4771]P812(x47711)+P350(x47711)
% 32.24/32.02 [4772]P1054(x47721)+P1058(x47721)
% 32.24/32.02 [4773]P982(x47731)+P813(x47731)
% 32.24/32.02 [4774]P993(x47741)+P983(x47741)
% 32.24/32.02 [4775]P987(x47751)+P984(x47751)
% 32.24/32.02 [4776]P878(x47761)+P995(x47761)
% 32.24/32.02 [4777]P851(x47771)+P864(x47771)
% 32.24/32.02 [4778]P851(x47781)+P918(x47781)
% 32.24/32.02 [4779]P889(x47791)+P919(x47791)
% 32.24/32.02 [4780]P906(x47801)+P927(x47801)
% 32.24/32.02 [4781]P777(x47811)+P768(x47811)
% 32.24/32.02 [4782]P770(x47821)+P769(x47821)
% 32.24/32.02 [4783]P286(x47831)+P637(x47831)
% 32.24/32.02 [4784]P284(x47841)+P278(x47841)
% 32.24/32.02 [4785]P202(x47851)+P638(x47851)
% 32.24/32.02 [4786]P2554(x47861)+P2569(x47861)
% 32.24/32.02 [4787]P716(x47871)+P639(x47871)
% 32.24/32.02 [4788]P641(x47881)+P640(x47881)
% 32.24/32.02 [4789]P86(x47891)+P327(x47891)
% 32.24/32.02 [4790]P2519(x47901)+P527(x47901)
% 32.24/32.02 [4791]P422(x47911)+P297(x47911)
% 32.24/32.02 [4792]P423(x47921)+P297(x47921)
% 32.24/32.02 [4793]P300(x47931)+P528(x47931)
% 32.24/32.02 [4794]P529(x47941)+P300(x47941)
% 32.24/32.02 [4795]P530(x47951)+P300(x47951)
% 32.24/32.02 [4796]P586(x47961)+P570(x47961)
% 32.24/32.02 [4797]P599(x47971)+P587(x47971)
% 32.24/32.02 [4798]P181(x47981)+P540(x47981)
% 32.24/32.02 [4799]P181(x47991)+P541(x47991)
% 32.24/32.02 [4800]P514(x48001)+P478(x48001)
% 32.24/32.02 [4801]P308(x48011)+P478(x48011)
% 32.24/32.02 [4802]P479(x48021)+P308(x48021)
% 32.24/32.02 [4803]P424(x48031)+P308(x48031)
% 32.24/32.02 [4804]P320(x48041)+P480(x48041)
% 32.24/32.02 [4805]P481(x48051)+P320(x48051)
% 32.24/32.02 [4806]P2554(x48061)+P203(x48061)
% 32.24/32.02 [4807]P159(x48071)+P2554(x48071)
% 32.24/32.02 [4808]P246(x48081)+P204(x48081)
% 32.24/32.02 [4809]P247(x48091)+P205(x48091)
% 32.24/32.02 [4810]P207(x48101)+P206(x48101)
% 32.24/32.02 [4811]P214(x48111)+P208(x48111)
% 32.24/32.02 [4812]P215(x48121)+P209(x48121)
% 32.24/32.02 [4813]P216(x48131)+P210(x48131)
% 32.24/32.02 [4814]P185(x48141)+P184(x48141)
% 32.24/32.02 [4815]P160(x48151)+P159(x48151)
% 32.24/32.02 [4816]P2579(x48161)+P2570(x48161)
% 32.24/32.02 [4817]P2572(x48171)+P2571(x48171)
% 32.24/32.02 [4818]P2504(x48181)+P2503(x48181)
% 32.24/32.02 [4819]P2483(x48191)+P2473(x48191)
% 32.24/32.02 [4820]P2475(x48201)+P2474(x48201)
% 32.24/32.02 [4821]P2379(x48211)+P2413(x48211)
% 32.24/32.02 [4822]P2409(x48221)+P2443(x48221)
% 32.24/32.02 [4823]P2415(x48231)+P2414(x48231)
% 32.24/32.02 [4824]P2416(x48241)+P2433(x48241)
% 32.24/32.02 [4825]P2171(x48251)+P2202(x48251)
% 32.24/32.02 [4826]P2203(x48261)+P2202(x48261)
% 32.24/32.02 [4827]P1991(x48271)+P2283(x48271)
% 32.24/32.02 [4828]P2284(x48281)+P2283(x48281)
% 32.24/32.02 [4829]P2380(x48291)+P2204(x48291)
% 32.24/32.02 [4830]P1991(x48301)+P2204(x48301)
% 32.24/32.02 [4831]P2390(x48311)+P2287(x48311)
% 32.24/32.02 [4832]P2171(x48321)+P2287(x48321)
% 32.24/32.02 [4833]P1943(x48331)+P2288(x48331)
% 32.24/32.02 [4834]P2381(x48341)+P2391(x48341)
% 32.24/32.02 [4835]P2022(x48351)+P2382(x48351)
% 32.24/32.02 [4836]P2358(x48361)+P2341(x48361)
% 32.24/32.02 [4837]P2359(x48371)+P2342(x48371)
% 32.24/32.02 [4838]P2344(x48381)+P2343(x48381)
% 32.24/32.02 [4839]P2345(x48391)+P2316(x48391)
% 32.24/32.02 [4840]P2323(x48401)+P2317(x48401)
% 32.24/32.02 [4841]P2324(x48411)+P2318(x48411)
% 32.24/32.02 [4842]P2301(x48421)+P2300(x48421)
% 32.24/32.02 [4843]P2172(x48431)+P2205(x48431)
% 32.24/32.02 [4844]P2248(x48441)+P2206(x48441)
% 32.24/32.02 [4845]P2249(x48451)+P2207(x48451)
% 32.24/32.02 [4846]P2209(x48461)+P2208(x48461)
% 32.24/32.02 [4847]P2216(x48471)+P2210(x48471)
% 32.24/32.02 [4848]P2217(x48481)+P2211(x48481)
% 32.24/32.02 [4849]P2218(x48491)+P2212(x48491)
% 32.24/32.02 [4850]P2187(x48501)+P2186(x48501)
% 32.24/32.02 [4851]P172(x48511)+P163(x48511)
% 32.24/32.02 [4852]P1445(x48521)+P1401(x48521)
% 32.24/32.02 [4853]P1381(x48531)+P1394(x48531)
% 32.24/32.02 [4854]P1231(x48541)+P1113(x48541)
% 32.24/32.02 [4855]P1191(x48551)+P1080(x48551)
% 32.24/32.02 [4856]P1067(x48561)+P1066(x48561)
% 32.24/32.02 [4860]~P2049(x48601)+P157(x48601)
% 32.24/32.02 [4861]~P865(x48611)+P157(x48611)
% 32.24/32.02 [4862]~P531(x48621)+P157(x48621)
% 32.24/32.02 [4863]~P2258(x48631)+P157(x48631)
% 32.24/32.02 [4864]~P840(x48641)+P157(x48641)
% 32.24/32.02 [4865]~P2146(x48651)+P2147(x48651)
% 32.24/32.02 [4866]~P2146(x48661)+P2156(x48661)
% 32.24/32.02 [4867]~P2152(x48671)+P2151(x48671)
% 32.24/32.02 [4868]~P2151(x48681)+P2154(x48681)
% 32.24/32.02 [4869]~P2157(x48691)+P2154(x48691)
% 32.24/32.02 [4870]~P2157(x48701)+P2158(x48701)
% 32.24/32.02 [4871]~P2159(x48711)+P2158(x48711)
% 32.24/32.02 [4872]~P2157(x48721)+P2160(x48721)
% 32.24/32.02 [4873]~P2159(x48731)+P2161(x48731)
% 32.24/32.02 [4874]~P2162(x48741)+P2161(x48741)
% 32.24/32.02 [4875]~P2159(x48751)+P2163(x48751)
% 32.24/32.02 [4876]~P2162(x48761)+P2164(x48761)
% 32.24/32.02 [4877]~P296(x48771)+P158(x48771)
% 32.24/32.02 [4878]~P1544(x48781)+P1523(x48781)
% 32.24/32.02 [4879]~P1192(x48791)+P1036(x48791)
% 32.24/32.02 [4880]~P2137(x48801)+P2133(x48801)
% 32.24/32.02 [4881]~P2134(x48811)+P2133(x48811)
% 32.24/32.02 [4882]~P2138(x48821)+P2133(x48821)
% 32.24/32.02 [4883]~P2134(x48831)+P2139(x48831)
% 32.24/32.02 [4884]~P2091(x48841)+P2090(x48841)
% 32.24/32.02 [4885]~P2076(x48851)+P2090(x48851)
% 32.24/32.02 [4886]~P2135(x48861)+P2090(x48861)
% 32.24/32.02 [4887]~P2091(x48871)+P2136(x48871)
% 32.24/32.02 [4888]~P2075(x48881)+P2136(x48881)
% 32.24/32.02 [4889]~P1036(x48891)+P1192(x48891)
% 32.24/32.02 [4890]~P1402(x48901)+P1192(x48901)
% 32.24/32.02 [4891]~P1192(x48911)+P1402(x48911)
% 32.24/32.02 [4892]~P1561(x48921)+P1402(x48921)
% 32.24/32.02 [4893]~P1402(x48931)+P1561(x48931)
% 32.24/32.02 [4894]~P1544(x48941)+P328(x48941)
% 32.24/32.02 [4895]~P2103(x48951)+P2092(x48951)
% 32.24/32.02 [4896]~P2104(x48961)+P2092(x48961)
% 32.24/32.02 [4897]~P2105(x48971)+P2103(x48971)
% 32.24/32.02 [4898]~P2106(x48981)+P2103(x48981)
% 32.24/32.02 [4899]~P2104(x48991)+P2124(x48991)
% 32.24/32.02 [4900]~P2107(x49001)+P2124(x49001)
% 32.24/32.02 [4901]~P2104(x49011)+P366(x49011)
% 32.24/32.02 [4902]~P1928(x49021)+P366(x49021)
% 32.24/32.02 [4903]~P743(x49031)+P366(x49031)
% 32.24/32.02 [4904]~P642(x49041)+P366(x49041)
% 32.24/32.02 [4905]~P643(x49051)+P366(x49051)
% 32.24/32.02 [4906]~P400(x49061)+P366(x49061)
% 32.24/32.02 [4907]~P367(x49071)+P366(x49071)
% 32.24/32.02 [4908]~P2124(x49081)+P2107(x49081)
% 32.24/32.02 [4909]~P2123(x49091)+P2107(x49091)
% 32.24/32.02 [4910]~P2113(x49101)+P2107(x49101)
% 32.24/32.02 [4911]~P2114(x49111)+P2107(x49111)
% 32.24/32.02 [4912]~P2115(x49121)+P2107(x49121)
% 32.24/32.02 [4913]~P2116(x49131)+P2107(x49131)
% 32.24/32.02 [4914]~P2108(x49141)+P2105(x49141)
% 32.24/32.02 [4915]~P2122(x49151)+P2105(x49151)
% 32.24/32.02 [4916]~P2106(x49161)+P2123(x49161)
% 32.24/32.02 [4917]~P2106(x49171)+P368(x49171)
% 32.24/32.02 [4918]~P1929(x49181)+P368(x49181)
% 32.24/32.02 [4919]~P744(x49191)+P368(x49191)
% 32.24/32.02 [4920]~P673(x49201)+P368(x49201)
% 32.24/32.02 [4921]~P644(x49211)+P368(x49211)
% 32.24/32.02 [4922]~P401(x49221)+P368(x49221)
% 32.24/32.02 [4923]~P369(x49231)+P368(x49231)
% 32.24/32.02 [4924]~P358(x49241)+P368(x49241)
% 32.24/32.02 [4925]~P2123(x49251)+P198(x49251)
% 32.24/32.02 [4926]~P2114(x49261)+P198(x49261)
% 32.24/32.02 [4927]~P2116(x49271)+P198(x49271)
% 32.24/32.02 [4928]~P645(x49281)+P198(x49281)
% 32.24/32.02 [4929]~P402(x49291)+P198(x49291)
% 32.24/32.02 [4930]~P669(x49301)+P198(x49301)
% 32.24/32.02 [4931]~P652(x49311)+P198(x49311)
% 32.24/32.02 [4932]~P646(x49321)+P198(x49321)
% 32.24/32.02 [4933]~P298(x49331)+P198(x49331)
% 32.24/32.02 [4934]~P382(x49341)+P198(x49341)
% 32.24/32.02 [4935]~P370(x49351)+P198(x49351)
% 32.24/32.02 [4936]~P371(x49361)+P198(x49361)
% 32.24/32.02 [4937]~P2109(x49371)+P2108(x49371)
% 32.24/32.02 [4938]~P2121(x49381)+P2108(x49381)
% 32.24/32.02 [4939]~P2107(x49391)+P2113(x49391)
% 32.24/32.02 [4940]~P2122(x49401)+P2113(x49401)
% 32.24/32.02 [4941]~P2122(x49411)+P407(x49411)
% 32.24/32.02 [4942]~P1963(x49421)+P407(x49421)
% 32.24/32.02 [4943]~P748(x49431)+P407(x49431)
% 32.24/32.02 [4944]~P674(x49441)+P407(x49441)
% 32.24/32.02 [4945]~P661(x49451)+P407(x49451)
% 32.24/32.02 [4946]~P408(x49461)+P407(x49461)
% 32.24/32.02 [4947]~P2110(x49471)+P2109(x49471)
% 32.24/32.02 [4948]~P2120(x49481)+P2109(x49481)
% 32.24/32.02 [4949]~P2121(x49491)+P2114(x49491)
% 32.24/32.02 [4950]~P2121(x49501)+P351(x49501)
% 32.24/32.02 [4951]~P1908(x49511)+P351(x49511)
% 32.24/32.02 [4952]~P745(x49521)+P351(x49521)
% 32.24/32.02 [4953]~P675(x49531)+P351(x49531)
% 32.24/32.02 [4954]~P653(x49541)+P351(x49541)
% 32.24/32.02 [4955]~P409(x49551)+P351(x49551)
% 32.24/32.02 [4956]~P381(x49561)+P351(x49561)
% 32.24/32.02 [4957]~P338(x49571)+P351(x49571)
% 32.24/32.02 [4958]~P2111(x49581)+P2110(x49581)
% 32.24/32.02 [4959]~P2117(x49591)+P2110(x49591)
% 32.24/32.02 [4960]~P2107(x49601)+P2115(x49601)
% 32.24/32.02 [4961]~P2120(x49611)+P2115(x49611)
% 32.24/32.02 [4962]~P2120(x49621)+P410(x49621)
% 32.24/32.02 [4963]~P1964(x49631)+P410(x49631)
% 32.24/32.02 [4964]~P749(x49641)+P410(x49641)
% 32.24/32.02 [4965]~P676(x49651)+P410(x49651)
% 32.24/32.02 [4966]~P654(x49661)+P410(x49661)
% 32.24/32.02 [4967]~P411(x49671)+P410(x49671)
% 32.24/32.02 [4968]~P2117(x49681)+P2116(x49681)
% 32.24/32.02 [4969]~P2117(x49691)+P329(x49691)
% 32.24/32.02 [4970]~P1909(x49701)+P329(x49701)
% 32.24/32.02 [4971]~P737(x49711)+P329(x49711)
% 32.24/32.02 [4972]~P677(x49721)+P329(x49721)
% 32.24/32.02 [4973]~P647(x49731)+P329(x49731)
% 32.24/32.02 [4974]~P403(x49741)+P329(x49741)
% 32.24/32.02 [4975]~P372(x49751)+P329(x49751)
% 32.24/32.02 [4976]~P324(x49761)+P329(x49761)
% 32.24/32.02 [4977]~P2107(x49771)+P2118(x49771)
% 32.24/32.02 [4978]~P2112(x49781)+P2118(x49781)
% 32.24/32.02 [4979]~P2107(x49791)+P363(x49791)
% 32.24/32.02 [4980]~P2112(x49801)+P363(x49801)
% 32.24/32.02 [4981]~P631(x49811)+P363(x49811)
% 32.24/32.02 [4982]~P384(x49821)+P363(x49821)
% 32.24/32.02 [4983]~P615(x49831)+P363(x49831)
% 32.24/32.02 [4984]~P616(x49841)+P363(x49841)
% 32.24/32.02 [4985]~P2111(x49851)+P2112(x49851)
% 32.24/32.02 [4986]~P2111(x49861)+P404(x49861)
% 32.24/32.02 [4987]~P1965(x49871)+P404(x49871)
% 32.24/32.02 [4988]~P750(x49881)+P404(x49881)
% 32.24/32.02 [4989]~P678(x49891)+P404(x49891)
% 32.24/32.02 [4990]~P617(x49901)+P404(x49901)
% 32.24/32.02 [4991]~P385(x49911)+P404(x49911)
% 32.24/32.02 [4992]~P2118(x49921)+P629(x49921)
% 32.24/32.02 [4993]~P630(x49931)+P629(x49931)
% 32.24/32.02 [4994]~P2118(x49941)+P2534(x49941)
% 32.24/32.02 [4995]~P2543(x49951)+P2534(x49951)
% 32.24/32.02 [4996]~P2188(x49961)+P2155(x49961)
% 32.24/32.02 [4997]~P1932(x49971)+P2155(x49971)
% 32.24/32.02 [4998]~P751(x49981)+P2155(x49981)
% 32.24/32.02 [4999]~P664(x49991)+P2155(x49991)
% 32.24/32.02 [5000]~P655(x50001)+P2155(x50001)
% 32.24/32.02 [5001]~P625(x50011)+P2155(x50011)
% 32.24/32.02 [5002]~P383(x50021)+P2155(x50021)
% 32.24/32.02 [5003]~P382(x50031)+P2155(x50031)
% 32.24/32.02 [5004]~P370(x50041)+P2155(x50041)
% 32.24/32.02 [5005]~P371(x50051)+P2155(x50051)
% 32.24/32.02 [5006]~P2155(x50061)+P2188(x50061)
% 32.24/32.02 [5007]~P2201(x50071)+P2188(x50071)
% 32.24/32.02 [5008]~P2188(x50081)+P2201(x50081)
% 32.24/32.02 [5009]~P2228(x50091)+P2201(x50091)
% 32.24/32.02 [5010]~P2201(x50101)+P2228(x50101)
% 32.24/32.02 [5011]~P2247(x50111)+P2228(x50111)
% 32.24/32.02 [5012]~P2228(x50121)+P2247(x50121)
% 32.24/32.02 [5013]~P2259(x50131)+P2247(x50131)
% 32.24/32.02 [5014]~P2247(x50141)+P2259(x50141)
% 32.24/32.02 [5015]~P2272(x50151)+P2259(x50151)
% 32.24/32.02 [5016]~P2259(x50161)+P2272(x50161)
% 32.24/32.02 [5017]~P2289(x50171)+P2272(x50171)
% 32.24/32.02 [5018]~P2272(x50181)+P2289(x50181)
% 32.24/32.02 [5019]~P2302(x50191)+P2289(x50191)
% 32.24/32.02 [5020]~P2289(x50201)+P2302(x50201)
% 32.24/32.02 [5021]~P2081(x50211)+P2078(x50211)
% 32.24/32.02 [5022]~P2360(x50221)+P2315(x50221)
% 32.24/32.02 [5023]~P2078(x50231)+P2081(x50231)
% 32.24/32.02 [5024]~P2050(x50241)+P2081(x50241)
% 32.24/32.02 [5025]~P2081(x50251)+P2050(x50251)
% 32.24/32.02 [5026]~P2049(x50261)+P2050(x50261)
% 32.24/32.02 [5027]~P2001(x50271)+P1996(x50271)
% 32.24/32.02 [5028]~P2419(x50281)+P2417(x50281)
% 32.24/32.02 [5029]~P1996(x50291)+P2001(x50291)
% 32.24/32.02 [5030]~P2002(x50301)+P2001(x50301)
% 32.24/32.02 [5031]~P2001(x50311)+P2002(x50311)
% 32.24/32.02 [5032]~P2059(x50321)+P2002(x50321)
% 32.24/32.02 [5033]~P2360(x50331)+P2340(x50331)
% 32.24/32.02 [5034]~P2392(x50341)+P2340(x50341)
% 32.24/32.02 [5035]~P157(x50351)+P2049(x50351)
% 32.24/32.02 [5036]~P2050(x50361)+P2049(x50361)
% 32.24/32.02 [5037]~P1974(x50371)+P2041(x50371)
% 32.24/32.02 [5038]~P2047(x50381)+P2045(x50381)
% 32.24/32.02 [5039]~P2021(x50391)+P2048(x50391)
% 32.24/32.02 [5040]~P2030(x50401)+P2048(x50401)
% 32.24/32.02 [5041]~P2031(x50411)+P2030(x50411)
% 32.24/32.02 [5042]~P2045(x50421)+P2047(x50421)
% 32.24/32.02 [5043]~P2021(x50431)+P2047(x50431)
% 32.24/32.02 [5044]~P2030(x50441)+P2047(x50441)
% 32.24/32.02 [5045]~P2041(x50451)+P1974(x50451)
% 32.24/32.02 [5046]~P2005(x50461)+P1974(x50461)
% 32.24/32.02 [5047]~P2030(x50471)+P2031(x50471)
% 32.24/32.02 [5048]~P2032(x50481)+P2031(x50481)
% 32.24/32.02 [5049]~P2031(x50491)+P2032(x50491)
% 32.24/32.02 [5050]~P2033(x50501)+P2032(x50501)
% 32.24/32.02 [5051]~P2032(x50511)+P2033(x50511)
% 32.24/32.02 [5052]~P2034(x50521)+P2033(x50521)
% 32.24/32.02 [5053]~P2033(x50531)+P2034(x50531)
% 32.24/32.02 [5054]~P2035(x50541)+P2034(x50541)
% 32.24/32.02 [5055]~P2034(x50551)+P2035(x50551)
% 32.24/32.02 [5056]~P2036(x50561)+P2035(x50561)
% 32.24/32.02 [5057]~P2035(x50571)+P2036(x50571)
% 32.24/32.02 [5058]~P1974(x50581)+P2005(x50581)
% 32.24/32.02 [5059]~P2005(x50591)+P2023(x50591)
% 32.24/32.02 [5060]~P2005(x50601)+P2015(x50601)
% 32.24/32.02 [5061]~P147(x50611)+P2015(x50611)
% 32.24/32.02 [5062]~P2023(x50621)+P2024(x50621)
% 32.24/32.02 [5063]~P2023(x50631)+P2014(x50631)
% 32.24/32.02 [5064]~P148(x50641)+P2014(x50641)
% 32.24/32.02 [5065]~P2024(x50651)+P2025(x50651)
% 32.24/32.02 [5066]~P2024(x50661)+P2012(x50661)
% 32.24/32.02 [5067]~P149(x50671)+P2012(x50671)
% 32.24/32.02 [5068]~P2025(x50681)+P2026(x50681)
% 32.24/32.02 [5069]~P2025(x50691)+P2011(x50691)
% 32.24/32.02 [5070]~P150(x50701)+P2011(x50701)
% 32.24/32.02 [5071]~P2026(x50711)+P2027(x50711)
% 32.24/32.02 [5072]~P2026(x50721)+P2010(x50721)
% 32.24/32.02 [5073]~P151(x50731)+P2010(x50731)
% 32.24/32.02 [5074]~P2027(x50741)+P2028(x50741)
% 32.24/32.02 [5075]~P2027(x50751)+P2009(x50751)
% 32.24/32.02 [5076]~P152(x50761)+P2009(x50761)
% 32.24/32.02 [5077]~P2028(x50771)+P2006(x50771)
% 32.24/32.02 [5078]~P154(x50781)+P2006(x50781)
% 32.24/32.02 [5079]~P2028(x50791)+P2008(x50791)
% 32.24/32.02 [5080]~P153(x50801)+P2008(x50801)
% 32.24/32.02 [5081]~P2015(x50811)+P147(x50811)
% 32.24/32.02 [5082]~P2014(x50821)+P148(x50821)
% 32.24/32.02 [5083]~P2012(x50831)+P149(x50831)
% 32.24/32.02 [5084]~P2011(x50841)+P150(x50841)
% 32.24/32.02 [5085]~P2010(x50851)+P151(x50851)
% 32.24/32.02 [5086]~P2009(x50861)+P152(x50861)
% 32.24/32.02 [5087]~P2008(x50871)+P153(x50871)
% 32.24/32.02 [5088]~P2006(x50881)+P154(x50881)
% 32.24/32.02 [5089]~P2417(x50891)+P2419(x50891)
% 32.24/32.02 [5090]~P2434(x50901)+P2419(x50901)
% 32.24/32.02 [5091]~P2419(x50911)+P2434(x50911)
% 32.24/32.02 [5092]~P2450(x50921)+P2434(x50921)
% 32.24/32.02 [5093]~P2434(x50931)+P2450(x50931)
% 32.24/32.02 [5094]~P2452(x50941)+P2450(x50941)
% 32.24/32.02 [5095]~P2450(x50951)+P2452(x50951)
% 32.24/32.02 [5096]~P2460(x50961)+P2452(x50961)
% 32.24/32.02 [5097]~P2452(x50971)+P2460(x50971)
% 32.24/32.02 [5098]~P2488(x50981)+P2460(x50981)
% 32.24/32.02 [5099]~P2460(x50991)+P2488(x50991)
% 32.24/32.02 [5100]~P2489(x51001)+P2488(x51001)
% 32.24/32.02 [5101]~P2488(x51011)+P2489(x51011)
% 32.24/32.02 [5102]~P1993(x51021)+P1992(x51021)
% 32.24/32.02 [5103]~P1992(x51031)+P1993(x51031)
% 32.24/32.02 [5104]~P1994(x51041)+P1993(x51041)
% 32.24/32.02 [5105]~P1997(x51051)+P1993(x51051)
% 32.24/32.02 [5106]~P1995(x51061)+P1994(x51061)
% 32.24/32.02 [5107]~P1983(x51071)+P1994(x51071)
% 32.24/32.02 [5108]~P1997(x51081)+P2000(x51081)
% 32.24/32.02 [5109]~P1998(x51091)+P1995(x51091)
% 32.24/32.02 [5110]~P1981(x51101)+P1995(x51101)
% 32.24/32.02 [5111]~P1999(x51111)+P1998(x51111)
% 32.24/32.02 [5112]~P2520(x51121)+P1998(x51121)
% 32.24/32.02 [5113]~P2505(x51131)+P1999(x51131)
% 32.24/32.02 [5114]~P1979(x51141)+P1999(x51141)
% 32.24/32.02 [5115]~P296(x51151)+P1830(x51151)
% 32.24/32.02 [5116]~P1983(x51161)+P1976(x51161)
% 32.24/32.02 [5117]~P1981(x51171)+P1977(x51171)
% 32.24/32.02 [5118]~P1979(x51181)+P1978(x51181)
% 32.24/32.02 [5119]~P1967(x51191)+P1966(x51191)
% 32.24/32.02 [5120]~P1972(x51201)+P1966(x51201)
% 32.24/32.02 [5121]~P1968(x51211)+P1967(x51211)
% 32.24/32.02 [5122]~P1963(x51221)+P1967(x51221)
% 32.24/32.02 [5123]~P1972(x51231)+P1923(x51231)
% 32.24/32.02 [5124]~P1972(x51241)+P1935(x51241)
% 32.24/32.02 [5125]~P1932(x51251)+P1935(x51251)
% 32.24/32.02 [5126]~P1965(x51261)+P1968(x51261)
% 32.24/32.02 [5127]~P1964(x51271)+P1968(x51271)
% 32.24/32.02 [5128]~P1963(x51281)+P1973(x51281)
% 32.24/32.02 [5129]~P1973(x51291)+P1933(x51291)
% 32.24/32.02 [5130]~P1971(x51301)+P1933(x51301)
% 32.24/32.02 [5131]~P1970(x51311)+P1933(x51311)
% 32.24/32.02 [5132]~P1934(x51321)+P1933(x51321)
% 32.24/32.02 [5133]~P1973(x51331)+P525(x51331)
% 32.24/32.02 [5134]~P1971(x51341)+P525(x51341)
% 32.24/32.02 [5135]~P1970(x51351)+P525(x51351)
% 32.24/32.02 [5136]~P1934(x51361)+P525(x51361)
% 32.24/32.02 [5137]~P1931(x51371)+P525(x51371)
% 32.24/32.02 [5138]~P1930(x51381)+P525(x51381)
% 32.24/32.02 [5139]~P1921(x51391)+P525(x51391)
% 32.24/32.02 [5140]~P679(x51401)+P525(x51401)
% 32.24/32.02 [5141]~P671(x51411)+P525(x51411)
% 32.24/32.02 [5142]~P667(x51421)+P525(x51421)
% 32.24/32.02 [5143]~P662(x51431)+P525(x51431)
% 32.24/32.02 [5144]~P658(x51441)+P525(x51441)
% 32.24/32.02 [5145]~P649(x51451)+P525(x51451)
% 32.24/32.02 [5146]~P632(x51461)+P525(x51461)
% 32.24/32.02 [5147]~P1964(x51471)+P1971(x51471)
% 32.24/32.02 [5148]~P1965(x51481)+P1970(x51481)
% 32.24/32.02 [5149]~P2528(x51491)+P2518(x51491)
% 32.24/32.02 [5150]~P634(x51501)+P2518(x51501)
% 32.24/32.02 [5151]~P2518(x51511)+P2528(x51511)
% 32.24/32.02 [5152]~P2535(x51521)+P2553(x51521)
% 32.24/32.02 [5153]~P1936(x51531)+P1924(x51531)
% 32.24/32.02 [5154]~P1925(x51541)+P1947(x51541)
% 32.24/32.02 [5155]~P1957(x51551)+P1947(x51551)
% 32.24/32.02 [5156]~P1906(x51561)+P1958(x51561)
% 32.24/32.02 [5157]~P1957(x51571)+P1958(x51571)
% 32.24/32.02 [5158]~P1959(x51581)+P1958(x51581)
% 32.24/32.02 [5159]~P1957(x51591)+P1955(x51591)
% 32.24/32.02 [5160]~P1959(x51601)+P1944(x51601)
% 32.24/32.02 [5161]~P1959(x51611)+P1956(x51611)
% 32.24/32.02 [5162]~P296(x51621)+P1899(x51621)
% 32.24/32.02 [5163]~P1544(x51631)+P1948(x51631)
% 32.24/32.02 [5164]~P1523(x51641)+P1544(x51641)
% 32.24/32.02 [5165]~P328(x51651)+P1544(x51651)
% 32.24/32.02 [5166]~P1948(x51661)+P1544(x51661)
% 32.24/32.02 [5167]~P2451(x51671)+P1544(x51671)
% 32.24/32.02 [5168]~P2555(x51681)+P1544(x51681)
% 32.24/32.02 [5169]~P425(x51691)+P1544(x51691)
% 32.24/32.02 [5170]~P2420(x51701)+P1544(x51701)
% 32.24/32.02 [5171]~P840(x51711)+P1544(x51711)
% 32.24/32.02 [5172]~P1944(x51721)+P1945(x51721)
% 32.24/32.02 [5173]~P1946(x51731)+P1945(x51731)
% 32.24/32.02 [5174]~P1944(x51741)+P1926(x51741)
% 32.24/32.02 [5175]~P1910(x51751)+P1907(x51751)
% 32.24/32.02 [5176]~P1936(x51761)+P1937(x51761)
% 32.24/32.02 [5177]~P1906(x51771)+P1937(x51771)
% 32.24/32.02 [5178]~P1906(x51781)+P1927(x51781)
% 32.24/32.02 [5179]~P1907(x51791)+P1910(x51791)
% 32.24/32.02 [5180]~P1911(x51801)+P1910(x51801)
% 32.24/32.02 [5181]~P2155(x51811)+P1911(x51811)
% 32.24/32.02 [5182]~P1910(x51821)+P1911(x51821)
% 32.24/32.02 [5183]~P1938(x51831)+P1911(x51831)
% 32.24/32.02 [5184]~P1939(x51841)+P1938(x51841)
% 32.24/32.02 [5185]~P1940(x51851)+P1939(x51851)
% 32.24/32.02 [5186]~P1941(x51861)+P1940(x51861)
% 32.24/32.02 [5187]~P1942(x51871)+P1941(x51871)
% 32.24/32.02 [5188]~P1918(x51881)+P1912(x51881)
% 32.24/32.02 [5189]~P1932(x51891)+P1912(x51891)
% 32.24/32.02 [5190]~P1919(x51901)+P1918(x51901)
% 32.24/32.02 [5191]~P1928(x51911)+P1918(x51911)
% 32.24/32.02 [5192]~P1920(x51921)+P1919(x51921)
% 32.24/32.02 [5193]~P1929(x51931)+P1919(x51931)
% 32.24/32.02 [5194]~P1928(x51941)+P1934(x51941)
% 32.24/32.02 [5195]~P1933(x51951)+P631(x51951)
% 32.24/32.02 [5196]~P645(x51961)+P631(x51961)
% 32.24/32.02 [5197]~P633(x51971)+P631(x51971)
% 32.24/32.02 [5198]~P1933(x51981)+P199(x51981)
% 32.24/32.02 [5199]~P1922(x51991)+P199(x51991)
% 32.24/32.02 [5200]~P287(x52001)+P199(x52001)
% 32.24/32.02 [5201]~P1909(x52011)+P1920(x52011)
% 32.24/32.02 [5202]~P1908(x52021)+P1920(x52021)
% 32.24/32.02 [5203]~P1929(x52031)+P1931(x52031)
% 32.24/32.02 [5204]~P1931(x52041)+P1922(x52041)
% 32.24/32.02 [5205]~P1930(x52051)+P1922(x52051)
% 32.24/32.02 [5206]~P1921(x52061)+P1922(x52061)
% 32.24/32.02 [5207]~P1908(x52071)+P1930(x52071)
% 32.24/32.02 [5208]~P1909(x52081)+P1921(x52081)
% 32.24/32.02 [5209]~P1922(x52091)+P645(x52091)
% 32.24/32.02 [5210]~P650(x52101)+P645(x52101)
% 32.24/32.02 [5211]~P158(x52111)+P296(x52111)
% 32.24/32.02 [5212]~P1830(x52121)+P296(x52121)
% 32.24/32.02 [5213]~P1899(x52131)+P296(x52131)
% 32.24/32.02 [5214]~P2449(x52141)+P296(x52141)
% 32.24/32.02 [5215]~P308(x52151)+P296(x52151)
% 32.24/32.02 [5216]~P2554(x52161)+P296(x52161)
% 32.24/32.02 [5217]~P426(x52171)+P296(x52171)
% 32.24/32.02 [5218]~P1903(x52181)+P1901(x52181)
% 32.24/32.02 [5219]~P1743(x52191)+P1703(x52191)
% 32.24/32.02 [5220]~P163(x52201)+P2585(x52201)
% 32.24/32.03 [5221]~P1901(x52211)+P1903(x52211)
% 32.24/32.03 [5222]~P1903(x52221)+P1900(x52221)
% 32.24/32.03 [5223]~P199(x52231)+P1904(x52231)
% 32.24/32.03 [5224]~P1903(x52241)+P1904(x52241)
% 32.24/32.03 [5225]~P2542(x52251)+P1904(x52251)
% 32.24/32.03 [5226]~P703(x52261)+P2542(x52261)
% 32.24/32.03 [5227]~P701(x52271)+P2542(x52271)
% 32.24/32.03 [5228]~P700(x52281)+P2542(x52281)
% 32.24/32.03 [5229]~P699(x52291)+P2542(x52291)
% 32.24/32.03 [5230]~P698(x52301)+P2542(x52301)
% 32.24/32.03 [5231]~P696(x52311)+P2542(x52311)
% 32.24/32.03 [5232]~P695(x52321)+P2542(x52321)
% 32.24/32.03 [5233]~P178(x52331)+P171(x52331)
% 32.24/32.03 [5234]~P1703(x52341)+P1743(x52341)
% 32.24/32.03 [5235]~P1761(x52351)+P1744(x52351)
% 32.24/32.03 [5236]~P1744(x52361)+P1761(x52361)
% 32.24/32.03 [5237]~P1768(x52371)+P1761(x52371)
% 32.24/32.03 [5238]~P1812(x52381)+P1761(x52381)
% 32.24/32.03 [5239]~P1799(x52391)+P1768(x52391)
% 32.24/32.03 [5240]~P1811(x52401)+P1768(x52401)
% 32.24/32.03 [5241]~P1813(x52411)+P1812(x52411)
% 32.24/32.03 [5242]~P1812(x52421)+P1813(x52421)
% 32.24/32.03 [5243]~P97(x52431)+P1813(x52431)
% 32.24/32.03 [5244]~P296(x52441)+P2449(x52441)
% 32.24/32.03 [5245]~P1544(x52451)+P2451(x52451)
% 32.24/32.03 [5246]~P2523(x52461)+P2521(x52461)
% 32.24/32.03 [5247]~P2509(x52471)+P2461(x52471)
% 32.24/32.03 [5248]~P2468(x52481)+P2461(x52481)
% 32.24/32.03 [5249]~P101(x52491)+P1861(x52491)
% 32.24/32.03 [5250]~P1888(x52501)+P1884(x52501)
% 32.24/32.03 [5251]~P1885(x52511)+P1884(x52511)
% 32.24/32.03 [5252]~P1889(x52521)+P1884(x52521)
% 32.24/32.03 [5253]~P1885(x52531)+P1890(x52531)
% 32.24/32.03 [5254]~P1881(x52541)+P1880(x52541)
% 32.24/32.03 [5255]~P1874(x52551)+P1880(x52551)
% 32.24/32.03 [5256]~P1886(x52561)+P1880(x52561)
% 32.24/32.03 [5257]~P1881(x52571)+P1887(x52571)
% 32.24/32.03 [5258]~P1832(x52581)+P1887(x52581)
% 32.24/32.03 [5259]~P1833(x52591)+P1832(x52591)
% 32.24/32.03 [5260]~P1877(x52601)+P1876(x52601)
% 32.24/32.03 [5261]~P1875(x52611)+P1876(x52611)
% 32.24/32.03 [5262]~P1882(x52621)+P1876(x52621)
% 32.24/32.03 [5263]~P1877(x52631)+P1883(x52631)
% 32.24/32.03 [5264]~P1833(x52641)+P1883(x52641)
% 32.24/32.03 [5265]~P1834(x52651)+P1833(x52651)
% 32.24/32.03 [5266]~P1871(x52661)+P1870(x52661)
% 32.24/32.03 [5267]~P1835(x52671)+P1870(x52671)
% 32.24/32.03 [5268]~P1878(x52681)+P1870(x52681)
% 32.24/32.03 [5269]~P1871(x52691)+P1879(x52691)
% 32.24/32.03 [5270]~P1834(x52701)+P1879(x52701)
% 32.24/32.03 [5271]~P97(x52711)+P1818(x52711)
% 32.24/32.03 [5272]~P68(x52721)+P130(x52721)
% 32.24/32.03 [5273]~P1865(x52731)+P1862(x52731)
% 32.24/32.03 [5274]~P1863(x52741)+P1862(x52741)
% 32.24/32.03 [5275]~P1863(x52751)+P1866(x52751)
% 32.24/32.03 [5276]~P1845(x52761)+P1866(x52761)
% 32.24/32.03 [5277]~P1846(x52771)+P1845(x52771)
% 32.24/32.03 [5278]~P1859(x52781)+P1858(x52781)
% 32.24/32.03 [5279]~P1842(x52791)+P1858(x52791)
% 32.24/32.03 [5280]~P1859(x52801)+P1864(x52801)
% 32.24/32.03 [5281]~P1836(x52811)+P1864(x52811)
% 32.24/32.03 [5282]~P1847(x52821)+P1864(x52821)
% 32.24/32.03 [5283]~P1841(x52831)+P1836(x52831)
% 32.24/32.03 [5284]~P1846(x52841)+P1836(x52841)
% 32.24/32.03 [5285]~P1841(x52851)+P1847(x52851)
% 32.24/32.03 [5286]~P1855(x52861)+P1854(x52861)
% 32.24/32.03 [5287]~P1843(x52871)+P1854(x52871)
% 32.24/32.03 [5288]~P1855(x52881)+P1860(x52881)
% 32.24/32.03 [5289]~P1837(x52891)+P1860(x52891)
% 32.24/32.03 [5290]~P1848(x52901)+P1860(x52901)
% 32.24/32.03 [5291]~P1840(x52911)+P1837(x52911)
% 32.24/32.03 [5292]~P1841(x52921)+P1837(x52921)
% 32.24/32.03 [5293]~P1840(x52931)+P1848(x52931)
% 32.24/32.03 [5294]~P1850(x52941)+P1849(x52941)
% 32.24/32.03 [5295]~P1844(x52951)+P1849(x52951)
% 32.24/32.03 [5296]~P1850(x52961)+P1856(x52961)
% 32.24/32.03 [5297]~P1838(x52971)+P1856(x52971)
% 32.24/32.03 [5298]~P1851(x52981)+P1856(x52981)
% 32.24/32.03 [5299]~P1839(x52991)+P1838(x52991)
% 32.24/32.03 [5300]~P1840(x53001)+P1838(x53001)
% 32.24/32.03 [5301]~P1839(x53011)+P1851(x53011)
% 32.24/32.03 [5302]~P1826(x53021)+P1825(x53021)
% 32.24/32.03 [5303]~P1817(x53031)+P1825(x53031)
% 32.24/32.03 [5304]~P1826(x53041)+P1852(x53041)
% 32.24/32.03 [5305]~P1816(x53051)+P1852(x53051)
% 32.24/32.03 [5306]~P1853(x53061)+P1852(x53061)
% 32.24/32.03 [5307]~P1839(x53071)+P1816(x53071)
% 32.24/32.03 [5308]~P1808(x53081)+P1799(x53081)
% 32.24/32.03 [5309]~P998(x53091)+P1799(x53091)
% 32.24/32.03 [5310]~P1811(x53101)+P1745(x53101)
% 32.24/32.03 [5311]~P1748(x53111)+P1745(x53111)
% 32.24/32.03 [5312]~P1811(x53121)+P1749(x53121)
% 32.24/32.03 [5313]~P1751(x53131)+P1749(x53131)
% 32.24/32.03 [5314]~P1808(x53141)+P1809(x53141)
% 32.24/32.03 [5315]~P1808(x53151)+P1795(x53151)
% 32.24/32.03 [5316]~P998(x53161)+P807(x53161)
% 32.24/32.03 [5317]~P814(x53171)+P807(x53171)
% 32.24/32.03 [5318]~P1809(x53181)+P1782(x53181)
% 32.24/32.03 [5319]~P1809(x53191)+P2394(x53191)
% 32.24/32.03 [5320]~P782(x53201)+P2394(x53201)
% 32.24/32.03 [5321]~P2406(x53211)+P2394(x53211)
% 32.24/32.03 [5322]~P1749(x53221)+P1751(x53221)
% 32.24/32.03 [5323]~P1752(x53231)+P1751(x53231)
% 32.24/32.03 [5324]~P1751(x53241)+P1752(x53241)
% 32.24/32.03 [5325]~P1753(x53251)+P1752(x53251)
% 32.24/32.03 [5326]~P1752(x53261)+P1753(x53261)
% 32.24/32.03 [5327]~P1754(x53271)+P1753(x53271)
% 32.24/32.03 [5328]~P1753(x53281)+P1754(x53281)
% 32.24/32.03 [5329]~P811(x53291)+P1756(x53291)
% 32.24/32.03 [5330]~P1783(x53301)+P1800(x53301)
% 32.24/32.03 [5331]~P1806(x53311)+P1801(x53311)
% 32.24/32.03 [5332]~P1762(x53321)+P1783(x53321)
% 32.24/32.03 [5333]~P1762(x53331)+P1784(x53331)
% 32.24/32.03 [5334]~P1801(x53341)+P1806(x53341)
% 32.24/32.03 [5335]~P1762(x53351)+P1806(x53351)
% 32.24/32.03 [5336]~P1783(x53361)+P1762(x53361)
% 32.24/32.03 [5337]~P1784(x53371)+P1762(x53371)
% 32.24/32.03 [5338]~P1806(x53381)+P1762(x53381)
% 32.24/32.03 [5339]~P1756(x53391)+P1769(x53391)
% 32.24/32.03 [5340]~P1775(x53401)+P1769(x53401)
% 32.24/32.03 [5341]~P1778(x53411)+P1777(x53411)
% 32.24/32.03 [5342]~P1775(x53421)+P1777(x53421)
% 32.24/32.03 [5343]~P1798(x53431)+P1777(x53431)
% 32.24/32.03 [5344]~P1775(x53441)+P1796(x53441)
% 32.24/32.03 [5345]~P1798(x53451)+P1758(x53451)
% 32.24/32.03 [5346]~P1793(x53461)+P1758(x53461)
% 32.24/32.03 [5347]~P1788(x53471)+P1758(x53471)
% 32.24/32.03 [5348]~P1798(x53481)+P1797(x53481)
% 32.24/32.03 [5349]~P1778(x53491)+P1767(x53491)
% 32.24/32.03 [5350]~P880(x53501)+P1767(x53501)
% 32.24/32.03 [5351]~P1778(x53511)+P1779(x53511)
% 32.24/32.03 [5352]~P1780(x53521)+P1779(x53521)
% 32.24/32.03 [5353]~P1789(x53531)+P1779(x53531)
% 32.24/32.03 [5354]~P1781(x53541)+P1780(x53541)
% 32.24/32.03 [5355]~P1785(x53551)+P1780(x53551)
% 32.24/32.03 [5356]~P1783(x53561)+P1791(x53561)
% 32.24/32.03 [5357]~P1789(x53571)+P1791(x53571)
% 32.24/32.03 [5358]~P1793(x53581)+P1791(x53581)
% 32.24/32.03 [5359]~P1789(x53591)+P1794(x53591)
% 32.24/32.03 [5360]~P1793(x53601)+P1792(x53601)
% 32.24/32.03 [5361]~P1785(x53611)+P1786(x53611)
% 32.24/32.03 [5362]~P1784(x53621)+P1786(x53621)
% 32.24/32.03 [5363]~P1788(x53631)+P1786(x53631)
% 32.24/32.03 [5364]~P1785(x53641)+P1790(x53641)
% 32.24/32.03 [5365]~P1788(x53651)+P1787(x53651)
% 32.24/32.03 [5366]~P963(x53661)+P1770(x53661)
% 32.24/32.03 [5367]~P1770(x53671)+P963(x53671)
% 32.24/32.03 [5368]~P964(x53681)+P963(x53681)
% 32.24/32.03 [5369]~P965(x53691)+P963(x53691)
% 32.24/32.03 [5370]~P1767(x53701)+P880(x53701)
% 32.24/32.03 [5371]~P878(x53711)+P880(x53711)
% 32.24/32.03 [5372]~P881(x53721)+P880(x53721)
% 32.24/32.03 [5373]~P75(x53731)+P139(x53731)
% 32.24/32.03 [5374]~P868(x53741)+P866(x53741)
% 32.24/32.03 [5375]~P1756(x53751)+P811(x53751)
% 32.24/32.03 [5376]~P813(x53761)+P811(x53761)
% 32.24/32.03 [5377]~P1745(x53771)+P1748(x53771)
% 32.24/32.03 [5378]~P1750(x53781)+P1748(x53781)
% 32.24/32.03 [5379]~P1748(x53791)+P1750(x53791)
% 32.24/32.03 [5380]~P998(x53801)+P1734(x53801)
% 32.24/32.03 [5381]~P1735(x53811)+P1734(x53811)
% 32.24/32.03 [5382]~P1736(x53821)+P1734(x53821)
% 32.24/32.03 [5383]~P1737(x53831)+P1735(x53831)
% 32.24/32.03 [5384]~P1738(x53841)+P1735(x53841)
% 32.24/32.03 [5385]~P1736(x53851)+P1739(x53851)
% 32.24/32.03 [5386]~P1736(x53861)+P1746(x53861)
% 32.24/32.03 [5387]~P108(x53871)+P1746(x53871)
% 32.24/32.03 [5388]~P1669(x53881)+P1728(x53881)
% 32.24/32.03 [5389]~P1733(x53891)+P1728(x53891)
% 32.24/32.03 [5390]~P782(x53901)+P2444(x53901)
% 32.24/32.03 [5391]~P109(x53911)+P1704(x53911)
% 32.24/32.03 [5392]~P1714(x53921)+P1712(x53921)
% 32.24/32.03 [5393]~P1715(x53931)+P1712(x53931)
% 32.24/32.03 [5394]~P1715(x53941)+P1717(x53941)
% 32.24/32.03 [5395]~P1718(x53951)+P1717(x53951)
% 32.24/32.03 [5396]~P1719(x53961)+P1717(x53961)
% 32.24/32.03 [5397]~P1719(x53971)+P1720(x53971)
% 32.24/32.03 [5398]~P1721(x53981)+P1720(x53981)
% 32.24/32.03 [5399]~P1722(x53991)+P1720(x53991)
% 32.24/32.03 [5400]~P1722(x54001)+P1723(x54001)
% 32.24/32.03 [5401]~P1724(x54011)+P1723(x54011)
% 32.24/32.03 [5402]~P1725(x54021)+P1723(x54021)
% 32.24/32.03 [5403]~P1725(x54031)+P1726(x54031)
% 32.24/32.03 [5404]~P109(x54041)+P1654(x54041)
% 32.24/32.03 [5405]~P110(x54051)+P1661(x54051)
% 32.24/32.03 [5406]~P1706(x54061)+P1705(x54061)
% 32.24/32.03 [5407]~P1562(x54071)+P1705(x54071)
% 32.24/32.03 [5408]~P1635(x54081)+P1705(x54081)
% 32.24/32.03 [5409]~P1706(x54091)+P1708(x54091)
% 32.24/32.03 [5410]~P1655(x54101)+P1562(x54101)
% 32.24/32.03 [5411]~P1700(x54111)+P1699(x54111)
% 32.24/32.03 [5412]~P1672(x54121)+P1699(x54121)
% 32.24/32.03 [5413]~P1702(x54131)+P1699(x54131)
% 32.24/32.03 [5414]~P1700(x54141)+P1707(x54141)
% 32.24/32.03 [5415]~P1670(x54151)+P1707(x54151)
% 32.24/32.03 [5416]~P1673(x54161)+P1707(x54161)
% 32.24/32.03 [5417]~P1671(x54171)+P1670(x54171)
% 32.24/32.03 [5418]~P1671(x54181)+P1673(x54181)
% 32.24/32.03 [5419]~P1696(x54191)+P1695(x54191)
% 32.24/32.03 [5420]~P1674(x54201)+P1695(x54201)
% 32.24/32.03 [5421]~P1698(x54211)+P1695(x54211)
% 32.24/32.03 [5422]~P1696(x54221)+P1701(x54221)
% 32.24/32.03 [5423]~P1610(x54231)+P1701(x54231)
% 32.24/32.03 [5424]~P1675(x54241)+P1701(x54241)
% 32.24/32.03 [5425]~P1668(x54251)+P1610(x54251)
% 32.24/32.03 [5426]~P1671(x54261)+P1610(x54261)
% 32.24/32.03 [5427]~P1676(x54271)+P1610(x54271)
% 32.24/32.03 [5428]~P1668(x54281)+P1675(x54281)
% 32.24/32.03 [5429]~P1690(x54291)+P1689(x54291)
% 32.24/32.03 [5430]~P1679(x54301)+P1689(x54301)
% 32.24/32.03 [5431]~P1694(x54311)+P1689(x54311)
% 32.24/32.03 [5432]~P1690(x54321)+P1697(x54321)
% 32.24/32.03 [5433]~P1611(x54331)+P1697(x54331)
% 32.24/32.03 [5434]~P1680(x54341)+P1697(x54341)
% 32.24/32.03 [5435]~P1667(x54351)+P1611(x54351)
% 32.24/32.03 [5436]~P1668(x54361)+P1611(x54361)
% 32.24/32.03 [5437]~P1681(x54371)+P1611(x54371)
% 32.24/32.03 [5438]~P1667(x54381)+P1680(x54381)
% 32.24/32.03 [5439]~P1664(x54391)+P1663(x54391)
% 32.24/32.03 [5440]~P1613(x54401)+P1663(x54401)
% 32.24/32.03 [5441]~P1685(x54411)+P1663(x54411)
% 32.24/32.03 [5442]~P1664(x54421)+P1691(x54421)
% 32.24/32.03 [5443]~P1612(x54431)+P1691(x54431)
% 32.24/32.03 [5444]~P1684(x54441)+P1691(x54441)
% 32.24/32.03 [5445]~P1667(x54451)+P1612(x54451)
% 32.24/32.03 [5446]~P1686(x54461)+P1612(x54461)
% 32.24/32.03 [5447]~P1684(x54471)+P1692(x54471)
% 32.24/32.03 [5448]~P1553(x54481)+P1692(x54481)
% 32.24/32.03 [5449]~P1627(x54491)+P1692(x54491)
% 32.24/32.03 [5450]~P1684(x54501)+P1693(x54501)
% 32.24/32.03 [5451]~P1653(x54511)+P1553(x54511)
% 32.24/32.03 [5452]~P1680(x54521)+P1687(x54521)
% 32.24/32.03 [5453]~P1557(x54531)+P1687(x54531)
% 32.24/32.03 [5454]~P1631(x54541)+P1687(x54541)
% 32.24/32.03 [5455]~P1680(x54551)+P1688(x54551)
% 32.24/32.03 [5456]~P1656(x54561)+P1557(x54561)
% 32.24/32.03 [5457]~P1572(x54571)+P1557(x54571)
% 32.24/32.03 [5458]~P1675(x54581)+P1682(x54581)
% 32.24/32.03 [5459]~P1563(x54591)+P1682(x54591)
% 32.24/32.03 [5460]~P1636(x54601)+P1682(x54601)
% 32.24/32.03 [5461]~P1675(x54611)+P1683(x54611)
% 32.24/32.03 [5462]~P1657(x54621)+P1563(x54621)
% 32.24/32.03 [5463]~P1573(x54631)+P1563(x54631)
% 32.24/32.03 [5464]~P1673(x54641)+P1677(x54641)
% 32.24/32.03 [5465]~P1567(x54651)+P1677(x54651)
% 32.24/32.03 [5466]~P1640(x54661)+P1677(x54661)
% 32.24/32.03 [5467]~P1673(x54671)+P1678(x54671)
% 32.24/32.03 [5468]~P1655(x54681)+P1567(x54681)
% 32.24/32.03 [5469]~P1577(x54691)+P1567(x54691)
% 32.24/32.03 [5470]~P1641(x54701)+P1810(x54701)
% 32.24/32.03 [5471]~P1650(x54711)+P1810(x54711)
% 32.24/32.03 [5472]~P1584(x54721)+P1810(x54721)
% 32.24/32.03 [5473]~P1829(x54731)+P1810(x54731)
% 32.24/32.03 [5474]~P1650(x54741)+P1614(x54741)
% 32.24/32.03 [5475]~P1653(x54751)+P1656(x54751)
% 32.24/32.03 [5476]~P1656(x54761)+P1657(x54761)
% 32.24/32.03 [5477]~P1657(x54771)+P1655(x54771)
% 32.24/32.03 [5478]~P1641(x54781)+P1651(x54781)
% 32.24/32.03 [5479]~P109(x54791)+P1651(x54791)
% 32.24/32.03 [5480]~P1593(x54801)+P1008(x54801)
% 32.24/32.03 [5481]~P1533(x54811)+P981(x54811)
% 32.24/32.03 [5482]~P1409(x54821)+P1607(x54821)
% 32.24/32.03 [5483]~P1609(x54831)+P1607(x54831)
% 32.24/32.03 [5484]~P1584(x54841)+P1585(x54841)
% 32.24/32.03 [5485]~P1594(x54851)+P1585(x54851)
% 32.24/32.03 [5486]~P1635(x54861)+P1637(x54861)
% 32.24/32.03 [5487]~P1640(x54871)+P1637(x54871)
% 32.24/32.03 [5488]~P1638(x54881)+P1637(x54881)
% 32.24/32.03 [5489]~P1638(x54891)+P1642(x54891)
% 32.24/32.03 [5490]~P1636(x54901)+P1632(x54901)
% 32.24/32.03 [5491]~P1633(x54911)+P1632(x54911)
% 32.24/32.03 [5492]~P1625(x54921)+P1632(x54921)
% 32.24/32.03 [5493]~P1633(x54931)+P1639(x54931)
% 32.24/32.03 [5494]~P1615(x54941)+P1639(x54941)
% 32.24/32.03 [5495]~P1616(x54951)+P1615(x54951)
% 32.24/32.03 [5496]~P1631(x54961)+P1628(x54961)
% 32.24/32.03 [5497]~P1629(x54971)+P1628(x54971)
% 32.24/32.03 [5498]~P1626(x54981)+P1628(x54981)
% 32.24/32.03 [5499]~P1629(x54991)+P1634(x54991)
% 32.24/32.03 [5500]~P1616(x55001)+P1634(x55001)
% 32.24/32.03 [5501]~P1617(x55011)+P1616(x55011)
% 32.24/32.03 [5502]~P1627(x55021)+P1619(x55021)
% 32.24/32.03 [5503]~P1620(x55031)+P1619(x55031)
% 32.24/32.03 [5504]~P1618(x55041)+P1619(x55041)
% 32.24/32.03 [5505]~P1620(x55051)+P1630(x55051)
% 32.24/32.03 [5506]~P1617(x55061)+P1630(x55061)
% 32.24/32.03 [5507]~P1607(x55071)+P1596(x55071)
% 32.24/32.03 [5508]~P1604(x55081)+P1596(x55081)
% 32.24/32.03 [5509]~P1585(x55091)+P1604(x55091)
% 32.24/32.03 [5510]~P1593(x55101)+P1604(x55101)
% 32.24/32.03 [5511]~P1593(x55111)+P1608(x55111)
% 32.24/32.03 [5512]~P1594(x55121)+P1597(x55121)
% 32.24/32.03 [5513]~P1598(x55131)+P1597(x55131)
% 32.24/32.03 [5514]~P1599(x55141)+P1597(x55141)
% 32.24/32.03 [5515]~P1594(x55151)+P1600(x55151)
% 32.24/32.03 [5516]~P109(x55161)+P1600(x55161)
% 32.24/32.03 [5517]~P1584(x55171)+P1595(x55171)
% 32.24/32.03 [5518]~P1410(x55181)+P1534(x55181)
% 32.24/32.03 [5519]~P1535(x55191)+P1534(x55191)
% 32.24/32.03 [5520]~P1562(x55201)+P1586(x55201)
% 32.24/32.03 [5521]~P1587(x55211)+P1586(x55211)
% 32.24/32.03 [5522]~P1567(x55221)+P1590(x55221)
% 32.24/32.03 [5523]~P1587(x55231)+P1590(x55231)
% 32.24/32.03 [5524]~P1582(x55241)+P1581(x55241)
% 32.24/32.03 [5525]~P1575(x55251)+P1581(x55251)
% 32.24/32.03 [5526]~P1563(x55261)+P1588(x55261)
% 32.24/32.03 [5527]~P1582(x55271)+P1588(x55271)
% 32.24/32.03 [5528]~P1536(x55281)+P1588(x55281)
% 32.24/32.03 [5529]~P1573(x55291)+P1536(x55291)
% 32.24/32.03 [5530]~P1577(x55301)+P1536(x55301)
% 32.24/32.03 [5531]~P1579(x55311)+P1578(x55311)
% 32.24/32.03 [5532]~P1576(x55321)+P1578(x55321)
% 32.24/32.03 [5533]~P1557(x55331)+P1583(x55331)
% 32.24/32.03 [5534]~P1579(x55341)+P1583(x55341)
% 32.24/32.03 [5535]~P1537(x55351)+P1583(x55351)
% 32.24/32.03 [5536]~P1572(x55361)+P1537(x55361)
% 32.24/32.03 [5537]~P1573(x55371)+P1537(x55371)
% 32.24/32.03 [5538]~P1569(x55381)+P1568(x55381)
% 32.24/32.03 [5539]~P1539(x55391)+P1568(x55391)
% 32.24/32.03 [5540]~P1553(x55401)+P1580(x55401)
% 32.24/32.03 [5541]~P1569(x55411)+P1580(x55411)
% 32.24/32.03 [5542]~P1538(x55421)+P1580(x55421)
% 32.24/32.03 [5543]~P1572(x55431)+P1538(x55431)
% 32.24/32.03 [5544]~P1562(x55441)+P1564(x55441)
% 32.24/32.03 [5545]~P1567(x55451)+P1564(x55451)
% 32.24/32.03 [5546]~P1565(x55461)+P1564(x55461)
% 32.24/32.03 [5547]~P1565(x55471)+P1570(x55471)
% 32.24/32.03 [5548]~P1563(x55481)+P1558(x55481)
% 32.24/32.03 [5549]~P1559(x55491)+P1558(x55491)
% 32.24/32.03 [5550]~P1551(x55501)+P1558(x55501)
% 32.24/32.03 [5551]~P1559(x55511)+P1566(x55511)
% 32.24/32.03 [5552]~P1540(x55521)+P1566(x55521)
% 32.24/32.03 [5553]~P1541(x55531)+P1540(x55531)
% 32.24/32.03 [5554]~P1557(x55541)+P1554(x55541)
% 32.24/32.03 [5555]~P1555(x55551)+P1554(x55551)
% 32.24/32.03 [5556]~P1552(x55561)+P1554(x55561)
% 32.24/32.03 [5557]~P1555(x55571)+P1560(x55571)
% 32.24/32.03 [5558]~P1541(x55581)+P1560(x55581)
% 32.24/32.03 [5559]~P1542(x55591)+P1541(x55591)
% 32.24/32.03 [5560]~P1553(x55601)+P1545(x55601)
% 32.24/32.03 [5561]~P1546(x55611)+P1545(x55611)
% 32.24/32.03 [5562]~P1543(x55621)+P1545(x55621)
% 32.24/32.03 [5563]~P1546(x55631)+P1556(x55631)
% 32.24/32.03 [5564]~P1542(x55641)+P1556(x55641)
% 32.24/32.03 [5565]~P1534(x55651)+P1528(x55651)
% 32.24/32.03 [5566]~P1529(x55661)+P1528(x55661)
% 32.24/32.03 [5567]~P1533(x55671)+P1529(x55671)
% 32.24/32.03 [5568]~P1531(x55681)+P1529(x55681)
% 32.24/32.03 [5569]~P1533(x55691)+P1532(x55691)
% 32.24/32.03 [5570]~P1531(x55701)+P1020(x55701)
% 32.24/32.03 [5571]~P1531(x55711)+P1411(x55711)
% 32.24/32.03 [5572]~P1020(x55721)+P1037(x55721)
% 32.24/32.03 [5573]~P1038(x55731)+P1037(x55731)
% 32.24/32.03 [5574]~P1020(x55741)+P1524(x55741)
% 32.24/32.03 [5575]~P1462(x55751)+P1524(x55751)
% 32.24/32.03 [5576]~P1524(x55761)+P1462(x55761)
% 32.24/32.03 [5577]~P330(x55771)+P1413(x55771)
% 32.24/32.03 [5578]~P827(x55781)+P1474(x55781)
% 32.24/32.03 [5579]~P1474(x55791)+P827(x55791)
% 32.24/32.03 [5580]~P815(x55801)+P827(x55801)
% 32.24/32.03 [5581]~P840(x55811)+P827(x55811)
% 32.24/32.03 [5582]~P1477(x55821)+P1475(x55821)
% 32.24/32.03 [5583]~P1485(x55831)+P1478(x55831)
% 32.24/32.03 [5584]~P1486(x55841)+P1478(x55841)
% 32.24/32.03 [5585]~P1494(x55851)+P1487(x55851)
% 32.24/32.03 [5586]~P1495(x55861)+P1487(x55861)
% 32.24/32.03 [5587]~P1497(x55871)+P1496(x55871)
% 32.24/32.03 [5588]~P1498(x55881)+P1496(x55881)
% 32.24/32.03 [5589]~P1128(x55891)+P1479(x55891)
% 32.24/32.03 [5590]~P1504(x55901)+P1485(x55901)
% 32.24/32.03 [5591]~P1488(x55911)+P1485(x55911)
% 32.24/32.03 [5592]~P1505(x55921)+P1488(x55921)
% 32.24/32.03 [5593]~P1489(x55931)+P1488(x55931)
% 32.24/32.03 [5594]~P1504(x55941)+P1506(x55941)
% 32.24/32.03 [5595]~P1507(x55951)+P1506(x55951)
% 32.24/32.03 [5596]~P1508(x55961)+P1506(x55961)
% 32.24/32.03 [5597]~P1504(x55971)+P1454(x55971)
% 32.24/32.03 [5598]~P1446(x55981)+P1454(x55981)
% 32.24/32.03 [5599]~P1496(x55991)+P1489(x55991)
% 32.24/32.03 [5600]~P1490(x56001)+P1489(x56001)
% 32.24/32.03 [5601]~P1491(x56011)+P1490(x56011)
% 32.24/32.03 [5602]~P1487(x56021)+P1490(x56021)
% 32.24/32.03 [5603]~P1499(x56031)+P1497(x56031)
% 32.24/32.03 [5604]~P1500(x56041)+P1497(x56041)
% 32.24/32.03 [5605]~P1501(x56051)+P1499(x56051)
% 32.24/32.03 [5606]~P1502(x56061)+P1499(x56061)
% 32.24/32.03 [5607]~P1491(x56071)+P1493(x56071)
% 32.24/32.03 [5608]~P1491(x56081)+P663(x56081)
% 32.24/32.03 [5609]~P1129(x56091)+P663(x56091)
% 32.24/32.03 [5610]~P651(x56101)+P663(x56101)
% 32.24/32.03 [5611]~P672(x56111)+P663(x56111)
% 32.24/32.03 [5612]~P682(x56121)+P663(x56121)
% 32.24/32.03 [5613]~P1479(x56131)+P1128(x56131)
% 32.24/32.03 [5614]~P1124(x56141)+P1128(x56141)
% 32.24/32.03 [5615]~P1475(x56151)+P1477(x56151)
% 32.24/32.03 [5616]~P1480(x56161)+P1477(x56161)
% 32.24/32.03 [5617]~P1477(x56171)+P1480(x56171)
% 32.24/32.03 [5618]~P1121(x56181)+P1480(x56181)
% 32.24/32.03 [5619]~P1480(x56191)+P1121(x56191)
% 32.24/32.03 [5620]~P1413(x56201)+P330(x56201)
% 32.24/32.03 [5621]~P307(x56211)+P330(x56211)
% 32.24/32.03 [5622]~P426(x56221)+P330(x56221)
% 32.24/32.03 [5623]~P1037(x56231)+P1038(x56231)
% 32.24/32.03 [5624]~P1039(x56241)+P1038(x56241)
% 32.24/32.03 [5625]~P1038(x56251)+P1039(x56251)
% 32.24/32.03 [5626]~P1040(x56261)+P1039(x56261)
% 32.24/32.03 [5627]~P1039(x56271)+P1040(x56271)
% 32.24/32.03 [5628]~P1464(x56281)+P1463(x56281)
% 32.24/32.03 [5629]~P1447(x56291)+P1463(x56291)
% 32.24/32.03 [5630]~P1465(x56301)+P1464(x56301)
% 32.24/32.03 [5631]~P1466(x56311)+P1465(x56311)
% 32.24/32.03 [5632]~P1125(x56321)+P1465(x56321)
% 32.24/32.03 [5633]~P1121(x56331)+P1466(x56331)
% 32.24/32.03 [5634]~P1467(x56341)+P1466(x56341)
% 32.24/32.03 [5635]~P1126(x56351)+P1125(x56351)
% 32.24/32.03 [5636]~P1417(x56361)+P1125(x56361)
% 32.24/32.03 [5637]~P1469(x56371)+P1467(x56371)
% 32.24/32.03 [5638]~P330(x56381)+P307(x56381)
% 32.24/32.03 [5639]~P827(x56391)+P815(x56391)
% 32.24/32.03 [5640]~P1447(x56401)+P1455(x56401)
% 32.24/32.03 [5641]~P1447(x56411)+P1415(x56411)
% 32.24/32.03 [5642]~P1059(x56421)+P980(x56421)
% 32.24/32.03 [5643]~P1455(x56431)+P1042(x56431)
% 32.24/32.03 [5644]~P1448(x56441)+P1042(x56441)
% 32.24/32.03 [5645]~P1135(x56451)+P1042(x56451)
% 32.24/32.03 [5646]~P1114(x56461)+P1042(x56461)
% 32.24/32.03 [5647]~P1115(x56471)+P1042(x56471)
% 32.24/32.03 [5648]~P1116(x56481)+P1042(x56481)
% 32.24/32.03 [5649]~P1455(x56491)+P1452(x56491)
% 32.24/32.03 [5650]~P1453(x56501)+P1452(x56501)
% 32.24/32.03 [5651]~P1452(x56511)+P1453(x56511)
% 32.24/32.03 [5652]~P1446(x56521)+P1453(x56521)
% 32.24/32.03 [5653]~P1454(x56531)+P1446(x56531)
% 32.24/32.03 [5654]~P1453(x56541)+P1446(x56541)
% 32.24/32.03 [5655]~P1449(x56551)+P1448(x56551)
% 32.24/32.03 [5656]~P1449(x56561)+P1450(x56561)
% 32.24/32.03 [5657]~P1448(x56571)+P1081(x56571)
% 32.24/32.03 [5658]~P1136(x56581)+P1081(x56581)
% 32.24/32.03 [5659]~P1116(x56591)+P1081(x56591)
% 32.24/32.03 [5660]~P1101(x56601)+P1081(x56601)
% 32.24/32.03 [5661]~P1083(x56611)+P1081(x56611)
% 32.24/32.03 [5662]~P1417(x56621)+P1416(x56621)
% 32.24/32.03 [5663]~P1417(x56631)+P1130(x56631)
% 32.24/32.03 [5664]~P1418(x56641)+P1130(x56641)
% 32.24/32.03 [5665]~P1128(x56651)+P1124(x56651)
% 32.24/32.03 [5666]~P1418(x56661)+P1124(x56661)
% 32.24/32.03 [5667]~P1126(x56671)+P1418(x56671)
% 32.24/32.03 [5668]~P1126(x56681)+P1138(x56681)
% 32.24/32.03 [5669]~P1140(x56691)+P1138(x56691)
% 32.24/32.03 [5670]~P1138(x56701)+P1140(x56701)
% 32.24/32.03 [5671]~P1141(x56711)+P1140(x56711)
% 32.24/32.03 [5672]~P1140(x56721)+P1141(x56721)
% 32.24/32.03 [5673]~P1141(x56731)+P1419(x56731)
% 32.24/32.03 [5674]~P1419(x56741)+P1438(x56741)
% 32.24/32.03 [5675]~P1438(x56751)+P1439(x56751)
% 32.24/32.03 [5676]~P1439(x56761)+P1440(x56761)
% 32.24/32.03 [5677]~P1440(x56771)+P1441(x56771)
% 32.24/32.03 [5678]~P1441(x56781)+P1442(x56781)
% 32.24/32.03 [5679]~P1442(x56791)+P1443(x56791)
% 32.24/32.03 [5680]~P1377(x56801)+P1382(x56801)
% 32.24/32.03 [5681]~P1382(x56811)+P1403(x56811)
% 32.24/32.03 [5682]~P1404(x56821)+P1403(x56821)
% 32.24/32.03 [5683]~P1391(x56831)+P1403(x56831)
% 32.24/32.03 [5684]~P1404(x56841)+P1406(x56841)
% 32.24/32.03 [5685]~P1349(x56851)+P1406(x56851)
% 32.24/32.03 [5686]~P1387(x56861)+P1349(x56861)
% 32.24/32.03 [5687]~P1399(x56871)+P1398(x56871)
% 32.24/32.03 [5688]~P1392(x56881)+P1398(x56881)
% 32.24/32.03 [5689]~P1400(x56891)+P1398(x56891)
% 32.24/32.03 [5690]~P1399(x56901)+P1405(x56901)
% 32.24/32.03 [5691]~P1350(x56911)+P1405(x56911)
% 32.24/32.03 [5692]~P1387(x56921)+P1405(x56921)
% 32.24/32.03 [5693]~P1375(x56931)+P1350(x56931)
% 32.24/32.03 [5694]~P1375(x56941)+P1387(x56941)
% 32.24/32.03 [5695]~P1353(x56951)+P1352(x56951)
% 32.24/32.03 [5696]~P1351(x56961)+P1352(x56961)
% 32.24/32.03 [5697]~P1376(x56971)+P1352(x56971)
% 32.24/32.03 [5698]~P1353(x56981)+P1396(x56981)
% 32.24/32.03 [5699]~P1393(x56991)+P1396(x56991)
% 32.24/32.03 [5700]~P1375(x57001)+P1396(x57001)
% 32.24/32.03 [5701]~P1349(x57011)+P1395(x57011)
% 32.24/32.03 [5702]~P1382(x57021)+P1397(x57021)
% 32.24/32.03 [5703]~P1349(x57031)+P1397(x57031)
% 32.24/32.03 [5704]~P1383(x57041)+P1397(x57041)
% 32.24/32.03 [5705]~P1377(x57051)+P1383(x57051)
% 32.24/32.03 [5706]~P1350(x57061)+P1389(x57061)
% 32.24/32.03 [5707]~P1388(x57071)+P1389(x57071)
% 32.24/32.03 [5708]~P1350(x57081)+P1390(x57081)
% 32.24/32.03 [5709]~P1377(x57091)+P1390(x57091)
% 32.24/32.03 [5710]~P1384(x57101)+P1390(x57101)
% 32.24/32.03 [5711]~P1378(x57111)+P1377(x57111)
% 32.24/32.03 [5712]~P1378(x57121)+P1384(x57121)
% 32.24/32.03 [5713]~P1351(x57131)+P1380(x57131)
% 32.24/32.03 [5714]~P1379(x57141)+P1380(x57141)
% 32.24/32.03 [5715]~P1351(x57151)+P1385(x57151)
% 32.24/32.03 [5716]~P1378(x57161)+P1385(x57161)
% 32.24/32.03 [5717]~P1386(x57171)+P1385(x57171)
% 32.24/32.03 [5718]~P68(x57181)+P132(x57181)
% 32.24/32.03 [5719]~P68(x57191)+P126(x57191)
% 32.24/32.03 [5720]~P68(x57201)+P124(x57201)
% 32.24/32.03 [5721]~P68(x57211)+P125(x57211)
% 32.24/32.03 [5722]~P68(x57221)+P128(x57221)
% 32.24/32.03 [5723]~P68(x57231)+P133(x57231)
% 32.24/32.03 [5724]~P68(x57241)+P134(x57241)
% 32.24/32.03 [5725]~P68(x57251)+P135(x57251)
% 32.24/32.03 [5726]~P1130(x57261)+P1136(x57261)
% 32.24/32.03 [5727]~P1130(x57271)+P1111(x57271)
% 32.24/32.03 [5728]~P1136(x57281)+P1135(x57281)
% 32.24/32.03 [5729]~P1135(x57291)+P1131(x57291)
% 32.24/32.03 [5730]~P1132(x57301)+P1131(x57301)
% 32.24/32.03 [5731]~P1131(x57311)+P1132(x57311)
% 32.24/32.03 [5732]~P1134(x57321)+P1132(x57321)
% 32.24/32.03 [5733]~P1132(x57331)+P1134(x57331)
% 32.24/32.03 [5734]~P1129(x57341)+P1134(x57341)
% 32.24/32.03 [5735]~P1134(x57351)+P1129(x57351)
% 32.24/32.03 [5736]~P1129(x57361)+P1137(x57361)
% 32.24/32.03 [5737]~P1121(x57371)+P1123(x57371)
% 32.24/32.03 [5738]~P1121(x57381)+P1112(x57381)
% 32.24/32.03 [5739]~P1114(x57391)+P1122(x57391)
% 32.24/32.03 [5740]~P1115(x57401)+P1120(x57401)
% 32.24/32.03 [5741]~P1117(x57411)+P1116(x57411)
% 32.24/32.03 [5742]~P1117(x57421)+P1119(x57421)
% 32.24/32.03 [5743]~P1063(x57431)+P1101(x57431)
% 32.24/32.03 [5744]~P1063(x57441)+P1079(x57441)
% 32.24/32.03 [5745]~P1048(x57451)+P1035(x57451)
% 32.24/32.03 [5746]~P1101(x57461)+P1102(x57461)
% 32.24/32.03 [5747]~P1069(x57471)+P1068(x57471)
% 32.24/32.03 [5748]~P1081(x57481)+P1083(x57481)
% 32.24/32.03 [5749]~P1084(x57491)+P1083(x57491)
% 32.24/32.03 [5750]~P1083(x57501)+P1084(x57501)
% 32.24/32.03 [5751]~P1085(x57511)+P1084(x57511)
% 32.24/32.03 [5752]~P1087(x57521)+P1085(x57521)
% 32.24/32.03 [5753]~P1088(x57531)+P1087(x57531)
% 32.24/32.03 [5754]~P1089(x57541)+P1088(x57541)
% 32.24/32.03 [5755]~P1090(x57551)+P1089(x57551)
% 32.24/32.03 [5756]~P1091(x57561)+P1090(x57561)
% 32.24/32.03 [5757]~P1092(x57571)+P1091(x57571)
% 32.24/32.03 [5758]~P1094(x57581)+P1092(x57581)
% 32.24/32.03 [5759]~P1095(x57591)+P1094(x57591)
% 32.24/32.03 [5760]~P1096(x57601)+P1095(x57601)
% 32.24/32.03 [5761]~P1097(x57611)+P1096(x57611)
% 32.24/32.03 [5762]~P1098(x57621)+P1097(x57621)
% 32.24/32.03 [5763]~P1099(x57631)+P1098(x57631)
% 32.24/32.03 [5764]~P1100(x57641)+P1099(x57641)
% 32.24/32.03 [5765]~P1068(x57651)+P1069(x57651)
% 32.24/32.03 [5766]~P1070(x57661)+P1069(x57661)
% 32.24/32.03 [5767]~P1069(x57671)+P1070(x57671)
% 32.24/32.03 [5768]~P1071(x57681)+P1070(x57681)
% 32.24/32.03 [5769]~P1070(x57691)+P1071(x57691)
% 32.24/32.03 [5770]~P1072(x57701)+P1071(x57701)
% 32.24/32.03 [5771]~P1071(x57711)+P1072(x57711)
% 32.24/32.03 [5772]~P1073(x57721)+P1072(x57721)
% 32.24/32.03 [5773]~P1072(x57731)+P1073(x57731)
% 32.24/32.03 [5774]~P1074(x57741)+P1073(x57741)
% 32.24/32.03 [5775]~P1073(x57751)+P1074(x57751)
% 32.24/32.03 [5776]~P1075(x57761)+P1074(x57761)
% 32.24/32.03 [5777]~P1074(x57771)+P1075(x57771)
% 32.24/32.03 [5778]~P1076(x57781)+P1075(x57781)
% 32.24/32.03 [5779]~P1075(x57791)+P1076(x57791)
% 32.24/32.03 [5780]~P1077(x57801)+P1076(x57801)
% 32.24/32.03 [5781]~P1076(x57811)+P1077(x57811)
% 32.24/32.03 [5782]~P1052(x57821)+P1077(x57821)
% 32.24/32.03 [5783]~P1077(x57831)+P1052(x57831)
% 32.24/32.03 [5784]~P1044(x57841)+P1060(x57841)
% 32.24/32.03 [5785]~P1044(x57851)+P1062(x57851)
% 32.24/32.03 [5786]~P1059(x57861)+P1047(x57861)
% 32.24/32.03 [5787]~P1053(x57871)+P1047(x57871)
% 32.24/32.03 [5788]~P1060(x57881)+P1057(x57881)
% 32.24/32.03 [5789]~P1060(x57891)+P1056(x57891)
% 32.24/32.03 [5790]~P373(x57901)+P350(x57901)
% 32.24/32.03 [5791]~P1059(x57911)+P1058(x57911)
% 32.24/32.03 [5792]~P1035(x57921)+P1048(x57921)
% 32.24/32.03 [5793]~P1049(x57931)+P1048(x57931)
% 32.24/32.03 [5794]~P1048(x57941)+P1049(x57941)
% 32.24/32.03 [5795]~P1050(x57951)+P1049(x57951)
% 32.24/32.03 [5796]~P1049(x57961)+P1050(x57961)
% 32.24/32.03 [5797]~P981(x57971)+P1021(x57971)
% 32.24/32.03 [5798]~P1022(x57981)+P1021(x57981)
% 32.24/32.03 [5799]~P1023(x57991)+P1021(x57991)
% 32.24/32.03 [5800]~P2521(x58001)+P2523(x58001)
% 32.24/32.03 [5801]~P2444(x58011)+P2523(x58011)
% 32.24/32.03 [5802]~P1008(x58021)+P2523(x58021)
% 32.24/32.03 [5803]~P981(x58031)+P2523(x58031)
% 32.24/32.03 [5804]~P2524(x58041)+P2523(x58041)
% 32.24/32.03 [5805]~P1024(x58051)+P1022(x58051)
% 32.24/32.03 [5806]~P1026(x58061)+P1022(x58061)
% 32.24/32.03 [5807]~P1027(x58071)+P1024(x58071)
% 32.24/32.03 [5808]~P1028(x58081)+P1024(x58081)
% 32.24/32.03 [5809]~P1029(x58091)+P1027(x58091)
% 32.24/32.03 [5810]~P1030(x58101)+P1027(x58101)
% 32.24/32.03 [5811]~P1031(x58111)+P1029(x58111)
% 32.24/32.03 [5812]~P1032(x58121)+P1029(x58121)
% 32.24/32.03 [5813]~P1008(x58131)+P1012(x58131)
% 32.24/32.03 [5814]~P1013(x58141)+P1012(x58141)
% 32.24/32.03 [5815]~P1014(x58151)+P1012(x58151)
% 32.24/32.03 [5816]~P1015(x58161)+P1013(x58161)
% 32.24/32.03 [5817]~P1016(x58171)+P1013(x58171)
% 32.24/32.03 [5818]~P1017(x58181)+P1015(x58181)
% 32.24/32.03 [5819]~P1019(x58191)+P1015(x58191)
% 32.24/32.03 [5820]~P807(x58201)+P814(x58201)
% 32.24/32.03 [5821]~P816(x58211)+P814(x58211)
% 32.24/32.03 [5822]~P814(x58221)+P816(x58221)
% 32.24/32.03 [5823]~P817(x58231)+P816(x58231)
% 32.24/32.03 [5824]~P816(x58241)+P817(x58241)
% 32.24/32.03 [5825]~P818(x58251)+P817(x58251)
% 32.24/32.03 [5826]~P817(x58261)+P818(x58261)
% 32.24/32.03 [5827]~P811(x58271)+P813(x58271)
% 32.24/32.03 [5828]~P983(x58281)+P999(x58281)
% 32.24/32.03 [5829]~P1006(x58291)+P1000(x58291)
% 32.24/32.03 [5830]~P841(x58301)+P983(x58301)
% 32.24/32.03 [5831]~P841(x58311)+P984(x58311)
% 32.24/32.03 [5832]~P1000(x58321)+P1006(x58321)
% 32.24/32.03 [5833]~P841(x58331)+P1006(x58331)
% 32.24/32.03 [5834]~P983(x58341)+P841(x58341)
% 32.24/32.03 [5835]~P984(x58351)+P841(x58351)
% 32.24/32.03 [5836]~P1006(x58361)+P841(x58361)
% 32.24/32.03 [5837]~P813(x58371)+P966(x58371)
% 32.24/32.03 [5838]~P972(x58381)+P966(x58381)
% 32.24/32.03 [5839]~P975(x58391)+P974(x58391)
% 32.24/32.03 [5840]~P972(x58401)+P974(x58401)
% 32.24/32.03 [5841]~P996(x58411)+P974(x58411)
% 32.24/32.03 [5842]~P972(x58421)+P982(x58421)
% 32.24/32.03 [5843]~P996(x58431)+P836(x58431)
% 32.24/32.03 [5844]~P994(x58441)+P836(x58441)
% 32.24/32.03 [5845]~P988(x58451)+P836(x58451)
% 32.24/32.03 [5846]~P996(x58461)+P995(x58461)
% 32.24/32.03 [5847]~P880(x58471)+P878(x58471)
% 32.24/32.03 [5848]~P975(x58481)+P878(x58481)
% 32.24/32.03 [5849]~P975(x58491)+P976(x58491)
% 32.24/32.03 [5850]~P977(x58501)+P976(x58501)
% 32.24/32.03 [5851]~P989(x58511)+P976(x58511)
% 32.24/32.03 [5852]~P978(x58521)+P977(x58521)
% 32.24/32.03 [5853]~P985(x58531)+P977(x58531)
% 32.24/32.03 [5854]~P983(x58541)+P991(x58541)
% 32.24/32.03 [5855]~P989(x58551)+P991(x58551)
% 32.24/32.03 [5856]~P994(x58561)+P991(x58561)
% 32.24/32.03 [5857]~P989(x58571)+P997(x58571)
% 32.24/32.03 [5858]~P994(x58581)+P993(x58581)
% 32.24/32.03 [5859]~P985(x58591)+P986(x58591)
% 32.24/32.03 [5860]~P984(x58601)+P986(x58601)
% 32.24/32.03 [5861]~P988(x58611)+P986(x58611)
% 32.24/32.03 [5862]~P985(x58621)+P990(x58621)
% 32.24/32.03 [5863]~P988(x58631)+P987(x58631)
% 32.24/32.03 [5864]~P963(x58641)+P964(x58641)
% 32.24/32.03 [5865]~P963(x58651)+P965(x58651)
% 32.24/32.03 [5866]~P967(x58661)+P965(x58661)
% 32.24/32.03 [5867]~P965(x58671)+P967(x58671)
% 32.24/32.03 [5868]~P868(x58681)+P967(x58681)
% 32.24/32.03 [5869]~P866(x58691)+P868(x58691)
% 32.24/32.03 [5870]~P967(x58701)+P868(x58701)
% 32.24/32.03 [5871]~P869(x58711)+P868(x58711)
% 32.24/32.03 [5872]~P880(x58721)+P881(x58721)
% 32.24/32.03 [5873]~P882(x58731)+P881(x58731)
% 32.24/32.03 [5874]~P881(x58741)+P882(x58741)
% 32.24/32.03 [5875]~P882(x58751)+P883(x58751)
% 32.24/32.03 [5876]~P884(x58761)+P883(x58761)
% 32.24/32.03 [5877]~P882(x58771)+P937(x58771)
% 32.24/32.03 [5878]~P940(x58781)+P937(x58781)
% 32.24/32.03 [5879]~P937(x58791)+P940(x58791)
% 32.24/32.03 [5880]~P941(x58801)+P940(x58801)
% 32.24/32.03 [5881]~P940(x58811)+P941(x58811)
% 32.24/32.03 [5882]~P942(x58821)+P941(x58821)
% 32.24/32.03 [5883]~P941(x58831)+P942(x58831)
% 32.24/32.03 [5884]~P943(x58841)+P942(x58841)
% 32.24/32.03 [5885]~P942(x58851)+P943(x58851)
% 32.24/32.03 [5886]~P944(x58861)+P943(x58861)
% 32.24/32.03 [5887]~P943(x58871)+P944(x58871)
% 32.24/32.03 [5888]~P904(x58881)+P944(x58881)
% 32.24/32.03 [5889]~P944(x58891)+P904(x58891)
% 32.24/32.03 [5890]~P947(x58901)+P946(x58901)
% 32.24/32.03 [5891]~P946(x58911)+P947(x58911)
% 32.24/32.03 [5892]~P948(x58921)+P947(x58921)
% 32.24/32.03 [5893]~P947(x58931)+P948(x58931)
% 32.24/32.03 [5894]~P949(x58941)+P948(x58941)
% 32.24/32.03 [5895]~P948(x58951)+P949(x58951)
% 32.24/32.03 [5896]~P950(x58961)+P949(x58961)
% 32.24/32.03 [5897]~P949(x58971)+P950(x58971)
% 32.24/32.03 [5898]~P951(x58981)+P950(x58981)
% 32.24/32.03 [5899]~P950(x58991)+P951(x58991)
% 32.24/32.03 [5900]~P952(x59001)+P951(x59001)
% 32.24/32.03 [5901]~P951(x59011)+P952(x59011)
% 32.24/32.03 [5902]~P953(x59021)+P952(x59021)
% 32.24/32.03 [5903]~P952(x59031)+P953(x59031)
% 32.24/32.03 [5904]~P954(x59041)+P953(x59041)
% 32.24/32.03 [5905]~P953(x59051)+P954(x59051)
% 32.24/32.03 [5906]~P955(x59061)+P954(x59061)
% 32.24/32.03 [5907]~P954(x59071)+P955(x59071)
% 32.24/32.03 [5908]~P956(x59081)+P955(x59081)
% 32.24/32.03 [5909]~P955(x59091)+P956(x59091)
% 32.24/32.03 [5910]~P945(x59101)+P956(x59101)
% 32.24/32.03 [5911]~P956(x59111)+P945(x59111)
% 32.24/32.03 [5912]~P883(x59121)+P884(x59121)
% 32.24/32.03 [5913]~P885(x59131)+P884(x59131)
% 32.24/32.03 [5914]~P884(x59141)+P885(x59141)
% 32.24/32.03 [5915]~P886(x59151)+P885(x59151)
% 32.24/32.03 [5916]~P885(x59161)+P886(x59161)
% 32.24/32.03 [5917]~P887(x59171)+P886(x59171)
% 32.24/32.03 [5918]~P886(x59181)+P887(x59181)
% 32.24/32.03 [5919]~P180(x59191)+P887(x59191)
% 32.24/32.03 [5920]~P887(x59201)+P180(x59201)
% 32.24/32.03 [5921]~P939(x59211)+P938(x59211)
% 32.24/32.03 [5922]~P888(x59221)+P938(x59221)
% 32.24/32.03 [5923]~P939(x59231)+P890(x59231)
% 32.24/32.03 [5924]~P938(x59241)+P888(x59241)
% 32.24/32.03 [5925]~P828(x59251)+P851(x59251)
% 32.24/32.03 [5926]~P906(x59261)+P929(x59261)
% 32.24/32.03 [5927]~P929(x59271)+P906(x59271)
% 32.24/32.03 [5928]~P907(x59281)+P906(x59281)
% 32.24/32.03 [5929]~P891(x59291)+P889(x59291)
% 32.24/32.03 [5930]~P68(x59301)+P127(x59301)
% 32.24/32.03 [5931]~P906(x59311)+P907(x59311)
% 32.24/32.03 [5932]~P908(x59321)+P907(x59321)
% 32.24/32.03 [5933]~P907(x59331)+P908(x59331)
% 32.24/32.03 [5934]~P909(x59341)+P908(x59341)
% 32.24/32.03 [5935]~P908(x59351)+P909(x59351)
% 32.24/32.03 [5936]~P910(x59361)+P909(x59361)
% 32.24/32.03 [5937]~P909(x59371)+P910(x59371)
% 32.24/32.03 [5938]~P889(x59381)+P891(x59381)
% 32.24/32.03 [5939]~P892(x59391)+P891(x59391)
% 32.24/32.03 [5940]~P891(x59401)+P892(x59401)
% 32.24/32.03 [5941]~P893(x59411)+P892(x59411)
% 32.24/32.03 [5942]~P892(x59421)+P893(x59421)
% 32.24/32.03 [5943]~P894(x59431)+P893(x59431)
% 32.24/32.03 [5944]~P893(x59441)+P894(x59441)
% 32.24/32.03 [5945]~P895(x59451)+P894(x59451)
% 32.24/32.03 [5946]~P894(x59461)+P895(x59461)
% 32.24/32.03 [5947]~P896(x59471)+P895(x59471)
% 32.24/32.03 [5948]~P895(x59481)+P896(x59481)
% 32.24/32.03 [5949]~P897(x59491)+P896(x59491)
% 32.24/32.03 [5950]~P896(x59501)+P897(x59501)
% 32.24/32.03 [5951]~P899(x59511)+P897(x59511)
% 32.24/32.03 [5952]~P897(x59521)+P899(x59521)
% 32.24/32.03 [5953]~P900(x59531)+P899(x59531)
% 32.24/32.03 [5954]~P899(x59541)+P900(x59541)
% 32.24/32.03 [5955]~P901(x59551)+P900(x59551)
% 32.24/32.03 [5956]~P900(x59561)+P901(x59561)
% 32.24/32.03 [5957]~P155(x59571)+P901(x59571)
% 32.24/32.03 [5958]~P901(x59581)+P155(x59581)
% 32.24/32.03 [5959]~P868(x59591)+P869(x59591)
% 32.24/32.03 [5960]~P865(x59601)+P869(x59601)
% 32.24/32.03 [5961]~P157(x59611)+P865(x59611)
% 32.24/32.03 [5962]~P869(x59621)+P865(x59621)
% 32.24/32.03 [5963]~P851(x59631)+P828(x59631)
% 32.24/32.03 [5964]~P829(x59641)+P828(x59641)
% 32.24/32.03 [5965]~P834(x59651)+P828(x59651)
% 32.24/32.03 [5966]~P830(x59661)+P826(x59661)
% 32.24/32.03 [5967]~P826(x59671)+P830(x59671)
% 32.24/32.03 [5968]~P831(x59681)+P830(x59681)
% 32.24/32.03 [5969]~P830(x59691)+P831(x59691)
% 32.24/32.03 [5970]~P832(x59701)+P831(x59701)
% 32.24/32.03 [5971]~P831(x59711)+P832(x59711)
% 32.24/32.03 [5972]~P833(x59721)+P832(x59721)
% 32.24/32.03 [5973]~P832(x59731)+P833(x59731)
% 32.24/32.03 [5974]~P829(x59741)+P833(x59741)
% 32.24/32.03 [5975]~P828(x59751)+P829(x59751)
% 32.24/32.03 [5976]~P833(x59761)+P829(x59761)
% 32.24/32.03 [5977]~P828(x59771)+P834(x59771)
% 32.24/32.03 [5978]~P835(x59781)+P834(x59781)
% 32.24/32.03 [5979]~P834(x59791)+P835(x59791)
% 32.24/32.03 [5980]~P571(x59801)+P835(x59801)
% 32.24/32.03 [5981]~P835(x59811)+P571(x59811)
% 32.24/32.03 [5982]~P309(x59821)+P571(x59821)
% 32.24/32.03 [5983]~P1969(x59831)+P571(x59831)
% 32.24/32.03 [5984]~P426(x59841)+P571(x59841)
% 32.24/32.03 [5985]~P2392(x59851)+P571(x59851)
% 32.24/32.03 [5986]~P721(x59861)+P571(x59861)
% 32.24/32.03 [5987]~P767(x59871)+P783(x59871)
% 32.24/32.03 [5988]~P804(x59881)+P783(x59881)
% 32.24/32.03 [5989]~P1810(x59891)+P804(x59891)
% 32.24/32.03 [5990]~P782(x59901)+P804(x59901)
% 32.24/32.03 [5991]~P2444(x59911)+P784(x59911)
% 32.24/32.03 [5992]~P798(x59921)+P784(x59921)
% 32.24/32.03 [5993]~P799(x59931)+P784(x59931)
% 32.24/32.03 [5994]~P789(x59941)+P785(x59941)
% 32.24/32.03 [5995]~P786(x59951)+P785(x59951)
% 32.24/32.03 [5996]~P790(x59961)+P785(x59961)
% 32.24/32.03 [5997]~P786(x59971)+P791(x59971)
% 32.24/32.03 [5998]~P779(x59981)+P778(x59981)
% 32.24/32.03 [5999]~P777(x59991)+P778(x59991)
% 32.24/32.03 [6000]~P787(x60001)+P778(x60001)
% 32.24/32.03 [6001]~P779(x60011)+P788(x60011)
% 32.24/32.03 [6002]~P768(x60021)+P788(x60021)
% 32.24/32.03 [6003]~P769(x60031)+P768(x60031)
% 32.24/32.03 [6004]~P772(x60041)+P771(x60041)
% 32.24/32.03 [6005]~P770(x60051)+P771(x60051)
% 32.24/32.03 [6006]~P780(x60061)+P771(x60061)
% 32.24/32.03 [6007]~P772(x60071)+P781(x60071)
% 32.24/32.03 [6008]~P769(x60081)+P781(x60081)
% 32.24/32.03 [6009]~P2520(x60091)+P2524(x60091)
% 32.24/32.03 [6010]~P2523(x60101)+P2524(x60101)
% 32.24/32.03 [6011]~P773(x60111)+P2524(x60111)
% 32.24/32.03 [6012]~P760(x60121)+P754(x60121)
% 32.24/32.03 [6013]~P764(x60131)+P754(x60131)
% 32.24/32.03 [6014]~P761(x60141)+P760(x60141)
% 32.24/32.03 [6015]~P748(x60151)+P760(x60151)
% 32.24/32.03 [6016]~P764(x60161)+P524(x60161)
% 32.24/32.03 [6017]~P764(x60171)+P755(x60171)
% 32.24/32.03 [6018]~P751(x60181)+P755(x60181)
% 32.24/32.03 [6019]~P750(x60191)+P761(x60191)
% 32.24/32.03 [6020]~P749(x60201)+P761(x60201)
% 32.24/32.03 [6021]~P748(x60211)+P765(x60211)
% 32.24/32.03 [6022]~P765(x60221)+P384(x60221)
% 32.24/32.03 [6023]~P763(x60231)+P384(x60231)
% 32.24/32.03 [6024]~P762(x60241)+P384(x60241)
% 32.24/32.03 [6025]~P752(x60251)+P384(x60251)
% 32.24/32.03 [6026]~P402(x60261)+P384(x60261)
% 32.24/32.03 [6027]~P416(x60271)+P384(x60271)
% 32.24/32.03 [6028]~P414(x60281)+P384(x60281)
% 32.24/32.03 [6029]~P412(x60291)+P384(x60291)
% 32.24/32.03 [6030]~P397(x60301)+P384(x60301)
% 32.24/32.03 [6031]~P765(x60311)+P637(x60311)
% 32.24/32.03 [6032]~P763(x60321)+P637(x60321)
% 32.24/32.03 [6033]~P762(x60331)+P637(x60331)
% 32.24/32.03 [6034]~P752(x60341)+P637(x60341)
% 32.24/32.03 [6035]~P747(x60351)+P637(x60351)
% 32.24/32.03 [6036]~P746(x60361)+P637(x60361)
% 32.24/32.03 [6037]~P742(x60371)+P637(x60371)
% 32.24/32.03 [6038]~P749(x60381)+P763(x60381)
% 32.24/32.03 [6039]~P750(x60391)+P762(x60391)
% 32.24/32.03 [6040]~P739(x60401)+P738(x60401)
% 32.24/32.03 [6041]~P751(x60411)+P738(x60411)
% 32.24/32.03 [6042]~P740(x60421)+P739(x60421)
% 32.24/32.03 [6043]~P743(x60431)+P739(x60431)
% 32.24/32.03 [6044]~P741(x60441)+P740(x60441)
% 32.24/32.03 [6045]~P744(x60451)+P740(x60451)
% 32.24/32.03 [6046]~P743(x60461)+P752(x60461)
% 32.24/32.03 [6047]~P737(x60471)+P741(x60471)
% 32.24/32.03 [6048]~P745(x60481)+P741(x60481)
% 32.24/32.03 [6049]~P744(x60491)+P747(x60491)
% 32.24/32.03 [6050]~P747(x60501)+P402(x60501)
% 32.24/32.03 [6051]~P746(x60511)+P402(x60511)
% 32.24/32.03 [6052]~P742(x60521)+P402(x60521)
% 32.24/32.03 [6053]~P415(x60531)+P402(x60531)
% 32.24/32.03 [6054]~P413(x60541)+P402(x60541)
% 32.24/32.03 [6055]~P405(x60551)+P402(x60551)
% 32.24/32.03 [6056]~P745(x60561)+P746(x60561)
% 32.24/32.03 [6057]~P737(x60571)+P742(x60571)
% 32.24/32.03 [6058]~P416(x60581)+P286(x60581)
% 32.24/32.03 [6059]~P415(x60591)+P286(x60591)
% 32.24/32.03 [6060]~P414(x60601)+P286(x60601)
% 32.24/32.03 [6061]~P413(x60611)+P286(x60611)
% 32.24/32.03 [6062]~P412(x60621)+P286(x60621)
% 32.24/32.03 [6063]~P405(x60631)+P286(x60631)
% 32.24/32.03 [6064]~P397(x60641)+P286(x60641)
% 32.24/32.03 [6065]~P289(x60651)+P286(x60651)
% 32.24/32.03 [6066]~P2542(x60661)+P2544(x60661)
% 32.24/32.03 [6067]~P2545(x60671)+P2544(x60671)
% 32.24/32.03 [6068]~P281(x60681)+P2544(x60681)
% 32.24/32.03 [6069]~P2542(x60691)+P278(x60691)
% 32.24/32.03 [6070]~P282(x60701)+P278(x60701)
% 32.24/32.03 [6071]~P2544(x60711)+P2545(x60711)
% 32.24/32.03 [6072]~P2547(x60721)+P2545(x60721)
% 32.24/32.03 [6073]~P2545(x60731)+P2547(x60731)
% 32.24/32.03 [6074]~P2547(x60741)+P722(x60741)
% 32.24/32.03 [6075]~P2547(x60751)+P638(x60751)
% 32.24/32.03 [6076]~P271(x60761)+P202(x60761)
% 32.24/32.03 [6077]~P275(x60771)+P202(x60771)
% 32.24/32.03 [6078]~P1544(x60781)+P2555(x60781)
% 32.24/32.03 [6079]~P175(x60791)+P173(x60791)
% 32.24/32.03 [6080]~P728(x60801)+P723(x60801)
% 32.24/32.03 [6081]~P724(x60811)+P723(x60811)
% 32.24/32.03 [6082]~P729(x60821)+P723(x60821)
% 32.24/32.03 [6083]~P724(x60831)+P730(x60831)
% 32.24/32.03 [6084]~P718(x60841)+P717(x60841)
% 32.24/32.03 [6085]~P716(x60851)+P717(x60851)
% 32.24/32.03 [6086]~P725(x60861)+P717(x60861)
% 32.24/32.03 [6087]~P718(x60871)+P726(x60871)
% 32.24/32.03 [6088]~P639(x60881)+P726(x60881)
% 32.24/32.03 [6089]~P640(x60891)+P639(x60891)
% 32.24/32.03 [6090]~P705(x60901)+P704(x60901)
% 32.24/32.03 [6091]~P641(x60911)+P704(x60911)
% 32.24/32.03 [6092]~P719(x60921)+P704(x60921)
% 32.24/32.03 [6093]~P705(x60931)+P720(x60931)
% 32.24/32.03 [6094]~P640(x60941)+P720(x60941)
% 32.24/32.03 [6095]~P173(x60951)+P175(x60951)
% 32.24/32.03 [6096]~P176(x60961)+P175(x60961)
% 32.24/32.03 [6097]~P175(x60971)+P176(x60971)
% 32.24/32.03 [6098]~P706(x60981)+P176(x60981)
% 32.24/32.03 [6099]~P285(x60991)+P176(x60991)
% 32.24/32.03 [6100]~P2505(x61001)+P706(x61001)
% 32.24/32.03 [6101]~P712(x61011)+P706(x61011)
% 32.24/32.03 [6102]~P177(x61021)+P712(x61021)
% 32.24/32.03 [6103]~P279(x61031)+P712(x61031)
% 32.24/32.03 [6104]~P690(x61041)+P685(x61041)
% 32.24/32.03 [6105]~P642(x61051)+P685(x61051)
% 32.24/32.03 [6106]~P691(x61061)+P690(x61061)
% 32.24/32.03 [6107]~P673(x61071)+P690(x61071)
% 32.24/32.03 [6108]~P642(x61081)+P703(x61081)
% 32.24/32.03 [6109]~P703(x61091)+P633(x61091)
% 32.24/32.03 [6110]~P700(x61101)+P633(x61101)
% 32.24/32.03 [6111]~P698(x61111)+P633(x61111)
% 32.24/32.03 [6112]~P695(x61121)+P633(x61121)
% 32.24/32.03 [6113]~P679(x61131)+P633(x61131)
% 32.24/32.03 [6114]~P667(x61141)+P633(x61141)
% 32.24/32.03 [6115]~P658(x61151)+P633(x61151)
% 32.24/32.03 [6116]~P632(x61161)+P633(x61161)
% 32.24/32.03 [6117]~P692(x61171)+P691(x61171)
% 32.24/32.03 [6118]~P674(x61181)+P691(x61181)
% 32.24/32.03 [6119]~P673(x61191)+P701(x61191)
% 32.24/32.03 [6120]~P701(x61201)+P650(x61201)
% 32.24/32.03 [6121]~P699(x61211)+P650(x61211)
% 32.24/32.03 [6122]~P696(x61221)+P650(x61221)
% 32.24/32.03 [6123]~P671(x61231)+P650(x61231)
% 32.24/32.03 [6124]~P662(x61241)+P650(x61241)
% 32.24/32.03 [6125]~P649(x61251)+P650(x61251)
% 32.24/32.03 [6126]~P693(x61261)+P692(x61261)
% 32.24/32.03 [6127]~P675(x61271)+P692(x61271)
% 32.24/32.03 [6128]~P674(x61281)+P700(x61281)
% 32.24/32.03 [6129]~P694(x61291)+P693(x61291)
% 32.24/32.03 [6130]~P676(x61301)+P693(x61301)
% 32.24/32.03 [6131]~P675(x61311)+P699(x61311)
% 32.24/32.03 [6132]~P678(x61321)+P694(x61321)
% 32.24/32.03 [6133]~P677(x61331)+P694(x61331)
% 32.24/32.03 [6134]~P676(x61341)+P698(x61341)
% 32.24/32.03 [6135]~P677(x61351)+P696(x61351)
% 32.24/32.03 [6136]~P678(x61361)+P695(x61361)
% 32.24/32.03 [6137]~P327(x61371)+P686(x61371)
% 32.24/32.03 [6138]~P620(x61381)+P618(x61381)
% 32.24/32.03 [6139]~P643(x61391)+P618(x61391)
% 32.24/32.03 [6140]~P621(x61401)+P620(x61401)
% 32.24/32.03 [6141]~P644(x61411)+P620(x61411)
% 32.24/32.03 [6142]~P643(x61421)+P680(x61421)
% 32.24/32.03 [6143]~P681(x61431)+P680(x61431)
% 32.24/32.03 [6144]~P679(x61441)+P680(x61441)
% 32.24/32.03 [6145]~P615(x61451)+P681(x61451)
% 32.24/32.03 [6146]~P681(x61461)+P615(x61461)
% 32.24/32.03 [6147]~P669(x61471)+P615(x61471)
% 32.24/32.03 [6148]~P668(x61481)+P615(x61481)
% 32.24/32.03 [6149]~P652(x61491)+P615(x61491)
% 32.24/32.03 [6150]~P659(x61501)+P615(x61501)
% 32.24/32.03 [6151]~P646(x61511)+P615(x61511)
% 32.24/32.03 [6152]~P622(x61521)+P621(x61521)
% 32.24/32.03 [6153]~P661(x61531)+P621(x61531)
% 32.24/32.03 [6154]~P644(x61541)+P670(x61541)
% 32.24/32.03 [6155]~P669(x61551)+P670(x61551)
% 32.24/32.03 [6156]~P671(x61561)+P670(x61561)
% 32.24/32.03 [6157]~P623(x61571)+P622(x61571)
% 32.24/32.03 [6158]~P653(x61581)+P622(x61581)
% 32.24/32.03 [6159]~P661(x61591)+P665(x61591)
% 32.24/32.03 [6160]~P666(x61601)+P665(x61601)
% 32.24/32.03 [6161]~P667(x61611)+P665(x61611)
% 32.24/32.03 [6162]~P664(x61621)+P666(x61621)
% 32.24/32.03 [6163]~P668(x61631)+P666(x61631)
% 32.24/32.03 [6164]~P2155(x61641)+P664(x61641)
% 32.24/32.03 [6165]~P615(x61651)+P668(x61651)
% 32.24/32.03 [6166]~P624(x61661)+P623(x61661)
% 32.24/32.03 [6167]~P654(x61671)+P623(x61671)
% 32.24/32.03 [6168]~P653(x61681)+P660(x61681)
% 32.24/32.03 [6169]~P652(x61691)+P660(x61691)
% 32.24/32.03 [6170]~P662(x61701)+P660(x61701)
% 32.24/32.03 [6171]~P617(x61711)+P624(x61711)
% 32.24/32.03 [6172]~P647(x61721)+P624(x61721)
% 32.24/32.03 [6173]~P654(x61731)+P656(x61731)
% 32.24/32.03 [6174]~P657(x61741)+P656(x61741)
% 32.24/32.03 [6175]~P658(x61751)+P656(x61751)
% 32.24/32.03 [6176]~P655(x61761)+P657(x61761)
% 32.24/32.03 [6177]~P659(x61771)+P657(x61771)
% 32.24/32.03 [6178]~P2155(x61781)+P655(x61781)
% 32.24/32.03 [6179]~P615(x61791)+P659(x61791)
% 32.24/32.03 [6180]~P647(x61801)+P648(x61801)
% 32.24/32.03 [6181]~P646(x61811)+P648(x61811)
% 32.24/32.03 [6182]~P649(x61821)+P648(x61821)
% 32.24/32.03 [6183]~P633(x61831)+P526(x61831)
% 32.24/32.03 [6184]~P650(x61841)+P526(x61841)
% 32.24/32.03 [6185]~P615(x61851)+P630(x61851)
% 32.24/32.03 [6186]~P616(x61861)+P630(x61861)
% 32.24/32.03 [6187]~P617(x61871)+P626(x61871)
% 32.24/32.03 [6188]~P627(x61881)+P626(x61881)
% 32.24/32.03 [6189]~P632(x61891)+P626(x61891)
% 32.24/32.03 [6190]~P625(x61901)+P627(x61901)
% 32.24/32.03 [6191]~P616(x61911)+P627(x61911)
% 32.24/32.03 [6192]~P631(x61921)+P635(x61921)
% 32.24/32.03 [6193]~P635(x61931)+P634(x61931)
% 32.24/32.03 [6194]~P630(x61941)+P364(x61941)
% 32.24/32.03 [6195]~P635(x61951)+P364(x61951)
% 32.24/32.03 [6196]~P398(x61961)+P364(x61961)
% 32.24/32.03 [6197]~P629(x61971)+P527(x61971)
% 32.24/32.03 [6198]~P634(x61981)+P527(x61981)
% 32.24/32.03 [6199]~P2155(x61991)+P625(x61991)
% 32.24/32.03 [6200]~P629(x62001)+P365(x62001)
% 32.24/32.03 [6201]~P399(x62011)+P365(x62011)
% 32.24/32.03 [6202]~P399(x62021)+P2519(x62021)
% 32.24/32.03 [6203]~P2525(x62031)+P2519(x62031)
% 32.24/32.03 [6204]~P198(x62041)+P298(x62041)
% 32.24/32.03 [6205]~P299(x62051)+P298(x62051)
% 32.24/32.03 [6206]~P298(x62061)+P299(x62061)
% 32.24/32.03 [6207]~P299(x62071)+P297(x62071)
% 32.24/32.03 [6208]~P301(x62081)+P297(x62081)
% 32.24/32.03 [6209]~P490(x62091)+P297(x62091)
% 32.24/32.03 [6210]~P491(x62101)+P297(x62101)
% 32.24/32.03 [6211]~P427(x62111)+P297(x62111)
% 32.24/32.03 [6212]~P299(x62121)+P619(x62121)
% 32.24/32.03 [6213]~P297(x62131)+P301(x62131)
% 32.24/32.03 [6214]~P302(x62141)+P301(x62141)
% 32.24/32.03 [6215]~P301(x62151)+P302(x62151)
% 32.24/32.03 [6216]~P304(x62161)+P302(x62161)
% 32.24/32.03 [6217]~P302(x62171)+P304(x62171)
% 32.24/32.03 [6218]~P305(x62181)+P304(x62181)
% 32.24/32.03 [6219]~P304(x62191)+P305(x62191)
% 32.24/32.03 [6220]~P306(x62201)+P305(x62201)
% 32.24/32.03 [6221]~P305(x62211)+P306(x62211)
% 32.24/32.03 [6222]~P309(x62221)+P300(x62221)
% 32.24/32.03 [6223]~P531(x62231)+P532(x62231)
% 32.24/32.03 [6224]~P310(x62241)+P572(x62241)
% 32.24/32.03 [6225]~P570(x62251)+P572(x62251)
% 32.24/32.03 [6226]~P574(x62261)+P572(x62261)
% 32.24/32.03 [6227]~P588(x62271)+P542(x62271)
% 32.24/32.03 [6228]~P604(x62281)+P600(x62281)
% 32.24/32.03 [6229]~P570(x62291)+P600(x62291)
% 32.24/32.03 [6230]~P605(x62301)+P604(x62301)
% 32.24/32.03 [6231]~P575(x62311)+P604(x62311)
% 32.24/32.03 [6232]~P606(x62321)+P605(x62321)
% 32.24/32.03 [6233]~P576(x62331)+P605(x62331)
% 32.24/32.03 [6234]~P607(x62341)+P606(x62341)
% 32.24/32.03 [6235]~P555(x62351)+P606(x62351)
% 32.24/32.03 [6236]~P608(x62361)+P607(x62361)
% 32.24/32.03 [6237]~P556(x62371)+P607(x62371)
% 32.24/32.03 [6238]~P609(x62381)+P608(x62381)
% 32.24/32.03 [6239]~P557(x62391)+P608(x62391)
% 32.24/32.03 [6240]~P544(x62401)+P609(x62401)
% 32.24/32.03 [6241]~P558(x62411)+P609(x62411)
% 32.24/32.03 [6242]~P547(x62421)+P544(x62421)
% 32.24/32.03 [6243]~P548(x62431)+P544(x62431)
% 32.24/32.03 [6244]~P549(x62441)+P547(x62441)
% 32.24/32.03 [6245]~P550(x62451)+P547(x62451)
% 32.24/32.03 [6246]~P598(x62461)+P311(x62461)
% 32.24/32.03 [6247]~P314(x62471)+P311(x62471)
% 32.24/32.03 [6248]~P599(x62481)+P601(x62481)
% 32.24/32.03 [6249]~P602(x62491)+P601(x62491)
% 32.24/32.03 [6250]~P603(x62501)+P601(x62501)
% 32.24/32.03 [6251]~P599(x62511)+P523(x62511)
% 32.24/32.03 [6252]~P575(x62521)+P574(x62521)
% 32.24/32.03 [6253]~P577(x62531)+P574(x62531)
% 32.24/32.03 [6254]~P589(x62541)+P586(x62541)
% 32.24/32.03 [6255]~P563(x62551)+P586(x62551)
% 32.24/32.03 [6256]~P555(x62561)+P589(x62561)
% 32.24/32.03 [6257]~P590(x62571)+P589(x62571)
% 32.24/32.03 [6258]~P575(x62581)+P563(x62581)
% 32.24/32.03 [6259]~P556(x62591)+P590(x62591)
% 32.24/32.03 [6260]~P591(x62601)+P590(x62601)
% 32.24/32.03 [6261]~P557(x62611)+P591(x62611)
% 32.24/32.03 [6262]~P592(x62621)+P591(x62621)
% 32.24/32.03 [6263]~P558(x62631)+P592(x62631)
% 32.24/32.03 [6264]~P593(x62641)+P592(x62641)
% 32.24/32.03 [6265]~P594(x62651)+P593(x62651)
% 32.24/32.03 [6266]~P553(x62661)+P593(x62661)
% 32.24/32.03 [6267]~P548(x62671)+P594(x62671)
% 32.24/32.03 [6268]~P595(x62681)+P594(x62681)
% 32.24/32.03 [6269]~P576(x62691)+P553(x62691)
% 32.24/32.03 [6270]~P596(x62701)+P595(x62701)
% 32.24/32.03 [6271]~P549(x62711)+P595(x62711)
% 32.24/32.03 [6272]~P597(x62721)+P596(x62721)
% 32.24/32.03 [6273]~P551(x62731)+P596(x62731)
% 32.24/32.03 [6274]~P542(x62741)+P597(x62741)
% 32.24/32.03 [6275]~P552(x62751)+P597(x62751)
% 32.24/32.03 [6276]~P555(x62761)+P577(x62761)
% 32.24/32.03 [6277]~P578(x62771)+P577(x62771)
% 32.24/32.03 [6278]~P575(x62781)+P540(x62781)
% 32.24/32.03 [6279]~P556(x62791)+P578(x62791)
% 32.24/32.03 [6280]~P579(x62801)+P578(x62801)
% 32.24/32.03 [6281]~P557(x62811)+P579(x62811)
% 32.24/32.03 [6282]~P580(x62821)+P579(x62821)
% 32.24/32.03 [6283]~P558(x62831)+P580(x62831)
% 32.24/32.03 [6284]~P581(x62841)+P580(x62841)
% 32.24/32.03 [6285]~P576(x62851)+P581(x62851)
% 32.24/32.03 [6286]~P582(x62861)+P581(x62861)
% 32.24/32.03 [6287]~P548(x62871)+P582(x62871)
% 32.24/32.03 [6288]~P583(x62881)+P582(x62881)
% 32.24/32.03 [6289]~P576(x62891)+P541(x62891)
% 32.24/32.03 [6290]~P549(x62901)+P583(x62901)
% 32.24/32.03 [6291]~P584(x62911)+P583(x62911)
% 32.24/32.03 [6292]~P551(x62921)+P584(x62921)
% 32.24/32.03 [6293]~P585(x62931)+P584(x62931)
% 32.24/32.03 [6294]~P542(x62941)+P585(x62941)
% 32.24/32.03 [6295]~P552(x62951)+P585(x62951)
% 32.24/32.03 [6296]~P547(x62961)+P545(x62961)
% 32.24/32.03 [6297]~P548(x62971)+P545(x62971)
% 32.24/32.03 [6298]~P555(x62981)+P559(x62981)
% 32.24/32.03 [6299]~P560(x62991)+P559(x62991)
% 32.24/32.03 [6300]~P556(x63001)+P560(x63001)
% 32.24/32.03 [6301]~P561(x63011)+P560(x63011)
% 32.24/32.03 [6302]~P557(x63021)+P561(x63021)
% 32.24/32.03 [6303]~P558(x63031)+P561(x63031)
% 32.24/32.03 [6304]~P551(x63041)+P550(x63041)
% 32.24/32.03 [6305]~P552(x63051)+P550(x63051)
% 32.24/32.03 [6306]~P157(x63061)+P531(x63061)
% 32.24/32.03 [6307]~P532(x63071)+P531(x63071)
% 32.24/32.03 [6308]~P478(x63081)+P500(x63081)
% 32.24/32.03 [6309]~P515(x63091)+P500(x63091)
% 32.24/32.03 [6310]~P515(x63101)+P516(x63101)
% 32.24/32.03 [6311]~P517(x63111)+P516(x63111)
% 32.24/32.03 [6312]~P515(x63121)+P514(x63121)
% 32.24/32.03 [6313]~P517(x63131)+P518(x63131)
% 32.24/32.03 [6314]~P296(x63141)+P308(x63141)
% 32.24/32.03 [6315]~P1544(x63151)+P425(x63151)
% 32.24/32.03 [6316]~P311(x63161)+P314(x63161)
% 32.24/32.03 [6317]~P316(x63171)+P314(x63171)
% 32.24/32.03 [6318]~P314(x63181)+P316(x63181)
% 32.24/32.03 [6319]~P317(x63191)+P316(x63191)
% 32.24/32.03 [6320]~P316(x63201)+P317(x63201)
% 32.24/32.03 [6321]~P318(x63211)+P317(x63211)
% 32.24/32.03 [6322]~P317(x63221)+P318(x63221)
% 32.24/32.03 [6323]~P319(x63231)+P318(x63231)
% 32.24/32.03 [6324]~P318(x63241)+P319(x63241)
% 32.24/32.03 [6325]~P502(x63251)+P501(x63251)
% 32.24/32.03 [6326]~P501(x63261)+P502(x63261)
% 32.24/32.03 [6327]~P488(x63271)+P482(x63271)
% 32.24/32.03 [6328]~P493(x63281)+P482(x63281)
% 32.24/32.03 [6329]~P489(x63291)+P488(x63291)
% 32.24/32.03 [6330]~P492(x63301)+P488(x63301)
% 32.24/32.03 [6331]~P493(x63311)+P490(x63311)
% 32.24/32.03 [6332]~P493(x63321)+P442(x63321)
% 32.24/32.03 [6333]~P454(x63331)+P442(x63331)
% 32.24/32.03 [6334]~P451(x63341)+P442(x63341)
% 32.24/32.03 [6335]~P439(x63351)+P442(x63351)
% 32.24/32.03 [6336]~P490(x63361)+P480(x63361)
% 32.24/32.03 [6337]~P491(x63371)+P480(x63371)
% 32.24/32.03 [6338]~P492(x63381)+P491(x63381)
% 32.24/32.03 [6339]~P492(x63391)+P440(x63391)
% 32.24/32.03 [6340]~P469(x63401)+P440(x63401)
% 32.24/32.03 [6341]~P455(x63411)+P440(x63411)
% 32.24/32.03 [6342]~P428(x63421)+P440(x63421)
% 32.24/32.03 [6343]~P427(x63431)+P320(x63431)
% 32.24/32.03 [6344]~P456(x63441)+P320(x63441)
% 32.24/32.03 [6345]~P429(x63451)+P320(x63451)
% 32.24/32.03 [6346]~P322(x63461)+P320(x63461)
% 32.24/32.03 [6347]~P489(x63471)+P481(x63471)
% 32.24/32.03 [6348]~P489(x63481)+P434(x63481)
% 32.24/32.03 [6349]~P457(x63491)+P434(x63491)
% 32.24/32.03 [6350]~P430(x63501)+P434(x63501)
% 32.24/32.03 [6351]~P477(x63511)+P470(x63511)
% 32.24/32.03 [6352]~P469(x63521)+P470(x63521)
% 32.24/32.03 [6353]~P469(x63531)+P422(x63531)
% 32.24/32.03 [6354]~P464(x63541)+P458(x63541)
% 32.24/32.03 [6355]~P454(x63551)+P458(x63551)
% 32.24/32.03 [6356]~P457(x63561)+P464(x63561)
% 32.24/32.03 [6357]~P455(x63571)+P464(x63571)
% 32.24/32.03 [6358]~P454(x63581)+P471(x63581)
% 32.24/32.03 [6359]~P471(x63591)+P467(x63591)
% 32.24/32.03 [6360]~P468(x63601)+P467(x63601)
% 32.24/32.03 [6361]~P455(x63611)+P468(x63611)
% 32.24/32.03 [6362]~P467(x63621)+P427(x63621)
% 32.24/32.03 [6363]~P437(x63631)+P427(x63631)
% 32.24/32.03 [6364]~P467(x63641)+P466(x63641)
% 32.24/32.03 [6365]~P456(x63651)+P466(x63651)
% 32.24/32.03 [6366]~P457(x63661)+P465(x63661)
% 32.24/32.03 [6367]~P465(x63671)+P456(x63671)
% 32.24/32.03 [6368]~P453(x63681)+P452(x63681)
% 32.24/32.03 [6369]~P451(x63691)+P452(x63691)
% 32.24/32.03 [6370]~P451(x63701)+P423(x63701)
% 32.24/32.03 [6371]~P432(x63711)+P431(x63711)
% 32.24/32.03 [6372]~P439(x63721)+P431(x63721)
% 32.24/32.03 [6373]~P430(x63731)+P432(x63731)
% 32.24/32.03 [6374]~P428(x63741)+P432(x63741)
% 32.24/32.03 [6375]~P439(x63751)+P441(x63751)
% 32.24/32.03 [6376]~P441(x63761)+P437(x63761)
% 32.24/32.03 [6377]~P438(x63771)+P437(x63771)
% 32.24/32.03 [6378]~P441(x63781)+P435(x63781)
% 32.24/32.03 [6379]~P438(x63791)+P435(x63791)
% 32.24/32.03 [6380]~P433(x63801)+P435(x63801)
% 32.24/32.03 [6381]~P428(x63811)+P438(x63811)
% 32.24/32.03 [6382]~P430(x63821)+P433(x63821)
% 32.24/32.03 [6383]~P433(x63831)+P429(x63831)
% 32.24/32.03 [6384]~P320(x63841)+P322(x63841)
% 32.24/32.03 [6385]~P323(x63851)+P322(x63851)
% 32.24/32.03 [6386]~P322(x63861)+P323(x63861)
% 32.24/32.03 [6387]~P417(x63871)+P323(x63871)
% 32.24/32.03 [6388]~P392(x63881)+P386(x63881)
% 32.24/32.03 [6389]~P400(x63891)+P386(x63891)
% 32.24/32.03 [6390]~P393(x63901)+P392(x63901)
% 32.24/32.03 [6391]~P401(x63911)+P392(x63911)
% 32.24/32.03 [6392]~P400(x63921)+P416(x63921)
% 32.24/32.03 [6393]~P394(x63931)+P393(x63931)
% 32.24/32.03 [6394]~P408(x63941)+P393(x63941)
% 32.24/32.03 [6395]~P401(x63951)+P415(x63951)
% 32.24/32.03 [6396]~P395(x63961)+P394(x63961)
% 32.24/32.03 [6397]~P409(x63971)+P394(x63971)
% 32.24/32.03 [6398]~P408(x63981)+P414(x63981)
% 32.24/32.03 [6399]~P396(x63991)+P395(x63991)
% 32.24/32.03 [6400]~P411(x64001)+P395(x64001)
% 32.24/32.03 [6401]~P409(x64011)+P413(x64011)
% 32.24/32.03 [6402]~P385(x64021)+P396(x64021)
% 32.24/32.03 [6403]~P403(x64031)+P396(x64031)
% 32.24/32.03 [6404]~P411(x64041)+P412(x64041)
% 32.24/32.03 [6405]~P403(x64051)+P405(x64051)
% 32.24/32.03 [6406]~P385(x64061)+P397(x64061)
% 32.24/32.03 [6407]~P384(x64071)+P398(x64071)
% 32.24/32.03 [6408]~P398(x64081)+P399(x64081)
% 32.24/32.03 [6409]~P379(x64091)+P378(x64091)
% 32.24/32.03 [6410]~P367(x64101)+P378(x64101)
% 32.24/32.03 [6411]~P380(x64111)+P379(x64111)
% 32.24/32.03 [6412]~P369(x64121)+P379(x64121)
% 32.24/32.03 [6413]~P2155(x64131)+P383(x64131)
% 32.24/32.03 [6414]~P367(x64141)+P383(x64141)
% 32.24/32.03 [6415]~P372(x64151)+P380(x64151)
% 32.24/32.03 [6416]~P381(x64161)+P380(x64161)
% 32.24/32.03 [6417]~P369(x64171)+P382(x64171)
% 32.24/32.03 [6418]~P381(x64181)+P370(x64181)
% 32.24/32.03 [6419]~P372(x64191)+P371(x64191)
% 32.24/32.03 [6420]~P362(x64201)+P359(x64201)
% 32.24/32.03 [6421]~P358(x64211)+P359(x64211)
% 32.24/32.03 [6422]~P358(x64221)+P293(x64221)
% 32.24/32.03 [6423]~P349(x64231)+P339(x64231)
% 32.24/32.03 [6424]~P338(x64241)+P339(x64241)
% 32.24/32.03 [6425]~P338(x64251)+P294(x64251)
% 32.24/32.03 [6426]~P326(x64261)+P325(x64261)
% 32.24/32.03 [6427]~P324(x64271)+P325(x64271)
% 32.24/32.03 [6428]~P324(x64281)+P295(x64281)
% 32.24/32.03 [6429]~P571(x64291)+P309(x64291)
% 32.24/32.03 [6430]~P300(x64301)+P309(x64301)
% 32.24/32.03 [6431]~P286(x64311)+P289(x64311)
% 32.24/32.03 [6432]~P291(x64321)+P289(x64321)
% 32.24/32.03 [6433]~P289(x64331)+P291(x64331)
% 32.24/32.03 [6434]~P199(x64341)+P287(x64341)
% 32.24/32.03 [6435]~P288(x64351)+P287(x64351)
% 32.24/32.03 [6436]~P287(x64361)+P288(x64361)
% 32.24/32.03 [6437]~P279(x64371)+P281(x64371)
% 32.24/32.03 [6438]~P279(x64381)+P284(x64381)
% 32.24/32.03 [6439]~P281(x64391)+P200(x64391)
% 32.24/32.03 [6440]~P278(x64401)+P282(x64401)
% 32.24/32.03 [6441]~P177(x64411)+P201(x64411)
% 32.24/32.03 [6442]~P177(x64421)+P272(x64421)
% 32.24/32.03 [6443]~P274(x64431)+P272(x64431)
% 32.24/32.03 [6444]~P272(x64441)+P274(x64441)
% 32.24/32.03 [6445]~P271(x64451)+P274(x64451)
% 32.24/32.03 [6446]~P274(x64461)+P271(x64461)
% 32.24/32.03 [6447]~P271(x64471)+P276(x64471)
% 32.24/32.03 [6448]~P202(x64481)+P275(x64481)
% 32.24/32.03 [6449]~P171(x64491)+P178(x64491)
% 32.24/32.03 [6450]~P179(x64501)+P178(x64501)
% 32.24/32.03 [6451]~P178(x64511)+P179(x64511)
% 32.24/32.03 [6452]~P98(x64521)+P179(x64521)
% 32.24/32.03 [6453]~P296(x64531)+P2554(x64531)
% 32.24/32.03 [6454]~P161(x64541)+P2556(x64541)
% 32.24/32.03 [6455]~P2564(x64551)+P2556(x64551)
% 32.24/32.03 [6456]~P99(x64561)+P233(x64561)
% 32.24/32.03 [6457]~P261(x64571)+P256(x64571)
% 32.24/32.03 [6458]~P257(x64581)+P256(x64581)
% 32.24/32.03 [6459]~P262(x64591)+P256(x64591)
% 32.24/32.03 [6460]~P257(x64601)+P263(x64601)
% 32.24/32.03 [6461]~P253(x64611)+P252(x64611)
% 32.24/32.03 [6462]~P246(x64621)+P252(x64621)
% 32.24/32.03 [6463]~P258(x64631)+P252(x64631)
% 32.24/32.03 [6464]~P253(x64641)+P259(x64641)
% 32.24/32.03 [6465]~P204(x64651)+P259(x64651)
% 32.24/32.03 [6466]~P205(x64661)+P204(x64661)
% 32.24/32.03 [6467]~P249(x64671)+P248(x64671)
% 32.24/32.03 [6468]~P247(x64681)+P248(x64681)
% 32.24/32.03 [6469]~P254(x64691)+P248(x64691)
% 32.24/32.03 [6470]~P249(x64701)+P255(x64701)
% 32.24/32.03 [6471]~P205(x64711)+P255(x64711)
% 32.24/32.03 [6472]~P206(x64721)+P205(x64721)
% 32.24/32.03 [6473]~P243(x64731)+P242(x64731)
% 32.24/32.03 [6474]~P207(x64741)+P242(x64741)
% 32.24/32.03 [6475]~P250(x64751)+P242(x64751)
% 32.24/32.03 [6476]~P243(x64761)+P251(x64761)
% 32.24/32.03 [6477]~P206(x64771)+P251(x64771)
% 32.24/32.03 [6478]~P98(x64781)+P186(x64781)
% 32.24/32.03 [6479]~P237(x64791)+P234(x64791)
% 32.24/32.03 [6480]~P235(x64801)+P234(x64801)
% 32.24/32.03 [6481]~P235(x64811)+P238(x64811)
% 32.24/32.03 [6482]~P217(x64821)+P238(x64821)
% 32.24/32.03 [6483]~P218(x64831)+P217(x64831)
% 32.24/32.03 [6484]~P231(x64841)+P230(x64841)
% 32.24/32.03 [6485]~P214(x64851)+P230(x64851)
% 32.24/32.03 [6486]~P231(x64861)+P236(x64861)
% 32.24/32.03 [6487]~P208(x64871)+P236(x64871)
% 32.24/32.03 [6488]~P219(x64881)+P236(x64881)
% 32.24/32.03 [6489]~P213(x64891)+P208(x64891)
% 32.24/32.03 [6490]~P218(x64901)+P208(x64901)
% 32.24/32.03 [6491]~P213(x64911)+P219(x64911)
% 32.24/32.03 [6492]~P228(x64921)+P227(x64921)
% 32.24/32.03 [6493]~P215(x64931)+P227(x64931)
% 32.24/32.03 [6494]~P228(x64941)+P232(x64941)
% 32.24/32.03 [6495]~P209(x64951)+P232(x64951)
% 32.24/32.03 [6496]~P220(x64961)+P232(x64961)
% 32.24/32.03 [6497]~P212(x64971)+P209(x64971)
% 32.24/32.03 [6498]~P213(x64981)+P209(x64981)
% 32.24/32.03 [6499]~P212(x64991)+P220(x64991)
% 32.24/32.03 [6500]~P222(x65001)+P221(x65001)
% 32.24/32.03 [6501]~P216(x65011)+P221(x65011)
% 32.24/32.03 [6502]~P222(x65021)+P229(x65021)
% 32.24/32.03 [6503]~P210(x65031)+P229(x65031)
% 32.24/32.03 [6504]~P223(x65041)+P229(x65041)
% 32.24/32.03 [6505]~P211(x65051)+P210(x65051)
% 32.24/32.03 [6506]~P212(x65061)+P210(x65061)
% 32.24/32.03 [6507]~P211(x65071)+P223(x65071)
% 32.24/32.03 [6508]~P194(x65081)+P193(x65081)
% 32.24/32.03 [6509]~P185(x65091)+P193(x65091)
% 32.24/32.03 [6510]~P194(x65101)+P224(x65101)
% 32.24/32.03 [6511]~P184(x65111)+P224(x65111)
% 32.24/32.03 [6512]~P225(x65121)+P224(x65121)
% 32.24/32.03 [6513]~P211(x65131)+P184(x65131)
% 32.24/32.03 [6514]~P161(x65141)+P160(x65141)
% 32.24/32.03 [6515]~P2590(x65151)+P2586(x65151)
% 32.24/32.03 [6516]~P2587(x65161)+P2586(x65161)
% 32.24/32.03 [6517]~P2591(x65171)+P2586(x65171)
% 32.24/32.03 [6518]~P2587(x65181)+P2592(x65181)
% 32.24/32.03 [6519]~P2581(x65191)+P2580(x65191)
% 32.24/32.03 [6520]~P2579(x65201)+P2580(x65201)
% 32.24/32.03 [6521]~P2588(x65211)+P2580(x65211)
% 32.24/32.03 [6522]~P2581(x65221)+P2589(x65221)
% 32.24/32.03 [6523]~P2570(x65231)+P2589(x65231)
% 32.24/32.03 [6524]~P2571(x65241)+P2570(x65241)
% 32.24/32.03 [6525]~P2574(x65251)+P2573(x65251)
% 32.24/32.03 [6526]~P2572(x65261)+P2573(x65261)
% 32.24/32.03 [6527]~P2582(x65271)+P2573(x65271)
% 32.24/32.03 [6528]~P2574(x65281)+P2583(x65281)
% 32.24/32.03 [6529]~P2571(x65291)+P2583(x65291)
% 32.24/32.03 [6530]~P2556(x65301)+P2564(x65301)
% 32.24/32.03 [6531]~P2565(x65311)+P2564(x65311)
% 32.24/32.03 [6532]~P2564(x65321)+P2565(x65321)
% 32.24/32.03 [6533]~P2566(x65331)+P2565(x65331)
% 32.24/32.03 [6534]~P2565(x65341)+P2566(x65341)
% 32.24/32.03 [6535]~P2534(x65351)+P2543(x65351)
% 32.24/32.03 [6536]~P2519(x65361)+P2525(x65361)
% 32.24/32.03 [6537]~P2553(x65371)+P2535(x65371)
% 32.24/32.03 [6538]~P75(x65381)+P143(x65381)
% 32.24/32.03 [6539]~P2509(x65391)+P2504(x65391)
% 32.24/32.03 [6540]~P2494(x65401)+P2490(x65401)
% 32.24/32.03 [6541]~P2491(x65411)+P2490(x65411)
% 32.24/32.03 [6542]~P2495(x65421)+P2490(x65421)
% 32.24/32.03 [6543]~P2491(x65431)+P2496(x65431)
% 32.24/32.03 [6544]~P2485(x65441)+P2484(x65441)
% 32.24/32.03 [6545]~P2483(x65451)+P2484(x65451)
% 32.24/32.03 [6546]~P2492(x65461)+P2484(x65461)
% 32.24/32.03 [6547]~P2485(x65471)+P2493(x65471)
% 32.24/32.03 [6548]~P2473(x65481)+P2493(x65481)
% 32.24/32.03 [6549]~P2474(x65491)+P2473(x65491)
% 32.24/32.03 [6550]~P2477(x65501)+P2476(x65501)
% 32.24/32.03 [6551]~P2475(x65511)+P2476(x65511)
% 32.24/32.03 [6552]~P2486(x65521)+P2476(x65521)
% 32.24/32.03 [6553]~P2477(x65531)+P2487(x65531)
% 32.24/32.03 [6554]~P2474(x65541)+P2487(x65541)
% 32.24/32.03 [6555]~P2461(x65551)+P2468(x65551)
% 32.24/32.03 [6556]~P2469(x65561)+P2468(x65561)
% 32.24/32.03 [6557]~P2468(x65571)+P2469(x65571)
% 32.24/32.03 [6558]~P2470(x65581)+P2469(x65581)
% 32.24/32.03 [6559]~P2469(x65591)+P2470(x65591)
% 32.24/32.03 [6560]~P2394(x65601)+P2406(x65601)
% 32.24/32.03 [6561]~P2407(x65611)+P2406(x65611)
% 32.24/32.03 [6562]~P2406(x65621)+P2407(x65621)
% 32.24/32.03 [6563]~P2411(x65631)+P2410(x65631)
% 32.24/32.03 [6564]~P2440(x65641)+P2413(x65641)
% 32.24/32.03 [6565]~P2440(x65651)+P2443(x65651)
% 32.24/32.03 [6566]~P2182(x65661)+P2409(x65661)
% 32.24/32.03 [6567]~P2183(x65671)+P2379(x65671)
% 32.24/32.03 [6568]~P2420(x65681)+P2435(x65681)
% 32.24/32.03 [6569]~P1544(x65691)+P2420(x65691)
% 32.24/32.03 [6570]~P2435(x65701)+P2420(x65701)
% 32.24/32.03 [6571]~P2421(x65711)+P2420(x65711)
% 32.24/32.03 [6572]~P2410(x65721)+P2411(x65721)
% 32.24/32.03 [6573]~P2181(x65731)+P2411(x65731)
% 32.24/32.03 [6574]~P2411(x65741)+P2181(x65741)
% 32.24/32.03 [6575]~P2422(x65751)+P2418(x65751)
% 32.24/32.03 [6576]~P2430(x65761)+P2414(x65761)
% 32.24/32.03 [6577]~P2430(x65771)+P2433(x65771)
% 32.24/32.03 [6578]~P2182(x65781)+P2416(x65781)
% 32.24/32.03 [6579]~P2183(x65791)+P2415(x65791)
% 32.24/32.03 [6580]~P2420(x65801)+P2421(x65801)
% 32.24/32.03 [6581]~P2418(x65811)+P2422(x65811)
% 32.24/32.03 [6582]~P2423(x65821)+P2422(x65821)
% 32.24/32.03 [6583]~P2422(x65831)+P2423(x65831)
% 32.24/32.03 [6584]~P2424(x65841)+P2423(x65841)
% 32.24/32.03 [6585]~P2423(x65851)+P2424(x65851)
% 32.24/32.03 [6586]~P2425(x65861)+P2424(x65861)
% 32.24/32.03 [6587]~P2424(x65871)+P2425(x65871)
% 32.24/32.03 [6588]~P2409(x65881)+P2182(x65881)
% 32.24/32.03 [6589]~P2416(x65891)+P2182(x65891)
% 32.24/32.03 [6590]~P2379(x65901)+P2183(x65901)
% 32.24/32.03 [6591]~P2415(x65911)+P2183(x65911)
% 32.24/32.03 [6592]~P1810(x65921)+P1829(x65921)
% 32.24/32.03 [6593]~P1857(x65931)+P1829(x65931)
% 32.24/32.03 [6594]~P1829(x65941)+P1857(x65941)
% 32.24/32.03 [6595]~P1873(x65951)+P1857(x65951)
% 32.24/32.03 [6596]~P1857(x65961)+P1873(x65961)
% 32.24/32.03 [6597]~P1891(x65971)+P1873(x65971)
% 32.24/32.03 [6598]~P1873(x65981)+P1891(x65981)
% 32.24/32.03 [6599]~P1902(x65991)+P1891(x65991)
% 32.24/32.03 [6600]~P1891(x66001)+P1902(x66001)
% 32.24/32.03 [6601]~P1913(x66011)+P1902(x66011)
% 32.24/32.03 [6602]~P1902(x66021)+P1913(x66021)
% 32.24/32.03 [6603]~P2189(x66031)+P1913(x66031)
% 32.24/32.03 [6604]~P1913(x66041)+P2395(x66041)
% 32.24/32.03 [6605]~P2281(x66051)+P2395(x66051)
% 32.24/32.03 [6606]~P2285(x66061)+P2395(x66061)
% 32.24/32.03 [6607]~P2381(x66071)+P2281(x66071)
% 32.24/32.03 [6608]~P2279(x66081)+P2281(x66081)
% 32.24/32.03 [6609]~P2202(x66091)+P2401(x66091)
% 32.24/32.03 [6610]~P2393(x66101)+P2202(x66101)
% 32.24/32.03 [6611]~P2405(x66111)+P2283(x66111)
% 32.24/32.03 [6612]~P2303(x66121)+P2283(x66121)
% 32.24/32.03 [6613]~P2279(x66131)+P2204(x66131)
% 32.24/32.03 [6614]~P2287(x66141)+P2402(x66141)
% 32.24/32.03 [6615]~P2402(x66151)+P2287(x66151)
% 32.24/32.03 [6616]~P2296(x66161)+P2287(x66161)
% 32.24/32.03 [6617]~P2393(x66171)+P2285(x66171)
% 32.24/32.03 [6618]~P2282(x66181)+P2285(x66181)
% 32.24/32.03 [6619]~P2288(x66191)+P2396(x66191)
% 32.24/32.03 [6620]~P2369(x66201)+P2268(x66201)
% 32.24/32.03 [6621]~P2269(x66211)+P2268(x66211)
% 32.24/32.03 [6622]~P2271(x66221)+P2268(x66221)
% 32.24/32.03 [6623]~P2381(x66231)+P2389(x66231)
% 32.24/32.03 [6624]~P2393(x66241)+P2389(x66241)
% 32.24/32.03 [6625]~P2287(x66251)+P2390(x66251)
% 32.24/32.03 [6626]~P2381(x66261)+P2380(x66261)
% 32.24/32.03 [6627]~P2007(x66271)+P1991(x66271)
% 32.24/32.03 [6628]~P1991(x66281)+P2007(x66281)
% 32.24/32.03 [6629]~P100(x66291)+P2007(x66291)
% 32.24/32.03 [6630]~P1943(x66301)+P2022(x66301)
% 32.24/32.03 [6631]~P2268(x66311)+P2369(x66311)
% 32.24/32.03 [6632]~P2170(x66321)+P2165(x66321)
% 32.24/32.03 [6633]~P2065(x66331)+P2052(x66331)
% 32.24/32.03 [6634]~P102(x66341)+P2346(x66341)
% 32.24/32.03 [6635]~P2374(x66351)+P2370(x66351)
% 32.24/32.03 [6636]~P2371(x66361)+P2370(x66361)
% 32.24/32.03 [6637]~P2375(x66371)+P2370(x66371)
% 32.24/32.03 [6638]~P2371(x66381)+P2376(x66381)
% 32.24/32.03 [6639]~P2366(x66391)+P2365(x66391)
% 32.24/32.03 [6640]~P2358(x66401)+P2365(x66401)
% 32.24/32.03 [6641]~P2372(x66411)+P2365(x66411)
% 32.24/32.03 [6642]~P2366(x66421)+P2373(x66421)
% 32.24/32.03 [6643]~P2341(x66431)+P2373(x66431)
% 32.24/32.03 [6644]~P2342(x66441)+P2341(x66441)
% 32.24/32.03 [6645]~P2364(x66451)+P2363(x66451)
% 32.24/32.03 [6646]~P2359(x66461)+P2363(x66461)
% 32.24/32.03 [6647]~P2367(x66471)+P2363(x66471)
% 32.24/32.03 [6648]~P2364(x66481)+P2368(x66481)
% 32.24/32.03 [6649]~P2342(x66491)+P2368(x66491)
% 32.24/32.03 [6650]~P2343(x66501)+P2342(x66501)
% 32.24/32.03 [6651]~P2356(x66511)+P2355(x66511)
% 32.24/32.03 [6652]~P2344(x66521)+P2355(x66521)
% 32.24/32.03 [6653]~P2361(x66531)+P2355(x66531)
% 32.24/32.03 [6654]~P2356(x66541)+P2362(x66541)
% 32.24/32.03 [6655]~P2343(x66551)+P2362(x66551)
% 32.24/32.03 [6656]~P100(x66561)+P2305(x66561)
% 32.24/32.03 [6657]~P2350(x66571)+P2347(x66571)
% 32.24/32.03 [6658]~P2348(x66581)+P2347(x66581)
% 32.24/32.03 [6659]~P2348(x66591)+P2351(x66591)
% 32.24/32.03 [6660]~P2325(x66601)+P2351(x66601)
% 32.24/32.03 [6661]~P2326(x66611)+P2325(x66611)
% 32.24/32.03 [6662]~P2338(x66621)+P2337(x66621)
% 32.24/32.03 [6663]~P2345(x66631)+P2337(x66631)
% 32.24/32.03 [6664]~P2338(x66641)+P2349(x66641)
% 32.24/32.03 [6665]~P2316(x66651)+P2349(x66651)
% 32.24/32.03 [6666]~P2327(x66661)+P2349(x66661)
% 32.24/32.03 [6667]~P2322(x66671)+P2316(x66671)
% 32.24/32.03 [6668]~P2326(x66681)+P2316(x66681)
% 32.24/32.03 [6669]~P2322(x66691)+P2327(x66691)
% 32.24/32.03 [6670]~P2335(x66701)+P2334(x66701)
% 32.24/32.03 [6671]~P2323(x66711)+P2334(x66711)
% 32.24/32.03 [6672]~P2335(x66721)+P2339(x66721)
% 32.24/32.03 [6673]~P2317(x66731)+P2339(x66731)
% 32.24/32.03 [6674]~P2328(x66741)+P2339(x66741)
% 32.24/32.03 [6675]~P2320(x66751)+P2317(x66751)
% 32.24/32.03 [6676]~P2322(x66761)+P2317(x66761)
% 32.24/32.03 [6677]~P2320(x66771)+P2328(x66771)
% 32.24/32.03 [6678]~P2330(x66781)+P2329(x66781)
% 32.24/32.03 [6679]~P2324(x66791)+P2329(x66791)
% 32.24/32.03 [6680]~P2330(x66801)+P2336(x66801)
% 32.24/32.03 [6681]~P2318(x66811)+P2336(x66811)
% 32.24/32.03 [6682]~P2331(x66821)+P2336(x66821)
% 32.24/32.03 [6683]~P2319(x66831)+P2318(x66831)
% 32.24/32.03 [6684]~P2320(x66841)+P2318(x66841)
% 32.24/32.03 [6685]~P2319(x66851)+P2331(x66851)
% 32.24/32.03 [6686]~P2312(x66861)+P2311(x66861)
% 32.24/32.03 [6687]~P2301(x66871)+P2311(x66871)
% 32.24/32.03 [6688]~P2312(x66881)+P2332(x66881)
% 32.24/32.03 [6689]~P2300(x66891)+P2332(x66891)
% 32.24/32.03 [6690]~P2333(x66901)+P2332(x66901)
% 32.24/32.03 [6691]~P2319(x66911)+P2300(x66911)
% 32.24/32.03 [6692]~P2165(x66921)+P2170(x66921)
% 32.24/32.03 [6693]~P2281(x66931)+P2297(x66931)
% 32.24/32.03 [6694]~P2285(x66941)+P2297(x66941)
% 32.24/32.03 [6695]~P2170(x66951)+P2297(x66951)
% 32.24/32.03 [6696]~P2204(x66961)+P2298(x66961)
% 32.24/32.03 [6697]~P2283(x66971)+P2303(x66971)
% 32.24/32.03 [6698]~P2173(x66981)+P2171(x66981)
% 32.24/32.03 [6699]~P2022(x66991)+P1943(x66991)
% 32.24/32.03 [6700]~P2172(x67001)+P1943(x67001)
% 32.24/32.03 [6701]~P1953(x67011)+P1943(x67011)
% 32.24/32.03 [6702]~P2279(x67021)+P2280(x67021)
% 32.24/32.03 [6703]~P2282(x67031)+P2280(x67031)
% 32.24/32.03 [6704]~P2279(x67041)+P2286(x67041)
% 32.24/32.03 [6705]~P2283(x67051)+P2284(x67051)
% 32.24/32.03 [6706]~P2282(x67061)+P2203(x67061)
% 32.24/32.03 [6707]~P2171(x67071)+P2173(x67071)
% 32.24/32.03 [6708]~P103(x67081)+P2173(x67081)
% 32.24/32.03 [6709]~P1943(x67091)+P2172(x67091)
% 32.24/32.03 [6710]~P2268(x67101)+P2269(x67101)
% 32.24/32.03 [6711]~P2268(x67111)+P2271(x67111)
% 32.24/32.03 [6712]~P2258(x67121)+P2271(x67121)
% 32.24/32.03 [6713]~P157(x67131)+P2258(x67131)
% 32.24/32.03 [6714]~P2271(x67141)+P2258(x67141)
% 32.24/32.03 [6715]~P1913(x67151)+P2189(x67151)
% 32.24/32.03 [6716]~P2177(x67161)+P2175(x67161)
% 32.24/32.03 [6717]~P104(x67171)+P2235(x67171)
% 32.24/32.03 [6718]~P2264(x67181)+P2260(x67181)
% 32.24/32.03 [6719]~P2261(x67191)+P2260(x67191)
% 32.24/32.03 [6720]~P2265(x67201)+P2260(x67201)
% 32.24/32.03 [6721]~P2261(x67211)+P2266(x67211)
% 32.24/32.03 [6722]~P2255(x67221)+P2254(x67221)
% 32.24/32.03 [6723]~P2248(x67231)+P2254(x67231)
% 32.24/32.03 [6724]~P2262(x67241)+P2254(x67241)
% 32.24/32.03 [6725]~P2255(x67251)+P2263(x67251)
% 32.24/32.03 [6726]~P2206(x67261)+P2263(x67261)
% 32.24/32.03 [6727]~P2207(x67271)+P2206(x67271)
% 32.24/32.03 [6728]~P2251(x67281)+P2250(x67281)
% 32.24/32.03 [6729]~P2249(x67291)+P2250(x67291)
% 32.24/32.03 [6730]~P2256(x67301)+P2250(x67301)
% 32.24/32.03 [6731]~P2251(x67311)+P2257(x67311)
% 32.24/32.03 [6732]~P2207(x67321)+P2257(x67321)
% 32.24/32.03 [6733]~P2208(x67331)+P2207(x67331)
% 32.24/32.03 [6734]~P2245(x67341)+P2244(x67341)
% 32.24/32.03 [6735]~P2209(x67351)+P2244(x67351)
% 32.24/32.03 [6736]~P2252(x67361)+P2244(x67361)
% 32.24/32.03 [6737]~P2245(x67371)+P2253(x67371)
% 32.24/32.03 [6738]~P2208(x67381)+P2253(x67381)
% 32.24/32.03 [6739]~P103(x67391)+P2191(x67391)
% 32.24/32.03 [6740]~P2239(x67401)+P2236(x67401)
% 32.24/32.03 [6741]~P2237(x67411)+P2236(x67411)
% 32.24/32.03 [6742]~P2237(x67421)+P2240(x67421)
% 32.24/32.03 [6743]~P2219(x67431)+P2240(x67431)
% 32.24/32.03 [6744]~P2220(x67441)+P2219(x67441)
% 32.24/32.03 [6745]~P2233(x67451)+P2232(x67451)
% 32.24/32.03 [6746]~P2216(x67461)+P2232(x67461)
% 32.24/32.03 [6747]~P2233(x67471)+P2238(x67471)
% 32.24/32.03 [6748]~P2210(x67481)+P2238(x67481)
% 32.24/32.03 [6749]~P2221(x67491)+P2238(x67491)
% 32.24/32.03 [6750]~P2215(x67501)+P2210(x67501)
% 32.24/32.03 [6751]~P2220(x67511)+P2210(x67511)
% 32.24/32.03 [6752]~P2215(x67521)+P2221(x67521)
% 32.24/32.03 [6753]~P2230(x67531)+P2229(x67531)
% 32.24/32.03 [6754]~P2217(x67541)+P2229(x67541)
% 32.24/32.03 [6755]~P2230(x67551)+P2234(x67551)
% 32.24/32.03 [6756]~P2211(x67561)+P2234(x67561)
% 32.24/32.03 [6757]~P2222(x67571)+P2234(x67571)
% 32.24/32.03 [6758]~P2214(x67581)+P2211(x67581)
% 32.24/32.03 [6759]~P2215(x67591)+P2211(x67591)
% 32.24/32.03 [6760]~P2214(x67601)+P2222(x67601)
% 32.24/32.03 [6761]~P2224(x67611)+P2223(x67611)
% 32.24/32.03 [6762]~P2218(x67621)+P2223(x67621)
% 32.24/32.03 [6763]~P2224(x67631)+P2231(x67631)
% 32.24/32.03 [6764]~P2212(x67641)+P2231(x67641)
% 32.24/32.03 [6765]~P2225(x67651)+P2231(x67651)
% 32.24/32.03 [6766]~P2213(x67661)+P2212(x67661)
% 32.24/32.03 [6767]~P2214(x67671)+P2212(x67671)
% 32.24/32.03 [6768]~P2213(x67681)+P2225(x67681)
% 32.24/32.03 [6769]~P2198(x67691)+P2197(x67691)
% 32.24/32.03 [6770]~P2187(x67701)+P2197(x67701)
% 32.24/32.03 [6771]~P2198(x67711)+P2226(x67711)
% 32.24/32.03 [6772]~P2186(x67721)+P2226(x67721)
% 32.24/32.03 [6773]~P2227(x67731)+P2226(x67731)
% 32.24/32.03 [6774]~P2213(x67741)+P2186(x67741)
% 32.24/32.03 [6775]~P2175(x67751)+P2177(x67751)
% 32.24/32.03 [6776]~P2178(x67761)+P2177(x67761)
% 32.24/32.03 [6777]~P2177(x67771)+P2178(x67771)
% 32.24/32.03 [6778]~P2179(x67781)+P2178(x67781)
% 32.24/32.03 [6779]~P2178(x67791)+P2179(x67791)
% 32.24/32.03 [6780]~P2180(x67801)+P2179(x67801)
% 32.24/32.03 [6781]~P2179(x67811)+P2180(x67811)
% 32.24/32.03 [6782]~P2190(x67821)+P2180(x67821)
% 32.24/32.03 [6783]~P2180(x67831)+P2190(x67831)
% 32.24/32.03 [6784]~P2052(x67841)+P2065(x67841)
% 32.24/32.03 [6785]~P2166(x67851)+P2065(x67851)
% 32.24/32.03 [6786]~P2065(x67861)+P2166(x67861)
% 32.24/32.03 [6787]~P2166(x67871)+P2169(x67871)
% 32.24/32.03 [6788]~P2166(x67881)+P2140(x67881)
% 32.24/32.03 [6789]~P2153(x67891)+P2140(x67891)
% 32.24/32.03 [6790]~P2140(x67901)+P2153(x67901)
% 32.24/32.03 [6791]~P2167(x67911)+P2153(x67911)
% 32.24/32.03 [6792]~P2153(x67921)+P2167(x67921)
% 32.24/32.03 [6793]~P2168(x67931)+P2167(x67931)
% 32.24/32.03 [6794]~P2167(x67941)+P2168(x67941)
% 32.24/32.03 [6795]~P1943(x67951)+P1953(x67951)
% 32.24/32.03 [6796]~P1969(x67961)+P1953(x67961)
% 32.24/32.03 [6797]~P571(x67971)+P1969(x67971)
% 32.24/32.03 [6798]~P1953(x67981)+P1969(x67981)
% 32.24/32.03 [6799]~P2585(x67991)+P163(x67991)
% 32.24/32.03 [6800]~P195(x68001)+P172(x68001)
% 32.24/32.03 [6801]~P172(x68011)+P195(x68011)
% 32.24/32.03 [6802]~P226(x68021)+P195(x68021)
% 32.24/32.03 [6803]~P195(x68031)+P226(x68031)
% 32.24/32.03 [6804]~P157(x68041)+P840(x68041)
% 32.24/32.03 [6805]~P1544(x68051)+P840(x68051)
% 32.24/32.03 [6806]~P827(x68061)+P840(x68061)
% 32.24/32.03 [6807]~P280(x68071)+P273(x68071)
% 32.24/32.03 [6808]~P1482(x68081)+P1481(x68081)
% 32.24/32.03 [6809]~P1470(x68091)+P1481(x68091)
% 32.24/32.03 [6810]~P1492(x68101)+P1481(x68101)
% 32.24/32.03 [6811]~P1470(x68111)+P1503(x68111)
% 32.24/32.03 [6812]~P1444(x68121)+P1451(x68121)
% 32.24/32.03 [6813]~P1445(x68131)+P1451(x68131)
% 32.24/32.03 [6814]~P1456(x68141)+P1451(x68141)
% 32.24/32.03 [6815]~P1444(x68151)+P1468(x68151)
% 32.24/32.03 [6816]~P1401(x68161)+P1468(x68161)
% 32.24/32.03 [6817]~P1394(x68171)+P1401(x68171)
% 32.24/32.03 [6818]~P1354(x68181)+P1374(x68181)
% 32.24/32.03 [6819]~P1381(x68191)+P1374(x68191)
% 32.24/32.03 [6820]~P1420(x68201)+P1374(x68201)
% 32.24/32.03 [6821]~P1354(x68211)+P1427(x68211)
% 32.24/32.03 [6822]~P1394(x68221)+P1427(x68221)
% 32.24/32.03 [6823]~P1278(x68231)+P1269(x68231)
% 32.24/32.03 [6824]~P1258(x68241)+P1269(x68241)
% 32.24/32.03 [6825]~P1258(x68251)+P1285(x68251)
% 32.24/32.03 [6826]~P1133(x68261)+P1285(x68261)
% 32.24/32.03 [6827]~P1127(x68271)+P1133(x68271)
% 32.24/32.03 [6828]~P1215(x68281)+P1224(x68281)
% 32.24/32.03 [6829]~P1231(x68291)+P1224(x68291)
% 32.24/32.03 [6830]~P1215(x68301)+P1246(x68301)
% 32.24/32.03 [6831]~P1113(x68311)+P1246(x68311)
% 32.24/32.03 [6832]~P1139(x68321)+P1246(x68321)
% 32.24/32.03 [6833]~P1118(x68331)+P1113(x68331)
% 32.24/32.03 [6834]~P1127(x68341)+P1113(x68341)
% 32.24/32.03 [6835]~P1118(x68351)+P1139(x68351)
% 32.24/32.03 [6836]~P1168(x68361)+P1180(x68361)
% 32.24/32.03 [6837]~P1191(x68371)+P1180(x68371)
% 32.24/32.03 [6838]~P1168(x68381)+P1206(x68381)
% 32.24/32.03 [6839]~P1080(x68391)+P1206(x68391)
% 32.24/32.03 [6840]~P1142(x68401)+P1206(x68401)
% 32.24/32.03 [6841]~P1093(x68411)+P1080(x68411)
% 32.24/32.03 [6842]~P1118(x68421)+P1080(x68421)
% 32.24/32.03 [6843]~P1093(x68431)+P1142(x68431)
% 32.24/32.03 [6844]~P1051(x68441)+P1061(x68441)
% 32.24/32.03 [6845]~P1067(x68451)+P1061(x68451)
% 32.24/32.03 [6846]~P1051(x68461)+P1145(x68461)
% 32.24/32.03 [6847]~P1066(x68471)+P1145(x68471)
% 32.24/32.03 [6848]~P1153(x68481)+P1145(x68481)
% 32.24/32.03 [6849]~P1093(x68491)+P1066(x68491)
% 32.24/32.03 [6850]~P273(x68501)+P280(x68501)
% 32.24/32.03 [6851]~P290(x68511)+P280(x68511)
% 32.24/32.03 [6852]~P280(x68521)+P290(x68521)
% 32.24/32.03 [6853]~P303(x68531)+P290(x68531)
% 32.24/32.03 [6854]~P290(x68541)+P303(x68541)
% 32.24/32.03 [6855]~P315(x68551)+P303(x68551)
% 32.24/32.03 [6856]~P303(x68561)+P315(x68561)
% 32.24/32.03 [6857]~P340(x68571)+P806(x68571)
% 32.24/32.03 [6858]~P340(x68581)+P727(x68581)
% 32.24/32.03 [6859]~P736(x68591)+P727(x68591)
% 32.24/32.03 [6860]~P806(x68601)+P812(x68601)
% 32.24/32.03 [6861]~P806(x68611)+P436(x68611)
% 32.24/32.03 [6862]~P443(x68621)+P436(x68621)
% 32.24/32.03 [6863]~P727(x68631)+P736(x68631)
% 32.24/32.03 [6864]~P753(x68641)+P736(x68641)
% 32.24/32.03 [6865]~P736(x68651)+P753(x68651)
% 32.24/32.03 [6866]~P792(x68661)+P753(x68661)
% 32.24/32.03 [6867]~P436(x68671)+P443(x68671)
% 32.24/32.03 [6868]~P459(x68681)+P443(x68681)
% 32.24/32.03 [6869]~P443(x68691)+P459(x68691)
% 32.24/32.03 [6870]~P628(x68701)+P459(x68701)
% 32.24/32.03 [6871]~P459(x68711)+P628(x68711)
% 32.24/32.03 [6872]~P636(x68721)+P628(x68721)
% 32.24/32.03 [6873]~P707(x68731)+P628(x68731)
% 32.24/32.03 [6874]~P651(x68741)+P636(x68741)
% 32.24/32.03 [6875]~P688(x68751)+P636(x68751)
% 32.24/32.03 [6876]~P697(x68761)+P688(x68761)
% 32.24/32.03 [6877]~P702(x68771)+P688(x68771)
% 32.24/32.03 [6878]~P350(x68781)+P373(x68781)
% 32.24/32.03 [6879]~P387(x68791)+P373(x68791)
% 32.24/32.03 [6880]~P373(x68801)+P387(x68801)
% 32.24/32.03 [6881]~P105(x68811)+P387(x68811)
% 32.24/32.03 [6882]~P296(x68821)+P426(x68821)
% 32.24/32.03 [6883]~P330(x68831)+P426(x68831)
% 32.24/32.03 [6884]~P571(x68841)+P426(x68841)
% 32.24/32.03 [6885]~P2315(x68851)+P2360(x68851)
% 32.24/32.03 [6886]~P2340(x68861)+P2360(x68861)
% 32.24/32.03 [6887]~P2340(x68871)+P2392(x68871)
% 32.24/32.03 [6888]~P571(x68881)+P2392(x68881)
% 32.24/32.03 [6889]~P571(x68891)+P721(x68891)
% 32.24/32.03 [6890]~P1813(x68901)+P97(x68901)
% 32.24/32.03 [6891]~P1818(x68911)+P97(x68911)
% 32.24/32.03 [6892]~P1861(x68921)+P101(x68921)
% 32.24/32.03 [6893]~P1746(x68931)+P108(x68931)
% 32.24/32.03 [6894]~P1704(x68941)+P109(x68941)
% 32.24/32.03 [6895]~P1654(x68951)+P109(x68951)
% 32.24/32.03 [6896]~P1651(x68961)+P109(x68961)
% 32.24/32.03 [6897]~P1600(x68971)+P109(x68971)
% 32.24/32.03 [6898]~P1661(x68981)+P110(x68981)
% 32.24/32.03 [6899]~P1486(x68991)+P111(x68991)
% 32.24/32.03 [6900]~P1505(x69001)+P112(x69001)
% 32.24/32.03 [6901]~P1502(x69011)+P112(x69011)
% 32.24/32.03 [6902]~P1498(x69021)+P69(x69021)
% 32.24/32.03 [6903]~P1500(x69031)+P70(x69031)
% 32.24/32.03 [6904]~P1501(x69041)+P71(x69041)
% 32.24/32.03 [6905]~P1495(x69051)+P72(x69051)
% 32.24/32.03 [6906]~P1494(x69061)+P73(x69061)
% 32.24/32.03 [6907]~P1454(x69071)+P74(x69071)
% 32.24/32.03 [6908]~P707(x69081)+P74(x69081)
% 32.24/32.03 [6909]~P126(x69091)+P68(x69091)
% 32.24/32.03 [6910]~P77(x69101)+P76(x69101)
% 32.24/32.03 [6911]~P78(x69111)+P76(x69111)
% 32.24/32.03 [6912]~P79(x69121)+P77(x69121)
% 32.24/32.03 [6913]~P80(x69131)+P79(x69131)
% 32.24/32.03 [6914]~P82(x69141)+P80(x69141)
% 32.24/32.03 [6915]~P931(x69151)+P82(x69151)
% 32.24/32.03 [6916]~P83(x69161)+P78(x69161)
% 32.24/32.03 [6917]~P84(x69171)+P83(x69171)
% 32.24/32.03 [6918]~P85(x69181)+P84(x69181)
% 32.24/32.03 [6919]~P930(x69191)+P85(x69191)
% 32.24/32.03 [6920]~P68(x69201)+P75(x69201)
% 32.24/32.03 [6921]~P179(x69211)+P98(x69211)
% 32.24/32.03 [6922]~P186(x69221)+P98(x69221)
% 32.24/32.03 [6923]~P233(x69231)+P99(x69231)
% 32.24/32.03 [6924]~P2007(x69241)+P100(x69241)
% 32.24/32.03 [6925]~P2305(x69251)+P100(x69251)
% 32.24/32.03 [6926]~P2346(x69261)+P102(x69261)
% 32.24/32.03 [6927]~P2173(x69271)+P103(x69271)
% 32.24/32.03 [6928]~P2191(x69281)+P103(x69281)
% 32.24/32.03 [6929]~P2235(x69291)+P104(x69291)
% 32.24/32.03 [6930]~P702(x69301)+P106(x69301)
% 32.24/32.03 [6931]~P682(x69311)+P106(x69311)
% 32.24/32.03 [6932]~P697(x69321)+P107(x69321)
% 32.24/32.03 [6933]~P672(x69331)+P107(x69331)
% 32.24/32.03 [6934]~P387(x69341)+P105(x69341)
% 32.24/32.03 [6940]~P2073(x69401)+~P2149(x69401)
% 32.24/32.03 [6941]~P2146(x69411)+~P2073(x69411)
% 32.24/32.03 [6942]~P2148(x69421)+~P2147(x69421)
% 32.24/32.03 [6943]~P158(x69431)+~P2074(x69431)
% 32.24/32.03 [6944]~P1408(x69441)+~P158(x69441)
% 32.24/32.03 [6945]~P2076(x69451)+~P2075(x69451)
% 32.24/32.03 [6946]~P293(x69461)+~P198(x69461)
% 32.24/32.03 [6947]~P294(x69471)+~P198(x69471)
% 32.24/32.03 [6948]~P295(x69481)+~P198(x69481)
% 32.24/32.03 [6949]~P2155(x69491)+~P363(x69491)
% 32.24/32.03 [6950]~P364(x69501)+~P2534(x69501)
% 32.24/32.03 [6951]~P1923(x69511)+~P2155(x69511)
% 32.24/32.03 [6952]~P524(x69521)+~P2155(x69521)
% 32.24/32.03 [6953]~P2315(x69531)+~P2077(x69531)
% 32.24/32.03 [6954]~P2063(x69541)+~P2315(x69541)
% 32.24/32.03 [6955]~P2060(x69551)+~P2002(x69551)
% 32.24/32.03 [6956]~P2340(x69561)+~P2038(x69561)
% 32.24/32.03 [6957]~P2048(x69571)+~P2039(x69571)
% 32.24/32.03 [6958]~P1974(x69581)+~P2040(x69581)
% 32.24/32.03 [6959]~P1975(x69591)+~P1986(x69591)
% 32.24/32.03 [6960]~P1830(x69601)+~P1975(x69601)
% 32.24/32.03 [6961]~P327(x69611)+~P1830(x69611)
% 32.24/32.03 [6962]~P1985(x69621)+~P1976(x69621)
% 32.24/32.03 [6963]~P1982(x69631)+~P1977(x69631)
% 32.24/32.03 [6964]~P1980(x69641)+~P1978(x69641)
% 32.24/32.03 [6965]~P2542(x69651)+~P525(x69651)
% 32.24/32.03 [6966]~P365(x69661)+~P2518(x69661)
% 32.24/32.03 [6967]~P1924(x69671)+~P2553(x69671)
% 32.24/32.03 [6968]~P1955(x69681)+~P1925(x69681)
% 32.24/32.03 [6969]~P1899(x69691)+~P1925(x69691)
% 32.24/32.03 [6970]~P1956(x69701)+~P1906(x69701)
% 32.24/32.03 [6971]~P1907(x69711)+~P1926(x69711)
% 32.24/32.03 [6972]~P1927(x69721)+~P1907(x69721)
% 32.24/32.03 [6973]~P526(x69731)+~P199(x69731)
% 32.24/32.03 [6974]~P1669(x69741)+~P296(x69741)
% 32.24/32.03 [6975]~P1409(x69751)+~P296(x69751)
% 32.24/32.03 [6976]~P1410(x69761)+~P296(x69761)
% 32.24/32.03 [6977]~P767(x69771)+~P296(x69771)
% 32.24/32.03 [6978]~P171(x69781)+~P1900(x69781)
% 32.24/32.03 [6979]~P200(x69791)+~P171(x69791)
% 32.24/32.03 [6980]~P201(x69801)+~P171(x69801)
% 32.24/32.03 [6981]~P1744(x69811)+~P1743(x69811)
% 32.24/32.03 [6982]~P2449(x69821)+~P1831(x69821)
% 32.24/32.03 [6983]~P2472(x69831)+~P2449(x69831)
% 32.24/32.03 [6984]~P2503(x69841)+~P2449(x69841)
% 32.24/32.03 [6985]~P1874(x69851)+~P1832(x69851)
% 32.24/32.03 [6986]~P1875(x69861)+~P1833(x69861)
% 32.24/32.03 [6987]~P1835(x69871)+~P1834(x69871)
% 32.24/32.03 [6988]~P1842(x69881)+~P1836(x69881)
% 32.24/32.03 [6989]~P1843(x69891)+~P1837(x69891)
% 32.24/32.03 [6990]~P1844(x69901)+~P1838(x69901)
% 32.24/32.03 [6991]~P1817(x69911)+~P1816(x69911)
% 32.24/32.03 [6992]~P807(x69921)+~P1795(x69921)
% 32.24/32.03 [6993]~P1733(x69931)+~P807(x69931)
% 32.24/32.03 [6994]~P1609(x69941)+~P807(x69941)
% 32.24/32.03 [6995]~P1535(x69951)+~P807(x69951)
% 32.24/32.03 [6996]~P1796(x69961)+~P1756(x69961)
% 32.24/32.03 [6997]~P1784(x69971)+~P1807(x69971)
% 32.24/32.03 [6998]~P1792(x69981)+~P1783(x69981)
% 32.24/32.03 [6999]~P1787(x69991)+~P1784(x69991)
% 32.24/32.03 [7000]~P1767(x70001)+~P1797(x70001)
% 32.24/32.03 [7001]~P826(x70011)+~P811(x70011)
% 32.24/32.03 [7002]~P1672(x70021)+~P1670(x70021)
% 32.24/32.03 [7003]~P1702(x70031)+~P1673(x70031)
% 32.24/32.03 [7004]~P1674(x70041)+~P1610(x70041)
% 32.24/32.03 [7005]~P1698(x70051)+~P1675(x70051)
% 32.24/32.03 [7006]~P1679(x70061)+~P1611(x70061)
% 32.24/32.03 [7007]~P1694(x70071)+~P1680(x70071)
% 32.24/32.03 [7008]~P1613(x70081)+~P1612(x70081)
% 32.24/32.03 [7009]~P1685(x70091)+~P1684(x70091)
% 32.24/32.03 [7010]~P808(x70101)+~P1810(x70101)
% 32.24/32.03 [7011]~P1653(x70111)+~P1614(x70111)
% 32.24/32.03 [7012]~P1411(x70121)+~P981(x70121)
% 32.24/32.03 [7013]~P1625(x70131)+~P1615(x70131)
% 32.24/32.03 [7014]~P1626(x70141)+~P1616(x70141)
% 32.24/32.03 [7015]~P1618(x70151)+~P1617(x70151)
% 32.24/32.03 [7016]~P1575(x70161)+~P1536(x70161)
% 32.24/32.03 [7017]~P1576(x70171)+~P1537(x70171)
% 32.24/32.03 [7018]~P1539(x70181)+~P1538(x70181)
% 32.24/32.03 [7019]~P1551(x70191)+~P1540(x70191)
% 32.24/32.03 [7020]~P1552(x70201)+~P1541(x70201)
% 32.24/32.03 [7021]~P1543(x70211)+~P1542(x70211)
% 32.24/32.03 [7022]~P1020(x70221)+~P1532(x70221)
% 32.24/32.03 [7023]~P1413(x70231)+~P1412(x70231)
% 32.24/32.03 [7024]~P1414(x70241)+~P1460(x70241)
% 32.24/32.03 [7025]~P307(x70251)+~P1414(x70251)
% 32.24/32.03 [7026]~P905(x70261)+~P307(x70261)
% 32.24/32.03 [7027]~P980(x70271)+~P1415(x70271)
% 32.24/32.03 [7028]~P1111(x70281)+~P980(x70281)
% 32.24/32.03 [7029]~P1112(x70291)+~P980(x70291)
% 32.24/32.03 [7030]~P1124(x70301)+~P1416(x70301)
% 32.24/32.03 [7031]~P1391(x70311)+~P1349(x70311)
% 32.24/32.03 [7032]~P1392(x70321)+~P1350(x70321)
% 32.24/32.03 [7033]~P1400(x70331)+~P1387(x70331)
% 32.24/32.03 [7034]~P1351(x70341)+~P1393(x70341)
% 32.24/32.03 [7035]~P1376(x70351)+~P1375(x70351)
% 32.24/32.03 [7036]~P1388(x70361)+~P1377(x70361)
% 32.24/32.03 [7037]~P1379(x70371)+~P1378(x70371)
% 32.24/32.03 [7038]~P1035(x70381)+~P1079(x70381)
% 32.24/32.03 [7039]~P1056(x70391)+~P1035(x70391)
% 32.24/32.03 [7040]~P1047(x70401)+~P1062(x70401)
% 32.24/32.03 [7041]~P350(x70411)+~P1057(x70411)
% 32.24/32.03 [7042]~P812(x70421)+~P350(x70421)
% 32.24/32.03 [7043]~P1054(x70431)+~P1058(x70431)
% 32.24/32.03 [7044]~P982(x70441)+~P813(x70441)
% 32.24/32.03 [7045]~P984(x70451)+~P1007(x70451)
% 32.24/32.03 [7046]~P993(x70461)+~P983(x70461)
% 32.24/32.03 [7047]~P987(x70471)+~P984(x70471)
% 32.24/32.03 [7048]~P878(x70481)+~P995(x70481)
% 32.24/32.03 [7049]~P864(x70491)+~P958(x70491)
% 32.24/32.03 [7050]~P851(x70501)+~P864(x70501)
% 32.24/32.03 [7051]~P918(x70511)+~P932(x70511)
% 32.24/32.03 [7052]~P851(x70521)+~P918(x70521)
% 32.24/32.03 [7053]~P919(x70531)+~P890(x70531)
% 32.24/32.03 [7054]~P889(x70541)+~P919(x70541)
% 32.24/32.03 [7055]~P906(x70551)+~P927(x70551)
% 32.24/32.03 [7056]~P767(x70561)+~P809(x70561)
% 32.24/32.03 [7057]~P777(x70571)+~P768(x70571)
% 32.24/32.03 [7058]~P770(x70581)+~P769(x70581)
% 32.24/32.03 [7059]~P286(x70591)+~P637(x70591)
% 32.24/32.03 [7060]~P284(x70601)+~P278(x70601)
% 32.24/32.03 [7061]~P202(x70611)+~P638(x70611)
% 32.24/32.03 [7062]~P2554(x70621)+~P2569(x70621)
% 32.24/32.03 [7063]~P716(x70631)+~P639(x70631)
% 32.24/32.03 [7064]~P641(x70641)+~P640(x70641)
% 32.24/32.03 [7065]~P2519(x70651)+~P527(x70651)
% 32.24/32.03 [7066]~P422(x70661)+~P297(x70661)
% 32.24/32.03 [7067]~P423(x70671)+~P297(x70671)
% 32.24/32.03 [7068]~P528(x70681)+~P610(x70681)
% 32.24/32.03 [7069]~P300(x70691)+~P528(x70691)
% 32.24/32.03 [7070]~P529(x70701)+~P300(x70701)
% 32.24/32.03 [7071]~P530(x70711)+~P300(x70711)
% 32.24/32.03 [7072]~P586(x70721)+~P570(x70721)
% 32.24/32.03 [7073]~P599(x70731)+~P587(x70731)
% 32.24/32.03 [7074]~P181(x70741)+~P540(x70741)
% 32.24/32.03 [7075]~P181(x70751)+~P541(x70751)
% 32.24/32.03 [7076]~P530(x70761)+~P533(x70761)
% 32.24/32.03 [7077]~P514(x70771)+~P478(x70771)
% 32.24/32.03 [7078]~P308(x70781)+~P478(x70781)
% 32.24/32.03 [7079]~P479(x70791)+~P308(x70791)
% 32.24/32.03 [7080]~P424(x70801)+~P308(x70801)
% 32.24/32.03 [7081]~P479(x70811)+~P494(x70811)
% 32.24/32.03 [7082]~P320(x70821)+~P480(x70821)
% 32.24/32.03 [7083]~P481(x70831)+~P320(x70831)
% 32.24/32.03 [7084]~P2554(x70841)+~P203(x70841)
% 32.24/32.03 [7085]~P159(x70851)+~P2554(x70851)
% 32.24/32.03 [7086]~P246(x70861)+~P204(x70861)
% 32.24/32.03 [7087]~P247(x70871)+~P205(x70871)
% 32.24/32.03 [7088]~P207(x70881)+~P206(x70881)
% 32.24/32.03 [7089]~P214(x70891)+~P208(x70891)
% 32.24/32.03 [7090]~P215(x70901)+~P209(x70901)
% 32.24/32.03 [7091]~P216(x70911)+~P210(x70911)
% 32.24/32.03 [7092]~P185(x70921)+~P184(x70921)
% 32.24/32.03 [7093]~P160(x70931)+~P159(x70931)
% 32.24/32.03 [7094]~P2579(x70941)+~P2570(x70941)
% 32.24/32.03 [7095]~P2572(x70951)+~P2571(x70951)
% 32.24/32.03 [7096]~P2504(x70961)+~P2503(x70961)
% 32.24/32.03 [7097]~P2483(x70971)+~P2473(x70971)
% 32.24/32.03 [7098]~P2475(x70981)+~P2474(x70981)
% 32.24/32.03 [7099]~P2379(x70991)+~P2413(x70991)
% 32.24/32.03 [7100]~P2409(x71001)+~P2443(x71001)
% 32.24/32.03 [7101]~P2415(x71011)+~P2414(x71011)
% 32.24/32.03 [7102]~P2416(x71021)+~P2433(x71021)
% 32.24/32.03 [7103]~P2204(x71031)+~P2403(x71031)
% 32.24/32.03 [7104]~P2304(x71041)+~P2202(x71041)
% 32.24/32.03 [7105]~P2171(x71051)+~P2202(x71051)
% 32.24/32.03 [7106]~P2203(x71061)+~P2202(x71061)
% 32.24/32.03 [7107]~P2283(x71071)+~P2405(x71071)
% 32.24/32.03 [7108]~P1991(x71081)+~P2283(x71081)
% 32.24/32.03 [7109]~P2380(x71091)+~P2204(x71091)
% 32.24/32.03 [7110]~P1991(x71101)+~P2204(x71101)
% 32.24/32.03 [7111]~P2296(x71111)+~P2287(x71111)
% 32.24/32.03 [7112]~P2171(x71121)+~P2287(x71121)
% 32.24/32.03 [7113]~P2290(x71131)+~P2288(x71131)
% 32.24/32.03 [7114]~P1943(x71141)+~P2288(x71141)
% 32.24/32.03 [7115]~P2022(x71151)+~P2382(x71151)
% 32.24/32.03 [7116]~P2358(x71161)+~P2341(x71161)
% 32.24/32.03 [7117]~P2359(x71171)+~P2342(x71171)
% 32.24/32.03 [7118]~P2344(x71181)+~P2343(x71181)
% 32.24/32.03 [7119]~P2345(x71191)+~P2316(x71191)
% 32.24/32.03 [7120]~P2323(x71201)+~P2317(x71201)
% 32.24/32.03 [7121]~P2324(x71211)+~P2318(x71211)
% 32.24/32.03 [7122]~P2301(x71221)+~P2300(x71221)
% 32.24/32.03 [7123]~P2172(x71231)+~P2205(x71231)
% 32.24/32.03 [7124]~P2248(x71241)+~P2206(x71241)
% 32.24/32.03 [7125]~P2249(x71251)+~P2207(x71251)
% 32.24/32.03 [7126]~P2209(x71261)+~P2208(x71261)
% 32.24/32.03 [7127]~P2216(x71271)+~P2210(x71271)
% 32.24/32.03 [7128]~P2217(x71281)+~P2211(x71281)
% 32.24/32.03 [7129]~P2218(x71291)+~P2212(x71291)
% 32.24/32.03 [7130]~P2187(x71301)+~P2186(x71301)
% 32.24/32.03 [7131]~P172(x71311)+~P163(x71311)
% 32.24/32.03 [7132]~P1445(x71321)+~P1401(x71321)
% 32.24/32.03 [7133]~P1381(x71331)+~P1394(x71331)
% 32.24/32.03 [7134]~P1231(x71341)+~P1113(x71341)
% 32.24/32.03 [7135]~P1191(x71351)+~P1080(x71351)
% 32.24/32.03 [7136]~P1067(x71361)+~P1066(x71361)
% 32.24/32.03 [7137]~P905(x71371)+~P898(x71371)
% 32.24/32.03 [7466]P2160(x74661)+P2150(x74661,a39)
% 32.24/32.03 [7467]P2163(x74671)+P2150(x74671,a28)
% 32.24/32.03 [7468]P2164(x74681)+P2150(x74681,a26)
% 32.24/32.03 [7469]P2137(x74691)+P2478(x74691,a27)
% 32.24/32.03 [7470]P2138(x74701)+P2478(x74701,a26)
% 32.24/32.03 [7471]P2135(x74711)+P2478(x74711,a28)
% 32.24/32.03 [7472]P2000(x74721)+P2093(x74721,a91)
% 32.24/32.03 [7473]P1888(x74731)+P1740(x74731,a27)
% 32.24/32.03 [7474]P1889(x74741)+P1740(x74741,a26)
% 32.24/32.03 [7475]P1886(x74751)+P1740(x74751,a28)
% 32.24/32.03 [7476]P1882(x74761)+P1740(x74761,a39)
% 32.24/32.03 [7477]P1878(x74771)+P1740(x74771,a50)
% 32.24/32.03 [7478]P1865(x74781)+P1815(x74781,a27)
% 32.24/32.03 [7479]P1845(x74791)+P1815(x74791,a26)
% 32.24/32.03 [7480]P1847(x74801)+P1815(x74801,a28)
% 32.24/32.03 [7481]P1848(x74811)+P1815(x74811,a39)
% 32.24/32.03 [7482]P1851(x74821)+P1815(x74821,a50)
% 32.24/32.03 [7483]P1853(x74831)+P1815(x74831,a62)
% 32.24/32.03 [7484]P1714(x74841)+P1716(x74841,a50)
% 32.24/32.03 [7485]P1718(x74851)+P1716(x74851,a39)
% 32.24/32.03 [7486]P1721(x74861)+P1716(x74861,a28)
% 32.24/32.03 [7487]P1724(x74871)+P1716(x74871,a26)
% 32.24/32.03 [7488]P1726(x74881)+P1716(x74881,a27)
% 32.24/32.03 [7489]P1562(x74891)+P1033(x74891,a27)
% 32.24/32.03 [7490]P1635(x74901)+P1591(x74901,a27)
% 32.24/32.03 [7491]P1553(x74911)+P1033(x74911,a50)
% 32.24/32.03 [7492]P1627(x74921)+P1591(x74921,a50)
% 32.24/32.03 [7493]P1557(x74931)+P1033(x74931,a39)
% 32.24/32.03 [7494]P1631(x74941)+P1591(x74941,a39)
% 32.24/32.03 [7495]P1563(x74951)+P1033(x74951,a28)
% 32.24/32.03 [7496]P1636(x74961)+P1591(x74961,a28)
% 32.24/32.03 [7497]P1567(x74971)+P1033(x74971,a26)
% 32.24/32.03 [7498]P1640(x74981)+P1591(x74981,a26)
% 32.24/32.03 [7499]P1493(x74991)+P472(x74991,a27)
% 32.24/32.03 [7500]P1428(x75001)+P1366(x75001,a39)
% 32.24/32.03 [7501]P1429(x75011)+P1366(x75011,a28)
% 32.24/32.03 [7502]P1421(x75021)+P1366(x75021,a26)
% 32.24/32.03 [7503]P1367(x75031)+P1366(x75031,a27)
% 32.24/32.03 [7504]P1382(x75041)+P1355(x75041,a27)
% 32.24/32.03 [7505]P1383(x75051)+P1355(x75051,a26)
% 32.24/32.03 [7506]P1384(x75061)+P1355(x75061,a28)
% 32.24/32.03 [7507]P1386(x75071)+P1355(x75071,a39)
% 32.24/32.03 [7508]P1154(x75081)+P1146(x75081,a27)
% 32.24/32.03 [7509]P1163(x75091)+P1146(x75091,a26)
% 32.24/32.03 [7510]P1173(x75101)+P1146(x75101,a28)
% 32.24/32.03 [7511]P1197(x75111)+P1146(x75111,a39)
% 32.24/32.03 [7512]P1247(x75121)+P1146(x75121,a50)
% 32.24/32.03 [7513]P1137(x75131)+P472(x75131,a27)
% 32.24/32.03 [7514]P789(x75141)+P2511(x75141,a27)
% 32.24/32.03 [7515]P790(x75151)+P2511(x75151,a26)
% 32.24/32.03 [7516]P787(x75161)+P2511(x75161,a28)
% 32.24/32.03 [7517]P780(x75171)+P2511(x75171,a39)
% 32.24/32.03 [7518]P722(x75181)+P2548(x75181,a26)
% 32.24/32.03 [7519]P728(x75191)+P165(x75191,a27)
% 32.24/32.03 [7520]P729(x75201)+P165(x75201,a26)
% 32.24/32.03 [7521]P725(x75211)+P165(x75211,a28)
% 32.24/32.03 [7522]P719(x75221)+P165(x75221,a39)
% 32.24/32.03 [7523]P518(x75231)+P321(x75231,a39)
% 32.24/32.03 [7524]P502(x75241)+P321(x75241,a27)
% 32.24/32.03 [7525]P466(x75251)+P418(x75251,a27)
% 32.24/32.03 [7526]P435(x75261)+P418(x75261,a26)
% 32.24/32.03 [7527]P276(x75271)+P2548(x75271,a26)
% 32.24/32.03 [7528]P261(x75281)+P170(x75281,a27)
% 32.24/32.03 [7529]P262(x75291)+P170(x75291,a26)
% 32.24/32.03 [7530]P258(x75301)+P170(x75301,a28)
% 32.24/32.03 [7531]P254(x75311)+P170(x75311,a39)
% 32.24/32.03 [7532]P250(x75321)+P170(x75321,a50)
% 32.24/32.03 [7533]P237(x75331)+P183(x75331,a27)
% 32.24/32.03 [7534]P217(x75341)+P183(x75341,a26)
% 32.24/32.03 [7535]P219(x75351)+P183(x75351,a28)
% 32.24/32.03 [7536]P220(x75361)+P183(x75361,a39)
% 32.24/32.03 [7537]P223(x75371)+P183(x75371,a50)
% 32.24/32.03 [7538]P225(x75381)+P183(x75381,a62)
% 32.24/32.03 [7539]P2590(x75391)+P2016(x75391,a27)
% 32.24/32.03 [7540]P2591(x75401)+P2016(x75401,a26)
% 32.24/32.03 [7541]P2588(x75411)+P2016(x75411,a28)
% 32.24/32.03 [7542]P2582(x75421)+P2016(x75421,a39)
% 32.24/32.03 [7543]P2494(x75431)+P2018(x75431,a27)
% 32.24/32.03 [7544]P2495(x75441)+P2018(x75441,a26)
% 32.24/32.03 [7545]P2492(x75451)+P2018(x75451,a28)
% 32.24/32.03 [7546]P2486(x75461)+P2018(x75461,a39)
% 32.24/32.03 [7547]P2374(x75471)+P2013(x75471,a27)
% 32.24/32.03 [7548]P2375(x75481)+P2013(x75481,a26)
% 32.24/32.03 [7549]P2372(x75491)+P2013(x75491,a28)
% 32.24/32.03 [7550]P2367(x75501)+P2013(x75501,a39)
% 32.24/32.03 [7551]P2361(x75511)+P2013(x75511,a50)
% 32.24/32.03 [7552]P2350(x75521)+P2184(x75521,a27)
% 32.24/32.03 [7553]P2325(x75531)+P2184(x75531,a26)
% 32.24/32.03 [7554]P2327(x75541)+P2184(x75541,a28)
% 32.24/32.03 [7555]P2328(x75551)+P2184(x75551,a39)
% 32.24/32.03 [7556]P2331(x75561)+P2184(x75561,a50)
% 32.24/32.03 [7557]P2333(x75571)+P2184(x75571,a62)
% 32.24/32.03 [7558]P2264(x75581)+P2174(x75581,a27)
% 32.24/32.03 [7559]P2265(x75591)+P2174(x75591,a26)
% 32.24/32.03 [7560]P2262(x75601)+P2174(x75601,a28)
% 32.24/32.03 [7561]P2256(x75611)+P2174(x75611,a39)
% 32.24/32.03 [7562]P2252(x75621)+P2174(x75621,a50)
% 32.24/32.03 [7563]P2239(x75631)+P2185(x75631,a27)
% 32.24/32.03 [7564]P2219(x75641)+P2185(x75641,a26)
% 32.24/32.03 [7565]P2221(x75651)+P2185(x75651,a28)
% 32.24/32.03 [7566]P2222(x75661)+P2185(x75661,a39)
% 32.24/32.03 [7567]P2225(x75671)+P2185(x75671,a50)
% 32.24/32.03 [7568]P2227(x75681)+P2185(x75681,a62)
% 32.24/32.03 [7569]P2169(x75691)+P2082(x75691,a92)
% 32.24/32.03 [7570]P1482(x75701)+P244(x75701,a27)
% 32.24/32.03 [7571]P1492(x75711)+P244(x75711,a26)
% 32.24/32.03 [7572]P1456(x75721)+P244(x75721,a28)
% 32.24/32.03 [7573]P1420(x75731)+P244(x75731,a39)
% 32.24/32.03 [7574]P1278(x75741)+P1065(x75741,a27)
% 32.24/32.03 [7575]P1133(x75751)+P1065(x75751,a26)
% 32.24/32.03 [7576]P1139(x75761)+P1065(x75761,a28)
% 32.24/32.03 [7577]P1142(x75771)+P1065(x75771,a39)
% 32.24/32.03 [7578]P1153(x75781)+P1065(x75781,a50)
% 32.24/32.03 [7987]~P713(x79871)+P165(x79871,a27)
% 32.24/32.03 [7988]~P639(x79881)+P165(x79881,a27)
% 32.24/32.03 [7989]~P713(x79891)+P165(x79891,a26)
% 32.24/32.03 [7990]~P639(x79901)+P165(x79901,a26)
% 32.24/32.03 [7991]~P713(x79911)+P165(x79911,a28)
% 32.24/32.03 [7992]~P640(x79921)+P165(x79921,a28)
% 32.24/32.03 [7993]~P713(x79931)+P165(x79931,a39)
% 32.24/32.03 [7994]~P2575(x79941)+P2016(x79941,a27)
% 32.24/32.03 [7995]~P2570(x79951)+P2016(x79951,a27)
% 32.24/32.03 [7996]~P2575(x79961)+P2016(x79961,a26)
% 32.24/32.03 [7997]~P2570(x79971)+P2016(x79971,a26)
% 32.24/32.03 [7998]~P2575(x79981)+P2016(x79981,a28)
% 32.24/32.03 [7999]~P2571(x79991)+P2016(x79991,a28)
% 32.24/32.03 [8000]~P2575(x80001)+P2016(x80001,a39)
% 32.24/32.03 [8001]~P774(x80011)+P2511(x80011,a27)
% 32.24/32.03 [8002]~P768(x80021)+P2511(x80021,a27)
% 32.24/32.03 [8003]~P774(x80031)+P2511(x80031,a26)
% 32.24/32.03 [8004]~P768(x80041)+P2511(x80041,a26)
% 32.24/32.03 [8005]~P774(x80051)+P2511(x80051,a28)
% 32.24/32.03 [8006]~P769(x80061)+P2511(x80061,a28)
% 32.24/32.03 [8007]~P774(x80071)+P2511(x80071,a39)
% 32.24/32.03 [8008]~P2479(x80081)+P2018(x80081,a27)
% 32.24/32.03 [8009]~P2473(x80091)+P2018(x80091,a27)
% 32.24/32.03 [8010]~P2479(x80101)+P2018(x80101,a26)
% 32.24/32.03 [8011]~P2473(x80111)+P2018(x80111,a26)
% 32.24/32.03 [8012]~P2479(x80121)+P2018(x80121,a28)
% 32.24/32.03 [8013]~P2474(x80131)+P2018(x80131,a28)
% 32.24/32.03 [8014]~P2479(x80141)+P2018(x80141,a39)
% 32.24/32.03 [8015]~P2148(x80151)+P2019(x80151,a27)
% 32.24/32.03 [8016]~P2152(x80161)+P2019(x80161,a27)
% 32.24/32.03 [8017]~P2148(x80171)+P2019(x80171,a26)
% 32.24/32.03 [8018]~P2162(x80181)+P2150(x80181,a27)
% 32.24/32.03 [8019]~P2152(x80191)+P2150(x80191,a62)
% 32.24/32.03 [8020]~P2151(x80201)+P2150(x80201,a50)
% 32.24/32.03 [8021]~P2125(x80211)+P2478(x80211,a27)
% 32.24/32.03 [8022]~P2075(x80221)+P2478(x80221,a27)
% 32.24/32.03 [8023]~P2075(x80231)+P2478(x80231,a26)
% 32.24/32.03 [8024]~P2125(x80241)+P2478(x80241,a28)
% 32.24/32.03 [8025]~P2137(x80251)+P2132(x80251,a27)
% 32.24/32.03 [8026]~P2134(x80261)+P2132(x80261,a26)
% 32.24/32.03 [8027]~P2091(x80271)+P2132(x80271,a28)
% 32.24/32.03 [8028]~P404(x80281)+P902(x80281,a27)
% 32.24/32.03 [8029]~P285(x80291)+P902(x80291,a26)
% 32.24/32.03 [8030]~P326(x80301)+P902(x80301,a26)
% 32.24/32.03 [8031]~P329(x80311)+P902(x80311,a28)
% 32.24/32.03 [8032]~P1979(x80321)+P902(x80321,a28)
% 32.24/32.03 [8033]~P410(x80331)+P902(x80331,a39)
% 32.24/32.03 [8034]~P351(x80341)+P902(x80341,a62)
% 32.24/32.03 [8035]~P1981(x80351)+P902(x80351,a62)
% 32.24/32.03 [8036]~P773(x80361)+P902(x80361,a50)
% 32.24/32.03 [8037]~P349(x80371)+P902(x80371,a50)
% 32.24/32.03 [8038]~P1561(x80381)+P902(x80381,a83)
% 32.24/32.03 [8039]~P362(x80391)+P902(x80391,a83)
% 32.24/32.03 [8040]~P407(x80401)+P902(x80401,a61)
% 32.24/32.03 [8041]~P1935(x80411)+P902(x80411,a29)
% 32.24/32.03 [8042]~P755(x80421)+P902(x80421,a30)
% 32.24/32.03 [8043]~P366(x80431)+P902(x80431,a91)
% 32.24/32.03 [8044]~P1997(x80441)+P902(x80441,a91)
% 32.24/32.03 [8045]~P368(x80451)+P902(x80451,a92)
% 32.24/32.03 [8046]~P1983(x80461)+P902(x80461,a92)
% 32.24/32.03 [8047]~P618(x80471)+P2093(x80471,a27)
% 32.24/32.03 [8048]~P685(x80481)+P2093(x80481,a26)
% 32.24/32.03 [8049]~P325(x80491)+P2093(x80491,a28)
% 32.24/32.03 [8050]~P2505(x80501)+P2093(x80501,a39)
% 32.24/32.03 [8051]~P1966(x80511)+P2093(x80511,a39)
% 32.24/32.03 [8052]~P339(x80521)+P2093(x80521,a62)
% 32.24/32.03 [8053]~P386(x80531)+P2093(x80531,a50)
% 32.24/32.03 [8054]~P2092(x80541)+P2093(x80541,a83)
% 32.24/32.03 [8055]~P2520(x80551)+P2093(x80551,a61)
% 32.24/32.03 [8056]~P754(x80561)+P2093(x80561,a61)
% 32.24/32.03 [8057]~P1912(x80571)+P2093(x80571,a29)
% 32.24/32.03 [8058]~P738(x80581)+P2093(x80581,a30)
% 32.24/32.03 [8059]~P378(x80591)+P2093(x80591,a91)
% 32.24/32.03 [8060]~P359(x80601)+P2093(x80601,a92)
% 32.24/32.03 [8061]~P2302(x80611)+P2321(x80611,a28)
% 32.24/32.03 [8062]~P2080(x80621)+P2079(x80621,a27)
% 32.24/32.03 [8063]~P1996(x80631)+P2079(x80631,a27)
% 32.24/32.03 [8064]~P2080(x80641)+P2079(x80641,a26)
% 32.24/32.03 [8065]~P2417(x80651)+P2079(x80651,a26)
% 32.24/32.03 [8066]~P1996(x80661)+P2071(x80661,a27)
% 32.24/32.03 [8067]~P2072(x80671)+P2071(x80671,a26)
% 32.24/32.03 [8068]~P2417(x80681)+P2071(x80681,a26)
% 32.24/32.03 [8069]~P2067(x80691)+P2066(x80691,a27)
% 32.24/32.03 [8070]~P1996(x80701)+P2066(x80701,a27)
% 32.24/32.03 [8071]~P2417(x80711)+P2066(x80711,a26)
% 32.24/32.03 [8072]~P1996(x80721)+P2068(x80721,a27)
% 32.24/32.03 [8073]~P2417(x80731)+P2068(x80731,a26)
% 32.24/32.03 [8074]~P2059(x80741)+P2003(x80741,a27)
% 32.24/32.03 [8075]~P2051(x80751)+P2003(x80751,a27)
% 32.24/32.03 [8076]~P2036(x80761)+P2029(x80761,a61)
% 32.24/32.03 [8077]~P2528(x80771)+P2546(x80771,a27)
% 32.24/32.03 [8078]~P2525(x80781)+P2546(x80781,a26)
% 32.24/32.03 [8079]~P2543(x80791)+P2546(x80791,a28)
% 32.24/32.03 [8080]~P1901(x80801)+P2584(x80801,a27)
% 32.24/32.03 [8081]~P1703(x80811)+P2584(x80811,a26)
% 32.24/32.03 [8082]~P2585(x80821)+P2584(x80821,a28)
% 32.24/32.03 [8083]~P1832(x80831)+P1740(x80831,a27)
% 32.24/32.03 [8084]~P1832(x80841)+P1740(x80841,a26)
% 32.24/32.03 [8085]~P1833(x80851)+P1740(x80851,a28)
% 32.24/32.03 [8086]~P1834(x80861)+P1740(x80861,a39)
% 32.24/32.03 [8087]~P101(x80871)+P1740(x80871,a50)
% 32.24/32.03 [8088]~P1893(x80881)+P1892(x80881,a27)
% 32.24/32.03 [8089]~P2521(x80891)+P1892(x80891,a27)
% 32.24/32.03 [8090]~P1893(x80901)+P1892(x80901,a26)
% 32.24/32.03 [8091]~P2461(x80911)+P1892(x80911,a26)
% 32.24/32.03 [8092]~P1888(x80921)+P1872(x80921,a27)
% 32.24/32.03 [8093]~P1885(x80931)+P1872(x80931,a26)
% 32.24/32.03 [8094]~P1881(x80941)+P1872(x80941,a28)
% 32.24/32.03 [8095]~P1877(x80951)+P1872(x80951,a39)
% 32.24/32.03 [8096]~P1871(x80961)+P1872(x80961,a50)
% 32.24/32.03 [8097]~P2521(x80971)+P1867(x80971,a27)
% 32.24/32.03 [8098]~P1868(x80981)+P1867(x80981,a26)
% 32.24/32.03 [8099]~P2461(x80991)+P1867(x80991,a26)
% 32.24/32.03 [8100]~P1865(x81001)+P1827(x81001,a27)
% 32.24/32.03 [8101]~P1863(x81011)+P1827(x81011,a26)
% 32.24/32.03 [8102]~P1859(x81021)+P1827(x81021,a28)
% 32.24/32.03 [8103]~P1855(x81031)+P1827(x81031,a39)
% 32.24/32.03 [8104]~P1826(x81041)+P1827(x81041,a62)
% 32.24/32.03 [8105]~P1850(x81051)+P1827(x81051,a50)
% 32.24/32.03 [8106]~P1846(x81061)+P1815(x81061,a27)
% 32.24/32.03 [8107]~P1820(x81071)+P1819(x81071,a27)
% 32.24/32.03 [8108]~P2521(x81081)+P1819(x81081,a27)
% 32.24/32.03 [8109]~P2461(x81091)+P1819(x81091,a26)
% 32.24/32.03 [8110]~P2521(x81101)+P1821(x81101,a27)
% 32.24/32.03 [8111]~P2461(x81111)+P1821(x81111,a26)
% 32.24/32.03 [8112]~P818(x81121)+P819(x81121,a27)
% 32.24/32.03 [8113]~P1754(x81131)+P819(x81131,a26)
% 32.24/32.03 [8114]~P825(x81141)+P820(x81141,a27)
% 32.24/32.03 [8115]~P1755(x81151)+P820(x81151,a26)
% 32.24/32.03 [8116]~P1794(x81161)+P1741(x81161,a27)
% 32.24/32.03 [8117]~P1759(x81171)+P1741(x81171,a27)
% 32.24/32.03 [8118]~P1790(x81181)+P1741(x81181,a26)
% 32.24/32.03 [8119]~P1760(x81191)+P1741(x81191,a26)
% 32.24/32.03 [8120]~P1781(x81201)+P1741(x81201,a28)
% 32.24/32.03 [8121]~P841(x81211)+P842(x81211,a27)
% 32.24/32.03 [8122]~P1762(x81221)+P842(x81221,a26)
% 32.24/32.03 [8123]~P1706(x81231)+P1747(x81231,a27)
% 32.24/32.03 [8124]~P108(x81241)+P1747(x81241,a27)
% 32.24/32.03 [8125]~P1700(x81251)+P1747(x81251,a26)
% 32.24/32.03 [8126]~P108(x81261)+P1747(x81261,a26)
% 32.24/32.03 [8127]~P1696(x81271)+P1747(x81271,a28)
% 32.24/32.03 [8128]~P108(x81281)+P1747(x81281,a28)
% 32.24/32.03 [8129]~P1690(x81291)+P1747(x81291,a39)
% 32.24/32.03 [8130]~P108(x81301)+P1747(x81301,a39)
% 32.24/32.03 [8131]~P1664(x81311)+P1747(x81311,a50)
% 32.24/32.03 [8132]~P108(x81321)+P1747(x81321,a50)
% 32.24/32.03 [8133]~P1737(x81331)+P1009(x81331,a27)
% 32.24/32.03 [8134]~P1738(x81341)+P1009(x81341,a27)
% 32.24/32.03 [8135]~P1643(x81351)+P1009(x81351,a27)
% 32.24/32.03 [8136]~P1709(x81361)+P1009(x81361,a27)
% 32.24/32.03 [8137]~P1599(x81371)+P1009(x81371,a27)
% 32.24/32.03 [8138]~P1595(x81381)+P1009(x81381,a27)
% 32.24/32.03 [8139]~P1739(x81391)+P1009(x81391,a26)
% 32.24/32.03 [8140]~P1738(x81401)+P1009(x81401,a26)
% 32.24/32.03 [8141]~P1658(x81411)+P1009(x81411,a26)
% 32.24/32.03 [8142]~P1709(x81421)+P1009(x81421,a26)
% 32.24/32.03 [8143]~P1608(x81431)+P1009(x81431,a26)
% 32.24/32.03 [8144]~P1598(x81441)+P1009(x81441,a26)
% 32.24/32.03 [8145]~P1599(x81451)+P1009(x81451,a26)
% 32.24/32.03 [8146]~P1706(x81461)+P1716(x81461,a27)
% 32.24/32.03 [8147]~P1700(x81471)+P1716(x81471,a26)
% 32.24/32.03 [8148]~P1725(x81481)+P1716(x81481,a26)
% 32.24/32.03 [8149]~P1696(x81491)+P1716(x81491,a28)
% 32.24/32.03 [8150]~P1722(x81501)+P1716(x81501,a28)
% 32.24/32.03 [8151]~P1690(x81511)+P1716(x81511,a39)
% 32.24/32.03 [8152]~P1719(x81521)+P1716(x81521,a39)
% 32.24/32.03 [8153]~P1664(x81531)+P1716(x81531,a50)
% 32.24/32.03 [8154]~P1715(x81541)+P1716(x81541,a50)
% 32.24/32.03 [8155]~P1670(x81551)+P1033(x81551,a27)
% 32.24/32.03 [8156]~P1577(x81561)+P1033(x81561,a27)
% 32.24/32.03 [8157]~P1540(x81571)+P1033(x81571,a27)
% 32.24/32.03 [8158]~P1676(x81581)+P1033(x81581,a26)
% 32.24/32.03 [8159]~P1540(x81591)+P1033(x81591,a26)
% 32.24/32.03 [8160]~P1681(x81601)+P1033(x81601,a28)
% 32.24/32.03 [8161]~P1541(x81611)+P1033(x81611,a28)
% 32.24/32.03 [8162]~P1686(x81621)+P1033(x81621,a39)
% 32.24/32.03 [8163]~P1542(x81631)+P1033(x81631,a39)
% 32.24/32.03 [8164]~P1706(x81641)+P1665(x81641,a27)
% 32.24/32.03 [8165]~P110(x81651)+P1665(x81651,a27)
% 32.24/32.03 [8166]~P1700(x81661)+P1665(x81661,a26)
% 32.24/32.03 [8167]~P110(x81671)+P1665(x81671,a26)
% 32.24/32.03 [8168]~P1696(x81681)+P1665(x81681,a28)
% 32.24/32.03 [8169]~P110(x81691)+P1665(x81691,a28)
% 32.24/32.03 [8170]~P1690(x81701)+P1665(x81701,a39)
% 32.24/32.03 [8171]~P110(x81711)+P1665(x81711,a39)
% 32.24/32.03 [8172]~P1664(x81721)+P1665(x81721,a50)
% 32.24/32.03 [8173]~P110(x81731)+P1665(x81731,a50)
% 32.24/32.03 [8174]~P1670(x81741)+P1591(x81741,a27)
% 32.24/32.03 [8175]~P1615(x81751)+P1591(x81751,a27)
% 32.24/32.03 [8176]~P1676(x81761)+P1591(x81761,a26)
% 32.24/32.03 [8177]~P1615(x81771)+P1591(x81771,a26)
% 32.24/32.03 [8178]~P1681(x81781)+P1591(x81781,a28)
% 32.24/32.03 [8179]~P1616(x81791)+P1591(x81791,a28)
% 32.24/32.03 [8180]~P1686(x81801)+P1591(x81801,a39)
% 32.24/32.03 [8181]~P1617(x81811)+P1591(x81811,a39)
% 32.24/32.03 [8182]~P1635(x81821)+P1621(x81821,a27)
% 32.24/32.03 [8183]~P1638(x81831)+P1621(x81831,a26)
% 32.24/32.03 [8184]~P1633(x81841)+P1621(x81841,a28)
% 32.24/32.03 [8185]~P1629(x81851)+P1621(x81851,a39)
% 32.24/32.03 [8186]~P1620(x81861)+P1621(x81861,a50)
% 32.24/32.03 [8187]~P1562(x81871)+P1571(x81871,a27)
% 32.24/32.03 [8188]~P1587(x81881)+P1571(x81881,a26)
% 32.24/32.03 [8189]~P1582(x81891)+P1571(x81891,a28)
% 32.24/32.03 [8190]~P1579(x81901)+P1571(x81901,a39)
% 32.24/32.03 [8191]~P1569(x81911)+P1571(x81911,a50)
% 32.24/32.03 [8192]~P1562(x81921)+P1547(x81921,a27)
% 32.24/32.03 [8193]~P1565(x81931)+P1547(x81931,a26)
% 32.24/32.03 [8194]~P1559(x81941)+P1547(x81941,a28)
% 32.24/32.03 [8195]~P1555(x81951)+P1547(x81951,a39)
% 32.24/32.03 [8196]~P1546(x81961)+P1547(x81961,a50)
% 32.24/32.03 [8197]~P1462(x81971)+P1471(x81971,a39)
% 32.24/32.03 [8198]~P707(x81981)+P562(x81981,a27)
% 32.24/32.03 [8199]~P697(x81991)+P562(x81991,a27)
% 32.24/32.03 [8200]~P702(x82001)+P562(x82001,a27)
% 32.24/32.03 [8201]~P1505(x82011)+P562(x82011,a26)
% 32.24/32.03 [8202]~P1486(x82021)+P562(x82021,a26)
% 32.24/32.03 [8203]~P1454(x82031)+P562(x82031,a26)
% 32.24/32.03 [8204]~P111(x82041)+P562(x82041,a39)
% 32.24/32.03 [8205]~P112(x82051)+P562(x82051,a39)
% 32.24/32.03 [8206]~P71(x82061)+P562(x82061,a39)
% 32.24/32.03 [8207]~P74(x82071)+P562(x82071,a39)
% 32.24/32.03 [8208]~P112(x82081)+P562(x82081,a62)
% 32.24/32.03 [8209]~P69(x82091)+P562(x82091,a62)
% 32.24/32.03 [8210]~P72(x82101)+P562(x82101,a62)
% 32.24/32.03 [8211]~P106(x82111)+P562(x82111,a62)
% 32.24/32.03 [8212]~P112(x82121)+P562(x82121,a50)
% 32.24/32.03 [8213]~P69(x82131)+P562(x82131,a50)
% 32.24/32.03 [8214]~P70(x82141)+P562(x82141,a50)
% 32.24/32.03 [8215]~P71(x82151)+P562(x82151,a50)
% 32.24/32.03 [8216]~P111(x82161)+P562(x82161,a61)
% 32.24/32.03 [8217]~P112(x82171)+P562(x82171,a61)
% 32.24/32.03 [8218]~P69(x82181)+P562(x82181,a61)
% 32.24/32.03 [8219]~P70(x82191)+P562(x82191,a61)
% 32.24/32.03 [8220]~P71(x82201)+P562(x82201,a61)
% 32.24/32.03 [8221]~P72(x82211)+P562(x82211,a61)
% 32.24/32.03 [8222]~P73(x82221)+P562(x82221,a61)
% 32.24/32.03 [8223]~P1507(x82231)+P472(x82231,a27)
% 32.24/32.03 [8224]~P1508(x82241)+P472(x82241,a27)
% 32.24/32.03 [8225]~P651(x82251)+P472(x82251,a27)
% 32.24/32.03 [8226]~P1508(x82261)+P472(x82261,a26)
% 32.24/32.03 [8227]~P1508(x82271)+P472(x82271,a28)
% 32.24/32.03 [8228]~P1128(x82281)+P499(x82281,a73)
% 32.24/32.03 [8229]~P1117(x82291)+P1043(x82291,a39)
% 32.24/32.03 [8230]~P1115(x82301)+P1043(x82301,a61)
% 32.24/32.03 [8231]~P1114(x82311)+P1043(x82311,a91)
% 32.24/32.03 [8232]~P1449(x82321)+P1043(x82321,a31)
% 32.24/32.03 [8233]~P1119(x82331)+P1078(x82331,a28)
% 32.24/32.03 [8234]~P1120(x82341)+P1078(x82341,a62)
% 32.24/32.03 [8235]~P1450(x82351)+P1078(x82351,a30)
% 32.24/32.03 [8236]~P1122(x82361)+P1078(x82361,a92)
% 32.24/32.03 [8237]~P1443(x82371)+P1143(x82371,a27)
% 32.24/32.03 [8238]~P1443(x82381)+P1143(x82381,a26)
% 32.24/32.03 [8239]~P1442(x82391)+P1143(x82391,a28)
% 32.24/32.03 [8240]~P1441(x82401)+P1143(x82401,a39)
% 32.24/32.03 [8241]~P1439(x82411)+P1143(x82411,a62)
% 32.24/32.03 [8242]~P1440(x82421)+P1143(x82421,a50)
% 32.24/32.03 [8243]~P1419(x82431)+P1143(x82431,a83)
% 32.24/32.03 [8244]~P1438(x82441)+P1143(x82441,a61)
% 32.24/32.03 [8245]~P1141(x82451)+P1143(x82451,a92)
% 32.24/32.03 [8246]~P1382(x82461)+P1366(x82461,a27)
% 32.24/32.03 [8247]~P1404(x82471)+P1366(x82471,a26)
% 32.24/32.03 [8248]~P1399(x82481)+P1366(x82481,a28)
% 32.24/32.03 [8249]~P1353(x82491)+P1366(x82491,a39)
% 32.24/32.03 [8250]~P1428(x82501)+P1431(x82501,a27)
% 32.24/32.03 [8251]~P1428(x82511)+P1431(x82511,a26)
% 32.24/32.03 [8252]~P1428(x82521)+P1431(x82521,a28)
% 32.24/32.03 [8253]~P1428(x82531)+P1431(x82531,a39)
% 32.24/32.03 [8254]~P1428(x82541)+P1431(x82541,a62)
% 32.24/32.03 [8255]~P1428(x82551)+P1431(x82551,a50)
% 32.24/32.03 [8256]~P1428(x82561)+P1431(x82561,a83)
% 32.24/32.03 [8257]~P1428(x82571)+P1431(x82571,a61)
% 32.24/32.03 [8258]~P1428(x82581)+P1431(x82581,a29)
% 32.24/32.03 [8259]~P1428(x82591)+P1431(x82591,a30)
% 32.24/32.03 [8260]~P1428(x82601)+P1431(x82601,a91)
% 32.24/32.03 [8261]~P1428(x82611)+P1431(x82611,a92)
% 32.24/32.03 [8262]~P1428(x82621)+P1431(x82621,a31)
% 32.24/32.03 [8263]~P1428(x82631)+P1431(x82631,a32)
% 32.24/32.03 [8264]~P1428(x82641)+P1431(x82641,a33)
% 32.24/32.03 [8265]~P1428(x82651)+P1431(x82651,a34)
% 32.24/32.03 [8266]~P1428(x82661)+P1431(x82661,a35)
% 32.24/32.03 [8267]~P1429(x82671)+P1430(x82671,a27)
% 32.24/32.03 [8268]~P1429(x82681)+P1430(x82681,a26)
% 32.24/32.03 [8269]~P1429(x82691)+P1430(x82691,a28)
% 32.24/32.03 [8270]~P1429(x82701)+P1430(x82701,a39)
% 32.24/32.03 [8271]~P1429(x82711)+P1430(x82711,a62)
% 32.24/32.03 [8272]~P1429(x82721)+P1430(x82721,a50)
% 32.24/32.03 [8273]~P1429(x82731)+P1430(x82731,a83)
% 32.24/32.03 [8274]~P1429(x82741)+P1430(x82741,a61)
% 32.24/32.03 [8275]~P1429(x82751)+P1430(x82751,a29)
% 32.24/32.03 [8276]~P1429(x82761)+P1430(x82761,a30)
% 32.24/32.03 [8277]~P1429(x82771)+P1430(x82771,a91)
% 32.24/32.03 [8278]~P1429(x82781)+P1430(x82781,a92)
% 32.24/32.03 [8279]~P1429(x82791)+P1430(x82791,a31)
% 32.24/32.03 [8280]~P1429(x82801)+P1430(x82801,a32)
% 32.24/32.03 [8281]~P1429(x82811)+P1430(x82811,a33)
% 32.24/32.03 [8282]~P1429(x82821)+P1430(x82821,a34)
% 32.24/32.03 [8283]~P1429(x82831)+P1430(x82831,a35)
% 32.24/32.03 [8284]~P1421(x82841)+P1422(x82841,a27)
% 32.24/32.03 [8285]~P1421(x82851)+P1422(x82851,a26)
% 32.24/32.03 [8286]~P1421(x82861)+P1422(x82861,a28)
% 32.24/32.03 [8287]~P1421(x82871)+P1422(x82871,a39)
% 32.24/32.03 [8288]~P1421(x82881)+P1422(x82881,a62)
% 32.24/32.03 [8289]~P1421(x82891)+P1422(x82891,a50)
% 32.24/32.03 [8290]~P1421(x82901)+P1422(x82901,a83)
% 32.24/32.03 [8291]~P1421(x82911)+P1422(x82911,a61)
% 32.24/32.03 [8292]~P1421(x82921)+P1422(x82921,a29)
% 32.24/32.03 [8293]~P1421(x82931)+P1422(x82931,a30)
% 32.24/32.03 [8294]~P1421(x82941)+P1422(x82941,a91)
% 32.24/32.03 [8295]~P1421(x82951)+P1422(x82951,a92)
% 32.24/32.03 [8296]~P1421(x82961)+P1422(x82961,a31)
% 32.24/32.03 [8297]~P1421(x82971)+P1422(x82971,a32)
% 32.24/32.03 [8298]~P1421(x82981)+P1422(x82981,a33)
% 32.24/32.03 [8299]~P1421(x82991)+P1422(x82991,a34)
% 32.24/32.03 [8300]~P1421(x83001)+P1422(x83001,a35)
% 32.24/32.03 [8301]~P1367(x83011)+P1368(x83011,a27)
% 32.24/32.03 [8302]~P1367(x83021)+P1368(x83021,a26)
% 32.24/32.03 [8303]~P1367(x83031)+P1368(x83031,a28)
% 32.24/32.03 [8304]~P1367(x83041)+P1368(x83041,a39)
% 32.24/32.03 [8305]~P1367(x83051)+P1368(x83051,a62)
% 32.24/32.03 [8306]~P1367(x83061)+P1368(x83061,a50)
% 32.24/32.03 [8307]~P1367(x83071)+P1368(x83071,a83)
% 32.24/32.03 [8308]~P1367(x83081)+P1368(x83081,a61)
% 32.24/32.03 [8309]~P1367(x83091)+P1368(x83091,a29)
% 32.24/32.03 [8310]~P1367(x83101)+P1368(x83101,a30)
% 32.24/32.03 [8311]~P1367(x83111)+P1368(x83111,a91)
% 32.24/32.03 [8312]~P1367(x83121)+P1368(x83121,a92)
% 32.24/32.03 [8313]~P1367(x83131)+P1368(x83131,a31)
% 32.24/32.03 [8314]~P1367(x83141)+P1368(x83141,a32)
% 32.24/32.03 [8315]~P1367(x83151)+P1368(x83151,a33)
% 32.24/32.03 [8316]~P1367(x83161)+P1368(x83161,a34)
% 32.24/32.03 [8317]~P1367(x83171)+P1368(x83171,a35)
% 32.24/32.03 [8318]~P1387(x83181)+P1355(x83181,a27)
% 32.24/32.03 [8319]~P1154(x83191)+P1344(x83191,a27)
% 32.24/32.03 [8320]~P1154(x83201)+P1344(x83201,a26)
% 32.24/32.03 [8321]~P1154(x83211)+P1344(x83211,a28)
% 32.24/32.03 [8322]~P1154(x83221)+P1344(x83221,a39)
% 32.24/32.03 [8323]~P1154(x83231)+P1344(x83231,a62)
% 32.24/32.03 [8324]~P1154(x83241)+P1344(x83241,a50)
% 32.24/32.03 [8325]~P1154(x83251)+P1344(x83251,a83)
% 32.24/32.03 [8326]~P1154(x83261)+P1344(x83261,a61)
% 32.24/32.03 [8327]~P1154(x83271)+P1344(x83271,a91)
% 32.24/32.03 [8328]~P1154(x83281)+P1344(x83281,a92)
% 32.24/32.03 [8329]~P1163(x83291)+P1340(x83291,a27)
% 32.24/32.03 [8330]~P1163(x83301)+P1340(x83301,a26)
% 32.24/32.03 [8331]~P1163(x83311)+P1340(x83311,a28)
% 32.24/32.03 [8332]~P1163(x83321)+P1340(x83321,a39)
% 32.24/32.03 [8333]~P1163(x83331)+P1340(x83331,a62)
% 32.24/32.03 [8334]~P1163(x83341)+P1340(x83341,a50)
% 32.24/32.03 [8335]~P1163(x83351)+P1340(x83351,a83)
% 32.24/32.03 [8336]~P1163(x83361)+P1340(x83361,a61)
% 32.24/32.03 [8337]~P1163(x83371)+P1340(x83371,a29)
% 32.24/32.03 [8338]~P1163(x83381)+P1340(x83381,a30)
% 32.24/32.03 [8339]~P1163(x83391)+P1340(x83391,a91)
% 32.24/32.03 [8340]~P1163(x83401)+P1340(x83401,a92)
% 32.24/32.03 [8341]~P1154(x83411)+P1333(x83411,a27)
% 32.24/32.03 [8342]~P1154(x83421)+P1333(x83421,a26)
% 32.24/32.03 [8343]~P1154(x83431)+P1333(x83431,a28)
% 32.24/32.03 [8344]~P1154(x83441)+P1333(x83441,a39)
% 32.24/32.03 [8345]~P1154(x83451)+P1333(x83451,a62)
% 32.24/32.03 [8346]~P1154(x83461)+P1333(x83461,a50)
% 32.24/32.03 [8347]~P1154(x83471)+P1333(x83471,a83)
% 32.24/32.03 [8348]~P1154(x83481)+P1333(x83481,a61)
% 32.24/32.03 [8349]~P1154(x83491)+P1333(x83491,a29)
% 32.24/32.03 [8350]~P1154(x83501)+P1333(x83501,a30)
% 32.24/32.03 [8351]~P1154(x83511)+P1333(x83511,a91)
% 32.24/32.03 [8352]~P1154(x83521)+P1333(x83521,a92)
% 32.24/32.03 [8353]~P1173(x83531)+P1327(x83531,a27)
% 32.24/32.03 [8354]~P1173(x83541)+P1327(x83541,a26)
% 32.24/32.03 [8355]~P1173(x83551)+P1327(x83551,a28)
% 32.24/32.03 [8356]~P1173(x83561)+P1327(x83561,a39)
% 32.24/32.03 [8357]~P1173(x83571)+P1327(x83571,a62)
% 32.24/32.03 [8358]~P1173(x83581)+P1327(x83581,a50)
% 32.24/32.03 [8359]~P1173(x83591)+P1327(x83591,a83)
% 32.24/32.03 [8360]~P1173(x83601)+P1327(x83601,a61)
% 32.24/32.03 [8361]~P1173(x83611)+P1327(x83611,a29)
% 32.24/32.03 [8362]~P1173(x83621)+P1327(x83621,a30)
% 32.24/32.03 [8363]~P1173(x83631)+P1327(x83631,a91)
% 32.24/32.03 [8364]~P1173(x83641)+P1327(x83641,a92)
% 32.24/32.03 [8365]~P1173(x83651)+P1327(x83651,a31)
% 32.24/32.03 [8366]~P1173(x83661)+P1327(x83661,a32)
% 32.24/32.03 [8367]~P1173(x83671)+P1327(x83671,a33)
% 32.24/32.03 [8368]~P1173(x83681)+P1327(x83681,a34)
% 32.24/32.03 [8369]~P1154(x83691)+P1322(x83691,a27)
% 32.24/32.03 [8370]~P1154(x83701)+P1322(x83701,a26)
% 32.24/32.03 [8371]~P1154(x83711)+P1322(x83711,a28)
% 32.24/32.03 [8372]~P1154(x83721)+P1322(x83721,a39)
% 32.24/32.03 [8373]~P1154(x83731)+P1322(x83731,a62)
% 32.24/32.03 [8374]~P1154(x83741)+P1322(x83741,a50)
% 32.24/32.03 [8375]~P1154(x83751)+P1322(x83751,a83)
% 32.24/32.03 [8376]~P1154(x83761)+P1322(x83761,a61)
% 32.24/32.03 [8377]~P1154(x83771)+P1322(x83771,a29)
% 32.24/32.03 [8378]~P1154(x83781)+P1322(x83781,a30)
% 32.24/32.03 [8379]~P1154(x83791)+P1322(x83791,a91)
% 32.24/32.03 [8380]~P1154(x83801)+P1322(x83801,a92)
% 32.24/32.03 [8381]~P1154(x83811)+P1322(x83811,a31)
% 32.24/32.03 [8382]~P1154(x83821)+P1322(x83821,a32)
% 32.24/32.03 [8383]~P1163(x83831)+P1318(x83831,a27)
% 32.24/32.03 [8384]~P1163(x83841)+P1318(x83841,a26)
% 32.24/32.03 [8385]~P1163(x83851)+P1318(x83851,a28)
% 32.24/32.03 [8386]~P1163(x83861)+P1318(x83861,a39)
% 32.24/32.03 [8387]~P1163(x83871)+P1318(x83871,a62)
% 32.24/32.03 [8388]~P1163(x83881)+P1318(x83881,a50)
% 32.24/32.03 [8389]~P1163(x83891)+P1318(x83891,a83)
% 32.24/32.03 [8390]~P1163(x83901)+P1318(x83901,a61)
% 32.24/32.03 [8391]~P1163(x83911)+P1318(x83911,a29)
% 32.24/32.03 [8392]~P1163(x83921)+P1318(x83921,a30)
% 32.24/32.03 [8393]~P1163(x83931)+P1318(x83931,a91)
% 32.24/32.03 [8394]~P1163(x83941)+P1318(x83941,a92)
% 32.24/32.03 [8395]~P1163(x83951)+P1318(x83951,a31)
% 32.24/32.03 [8396]~P1163(x83961)+P1318(x83961,a32)
% 32.24/32.03 [8397]~P1163(x83971)+P1318(x83971,a33)
% 32.24/32.03 [8398]~P1163(x83981)+P1318(x83981,a34)
% 32.24/32.03 [8399]~P1154(x83991)+P1309(x83991,a27)
% 32.24/32.03 [8400]~P1154(x84001)+P1309(x84001,a26)
% 32.24/32.03 [8401]~P1154(x84011)+P1309(x84011,a28)
% 32.24/32.03 [8402]~P1154(x84021)+P1309(x84021,a39)
% 32.24/32.03 [8403]~P1154(x84031)+P1309(x84031,a62)
% 32.24/32.03 [8404]~P1154(x84041)+P1309(x84041,a50)
% 32.24/32.03 [8405]~P1154(x84051)+P1309(x84051,a83)
% 32.24/32.03 [8406]~P1154(x84061)+P1309(x84061,a61)
% 32.24/32.03 [8407]~P1154(x84071)+P1309(x84071,a29)
% 32.24/32.03 [8408]~P1154(x84081)+P1309(x84081,a30)
% 32.24/32.03 [8409]~P1154(x84091)+P1309(x84091,a91)
% 32.24/32.03 [8410]~P1154(x84101)+P1309(x84101,a92)
% 32.24/32.03 [8411]~P1154(x84111)+P1309(x84111,a31)
% 32.24/32.03 [8412]~P1154(x84121)+P1309(x84121,a32)
% 32.24/32.03 [8413]~P1154(x84131)+P1309(x84131,a33)
% 32.24/32.03 [8414]~P1154(x84141)+P1309(x84141,a34)
% 32.24/32.03 [8415]~P1197(x84151)+P1300(x84151,a27)
% 32.24/32.03 [8416]~P1197(x84161)+P1300(x84161,a26)
% 32.24/32.03 [8417]~P1197(x84171)+P1300(x84171,a28)
% 32.24/32.03 [8418]~P1197(x84181)+P1300(x84181,a39)
% 32.24/32.03 [8419]~P1197(x84191)+P1300(x84191,a62)
% 32.24/32.03 [8420]~P1197(x84201)+P1300(x84201,a50)
% 32.24/32.03 [8421]~P1197(x84211)+P1300(x84211,a83)
% 32.24/32.03 [8422]~P1197(x84221)+P1300(x84221,a61)
% 32.24/32.03 [8423]~P1197(x84231)+P1300(x84231,a29)
% 32.24/32.03 [8424]~P1197(x84241)+P1300(x84241,a30)
% 32.24/32.03 [8425]~P1197(x84251)+P1300(x84251,a91)
% 32.24/32.03 [8426]~P1197(x84261)+P1300(x84261,a92)
% 32.24/32.03 [8427]~P1197(x84271)+P1300(x84271,a31)
% 32.24/32.03 [8428]~P1197(x84281)+P1300(x84281,a32)
% 32.24/32.03 [8429]~P1197(x84291)+P1300(x84291,a33)
% 32.24/32.03 [8430]~P1197(x84301)+P1300(x84301,a34)
% 32.24/32.03 [8431]~P1197(x84311)+P1300(x84311,a35)
% 32.24/32.03 [8432]~P1197(x84321)+P1300(x84321,a36)
% 32.24/32.03 [8433]~P1197(x84331)+P1300(x84331,a37)
% 32.24/32.03 [8434]~P1197(x84341)+P1300(x84341,a38)
% 32.24/32.03 [8435]~P1197(x84351)+P1300(x84351,a40)
% 32.24/32.03 [8436]~P1197(x84361)+P1300(x84361,a41)
% 32.24/32.03 [8437]~P1197(x84371)+P1300(x84371,a42)
% 32.24/32.03 [8438]~P1197(x84381)+P1300(x84381,a43)
% 32.24/32.03 [8439]~P1154(x84391)+P1296(x84391,a27)
% 32.24/32.03 [8440]~P1154(x84401)+P1296(x84401,a26)
% 32.24/32.03 [8441]~P1154(x84411)+P1296(x84411,a28)
% 32.24/32.03 [8442]~P1154(x84421)+P1296(x84421,a39)
% 32.24/32.03 [8443]~P1154(x84431)+P1296(x84431,a62)
% 32.24/32.03 [8444]~P1154(x84441)+P1296(x84441,a50)
% 32.24/32.03 [8445]~P1154(x84451)+P1296(x84451,a83)
% 32.24/32.03 [8446]~P1154(x84461)+P1296(x84461,a61)
% 32.24/32.03 [8447]~P1154(x84471)+P1296(x84471,a29)
% 32.24/32.03 [8448]~P1154(x84481)+P1296(x84481,a30)
% 32.24/32.03 [8449]~P1154(x84491)+P1296(x84491,a91)
% 32.24/32.03 [8450]~P1154(x84501)+P1296(x84501,a92)
% 32.24/32.03 [8451]~P1154(x84511)+P1296(x84511,a31)
% 32.24/32.03 [8452]~P1154(x84521)+P1296(x84521,a32)
% 32.24/32.03 [8453]~P1154(x84531)+P1296(x84531,a33)
% 32.24/32.03 [8454]~P1154(x84541)+P1296(x84541,a34)
% 32.24/32.03 [8455]~P1154(x84551)+P1296(x84551,a35)
% 32.24/32.03 [8456]~P1154(x84561)+P1296(x84561,a36)
% 32.24/32.03 [8457]~P1163(x84571)+P1292(x84571,a27)
% 32.24/32.03 [8458]~P1163(x84581)+P1292(x84581,a26)
% 32.24/32.03 [8459]~P1163(x84591)+P1292(x84591,a28)
% 32.24/32.03 [8460]~P1163(x84601)+P1292(x84601,a39)
% 32.24/32.03 [8461]~P1163(x84611)+P1292(x84611,a62)
% 32.24/32.03 [8462]~P1163(x84621)+P1292(x84621,a50)
% 32.24/32.03 [8463]~P1163(x84631)+P1292(x84631,a83)
% 32.24/32.03 [8464]~P1163(x84641)+P1292(x84641,a61)
% 32.24/32.03 [8465]~P1163(x84651)+P1292(x84651,a29)
% 32.24/32.03 [8466]~P1163(x84661)+P1292(x84661,a30)
% 32.24/32.03 [8467]~P1163(x84671)+P1292(x84671,a91)
% 32.24/32.03 [8468]~P1163(x84681)+P1292(x84681,a92)
% 32.24/32.03 [8469]~P1163(x84691)+P1292(x84691,a31)
% 32.24/32.03 [8470]~P1163(x84701)+P1292(x84701,a32)
% 32.24/32.03 [8471]~P1163(x84711)+P1292(x84711,a33)
% 32.24/32.03 [8472]~P1163(x84721)+P1292(x84721,a34)
% 32.24/32.03 [8473]~P1163(x84731)+P1292(x84731,a35)
% 32.24/32.03 [8474]~P1163(x84741)+P1292(x84741,a36)
% 32.24/32.03 [8475]~P1163(x84751)+P1292(x84751,a37)
% 32.24/32.03 [8476]~P1163(x84761)+P1292(x84761,a38)
% 32.24/32.03 [8477]~P1154(x84771)+P1286(x84771,a27)
% 32.24/32.03 [8478]~P1154(x84781)+P1286(x84781,a26)
% 32.24/32.03 [8479]~P1154(x84791)+P1286(x84791,a28)
% 32.24/32.03 [8480]~P1154(x84801)+P1286(x84801,a39)
% 32.24/32.03 [8481]~P1154(x84811)+P1286(x84811,a62)
% 32.24/32.03 [8482]~P1154(x84821)+P1286(x84821,a50)
% 32.24/32.03 [8483]~P1154(x84831)+P1286(x84831,a83)
% 32.24/32.03 [8484]~P1154(x84841)+P1286(x84841,a61)
% 32.24/32.03 [8485]~P1154(x84851)+P1286(x84851,a29)
% 32.24/32.03 [8486]~P1154(x84861)+P1286(x84861,a30)
% 32.24/32.03 [8487]~P1154(x84871)+P1286(x84871,a91)
% 32.24/32.03 [8488]~P1154(x84881)+P1286(x84881,a92)
% 32.24/32.03 [8489]~P1154(x84891)+P1286(x84891,a31)
% 32.24/32.03 [8490]~P1154(x84901)+P1286(x84901,a32)
% 32.24/32.03 [8491]~P1154(x84911)+P1286(x84911,a33)
% 32.24/32.03 [8492]~P1154(x84921)+P1286(x84921,a34)
% 32.24/32.03 [8493]~P1154(x84931)+P1286(x84931,a35)
% 32.24/32.03 [8494]~P1154(x84941)+P1286(x84941,a36)
% 32.24/32.03 [8495]~P1154(x84951)+P1286(x84951,a37)
% 32.24/32.03 [8496]~P1154(x84961)+P1286(x84961,a38)
% 32.24/32.03 [8497]~P1173(x84971)+P1280(x84971,a27)
% 32.24/32.03 [8498]~P1173(x84981)+P1280(x84981,a26)
% 32.24/32.03 [8499]~P1173(x84991)+P1280(x84991,a28)
% 32.24/32.03 [8500]~P1173(x85001)+P1280(x85001,a39)
% 32.24/32.03 [8501]~P1173(x85011)+P1280(x85011,a62)
% 32.24/32.03 [8502]~P1173(x85021)+P1280(x85021,a50)
% 32.24/32.03 [8503]~P1173(x85031)+P1280(x85031,a83)
% 32.24/32.03 [8504]~P1173(x85041)+P1280(x85041,a61)
% 32.24/32.03 [8505]~P1173(x85051)+P1280(x85051,a29)
% 32.24/32.03 [8506]~P1173(x85061)+P1280(x85061,a30)
% 32.24/32.03 [8507]~P1173(x85071)+P1280(x85071,a91)
% 32.24/32.03 [8508]~P1173(x85081)+P1280(x85081,a92)
% 32.24/32.03 [8509]~P1173(x85091)+P1280(x85091,a31)
% 32.24/32.03 [8510]~P1173(x85101)+P1280(x85101,a32)
% 32.24/32.03 [8511]~P1173(x85111)+P1280(x85111,a33)
% 32.24/32.03 [8512]~P1173(x85121)+P1280(x85121,a34)
% 32.24/32.03 [8513]~P1173(x85131)+P1280(x85131,a35)
% 32.24/32.03 [8514]~P1173(x85141)+P1280(x85141,a36)
% 32.24/32.03 [8515]~P1173(x85151)+P1280(x85151,a37)
% 32.24/32.03 [8516]~P1173(x85161)+P1280(x85161,a38)
% 32.24/32.03 [8517]~P1173(x85171)+P1280(x85171,a40)
% 32.24/32.03 [8518]~P1173(x85181)+P1280(x85181,a41)
% 32.24/32.03 [8519]~P1173(x85191)+P1280(x85191,a42)
% 32.24/32.03 [8520]~P1173(x85201)+P1280(x85201,a43)
% 32.24/32.03 [8521]~P1154(x85211)+P1274(x85211,a27)
% 32.24/32.03 [8522]~P1154(x85221)+P1274(x85221,a26)
% 32.24/32.03 [8523]~P1154(x85231)+P1274(x85231,a28)
% 32.24/32.03 [8524]~P1154(x85241)+P1274(x85241,a39)
% 32.24/32.03 [8525]~P1154(x85251)+P1274(x85251,a62)
% 32.24/32.03 [8526]~P1154(x85261)+P1274(x85261,a50)
% 32.24/32.03 [8527]~P1154(x85271)+P1274(x85271,a83)
% 32.24/32.03 [8528]~P1154(x85281)+P1274(x85281,a61)
% 32.24/32.03 [8529]~P1154(x85291)+P1274(x85291,a29)
% 32.24/32.03 [8530]~P1154(x85301)+P1274(x85301,a30)
% 32.24/32.03 [8531]~P1154(x85311)+P1274(x85311,a91)
% 32.24/32.03 [8532]~P1154(x85321)+P1274(x85321,a92)
% 32.24/32.03 [8533]~P1154(x85331)+P1274(x85331,a31)
% 32.24/32.03 [8534]~P1154(x85341)+P1274(x85341,a32)
% 32.24/32.03 [8535]~P1154(x85351)+P1274(x85351,a33)
% 32.24/32.03 [8536]~P1154(x85361)+P1274(x85361,a34)
% 32.24/32.03 [8537]~P1154(x85371)+P1274(x85371,a35)
% 32.24/32.03 [8538]~P1154(x85381)+P1274(x85381,a36)
% 32.24/32.03 [8539]~P1154(x85391)+P1274(x85391,a37)
% 32.24/32.03 [8540]~P1154(x85401)+P1274(x85401,a38)
% 32.24/32.03 [8541]~P1154(x85411)+P1274(x85411,a40)
% 32.24/32.03 [8542]~P1154(x85421)+P1274(x85421,a41)
% 32.24/32.03 [8543]~P1163(x85431)+P1270(x85431,a27)
% 32.24/32.03 [8544]~P1163(x85441)+P1270(x85441,a26)
% 32.24/32.03 [8545]~P1163(x85451)+P1270(x85451,a28)
% 32.24/32.03 [8546]~P1163(x85461)+P1270(x85461,a39)
% 32.24/32.03 [8547]~P1163(x85471)+P1270(x85471,a62)
% 32.24/32.03 [8548]~P1163(x85481)+P1270(x85481,a50)
% 32.24/32.03 [8549]~P1163(x85491)+P1270(x85491,a83)
% 32.24/32.03 [8550]~P1163(x85501)+P1270(x85501,a61)
% 32.24/32.03 [8551]~P1163(x85511)+P1270(x85511,a29)
% 32.24/32.03 [8552]~P1163(x85521)+P1270(x85521,a30)
% 32.24/32.03 [8553]~P1163(x85531)+P1270(x85531,a91)
% 32.24/32.03 [8554]~P1163(x85541)+P1270(x85541,a92)
% 32.24/32.03 [8555]~P1163(x85551)+P1270(x85551,a31)
% 32.24/32.03 [8556]~P1163(x85561)+P1270(x85561,a32)
% 32.24/32.03 [8557]~P1163(x85571)+P1270(x85571,a33)
% 32.24/32.03 [8558]~P1163(x85581)+P1270(x85581,a34)
% 32.24/32.03 [8559]~P1163(x85591)+P1270(x85591,a35)
% 32.24/32.03 [8560]~P1163(x85601)+P1270(x85601,a36)
% 32.24/32.03 [8561]~P1163(x85611)+P1270(x85611,a37)
% 32.24/32.03 [8562]~P1163(x85621)+P1270(x85621,a38)
% 32.24/32.03 [8563]~P1163(x85631)+P1270(x85631,a40)
% 32.24/32.03 [8564]~P1163(x85641)+P1270(x85641,a41)
% 32.24/32.03 [8565]~P1163(x85651)+P1270(x85651,a42)
% 32.24/32.03 [8566]~P1163(x85661)+P1270(x85661,a43)
% 32.24/32.03 [8567]~P1154(x85671)+P1260(x85671,a27)
% 32.24/32.03 [8568]~P1154(x85681)+P1260(x85681,a26)
% 32.24/32.03 [8569]~P1154(x85691)+P1260(x85691,a28)
% 32.24/32.03 [8570]~P1154(x85701)+P1260(x85701,a39)
% 32.24/32.03 [8571]~P1154(x85711)+P1260(x85711,a62)
% 32.24/32.03 [8572]~P1154(x85721)+P1260(x85721,a50)
% 32.24/32.03 [8573]~P1154(x85731)+P1260(x85731,a83)
% 32.24/32.03 [8574]~P1154(x85741)+P1260(x85741,a61)
% 32.24/32.03 [8575]~P1154(x85751)+P1260(x85751,a29)
% 32.24/32.03 [8576]~P1154(x85761)+P1260(x85761,a30)
% 32.24/32.03 [8577]~P1154(x85771)+P1260(x85771,a91)
% 32.24/32.03 [8578]~P1154(x85781)+P1260(x85781,a92)
% 32.24/32.03 [8579]~P1154(x85791)+P1260(x85791,a31)
% 32.24/32.03 [8580]~P1154(x85801)+P1260(x85801,a32)
% 32.24/32.03 [8581]~P1154(x85811)+P1260(x85811,a33)
% 32.24/32.03 [8582]~P1154(x85821)+P1260(x85821,a34)
% 32.24/32.03 [8583]~P1154(x85831)+P1260(x85831,a35)
% 32.24/32.03 [8584]~P1154(x85841)+P1260(x85841,a36)
% 32.24/32.03 [8585]~P1154(x85851)+P1260(x85851,a37)
% 32.24/32.03 [8586]~P1154(x85861)+P1260(x85861,a38)
% 32.24/32.03 [8587]~P1154(x85871)+P1260(x85871,a40)
% 32.24/32.03 [8588]~P1154(x85881)+P1260(x85881,a41)
% 32.24/32.03 [8589]~P1154(x85891)+P1260(x85891,a42)
% 32.24/32.03 [8590]~P1154(x85901)+P1260(x85901,a43)
% 32.24/32.03 [8591]~P1247(x85911)+P1248(x85911,a27)
% 32.24/32.03 [8592]~P1247(x85921)+P1248(x85921,a26)
% 32.24/32.03 [8593]~P1247(x85931)+P1248(x85931,a28)
% 32.24/32.03 [8594]~P1247(x85941)+P1248(x85941,a39)
% 32.24/32.03 [8595]~P1247(x85951)+P1248(x85951,a62)
% 32.24/32.03 [8596]~P1247(x85961)+P1248(x85961,a50)
% 32.24/32.03 [8597]~P1247(x85971)+P1248(x85971,a83)
% 32.24/32.03 [8598]~P1247(x85981)+P1248(x85981,a61)
% 32.24/32.03 [8599]~P1247(x85991)+P1248(x85991,a29)
% 32.24/32.03 [8600]~P1247(x86001)+P1248(x86001,a30)
% 32.24/32.03 [8601]~P1247(x86011)+P1248(x86011,a91)
% 32.24/32.03 [8602]~P1247(x86021)+P1248(x86021,a92)
% 32.24/32.03 [8603]~P1247(x86031)+P1248(x86031,a31)
% 32.24/32.03 [8604]~P1247(x86041)+P1248(x86041,a32)
% 32.24/32.03 [8605]~P1247(x86051)+P1248(x86051,a33)
% 32.24/32.03 [8606]~P1247(x86061)+P1248(x86061,a34)
% 32.24/32.03 [8607]~P1247(x86071)+P1248(x86071,a35)
% 32.24/32.03 [8608]~P1247(x86081)+P1248(x86081,a36)
% 32.24/32.03 [8609]~P1247(x86091)+P1248(x86091,a37)
% 32.24/32.03 [8610]~P1247(x86101)+P1248(x86101,a38)
% 32.24/32.03 [8611]~P1247(x86111)+P1248(x86111,a40)
% 32.24/32.03 [8612]~P1247(x86121)+P1248(x86121,a41)
% 32.24/32.03 [8613]~P1247(x86131)+P1248(x86131,a42)
% 32.24/32.03 [8614]~P1247(x86141)+P1248(x86141,a43)
% 32.24/32.03 [8615]~P1247(x86151)+P1248(x86151,a44)
% 32.24/32.03 [8616]~P1247(x86161)+P1248(x86161,a45)
% 32.24/32.03 [8617]~P1247(x86171)+P1248(x86171,a46)
% 32.24/32.03 [8618]~P1247(x86181)+P1248(x86181,a47)
% 32.24/32.03 [8619]~P1247(x86191)+P1248(x86191,a48)
% 32.24/32.03 [8620]~P1247(x86201)+P1248(x86201,a49)
% 32.24/32.03 [8621]~P1247(x86211)+P1248(x86211,a51)
% 32.24/32.03 [8622]~P1247(x86221)+P1248(x86221,a52)
% 32.24/32.03 [8623]~P1247(x86231)+P1248(x86231,a53)
% 32.24/32.03 [8624]~P1247(x86241)+P1248(x86241,a54)
% 32.24/32.03 [8625]~P1247(x86251)+P1248(x86251,a55)
% 32.24/32.03 [8626]~P1247(x86261)+P1248(x86261,a56)
% 32.24/32.03 [8627]~P1247(x86271)+P1248(x86271,a57)
% 32.24/32.03 [8628]~P1247(x86281)+P1248(x86281,a58)
% 32.24/32.03 [8629]~P1247(x86291)+P1248(x86291,a59)
% 32.24/32.03 [8630]~P1247(x86301)+P1248(x86301,a60)
% 32.24/32.03 [8631]~P1154(x86311)+P1242(x86311,a27)
% 32.24/32.03 [8632]~P1154(x86321)+P1242(x86321,a26)
% 32.24/32.03 [8633]~P1154(x86331)+P1242(x86331,a28)
% 32.24/32.03 [8634]~P1154(x86341)+P1242(x86341,a39)
% 32.24/32.03 [8635]~P1154(x86351)+P1242(x86351,a62)
% 32.24/32.03 [8636]~P1154(x86361)+P1242(x86361,a50)
% 32.24/32.03 [8637]~P1154(x86371)+P1242(x86371,a83)
% 32.24/32.03 [8638]~P1154(x86381)+P1242(x86381,a61)
% 32.24/32.03 [8639]~P1154(x86391)+P1242(x86391,a29)
% 32.24/32.03 [8640]~P1154(x86401)+P1242(x86401,a30)
% 32.24/32.03 [8641]~P1154(x86411)+P1242(x86411,a91)
% 32.24/32.03 [8642]~P1154(x86421)+P1242(x86421,a92)
% 32.24/32.03 [8643]~P1154(x86431)+P1242(x86431,a31)
% 32.24/32.03 [8644]~P1154(x86441)+P1242(x86441,a32)
% 32.24/32.03 [8645]~P1154(x86451)+P1242(x86451,a33)
% 32.24/32.03 [8646]~P1154(x86461)+P1242(x86461,a34)
% 32.24/32.03 [8647]~P1154(x86471)+P1242(x86471,a35)
% 32.24/32.03 [8648]~P1154(x86481)+P1242(x86481,a36)
% 32.24/32.03 [8649]~P1154(x86491)+P1242(x86491,a37)
% 32.24/32.03 [8650]~P1154(x86501)+P1242(x86501,a38)
% 32.24/32.03 [8651]~P1154(x86511)+P1242(x86511,a40)
% 32.24/32.03 [8652]~P1154(x86521)+P1242(x86521,a41)
% 32.24/32.03 [8653]~P1154(x86531)+P1242(x86531,a42)
% 32.24/32.03 [8654]~P1154(x86541)+P1242(x86541,a43)
% 32.24/32.03 [8655]~P1154(x86551)+P1242(x86551,a44)
% 32.24/32.03 [8656]~P1154(x86561)+P1242(x86561,a45)
% 32.24/32.03 [8657]~P1163(x86571)+P1238(x86571,a27)
% 32.24/32.03 [8658]~P1163(x86581)+P1238(x86581,a26)
% 32.24/32.03 [8659]~P1163(x86591)+P1238(x86591,a28)
% 32.24/32.03 [8660]~P1163(x86601)+P1238(x86601,a39)
% 32.24/32.03 [8661]~P1163(x86611)+P1238(x86611,a62)
% 32.24/32.03 [8662]~P1163(x86621)+P1238(x86621,a50)
% 32.24/32.03 [8663]~P1163(x86631)+P1238(x86631,a83)
% 32.24/32.03 [8664]~P1163(x86641)+P1238(x86641,a61)
% 32.24/32.03 [8665]~P1163(x86651)+P1238(x86651,a29)
% 32.24/32.03 [8666]~P1163(x86661)+P1238(x86661,a30)
% 32.24/32.03 [8667]~P1163(x86671)+P1238(x86671,a91)
% 32.24/32.03 [8668]~P1163(x86681)+P1238(x86681,a92)
% 32.24/32.03 [8669]~P1163(x86691)+P1238(x86691,a31)
% 32.24/32.03 [8670]~P1163(x86701)+P1238(x86701,a32)
% 32.24/32.03 [8671]~P1163(x86711)+P1238(x86711,a33)
% 32.24/32.03 [8672]~P1163(x86721)+P1238(x86721,a34)
% 32.24/32.03 [8673]~P1163(x86731)+P1238(x86731,a35)
% 32.24/32.03 [8674]~P1163(x86741)+P1238(x86741,a36)
% 32.24/32.03 [8675]~P1163(x86751)+P1238(x86751,a37)
% 32.24/32.03 [8676]~P1163(x86761)+P1238(x86761,a38)
% 32.24/32.03 [8677]~P1163(x86771)+P1238(x86771,a40)
% 32.24/32.03 [8678]~P1163(x86781)+P1238(x86781,a41)
% 32.24/32.03 [8679]~P1163(x86791)+P1238(x86791,a42)
% 32.24/32.03 [8680]~P1163(x86801)+P1238(x86801,a43)
% 32.24/32.03 [8681]~P1163(x86811)+P1238(x86811,a44)
% 32.24/32.03 [8682]~P1163(x86821)+P1238(x86821,a45)
% 32.24/32.03 [8683]~P1163(x86831)+P1238(x86831,a46)
% 32.24/32.03 [8684]~P1163(x86841)+P1238(x86841,a47)
% 32.24/32.03 [8685]~P1154(x86851)+P1232(x86851,a27)
% 32.24/32.03 [8686]~P1154(x86861)+P1232(x86861,a26)
% 32.24/32.03 [8687]~P1154(x86871)+P1232(x86871,a28)
% 32.24/32.03 [8688]~P1154(x86881)+P1232(x86881,a39)
% 32.24/32.03 [8689]~P1154(x86891)+P1232(x86891,a62)
% 32.24/32.03 [8690]~P1154(x86901)+P1232(x86901,a50)
% 32.24/32.03 [8691]~P1154(x86911)+P1232(x86911,a83)
% 32.24/32.03 [8692]~P1154(x86921)+P1232(x86921,a61)
% 32.24/32.03 [8693]~P1154(x86931)+P1232(x86931,a29)
% 32.24/32.03 [8694]~P1154(x86941)+P1232(x86941,a30)
% 32.24/32.03 [8695]~P1154(x86951)+P1232(x86951,a91)
% 32.24/32.03 [8696]~P1154(x86961)+P1232(x86961,a92)
% 32.24/32.03 [8697]~P1154(x86971)+P1232(x86971,a31)
% 32.24/32.03 [8698]~P1154(x86981)+P1232(x86981,a32)
% 32.24/32.03 [8699]~P1154(x86991)+P1232(x86991,a33)
% 32.24/32.03 [8700]~P1154(x87001)+P1232(x87001,a34)
% 32.24/32.03 [8701]~P1154(x87011)+P1232(x87011,a35)
% 32.24/32.03 [8702]~P1154(x87021)+P1232(x87021,a36)
% 32.24/32.03 [8703]~P1154(x87031)+P1232(x87031,a37)
% 32.24/32.03 [8704]~P1154(x87041)+P1232(x87041,a38)
% 32.24/32.03 [8705]~P1154(x87051)+P1232(x87051,a40)
% 32.24/32.03 [8706]~P1154(x87061)+P1232(x87061,a41)
% 32.24/32.03 [8707]~P1154(x87071)+P1232(x87071,a42)
% 32.24/32.03 [8708]~P1154(x87081)+P1232(x87081,a43)
% 32.24/32.03 [8709]~P1154(x87091)+P1232(x87091,a44)
% 32.24/32.03 [8710]~P1154(x87101)+P1232(x87101,a45)
% 32.24/32.03 [8711]~P1154(x87111)+P1232(x87111,a46)
% 32.24/32.03 [8712]~P1154(x87121)+P1232(x87121,a47)
% 32.24/32.03 [8713]~P1173(x87131)+P1226(x87131,a27)
% 32.24/32.03 [8714]~P1173(x87141)+P1226(x87141,a26)
% 32.24/32.03 [8715]~P1173(x87151)+P1226(x87151,a28)
% 32.24/32.03 [8716]~P1173(x87161)+P1226(x87161,a39)
% 32.24/32.03 [8717]~P1173(x87171)+P1226(x87171,a62)
% 32.24/32.03 [8718]~P1173(x87181)+P1226(x87181,a50)
% 32.24/32.03 [8719]~P1173(x87191)+P1226(x87191,a83)
% 32.24/32.03 [8720]~P1173(x87201)+P1226(x87201,a61)
% 32.24/32.03 [8721]~P1173(x87211)+P1226(x87211,a29)
% 32.24/32.03 [8722]~P1173(x87221)+P1226(x87221,a30)
% 32.24/32.03 [8723]~P1173(x87231)+P1226(x87231,a91)
% 32.24/32.03 [8724]~P1173(x87241)+P1226(x87241,a92)
% 32.24/32.03 [8725]~P1173(x87251)+P1226(x87251,a31)
% 32.24/32.03 [8726]~P1173(x87261)+P1226(x87261,a32)
% 32.24/32.03 [8727]~P1173(x87271)+P1226(x87271,a33)
% 32.24/32.03 [8728]~P1173(x87281)+P1226(x87281,a34)
% 32.24/32.03 [8729]~P1173(x87291)+P1226(x87291,a35)
% 32.24/32.03 [8730]~P1173(x87301)+P1226(x87301,a36)
% 32.24/32.03 [8731]~P1173(x87311)+P1226(x87311,a37)
% 32.24/32.03 [8732]~P1173(x87321)+P1226(x87321,a38)
% 32.24/32.03 [8733]~P1173(x87331)+P1226(x87331,a40)
% 32.24/32.03 [8734]~P1173(x87341)+P1226(x87341,a41)
% 32.24/32.03 [8735]~P1173(x87351)+P1226(x87351,a42)
% 32.24/32.03 [8736]~P1173(x87361)+P1226(x87361,a43)
% 32.24/32.03 [8737]~P1173(x87371)+P1226(x87371,a44)
% 32.24/32.03 [8738]~P1173(x87381)+P1226(x87381,a45)
% 32.24/32.03 [8739]~P1173(x87391)+P1226(x87391,a46)
% 32.24/32.03 [8740]~P1173(x87401)+P1226(x87401,a47)
% 32.24/32.03 [8741]~P1173(x87411)+P1226(x87411,a48)
% 32.24/32.03 [8742]~P1173(x87421)+P1226(x87421,a49)
% 32.24/32.03 [8743]~P1173(x87431)+P1226(x87431,a51)
% 32.24/32.03 [8744]~P1173(x87441)+P1226(x87441,a52)
% 32.24/32.03 [8745]~P1154(x87451)+P1220(x87451,a27)
% 32.24/32.03 [8746]~P1154(x87461)+P1220(x87461,a26)
% 32.24/32.03 [8747]~P1154(x87471)+P1220(x87471,a28)
% 32.24/32.03 [8748]~P1154(x87481)+P1220(x87481,a39)
% 32.24/32.03 [8749]~P1154(x87491)+P1220(x87491,a62)
% 32.24/32.03 [8750]~P1154(x87501)+P1220(x87501,a50)
% 32.24/32.03 [8751]~P1154(x87511)+P1220(x87511,a83)
% 32.24/32.03 [8752]~P1154(x87521)+P1220(x87521,a61)
% 32.24/32.03 [8753]~P1154(x87531)+P1220(x87531,a29)
% 32.24/32.03 [8754]~P1154(x87541)+P1220(x87541,a30)
% 32.24/32.03 [8755]~P1154(x87551)+P1220(x87551,a91)
% 32.24/32.03 [8756]~P1154(x87561)+P1220(x87561,a92)
% 32.24/32.03 [8757]~P1154(x87571)+P1220(x87571,a31)
% 32.24/32.03 [8758]~P1154(x87581)+P1220(x87581,a32)
% 32.24/32.03 [8759]~P1154(x87591)+P1220(x87591,a33)
% 32.24/32.03 [8760]~P1154(x87601)+P1220(x87601,a34)
% 32.24/32.03 [8761]~P1154(x87611)+P1220(x87611,a35)
% 32.24/32.03 [8762]~P1154(x87621)+P1220(x87621,a36)
% 32.24/32.03 [8763]~P1154(x87631)+P1220(x87631,a37)
% 32.24/32.03 [8764]~P1154(x87641)+P1220(x87641,a38)
% 32.24/32.03 [8765]~P1154(x87651)+P1220(x87651,a40)
% 32.24/32.03 [8766]~P1154(x87661)+P1220(x87661,a41)
% 32.24/32.03 [8767]~P1154(x87671)+P1220(x87671,a42)
% 32.24/32.03 [8768]~P1154(x87681)+P1220(x87681,a43)
% 32.24/32.03 [8769]~P1154(x87691)+P1220(x87691,a44)
% 32.24/32.03 [8770]~P1154(x87701)+P1220(x87701,a45)
% 32.24/32.03 [8771]~P1154(x87711)+P1220(x87711,a46)
% 32.24/32.03 [8772]~P1154(x87721)+P1220(x87721,a47)
% 32.24/32.03 [8773]~P1154(x87731)+P1220(x87731,a48)
% 32.24/32.03 [8774]~P1154(x87741)+P1220(x87741,a49)
% 32.24/32.03 [8775]~P1163(x87751)+P1216(x87751,a27)
% 32.24/32.03 [8776]~P1163(x87761)+P1216(x87761,a26)
% 32.24/32.03 [8777]~P1163(x87771)+P1216(x87771,a28)
% 32.24/32.03 [8778]~P1163(x87781)+P1216(x87781,a39)
% 32.24/32.03 [8779]~P1163(x87791)+P1216(x87791,a62)
% 32.24/32.03 [8780]~P1163(x87801)+P1216(x87801,a50)
% 32.24/32.03 [8781]~P1163(x87811)+P1216(x87811,a83)
% 32.24/32.03 [8782]~P1163(x87821)+P1216(x87821,a61)
% 32.24/32.03 [8783]~P1163(x87831)+P1216(x87831,a29)
% 32.24/32.03 [8784]~P1163(x87841)+P1216(x87841,a30)
% 32.24/32.03 [8785]~P1163(x87851)+P1216(x87851,a91)
% 32.24/32.03 [8786]~P1163(x87861)+P1216(x87861,a92)
% 32.24/32.03 [8787]~P1163(x87871)+P1216(x87871,a31)
% 32.24/32.03 [8788]~P1163(x87881)+P1216(x87881,a32)
% 32.24/32.03 [8789]~P1163(x87891)+P1216(x87891,a33)
% 32.24/32.03 [8790]~P1163(x87901)+P1216(x87901,a34)
% 32.24/32.03 [8791]~P1163(x87911)+P1216(x87911,a35)
% 32.24/32.03 [8792]~P1163(x87921)+P1216(x87921,a36)
% 32.24/32.03 [8793]~P1163(x87931)+P1216(x87931,a37)
% 32.24/32.03 [8794]~P1163(x87941)+P1216(x87941,a38)
% 32.24/32.03 [8795]~P1163(x87951)+P1216(x87951,a40)
% 32.24/32.03 [8796]~P1163(x87961)+P1216(x87961,a41)
% 32.24/32.03 [8797]~P1163(x87971)+P1216(x87971,a42)
% 32.24/32.03 [8798]~P1163(x87981)+P1216(x87981,a43)
% 32.24/32.03 [8799]~P1163(x87991)+P1216(x87991,a44)
% 32.24/32.03 [8800]~P1163(x88001)+P1216(x88001,a45)
% 32.24/32.03 [8801]~P1163(x88011)+P1216(x88011,a46)
% 32.24/32.03 [8802]~P1163(x88021)+P1216(x88021,a47)
% 32.24/32.03 [8803]~P1163(x88031)+P1216(x88031,a48)
% 32.24/32.03 [8804]~P1163(x88041)+P1216(x88041,a49)
% 32.24/32.03 [8805]~P1163(x88051)+P1216(x88051,a51)
% 32.24/32.03 [8806]~P1163(x88061)+P1216(x88061,a52)
% 32.24/32.03 [8807]~P1154(x88071)+P1207(x88071,a27)
% 32.24/32.03 [8808]~P1154(x88081)+P1207(x88081,a26)
% 32.24/32.03 [8809]~P1154(x88091)+P1207(x88091,a28)
% 32.24/32.03 [8810]~P1154(x88101)+P1207(x88101,a39)
% 32.24/32.03 [8811]~P1154(x88111)+P1207(x88111,a62)
% 32.24/32.03 [8812]~P1154(x88121)+P1207(x88121,a50)
% 32.24/32.03 [8813]~P1154(x88131)+P1207(x88131,a83)
% 32.24/32.03 [8814]~P1154(x88141)+P1207(x88141,a61)
% 32.24/32.03 [8815]~P1154(x88151)+P1207(x88151,a29)
% 32.24/32.03 [8816]~P1154(x88161)+P1207(x88161,a30)
% 32.24/32.03 [8817]~P1154(x88171)+P1207(x88171,a91)
% 32.24/32.03 [8818]~P1154(x88181)+P1207(x88181,a92)
% 32.24/32.03 [8819]~P1154(x88191)+P1207(x88191,a31)
% 32.24/32.03 [8820]~P1154(x88201)+P1207(x88201,a32)
% 32.24/32.03 [8821]~P1154(x88211)+P1207(x88211,a33)
% 32.24/32.03 [8822]~P1154(x88221)+P1207(x88221,a34)
% 32.24/32.03 [8823]~P1154(x88231)+P1207(x88231,a35)
% 32.24/32.03 [8824]~P1154(x88241)+P1207(x88241,a36)
% 32.24/32.03 [8825]~P1154(x88251)+P1207(x88251,a37)
% 32.24/32.03 [8826]~P1154(x88261)+P1207(x88261,a38)
% 32.24/32.03 [8827]~P1154(x88271)+P1207(x88271,a40)
% 32.24/32.03 [8828]~P1154(x88281)+P1207(x88281,a41)
% 32.24/32.03 [8829]~P1154(x88291)+P1207(x88291,a42)
% 32.24/32.03 [8830]~P1154(x88301)+P1207(x88301,a43)
% 32.24/32.03 [8831]~P1154(x88311)+P1207(x88311,a44)
% 32.24/32.03 [8832]~P1154(x88321)+P1207(x88321,a45)
% 32.24/32.03 [8833]~P1154(x88331)+P1207(x88331,a46)
% 32.24/32.03 [8834]~P1154(x88341)+P1207(x88341,a47)
% 32.24/32.03 [8835]~P1154(x88351)+P1207(x88351,a48)
% 32.24/32.03 [8836]~P1154(x88361)+P1207(x88361,a49)
% 32.24/32.03 [8837]~P1154(x88371)+P1207(x88371,a51)
% 32.24/32.03 [8838]~P1154(x88381)+P1207(x88381,a52)
% 32.24/32.03 [8839]~P1197(x88391)+P1198(x88391,a27)
% 32.24/32.03 [8840]~P1197(x88401)+P1198(x88401,a26)
% 32.24/32.03 [8841]~P1197(x88411)+P1198(x88411,a28)
% 32.24/32.03 [8842]~P1197(x88421)+P1198(x88421,a39)
% 32.24/32.03 [8843]~P1197(x88431)+P1198(x88431,a62)
% 32.24/32.03 [8844]~P1197(x88441)+P1198(x88441,a50)
% 32.24/32.03 [8845]~P1197(x88451)+P1198(x88451,a83)
% 32.24/32.03 [8846]~P1197(x88461)+P1198(x88461,a61)
% 32.24/32.03 [8847]~P1197(x88471)+P1198(x88471,a29)
% 32.24/32.03 [8848]~P1197(x88481)+P1198(x88481,a30)
% 32.24/32.03 [8849]~P1197(x88491)+P1198(x88491,a91)
% 32.24/32.03 [8850]~P1197(x88501)+P1198(x88501,a92)
% 32.24/32.03 [8851]~P1197(x88511)+P1198(x88511,a31)
% 32.24/32.03 [8852]~P1197(x88521)+P1198(x88521,a32)
% 32.24/32.03 [8853]~P1197(x88531)+P1198(x88531,a33)
% 32.24/32.03 [8854]~P1197(x88541)+P1198(x88541,a34)
% 32.24/32.03 [8855]~P1197(x88551)+P1198(x88551,a35)
% 32.24/32.03 [8856]~P1197(x88561)+P1198(x88561,a36)
% 32.24/32.03 [8857]~P1197(x88571)+P1198(x88571,a37)
% 32.24/32.03 [8858]~P1197(x88581)+P1198(x88581,a38)
% 32.24/32.03 [8859]~P1197(x88591)+P1198(x88591,a40)
% 32.24/32.03 [8860]~P1197(x88601)+P1198(x88601,a41)
% 32.24/32.03 [8861]~P1197(x88611)+P1198(x88611,a42)
% 32.24/32.03 [8862]~P1197(x88621)+P1198(x88621,a43)
% 32.24/32.03 [8863]~P1197(x88631)+P1198(x88631,a44)
% 32.24/32.03 [8864]~P1197(x88641)+P1198(x88641,a45)
% 32.24/32.03 [8865]~P1197(x88651)+P1198(x88651,a46)
% 32.24/32.03 [8866]~P1197(x88661)+P1198(x88661,a47)
% 32.24/32.03 [8867]~P1197(x88671)+P1198(x88671,a48)
% 32.24/32.03 [8868]~P1197(x88681)+P1198(x88681,a49)
% 32.24/32.03 [8869]~P1197(x88691)+P1198(x88691,a51)
% 32.24/32.03 [8870]~P1197(x88701)+P1198(x88701,a52)
% 32.24/32.03 [8871]~P1197(x88711)+P1198(x88711,a53)
% 32.24/32.03 [8872]~P1197(x88721)+P1198(x88721,a54)
% 32.24/32.03 [8873]~P1197(x88731)+P1198(x88731,a55)
% 32.24/32.03 [8874]~P1197(x88741)+P1198(x88741,a56)
% 32.24/32.03 [8875]~P1197(x88751)+P1198(x88751,a57)
% 32.24/32.03 [8876]~P1197(x88761)+P1198(x88761,a58)
% 32.24/32.03 [8877]~P1197(x88771)+P1198(x88771,a59)
% 32.24/32.03 [8878]~P1197(x88781)+P1198(x88781,a60)
% 32.24/32.03 [8879]~P1154(x88791)+P1195(x88791,a27)
% 32.24/32.03 [8880]~P1154(x88801)+P1195(x88801,a26)
% 32.24/32.03 [8881]~P1154(x88811)+P1195(x88811,a28)
% 32.24/32.03 [8882]~P1154(x88821)+P1195(x88821,a39)
% 32.24/32.03 [8883]~P1154(x88831)+P1195(x88831,a62)
% 32.24/32.03 [8884]~P1154(x88841)+P1195(x88841,a50)
% 32.24/32.03 [8885]~P1154(x88851)+P1195(x88851,a83)
% 32.24/32.03 [8886]~P1154(x88861)+P1195(x88861,a61)
% 32.24/32.03 [8887]~P1154(x88871)+P1195(x88871,a29)
% 32.24/32.03 [8888]~P1154(x88881)+P1195(x88881,a30)
% 32.24/32.03 [8889]~P1154(x88891)+P1195(x88891,a91)
% 32.24/32.03 [8890]~P1154(x88901)+P1195(x88901,a92)
% 32.24/32.03 [8891]~P1154(x88911)+P1195(x88911,a31)
% 32.24/32.03 [8892]~P1154(x88921)+P1195(x88921,a32)
% 32.24/32.03 [8893]~P1154(x88931)+P1195(x88931,a33)
% 32.24/32.03 [8894]~P1154(x88941)+P1195(x88941,a34)
% 32.24/32.03 [8895]~P1154(x88951)+P1195(x88951,a35)
% 32.24/32.03 [8896]~P1154(x88961)+P1195(x88961,a36)
% 32.24/32.03 [8897]~P1154(x88971)+P1195(x88971,a37)
% 32.24/32.03 [8898]~P1154(x88981)+P1195(x88981,a38)
% 32.24/32.03 [8899]~P1154(x88991)+P1195(x88991,a40)
% 32.24/32.03 [8900]~P1154(x89001)+P1195(x89001,a41)
% 32.24/32.03 [8901]~P1154(x89011)+P1195(x89011,a42)
% 32.24/32.03 [8902]~P1154(x89021)+P1195(x89021,a43)
% 32.24/32.03 [8903]~P1154(x89031)+P1195(x89031,a44)
% 32.24/32.03 [8904]~P1154(x89041)+P1195(x89041,a45)
% 32.24/32.03 [8905]~P1154(x89051)+P1195(x89051,a46)
% 32.24/32.03 [8906]~P1154(x89061)+P1195(x89061,a47)
% 32.24/32.03 [8907]~P1154(x89071)+P1195(x89071,a48)
% 32.24/32.03 [8908]~P1154(x89081)+P1195(x89081,a49)
% 32.24/32.03 [8909]~P1154(x89091)+P1195(x89091,a51)
% 32.24/32.03 [8910]~P1154(x89101)+P1195(x89101,a52)
% 32.24/32.03 [8911]~P1154(x89111)+P1195(x89111,a53)
% 32.24/32.03 [8912]~P1154(x89121)+P1195(x89121,a54)
% 32.24/32.03 [8913]~P1163(x89131)+P1187(x89131,a27)
% 32.24/32.03 [8914]~P1163(x89141)+P1187(x89141,a26)
% 32.24/32.03 [8915]~P1163(x89151)+P1187(x89151,a28)
% 32.24/32.03 [8916]~P1163(x89161)+P1187(x89161,a39)
% 32.24/32.03 [8917]~P1163(x89171)+P1187(x89171,a62)
% 32.24/32.03 [8918]~P1163(x89181)+P1187(x89181,a50)
% 32.24/32.03 [8919]~P1163(x89191)+P1187(x89191,a83)
% 32.24/32.03 [8920]~P1163(x89201)+P1187(x89201,a61)
% 32.24/32.03 [8921]~P1163(x89211)+P1187(x89211,a29)
% 32.24/32.03 [8922]~P1163(x89221)+P1187(x89221,a30)
% 32.24/32.03 [8923]~P1163(x89231)+P1187(x89231,a91)
% 32.24/32.03 [8924]~P1163(x89241)+P1187(x89241,a92)
% 32.24/32.03 [8925]~P1163(x89251)+P1187(x89251,a31)
% 32.24/32.03 [8926]~P1163(x89261)+P1187(x89261,a32)
% 32.24/32.03 [8927]~P1163(x89271)+P1187(x89271,a33)
% 32.24/32.03 [8928]~P1163(x89281)+P1187(x89281,a34)
% 32.24/32.03 [8929]~P1163(x89291)+P1187(x89291,a35)
% 32.24/32.03 [8930]~P1163(x89301)+P1187(x89301,a36)
% 32.24/32.03 [8931]~P1163(x89311)+P1187(x89311,a37)
% 32.24/32.03 [8932]~P1163(x89321)+P1187(x89321,a38)
% 32.24/32.03 [8933]~P1163(x89331)+P1187(x89331,a40)
% 32.24/32.03 [8934]~P1163(x89341)+P1187(x89341,a41)
% 32.24/32.03 [8935]~P1163(x89351)+P1187(x89351,a42)
% 32.24/32.03 [8936]~P1163(x89361)+P1187(x89361,a43)
% 32.24/32.03 [8937]~P1163(x89371)+P1187(x89371,a44)
% 32.24/32.03 [8938]~P1163(x89381)+P1187(x89381,a45)
% 32.24/32.03 [8939]~P1163(x89391)+P1187(x89391,a46)
% 32.24/32.03 [8940]~P1163(x89401)+P1187(x89401,a47)
% 32.24/32.03 [8941]~P1163(x89411)+P1187(x89411,a48)
% 32.24/32.03 [8942]~P1163(x89421)+P1187(x89421,a49)
% 32.24/32.03 [8943]~P1163(x89431)+P1187(x89431,a51)
% 32.24/32.03 [8944]~P1163(x89441)+P1187(x89441,a52)
% 32.24/32.03 [8945]~P1163(x89451)+P1187(x89451,a53)
% 32.24/32.03 [8946]~P1163(x89461)+P1187(x89461,a54)
% 32.24/32.03 [8947]~P1163(x89471)+P1187(x89471,a55)
% 32.24/32.03 [8948]~P1163(x89481)+P1187(x89481,a56)
% 32.24/32.03 [8949]~P1154(x89491)+P1184(x89491,a27)
% 32.24/32.03 [8950]~P1154(x89501)+P1184(x89501,a26)
% 32.24/32.03 [8951]~P1154(x89511)+P1184(x89511,a28)
% 32.24/32.03 [8952]~P1154(x89521)+P1184(x89521,a39)
% 32.24/32.03 [8953]~P1154(x89531)+P1184(x89531,a62)
% 32.24/32.03 [8954]~P1154(x89541)+P1184(x89541,a50)
% 32.24/32.03 [8955]~P1154(x89551)+P1184(x89551,a83)
% 32.24/32.03 [8956]~P1154(x89561)+P1184(x89561,a61)
% 32.24/32.03 [8957]~P1154(x89571)+P1184(x89571,a29)
% 32.24/32.03 [8958]~P1154(x89581)+P1184(x89581,a30)
% 32.24/32.03 [8959]~P1154(x89591)+P1184(x89591,a91)
% 32.24/32.03 [8960]~P1154(x89601)+P1184(x89601,a92)
% 32.24/32.03 [8961]~P1154(x89611)+P1184(x89611,a31)
% 32.24/32.03 [8962]~P1154(x89621)+P1184(x89621,a32)
% 32.24/32.03 [8963]~P1154(x89631)+P1184(x89631,a33)
% 32.24/32.03 [8964]~P1154(x89641)+P1184(x89641,a34)
% 32.24/32.03 [8965]~P1154(x89651)+P1184(x89651,a35)
% 32.24/32.03 [8966]~P1154(x89661)+P1184(x89661,a36)
% 32.24/32.03 [8967]~P1154(x89671)+P1184(x89671,a37)
% 32.24/32.03 [8968]~P1154(x89681)+P1184(x89681,a38)
% 32.24/32.03 [8969]~P1154(x89691)+P1184(x89691,a40)
% 32.24/32.03 [8970]~P1154(x89701)+P1184(x89701,a41)
% 32.24/32.03 [8971]~P1154(x89711)+P1184(x89711,a42)
% 32.24/32.03 [8972]~P1154(x89721)+P1184(x89721,a43)
% 32.24/32.03 [8973]~P1154(x89731)+P1184(x89731,a44)
% 32.24/32.03 [8974]~P1154(x89741)+P1184(x89741,a45)
% 32.24/32.03 [8975]~P1154(x89751)+P1184(x89751,a46)
% 32.24/32.03 [8976]~P1154(x89761)+P1184(x89761,a47)
% 32.24/32.03 [8977]~P1154(x89771)+P1184(x89771,a48)
% 32.24/32.03 [8978]~P1154(x89781)+P1184(x89781,a49)
% 32.24/32.03 [8979]~P1154(x89791)+P1184(x89791,a51)
% 32.24/32.03 [8980]~P1154(x89801)+P1184(x89801,a52)
% 32.24/32.03 [8981]~P1154(x89811)+P1184(x89811,a53)
% 32.24/32.03 [8982]~P1154(x89821)+P1184(x89821,a54)
% 32.24/32.03 [8983]~P1154(x89831)+P1184(x89831,a55)
% 32.24/32.03 [8984]~P1154(x89841)+P1184(x89841,a56)
% 32.24/32.03 [8985]~P1173(x89851)+P1174(x89851,a27)
% 32.24/32.03 [8986]~P1173(x89861)+P1174(x89861,a26)
% 32.24/32.03 [8987]~P1173(x89871)+P1174(x89871,a28)
% 32.24/32.03 [8988]~P1173(x89881)+P1174(x89881,a39)
% 32.24/32.03 [8989]~P1173(x89891)+P1174(x89891,a62)
% 32.24/32.03 [8990]~P1173(x89901)+P1174(x89901,a50)
% 32.24/32.03 [8991]~P1173(x89911)+P1174(x89911,a83)
% 32.24/32.03 [8992]~P1173(x89921)+P1174(x89921,a61)
% 32.24/32.03 [8993]~P1173(x89931)+P1174(x89931,a29)
% 32.24/32.03 [8994]~P1173(x89941)+P1174(x89941,a30)
% 32.24/32.03 [8995]~P1173(x89951)+P1174(x89951,a91)
% 32.24/32.03 [8996]~P1173(x89961)+P1174(x89961,a92)
% 32.24/32.03 [8997]~P1173(x89971)+P1174(x89971,a31)
% 32.24/32.03 [8998]~P1173(x89981)+P1174(x89981,a32)
% 32.24/32.03 [8999]~P1173(x89991)+P1174(x89991,a33)
% 32.24/32.03 [9000]~P1173(x90001)+P1174(x90001,a34)
% 32.24/32.03 [9001]~P1173(x90011)+P1174(x90011,a35)
% 32.24/32.03 [9002]~P1173(x90021)+P1174(x90021,a36)
% 32.24/32.03 [9003]~P1173(x90031)+P1174(x90031,a37)
% 32.24/32.03 [9004]~P1173(x90041)+P1174(x90041,a38)
% 32.24/32.03 [9005]~P1173(x90051)+P1174(x90051,a40)
% 32.24/32.03 [9006]~P1173(x90061)+P1174(x90061,a41)
% 32.24/32.03 [9007]~P1173(x90071)+P1174(x90071,a42)
% 32.24/32.03 [9008]~P1173(x90081)+P1174(x90081,a43)
% 32.24/32.03 [9009]~P1173(x90091)+P1174(x90091,a44)
% 32.24/32.03 [9010]~P1173(x90101)+P1174(x90101,a45)
% 32.24/32.03 [9011]~P1173(x90111)+P1174(x90111,a46)
% 32.24/32.03 [9012]~P1173(x90121)+P1174(x90121,a47)
% 32.24/32.03 [9013]~P1173(x90131)+P1174(x90131,a48)
% 32.24/32.03 [9014]~P1173(x90141)+P1174(x90141,a49)
% 32.24/32.03 [9015]~P1173(x90151)+P1174(x90151,a51)
% 32.24/32.03 [9016]~P1173(x90161)+P1174(x90161,a52)
% 32.24/32.03 [9017]~P1173(x90171)+P1174(x90171,a53)
% 32.24/32.03 [9018]~P1173(x90181)+P1174(x90181,a54)
% 32.24/32.03 [9019]~P1173(x90191)+P1174(x90191,a55)
% 32.24/32.03 [9020]~P1173(x90201)+P1174(x90201,a56)
% 32.24/32.03 [9021]~P1173(x90211)+P1174(x90211,a57)
% 32.24/32.03 [9022]~P1173(x90221)+P1174(x90221,a58)
% 32.24/32.03 [9023]~P1173(x90231)+P1174(x90231,a59)
% 32.24/32.03 [9024]~P1173(x90241)+P1174(x90241,a60)
% 32.24/32.03 [9025]~P1154(x90251)+P1169(x90251,a27)
% 32.24/32.03 [9026]~P1154(x90261)+P1169(x90261,a26)
% 32.24/32.03 [9027]~P1154(x90271)+P1169(x90271,a28)
% 32.24/32.03 [9028]~P1154(x90281)+P1169(x90281,a39)
% 32.24/32.03 [9029]~P1154(x90291)+P1169(x90291,a62)
% 32.24/32.03 [9030]~P1154(x90301)+P1169(x90301,a50)
% 32.24/32.03 [9031]~P1154(x90311)+P1169(x90311,a83)
% 32.24/32.03 [9032]~P1154(x90321)+P1169(x90321,a61)
% 32.24/32.03 [9033]~P1154(x90331)+P1169(x90331,a29)
% 32.24/32.03 [9034]~P1154(x90341)+P1169(x90341,a30)
% 32.24/32.03 [9035]~P1154(x90351)+P1169(x90351,a91)
% 32.24/32.03 [9036]~P1154(x90361)+P1169(x90361,a92)
% 32.24/32.03 [9037]~P1154(x90371)+P1169(x90371,a31)
% 32.24/32.03 [9038]~P1154(x90381)+P1169(x90381,a32)
% 32.24/32.03 [9039]~P1154(x90391)+P1169(x90391,a33)
% 32.24/32.03 [9040]~P1154(x90401)+P1169(x90401,a34)
% 32.24/32.03 [9041]~P1154(x90411)+P1169(x90411,a35)
% 32.24/32.03 [9042]~P1154(x90421)+P1169(x90421,a36)
% 32.24/32.03 [9043]~P1154(x90431)+P1169(x90431,a37)
% 32.24/32.03 [9044]~P1154(x90441)+P1169(x90441,a38)
% 32.24/32.03 [9045]~P1154(x90451)+P1169(x90451,a40)
% 32.24/32.03 [9046]~P1154(x90461)+P1169(x90461,a41)
% 32.24/32.03 [9047]~P1154(x90471)+P1169(x90471,a42)
% 32.24/32.03 [9048]~P1154(x90481)+P1169(x90481,a43)
% 32.24/32.03 [9049]~P1154(x90491)+P1169(x90491,a44)
% 32.24/32.03 [9050]~P1154(x90501)+P1169(x90501,a45)
% 32.24/32.03 [9051]~P1154(x90511)+P1169(x90511,a46)
% 32.24/32.03 [9052]~P1154(x90521)+P1169(x90521,a47)
% 32.24/32.03 [9053]~P1154(x90531)+P1169(x90531,a48)
% 32.24/32.03 [9054]~P1154(x90541)+P1169(x90541,a49)
% 32.24/32.03 [9055]~P1154(x90551)+P1169(x90551,a51)
% 32.24/32.03 [9056]~P1154(x90561)+P1169(x90561,a52)
% 32.24/32.03 [9057]~P1154(x90571)+P1169(x90571,a53)
% 32.24/32.03 [9058]~P1154(x90581)+P1169(x90581,a54)
% 32.24/32.03 [9059]~P1154(x90591)+P1169(x90591,a55)
% 32.24/32.03 [9060]~P1154(x90601)+P1169(x90601,a56)
% 32.24/32.03 [9061]~P1154(x90611)+P1169(x90611,a57)
% 32.24/32.04 [9062]~P1154(x90621)+P1169(x90621,a58)
% 32.24/32.04 [9063]~P1163(x90631)+P1164(x90631,a27)
% 32.24/32.04 [9064]~P1163(x90641)+P1164(x90641,a26)
% 32.24/32.04 [9065]~P1163(x90651)+P1164(x90651,a28)
% 32.24/32.04 [9066]~P1163(x90661)+P1164(x90661,a39)
% 32.24/32.04 [9067]~P1163(x90671)+P1164(x90671,a62)
% 32.24/32.04 [9068]~P1163(x90681)+P1164(x90681,a50)
% 32.24/32.04 [9069]~P1163(x90691)+P1164(x90691,a83)
% 32.24/32.04 [9070]~P1163(x90701)+P1164(x90701,a61)
% 32.24/32.04 [9071]~P1163(x90711)+P1164(x90711,a29)
% 32.24/32.04 [9072]~P1163(x90721)+P1164(x90721,a30)
% 32.24/32.04 [9073]~P1163(x90731)+P1164(x90731,a91)
% 32.24/32.04 [9074]~P1163(x90741)+P1164(x90741,a92)
% 32.24/32.04 [9075]~P1163(x90751)+P1164(x90751,a31)
% 32.24/32.04 [9076]~P1163(x90761)+P1164(x90761,a32)
% 32.24/32.04 [9077]~P1163(x90771)+P1164(x90771,a33)
% 32.24/32.04 [9078]~P1163(x90781)+P1164(x90781,a34)
% 32.24/32.04 [9079]~P1163(x90791)+P1164(x90791,a35)
% 32.24/32.04 [9080]~P1163(x90801)+P1164(x90801,a36)
% 32.24/32.04 [9081]~P1163(x90811)+P1164(x90811,a37)
% 32.24/32.04 [9082]~P1163(x90821)+P1164(x90821,a38)
% 32.24/32.04 [9083]~P1163(x90831)+P1164(x90831,a40)
% 32.24/32.04 [9084]~P1163(x90841)+P1164(x90841,a41)
% 32.24/32.04 [9085]~P1163(x90851)+P1164(x90851,a42)
% 32.24/32.04 [9086]~P1163(x90861)+P1164(x90861,a43)
% 32.24/32.04 [9087]~P1163(x90871)+P1164(x90871,a44)
% 32.24/32.04 [9088]~P1163(x90881)+P1164(x90881,a45)
% 32.24/32.04 [9089]~P1163(x90891)+P1164(x90891,a46)
% 32.24/32.04 [9090]~P1163(x90901)+P1164(x90901,a47)
% 32.24/32.04 [9091]~P1163(x90911)+P1164(x90911,a48)
% 32.24/32.04 [9092]~P1163(x90921)+P1164(x90921,a49)
% 32.24/32.04 [9093]~P1163(x90931)+P1164(x90931,a51)
% 32.24/32.04 [9094]~P1163(x90941)+P1164(x90941,a52)
% 32.24/32.04 [9095]~P1163(x90951)+P1164(x90951,a53)
% 32.24/32.04 [9096]~P1163(x90961)+P1164(x90961,a54)
% 32.24/32.04 [9097]~P1163(x90971)+P1164(x90971,a55)
% 32.24/32.04 [9098]~P1163(x90981)+P1164(x90981,a56)
% 32.24/32.04 [9099]~P1163(x90991)+P1164(x90991,a57)
% 32.24/32.04 [9100]~P1163(x91001)+P1164(x91001,a58)
% 32.24/32.04 [9101]~P1163(x91011)+P1164(x91011,a59)
% 32.24/32.04 [9102]~P1163(x91021)+P1164(x91021,a60)
% 32.24/32.04 [9103]~P1154(x91031)+P1155(x91031,a27)
% 32.24/32.04 [9104]~P1154(x91041)+P1155(x91041,a26)
% 32.24/32.04 [9105]~P1154(x91051)+P1155(x91051,a28)
% 32.24/32.04 [9106]~P1154(x91061)+P1155(x91061,a39)
% 32.24/32.04 [9107]~P1154(x91071)+P1155(x91071,a62)
% 32.24/32.04 [9108]~P1154(x91081)+P1155(x91081,a50)
% 32.24/32.04 [9109]~P1154(x91091)+P1155(x91091,a83)
% 32.24/32.04 [9110]~P1154(x91101)+P1155(x91101,a61)
% 32.24/32.04 [9111]~P1154(x91111)+P1155(x91111,a29)
% 32.24/32.04 [9112]~P1154(x91121)+P1155(x91121,a30)
% 32.24/32.04 [9113]~P1154(x91131)+P1155(x91131,a91)
% 32.24/32.04 [9114]~P1154(x91141)+P1155(x91141,a92)
% 32.24/32.04 [9115]~P1154(x91151)+P1155(x91151,a31)
% 32.24/32.04 [9116]~P1154(x91161)+P1155(x91161,a32)
% 32.24/32.04 [9117]~P1154(x91171)+P1155(x91171,a33)
% 32.24/32.04 [9118]~P1154(x91181)+P1155(x91181,a34)
% 32.24/32.04 [9119]~P1154(x91191)+P1155(x91191,a35)
% 32.24/32.04 [9120]~P1154(x91201)+P1155(x91201,a36)
% 32.24/32.04 [9121]~P1154(x91211)+P1155(x91211,a37)
% 32.24/32.04 [9122]~P1154(x91221)+P1155(x91221,a38)
% 32.24/32.04 [9123]~P1154(x91231)+P1155(x91231,a40)
% 32.24/32.04 [9124]~P1154(x91241)+P1155(x91241,a41)
% 32.24/32.04 [9125]~P1154(x91251)+P1155(x91251,a42)
% 32.24/32.04 [9126]~P1154(x91261)+P1155(x91261,a43)
% 32.24/32.04 [9127]~P1154(x91271)+P1155(x91271,a44)
% 32.24/32.04 [9128]~P1154(x91281)+P1155(x91281,a45)
% 32.24/32.04 [9129]~P1154(x91291)+P1155(x91291,a46)
% 32.24/32.04 [9130]~P1154(x91301)+P1155(x91301,a47)
% 32.24/32.04 [9131]~P1154(x91311)+P1155(x91311,a48)
% 32.24/32.04 [9132]~P1154(x91321)+P1155(x91321,a49)
% 32.24/32.04 [9133]~P1154(x91331)+P1155(x91331,a51)
% 32.24/32.04 [9134]~P1154(x91341)+P1155(x91341,a52)
% 32.24/32.04 [9135]~P1154(x91351)+P1155(x91351,a53)
% 32.24/32.04 [9136]~P1154(x91361)+P1155(x91361,a54)
% 32.24/32.04 [9137]~P1154(x91371)+P1155(x91371,a55)
% 32.24/32.04 [9138]~P1154(x91381)+P1155(x91381,a56)
% 32.24/32.04 [9139]~P1154(x91391)+P1155(x91391,a57)
% 32.24/32.04 [9140]~P1154(x91401)+P1155(x91401,a58)
% 32.24/32.04 [9141]~P1154(x91411)+P1155(x91411,a59)
% 32.24/32.04 [9142]~P1154(x91421)+P1155(x91421,a60)
% 32.24/32.04 [9143]~P1123(x91431)+P1045(x91431,a27)
% 32.24/32.04 [9144]~P1042(x91441)+P1045(x91441,a26)
% 32.24/32.04 [9145]~P1063(x91451)+P1064(x91451,a27)
% 32.24/32.04 [9146]~P1044(x91461)+P1064(x91461,a26)
% 32.24/32.04 [9147]~P1023(x91471)+P2445(x91471,a27)
% 32.24/32.04 [9148]~P1028(x91481)+P2445(x91481,a27)
% 32.24/32.04 [9149]~P1032(x91491)+P2445(x91491,a27)
% 32.24/32.04 [9150]~P1014(x91501)+P2445(x91501,a27)
% 32.24/32.04 [9151]~P1019(x91511)+P2445(x91511,a27)
% 32.24/32.04 [9152]~P799(x91521)+P2445(x91521,a27)
% 32.24/32.04 [9153]~P1023(x91531)+P2445(x91531,a26)
% 32.24/32.04 [9154]~P1026(x91541)+P2445(x91541,a26)
% 32.24/32.04 [9155]~P798(x91551)+P2445(x91551,a26)
% 32.24/32.04 [9156]~P799(x91561)+P2445(x91561,a26)
% 32.24/32.04 [9157]~P1023(x91571)+P2445(x91571,a28)
% 32.24/32.04 [9158]~P1026(x91581)+P2445(x91581,a28)
% 32.24/32.04 [9159]~P1028(x91591)+P2445(x91591,a28)
% 32.24/32.04 [9160]~P1030(x91601)+P2445(x91601,a28)
% 32.24/32.04 [9161]~P1014(x91611)+P2445(x91611,a28)
% 32.24/32.04 [9162]~P1016(x91621)+P2445(x91621,a28)
% 32.24/32.04 [9163]~P798(x91631)+P2445(x91631,a28)
% 32.24/32.04 [9164]~P799(x91641)+P2445(x91641,a28)
% 32.24/32.04 [9165]~P1023(x91651)+P2445(x91651,a39)
% 32.24/32.04 [9166]~P1026(x91661)+P2445(x91661,a39)
% 32.24/32.04 [9167]~P1028(x91671)+P2445(x91671,a39)
% 32.24/32.04 [9168]~P1030(x91681)+P2445(x91681,a39)
% 32.24/32.04 [9169]~P1031(x91691)+P2445(x91691,a39)
% 32.24/32.04 [9170]~P1032(x91701)+P2445(x91701,a39)
% 32.24/32.04 [9171]~P997(x91711)+P903(x91711,a27)
% 32.24/32.04 [9172]~P837(x91721)+P903(x91721,a27)
% 32.24/32.04 [9173]~P990(x91731)+P903(x91731,a26)
% 32.24/32.04 [9174]~P838(x91741)+P903(x91741,a26)
% 32.24/32.04 [9175]~P978(x91751)+P903(x91751,a28)
% 32.24/32.04 [9176]~P931(x91761)+P913(x91761,a27)
% 32.24/32.04 [9177]~P930(x91771)+P913(x91771,a27)
% 32.24/32.04 [9178]~P931(x91781)+P913(x91781,a26)
% 32.24/32.04 [9179]~P930(x91791)+P913(x91791,a26)
% 32.24/32.04 [9180]~P80(x91801)+P913(x91801,a30)
% 32.24/32.04 [9181]~P84(x91811)+P913(x91811,a30)
% 32.24/32.04 [9182]~P79(x91821)+P913(x91821,a32)
% 32.24/32.04 [9183]~P83(x91831)+P913(x91831,a32)
% 32.24/32.04 [9184]~P79(x91841)+P913(x91841,a33)
% 32.24/32.04 [9185]~P83(x91851)+P913(x91851,a33)
% 32.24/32.04 [9186]~P77(x91861)+P913(x91861,a36)
% 32.24/32.04 [9187]~P77(x91871)+P913(x91871,a37)
% 32.24/32.04 [9188]~P78(x91881)+P913(x91881,a37)
% 32.24/32.04 [9189]~P77(x91891)+P913(x91891,a38)
% 32.24/32.04 [9190]~P78(x91901)+P913(x91901,a38)
% 32.24/32.04 [9191]~P789(x91911)+P776(x91911,a27)
% 32.24/32.04 [9192]~P786(x91921)+P776(x91921,a26)
% 32.24/32.04 [9193]~P779(x91931)+P776(x91931,a28)
% 32.24/32.04 [9194]~P772(x91941)+P776(x91941,a39)
% 32.24/32.04 [9195]~P288(x91951)+P2548(x91951,a26)
% 32.24/32.04 [9196]~P728(x91961)+P715(x91961,a27)
% 32.24/32.04 [9197]~P724(x91971)+P715(x91971,a26)
% 32.24/32.04 [9198]~P718(x91981)+P715(x91981,a28)
% 32.24/32.04 [9199]~P705(x91991)+P715(x91991,a39)
% 32.24/32.04 [9200]~P434(x92001)+P182(x92001,a27)
% 32.24/32.04 [9201]~P477(x92011)+P182(x92011,a26)
% 32.24/32.04 [9202]~P440(x92021)+P182(x92021,a28)
% 32.24/32.04 [9203]~P453(x92031)+P182(x92031,a39)
% 32.24/32.04 [9204]~P442(x92041)+P182(x92041,a50)
% 32.24/32.04 [9205]~P602(x92051)+P503(x92051,a27)
% 32.24/32.04 [9206]~P603(x92061)+P503(x92061,a27)
% 32.24/32.04 [9207]~P602(x92071)+P503(x92071,a28)
% 32.24/32.04 [9208]~P603(x92081)+P503(x92081,a28)
% 32.24/32.04 [9209]~P603(x92091)+P503(x92091,a39)
% 32.24/32.04 [9210]~P556(x92101)+P312(x92101,a27)
% 32.24/32.04 [9211]~P558(x92111)+P312(x92111,a27)
% 32.24/32.04 [9212]~P563(x92121)+P312(x92121,a27)
% 32.24/32.04 [9213]~P553(x92131)+P312(x92131,a27)
% 32.24/32.04 [9214]~P549(x92141)+P312(x92141,a27)
% 32.24/32.04 [9215]~P552(x92151)+P312(x92151,a27)
% 32.24/32.04 [9216]~P556(x92161)+P312(x92161,a26)
% 32.24/32.04 [9217]~P557(x92171)+P312(x92171,a26)
% 32.24/32.04 [9218]~P549(x92181)+P312(x92181,a26)
% 32.24/32.04 [9219]~P551(x92191)+P312(x92191,a26)
% 32.24/32.04 [9220]~P555(x92201)+P312(x92201,a28)
% 32.24/32.04 [9221]~P548(x92211)+P312(x92211,a28)
% 32.24/32.04 [9222]~P563(x92221)+P312(x92221,a28)
% 32.24/32.04 [9223]~P553(x92231)+P312(x92231,a28)
% 32.24/32.04 [9224]~P555(x92241)+P312(x92241,a39)
% 32.24/32.04 [9225]~P556(x92251)+P312(x92251,a39)
% 32.24/32.04 [9226]~P557(x92261)+P312(x92261,a39)
% 32.24/32.04 [9227]~P558(x92271)+P312(x92271,a39)
% 32.24/32.04 [9228]~P563(x92281)+P312(x92281,a39)
% 32.24/32.04 [9229]~P482(x92291)+P321(x92291,a27)
% 32.24/32.04 [9230]~P517(x92301)+P321(x92301,a26)
% 32.24/32.04 [9231]~P458(x92311)+P321(x92311,a26)
% 32.24/32.04 [9232]~P470(x92321)+P321(x92321,a28)
% 32.24/32.04 [9233]~P431(x92331)+P321(x92331,a39)
% 32.24/32.04 [9234]~P452(x92341)+P321(x92341,a50)
% 32.24/32.04 [9235]~P437(x92351)+P418(x92351,a27)
% 32.24/32.04 [9236]~P429(x92361)+P418(x92361,a27)
% 32.24/32.04 [9237]~P471(x92371)+P418(x92371,a26)
% 32.24/32.04 [9238]~P468(x92381)+P418(x92381,a26)
% 32.24/32.04 [9239]~P465(x92391)+P418(x92391,a26)
% 32.24/32.04 [9240]~P421(x92401)+P419(x92401,a26)
% 32.24/32.04 [9241]~P291(x92411)+P292(x92411,a39)
% 32.24/32.04 [9242]~P282(x92421)+P283(x92421,a27)
% 32.24/32.04 [9243]~P275(x92431)+P277(x92431,a34)
% 32.24/32.04 [9244]~P204(x92441)+P170(x92441,a27)
% 32.24/32.04 [9245]~P204(x92451)+P170(x92451,a26)
% 32.24/32.04 [9246]~P205(x92461)+P170(x92461,a28)
% 32.24/32.04 [9247]~P206(x92471)+P170(x92471,a39)
% 32.24/32.04 [9248]~P99(x92481)+P170(x92481,a50)
% 32.24/32.04 [9249]~P173(x92491)+P264(x92491,a27)
% 32.24/32.04 [9250]~P265(x92501)+P264(x92501,a27)
% 32.24/32.04 [9251]~P265(x92511)+P264(x92511,a26)
% 32.24/32.04 [9252]~P2556(x92521)+P264(x92521,a26)
% 32.24/32.04 [9253]~P261(x92531)+P245(x92531,a27)
% 32.24/32.04 [9254]~P257(x92541)+P245(x92541,a26)
% 32.24/32.04 [9255]~P253(x92551)+P245(x92551,a28)
% 32.24/32.04 [9256]~P249(x92561)+P245(x92561,a39)
% 32.24/32.04 [9257]~P243(x92571)+P245(x92571,a50)
% 32.24/32.04 [9258]~P173(x92581)+P239(x92581,a27)
% 32.24/32.04 [9259]~P240(x92591)+P239(x92591,a26)
% 32.24/32.04 [9260]~P2556(x92601)+P239(x92601,a26)
% 32.24/32.04 [9261]~P237(x92611)+P196(x92611,a27)
% 32.24/32.04 [9262]~P235(x92621)+P196(x92621,a26)
% 32.24/32.04 [9263]~P231(x92631)+P196(x92631,a28)
% 32.24/32.04 [9264]~P228(x92641)+P196(x92641,a39)
% 32.24/32.04 [9265]~P194(x92651)+P196(x92651,a62)
% 32.24/32.04 [9266]~P222(x92661)+P196(x92661,a50)
% 32.24/32.04 [9267]~P218(x92671)+P183(x92671,a27)
% 32.24/32.04 [9268]~P173(x92681)+P187(x92681,a27)
% 32.24/32.04 [9269]~P188(x92691)+P187(x92691,a27)
% 32.24/32.04 [9270]~P2556(x92701)+P187(x92701,a26)
% 32.24/32.04 [9271]~P173(x92711)+P189(x92711,a27)
% 32.24/32.04 [9272]~P2556(x92721)+P189(x92721,a26)
% 32.24/32.04 [9273]~P2590(x92731)+P2578(x92731,a27)
% 32.24/32.04 [9274]~P2587(x92741)+P2578(x92741,a26)
% 32.24/32.04 [9275]~P2581(x92751)+P2578(x92751,a28)
% 32.24/32.04 [9276]~P2574(x92761)+P2578(x92761,a39)
% 32.24/32.04 [9277]~P2535(x92771)+P2536(x92771,a27)
% 32.24/32.04 [9278]~P2535(x92781)+P2536(x92781,a26)
% 32.24/32.04 [9279]~P2535(x92791)+P2536(x92791,a28)
% 32.24/32.04 [9280]~P2494(x92801)+P2482(x92801,a27)
% 32.24/32.04 [9281]~P2491(x92811)+P2482(x92811,a26)
% 32.24/32.04 [9282]~P2485(x92821)+P2482(x92821,a28)
% 32.24/32.04 [9283]~P2477(x92831)+P2482(x92831,a39)
% 32.24/32.04 [9284]~P2281(x92841)+P1814(x92841,a27)
% 32.24/32.04 [9285]~P2285(x92851)+P1814(x92851,a26)
% 32.24/32.04 [9286]~P2341(x92861)+P2013(x92861,a27)
% 32.24/32.04 [9287]~P102(x92871)+P2013(x92871,a27)
% 32.24/32.04 [9288]~P2341(x92881)+P2013(x92881,a26)
% 32.24/32.04 [9289]~P102(x92891)+P2013(x92891,a26)
% 32.24/32.04 [9290]~P2342(x92901)+P2013(x92901,a28)
% 32.24/32.04 [9291]~P102(x92911)+P2013(x92911,a28)
% 32.24/32.04 [9292]~P2343(x92921)+P2013(x92921,a39)
% 32.24/32.04 [9293]~P102(x92931)+P2013(x92931,a39)
% 32.24/32.04 [9294]~P2378(x92941)+P2377(x92941,a27)
% 32.24/32.04 [9295]~P2165(x92951)+P2377(x92951,a27)
% 32.24/32.04 [9296]~P2378(x92961)+P2377(x92961,a26)
% 32.24/32.04 [9297]~P2052(x92971)+P2377(x92971,a26)
% 32.24/32.04 [9298]~P2374(x92981)+P2357(x92981,a27)
% 32.24/32.04 [9299]~P2371(x92991)+P2357(x92991,a26)
% 32.24/32.04 [9300]~P2366(x93001)+P2357(x93001,a28)
% 32.24/32.04 [9301]~P2364(x93011)+P2357(x93011,a39)
% 32.24/32.04 [9302]~P2356(x93021)+P2357(x93021,a50)
% 32.24/32.04 [9303]~P2165(x93031)+P2352(x93031,a27)
% 32.24/32.04 [9304]~P2353(x93041)+P2352(x93041,a26)
% 32.24/32.04 [9305]~P2052(x93051)+P2352(x93051,a26)
% 32.24/32.04 [9306]~P2350(x93061)+P2313(x93061,a27)
% 32.24/32.04 [9307]~P2348(x93071)+P2313(x93071,a26)
% 32.24/32.04 [9308]~P2338(x93081)+P2313(x93081,a28)
% 32.24/32.04 [9309]~P2335(x93091)+P2313(x93091,a39)
% 32.24/32.04 [9310]~P2312(x93101)+P2313(x93101,a62)
% 32.24/32.04 [9311]~P2330(x93111)+P2313(x93111,a50)
% 32.24/32.04 [9312]~P2326(x93121)+P2184(x93121,a27)
% 32.24/32.04 [9313]~P2307(x93131)+P2306(x93131,a27)
% 32.24/32.04 [9314]~P2165(x93141)+P2306(x93141,a27)
% 32.24/32.04 [9315]~P2052(x93151)+P2306(x93151,a26)
% 32.24/32.04 [9316]~P2165(x93161)+P2308(x93161,a27)
% 32.24/32.04 [9317]~P2052(x93171)+P2308(x93171,a26)
% 32.24/32.04 [9318]~P2206(x93181)+P2174(x93181,a27)
% 32.24/32.04 [9319]~P104(x93191)+P2174(x93191,a27)
% 32.24/32.04 [9320]~P2206(x93201)+P2174(x93201,a26)
% 32.24/32.04 [9321]~P104(x93211)+P2174(x93211,a26)
% 32.24/32.04 [9322]~P2207(x93221)+P2174(x93221,a28)
% 32.24/32.04 [9323]~P104(x93231)+P2174(x93231,a28)
% 32.24/32.04 [9324]~P2208(x93241)+P2174(x93241,a39)
% 32.24/32.04 [9325]~P104(x93251)+P2174(x93251,a39)
% 32.24/32.04 [9326]~P2267(x93261)+P2270(x93261,a27)
% 32.24/32.04 [9327]~P2189(x93271)+P2270(x93271,a27)
% 32.24/32.04 [9328]~P2267(x93281)+P2270(x93281,a26)
% 32.24/32.04 [9329]~P2175(x93291)+P2270(x93291,a26)
% 32.24/32.04 [9330]~P2264(x93301)+P2246(x93301,a27)
% 32.24/32.04 [9331]~P2261(x93311)+P2246(x93311,a26)
% 32.24/32.04 [9332]~P2255(x93321)+P2246(x93321,a28)
% 32.24/32.04 [9333]~P2251(x93331)+P2246(x93331,a39)
% 32.24/32.04 [9334]~P2245(x93341)+P2246(x93341,a50)
% 32.24/32.04 [9335]~P2189(x93351)+P2241(x93351,a27)
% 32.24/32.04 [9336]~P2242(x93361)+P2241(x93361,a26)
% 32.24/32.04 [9337]~P2175(x93371)+P2241(x93371,a26)
% 32.24/32.04 [9338]~P2239(x93381)+P2199(x93381,a27)
% 32.24/32.04 [9339]~P2237(x93391)+P2199(x93391,a26)
% 32.24/32.04 [9340]~P2233(x93401)+P2199(x93401,a28)
% 32.24/32.04 [9341]~P2230(x93411)+P2199(x93411,a39)
% 32.24/32.04 [9342]~P2198(x93421)+P2199(x93421,a62)
% 32.24/32.04 [9343]~P2224(x93431)+P2199(x93431,a50)
% 32.24/32.04 [9344]~P2220(x93441)+P2185(x93441,a27)
% 32.24/32.04 [9345]~P2193(x93451)+P2192(x93451,a27)
% 32.24/32.04 [9346]~P2189(x93461)+P2192(x93461,a27)
% 32.24/32.04 [9347]~P2175(x93471)+P2192(x93471,a26)
% 32.24/32.04 [9348]~P2189(x93481)+P2194(x93481,a27)
% 32.24/32.04 [9349]~P2175(x93491)+P2194(x93491,a26)
% 32.24/32.04 [9350]~P1401(x93501)+P244(x93501,a27)
% 32.24/32.04 [9351]~P1334(x93511)+P244(x93511,a26)
% 32.24/32.04 [9352]~P1401(x93521)+P244(x93521,a26)
% 32.24/32.04 [9353]~P1334(x93531)+P244(x93531,a28)
% 32.24/32.04 [9354]~P1394(x93541)+P244(x93541,a28)
% 32.24/32.04 [9355]~P1036(x93551)+P1515(x93551,a27)
% 32.24/32.04 [9356]~P1509(x93561)+P1515(x93561,a27)
% 32.24/32.04 [9357]~P1509(x93571)+P1515(x93571,a26)
% 32.24/32.04 [9358]~P273(x93581)+P1515(x93581,a26)
% 32.24/32.04 [9359]~P1482(x93591)+P1345(x93591,a27)
% 32.24/32.04 [9360]~P1470(x93601)+P1345(x93601,a26)
% 32.24/32.04 [9361]~P1444(x93611)+P1345(x93611,a28)
% 32.24/32.04 [9362]~P1354(x93621)+P1345(x93621,a39)
% 32.24/32.04 [9363]~P1036(x93631)+P1310(x93631,a27)
% 32.24/32.04 [9364]~P1301(x93641)+P1310(x93641,a26)
% 32.24/32.04 [9365]~P273(x93651)+P1310(x93651,a26)
% 32.24/32.04 [9366]~P1278(x93661)+P1041(x93661,a27)
% 32.24/32.04 [9367]~P1258(x93671)+P1041(x93671,a26)
% 32.24/32.04 [9368]~P1215(x93681)+P1041(x93681,a28)
% 32.24/32.04 [9369]~P1168(x93691)+P1041(x93691,a39)
% 32.24/32.04 [9370]~P1051(x93701)+P1041(x93701,a50)
% 32.24/32.04 [9371]~P1127(x93711)+P1065(x93711,a27)
% 32.24/32.04 [9372]~P1036(x93721)+P1010(x93721,a27)
% 32.24/32.04 [9373]~P1004(x93731)+P1010(x93731,a27)
% 32.24/32.04 [9374]~P273(x93741)+P1010(x93741,a26)
% 32.24/32.04 [9375]~P1036(x93751)+P992(x93751,a27)
% 32.24/32.04 [9376]~P273(x93761)+P992(x93761,a26)
% 32.24/32.04 [9377]~P3(x93771)+P20(a10,x93771)
% 32.24/32.04 [9378]~P4(x93781)+P20(a11,x93781)
% 32.24/32.04 [9379]~P5(x93791)+P20(a12,x93791)
% 32.24/32.04 [9380]~P6(x93801)+P20(a13,x93801)
% 32.24/32.04 [9381]~P7(x93811)+P20(a14,x93811)
% 32.24/32.04 [9382]~P8(x93821)+P20(a15,x93821)
% 32.24/32.04 [9383]~P9(x93831)+P20(a16,x93831)
% 32.24/32.04 [9384]~P10(x93841)+P20(a17,x93841)
% 32.24/32.04 [9385]~P11(x93851)+P20(a18,x93851)
% 32.24/32.04 [9386]~P12(x93861)+P20(a19,x93861)
% 32.24/32.04 [9387]~P13(x93871)+P20(a20,x93871)
% 32.24/32.04 [9388]~P55(x93881)+P20(a25,x93881)
% 32.24/32.04 [9389]~P39(x93891)+P20(a23,x93891)
% 32.24/32.04 [9390]~P14(x93901)+P20(a21,x93901)
% 32.24/32.04 [9391]~P42(x93911)+P20(a24,x93911)
% 32.24/32.04 [9392]~P17(x93921)+P20(a22,x93921)
% 32.24/32.04 [9393]~P113(x93931)+P1905(a9,x93931)
% 32.24/32.04 [9394]~P130(x93941)+P1147(a9,x93941)
% 32.24/32.04 [9395]~P120(x93951)+P1086(a9,x93951)
% 32.24/32.04 [9396]~P113(x93961)+P766(a9,x93961)
% 32.24/32.04 [9527]P2156(x95271)+~P2019(x95271,a27)
% 32.24/32.04 [9528]P2156(x95281)+~P2019(x95281,a26)
% 32.24/32.04 [9529]P2152(x95291)+~P2019(x95291,a27)
% 32.24/32.04 [9530]P2154(x95301)+~P2150(x95301,a39)
% 32.24/32.04 [9531]P2158(x95311)+~P2150(x95311,a28)
% 32.24/32.04 [9532]P2161(x95321)+~P2150(x95321,a26)
% 32.24/32.04 [9533]P1036(x95331)+~P1515(x95331,a27)
% 32.24/32.04 [9534]P1036(x95341)+~P1310(x95341,a27)
% 32.24/32.04 [9535]P1036(x95351)+~P1010(x95351,a27)
% 32.24/32.04 [9536]P1036(x95361)+~P992(x95361,a27)
% 32.24/32.04 [9537]P2137(x95371)+~P2132(x95371,a27)
% 32.24/32.04 [9538]P2134(x95381)+~P2132(x95381,a26)
% 32.24/32.04 [9539]P2091(x95391)+~P2132(x95391,a28)
% 32.24/32.04 [9540]P2139(x95401)+~P2478(x95401,a27)
% 32.24/32.04 [9541]P2139(x95411)+~P2478(x95411,a26)
% 32.24/32.04 [9542]P2136(x95421)+~P2478(x95421,a28)
% 32.24/32.04 [9543]P1561(x95431)+~P902(x95431,a83)
% 32.24/32.04 [9544]P2092(x95441)+~P2093(x95441,a83)
% 32.24/32.04 [9545]P366(x95451)+~P902(x95451,a91)
% 32.24/32.04 [9546]P368(x95461)+~P902(x95461,a92)
% 32.24/32.04 [9547]P407(x95471)+~P902(x95471,a61)
% 32.24/32.04 [9548]P351(x95481)+~P902(x95481,a62)
% 32.24/32.04 [9549]P410(x95491)+~P902(x95491,a39)
% 32.24/32.04 [9550]P329(x95501)+~P902(x95501,a28)
% 32.24/32.04 [9551]P404(x95511)+~P902(x95511,a27)
% 32.24/32.04 [9552]P2302(x95521)+~P2321(x95521,a28)
% 32.24/32.04 [9553]P1996(x95531)+~P2079(x95531,a27)
% 32.24/32.04 [9554]P1996(x95541)+~P2071(x95541,a27)
% 32.24/32.04 [9555]P1996(x95551)+~P2066(x95551,a27)
% 32.24/32.04 [9556]P1996(x95561)+~P2068(x95561,a27)
% 32.24/32.04 [9557]P2417(x95571)+~P2079(x95571,a26)
% 32.24/32.04 [9558]P2417(x95581)+~P2071(x95581,a26)
% 32.24/32.04 [9559]P2417(x95591)+~P2066(x95591,a26)
% 32.24/32.04 [9560]P2417(x95601)+~P2068(x95601,a26)
% 32.24/32.04 [9561]P2036(x95611)+~P2029(x95611,a61)
% 32.24/32.04 [9562]P2520(x95621)+~P2093(x95621,a61)
% 32.24/32.04 [9563]P2505(x95631)+~P2093(x95631,a39)
% 32.24/32.04 [9564]P1985(x95641)+~P2093(x95641,a91)
% 32.24/32.04 [9565]P1985(x95651)+~P2093(x95651,a92)
% 32.24/32.04 [9566]P1982(x95661)+~P2093(x95661,a62)
% 32.24/32.04 [9567]P1982(x95671)+~P2093(x95671,a91)
% 32.24/32.04 [9568]P1980(x95681)+~P2093(x95681,a28)
% 32.24/32.04 [9569]P1980(x95691)+~P2093(x95691,a91)
% 32.24/32.04 [9570]P1966(x95701)+~P2093(x95701,a39)
% 32.24/32.04 [9571]P1935(x95711)+~P902(x95711,a29)
% 32.24/32.04 [9572]P2528(x95721)+~P2546(x95721,a27)
% 32.24/32.04 [9573]P1924(x95731)+~P2567(x95731,a28)
% 32.24/32.04 [9574]P1936(x95741)+~P2567(x95741,a27)
% 32.24/32.04 [9575]P1936(x95751)+~P2567(x95751,a26)
% 32.24/32.04 [9576]P1945(x95761)+~P2584(x95761,a28)
% 32.24/32.04 [9577]P1946(x95771)+~P2584(x95771,a27)
% 32.24/32.04 [9578]P1946(x95781)+~P2584(x95781,a26)
% 32.24/32.04 [9579]P1937(x95791)+~P2567(x95791,a28)
% 32.24/32.04 [9580]P1938(x95801)+~P2093(x95801,a30)
% 32.24/32.04 [9581]P1939(x95811)+~P2093(x95811,a29)
% 32.24/32.04 [9582]P1940(x95821)+~P2093(x95821,a91)
% 32.24/32.04 [9583]P1941(x95831)+~P2093(x95831,a92)
% 32.24/32.04 [9584]P1942(x95841)+~P2093(x95841,a28)
% 32.24/32.04 [9585]P1942(x95851)+~P2093(x95851,a62)
% 32.24/32.04 [9586]P1912(x95861)+~P2093(x95861,a29)
% 32.24/32.04 [9587]P1901(x95871)+~P2584(x95871,a27)
% 32.24/32.04 [9588]P1703(x95881)+~P2584(x95881,a26)
% 32.24/32.04 [9589]P2585(x95891)+~P2584(x95891,a28)
% 32.24/32.04 [9590]P2521(x95901)+~P1892(x95901,a27)
% 32.24/32.04 [9591]P2521(x95911)+~P1867(x95911,a27)
% 32.24/32.04 [9592]P2521(x95921)+~P1819(x95921,a27)
% 32.24/32.04 [9593]P2521(x95931)+~P1821(x95931,a27)
% 32.24/32.04 [9594]P2461(x95941)+~P1892(x95941,a26)
% 32.24/32.04 [9595]P2461(x95951)+~P1867(x95951,a26)
% 32.24/32.04 [9596]P2461(x95961)+~P1819(x95961,a26)
% 32.24/32.04 [9597]P2461(x95971)+~P1821(x95971,a26)
% 32.24/32.04 [9598]P1888(x95981)+~P1872(x95981,a27)
% 32.24/32.04 [9599]P1885(x95991)+~P1872(x95991,a26)
% 32.24/32.04 [9600]P1881(x96001)+~P1872(x96001,a28)
% 32.24/32.04 [9601]P1877(x96011)+~P1872(x96011,a39)
% 32.24/32.04 [9602]P1871(x96021)+~P1872(x96021,a50)
% 32.24/32.04 [9603]P1890(x96031)+~P1740(x96031,a27)
% 32.24/32.04 [9604]P1890(x96041)+~P1740(x96041,a26)
% 32.24/32.04 [9605]P1887(x96051)+~P1740(x96051,a28)
% 32.24/32.04 [9606]P1883(x96061)+~P1740(x96061,a39)
% 32.24/32.04 [9607]P1879(x96071)+~P1740(x96071,a50)
% 32.24/32.04 [9608]P1865(x96081)+~P1827(x96081,a27)
% 32.24/32.04 [9609]P1863(x96091)+~P1827(x96091,a26)
% 32.24/32.04 [9610]P1859(x96101)+~P1827(x96101,a28)
% 32.24/32.04 [9611]P1855(x96111)+~P1827(x96111,a39)
% 32.24/32.04 [9612]P1850(x96121)+~P1827(x96121,a50)
% 32.24/32.04 [9613]P1826(x96131)+~P1827(x96131,a62)
% 32.24/32.04 [9614]P1862(x96141)+~P1815(x96141,a26)
% 32.24/32.04 [9615]P1866(x96151)+~P1815(x96151,a27)
% 32.24/32.04 [9616]P1858(x96161)+~P1815(x96161,a28)
% 32.24/32.04 [9617]P1836(x96171)+~P1815(x96171,a26)
% 32.24/32.04 [9618]P1854(x96181)+~P1815(x96181,a39)
% 32.24/32.04 [9619]P1837(x96191)+~P1815(x96191,a28)
% 32.24/32.04 [9620]P1849(x96201)+~P1815(x96201,a50)
% 32.24/32.04 [9621]P1838(x96211)+~P1815(x96211,a39)
% 32.24/32.04 [9622]P1825(x96221)+~P1815(x96221,a62)
% 32.24/32.04 [9623]P1816(x96231)+~P1815(x96231,a50)
% 32.24/32.04 [9624]P1754(x96241)+~P819(x96241,a26)
% 32.24/32.04 [9625]P1755(x96251)+~P820(x96251,a26)
% 32.24/32.04 [9626]P1762(x96261)+~P842(x96261,a26)
% 32.24/32.04 [9627]P1759(x96271)+~P1741(x96271,a27)
% 32.24/32.04 [9628]P1760(x96281)+~P1741(x96281,a26)
% 32.24/32.04 [9629]P1706(x96291)+~P1747(x96291,a27)
% 32.24/32.04 [9630]P1706(x96301)+~P1716(x96301,a27)
% 32.24/32.04 [9631]P1706(x96311)+~P1665(x96311,a27)
% 32.24/32.04 [9632]P1700(x96321)+~P1747(x96321,a26)
% 32.24/32.04 [9633]P1700(x96331)+~P1716(x96331,a26)
% 32.24/32.04 [9634]P1700(x96341)+~P1665(x96341,a26)
% 32.24/32.04 [9635]P1696(x96351)+~P1747(x96351,a28)
% 32.24/32.04 [9636]P1696(x96361)+~P1716(x96361,a28)
% 32.24/32.04 [9637]P1696(x96371)+~P1665(x96371,a28)
% 32.24/32.04 [9638]P1690(x96381)+~P1747(x96381,a39)
% 32.24/32.04 [9639]P1690(x96391)+~P1716(x96391,a39)
% 32.24/32.04 [9640]P1690(x96401)+~P1665(x96401,a39)
% 32.24/32.04 [9641]P1664(x96411)+~P1747(x96411,a50)
% 32.24/32.04 [9642]P1664(x96421)+~P1716(x96421,a50)
% 32.24/32.04 [9643]P1664(x96431)+~P1665(x96431,a50)
% 32.24/32.04 [9644]P1708(x96441)+~P1033(x96441,a27)
% 32.24/32.04 [9645]P1708(x96451)+~P1591(x96451,a27)
% 32.24/32.04 [9646]P1562(x96461)+~P1571(x96461,a27)
% 32.24/32.04 [9647]P1562(x96471)+~P1547(x96471,a27)
% 32.24/32.04 [9648]P1635(x96481)+~P1621(x96481,a27)
% 32.24/32.04 [9649]P1693(x96491)+~P1033(x96491,a50)
% 32.24/32.04 [9650]P1693(x96501)+~P1591(x96501,a50)
% 32.24/32.04 [9651]P1688(x96511)+~P1033(x96511,a39)
% 32.24/32.04 [9652]P1688(x96521)+~P1591(x96521,a39)
% 32.24/32.04 [9653]P1683(x96531)+~P1033(x96531,a28)
% 32.24/32.04 [9654]P1683(x96541)+~P1591(x96541,a28)
% 32.24/32.04 [9655]P1678(x96551)+~P1033(x96551,a26)
% 32.24/32.04 [9656]P1678(x96561)+~P1591(x96561,a26)
% 32.24/32.04 [9657]P1638(x96571)+~P1621(x96571,a26)
% 32.24/32.04 [9658]P1633(x96581)+~P1621(x96581,a28)
% 32.24/32.04 [9659]P1629(x96591)+~P1621(x96591,a39)
% 32.24/32.04 [9660]P1620(x96601)+~P1621(x96601,a50)
% 32.24/32.04 [9661]P1642(x96611)+~P1591(x96611,a27)
% 32.24/32.04 [9662]P1642(x96621)+~P1591(x96621,a26)
% 32.24/32.04 [9663]P1639(x96631)+~P1591(x96631,a28)
% 32.24/32.04 [9664]P1634(x96641)+~P1591(x96641,a39)
% 32.24/32.04 [9665]P1630(x96651)+~P1591(x96651,a50)
% 32.24/32.04 [9666]P1587(x96661)+~P1571(x96661,a26)
% 32.24/32.04 [9667]P1582(x96671)+~P1571(x96671,a28)
% 32.24/32.04 [9668]P1579(x96681)+~P1571(x96681,a39)
% 32.24/32.04 [9669]P1569(x96691)+~P1571(x96691,a50)
% 32.24/32.04 [9670]P1586(x96701)+~P1033(x96701,a26)
% 32.24/32.04 [9671]P1590(x96711)+~P1033(x96711,a27)
% 32.24/32.04 [9672]P1581(x96721)+~P1033(x96721,a28)
% 32.24/32.04 [9673]P1536(x96731)+~P1033(x96731,a26)
% 32.24/32.04 [9674]P1578(x96741)+~P1033(x96741,a39)
% 32.24/32.04 [9675]P1537(x96751)+~P1033(x96751,a28)
% 32.24/32.04 [9676]P1568(x96761)+~P1033(x96761,a50)
% 32.24/32.04 [9677]P1538(x96771)+~P1033(x96771,a39)
% 32.24/32.04 [9678]P1565(x96781)+~P1547(x96781,a26)
% 32.24/32.04 [9679]P1559(x96791)+~P1547(x96791,a28)
% 32.24/32.04 [9680]P1555(x96801)+~P1547(x96801,a39)
% 32.24/32.04 [9681]P1546(x96811)+~P1547(x96811,a50)
% 32.24/32.04 [9682]P1570(x96821)+~P1033(x96821,a27)
% 32.24/32.04 [9683]P1570(x96831)+~P1033(x96831,a26)
% 32.24/32.04 [9684]P1566(x96841)+~P1033(x96841,a28)
% 32.24/32.04 [9685]P1560(x96851)+~P1033(x96851,a39)
% 32.24/32.04 [9686]P1556(x96861)+~P1033(x96861,a50)
% 32.24/32.04 [9687]P1462(x96871)+~P1471(x96871,a39)
% 32.24/32.04 [9688]P1128(x96881)+~P499(x96881,a73)
% 32.24/32.04 [9689]P1464(x96891)+~P1043(x96891,a31)
% 32.24/32.04 [9690]P1467(x96901)+~P1043(x96901,a91)
% 32.24/32.04 [9691]P1469(x96911)+~P1043(x96911,a39)
% 32.24/32.04 [9692]P1469(x96921)+~P1043(x96921,a61)
% 32.24/32.04 [9693]P1042(x96931)+~P1045(x96931,a26)
% 32.24/32.04 [9694]P1449(x96941)+~P1043(x96941,a31)
% 32.24/32.04 [9695]P1450(x96951)+~P1078(x96951,a30)
% 32.24/32.04 [9696]P1428(x96961)+~P1431(x96961,a27)
% 32.24/32.04 [9697]P1428(x96971)+~P1431(x96971,a26)
% 32.24/32.04 [9698]P1428(x96981)+~P1431(x96981,a28)
% 32.24/32.04 [9699]P1428(x96991)+~P1431(x96991,a39)
% 32.24/32.04 [9700]P1428(x97001)+~P1431(x97001,a62)
% 32.24/32.04 [9701]P1428(x97011)+~P1431(x97011,a50)
% 32.24/32.04 [9702]P1428(x97021)+~P1431(x97021,a83)
% 32.24/32.04 [9703]P1428(x97031)+~P1431(x97031,a61)
% 32.24/32.04 [9704]P1428(x97041)+~P1431(x97041,a29)
% 32.24/32.04 [9705]P1428(x97051)+~P1431(x97051,a30)
% 32.24/32.04 [9706]P1428(x97061)+~P1431(x97061,a91)
% 32.24/32.04 [9707]P1428(x97071)+~P1431(x97071,a92)
% 32.24/32.04 [9708]P1428(x97081)+~P1431(x97081,a31)
% 32.24/32.04 [9709]P1428(x97091)+~P1431(x97091,a32)
% 32.24/32.04 [9710]P1428(x97101)+~P1431(x97101,a33)
% 32.24/32.04 [9711]P1428(x97111)+~P1431(x97111,a34)
% 32.24/32.04 [9712]P1428(x97121)+~P1431(x97121,a35)
% 32.24/32.04 [9713]P1429(x97131)+~P1430(x97131,a27)
% 32.24/32.04 [9714]P1429(x97141)+~P1430(x97141,a26)
% 32.24/32.04 [9715]P1429(x97151)+~P1430(x97151,a28)
% 32.24/32.04 [9716]P1429(x97161)+~P1430(x97161,a39)
% 32.24/32.04 [9717]P1429(x97171)+~P1430(x97171,a62)
% 32.24/32.04 [9718]P1429(x97181)+~P1430(x97181,a50)
% 32.24/32.04 [9719]P1429(x97191)+~P1430(x97191,a83)
% 32.24/32.04 [9720]P1429(x97201)+~P1430(x97201,a61)
% 32.24/32.04 [9721]P1429(x97211)+~P1430(x97211,a29)
% 32.24/32.04 [9722]P1429(x97221)+~P1430(x97221,a30)
% 32.24/32.04 [9723]P1429(x97231)+~P1430(x97231,a91)
% 32.24/32.04 [9724]P1429(x97241)+~P1430(x97241,a92)
% 32.24/32.04 [9725]P1429(x97251)+~P1430(x97251,a31)
% 32.24/32.04 [9726]P1429(x97261)+~P1430(x97261,a32)
% 32.24/32.04 [9727]P1429(x97271)+~P1430(x97271,a33)
% 32.24/32.04 [9728]P1429(x97281)+~P1430(x97281,a34)
% 32.24/32.04 [9729]P1429(x97291)+~P1430(x97291,a35)
% 32.24/32.04 [9730]P1421(x97301)+~P1422(x97301,a27)
% 32.24/32.04 [9731]P1421(x97311)+~P1422(x97311,a26)
% 32.24/32.04 [9732]P1421(x97321)+~P1422(x97321,a28)
% 32.24/32.04 [9733]P1421(x97331)+~P1422(x97331,a39)
% 32.24/32.04 [9734]P1421(x97341)+~P1422(x97341,a62)
% 32.24/32.04 [9735]P1421(x97351)+~P1422(x97351,a50)
% 32.24/32.04 [9736]P1421(x97361)+~P1422(x97361,a83)
% 32.24/32.04 [9737]P1421(x97371)+~P1422(x97371,a61)
% 32.24/32.04 [9738]P1421(x97381)+~P1422(x97381,a29)
% 32.24/32.04 [9739]P1421(x97391)+~P1422(x97391,a30)
% 32.24/32.04 [9740]P1421(x97401)+~P1422(x97401,a91)
% 32.24/32.04 [9741]P1421(x97411)+~P1422(x97411,a92)
% 32.24/32.04 [9742]P1421(x97421)+~P1422(x97421,a31)
% 32.24/32.04 [9743]P1421(x97431)+~P1422(x97431,a32)
% 32.24/32.04 [9744]P1421(x97441)+~P1422(x97441,a33)
% 32.24/32.04 [9745]P1421(x97451)+~P1422(x97451,a34)
% 32.24/32.04 [9746]P1421(x97461)+~P1422(x97461,a35)
% 32.24/32.04 [9747]P1367(x97471)+~P1368(x97471,a27)
% 32.24/32.04 [9748]P1367(x97481)+~P1368(x97481,a26)
% 32.24/32.04 [9749]P1367(x97491)+~P1368(x97491,a28)
% 32.24/32.04 [9750]P1367(x97501)+~P1368(x97501,a39)
% 32.24/32.04 [9751]P1367(x97511)+~P1368(x97511,a62)
% 32.24/32.04 [9752]P1367(x97521)+~P1368(x97521,a50)
% 32.24/32.04 [9753]P1367(x97531)+~P1368(x97531,a83)
% 32.24/32.04 [9754]P1367(x97541)+~P1368(x97541,a61)
% 32.24/32.04 [9755]P1367(x97551)+~P1368(x97551,a29)
% 32.24/32.04 [9756]P1367(x97561)+~P1368(x97561,a30)
% 32.24/32.04 [9757]P1367(x97571)+~P1368(x97571,a91)
% 32.24/32.04 [9758]P1367(x97581)+~P1368(x97581,a92)
% 32.24/32.04 [9759]P1367(x97591)+~P1368(x97591,a31)
% 32.24/32.04 [9760]P1367(x97601)+~P1368(x97601,a32)
% 32.24/32.04 [9761]P1367(x97611)+~P1368(x97611,a33)
% 32.24/32.04 [9762]P1367(x97621)+~P1368(x97621,a34)
% 32.24/32.04 [9763]P1367(x97631)+~P1368(x97631,a35)
% 32.24/32.04 [9764]P1382(x97641)+~P1366(x97641,a27)
% 32.24/32.04 [9765]P1404(x97651)+~P1366(x97651,a26)
% 32.24/32.04 [9766]P1399(x97661)+~P1366(x97661,a28)
% 32.24/32.04 [9767]P1353(x97671)+~P1366(x97671,a39)
% 32.24/32.04 [9768]P1406(x97681)+~P1355(x97681,a27)
% 32.24/32.04 [9769]P1395(x97691)+~P1355(x97691,a27)
% 32.24/32.04 [9770]P1395(x97701)+~P1355(x97701,a26)
% 32.24/32.04 [9771]P1389(x97711)+~P1355(x97711,a28)
% 32.24/32.04 [9772]P1380(x97721)+~P1355(x97721,a39)
% 32.24/32.04 [9773]P1154(x97731)+~P1344(x97731,a27)
% 32.24/32.04 [9774]P1154(x97741)+~P1344(x97741,a26)
% 32.24/32.04 [9775]P1154(x97751)+~P1344(x97751,a28)
% 32.24/32.04 [9776]P1154(x97761)+~P1344(x97761,a39)
% 32.24/32.04 [9777]P1154(x97771)+~P1344(x97771,a62)
% 32.24/32.04 [9778]P1154(x97781)+~P1344(x97781,a50)
% 32.24/32.04 [9779]P1154(x97791)+~P1344(x97791,a83)
% 32.24/32.04 [9780]P1154(x97801)+~P1344(x97801,a61)
% 32.24/32.04 [9781]P1154(x97811)+~P1344(x97811,a91)
% 32.24/32.04 [9782]P1154(x97821)+~P1344(x97821,a92)
% 32.24/32.04 [9783]P1154(x97831)+~P1333(x97831,a27)
% 32.24/32.04 [9784]P1154(x97841)+~P1333(x97841,a26)
% 32.24/32.04 [9785]P1154(x97851)+~P1333(x97851,a28)
% 32.24/32.04 [9786]P1154(x97861)+~P1333(x97861,a39)
% 32.24/32.04 [9787]P1154(x97871)+~P1333(x97871,a62)
% 32.24/32.04 [9788]P1154(x97881)+~P1333(x97881,a50)
% 32.24/32.04 [9789]P1154(x97891)+~P1333(x97891,a83)
% 32.24/32.04 [9790]P1154(x97901)+~P1333(x97901,a61)
% 32.24/32.04 [9791]P1154(x97911)+~P1333(x97911,a29)
% 32.24/32.04 [9792]P1154(x97921)+~P1333(x97921,a30)
% 32.24/32.04 [9793]P1154(x97931)+~P1333(x97931,a91)
% 32.24/32.04 [9794]P1154(x97941)+~P1333(x97941,a92)
% 32.24/32.04 [9795]P1154(x97951)+~P1322(x97951,a27)
% 32.24/32.04 [9796]P1154(x97961)+~P1322(x97961,a26)
% 32.24/32.04 [9797]P1154(x97971)+~P1322(x97971,a28)
% 32.24/32.04 [9798]P1154(x97981)+~P1322(x97981,a39)
% 32.24/32.04 [9799]P1154(x97991)+~P1322(x97991,a62)
% 32.24/32.04 [9800]P1154(x98001)+~P1322(x98001,a50)
% 32.24/32.04 [9801]P1154(x98011)+~P1322(x98011,a83)
% 32.24/32.04 [9802]P1154(x98021)+~P1322(x98021,a61)
% 32.24/32.04 [9803]P1154(x98031)+~P1322(x98031,a29)
% 32.24/32.04 [9804]P1154(x98041)+~P1322(x98041,a30)
% 32.24/32.04 [9805]P1154(x98051)+~P1322(x98051,a91)
% 32.24/32.04 [9806]P1154(x98061)+~P1322(x98061,a92)
% 32.24/32.04 [9807]P1154(x98071)+~P1322(x98071,a31)
% 32.24/32.04 [9808]P1154(x98081)+~P1322(x98081,a32)
% 32.24/32.04 [9809]P1154(x98091)+~P1309(x98091,a27)
% 32.24/32.04 [9810]P1154(x98101)+~P1309(x98101,a26)
% 32.24/32.04 [9811]P1154(x98111)+~P1309(x98111,a28)
% 32.24/32.04 [9812]P1154(x98121)+~P1309(x98121,a39)
% 32.24/32.04 [9813]P1154(x98131)+~P1309(x98131,a62)
% 32.24/32.04 [9814]P1154(x98141)+~P1309(x98141,a50)
% 32.24/32.04 [9815]P1154(x98151)+~P1309(x98151,a83)
% 32.24/32.04 [9816]P1154(x98161)+~P1309(x98161,a61)
% 32.24/32.04 [9817]P1154(x98171)+~P1309(x98171,a29)
% 32.24/32.04 [9818]P1154(x98181)+~P1309(x98181,a30)
% 32.24/32.04 [9819]P1154(x98191)+~P1309(x98191,a91)
% 32.24/32.04 [9820]P1154(x98201)+~P1309(x98201,a92)
% 32.24/32.04 [9821]P1154(x98211)+~P1309(x98211,a31)
% 32.24/32.04 [9822]P1154(x98221)+~P1309(x98221,a32)
% 32.24/32.04 [9823]P1154(x98231)+~P1309(x98231,a33)
% 32.24/32.04 [9824]P1154(x98241)+~P1309(x98241,a34)
% 32.24/32.04 [9825]P1154(x98251)+~P1296(x98251,a27)
% 32.24/32.04 [9826]P1154(x98261)+~P1296(x98261,a26)
% 32.24/32.04 [9827]P1154(x98271)+~P1296(x98271,a28)
% 32.24/32.04 [9828]P1154(x98281)+~P1296(x98281,a39)
% 32.24/32.04 [9829]P1154(x98291)+~P1296(x98291,a62)
% 32.24/32.04 [9830]P1154(x98301)+~P1296(x98301,a50)
% 32.24/32.04 [9831]P1154(x98311)+~P1296(x98311,a83)
% 32.24/32.04 [9832]P1154(x98321)+~P1296(x98321,a61)
% 32.24/32.04 [9833]P1154(x98331)+~P1296(x98331,a29)
% 32.24/32.04 [9834]P1154(x98341)+~P1296(x98341,a30)
% 32.24/32.04 [9835]P1154(x98351)+~P1296(x98351,a91)
% 32.24/32.04 [9836]P1154(x98361)+~P1296(x98361,a92)
% 32.24/32.04 [9837]P1154(x98371)+~P1296(x98371,a31)
% 32.24/32.04 [9838]P1154(x98381)+~P1296(x98381,a32)
% 32.24/32.04 [9839]P1154(x98391)+~P1296(x98391,a33)
% 32.24/32.04 [9840]P1154(x98401)+~P1296(x98401,a34)
% 32.24/32.04 [9841]P1154(x98411)+~P1296(x98411,a35)
% 32.24/32.04 [9842]P1154(x98421)+~P1296(x98421,a36)
% 32.24/32.04 [9843]P1154(x98431)+~P1286(x98431,a27)
% 32.24/32.04 [9844]P1154(x98441)+~P1286(x98441,a26)
% 32.24/32.04 [9845]P1154(x98451)+~P1286(x98451,a28)
% 32.24/32.04 [9846]P1154(x98461)+~P1286(x98461,a39)
% 32.24/32.04 [9847]P1154(x98471)+~P1286(x98471,a62)
% 32.24/32.04 [9848]P1154(x98481)+~P1286(x98481,a50)
% 32.24/32.04 [9849]P1154(x98491)+~P1286(x98491,a83)
% 32.24/32.04 [9850]P1154(x98501)+~P1286(x98501,a61)
% 32.24/32.04 [9851]P1154(x98511)+~P1286(x98511,a29)
% 32.24/32.04 [9852]P1154(x98521)+~P1286(x98521,a30)
% 32.24/32.04 [9853]P1154(x98531)+~P1286(x98531,a91)
% 32.24/32.04 [9854]P1154(x98541)+~P1286(x98541,a92)
% 32.24/32.04 [9855]P1154(x98551)+~P1286(x98551,a31)
% 32.24/32.04 [9856]P1154(x98561)+~P1286(x98561,a32)
% 32.24/32.04 [9857]P1154(x98571)+~P1286(x98571,a33)
% 32.24/32.04 [9858]P1154(x98581)+~P1286(x98581,a34)
% 32.24/32.04 [9859]P1154(x98591)+~P1286(x98591,a35)
% 32.24/32.04 [9860]P1154(x98601)+~P1286(x98601,a36)
% 32.24/32.04 [9861]P1154(x98611)+~P1286(x98611,a37)
% 32.24/32.04 [9862]P1154(x98621)+~P1286(x98621,a38)
% 32.24/32.04 [9863]P1154(x98631)+~P1274(x98631,a27)
% 32.24/32.04 [9864]P1154(x98641)+~P1274(x98641,a26)
% 32.24/32.04 [9865]P1154(x98651)+~P1274(x98651,a28)
% 32.24/32.04 [9866]P1154(x98661)+~P1274(x98661,a39)
% 32.24/32.04 [9867]P1154(x98671)+~P1274(x98671,a62)
% 32.24/32.04 [9868]P1154(x98681)+~P1274(x98681,a50)
% 32.24/32.04 [9869]P1154(x98691)+~P1274(x98691,a83)
% 32.24/32.04 [9870]P1154(x98701)+~P1274(x98701,a61)
% 32.24/32.04 [9871]P1154(x98711)+~P1274(x98711,a29)
% 32.24/32.04 [9872]P1154(x98721)+~P1274(x98721,a30)
% 32.24/32.04 [9873]P1154(x98731)+~P1274(x98731,a91)
% 32.24/32.04 [9874]P1154(x98741)+~P1274(x98741,a92)
% 32.24/32.04 [9875]P1154(x98751)+~P1274(x98751,a31)
% 32.24/32.04 [9876]P1154(x98761)+~P1274(x98761,a32)
% 32.24/32.04 [9877]P1154(x98771)+~P1274(x98771,a33)
% 32.24/32.04 [9878]P1154(x98781)+~P1274(x98781,a34)
% 32.24/32.04 [9879]P1154(x98791)+~P1274(x98791,a35)
% 32.24/32.04 [9880]P1154(x98801)+~P1274(x98801,a36)
% 32.24/32.04 [9881]P1154(x98811)+~P1274(x98811,a37)
% 32.24/32.04 [9882]P1154(x98821)+~P1274(x98821,a38)
% 32.24/32.04 [9883]P1154(x98831)+~P1274(x98831,a40)
% 32.24/32.04 [9884]P1154(x98841)+~P1274(x98841,a41)
% 32.24/32.04 [9885]P1154(x98851)+~P1260(x98851,a27)
% 32.24/32.04 [9886]P1154(x98861)+~P1260(x98861,a26)
% 32.24/32.04 [9887]P1154(x98871)+~P1260(x98871,a28)
% 32.24/32.04 [9888]P1154(x98881)+~P1260(x98881,a39)
% 32.24/32.04 [9889]P1154(x98891)+~P1260(x98891,a62)
% 32.24/32.04 [9890]P1154(x98901)+~P1260(x98901,a50)
% 32.24/32.04 [9891]P1154(x98911)+~P1260(x98911,a83)
% 32.24/32.04 [9892]P1154(x98921)+~P1260(x98921,a61)
% 32.24/32.04 [9893]P1154(x98931)+~P1260(x98931,a29)
% 32.24/32.04 [9894]P1154(x98941)+~P1260(x98941,a30)
% 32.24/32.04 [9895]P1154(x98951)+~P1260(x98951,a91)
% 32.24/32.04 [9896]P1154(x98961)+~P1260(x98961,a92)
% 32.24/32.04 [9897]P1154(x98971)+~P1260(x98971,a31)
% 32.24/32.04 [9898]P1154(x98981)+~P1260(x98981,a32)
% 32.24/32.04 [9899]P1154(x98991)+~P1260(x98991,a33)
% 32.24/32.04 [9900]P1154(x99001)+~P1260(x99001,a34)
% 32.24/32.04 [9901]P1154(x99011)+~P1260(x99011,a35)
% 32.24/32.04 [9902]P1154(x99021)+~P1260(x99021,a36)
% 32.24/32.04 [9903]P1154(x99031)+~P1260(x99031,a37)
% 32.24/32.04 [9904]P1154(x99041)+~P1260(x99041,a38)
% 32.24/32.04 [9905]P1154(x99051)+~P1260(x99051,a40)
% 32.24/32.04 [9906]P1154(x99061)+~P1260(x99061,a41)
% 32.24/32.04 [9907]P1154(x99071)+~P1260(x99071,a42)
% 32.24/32.04 [9908]P1154(x99081)+~P1260(x99081,a43)
% 32.24/32.04 [9909]P1154(x99091)+~P1242(x99091,a27)
% 32.24/32.04 [9910]P1154(x99101)+~P1242(x99101,a26)
% 32.24/32.04 [9911]P1154(x99111)+~P1242(x99111,a28)
% 32.24/32.04 [9912]P1154(x99121)+~P1242(x99121,a39)
% 32.24/32.04 [9913]P1154(x99131)+~P1242(x99131,a62)
% 32.24/32.04 [9914]P1154(x99141)+~P1242(x99141,a50)
% 32.24/32.04 [9915]P1154(x99151)+~P1242(x99151,a83)
% 32.24/32.04 [9916]P1154(x99161)+~P1242(x99161,a61)
% 32.24/32.04 [9917]P1154(x99171)+~P1242(x99171,a29)
% 32.24/32.04 [9918]P1154(x99181)+~P1242(x99181,a30)
% 32.24/32.04 [9919]P1154(x99191)+~P1242(x99191,a91)
% 32.24/32.04 [9920]P1154(x99201)+~P1242(x99201,a92)
% 32.24/32.04 [9921]P1154(x99211)+~P1242(x99211,a31)
% 32.24/32.04 [9922]P1154(x99221)+~P1242(x99221,a32)
% 32.24/32.04 [9923]P1154(x99231)+~P1242(x99231,a33)
% 32.24/32.04 [9924]P1154(x99241)+~P1242(x99241,a34)
% 32.24/32.04 [9925]P1154(x99251)+~P1242(x99251,a35)
% 32.24/32.04 [9926]P1154(x99261)+~P1242(x99261,a36)
% 32.24/32.04 [9927]P1154(x99271)+~P1242(x99271,a37)
% 32.24/32.04 [9928]P1154(x99281)+~P1242(x99281,a38)
% 32.24/32.04 [9929]P1154(x99291)+~P1242(x99291,a40)
% 32.24/32.04 [9930]P1154(x99301)+~P1242(x99301,a41)
% 32.24/32.04 [9931]P1154(x99311)+~P1242(x99311,a42)
% 32.24/32.04 [9932]P1154(x99321)+~P1242(x99321,a43)
% 32.24/32.04 [9933]P1154(x99331)+~P1242(x99331,a44)
% 32.24/32.04 [9934]P1154(x99341)+~P1242(x99341,a45)
% 32.24/32.04 [9935]P1154(x99351)+~P1232(x99351,a27)
% 32.24/32.04 [9936]P1154(x99361)+~P1232(x99361,a26)
% 32.24/32.04 [9937]P1154(x99371)+~P1232(x99371,a28)
% 32.24/32.04 [9938]P1154(x99381)+~P1232(x99381,a39)
% 32.24/32.04 [9939]P1154(x99391)+~P1232(x99391,a62)
% 32.24/32.04 [9940]P1154(x99401)+~P1232(x99401,a50)
% 32.24/32.04 [9941]P1154(x99411)+~P1232(x99411,a83)
% 32.24/32.04 [9942]P1154(x99421)+~P1232(x99421,a61)
% 32.24/32.04 [9943]P1154(x99431)+~P1232(x99431,a29)
% 32.24/32.04 [9944]P1154(x99441)+~P1232(x99441,a30)
% 32.24/32.04 [9945]P1154(x99451)+~P1232(x99451,a91)
% 32.24/32.04 [9946]P1154(x99461)+~P1232(x99461,a92)
% 32.24/32.04 [9947]P1154(x99471)+~P1232(x99471,a31)
% 32.24/32.04 [9948]P1154(x99481)+~P1232(x99481,a32)
% 32.24/32.04 [9949]P1154(x99491)+~P1232(x99491,a33)
% 32.24/32.04 [9950]P1154(x99501)+~P1232(x99501,a34)
% 32.24/32.04 [9951]P1154(x99511)+~P1232(x99511,a35)
% 32.24/32.04 [9952]P1154(x99521)+~P1232(x99521,a36)
% 32.24/32.04 [9953]P1154(x99531)+~P1232(x99531,a37)
% 32.24/32.04 [9954]P1154(x99541)+~P1232(x99541,a38)
% 32.24/32.04 [9955]P1154(x99551)+~P1232(x99551,a40)
% 32.24/32.04 [9956]P1154(x99561)+~P1232(x99561,a41)
% 32.24/32.04 [9957]P1154(x99571)+~P1232(x99571,a42)
% 32.24/32.04 [9958]P1154(x99581)+~P1232(x99581,a43)
% 32.24/32.04 [9959]P1154(x99591)+~P1232(x99591,a44)
% 32.24/32.04 [9960]P1154(x99601)+~P1232(x99601,a45)
% 32.24/32.04 [9961]P1154(x99611)+~P1232(x99611,a46)
% 32.24/32.04 [9962]P1154(x99621)+~P1232(x99621,a47)
% 32.24/32.04 [9963]P1154(x99631)+~P1220(x99631,a27)
% 32.24/32.04 [9964]P1154(x99641)+~P1220(x99641,a26)
% 32.24/32.04 [9965]P1154(x99651)+~P1220(x99651,a28)
% 32.24/32.04 [9966]P1154(x99661)+~P1220(x99661,a39)
% 32.24/32.04 [9967]P1154(x99671)+~P1220(x99671,a62)
% 32.24/32.04 [9968]P1154(x99681)+~P1220(x99681,a50)
% 32.24/32.04 [9969]P1154(x99691)+~P1220(x99691,a83)
% 32.24/32.04 [9970]P1154(x99701)+~P1220(x99701,a61)
% 32.24/32.04 [9971]P1154(x99711)+~P1220(x99711,a29)
% 32.24/32.04 [9972]P1154(x99721)+~P1220(x99721,a30)
% 32.24/32.04 [9973]P1154(x99731)+~P1220(x99731,a91)
% 32.24/32.04 [9974]P1154(x99741)+~P1220(x99741,a92)
% 32.24/32.04 [9975]P1154(x99751)+~P1220(x99751,a31)
% 32.24/32.04 [9976]P1154(x99761)+~P1220(x99761,a32)
% 32.24/32.04 [9977]P1154(x99771)+~P1220(x99771,a33)
% 32.24/32.04 [9978]P1154(x99781)+~P1220(x99781,a34)
% 32.24/32.04 [9979]P1154(x99791)+~P1220(x99791,a35)
% 32.24/32.04 [9980]P1154(x99801)+~P1220(x99801,a36)
% 32.24/32.04 [9981]P1154(x99811)+~P1220(x99811,a37)
% 32.24/32.04 [9982]P1154(x99821)+~P1220(x99821,a38)
% 32.24/32.04 [9983]P1154(x99831)+~P1220(x99831,a40)
% 32.24/32.04 [9984]P1154(x99841)+~P1220(x99841,a41)
% 32.24/32.04 [9985]P1154(x99851)+~P1220(x99851,a42)
% 32.24/32.04 [9986]P1154(x99861)+~P1220(x99861,a43)
% 32.24/32.04 [9987]P1154(x99871)+~P1220(x99871,a44)
% 32.24/32.04 [9988]P1154(x99881)+~P1220(x99881,a45)
% 32.24/32.04 [9989]P1154(x99891)+~P1220(x99891,a46)
% 32.24/32.04 [9990]P1154(x99901)+~P1220(x99901,a47)
% 32.24/32.04 [9991]P1154(x99911)+~P1220(x99911,a48)
% 32.24/32.04 [9992]P1154(x99921)+~P1220(x99921,a49)
% 32.24/32.04 [9993]P1154(x99931)+~P1207(x99931,a27)
% 32.24/32.04 [9994]P1154(x99941)+~P1207(x99941,a26)
% 32.24/32.04 [9995]P1154(x99951)+~P1207(x99951,a28)
% 32.24/32.04 [9996]P1154(x99961)+~P1207(x99961,a39)
% 32.24/32.04 [9997]P1154(x99971)+~P1207(x99971,a62)
% 32.24/32.04 [9998]P1154(x99981)+~P1207(x99981,a50)
% 32.24/32.04 [9999]P1154(x99991)+~P1207(x99991,a83)
% 32.24/32.04 [10000]P1154(x100001)+~P1207(x100001,a61)
% 32.24/32.04 [10001]P1154(x100011)+~P1207(x100011,a29)
% 32.24/32.04 [10002]P1154(x100021)+~P1207(x100021,a30)
% 32.24/32.04 [10003]P1154(x100031)+~P1207(x100031,a91)
% 32.24/32.04 [10004]P1154(x100041)+~P1207(x100041,a92)
% 32.24/32.04 [10005]P1154(x100051)+~P1207(x100051,a31)
% 32.24/32.04 [10006]P1154(x100061)+~P1207(x100061,a32)
% 32.24/32.04 [10007]P1154(x100071)+~P1207(x100071,a33)
% 32.24/32.04 [10008]P1154(x100081)+~P1207(x100081,a34)
% 32.24/32.04 [10009]P1154(x100091)+~P1207(x100091,a35)
% 32.24/32.04 [10010]P1154(x100101)+~P1207(x100101,a36)
% 32.24/32.04 [10011]P1154(x100111)+~P1207(x100111,a37)
% 32.24/32.04 [10012]P1154(x100121)+~P1207(x100121,a38)
% 32.24/32.04 [10013]P1154(x100131)+~P1207(x100131,a40)
% 32.24/32.04 [10014]P1154(x100141)+~P1207(x100141,a41)
% 32.24/32.04 [10015]P1154(x100151)+~P1207(x100151,a42)
% 32.24/32.04 [10016]P1154(x100161)+~P1207(x100161,a43)
% 32.24/32.04 [10017]P1154(x100171)+~P1207(x100171,a44)
% 32.24/32.04 [10018]P1154(x100181)+~P1207(x100181,a45)
% 32.24/32.04 [10019]P1154(x100191)+~P1207(x100191,a46)
% 32.24/32.04 [10020]P1154(x100201)+~P1207(x100201,a47)
% 32.24/32.04 [10021]P1154(x100211)+~P1207(x100211,a48)
% 32.24/32.04 [10022]P1154(x100221)+~P1207(x100221,a49)
% 32.24/32.04 [10023]P1154(x100231)+~P1207(x100231,a51)
% 32.24/32.04 [10024]P1154(x100241)+~P1207(x100241,a52)
% 32.24/32.04 [10025]P1154(x100251)+~P1195(x100251,a27)
% 32.24/32.04 [10026]P1154(x100261)+~P1195(x100261,a26)
% 32.24/32.04 [10027]P1154(x100271)+~P1195(x100271,a28)
% 32.24/32.04 [10028]P1154(x100281)+~P1195(x100281,a39)
% 32.24/32.04 [10029]P1154(x100291)+~P1195(x100291,a62)
% 32.24/32.04 [10030]P1154(x100301)+~P1195(x100301,a50)
% 32.24/32.04 [10031]P1154(x100311)+~P1195(x100311,a83)
% 32.24/32.04 [10032]P1154(x100321)+~P1195(x100321,a61)
% 32.24/32.04 [10033]P1154(x100331)+~P1195(x100331,a29)
% 32.24/32.04 [10034]P1154(x100341)+~P1195(x100341,a30)
% 32.24/32.04 [10035]P1154(x100351)+~P1195(x100351,a91)
% 32.24/32.04 [10036]P1154(x100361)+~P1195(x100361,a92)
% 32.24/32.04 [10037]P1154(x100371)+~P1195(x100371,a31)
% 32.24/32.04 [10038]P1154(x100381)+~P1195(x100381,a32)
% 32.24/32.04 [10039]P1154(x100391)+~P1195(x100391,a33)
% 32.24/32.04 [10040]P1154(x100401)+~P1195(x100401,a34)
% 32.24/32.04 [10041]P1154(x100411)+~P1195(x100411,a35)
% 32.24/32.04 [10042]P1154(x100421)+~P1195(x100421,a36)
% 32.24/32.04 [10043]P1154(x100431)+~P1195(x100431,a37)
% 32.24/32.04 [10044]P1154(x100441)+~P1195(x100441,a38)
% 32.24/32.04 [10045]P1154(x100451)+~P1195(x100451,a40)
% 32.24/32.04 [10046]P1154(x100461)+~P1195(x100461,a41)
% 32.24/32.04 [10047]P1154(x100471)+~P1195(x100471,a42)
% 32.24/32.04 [10048]P1154(x100481)+~P1195(x100481,a43)
% 32.24/32.04 [10049]P1154(x100491)+~P1195(x100491,a44)
% 32.24/32.04 [10050]P1154(x100501)+~P1195(x100501,a45)
% 32.24/32.04 [10051]P1154(x100511)+~P1195(x100511,a46)
% 32.24/32.04 [10052]P1154(x100521)+~P1195(x100521,a47)
% 32.24/32.04 [10053]P1154(x100531)+~P1195(x100531,a48)
% 32.24/32.04 [10054]P1154(x100541)+~P1195(x100541,a49)
% 32.24/32.04 [10055]P1154(x100551)+~P1195(x100551,a51)
% 32.24/32.04 [10056]P1154(x100561)+~P1195(x100561,a52)
% 32.24/32.04 [10057]P1154(x100571)+~P1195(x100571,a53)
% 32.24/32.04 [10058]P1154(x100581)+~P1195(x100581,a54)
% 32.24/32.04 [10059]P1154(x100591)+~P1184(x100591,a27)
% 32.24/32.04 [10060]P1154(x100601)+~P1184(x100601,a26)
% 32.24/32.04 [10061]P1154(x100611)+~P1184(x100611,a28)
% 32.24/32.04 [10062]P1154(x100621)+~P1184(x100621,a39)
% 32.24/32.04 [10063]P1154(x100631)+~P1184(x100631,a62)
% 32.24/32.04 [10064]P1154(x100641)+~P1184(x100641,a50)
% 32.24/32.04 [10065]P1154(x100651)+~P1184(x100651,a83)
% 32.24/32.04 [10066]P1154(x100661)+~P1184(x100661,a61)
% 32.24/32.04 [10067]P1154(x100671)+~P1184(x100671,a29)
% 32.24/32.04 [10068]P1154(x100681)+~P1184(x100681,a30)
% 32.24/32.04 [10069]P1154(x100691)+~P1184(x100691,a91)
% 32.24/32.04 [10070]P1154(x100701)+~P1184(x100701,a92)
% 32.24/32.04 [10071]P1154(x100711)+~P1184(x100711,a31)
% 32.24/32.04 [10072]P1154(x100721)+~P1184(x100721,a32)
% 32.24/32.04 [10073]P1154(x100731)+~P1184(x100731,a33)
% 32.24/32.04 [10074]P1154(x100741)+~P1184(x100741,a34)
% 32.24/32.04 [10075]P1154(x100751)+~P1184(x100751,a35)
% 32.24/32.04 [10076]P1154(x100761)+~P1184(x100761,a36)
% 32.24/32.04 [10077]P1154(x100771)+~P1184(x100771,a37)
% 32.24/32.04 [10078]P1154(x100781)+~P1184(x100781,a38)
% 32.24/32.04 [10079]P1154(x100791)+~P1184(x100791,a40)
% 32.24/32.04 [10080]P1154(x100801)+~P1184(x100801,a41)
% 32.24/32.04 [10081]P1154(x100811)+~P1184(x100811,a42)
% 32.24/32.04 [10082]P1154(x100821)+~P1184(x100821,a43)
% 32.24/32.04 [10083]P1154(x100831)+~P1184(x100831,a44)
% 32.24/32.04 [10084]P1154(x100841)+~P1184(x100841,a45)
% 32.24/32.04 [10085]P1154(x100851)+~P1184(x100851,a46)
% 32.24/32.04 [10086]P1154(x100861)+~P1184(x100861,a47)
% 32.24/32.04 [10087]P1154(x100871)+~P1184(x100871,a48)
% 32.24/32.04 [10088]P1154(x100881)+~P1184(x100881,a49)
% 32.24/32.04 [10089]P1154(x100891)+~P1184(x100891,a51)
% 32.24/32.04 [10090]P1154(x100901)+~P1184(x100901,a52)
% 32.24/32.04 [10091]P1154(x100911)+~P1184(x100911,a53)
% 32.24/32.04 [10092]P1154(x100921)+~P1184(x100921,a54)
% 32.24/32.04 [10093]P1154(x100931)+~P1184(x100931,a55)
% 32.24/32.04 [10094]P1154(x100941)+~P1184(x100941,a56)
% 32.24/32.04 [10095]P1154(x100951)+~P1169(x100951,a27)
% 32.24/32.04 [10096]P1154(x100961)+~P1169(x100961,a26)
% 32.24/32.04 [10097]P1154(x100971)+~P1169(x100971,a28)
% 32.24/32.04 [10098]P1154(x100981)+~P1169(x100981,a39)
% 32.24/32.04 [10099]P1154(x100991)+~P1169(x100991,a62)
% 32.24/32.04 [10100]P1154(x101001)+~P1169(x101001,a50)
% 32.24/32.04 [10101]P1154(x101011)+~P1169(x101011,a83)
% 32.24/32.04 [10102]P1154(x101021)+~P1169(x101021,a61)
% 32.24/32.04 [10103]P1154(x101031)+~P1169(x101031,a29)
% 32.24/32.04 [10104]P1154(x101041)+~P1169(x101041,a30)
% 32.24/32.04 [10105]P1154(x101051)+~P1169(x101051,a91)
% 32.24/32.04 [10106]P1154(x101061)+~P1169(x101061,a92)
% 32.24/32.04 [10107]P1154(x101071)+~P1169(x101071,a31)
% 32.24/32.04 [10108]P1154(x101081)+~P1169(x101081,a32)
% 32.24/32.04 [10109]P1154(x101091)+~P1169(x101091,a33)
% 32.24/32.04 [10110]P1154(x101101)+~P1169(x101101,a34)
% 32.24/32.04 [10111]P1154(x101111)+~P1169(x101111,a35)
% 32.24/32.04 [10112]P1154(x101121)+~P1169(x101121,a36)
% 32.24/32.04 [10113]P1154(x101131)+~P1169(x101131,a37)
% 32.24/32.04 [10114]P1154(x101141)+~P1169(x101141,a38)
% 32.24/32.04 [10115]P1154(x101151)+~P1169(x101151,a40)
% 32.24/32.04 [10116]P1154(x101161)+~P1169(x101161,a41)
% 32.24/32.04 [10117]P1154(x101171)+~P1169(x101171,a42)
% 32.24/32.04 [10118]P1154(x101181)+~P1169(x101181,a43)
% 32.24/32.04 [10119]P1154(x101191)+~P1169(x101191,a44)
% 32.24/32.04 [10120]P1154(x101201)+~P1169(x101201,a45)
% 32.24/32.04 [10121]P1154(x101211)+~P1169(x101211,a46)
% 32.24/32.04 [10122]P1154(x101221)+~P1169(x101221,a47)
% 32.24/32.04 [10123]P1154(x101231)+~P1169(x101231,a48)
% 32.24/32.04 [10124]P1154(x101241)+~P1169(x101241,a49)
% 32.24/32.04 [10125]P1154(x101251)+~P1169(x101251,a51)
% 32.24/32.04 [10126]P1154(x101261)+~P1169(x101261,a52)
% 32.24/32.04 [10127]P1154(x101271)+~P1169(x101271,a53)
% 32.24/32.04 [10128]P1154(x101281)+~P1169(x101281,a54)
% 32.24/32.04 [10129]P1154(x101291)+~P1169(x101291,a55)
% 32.24/32.04 [10130]P1154(x101301)+~P1169(x101301,a56)
% 32.24/32.04 [10131]P1154(x101311)+~P1169(x101311,a57)
% 32.24/32.04 [10132]P1154(x101321)+~P1169(x101321,a58)
% 32.24/32.04 [10133]P1154(x101331)+~P1155(x101331,a27)
% 32.24/32.04 [10134]P1154(x101341)+~P1155(x101341,a26)
% 32.24/32.04 [10135]P1154(x101351)+~P1155(x101351,a28)
% 32.24/32.04 [10136]P1154(x101361)+~P1155(x101361,a39)
% 32.24/32.04 [10137]P1154(x101371)+~P1155(x101371,a62)
% 32.24/32.04 [10138]P1154(x101381)+~P1155(x101381,a50)
% 32.24/32.04 [10139]P1154(x101391)+~P1155(x101391,a83)
% 32.24/32.04 [10140]P1154(x101401)+~P1155(x101401,a61)
% 32.24/32.04 [10141]P1154(x101411)+~P1155(x101411,a29)
% 32.24/32.04 [10142]P1154(x101421)+~P1155(x101421,a30)
% 32.24/32.04 [10143]P1154(x101431)+~P1155(x101431,a91)
% 32.24/32.04 [10144]P1154(x101441)+~P1155(x101441,a92)
% 32.24/32.04 [10145]P1154(x101451)+~P1155(x101451,a31)
% 32.24/32.04 [10146]P1154(x101461)+~P1155(x101461,a32)
% 32.24/32.04 [10147]P1154(x101471)+~P1155(x101471,a33)
% 32.24/32.04 [10148]P1154(x101481)+~P1155(x101481,a34)
% 32.24/32.04 [10149]P1154(x101491)+~P1155(x101491,a35)
% 32.24/32.04 [10150]P1154(x101501)+~P1155(x101501,a36)
% 32.24/32.04 [10151]P1154(x101511)+~P1155(x101511,a37)
% 32.24/32.04 [10152]P1154(x101521)+~P1155(x101521,a38)
% 32.24/32.04 [10153]P1154(x101531)+~P1155(x101531,a40)
% 32.24/32.04 [10154]P1154(x101541)+~P1155(x101541,a41)
% 32.24/32.04 [10155]P1154(x101551)+~P1155(x101551,a42)
% 32.24/32.04 [10156]P1154(x101561)+~P1155(x101561,a43)
% 32.24/32.04 [10157]P1154(x101571)+~P1155(x101571,a44)
% 32.24/32.04 [10158]P1154(x101581)+~P1155(x101581,a45)
% 32.24/32.04 [10159]P1154(x101591)+~P1155(x101591,a46)
% 32.24/32.04 [10160]P1154(x101601)+~P1155(x101601,a47)
% 32.24/32.04 [10161]P1154(x101611)+~P1155(x101611,a48)
% 32.24/32.04 [10162]P1154(x101621)+~P1155(x101621,a49)
% 32.24/32.04 [10163]P1154(x101631)+~P1155(x101631,a51)
% 32.24/32.04 [10164]P1154(x101641)+~P1155(x101641,a52)
% 32.24/32.04 [10165]P1154(x101651)+~P1155(x101651,a53)
% 32.24/32.04 [10166]P1154(x101661)+~P1155(x101661,a54)
% 32.24/32.04 [10167]P1154(x101671)+~P1155(x101671,a55)
% 32.24/32.04 [10168]P1154(x101681)+~P1155(x101681,a56)
% 32.24/32.04 [10169]P1154(x101691)+~P1155(x101691,a57)
% 32.24/32.04 [10170]P1154(x101701)+~P1155(x101701,a58)
% 32.24/32.04 [10171]P1154(x101711)+~P1155(x101711,a59)
% 32.24/32.04 [10172]P1154(x101721)+~P1155(x101721,a60)
% 32.24/32.04 [10173]P1163(x101731)+~P1340(x101731,a27)
% 32.24/32.04 [10174]P1163(x101741)+~P1340(x101741,a26)
% 32.24/32.04 [10175]P1163(x101751)+~P1340(x101751,a28)
% 32.24/32.04 [10176]P1163(x101761)+~P1340(x101761,a39)
% 32.24/32.04 [10177]P1163(x101771)+~P1340(x101771,a62)
% 32.24/32.04 [10178]P1163(x101781)+~P1340(x101781,a50)
% 32.24/32.04 [10179]P1163(x101791)+~P1340(x101791,a83)
% 32.24/32.04 [10180]P1163(x101801)+~P1340(x101801,a61)
% 32.24/32.04 [10181]P1163(x101811)+~P1340(x101811,a29)
% 32.24/32.04 [10182]P1163(x101821)+~P1340(x101821,a30)
% 32.24/32.04 [10183]P1163(x101831)+~P1340(x101831,a91)
% 32.24/32.04 [10184]P1163(x101841)+~P1340(x101841,a92)
% 32.24/32.04 [10185]P1163(x101851)+~P1318(x101851,a27)
% 32.24/32.04 [10186]P1163(x101861)+~P1318(x101861,a26)
% 32.24/32.04 [10187]P1163(x101871)+~P1318(x101871,a28)
% 32.24/32.04 [10188]P1163(x101881)+~P1318(x101881,a39)
% 32.24/32.04 [10189]P1163(x101891)+~P1318(x101891,a62)
% 32.24/32.04 [10190]P1163(x101901)+~P1318(x101901,a50)
% 32.24/32.04 [10191]P1163(x101911)+~P1318(x101911,a83)
% 32.24/32.04 [10192]P1163(x101921)+~P1318(x101921,a61)
% 32.24/32.04 [10193]P1163(x101931)+~P1318(x101931,a29)
% 32.24/32.04 [10194]P1163(x101941)+~P1318(x101941,a30)
% 32.24/32.04 [10195]P1163(x101951)+~P1318(x101951,a91)
% 32.24/32.04 [10196]P1163(x101961)+~P1318(x101961,a92)
% 32.24/32.04 [10197]P1163(x101971)+~P1318(x101971,a31)
% 32.24/32.04 [10198]P1163(x101981)+~P1318(x101981,a32)
% 32.24/32.04 [10199]P1163(x101991)+~P1318(x101991,a33)
% 32.24/32.04 [10200]P1163(x102001)+~P1318(x102001,a34)
% 32.24/32.04 [10201]P1163(x102011)+~P1292(x102011,a27)
% 32.24/32.04 [10202]P1163(x102021)+~P1292(x102021,a26)
% 32.24/32.04 [10203]P1163(x102031)+~P1292(x102031,a28)
% 32.24/32.04 [10204]P1163(x102041)+~P1292(x102041,a39)
% 32.24/32.04 [10205]P1163(x102051)+~P1292(x102051,a62)
% 32.24/32.04 [10206]P1163(x102061)+~P1292(x102061,a50)
% 32.24/32.04 [10207]P1163(x102071)+~P1292(x102071,a83)
% 32.24/32.04 [10208]P1163(x102081)+~P1292(x102081,a61)
% 32.24/32.04 [10209]P1163(x102091)+~P1292(x102091,a29)
% 32.24/32.04 [10210]P1163(x102101)+~P1292(x102101,a30)
% 32.24/32.04 [10211]P1163(x102111)+~P1292(x102111,a91)
% 32.24/32.04 [10212]P1163(x102121)+~P1292(x102121,a92)
% 32.24/32.04 [10213]P1163(x102131)+~P1292(x102131,a31)
% 32.24/32.04 [10214]P1163(x102141)+~P1292(x102141,a32)
% 32.24/32.04 [10215]P1163(x102151)+~P1292(x102151,a33)
% 32.24/32.04 [10216]P1163(x102161)+~P1292(x102161,a34)
% 32.24/32.04 [10217]P1163(x102171)+~P1292(x102171,a35)
% 32.24/32.04 [10218]P1163(x102181)+~P1292(x102181,a36)
% 32.24/32.04 [10219]P1163(x102191)+~P1292(x102191,a37)
% 32.24/32.04 [10220]P1163(x102201)+~P1292(x102201,a38)
% 32.24/32.04 [10221]P1163(x102211)+~P1270(x102211,a27)
% 32.24/32.04 [10222]P1163(x102221)+~P1270(x102221,a26)
% 32.24/32.04 [10223]P1163(x102231)+~P1270(x102231,a28)
% 32.24/32.04 [10224]P1163(x102241)+~P1270(x102241,a39)
% 32.24/32.04 [10225]P1163(x102251)+~P1270(x102251,a62)
% 32.24/32.04 [10226]P1163(x102261)+~P1270(x102261,a50)
% 32.24/32.04 [10227]P1163(x102271)+~P1270(x102271,a83)
% 32.24/32.04 [10228]P1163(x102281)+~P1270(x102281,a61)
% 32.24/32.04 [10229]P1163(x102291)+~P1270(x102291,a29)
% 32.24/32.04 [10230]P1163(x102301)+~P1270(x102301,a30)
% 32.24/32.04 [10231]P1163(x102311)+~P1270(x102311,a91)
% 32.24/32.04 [10232]P1163(x102321)+~P1270(x102321,a92)
% 32.24/32.04 [10233]P1163(x102331)+~P1270(x102331,a31)
% 32.24/32.04 [10234]P1163(x102341)+~P1270(x102341,a32)
% 32.24/32.04 [10235]P1163(x102351)+~P1270(x102351,a33)
% 32.24/32.04 [10236]P1163(x102361)+~P1270(x102361,a34)
% 32.24/32.04 [10237]P1163(x102371)+~P1270(x102371,a35)
% 32.24/32.04 [10238]P1163(x102381)+~P1270(x102381,a36)
% 32.24/32.04 [10239]P1163(x102391)+~P1270(x102391,a37)
% 32.24/32.04 [10240]P1163(x102401)+~P1270(x102401,a38)
% 32.24/32.04 [10241]P1163(x102411)+~P1270(x102411,a40)
% 32.24/32.04 [10242]P1163(x102421)+~P1270(x102421,a41)
% 32.24/32.04 [10243]P1163(x102431)+~P1270(x102431,a42)
% 32.24/32.04 [10244]P1163(x102441)+~P1270(x102441,a43)
% 32.24/32.04 [10245]P1163(x102451)+~P1238(x102451,a27)
% 32.24/32.04 [10246]P1163(x102461)+~P1238(x102461,a26)
% 32.24/32.04 [10247]P1163(x102471)+~P1238(x102471,a28)
% 32.24/32.04 [10248]P1163(x102481)+~P1238(x102481,a39)
% 32.24/32.04 [10249]P1163(x102491)+~P1238(x102491,a62)
% 32.24/32.04 [10250]P1163(x102501)+~P1238(x102501,a50)
% 32.24/32.04 [10251]P1163(x102511)+~P1238(x102511,a83)
% 32.24/32.04 [10252]P1163(x102521)+~P1238(x102521,a61)
% 32.24/32.04 [10253]P1163(x102531)+~P1238(x102531,a29)
% 32.24/32.04 [10254]P1163(x102541)+~P1238(x102541,a30)
% 32.24/32.04 [10255]P1163(x102551)+~P1238(x102551,a91)
% 32.24/32.04 [10256]P1163(x102561)+~P1238(x102561,a92)
% 32.24/32.04 [10257]P1163(x102571)+~P1238(x102571,a31)
% 32.24/32.04 [10258]P1163(x102581)+~P1238(x102581,a32)
% 32.24/32.04 [10259]P1163(x102591)+~P1238(x102591,a33)
% 32.24/32.04 [10260]P1163(x102601)+~P1238(x102601,a34)
% 32.24/32.04 [10261]P1163(x102611)+~P1238(x102611,a35)
% 32.24/32.04 [10262]P1163(x102621)+~P1238(x102621,a36)
% 32.24/32.04 [10263]P1163(x102631)+~P1238(x102631,a37)
% 32.24/32.04 [10264]P1163(x102641)+~P1238(x102641,a38)
% 32.24/32.04 [10265]P1163(x102651)+~P1238(x102651,a40)
% 32.24/32.04 [10266]P1163(x102661)+~P1238(x102661,a41)
% 32.24/32.04 [10267]P1163(x102671)+~P1238(x102671,a42)
% 32.24/32.04 [10268]P1163(x102681)+~P1238(x102681,a43)
% 32.24/32.04 [10269]P1163(x102691)+~P1238(x102691,a44)
% 32.24/32.04 [10270]P1163(x102701)+~P1238(x102701,a45)
% 32.24/32.04 [10271]P1163(x102711)+~P1238(x102711,a46)
% 32.24/32.04 [10272]P1163(x102721)+~P1238(x102721,a47)
% 32.24/32.04 [10273]P1163(x102731)+~P1216(x102731,a27)
% 32.24/32.04 [10274]P1163(x102741)+~P1216(x102741,a26)
% 32.24/32.04 [10275]P1163(x102751)+~P1216(x102751,a28)
% 32.24/32.04 [10276]P1163(x102761)+~P1216(x102761,a39)
% 32.24/32.04 [10277]P1163(x102771)+~P1216(x102771,a62)
% 32.24/32.04 [10278]P1163(x102781)+~P1216(x102781,a50)
% 32.24/32.04 [10279]P1163(x102791)+~P1216(x102791,a83)
% 32.24/32.04 [10280]P1163(x102801)+~P1216(x102801,a61)
% 32.24/32.04 [10281]P1163(x102811)+~P1216(x102811,a29)
% 32.24/32.04 [10282]P1163(x102821)+~P1216(x102821,a30)
% 32.24/32.04 [10283]P1163(x102831)+~P1216(x102831,a91)
% 32.24/32.04 [10284]P1163(x102841)+~P1216(x102841,a92)
% 32.24/32.04 [10285]P1163(x102851)+~P1216(x102851,a31)
% 32.24/32.04 [10286]P1163(x102861)+~P1216(x102861,a32)
% 32.24/32.04 [10287]P1163(x102871)+~P1216(x102871,a33)
% 32.24/32.04 [10288]P1163(x102881)+~P1216(x102881,a34)
% 32.24/32.04 [10289]P1163(x102891)+~P1216(x102891,a35)
% 32.24/32.04 [10290]P1163(x102901)+~P1216(x102901,a36)
% 32.24/32.04 [10291]P1163(x102911)+~P1216(x102911,a37)
% 32.24/32.04 [10292]P1163(x102921)+~P1216(x102921,a38)
% 32.24/32.04 [10293]P1163(x102931)+~P1216(x102931,a40)
% 32.24/32.04 [10294]P1163(x102941)+~P1216(x102941,a41)
% 32.24/32.04 [10295]P1163(x102951)+~P1216(x102951,a42)
% 32.24/32.04 [10296]P1163(x102961)+~P1216(x102961,a43)
% 32.24/32.04 [10297]P1163(x102971)+~P1216(x102971,a44)
% 32.24/32.04 [10298]P1163(x102981)+~P1216(x102981,a45)
% 32.24/32.04 [10299]P1163(x102991)+~P1216(x102991,a46)
% 32.24/32.04 [10300]P1163(x103001)+~P1216(x103001,a47)
% 32.24/32.04 [10301]P1163(x103011)+~P1216(x103011,a48)
% 32.24/32.04 [10302]P1163(x103021)+~P1216(x103021,a49)
% 32.24/32.04 [10303]P1163(x103031)+~P1216(x103031,a51)
% 32.24/32.04 [10304]P1163(x103041)+~P1216(x103041,a52)
% 32.24/32.04 [10305]P1163(x103051)+~P1187(x103051,a27)
% 32.24/32.04 [10306]P1163(x103061)+~P1187(x103061,a26)
% 32.24/32.04 [10307]P1163(x103071)+~P1187(x103071,a28)
% 32.24/32.04 [10308]P1163(x103081)+~P1187(x103081,a39)
% 32.24/32.04 [10309]P1163(x103091)+~P1187(x103091,a62)
% 32.24/32.04 [10310]P1163(x103101)+~P1187(x103101,a50)
% 32.24/32.04 [10311]P1163(x103111)+~P1187(x103111,a83)
% 32.24/32.04 [10312]P1163(x103121)+~P1187(x103121,a61)
% 32.24/32.04 [10313]P1163(x103131)+~P1187(x103131,a29)
% 32.24/32.04 [10314]P1163(x103141)+~P1187(x103141,a30)
% 32.24/32.04 [10315]P1163(x103151)+~P1187(x103151,a91)
% 32.24/32.04 [10316]P1163(x103161)+~P1187(x103161,a92)
% 32.24/32.04 [10317]P1163(x103171)+~P1187(x103171,a31)
% 32.24/32.04 [10318]P1163(x103181)+~P1187(x103181,a32)
% 32.24/32.04 [10319]P1163(x103191)+~P1187(x103191,a33)
% 32.24/32.04 [10320]P1163(x103201)+~P1187(x103201,a34)
% 32.24/32.04 [10321]P1163(x103211)+~P1187(x103211,a35)
% 32.24/32.04 [10322]P1163(x103221)+~P1187(x103221,a36)
% 32.24/32.04 [10323]P1163(x103231)+~P1187(x103231,a37)
% 32.24/32.04 [10324]P1163(x103241)+~P1187(x103241,a38)
% 32.24/32.04 [10325]P1163(x103251)+~P1187(x103251,a40)
% 32.24/32.04 [10326]P1163(x103261)+~P1187(x103261,a41)
% 32.24/32.04 [10327]P1163(x103271)+~P1187(x103271,a42)
% 32.24/32.04 [10328]P1163(x103281)+~P1187(x103281,a43)
% 32.24/32.04 [10329]P1163(x103291)+~P1187(x103291,a44)
% 32.24/32.04 [10330]P1163(x103301)+~P1187(x103301,a45)
% 32.24/32.04 [10331]P1163(x103311)+~P1187(x103311,a46)
% 32.24/32.04 [10332]P1163(x103321)+~P1187(x103321,a47)
% 32.24/32.04 [10333]P1163(x103331)+~P1187(x103331,a48)
% 32.24/32.04 [10334]P1163(x103341)+~P1187(x103341,a49)
% 32.24/32.04 [10335]P1163(x103351)+~P1187(x103351,a51)
% 32.24/32.04 [10336]P1163(x103361)+~P1187(x103361,a52)
% 32.24/32.04 [10337]P1163(x103371)+~P1187(x103371,a53)
% 32.24/32.04 [10338]P1163(x103381)+~P1187(x103381,a54)
% 32.24/32.04 [10339]P1163(x103391)+~P1187(x103391,a55)
% 32.24/32.04 [10340]P1163(x103401)+~P1187(x103401,a56)
% 32.24/32.04 [10341]P1163(x103411)+~P1164(x103411,a27)
% 32.24/32.04 [10342]P1163(x103421)+~P1164(x103421,a26)
% 32.24/32.04 [10343]P1163(x103431)+~P1164(x103431,a28)
% 32.24/32.04 [10344]P1163(x103441)+~P1164(x103441,a39)
% 32.24/32.04 [10345]P1163(x103451)+~P1164(x103451,a62)
% 32.24/32.04 [10346]P1163(x103461)+~P1164(x103461,a50)
% 32.24/32.04 [10347]P1163(x103471)+~P1164(x103471,a83)
% 32.24/32.04 [10348]P1163(x103481)+~P1164(x103481,a61)
% 32.24/32.04 [10349]P1163(x103491)+~P1164(x103491,a29)
% 32.24/32.04 [10350]P1163(x103501)+~P1164(x103501,a30)
% 32.24/32.04 [10351]P1163(x103511)+~P1164(x103511,a91)
% 32.24/32.04 [10352]P1163(x103521)+~P1164(x103521,a92)
% 32.24/32.04 [10353]P1163(x103531)+~P1164(x103531,a31)
% 32.24/32.04 [10354]P1163(x103541)+~P1164(x103541,a32)
% 32.24/32.04 [10355]P1163(x103551)+~P1164(x103551,a33)
% 32.24/32.04 [10356]P1163(x103561)+~P1164(x103561,a34)
% 32.24/32.04 [10357]P1163(x103571)+~P1164(x103571,a35)
% 32.24/32.04 [10358]P1163(x103581)+~P1164(x103581,a36)
% 32.24/32.04 [10359]P1163(x103591)+~P1164(x103591,a37)
% 32.24/32.04 [10360]P1163(x103601)+~P1164(x103601,a38)
% 32.24/32.04 [10361]P1163(x103611)+~P1164(x103611,a40)
% 32.24/32.04 [10362]P1163(x103621)+~P1164(x103621,a41)
% 32.24/32.04 [10363]P1163(x103631)+~P1164(x103631,a42)
% 32.24/32.04 [10364]P1163(x103641)+~P1164(x103641,a43)
% 32.24/32.04 [10365]P1163(x103651)+~P1164(x103651,a44)
% 32.24/32.04 [10366]P1163(x103661)+~P1164(x103661,a45)
% 32.24/32.04 [10367]P1163(x103671)+~P1164(x103671,a46)
% 32.24/32.04 [10368]P1163(x103681)+~P1164(x103681,a47)
% 32.24/32.04 [10369]P1163(x103691)+~P1164(x103691,a48)
% 32.24/32.04 [10370]P1163(x103701)+~P1164(x103701,a49)
% 32.24/32.04 [10371]P1163(x103711)+~P1164(x103711,a51)
% 32.24/32.04 [10372]P1163(x103721)+~P1164(x103721,a52)
% 32.24/32.04 [10373]P1163(x103731)+~P1164(x103731,a53)
% 32.24/32.04 [10374]P1163(x103741)+~P1164(x103741,a54)
% 32.24/32.04 [10375]P1163(x103751)+~P1164(x103751,a55)
% 32.24/32.04 [10376]P1163(x103761)+~P1164(x103761,a56)
% 32.24/32.04 [10377]P1163(x103771)+~P1164(x103771,a57)
% 32.24/32.04 [10378]P1163(x103781)+~P1164(x103781,a58)
% 32.24/32.04 [10379]P1163(x103791)+~P1164(x103791,a59)
% 32.24/32.04 [10380]P1163(x103801)+~P1164(x103801,a60)
% 32.24/32.04 [10381]P1173(x103811)+~P1327(x103811,a27)
% 32.24/32.04 [10382]P1173(x103821)+~P1327(x103821,a26)
% 32.24/32.04 [10383]P1173(x103831)+~P1327(x103831,a28)
% 32.24/32.04 [10384]P1173(x103841)+~P1327(x103841,a39)
% 32.24/32.04 [10385]P1173(x103851)+~P1327(x103851,a62)
% 32.24/32.04 [10386]P1173(x103861)+~P1327(x103861,a50)
% 32.24/32.04 [10387]P1173(x103871)+~P1327(x103871,a83)
% 32.24/32.04 [10388]P1173(x103881)+~P1327(x103881,a61)
% 32.24/32.04 [10389]P1173(x103891)+~P1327(x103891,a29)
% 32.24/32.04 [10390]P1173(x103901)+~P1327(x103901,a30)
% 32.24/32.04 [10391]P1173(x103911)+~P1327(x103911,a91)
% 32.24/32.04 [10392]P1173(x103921)+~P1327(x103921,a92)
% 32.24/32.04 [10393]P1173(x103931)+~P1327(x103931,a31)
% 32.24/32.04 [10394]P1173(x103941)+~P1327(x103941,a32)
% 32.24/32.04 [10395]P1173(x103951)+~P1327(x103951,a33)
% 32.24/32.04 [10396]P1173(x103961)+~P1327(x103961,a34)
% 32.24/32.04 [10397]P1173(x103971)+~P1280(x103971,a27)
% 32.24/32.04 [10398]P1173(x103981)+~P1280(x103981,a26)
% 32.24/32.04 [10399]P1173(x103991)+~P1280(x103991,a28)
% 32.24/32.04 [10400]P1173(x104001)+~P1280(x104001,a39)
% 32.24/32.04 [10401]P1173(x104011)+~P1280(x104011,a62)
% 32.24/32.04 [10402]P1173(x104021)+~P1280(x104021,a50)
% 32.24/32.04 [10403]P1173(x104031)+~P1280(x104031,a83)
% 32.24/32.04 [10404]P1173(x104041)+~P1280(x104041,a61)
% 32.24/32.04 [10405]P1173(x104051)+~P1280(x104051,a29)
% 32.24/32.04 [10406]P1173(x104061)+~P1280(x104061,a30)
% 32.24/32.04 [10407]P1173(x104071)+~P1280(x104071,a91)
% 32.24/32.04 [10408]P1173(x104081)+~P1280(x104081,a92)
% 32.24/32.04 [10409]P1173(x104091)+~P1280(x104091,a31)
% 32.24/32.04 [10410]P1173(x104101)+~P1280(x104101,a32)
% 32.24/32.04 [10411]P1173(x104111)+~P1280(x104111,a33)
% 32.24/32.04 [10412]P1173(x104121)+~P1280(x104121,a34)
% 32.24/32.04 [10413]P1173(x104131)+~P1280(x104131,a35)
% 32.24/32.04 [10414]P1173(x104141)+~P1280(x104141,a36)
% 32.24/32.04 [10415]P1173(x104151)+~P1280(x104151,a37)
% 32.24/32.04 [10416]P1173(x104161)+~P1280(x104161,a38)
% 32.24/32.04 [10417]P1173(x104171)+~P1280(x104171,a40)
% 32.24/32.04 [10418]P1173(x104181)+~P1280(x104181,a41)
% 32.24/32.04 [10419]P1173(x104191)+~P1280(x104191,a42)
% 32.24/32.04 [10420]P1173(x104201)+~P1280(x104201,a43)
% 32.24/32.04 [10421]P1173(x104211)+~P1226(x104211,a27)
% 32.24/32.04 [10422]P1173(x104221)+~P1226(x104221,a26)
% 32.24/32.04 [10423]P1173(x104231)+~P1226(x104231,a28)
% 32.24/32.04 [10424]P1173(x104241)+~P1226(x104241,a39)
% 32.24/32.04 [10425]P1173(x104251)+~P1226(x104251,a62)
% 32.24/32.04 [10426]P1173(x104261)+~P1226(x104261,a50)
% 32.24/32.04 [10427]P1173(x104271)+~P1226(x104271,a83)
% 32.24/32.04 [10428]P1173(x104281)+~P1226(x104281,a61)
% 32.24/32.04 [10429]P1173(x104291)+~P1226(x104291,a29)
% 32.24/32.04 [10430]P1173(x104301)+~P1226(x104301,a30)
% 32.24/32.04 [10431]P1173(x104311)+~P1226(x104311,a91)
% 32.24/32.04 [10432]P1173(x104321)+~P1226(x104321,a92)
% 32.24/32.04 [10433]P1173(x104331)+~P1226(x104331,a31)
% 32.24/32.04 [10434]P1173(x104341)+~P1226(x104341,a32)
% 32.24/32.04 [10435]P1173(x104351)+~P1226(x104351,a33)
% 32.24/32.04 [10436]P1173(x104361)+~P1226(x104361,a34)
% 32.24/32.04 [10437]P1173(x104371)+~P1226(x104371,a35)
% 32.24/32.04 [10438]P1173(x104381)+~P1226(x104381,a36)
% 32.24/32.04 [10439]P1173(x104391)+~P1226(x104391,a37)
% 32.24/32.04 [10440]P1173(x104401)+~P1226(x104401,a38)
% 32.24/32.04 [10441]P1173(x104411)+~P1226(x104411,a40)
% 32.24/32.04 [10442]P1173(x104421)+~P1226(x104421,a41)
% 32.24/32.04 [10443]P1173(x104431)+~P1226(x104431,a42)
% 32.24/32.04 [10444]P1173(x104441)+~P1226(x104441,a43)
% 32.24/32.04 [10445]P1173(x104451)+~P1226(x104451,a44)
% 32.24/32.04 [10446]P1173(x104461)+~P1226(x104461,a45)
% 32.24/32.04 [10447]P1173(x104471)+~P1226(x104471,a46)
% 32.24/32.04 [10448]P1173(x104481)+~P1226(x104481,a47)
% 32.24/32.04 [10449]P1173(x104491)+~P1226(x104491,a48)
% 32.24/32.04 [10450]P1173(x104501)+~P1226(x104501,a49)
% 32.24/32.04 [10451]P1173(x104511)+~P1226(x104511,a51)
% 32.24/32.04 [10452]P1173(x104521)+~P1226(x104521,a52)
% 32.24/32.04 [10453]P1173(x104531)+~P1174(x104531,a27)
% 32.24/32.04 [10454]P1173(x104541)+~P1174(x104541,a26)
% 32.24/32.04 [10455]P1173(x104551)+~P1174(x104551,a28)
% 32.24/32.04 [10456]P1173(x104561)+~P1174(x104561,a39)
% 32.24/32.04 [10457]P1173(x104571)+~P1174(x104571,a62)
% 32.24/32.04 [10458]P1173(x104581)+~P1174(x104581,a50)
% 32.24/32.04 [10459]P1173(x104591)+~P1174(x104591,a83)
% 32.24/32.04 [10460]P1173(x104601)+~P1174(x104601,a61)
% 32.24/32.04 [10461]P1173(x104611)+~P1174(x104611,a29)
% 32.24/32.04 [10462]P1173(x104621)+~P1174(x104621,a30)
% 32.24/32.04 [10463]P1173(x104631)+~P1174(x104631,a91)
% 32.24/32.04 [10464]P1173(x104641)+~P1174(x104641,a92)
% 32.24/32.04 [10465]P1173(x104651)+~P1174(x104651,a31)
% 32.24/32.04 [10466]P1173(x104661)+~P1174(x104661,a32)
% 32.24/32.04 [10467]P1173(x104671)+~P1174(x104671,a33)
% 32.24/32.04 [10468]P1173(x104681)+~P1174(x104681,a34)
% 32.24/32.04 [10469]P1173(x104691)+~P1174(x104691,a35)
% 32.24/32.04 [10470]P1173(x104701)+~P1174(x104701,a36)
% 32.24/32.04 [10471]P1173(x104711)+~P1174(x104711,a37)
% 32.24/32.04 [10472]P1173(x104721)+~P1174(x104721,a38)
% 32.24/32.04 [10473]P1173(x104731)+~P1174(x104731,a40)
% 32.24/32.04 [10474]P1173(x104741)+~P1174(x104741,a41)
% 32.24/32.04 [10475]P1173(x104751)+~P1174(x104751,a42)
% 32.24/32.04 [10476]P1173(x104761)+~P1174(x104761,a43)
% 32.24/32.04 [10477]P1173(x104771)+~P1174(x104771,a44)
% 32.24/32.04 [10478]P1173(x104781)+~P1174(x104781,a45)
% 32.24/32.04 [10479]P1173(x104791)+~P1174(x104791,a46)
% 32.24/32.04 [10480]P1173(x104801)+~P1174(x104801,a47)
% 32.24/32.04 [10481]P1173(x104811)+~P1174(x104811,a48)
% 32.24/32.04 [10482]P1173(x104821)+~P1174(x104821,a49)
% 32.24/32.04 [10483]P1173(x104831)+~P1174(x104831,a51)
% 32.24/32.04 [10484]P1173(x104841)+~P1174(x104841,a52)
% 32.24/32.04 [10485]P1173(x104851)+~P1174(x104851,a53)
% 32.24/32.04 [10486]P1173(x104861)+~P1174(x104861,a54)
% 32.24/32.04 [10487]P1173(x104871)+~P1174(x104871,a55)
% 32.24/32.04 [10488]P1173(x104881)+~P1174(x104881,a56)
% 32.24/32.04 [10489]P1173(x104891)+~P1174(x104891,a57)
% 32.24/32.04 [10490]P1173(x104901)+~P1174(x104901,a58)
% 32.24/32.04 [10491]P1173(x104911)+~P1174(x104911,a59)
% 32.24/32.04 [10492]P1173(x104921)+~P1174(x104921,a60)
% 32.24/32.04 [10493]P1197(x104931)+~P1300(x104931,a27)
% 32.24/32.04 [10494]P1197(x104941)+~P1300(x104941,a26)
% 32.24/32.04 [10495]P1197(x104951)+~P1300(x104951,a28)
% 32.24/32.04 [10496]P1197(x104961)+~P1300(x104961,a39)
% 32.24/32.04 [10497]P1197(x104971)+~P1300(x104971,a62)
% 32.24/32.04 [10498]P1197(x104981)+~P1300(x104981,a50)
% 32.24/32.04 [10499]P1197(x104991)+~P1300(x104991,a83)
% 32.24/32.04 [10500]P1197(x105001)+~P1300(x105001,a61)
% 32.24/32.04 [10501]P1197(x105011)+~P1300(x105011,a29)
% 32.24/32.04 [10502]P1197(x105021)+~P1300(x105021,a30)
% 32.24/32.04 [10503]P1197(x105031)+~P1300(x105031,a91)
% 32.24/32.04 [10504]P1197(x105041)+~P1300(x105041,a92)
% 32.24/32.04 [10505]P1197(x105051)+~P1300(x105051,a31)
% 32.24/32.04 [10506]P1197(x105061)+~P1300(x105061,a32)
% 32.24/32.04 [10507]P1197(x105071)+~P1300(x105071,a33)
% 32.24/32.04 [10508]P1197(x105081)+~P1300(x105081,a34)
% 32.24/32.04 [10509]P1197(x105091)+~P1300(x105091,a35)
% 32.24/32.04 [10510]P1197(x105101)+~P1300(x105101,a36)
% 32.24/32.04 [10511]P1197(x105111)+~P1300(x105111,a37)
% 32.24/32.04 [10512]P1197(x105121)+~P1300(x105121,a38)
% 32.24/32.04 [10513]P1197(x105131)+~P1300(x105131,a40)
% 32.24/32.04 [10514]P1197(x105141)+~P1300(x105141,a41)
% 32.24/32.04 [10515]P1197(x105151)+~P1300(x105151,a42)
% 32.24/32.04 [10516]P1197(x105161)+~P1300(x105161,a43)
% 32.24/32.04 [10517]P1197(x105171)+~P1198(x105171,a27)
% 32.24/32.04 [10518]P1197(x105181)+~P1198(x105181,a26)
% 32.24/32.04 [10519]P1197(x105191)+~P1198(x105191,a28)
% 32.24/32.04 [10520]P1197(x105201)+~P1198(x105201,a39)
% 32.24/32.04 [10521]P1197(x105211)+~P1198(x105211,a62)
% 32.24/32.04 [10522]P1197(x105221)+~P1198(x105221,a50)
% 32.24/32.04 [10523]P1197(x105231)+~P1198(x105231,a83)
% 32.24/32.04 [10524]P1197(x105241)+~P1198(x105241,a61)
% 32.24/32.04 [10525]P1197(x105251)+~P1198(x105251,a29)
% 32.24/32.04 [10526]P1197(x105261)+~P1198(x105261,a30)
% 32.24/32.04 [10527]P1197(x105271)+~P1198(x105271,a91)
% 32.24/32.04 [10528]P1197(x105281)+~P1198(x105281,a92)
% 32.24/32.04 [10529]P1197(x105291)+~P1198(x105291,a31)
% 32.24/32.04 [10530]P1197(x105301)+~P1198(x105301,a32)
% 32.24/32.04 [10531]P1197(x105311)+~P1198(x105311,a33)
% 32.24/32.04 [10532]P1197(x105321)+~P1198(x105321,a34)
% 32.24/32.04 [10533]P1197(x105331)+~P1198(x105331,a35)
% 32.24/32.04 [10534]P1197(x105341)+~P1198(x105341,a36)
% 32.24/32.04 [10535]P1197(x105351)+~P1198(x105351,a37)
% 32.24/32.04 [10536]P1197(x105361)+~P1198(x105361,a38)
% 32.24/32.04 [10537]P1197(x105371)+~P1198(x105371,a40)
% 32.24/32.04 [10538]P1197(x105381)+~P1198(x105381,a41)
% 32.24/32.04 [10539]P1197(x105391)+~P1198(x105391,a42)
% 32.24/32.04 [10540]P1197(x105401)+~P1198(x105401,a43)
% 32.24/32.04 [10541]P1197(x105411)+~P1198(x105411,a44)
% 32.24/32.04 [10542]P1197(x105421)+~P1198(x105421,a45)
% 32.24/32.04 [10543]P1197(x105431)+~P1198(x105431,a46)
% 32.24/32.04 [10544]P1197(x105441)+~P1198(x105441,a47)
% 32.24/32.04 [10545]P1197(x105451)+~P1198(x105451,a48)
% 32.24/32.04 [10546]P1197(x105461)+~P1198(x105461,a49)
% 32.24/32.04 [10547]P1197(x105471)+~P1198(x105471,a51)
% 32.24/32.04 [10548]P1197(x105481)+~P1198(x105481,a52)
% 32.24/32.04 [10549]P1197(x105491)+~P1198(x105491,a53)
% 32.24/32.04 [10550]P1197(x105501)+~P1198(x105501,a54)
% 32.24/32.04 [10551]P1197(x105511)+~P1198(x105511,a55)
% 32.24/32.04 [10552]P1197(x105521)+~P1198(x105521,a56)
% 32.24/32.04 [10553]P1197(x105531)+~P1198(x105531,a57)
% 32.24/32.04 [10554]P1197(x105541)+~P1198(x105541,a58)
% 32.24/32.04 [10555]P1197(x105551)+~P1198(x105551,a59)
% 32.24/32.04 [10556]P1197(x105561)+~P1198(x105561,a60)
% 32.24/32.04 [10557]P1247(x105571)+~P1248(x105571,a27)
% 32.24/32.04 [10558]P1247(x105581)+~P1248(x105581,a26)
% 32.24/32.04 [10559]P1247(x105591)+~P1248(x105591,a28)
% 32.24/32.04 [10560]P1247(x105601)+~P1248(x105601,a39)
% 32.24/32.04 [10561]P1247(x105611)+~P1248(x105611,a62)
% 32.24/32.04 [10562]P1247(x105621)+~P1248(x105621,a50)
% 32.24/32.04 [10563]P1247(x105631)+~P1248(x105631,a83)
% 32.24/32.04 [10564]P1247(x105641)+~P1248(x105641,a61)
% 32.24/32.04 [10565]P1247(x105651)+~P1248(x105651,a29)
% 32.24/32.04 [10566]P1247(x105661)+~P1248(x105661,a30)
% 32.24/32.04 [10567]P1247(x105671)+~P1248(x105671,a91)
% 32.24/32.04 [10568]P1247(x105681)+~P1248(x105681,a92)
% 32.24/32.04 [10569]P1247(x105691)+~P1248(x105691,a31)
% 32.24/32.04 [10570]P1247(x105701)+~P1248(x105701,a32)
% 32.24/32.04 [10571]P1247(x105711)+~P1248(x105711,a33)
% 32.24/32.04 [10572]P1247(x105721)+~P1248(x105721,a34)
% 32.24/32.04 [10573]P1247(x105731)+~P1248(x105731,a35)
% 32.24/32.04 [10574]P1247(x105741)+~P1248(x105741,a36)
% 32.24/32.04 [10575]P1247(x105751)+~P1248(x105751,a37)
% 32.24/32.04 [10576]P1247(x105761)+~P1248(x105761,a38)
% 32.24/32.04 [10577]P1247(x105771)+~P1248(x105771,a40)
% 32.24/32.04 [10578]P1247(x105781)+~P1248(x105781,a41)
% 32.24/32.04 [10579]P1247(x105791)+~P1248(x105791,a42)
% 32.24/32.04 [10580]P1247(x105801)+~P1248(x105801,a43)
% 32.24/32.04 [10581]P1247(x105811)+~P1248(x105811,a44)
% 32.24/32.04 [10582]P1247(x105821)+~P1248(x105821,a45)
% 32.24/32.04 [10583]P1247(x105831)+~P1248(x105831,a46)
% 32.24/32.04 [10584]P1247(x105841)+~P1248(x105841,a47)
% 32.24/32.04 [10585]P1247(x105851)+~P1248(x105851,a48)
% 32.24/32.04 [10586]P1247(x105861)+~P1248(x105861,a49)
% 32.24/32.04 [10587]P1247(x105871)+~P1248(x105871,a51)
% 32.24/32.04 [10588]P1247(x105881)+~P1248(x105881,a52)
% 32.24/32.04 [10589]P1247(x105891)+~P1248(x105891,a53)
% 32.24/32.04 [10590]P1247(x105901)+~P1248(x105901,a54)
% 32.24/32.04 [10591]P1247(x105911)+~P1248(x105911,a55)
% 32.24/32.04 [10592]P1247(x105921)+~P1248(x105921,a56)
% 32.24/32.04 [10593]P1247(x105931)+~P1248(x105931,a57)
% 32.24/32.04 [10594]P1247(x105941)+~P1248(x105941,a58)
% 32.24/32.04 [10595]P1247(x105951)+~P1248(x105951,a59)
% 32.24/32.04 [10596]P1247(x105961)+~P1248(x105961,a60)
% 32.24/32.04 [10597]P1123(x105971)+~P1045(x105971,a27)
% 32.24/32.04 [10598]P1114(x105981)+~P1043(x105981,a91)
% 32.24/32.04 [10599]P1122(x105991)+~P1078(x105991,a92)
% 32.24/32.04 [10600]P1115(x106001)+~P1043(x106001,a61)
% 32.24/32.04 [10601]P1120(x106011)+~P1078(x106011,a62)
% 32.24/32.04 [10602]P1117(x106021)+~P1043(x106021,a39)
% 32.24/32.04 [10603]P1119(x106031)+~P1078(x106031,a28)
% 32.24/32.04 [10604]P1063(x106041)+~P1064(x106041,a27)
% 32.24/32.04 [10605]P1084(x106051)+~P1086(x106051,a34)
% 32.24/32.04 [10606]P1085(x106061)+~P1086(x106061,a33)
% 32.24/32.04 [10607]P1087(x106071)+~P1086(x106071,a32)
% 32.24/32.04 [10608]P1088(x106081)+~P1086(x106081,a31)
% 32.24/32.04 [10609]P1089(x106091)+~P1086(x106091,a30)
% 32.24/32.04 [10610]P1090(x106101)+~P1086(x106101,a29)
% 32.24/32.04 [10611]P1091(x106111)+~P1086(x106111,a91)
% 32.24/32.04 [10612]P1092(x106121)+~P1086(x106121,a92)
% 32.24/32.04 [10613]P1094(x106131)+~P1086(x106131,a83)
% 32.24/32.04 [10614]P1095(x106141)+~P1086(x106141,a61)
% 32.24/32.04 [10615]P1096(x106151)+~P1086(x106151,a62)
% 32.24/32.04 [10616]P1097(x106161)+~P1086(x106161,a50)
% 32.24/32.04 [10617]P1098(x106171)+~P1086(x106171,a39)
% 32.24/32.04 [10618]P1099(x106181)+~P1086(x106181,a28)
% 32.24/32.04 [10619]P1100(x106191)+~P1086(x106191,a27)
% 32.24/32.04 [10620]P1100(x106201)+~P1086(x106201,a26)
% 32.24/32.04 [10621]P1044(x106211)+~P1064(x106211,a26)
% 32.24/32.04 [10622]P818(x106221)+~P819(x106221,a27)
% 32.24/32.04 [10623]P825(x106231)+~P820(x106231,a27)
% 32.24/32.04 [10624]P841(x106241)+~P842(x106241,a27)
% 32.24/32.04 [10625]P837(x106251)+~P903(x106251,a27)
% 32.24/32.04 [10626]P838(x106261)+~P903(x106261,a26)
% 32.24/32.04 [10627]P789(x106271)+~P776(x106271,a27)
% 32.24/32.04 [10628]P786(x106281)+~P776(x106281,a26)
% 32.24/32.04 [10629]P779(x106291)+~P776(x106291,a28)
% 32.24/32.04 [10630]P772(x106301)+~P776(x106301,a39)
% 32.24/32.04 [10631]P791(x106311)+~P2511(x106311,a27)
% 32.24/32.04 [10632]P791(x106321)+~P2511(x106321,a26)
% 32.24/32.04 [10633]P788(x106331)+~P2511(x106331,a28)
% 32.24/32.04 [10634]P781(x106341)+~P2511(x106341,a39)
% 32.24/32.04 [10635]P773(x106351)+~P902(x106351,a50)
% 32.24/32.04 [10636]P754(x106361)+~P2093(x106361,a61)
% 32.24/32.04 [10637]P755(x106371)+~P902(x106371,a30)
% 32.24/32.04 [10638]P738(x106381)+~P2093(x106381,a30)
% 32.24/32.04 [10639]P173(x106391)+~P264(x106391,a27)
% 32.24/32.04 [10640]P173(x106401)+~P239(x106401,a27)
% 32.24/32.04 [10641]P173(x106411)+~P187(x106411,a27)
% 32.24/32.04 [10642]P173(x106421)+~P189(x106421,a27)
% 32.24/32.04 [10643]P728(x106431)+~P715(x106431,a27)
% 32.24/32.04 [10644]P724(x106441)+~P715(x106441,a26)
% 32.24/32.04 [10645]P718(x106451)+~P715(x106451,a28)
% 32.24/32.04 [10646]P705(x106461)+~P715(x106461,a39)
% 32.24/32.04 [10647]P730(x106471)+~P165(x106471,a27)
% 32.24/32.04 [10648]P730(x106481)+~P165(x106481,a26)
% 32.24/32.04 [10649]P726(x106491)+~P165(x106491,a28)
% 32.24/32.04 [10650]P720(x106501)+~P165(x106501,a39)
% 32.24/32.04 [10651]P285(x106511)+~P902(x106511,a26)
% 32.24/32.04 [10652]P685(x106521)+~P2093(x106521,a26)
% 32.24/32.04 [10653]P618(x106531)+~P2093(x106531,a27)
% 32.24/32.04 [10654]P619(x106541)+~P182(x106541,a28)
% 32.24/32.04 [10655]P619(x106551)+~P182(x106551,a50)
% 32.24/32.04 [10656]P516(x106561)+~P321(x106561,a39)
% 32.24/32.04 [10657]P482(x106571)+~P321(x106571,a27)
% 32.24/32.04 [10658]P442(x106581)+~P182(x106581,a50)
% 32.24/32.04 [10659]P440(x106591)+~P182(x106591,a28)
% 32.24/32.04 [10660]P434(x106601)+~P182(x106601,a27)
% 32.24/32.04 [10661]P470(x106611)+~P321(x106611,a28)
% 32.24/32.04 [10662]P477(x106621)+~P182(x106621,a26)
% 32.24/32.04 [10663]P458(x106631)+~P321(x106631,a26)
% 32.24/32.04 [10664]P452(x106641)+~P321(x106641,a50)
% 32.24/32.04 [10665]P453(x106651)+~P182(x106651,a39)
% 32.24/32.04 [10666]P431(x106661)+~P321(x106661,a39)
% 32.24/32.04 [10667]P421(x106671)+~P2093(x106671,a26)
% 32.24/32.04 [10668]P421(x106681)+~P2093(x106681,a83)
% 32.24/32.04 [10669]P421(x106691)+~P419(x106691,a26)
% 32.24/32.04 [10670]P323(x106701)+~P2093(x106701,a83)
% 32.24/32.04 [10671]P417(x106711)+~P2093(x106711,a26)
% 32.24/32.04 [10672]P417(x106721)+~P2093(x106721,a50)
% 32.24/32.04 [10673]P386(x106731)+~P2093(x106731,a50)
% 32.24/32.04 [10674]P378(x106741)+~P2093(x106741,a91)
% 32.24/32.04 [10675]P359(x106751)+~P2093(x106751,a92)
% 32.24/32.04 [10676]P362(x106761)+~P902(x106761,a83)
% 32.24/32.04 [10677]P339(x106771)+~P2093(x106771,a62)
% 32.24/32.04 [10678]P349(x106781)+~P902(x106781,a50)
% 32.24/32.04 [10679]P325(x106791)+~P2093(x106791,a28)
% 32.24/32.04 [10680]P326(x106801)+~P902(x106801,a26)
% 32.24/32.04 [10681]P291(x106811)+~P292(x106811,a39)
% 32.24/32.04 [10682]P288(x106821)+~P2548(x106821,a26)
% 32.24/32.04 [10683]P282(x106831)+~P283(x106831,a27)
% 32.24/32.04 [10684]P275(x106841)+~P277(x106841,a34)
% 32.24/32.04 [10685]P2556(x106851)+~P264(x106851,a26)
% 32.24/32.04 [10686]P2556(x106861)+~P239(x106861,a26)
% 32.24/32.04 [10687]P2556(x106871)+~P187(x106871,a26)
% 32.24/32.04 [10688]P2556(x106881)+~P189(x106881,a26)
% 32.24/32.04 [10689]P261(x106891)+~P245(x106891,a27)
% 32.24/32.04 [10690]P257(x106901)+~P245(x106901,a26)
% 32.24/32.04 [10691]P253(x106911)+~P245(x106911,a28)
% 32.24/32.04 [10692]P249(x106921)+~P245(x106921,a39)
% 32.24/32.04 [10693]P243(x106931)+~P245(x106931,a50)
% 32.24/32.04 [10694]P263(x106941)+~P170(x106941,a27)
% 32.24/32.04 [10695]P263(x106951)+~P170(x106951,a26)
% 32.24/32.04 [10696]P259(x106961)+~P170(x106961,a28)
% 32.24/32.04 [10697]P255(x106971)+~P170(x106971,a39)
% 32.24/32.04 [10698]P251(x106981)+~P170(x106981,a50)
% 32.24/32.04 [10699]P237(x106991)+~P196(x106991,a27)
% 32.24/32.04 [10700]P235(x107001)+~P196(x107001,a26)
% 32.24/32.04 [10701]P231(x107011)+~P196(x107011,a28)
% 32.24/32.04 [10702]P228(x107021)+~P196(x107021,a39)
% 32.24/32.04 [10703]P222(x107031)+~P196(x107031,a50)
% 32.24/32.04 [10704]P194(x107041)+~P196(x107041,a62)
% 32.24/32.04 [10705]P234(x107051)+~P183(x107051,a26)
% 32.24/32.04 [10706]P238(x107061)+~P183(x107061,a27)
% 32.24/32.04 [10707]P230(x107071)+~P183(x107071,a28)
% 32.24/32.04 [10708]P208(x107081)+~P183(x107081,a26)
% 32.24/32.04 [10709]P227(x107091)+~P183(x107091,a39)
% 32.24/32.04 [10710]P209(x107101)+~P183(x107101,a28)
% 32.24/32.04 [10711]P221(x107111)+~P183(x107111,a50)
% 32.24/32.04 [10712]P210(x107121)+~P183(x107121,a39)
% 32.24/32.04 [10713]P193(x107131)+~P183(x107131,a62)
% 32.24/32.04 [10714]P184(x107141)+~P183(x107141,a50)
% 32.24/32.04 [10715]P2590(x107151)+~P2578(x107151,a27)
% 32.24/32.04 [10716]P2587(x107161)+~P2578(x107161,a26)
% 32.24/32.04 [10717]P2581(x107171)+~P2578(x107171,a28)
% 32.24/32.04 [10718]P2574(x107181)+~P2578(x107181,a39)
% 32.24/32.04 [10719]P2592(x107191)+~P2016(x107191,a27)
% 32.24/32.04 [10720]P2592(x107201)+~P2016(x107201,a26)
% 32.24/32.04 [10721]P2589(x107211)+~P2016(x107211,a28)
% 32.24/32.04 [10722]P2583(x107221)+~P2016(x107221,a39)
% 32.24/32.04 [10723]P2543(x107231)+~P2546(x107231,a28)
% 32.24/32.04 [10724]P2525(x107241)+~P2546(x107241,a26)
% 32.24/32.04 [10725]P2535(x107251)+~P2536(x107251,a27)
% 32.24/32.04 [10726]P2535(x107261)+~P2536(x107261,a26)
% 32.24/32.04 [10727]P2535(x107271)+~P2536(x107271,a28)
% 32.24/32.04 [10728]P2494(x107281)+~P2482(x107281,a27)
% 32.24/32.04 [10729]P2491(x107291)+~P2482(x107291,a26)
% 32.24/32.04 [10730]P2485(x107301)+~P2482(x107301,a28)
% 32.24/32.04 [10731]P2477(x107311)+~P2482(x107311,a39)
% 32.24/32.04 [10732]P2496(x107321)+~P2018(x107321,a27)
% 32.24/32.04 [10733]P2496(x107331)+~P2018(x107331,a26)
% 32.24/32.04 [10734]P2493(x107341)+~P2018(x107341,a28)
% 32.24/32.04 [10735]P2487(x107351)+~P2018(x107351,a39)
% 32.24/32.04 [10736]P2281(x107361)+~P1814(x107361,a27)
% 32.24/32.04 [10737]P2285(x107371)+~P1814(x107371,a26)
% 32.24/32.04 [10738]P2389(x107381)+~P1984(x107381,a27)
% 32.24/32.04 [10739]P2165(x107391)+~P2377(x107391,a27)
% 32.24/32.04 [10740]P2165(x107401)+~P2352(x107401,a27)
% 32.24/32.04 [10741]P2165(x107411)+~P2306(x107411,a27)
% 32.24/32.04 [10742]P2165(x107421)+~P2308(x107421,a27)
% 32.24/32.04 [10743]P2052(x107431)+~P2377(x107431,a26)
% 32.24/32.04 [10744]P2052(x107441)+~P2352(x107441,a26)
% 32.24/32.04 [10745]P2052(x107451)+~P2306(x107451,a26)
% 32.24/32.04 [10746]P2052(x107461)+~P2308(x107461,a26)
% 32.24/32.04 [10747]P2374(x107471)+~P2357(x107471,a27)
% 32.24/32.04 [10748]P2371(x107481)+~P2357(x107481,a26)
% 32.24/32.04 [10749]P2366(x107491)+~P2357(x107491,a28)
% 32.24/32.04 [10750]P2364(x107501)+~P2357(x107501,a39)
% 32.24/32.04 [10751]P2356(x107511)+~P2357(x107511,a50)
% 32.24/32.04 [10752]P2376(x107521)+~P2013(x107521,a27)
% 32.24/32.04 [10753]P2376(x107531)+~P2013(x107531,a26)
% 32.24/32.04 [10754]P2373(x107541)+~P2013(x107541,a28)
% 32.24/32.04 [10755]P2368(x107551)+~P2013(x107551,a39)
% 32.24/32.04 [10756]P2362(x107561)+~P2013(x107561,a50)
% 32.24/32.04 [10757]P2350(x107571)+~P2313(x107571,a27)
% 32.24/32.04 [10758]P2348(x107581)+~P2313(x107581,a26)
% 32.24/32.04 [10759]P2338(x107591)+~P2313(x107591,a28)
% 32.24/32.04 [10760]P2335(x107601)+~P2313(x107601,a39)
% 32.24/32.04 [10761]P2330(x107611)+~P2313(x107611,a50)
% 32.24/32.04 [10762]P2312(x107621)+~P2313(x107621,a62)
% 32.24/32.04 [10763]P2347(x107631)+~P2184(x107631,a26)
% 32.24/32.04 [10764]P2351(x107641)+~P2184(x107641,a27)
% 32.24/32.04 [10765]P2337(x107651)+~P2184(x107651,a28)
% 32.24/32.04 [10766]P2316(x107661)+~P2184(x107661,a26)
% 32.24/32.04 [10767]P2334(x107671)+~P2184(x107671,a39)
% 32.24/32.04 [10768]P2317(x107681)+~P2184(x107681,a28)
% 32.24/32.04 [10769]P2329(x107691)+~P2184(x107691,a50)
% 32.24/32.04 [10770]P2318(x107701)+~P2184(x107701,a39)
% 32.24/32.04 [10771]P2311(x107711)+~P2184(x107711,a62)
% 32.24/32.04 [10772]P2300(x107721)+~P2184(x107721,a50)
% 32.24/32.04 [10773]P2280(x107731)+~P1984(x107731,a26)
% 32.24/32.04 [10774]P2189(x107741)+~P2270(x107741,a27)
% 32.24/32.04 [10775]P2189(x107751)+~P2241(x107751,a27)
% 32.24/32.04 [10776]P2189(x107761)+~P2192(x107761,a27)
% 32.24/32.04 [10777]P2189(x107771)+~P2194(x107771,a27)
% 32.24/32.04 [10778]P2175(x107781)+~P2270(x107781,a26)
% 32.24/32.04 [10779]P2175(x107791)+~P2241(x107791,a26)
% 32.24/32.04 [10780]P2175(x107801)+~P2192(x107801,a26)
% 32.24/32.04 [10781]P2175(x107811)+~P2194(x107811,a26)
% 32.24/32.04 [10782]P2264(x107821)+~P2246(x107821,a27)
% 32.24/32.04 [10783]P2261(x107831)+~P2246(x107831,a26)
% 32.24/32.04 [10784]P2255(x107841)+~P2246(x107841,a28)
% 32.24/32.04 [10785]P2251(x107851)+~P2246(x107851,a39)
% 32.24/32.04 [10786]P2245(x107861)+~P2246(x107861,a50)
% 32.24/32.04 [10787]P2266(x107871)+~P2174(x107871,a27)
% 32.24/32.04 [10788]P2266(x107881)+~P2174(x107881,a26)
% 32.24/32.04 [10789]P2263(x107891)+~P2174(x107891,a28)
% 32.24/32.04 [10790]P2257(x107901)+~P2174(x107901,a39)
% 32.24/32.04 [10791]P2253(x107911)+~P2174(x107911,a50)
% 32.24/32.04 [10792]P2239(x107921)+~P2199(x107921,a27)
% 32.24/32.04 [10793]P2237(x107931)+~P2199(x107931,a26)
% 32.24/32.04 [10794]P2233(x107941)+~P2199(x107941,a28)
% 32.24/32.04 [10795]P2230(x107951)+~P2199(x107951,a39)
% 32.24/32.04 [10796]P2224(x107961)+~P2199(x107961,a50)
% 32.24/32.04 [10797]P2198(x107971)+~P2199(x107971,a62)
% 32.24/32.04 [10798]P2236(x107981)+~P2185(x107981,a26)
% 32.24/32.04 [10799]P2240(x107991)+~P2185(x107991,a27)
% 32.24/32.04 [10800]P2232(x108001)+~P2185(x108001,a28)
% 32.24/32.04 [10801]P2210(x108011)+~P2185(x108011,a26)
% 32.24/32.04 [10802]P2229(x108021)+~P2185(x108021,a39)
% 32.24/32.04 [10803]P2211(x108031)+~P2185(x108031,a28)
% 32.24/32.04 [10804]P2223(x108041)+~P2185(x108041,a50)
% 32.24/32.04 [10805]P2212(x108051)+~P2185(x108051,a39)
% 32.24/32.04 [10806]P2197(x108061)+~P2185(x108061,a62)
% 32.24/32.04 [10807]P2186(x108071)+~P2185(x108071,a50)
% 32.24/32.04 [10808]P273(x108081)+~P1515(x108081,a26)
% 32.24/32.04 [10809]P273(x108091)+~P1310(x108091,a26)
% 32.24/32.04 [10810]P273(x108101)+~P1010(x108101,a26)
% 32.24/32.04 [10811]P273(x108111)+~P992(x108111,a26)
% 32.24/32.04 [10812]P1482(x108121)+~P1345(x108121,a27)
% 32.24/32.04 [10813]P1470(x108131)+~P1345(x108131,a26)
% 32.24/32.04 [10814]P1444(x108141)+~P1345(x108141,a28)
% 32.24/32.04 [10815]P1354(x108151)+~P1345(x108151,a39)
% 32.24/32.04 [10816]P1503(x108161)+~P244(x108161,a27)
% 32.24/32.04 [10817]P1503(x108171)+~P244(x108171,a26)
% 32.24/32.04 [10818]P1468(x108181)+~P244(x108181,a28)
% 32.24/32.04 [10819]P1427(x108191)+~P244(x108191,a39)
% 32.24/32.04 [10820]P1278(x108201)+~P1041(x108201,a27)
% 32.24/32.04 [10821]P1258(x108211)+~P1041(x108211,a26)
% 32.24/32.04 [10822]P1215(x108221)+~P1041(x108221,a28)
% 32.24/32.04 [10823]P1168(x108231)+~P1041(x108231,a39)
% 32.24/32.04 [10824]P1051(x108241)+~P1041(x108241,a50)
% 32.24/32.04 [10825]P1269(x108251)+~P1065(x108251,a26)
% 32.24/32.04 [10826]P1285(x108261)+~P1065(x108261,a27)
% 32.24/32.04 [10827]P1224(x108271)+~P1065(x108271,a28)
% 32.24/32.04 [10828]P1113(x108281)+~P1065(x108281,a26)
% 32.24/32.04 [10829]P1180(x108291)+~P1065(x108291,a39)
% 32.24/32.04 [10830]P1080(x108301)+~P1065(x108301,a28)
% 32.24/32.04 [10831]P1061(x108311)+~P1065(x108311,a50)
% 32.24/32.04 [10832]P1066(x108321)+~P1065(x108321,a39)
% 32.24/32.04 [10833]P753(x108331)+~P766(x108331,a28)
% 32.24/32.04 [10834]P792(x108341)+~P766(x108341,a27)
% 32.24/32.04 [10835]P792(x108351)+~P766(x108351,a26)
% 32.24/32.04 [10836]P3(x108361)+~P20(a10,x108361)
% 32.24/32.04 [10837]P4(x108371)+~P20(a11,x108371)
% 32.24/32.04 [10838]P5(x108381)+~P20(a12,x108381)
% 32.24/32.04 [10839]P6(x108391)+~P20(a13,x108391)
% 32.24/32.04 [10840]P7(x108401)+~P20(a14,x108401)
% 32.24/32.04 [10841]P8(x108411)+~P20(a15,x108411)
% 32.24/32.04 [10842]P9(x108421)+~P20(a16,x108421)
% 32.24/32.04 [10843]P10(x108431)+~P20(a17,x108431)
% 32.24/32.04 [10844]P11(x108441)+~P20(a18,x108441)
% 32.24/32.04 [10845]P12(x108451)+~P20(a19,x108451)
% 32.24/32.04 [10846]P13(x108461)+~P20(a20,x108461)
% 32.24/32.04 [10847]P55(x108471)+~P20(a25,x108471)
% 32.24/32.04 [10848]P39(x108481)+~P20(a23,x108481)
% 32.24/32.04 [10849]P14(x108491)+~P20(a21,x108491)
% 32.24/32.04 [10850]P42(x108501)+~P20(a24,x108501)
% 32.24/32.04 [10851]P17(x108511)+~P20(a22,x108511)
% 32.24/32.04 [10862]~P2160(x108621)+~P2150(x108621,a39)
% 32.24/32.04 [10863]~P2163(x108631)+~P2150(x108631,a28)
% 32.24/32.04 [10864]~P2164(x108641)+~P2150(x108641,a26)
% 32.24/32.04 [10865]~P2125(x108651)+~P2478(x108651,a26)
% 32.24/32.04 [10866]~P2137(x108661)+~P2478(x108661,a27)
% 32.24/32.04 [10867]~P2138(x108671)+~P2478(x108671,a26)
% 32.24/32.04 [10868]~P2135(x108681)+~P2478(x108681,a28)
% 32.24/32.04 [10869]~P2069(x108691)+~P2068(x108691,a27)
% 32.24/32.04 [10870]~P2069(x108701)+~P2068(x108701,a26)
% 32.24/32.04 [10871]~P2067(x108711)+~P2066(x108711,a26)
% 32.24/32.04 [10872]~P2072(x108721)+~P2071(x108721,a27)
% 32.24/32.04 [10873]~P2060(x108731)+~P2003(x108731,a27)
% 32.24/32.04 [10874]~P2060(x108741)+~P2003(x108741,a26)
% 32.24/32.04 [10875]~P2059(x108751)+~P2003(x108751,a26)
% 32.24/32.04 [10876]~P2042(x108761)+~P2003(x108761,a27)
% 32.24/32.04 [10877]~P2042(x108771)+~P2003(x108771,a26)
% 32.24/32.04 [10878]~P2051(x108781)+~P2003(x108781,a26)
% 32.24/32.04 [10879]~P2000(x108791)+~P2093(x108791,a91)
% 32.24/32.04 [10880]~P1822(x108801)+~P1821(x108801,a27)
% 32.24/32.04 [10881]~P1822(x108811)+~P1821(x108811,a26)
% 32.24/32.04 [10882]~P1820(x108821)+~P1819(x108821,a26)
% 32.24/32.04 [10883]~P1868(x108831)+~P1867(x108831,a27)
% 32.24/32.04 [10884]~P1888(x108841)+~P1740(x108841,a27)
% 32.24/32.04 [10885]~P1889(x108851)+~P1740(x108851,a26)
% 32.24/32.04 [10886]~P1886(x108861)+~P1740(x108861,a28)
% 32.24/32.04 [10887]~P1882(x108871)+~P1740(x108871,a39)
% 32.24/32.04 [10888]~P1878(x108881)+~P1740(x108881,a50)
% 32.24/32.04 [10889]~P1865(x108891)+~P1815(x108891,a27)
% 32.24/32.04 [10890]~P1845(x108901)+~P1815(x108901,a26)
% 32.24/32.04 [10891]~P1847(x108911)+~P1815(x108911,a28)
% 32.24/32.04 [10892]~P1848(x108921)+~P1815(x108921,a39)
% 32.24/32.04 [10893]~P1851(x108931)+~P1815(x108931,a50)
% 32.24/32.04 [10894]~P1853(x108941)+~P1815(x108941,a62)
% 32.24/32.04 [10895]~P1781(x108951)+~P1741(x108951,a27)
% 32.24/32.04 [10896]~P1781(x108961)+~P1741(x108961,a26)
% 32.24/32.04 [10897]~P1794(x108971)+~P1741(x108971,a26)
% 32.24/32.04 [10898]~P1794(x108981)+~P1741(x108981,a28)
% 32.24/32.04 [10899]~P1790(x108991)+~P1741(x108991,a27)
% 32.24/32.04 [10900]~P1790(x109001)+~P1741(x109001,a28)
% 32.24/32.04 [10901]~P1739(x109011)+~P1009(x109011,a27)
% 32.24/32.04 [10902]~P1737(x109021)+~P1009(x109021,a26)
% 32.24/32.04 [10903]~P1644(x109031)+~P1009(x109031,a27)
% 32.24/32.04 [10904]~P1644(x109041)+~P1009(x109041,a26)
% 32.24/32.04 [10905]~P1643(x109051)+~P1009(x109051,a26)
% 32.24/32.04 [10906]~P1658(x109061)+~P1009(x109061,a27)
% 32.24/32.04 [10907]~P1714(x109071)+~P1716(x109071,a50)
% 32.24/32.04 [10908]~P1718(x109081)+~P1716(x109081,a39)
% 32.24/32.04 [10909]~P1721(x109091)+~P1716(x109091,a28)
% 32.24/32.04 [10910]~P1724(x109101)+~P1716(x109101,a26)
% 32.24/32.04 [10911]~P1726(x109111)+~P1716(x109111,a27)
% 32.24/32.04 [10912]~P1562(x109121)+~P1033(x109121,a27)
% 32.24/32.04 [10913]~P1635(x109131)+~P1591(x109131,a27)
% 32.24/32.04 [10914]~P1553(x109141)+~P1033(x109141,a50)
% 32.24/32.04 [10915]~P1627(x109151)+~P1591(x109151,a50)
% 32.24/32.04 [10916]~P1557(x109161)+~P1033(x109161,a39)
% 32.24/32.04 [10917]~P1631(x109171)+~P1591(x109171,a39)
% 32.24/32.04 [10918]~P1563(x109181)+~P1033(x109181,a28)
% 32.24/32.04 [10919]~P1636(x109191)+~P1591(x109191,a28)
% 32.24/32.04 [10920]~P1567(x109201)+~P1033(x109201,a26)
% 32.24/32.04 [10921]~P1640(x109211)+~P1591(x109211,a26)
% 32.24/32.04 [10922]~P1608(x109221)+~P1009(x109221,a27)
% 32.24/32.04 [10923]~P1598(x109231)+~P1009(x109231,a27)
% 32.24/32.04 [10924]~P1595(x109241)+~P1009(x109241,a26)
% 32.24/32.04 [10925]~P1505(x109251)+~P562(x109251,a27)
% 32.24/32.04 [10926]~P1507(x109261)+~P472(x109261,a26)
% 32.24/32.04 [10927]~P1507(x109271)+~P472(x109271,a28)
% 32.24/32.04 [10928]~P1486(x109281)+~P562(x109281,a27)
% 32.24/32.04 [10929]~P1454(x109291)+~P562(x109291,a27)
% 32.24/32.04 [10930]~P1498(x109301)+~P562(x109301,a27)
% 32.24/32.04 [10931]~P1498(x109311)+~P562(x109311,a26)
% 32.24/32.04 [10932]~P1500(x109321)+~P562(x109321,a27)
% 32.24/32.04 [10933]~P1500(x109331)+~P562(x109331,a26)
% 32.24/32.04 [10934]~P1501(x109341)+~P562(x109341,a27)
% 32.24/32.04 [10935]~P1501(x109351)+~P562(x109351,a26)
% 32.24/32.04 [10936]~P1502(x109361)+~P562(x109361,a27)
% 32.24/32.04 [10937]~P1502(x109371)+~P562(x109371,a26)
% 32.24/32.04 [10938]~P1494(x109381)+~P562(x109381,a27)
% 32.24/32.04 [10939]~P1494(x109391)+~P562(x109391,a26)
% 32.24/32.04 [10940]~P1495(x109401)+~P562(x109401,a27)
% 32.24/32.04 [10941]~P1495(x109411)+~P562(x109411,a26)
% 32.24/32.04 [10942]~P1493(x109421)+~P472(x109421,a27)
% 32.24/32.04 [10943]~P1428(x109431)+~P1366(x109431,a39)
% 32.24/32.04 [10944]~P1429(x109441)+~P1366(x109441,a28)
% 32.24/32.04 [10945]~P1421(x109451)+~P1366(x109451,a26)
% 32.24/32.04 [10946]~P1367(x109461)+~P1366(x109461,a27)
% 32.24/32.04 [10947]~P1382(x109471)+~P1355(x109471,a27)
% 32.24/32.04 [10948]~P1383(x109481)+~P1355(x109481,a26)
% 32.24/32.04 [10949]~P1384(x109491)+~P1355(x109491,a28)
% 32.24/32.04 [10950]~P1386(x109501)+~P1355(x109501,a39)
% 32.24/32.04 [10951]~P1154(x109511)+~P1146(x109511,a27)
% 32.24/32.04 [10952]~P1163(x109521)+~P1146(x109521,a26)
% 32.24/32.04 [10953]~P1173(x109531)+~P1146(x109531,a28)
% 32.24/32.04 [10954]~P1197(x109541)+~P1146(x109541,a39)
% 32.24/32.04 [10955]~P1247(x109551)+~P1146(x109551,a50)
% 32.24/32.04 [10956]~P1137(x109561)+~P472(x109561,a27)
% 32.24/32.04 [10957]~P1026(x109571)+~P2445(x109571,a27)
% 32.24/32.04 [10958]~P1028(x109581)+~P2445(x109581,a26)
% 32.24/32.04 [10959]~P1030(x109591)+~P2445(x109591,a27)
% 32.24/32.04 [10960]~P1030(x109601)+~P2445(x109601,a26)
% 32.24/32.04 [10961]~P1031(x109611)+~P2445(x109611,a27)
% 32.24/32.04 [10962]~P1031(x109621)+~P2445(x109621,a26)
% 32.24/32.04 [10963]~P1031(x109631)+~P2445(x109631,a28)
% 32.24/32.04 [10964]~P1032(x109641)+~P2445(x109641,a26)
% 32.24/32.04 [10965]~P1032(x109651)+~P2445(x109651,a28)
% 32.24/32.04 [10966]~P1014(x109661)+~P2445(x109661,a26)
% 32.24/32.04 [10967]~P1014(x109671)+~P2445(x109671,a39)
% 32.24/32.04 [10968]~P1016(x109681)+~P2445(x109681,a27)
% 32.24/32.04 [10969]~P1016(x109691)+~P2445(x109691,a26)
% 32.24/32.04 [10970]~P1016(x109701)+~P2445(x109701,a39)
% 32.24/32.04 [10971]~P1017(x109711)+~P2445(x109711,a27)
% 32.24/32.04 [10972]~P1017(x109721)+~P2445(x109721,a26)
% 32.24/32.04 [10973]~P1017(x109731)+~P2445(x109731,a28)
% 32.24/32.04 [10974]~P1017(x109741)+~P2445(x109741,a39)
% 32.24/32.04 [10975]~P1019(x109751)+~P2445(x109751,a26)
% 32.24/32.04 [10976]~P1019(x109761)+~P2445(x109761,a28)
% 32.24/32.04 [10977]~P1019(x109771)+~P2445(x109771,a39)
% 32.24/32.04 [10978]~P978(x109781)+~P903(x109781,a27)
% 32.24/32.04 [10979]~P978(x109791)+~P903(x109791,a26)
% 32.24/32.04 [10980]~P997(x109801)+~P903(x109801,a26)
% 32.24/32.04 [10981]~P997(x109811)+~P903(x109811,a28)
% 32.24/32.04 [10982]~P990(x109821)+~P903(x109821,a27)
% 32.24/32.04 [10983]~P990(x109831)+~P903(x109831,a28)
% 32.24/32.04 [10984]~P798(x109841)+~P2445(x109841,a27)
% 32.24/32.04 [10985]~P798(x109851)+~P2445(x109851,a39)
% 32.24/32.04 [10986]~P799(x109861)+~P2445(x109861,a39)
% 32.24/32.04 [10987]~P789(x109871)+~P2511(x109871,a27)
% 32.24/32.04 [10988]~P790(x109881)+~P2511(x109881,a26)
% 32.24/32.04 [10989]~P787(x109891)+~P2511(x109891,a28)
% 32.24/32.04 [10990]~P780(x109901)+~P2511(x109901,a39)
% 32.24/32.04 [10991]~P722(x109911)+~P2548(x109911,a26)
% 32.24/32.04 [10992]~P728(x109921)+~P165(x109921,a27)
% 32.24/32.04 [10993]~P729(x109931)+~P165(x109931,a26)
% 32.24/32.04 [10994]~P725(x109941)+~P165(x109941,a28)
% 32.24/32.04 [10995]~P719(x109951)+~P165(x109951,a39)
% 32.24/32.04 [10996]~P542(x109961)+~P312(x109961,a27)
% 32.24/32.04 [10997]~P542(x109971)+~P312(x109971,a26)
% 32.24/32.04 [10998]~P542(x109981)+~P312(x109981,a28)
% 32.24/32.04 [10999]~P542(x109991)+~P312(x109991,a39)
% 32.24/32.04 [11000]~P555(x110001)+~P312(x110001,a27)
% 32.24/32.04 [11001]~P555(x110011)+~P312(x110011,a26)
% 32.24/32.04 [11002]~P556(x110021)+~P312(x110021,a28)
% 32.24/32.04 [11003]~P557(x110031)+~P312(x110031,a27)
% 32.24/32.04 [11004]~P557(x110041)+~P312(x110041,a28)
% 32.24/32.04 [11005]~P558(x110051)+~P312(x110051,a26)
% 32.24/32.04 [11006]~P558(x110061)+~P312(x110061,a28)
% 32.24/32.04 [11007]~P548(x110071)+~P312(x110071,a27)
% 32.24/32.04 [11008]~P548(x110081)+~P312(x110081,a26)
% 32.24/32.04 [11009]~P548(x110091)+~P312(x110091,a39)
% 32.24/32.04 [11010]~P602(x110101)+~P503(x110101,a26)
% 32.24/32.04 [11011]~P602(x110111)+~P503(x110111,a39)
% 32.24/32.04 [11012]~P603(x110121)+~P503(x110121,a26)
% 32.24/32.04 [11013]~P563(x110131)+~P312(x110131,a26)
% 32.24/32.04 [11014]~P553(x110141)+~P312(x110141,a26)
% 32.24/32.04 [11015]~P553(x110151)+~P312(x110151,a39)
% 32.24/32.04 [11016]~P549(x110161)+~P312(x110161,a28)
% 32.24/32.04 [11017]~P549(x110171)+~P312(x110171,a39)
% 32.24/32.04 [11018]~P551(x110181)+~P312(x110181,a27)
% 32.24/32.04 [11019]~P551(x110191)+~P312(x110191,a28)
% 32.24/32.04 [11020]~P551(x110201)+~P312(x110201,a39)
% 32.24/32.04 [11021]~P552(x110211)+~P312(x110211,a26)
% 32.24/32.04 [11022]~P552(x110221)+~P312(x110221,a28)
% 32.24/32.04 [11023]~P552(x110231)+~P312(x110231,a39)
% 32.24/32.04 [11024]~P518(x110241)+~P321(x110241,a39)
% 32.24/32.04 [11025]~P502(x110251)+~P321(x110251,a27)
% 32.24/32.04 [11026]~P466(x110261)+~P418(x110261,a27)
% 32.24/32.04 [11027]~P435(x110271)+~P418(x110271,a26)
% 32.24/32.04 [11028]~P276(x110281)+~P2548(x110281,a26)
% 32.24/32.04 [11029]~P190(x110291)+~P189(x110291,a27)
% 32.24/32.04 [11030]~P190(x110301)+~P189(x110301,a26)
% 32.24/32.04 [11031]~P188(x110311)+~P187(x110311,a26)
% 32.24/32.04 [11032]~P240(x110321)+~P239(x110321,a27)
% 32.24/32.04 [11033]~P261(x110331)+~P170(x110331,a27)
% 32.24/32.04 [11034]~P262(x110341)+~P170(x110341,a26)
% 32.24/32.04 [11035]~P258(x110351)+~P170(x110351,a28)
% 32.24/32.04 [11036]~P254(x110361)+~P170(x110361,a39)
% 32.24/32.04 [11037]~P250(x110371)+~P170(x110371,a50)
% 32.24/32.04 [11038]~P237(x110381)+~P183(x110381,a27)
% 32.24/32.04 [11039]~P217(x110391)+~P183(x110391,a26)
% 32.24/32.04 [11040]~P219(x110401)+~P183(x110401,a28)
% 32.24/32.04 [11041]~P220(x110411)+~P183(x110411,a39)
% 32.24/32.04 [11042]~P223(x110421)+~P183(x110421,a50)
% 32.24/32.04 [11043]~P225(x110431)+~P183(x110431,a62)
% 32.24/32.04 [11044]~P2590(x110441)+~P2016(x110441,a27)
% 32.24/32.04 [11045]~P2591(x110451)+~P2016(x110451,a26)
% 32.24/32.04 [11046]~P2588(x110461)+~P2016(x110461,a28)
% 32.24/32.04 [11047]~P2582(x110471)+~P2016(x110471,a39)
% 32.24/32.04 [11048]~P2494(x110481)+~P2018(x110481,a27)
% 32.24/32.04 [11049]~P2495(x110491)+~P2018(x110491,a26)
% 32.24/32.04 [11050]~P2492(x110501)+~P2018(x110501,a28)
% 32.24/32.04 [11051]~P2486(x110511)+~P2018(x110511,a39)
% 32.24/32.04 [11052]~P2309(x110521)+~P2308(x110521,a27)
% 32.24/32.04 [11053]~P2309(x110531)+~P2308(x110531,a26)
% 32.24/32.04 [11054]~P2307(x110541)+~P2306(x110541,a26)
% 32.24/32.04 [11055]~P2353(x110551)+~P2352(x110551,a27)
% 32.24/32.04 [11056]~P2374(x110561)+~P2013(x110561,a27)
% 32.24/32.04 [11057]~P2375(x110571)+~P2013(x110571,a26)
% 32.24/32.04 [11058]~P2372(x110581)+~P2013(x110581,a28)
% 32.24/32.04 [11059]~P2367(x110591)+~P2013(x110591,a39)
% 32.24/32.04 [11060]~P2361(x110601)+~P2013(x110601,a50)
% 32.24/32.04 [11061]~P2350(x110611)+~P2184(x110611,a27)
% 32.24/32.04 [11062]~P2325(x110621)+~P2184(x110621,a26)
% 32.24/32.04 [11063]~P2327(x110631)+~P2184(x110631,a28)
% 32.24/32.04 [11064]~P2328(x110641)+~P2184(x110641,a39)
% 32.24/32.04 [11065]~P2331(x110651)+~P2184(x110651,a50)
% 32.24/32.04 [11066]~P2333(x110661)+~P2184(x110661,a62)
% 32.24/32.04 [11067]~P2195(x110671)+~P2194(x110671,a27)
% 32.24/32.04 [11068]~P2195(x110681)+~P2194(x110681,a26)
% 32.24/32.04 [11069]~P2193(x110691)+~P2192(x110691,a26)
% 32.24/32.04 [11070]~P2242(x110701)+~P2241(x110701,a27)
% 32.24/32.04 [11071]~P2264(x110711)+~P2174(x110711,a27)
% 32.24/32.04 [11072]~P2265(x110721)+~P2174(x110721,a26)
% 32.24/32.04 [11073]~P2262(x110731)+~P2174(x110731,a28)
% 32.24/32.04 [11074]~P2256(x110741)+~P2174(x110741,a39)
% 32.24/32.04 [11075]~P2252(x110751)+~P2174(x110751,a50)
% 32.24/32.04 [11076]~P2239(x110761)+~P2185(x110761,a27)
% 32.24/32.04 [11077]~P2219(x110771)+~P2185(x110771,a26)
% 32.24/32.04 [11078]~P2221(x110781)+~P2185(x110781,a28)
% 32.24/32.04 [11079]~P2222(x110791)+~P2185(x110791,a39)
% 32.24/32.04 [11080]~P2225(x110801)+~P2185(x110801,a50)
% 32.24/32.04 [11081]~P2227(x110811)+~P2185(x110811,a62)
% 32.24/32.04 [11082]~P2169(x110821)+~P2082(x110821,a92)
% 32.24/32.04 [11083]~P226(x110831)+~P244(x110831,a27)
% 32.24/32.04 [11084]~P226(x110841)+~P244(x110841,a26)
% 32.24/32.04 [11085]~P226(x110851)+~P244(x110851,a28)
% 32.24/32.04 [11086]~P226(x110861)+~P244(x110861,a39)
% 32.24/32.04 [11087]~P979(x110871)+~P992(x110871,a27)
% 32.24/32.04 [11088]~P979(x110881)+~P992(x110881,a26)
% 32.24/32.04 [11089]~P1004(x110891)+~P1010(x110891,a26)
% 32.24/32.04 [11090]~P1301(x110901)+~P1310(x110901,a27)
% 32.24/32.04 [11091]~P1334(x110911)+~P244(x110911,a27)
% 32.24/32.04 [11092]~P1334(x110921)+~P244(x110921,a39)
% 32.24/32.04 [11093]~P1482(x110931)+~P244(x110931,a27)
% 32.24/32.04 [11094]~P1492(x110941)+~P244(x110941,a26)
% 32.24/32.04 [11095]~P1456(x110951)+~P244(x110951,a28)
% 32.24/32.04 [11096]~P1420(x110961)+~P244(x110961,a39)
% 32.24/32.04 [11097]~P1025(x110971)+~P244(x110971,a27)
% 32.24/32.04 [11098]~P1025(x110981)+~P244(x110981,a26)
% 32.24/32.04 [11099]~P1025(x110991)+~P244(x110991,a28)
% 32.24/32.04 [11100]~P1025(x111001)+~P244(x111001,a39)
% 32.24/32.04 [11101]~P1278(x111011)+~P1065(x111011,a27)
% 32.24/32.04 [11102]~P1133(x111021)+~P1065(x111021,a26)
% 32.24/32.04 [11103]~P1139(x111031)+~P1065(x111031,a28)
% 32.24/32.04 [11104]~P1142(x111041)+~P1065(x111041,a39)
% 32.24/32.04 [11105]~P1153(x111051)+~P1065(x111051,a50)
% 32.24/32.04 [11106]~P707(x111061)+~P562(x111061,a26)
% 32.24/32.04 [11107]~P697(x111071)+~P562(x111071,a26)
% 32.24/32.04 [11108]~P702(x111081)+~P562(x111081,a26)
% 32.24/32.04 [11109]~P672(x111091)+~P562(x111091,a27)
% 32.24/32.04 [11110]~P672(x111101)+~P562(x111101,a26)
% 32.24/32.04 [11111]~P682(x111111)+~P562(x111111,a27)
% 32.24/32.04 [11112]~P682(x111121)+~P562(x111121,a26)
% 32.24/32.04 [11113]~P97(x111131)+~P1740(x111131,a27)
% 32.24/32.04 [11114]~P97(x111141)+~P1740(x111141,a26)
% 32.24/32.04 [11115]~P97(x111151)+~P1740(x111151,a28)
% 32.24/32.04 [11116]~P97(x111161)+~P1740(x111161,a39)
% 32.24/32.04 [11117]~P97(x111171)+~P1740(x111171,a50)
% 32.24/32.04 [11118]~P101(x111181)+~P1740(x111181,a27)
% 32.24/32.04 [11119]~P101(x111191)+~P1740(x111191,a26)
% 32.24/32.04 [11120]~P101(x111201)+~P1740(x111201,a28)
% 32.24/32.04 [11121]~P101(x111211)+~P1740(x111211,a39)
% 32.24/32.04 [11122]~P109(x111221)+~P1033(x111221,a27)
% 32.24/32.04 [11123]~P109(x111231)+~P1033(x111231,a26)
% 32.24/32.04 [11124]~P109(x111241)+~P1033(x111241,a28)
% 32.24/32.04 [11125]~P109(x111251)+~P1033(x111251,a39)
% 32.24/32.04 [11126]~P109(x111261)+~P1033(x111261,a50)
% 32.24/32.04 [11127]~P111(x111271)+~P562(x111271,a28)
% 32.24/32.04 [11128]~P111(x111281)+~P562(x111281,a62)
% 32.24/32.04 [11129]~P111(x111291)+~P562(x111291,a50)
% 32.24/32.04 [11130]~P112(x111301)+~P562(x111301,a28)
% 32.24/32.04 [11131]~P69(x111311)+~P562(x111311,a28)
% 32.24/32.04 [11132]~P69(x111321)+~P562(x111321,a39)
% 32.24/32.04 [11133]~P70(x111331)+~P562(x111331,a28)
% 32.24/32.04 [11134]~P70(x111341)+~P562(x111341,a39)
% 32.24/32.04 [11135]~P70(x111351)+~P562(x111351,a62)
% 32.24/32.04 [11136]~P71(x111361)+~P562(x111361,a28)
% 32.24/32.04 [11137]~P71(x111371)+~P562(x111371,a62)
% 32.24/32.04 [11138]~P72(x111381)+~P562(x111381,a28)
% 32.24/32.04 [11139]~P72(x111391)+~P562(x111391,a39)
% 32.24/32.04 [11140]~P72(x111401)+~P562(x111401,a50)
% 32.24/32.04 [11141]~P73(x111411)+~P562(x111411,a28)
% 32.24/32.04 [11142]~P73(x111421)+~P562(x111421,a39)
% 32.24/32.04 [11143]~P73(x111431)+~P562(x111431,a62)
% 32.24/32.04 [11144]~P73(x111441)+~P562(x111441,a50)
% 32.24/32.04 [11145]~P74(x111451)+~P562(x111451,a28)
% 32.24/32.04 [11146]~P74(x111461)+~P562(x111461,a62)
% 32.24/32.04 [11147]~P74(x111471)+~P562(x111471,a50)
% 32.24/32.04 [11148]~P74(x111481)+~P562(x111481,a61)
% 32.24/32.04 [11149]~P76(x111491)+~P913(x111491,a42)
% 32.24/32.04 [11150]~P76(x111501)+~P913(x111501,a43)
% 32.24/32.04 [11151]~P76(x111511)+~P913(x111511,a44)
% 32.24/32.04 [11152]~P76(x111521)+~P913(x111521,a45)
% 32.24/32.04 [11153]~P76(x111531)+~P913(x111531,a46)
% 32.24/32.04 [11154]~P77(x111541)+~P913(x111541,a40)
% 32.24/32.04 [11155]~P77(x111551)+~P913(x111551,a41)
% 32.24/32.04 [11156]~P79(x111561)+~P913(x111561,a31)
% 32.24/32.04 [11157]~P79(x111571)+~P913(x111571,a34)
% 32.24/32.04 [11158]~P79(x111581)+~P913(x111581,a35)
% 32.24/32.04 [11159]~P80(x111591)+~P913(x111591,a83)
% 32.24/32.04 [11160]~P80(x111601)+~P913(x111601,a29)
% 32.24/32.04 [11161]~P80(x111611)+~P913(x111611,a91)
% 32.24/32.04 [11162]~P80(x111621)+~P913(x111621,a92)
% 32.24/32.04 [11163]~P82(x111631)+~P913(x111631,a28)
% 32.24/32.04 [11164]~P82(x111641)+~P913(x111641,a39)
% 32.24/32.04 [11165]~P82(x111651)+~P913(x111651,a62)
% 32.24/32.04 [11166]~P82(x111661)+~P913(x111661,a50)
% 32.24/32.04 [11167]~P82(x111671)+~P913(x111671,a61)
% 32.24/32.04 [11168]~P78(x111681)+~P913(x111681,a36)
% 32.24/32.04 [11169]~P78(x111691)+~P913(x111691,a40)
% 32.24/32.04 [11170]~P78(x111701)+~P913(x111701,a41)
% 32.24/32.04 [11171]~P83(x111711)+~P913(x111711,a31)
% 32.24/32.04 [11172]~P83(x111721)+~P913(x111721,a34)
% 32.24/32.04 [11173]~P83(x111731)+~P913(x111731,a35)
% 32.24/32.04 [11174]~P84(x111741)+~P913(x111741,a83)
% 32.24/32.04 [11175]~P84(x111751)+~P913(x111751,a29)
% 32.24/32.04 [11176]~P84(x111761)+~P913(x111761,a91)
% 32.24/32.04 [11177]~P84(x111771)+~P913(x111771,a92)
% 32.24/32.04 [11178]~P85(x111781)+~P913(x111781,a28)
% 32.24/32.04 [11179]~P85(x111791)+~P913(x111791,a39)
% 32.24/32.04 [11180]~P85(x111801)+~P913(x111801,a62)
% 32.24/32.04 [11181]~P85(x111811)+~P913(x111811,a50)
% 32.24/32.04 [11182]~P85(x111821)+~P913(x111821,a61)
% 32.24/32.04 [11183]~P98(x111831)+~P170(x111831,a27)
% 32.24/32.04 [11184]~P98(x111841)+~P170(x111841,a26)
% 32.24/32.04 [11185]~P98(x111851)+~P170(x111851,a28)
% 32.24/32.04 [11186]~P98(x111861)+~P170(x111861,a39)
% 32.24/32.04 [11187]~P98(x111871)+~P170(x111871,a50)
% 32.24/32.04 [11188]~P99(x111881)+~P170(x111881,a27)
% 32.24/32.04 [11189]~P99(x111891)+~P170(x111891,a26)
% 32.24/32.04 [11190]~P99(x111901)+~P170(x111901,a28)
% 32.24/32.04 [11191]~P99(x111911)+~P170(x111911,a39)
% 32.24/32.04 [11192]~P100(x111921)+~P2013(x111921,a27)
% 32.24/32.04 [11193]~P100(x111931)+~P2013(x111931,a26)
% 32.24/32.04 [11194]~P100(x111941)+~P2013(x111941,a28)
% 32.24/32.04 [11195]~P100(x111951)+~P2013(x111951,a39)
% 32.24/32.04 [11196]~P100(x111961)+~P2013(x111961,a50)
% 32.24/32.04 [11197]~P102(x111971)+~P2013(x111971,a50)
% 32.24/32.04 [11198]~P103(x111981)+~P2174(x111981,a27)
% 32.24/32.04 [11199]~P103(x111991)+~P2174(x111991,a26)
% 32.24/32.04 [11200]~P103(x112001)+~P2174(x112001,a28)
% 32.24/32.04 [11201]~P103(x112011)+~P2174(x112011,a39)
% 32.24/32.04 [11202]~P103(x112021)+~P2174(x112021,a50)
% 32.24/32.04 [11203]~P104(x112031)+~P2174(x112031,a50)
% 32.24/32.04 [11204]~P106(x112041)+~P562(x112041,a28)
% 32.24/32.04 [11205]~P106(x112051)+~P562(x112051,a39)
% 32.24/32.04 [11206]~P106(x112061)+~P562(x112061,a50)
% 32.24/32.04 [11207]~P106(x112071)+~P562(x112071,a61)
% 32.24/32.04 [11208]~P107(x112081)+~P562(x112081,a28)
% 32.24/32.04 [11209]~P107(x112091)+~P562(x112091,a39)
% 32.24/32.04 [11210]~P107(x112101)+~P562(x112101,a62)
% 32.24/32.04 [11211]~P107(x112111)+~P562(x112111,a50)
% 32.24/32.04 [11212]~P107(x112121)+~P562(x112121,a61)
% 32.24/32.04 [11213]~P105(x112131)+~P406(x112131,a27)
% 32.24/32.04 [11214]~P105(x112141)+~P406(x112141,a26)
% 32.24/32.04 [11215]~P105(x112151)+~P406(x112151,a28)
% 32.24/32.04 [11216]~P105(x112161)+~P406(x112161,a39)
% 32.24/32.04 [11217]~P105(x112171)+~P406(x112171,a50)
% 32.24/32.04 [11218]~P129(x112181)+~P165(a9,x112181)
% 32.24/32.04 [11219]~P129(x112191)+~P2511(a9,x112191)
% 32.24/32.04 [11220]~P129(x112201)+~P2321(a9,x112201)
% 32.24/32.04 [11221]~P129(x112211)+~P312(a9,x112211)
% 32.24/32.04 [11222]~P129(x112221)+~P244(a9,x112221)
% 32.24/32.04 [11223]~P129(x112231)+~P535(a9,x112231)
% 32.24/32.04 [11224]~P115(x112241)+~P2003(a9,x112241)
% 32.24/32.04 [11225]~P115(x112251)+~P1009(a9,x112251)
% 32.24/32.04 [11226]~P137(x112261)+~P1033(a9,x112261)
% 32.24/32.04 [11227]~P137(x112271)+~P1591(a9,x112271)
% 32.24/32.04 [11228]~P137(x112281)+~P1146(a9,x112281)
% 32.24/32.04 [11229]~P137(x112291)+~P2013(a9,x112291)
% 32.24/32.04 [11230]~P137(x112301)+~P2174(a9,x112301)
% 32.24/32.04 [11231]~P137(x112311)+~P406(a9,x112311)
% 32.24/32.04 [11232]~P127(x112321)+~P920(a9,x112321)
% 32.24/32.04 [11399]~P709(x113991,a27)+P902(x113991,a26)
% 32.24/32.04 [11400]~P333(x114001,a26)+P902(x114001,a28)
% 32.24/32.04 [11401]~P342(x114011,a28)+P902(x114011,a39)
% 32.24/32.04 [11402]~P353(x114021,a50)+P902(x114021,a62)
% 32.24/32.04 [11403]~P345(x114031,a39)+P902(x114031,a50)
% 32.24/32.04 [11404]~P2127(x114041,a61)+P902(x114041,a83)
% 32.24/32.04 [11405]~P356(x114051,a62)+P902(x114051,a61)
% 32.24/32.04 [11406]~P1915(x114061,a91)+P902(x114061,a29)
% 32.24/32.04 [11407]~P757(x114071,a29)+P902(x114071,a30)
% 32.24/32.04 [11408]~P389(x114081,a92)+P902(x114081,a91)
% 32.24/32.04 [11409]~P375(x114091,a83)+P902(x114091,a92)
% 32.24/32.04 [11410]~P902(x114101,a83)+P2127(x114101,a61)
% 32.24/32.04 [11411]~P419(x114111,a27)+P2093(x114111,a50)
% 32.24/32.04 [11412]~P2037(x114121,a26)+P2321(x114121,a27)
% 32.24/32.04 [11413]~P2037(x114131,a28)+P2321(x114131,a26)
% 32.24/32.04 [11414]~P2095(x114141,a26)+P2321(x114141,a26)
% 32.24/32.04 [11415]~P2062(x114151,a27)+P2321(x114151,a26)
% 32.24/32.04 [11416]~P2099(x114161,a28)+P2321(x114161,a28)
% 32.24/32.04 [11417]~P2037(x114171,a39)+P2321(x114171,a28)
% 32.24/32.04 [11418]~P2062(x114181,a26)+P2321(x114181,a28)
% 32.24/32.04 [11419]~P2083(x114191,a39)+P2321(x114191,a39)
% 32.24/32.04 [11420]~P2062(x114201,a28)+P2321(x114201,a39)
% 32.24/32.04 [11421]~P2321(x114211,a28)+P2099(x114211,a28)
% 32.24/32.04 [11422]~P2064(x114221,a26)+P2408(x114221,a26)
% 32.24/32.04 [11423]~P2064(x114231,a28)+P2408(x114231,a28)
% 32.24/32.04 [11424]~P2064(x114241,a39)+P2408(x114241,a39)
% 32.24/32.04 [11425]~P2408(x114251,a26)+P2064(x114251,a26)
% 32.24/32.04 [11426]~P2408(x114261,a28)+P2064(x114261,a28)
% 32.24/32.04 [11427]~P2408(x114271,a39)+P2064(x114271,a39)
% 32.24/32.04 [11428]~P2037(x114281,a26)+P2061(x114281,a26)
% 32.24/32.04 [11429]~P2037(x114291,a28)+P2061(x114291,a28)
% 32.24/32.04 [11430]~P2037(x114301,a39)+P2061(x114301,a39)
% 32.24/32.04 [11431]~P2321(x114311,a27)+P2037(x114311,a26)
% 32.24/32.04 [11432]~P2061(x114321,a26)+P2037(x114321,a26)
% 32.24/32.04 [11433]~P2321(x114331,a26)+P2037(x114331,a28)
% 32.24/32.04 [11434]~P2061(x114341,a28)+P2037(x114341,a28)
% 32.24/32.04 [11435]~P2321(x114351,a28)+P2037(x114351,a39)
% 32.24/32.04 [11436]~P2061(x114361,a39)+P2037(x114361,a39)
% 32.24/32.04 [11437]~P2321(x114371,a26)+P2095(x114371,a26)
% 32.24/32.04 [11438]~P2321(x114381,a39)+P2083(x114381,a39)
% 32.24/32.04 [11439]~P2321(x114391,a26)+P2062(x114391,a27)
% 32.24/32.04 [11440]~P2321(x114401,a28)+P2062(x114401,a26)
% 32.24/32.04 [11441]~P2321(x114411,a39)+P2062(x114411,a28)
% 32.24/32.04 [11442]~P2537(x114421,a27)+P2546(x114421,a27)
% 32.24/32.04 [11443]~P2537(x114431,a26)+P2546(x114431,a26)
% 32.24/32.04 [11444]~P2537(x114441,a28)+P2546(x114441,a28)
% 32.24/32.04 [11445]~P2546(x114451,a27)+P2537(x114451,a27)
% 32.24/32.04 [11446]~P2546(x114461,a26)+P2537(x114461,a26)
% 32.24/32.04 [11447]~P2546(x114471,a28)+P2537(x114471,a28)
% 32.24/32.04 [11448]~P2538(x114481,a27)+P2531(x114481,a27)
% 32.24/32.04 [11449]~P2538(x114491,a26)+P2531(x114491,a26)
% 32.24/32.04 [11450]~P2538(x114501,a28)+P2531(x114501,a28)
% 32.24/32.04 [11451]~P2531(x114511,a27)+P2538(x114511,a27)
% 32.24/32.04 [11452]~P2531(x114521,a26)+P2538(x114521,a26)
% 32.24/32.04 [11453]~P2531(x114531,a28)+P2538(x114531,a28)
% 32.24/32.04 [11454]~P2529(x114541,a27)+P2526(x114541,a27)
% 32.24/32.04 [11455]~P2529(x114551,a26)+P2526(x114551,a26)
% 32.24/32.04 [11456]~P2529(x114561,a28)+P2526(x114561,a28)
% 32.24/32.04 [11457]~P2526(x114571,a27)+P2529(x114571,a27)
% 32.24/32.04 [11458]~P2526(x114581,a26)+P2529(x114581,a26)
% 32.24/32.04 [11459]~P2526(x114591,a28)+P2529(x114591,a28)
% 32.24/32.04 [11460]~P2530(x114601,a27)+P2517(x114601,a26)
% 32.24/32.04 [11461]~P2530(x114611,a26)+P2517(x114611,a28)
% 32.24/32.04 [11462]~P2539(x114621,a27)+P2527(x114621,a26)
% 32.24/32.04 [11463]~P2539(x114631,a26)+P2527(x114631,a28)
% 32.24/32.04 [11464]~P902(x114641,a29)+P1915(x114641,a91)
% 32.24/32.04 [11465]~P1827(x114651,a62)+P1828(x114651,a83)
% 32.24/32.04 [11466]~P1827(x114661,a62)+P1828(x114661,a61)
% 32.24/32.04 [11467]~P1827(x114671,a62)+P1828(x114671,a29)
% 32.24/32.04 [11468]~P1827(x114681,a62)+P1828(x114681,a30)
% 32.24/32.04 [11469]~P1827(x114691,a62)+P1828(x114691,a91)
% 32.24/32.04 [11470]~P1827(x114701,a62)+P1828(x114701,a92)
% 32.24/32.04 [11471]~P1827(x114711,a62)+P1828(x114711,a31)
% 32.24/32.04 [11472]~P1827(x114721,a62)+P1828(x114721,a32)
% 32.24/32.04 [11473]~P1827(x114731,a62)+P1828(x114731,a33)
% 32.24/32.04 [11474]~P1827(x114741,a62)+P1828(x114741,a34)
% 32.24/32.04 [11475]~P1827(x114751,a62)+P1828(x114751,a35)
% 32.24/32.04 [11476]~P1827(x114761,a62)+P1828(x114761,a36)
% 32.24/32.04 [11477]~P1827(x114771,a62)+P1828(x114771,a37)
% 32.24/32.04 [11478]~P1827(x114781,a62)+P1828(x114781,a38)
% 32.24/32.04 [11479]~P1827(x114791,a62)+P1828(x114791,a40)
% 32.24/32.04 [11480]~P1827(x114801,a62)+P1828(x114801,a41)
% 32.24/32.04 [11481]~P1827(x114811,a62)+P1828(x114811,a42)
% 32.24/32.04 [11482]~P1827(x114821,a62)+P1828(x114821,a43)
% 32.24/32.04 [11483]~P1827(x114831,a62)+P1828(x114831,a44)
% 32.24/32.04 [11484]~P1827(x114841,a62)+P1828(x114841,a45)
% 32.24/32.04 [11485]~P1827(x114851,a62)+P1828(x114851,a46)
% 32.24/32.04 [11486]~P1827(x114861,a62)+P1828(x114861,a47)
% 32.24/32.04 [11487]~P1827(x114871,a62)+P1828(x114871,a48)
% 32.24/32.04 [11488]~P1827(x114881,a62)+P1828(x114881,a49)
% 32.24/32.04 [11489]~P1827(x114891,a62)+P1828(x114891,a51)
% 32.24/32.04 [11490]~P1827(x114901,a62)+P1828(x114901,a52)
% 32.24/32.04 [11491]~P1828(x114911,a83)+P1827(x114911,a62)
% 32.24/32.04 [11492]~P1828(x114921,a61)+P1827(x114921,a62)
% 32.24/32.04 [11493]~P1828(x114931,a29)+P1827(x114931,a62)
% 32.24/32.04 [11494]~P1828(x114941,a30)+P1827(x114941,a62)
% 32.24/32.04 [11495]~P1828(x114951,a91)+P1827(x114951,a62)
% 32.24/32.04 [11496]~P1828(x114961,a92)+P1827(x114961,a62)
% 32.24/32.04 [11497]~P1828(x114971,a31)+P1827(x114971,a62)
% 32.24/32.04 [11498]~P1828(x114981,a32)+P1827(x114981,a62)
% 32.24/32.04 [11499]~P1828(x114991,a33)+P1827(x114991,a62)
% 32.24/32.04 [11500]~P1828(x115001,a34)+P1827(x115001,a62)
% 32.24/32.04 [11501]~P1828(x115011,a35)+P1827(x115011,a62)
% 32.24/32.04 [11502]~P1828(x115021,a36)+P1827(x115021,a62)
% 32.24/32.04 [11503]~P1828(x115031,a37)+P1827(x115031,a62)
% 32.24/32.04 [11504]~P1828(x115041,a38)+P1827(x115041,a62)
% 32.24/32.04 [11505]~P1828(x115051,a40)+P1827(x115051,a62)
% 32.24/32.04 [11506]~P1828(x115061,a41)+P1827(x115061,a62)
% 32.24/32.04 [11507]~P1828(x115071,a42)+P1827(x115071,a62)
% 32.24/32.04 [11508]~P1828(x115081,a43)+P1827(x115081,a62)
% 32.24/32.04 [11509]~P1828(x115091,a44)+P1827(x115091,a62)
% 32.24/32.04 [11510]~P1828(x115101,a45)+P1827(x115101,a62)
% 32.24/32.04 [11511]~P1828(x115111,a46)+P1827(x115111,a62)
% 32.24/32.04 [11512]~P1828(x115121,a47)+P1827(x115121,a62)
% 32.24/32.04 [11513]~P1828(x115131,a48)+P1827(x115131,a62)
% 32.24/32.04 [11514]~P1828(x115141,a49)+P1827(x115141,a62)
% 32.24/32.04 [11515]~P1828(x115151,a51)+P1827(x115151,a62)
% 32.24/32.04 [11516]~P1828(x115161,a52)+P1827(x115161,a62)
% 32.24/32.04 [11517]~P821(x115171,a27)+P819(x115171,a27)
% 32.24/32.04 [11518]~P821(x115181,a26)+P819(x115181,a26)
% 32.24/32.04 [11519]~P819(x115191,a27)+P821(x115191,a27)
% 32.24/32.04 [11520]~P822(x115201,a27)+P821(x115201,a27)
% 32.24/32.04 [11521]~P819(x115211,a26)+P821(x115211,a26)
% 32.24/32.04 [11522]~P822(x115221,a26)+P821(x115221,a26)
% 32.24/32.04 [11523]~P821(x115231,a27)+P822(x115231,a27)
% 32.24/32.04 [11524]~P823(x115241,a27)+P822(x115241,a27)
% 32.24/32.04 [11525]~P821(x115251,a26)+P822(x115251,a26)
% 32.24/32.04 [11526]~P823(x115261,a26)+P822(x115261,a26)
% 32.24/32.04 [11527]~P822(x115271,a27)+P823(x115271,a27)
% 32.24/32.04 [11528]~P824(x115281,a27)+P823(x115281,a27)
% 32.24/32.04 [11529]~P822(x115291,a26)+P823(x115291,a26)
% 32.24/32.04 [11530]~P824(x115301,a26)+P823(x115301,a26)
% 32.24/32.04 [11531]~P823(x115311,a27)+P824(x115311,a27)
% 32.24/32.04 [11532]~P820(x115321,a27)+P824(x115321,a27)
% 32.24/32.04 [11533]~P823(x115331,a26)+P824(x115331,a26)
% 32.24/32.04 [11534]~P820(x115341,a26)+P824(x115341,a26)
% 32.24/32.04 [11535]~P824(x115351,a27)+P820(x115351,a27)
% 32.24/32.04 [11536]~P824(x115361,a26)+P820(x115361,a26)
% 32.24/32.04 [11537]~P843(x115371,a27)+P842(x115371,a27)
% 32.24/32.04 [11538]~P843(x115381,a26)+P842(x115381,a26)
% 32.24/32.04 [11539]~P842(x115391,a27)+P843(x115391,a27)
% 32.24/32.04 [11540]~P844(x115401,a27)+P843(x115401,a27)
% 32.24/32.04 [11541]~P842(x115411,a26)+P843(x115411,a26)
% 32.24/32.04 [11542]~P844(x115421,a26)+P843(x115421,a26)
% 32.24/32.04 [11543]~P843(x115431,a27)+P844(x115431,a27)
% 32.24/32.04 [11544]~P845(x115441,a27)+P844(x115441,a27)
% 32.24/32.04 [11545]~P843(x115451,a26)+P844(x115451,a26)
% 32.24/32.04 [11546]~P845(x115461,a26)+P844(x115461,a26)
% 32.24/32.04 [11547]~P844(x115471,a27)+P845(x115471,a27)
% 32.24/32.04 [11548]~P846(x115481,a27)+P845(x115481,a27)
% 32.24/32.04 [11549]~P844(x115491,a26)+P845(x115491,a26)
% 32.24/32.04 [11550]~P846(x115501,a26)+P845(x115501,a26)
% 32.24/32.04 [11551]~P845(x115511,a27)+P846(x115511,a27)
% 32.24/32.04 [11552]~P847(x115521,a27)+P846(x115521,a27)
% 32.24/32.04 [11553]~P845(x115531,a26)+P846(x115531,a26)
% 32.24/32.04 [11554]~P847(x115541,a26)+P846(x115541,a26)
% 32.24/32.04 [11555]~P846(x115551,a27)+P847(x115551,a27)
% 32.24/32.04 [11556]~P848(x115561,a27)+P847(x115561,a27)
% 32.24/32.04 [11557]~P846(x115571,a26)+P847(x115571,a26)
% 32.24/32.04 [11558]~P848(x115581,a26)+P847(x115581,a26)
% 32.24/32.04 [11559]~P847(x115591,a27)+P848(x115591,a27)
% 32.24/32.04 [11560]~P849(x115601,a27)+P848(x115601,a27)
% 32.24/32.04 [11561]~P847(x115611,a26)+P848(x115611,a26)
% 32.24/32.04 [11562]~P849(x115621,a26)+P848(x115621,a26)
% 32.24/32.04 [11563]~P848(x115631,a27)+P849(x115631,a27)
% 32.24/32.04 [11564]~P839(x115641,a27)+P849(x115641,a27)
% 32.24/32.04 [11565]~P848(x115651,a26)+P849(x115651,a26)
% 32.24/32.04 [11566]~P839(x115661,a26)+P849(x115661,a26)
% 32.24/32.04 [11567]~P849(x115671,a27)+P839(x115671,a27)
% 32.24/32.04 [11568]~P873(x115681,a27)+P839(x115681,a27)
% 32.24/32.04 [11569]~P849(x115691,a26)+P839(x115691,a26)
% 32.24/32.04 [11570]~P1764(x115701,a26)+P839(x115701,a26)
% 32.24/32.04 [11571]~P839(x115711,a26)+P1764(x115711,a26)
% 32.24/32.04 [11572]~P854(x115721,a27)+P853(x115721,a27)
% 32.24/32.04 [11573]~P854(x115731,a26)+P853(x115731,a26)
% 32.24/32.04 [11574]~P853(x115741,a27)+P854(x115741,a27)
% 32.24/32.04 [11575]~P855(x115751,a27)+P854(x115751,a27)
% 32.24/32.04 [11576]~P853(x115761,a26)+P854(x115761,a26)
% 32.24/32.04 [11577]~P855(x115771,a26)+P854(x115771,a26)
% 32.24/32.04 [11578]~P854(x115781,a27)+P855(x115781,a27)
% 32.24/32.04 [11579]~P856(x115791,a27)+P855(x115791,a27)
% 32.24/32.04 [11580]~P854(x115801,a26)+P855(x115801,a26)
% 32.24/32.04 [11581]~P856(x115811,a26)+P855(x115811,a26)
% 32.24/32.04 [11582]~P855(x115821,a27)+P856(x115821,a27)
% 32.24/32.04 [11583]~P857(x115831,a27)+P856(x115831,a27)
% 32.24/32.04 [11584]~P855(x115841,a26)+P856(x115841,a26)
% 32.24/32.04 [11585]~P857(x115851,a26)+P856(x115851,a26)
% 32.24/32.04 [11586]~P856(x115861,a27)+P857(x115861,a27)
% 32.24/32.04 [11587]~P858(x115871,a27)+P857(x115871,a27)
% 32.24/32.04 [11588]~P856(x115881,a26)+P857(x115881,a26)
% 32.24/32.04 [11589]~P858(x115891,a26)+P857(x115891,a26)
% 32.24/32.04 [11590]~P857(x115901,a27)+P858(x115901,a27)
% 32.24/32.04 [11591]~P859(x115911,a27)+P858(x115911,a27)
% 32.24/32.04 [11592]~P857(x115921,a26)+P858(x115921,a26)
% 32.24/32.04 [11593]~P859(x115931,a26)+P858(x115931,a26)
% 32.24/32.04 [11594]~P858(x115941,a27)+P859(x115941,a27)
% 32.24/32.04 [11595]~P860(x115951,a27)+P859(x115951,a27)
% 32.24/32.04 [11596]~P858(x115961,a26)+P859(x115961,a26)
% 32.24/32.04 [11597]~P860(x115971,a26)+P859(x115971,a26)
% 32.24/32.04 [11598]~P859(x115981,a27)+P860(x115981,a27)
% 32.24/32.04 [11599]~P861(x115991,a27)+P860(x115991,a27)
% 32.24/32.04 [11600]~P859(x116001,a26)+P860(x116001,a26)
% 32.24/32.04 [11601]~P861(x116011,a26)+P860(x116011,a26)
% 32.24/32.04 [11602]~P860(x116021,a27)+P861(x116021,a27)
% 32.24/32.04 [11603]~P862(x116031,a27)+P861(x116031,a27)
% 32.24/32.04 [11604]~P860(x116041,a26)+P861(x116041,a26)
% 32.24/32.04 [11605]~P862(x116051,a26)+P861(x116051,a26)
% 32.24/32.04 [11606]~P861(x116061,a27)+P862(x116061,a27)
% 32.24/32.04 [11607]~P863(x116071,a27)+P862(x116071,a27)
% 32.24/32.04 [11608]~P861(x116081,a26)+P862(x116081,a26)
% 32.24/32.04 [11609]~P863(x116091,a26)+P862(x116091,a26)
% 32.24/32.04 [11610]~P862(x116101,a27)+P863(x116101,a27)
% 32.24/32.04 [11611]~P850(x116111,a27)+P863(x116111,a27)
% 32.24/32.04 [11612]~P862(x116121,a26)+P863(x116121,a26)
% 32.24/32.04 [11613]~P850(x116131,a26)+P863(x116131,a26)
% 32.24/32.04 [11614]~P863(x116141,a27)+P850(x116141,a27)
% 32.24/32.04 [11615]~P863(x116151,a26)+P850(x116151,a26)
% 32.24/32.04 [11616]~P1472(x116161,a39)+P1471(x116161,a39)
% 32.24/32.04 [11617]~P1471(x116171,a39)+P1472(x116171,a39)
% 32.24/32.04 [11618]~P1473(x116181,a39)+P1472(x116181,a39)
% 32.24/32.04 [11619]~P1472(x116191,a39)+P1473(x116191,a39)
% 32.24/32.04 [11620]~P1517(x116201,a39)+P1473(x116201,a39)
% 32.24/32.04 [11621]~P1473(x116211,a39)+P1517(x116211,a39)
% 32.24/32.04 [11622]~P1512(x116221,a39)+P1476(x116221,a39)
% 32.24/32.04 [11623]~P1476(x116231,a39)+P1512(x116231,a39)
% 32.24/32.04 [11624]~P1484(x116241,a39)+P1483(x116241,a39)
% 32.24/32.04 [11625]~P1483(x116251,a39)+P1484(x116251,a39)
% 32.24/32.04 [11626]~P487(x116261,a27)+P472(x116261,a27)
% 32.24/32.04 [11627]~P472(x116271,a27)+P487(x116271,a27)
% 32.24/32.04 [11628]~P499(x116281,a31)+P487(x116281,a27)
% 32.24/32.04 [11629]~P499(x116291,a32)+P487(x116291,a26)
% 32.24/32.04 [11630]~P499(x116301,a33)+P487(x116301,a28)
% 32.24/32.04 [11631]~P1361(x116311,a27)+P499(x116311,a62)
% 32.24/32.04 [11632]~P1361(x116321,a28)+P499(x116321,a83)
% 32.24/32.04 [11633]~P1361(x116331,a26)+P499(x116331,a61)
% 32.24/32.04 [11634]~P1361(x116341,a39)+P499(x116341,a92)
% 32.24/32.04 [11635]~P487(x116351,a27)+P499(x116351,a31)
% 32.24/32.04 [11636]~P505(x116361,a31)+P499(x116361,a31)
% 32.24/32.04 [11637]~P487(x116371,a26)+P499(x116371,a32)
% 32.24/32.04 [11638]~P487(x116381,a28)+P499(x116381,a33)
% 32.24/32.04 [11639]~P505(x116391,a73)+P499(x116391,a73)
% 32.24/32.04 [11640]~P573(x116401,a27)+P499(x116401,a77)
% 32.24/32.04 [11641]~P573(x116411,a26)+P499(x116411,a78)
% 32.24/32.04 [11642]~P573(x116421,a28)+P499(x116421,a79)
% 32.24/32.04 [11643]~P573(x116431,a39)+P499(x116431,a80)
% 32.24/32.04 [11644]~P573(x116441,a50)+P499(x116441,a81)
% 32.24/32.04 [11645]~P573(x116451,a62)+P499(x116451,a82)
% 32.24/32.04 [11646]~P573(x116461,a61)+P499(x116461,a84)
% 32.24/32.04 [11647]~P499(x116471,a31)+P505(x116471,a31)
% 32.24/32.04 [11648]~P543(x116481,a31)+P505(x116481,a31)
% 32.24/32.04 [11649]~P499(x116491,a73)+P505(x116491,a73)
% 32.24/32.04 [11650]~P543(x116501,a73)+P505(x116501,a73)
% 32.24/32.04 [11651]~P505(x116511,a31)+P543(x116511,a31)
% 32.24/32.04 [11652]~P505(x116521,a73)+P543(x116521,a73)
% 32.24/32.04 [11653]~P1362(x116531,a92)+P1143(x116531,a27)
% 32.24/32.04 [11654]~P1362(x116541,a91)+P1143(x116541,a26)
% 32.24/32.04 [11655]~P1362(x116551,a29)+P1143(x116551,a28)
% 32.24/32.04 [11656]~P1362(x116561,a30)+P1143(x116561,a39)
% 32.24/32.04 [11657]~P1362(x116571,a32)+P1143(x116571,a62)
% 32.24/32.04 [11658]~P1362(x116581,a31)+P1143(x116581,a50)
% 32.24/32.04 [11659]~P1362(x116591,a34)+P1143(x116591,a83)
% 32.24/32.04 [11660]~P1362(x116601,a33)+P1143(x116601,a61)
% 32.24/32.04 [11661]~P1362(x116611,a35)+P1143(x116611,a92)
% 32.24/32.04 [11662]~P1143(x116621,a28)+P1362(x116621,a29)
% 32.24/32.04 [11663]~P1143(x116631,a39)+P1362(x116631,a30)
% 32.24/32.04 [11664]~P1143(x116641,a26)+P1362(x116641,a91)
% 32.24/32.04 [11665]~P1143(x116651,a27)+P1362(x116651,a92)
% 32.24/32.04 [11666]~P1143(x116661,a50)+P1362(x116661,a31)
% 32.24/32.04 [11667]~P1143(x116671,a62)+P1362(x116671,a32)
% 32.24/32.04 [11668]~P1143(x116681,a61)+P1362(x116681,a33)
% 32.24/32.04 [11669]~P1143(x116691,a83)+P1362(x116691,a34)
% 32.24/32.04 [11670]~P1143(x116701,a92)+P1362(x116701,a35)
% 32.24/32.04 [11671]~P1363(x116711,a28)+P1435(x116711,a29)
% 32.24/32.04 [11672]~P1363(x116721,a39)+P1435(x116721,a30)
% 32.24/32.04 [11673]~P1363(x116731,a26)+P1435(x116731,a91)
% 32.24/32.04 [11674]~P1363(x116741,a27)+P1435(x116741,a92)
% 32.24/32.04 [11675]~P1363(x116751,a50)+P1435(x116751,a31)
% 32.24/32.04 [11676]~P1363(x116761,a62)+P1435(x116761,a32)
% 32.24/32.04 [11677]~P1363(x116771,a61)+P1435(x116771,a33)
% 32.24/32.04 [11678]~P1363(x116781,a83)+P1435(x116781,a34)
% 32.24/32.04 [11679]~P1363(x116791,a92)+P1435(x116791,a35)
% 32.24/32.04 [11680]~P1366(x116801,a39)+P1437(x116801,a27)
% 32.24/32.04 [11681]~P1366(x116811,a39)+P1437(x116811,a26)
% 32.24/32.04 [11682]~P1366(x116821,a39)+P1437(x116821,a28)
% 32.24/32.04 [11683]~P1366(x116831,a39)+P1437(x116831,a39)
% 32.24/32.04 [11684]~P1366(x116841,a39)+P1437(x116841,a62)
% 32.24/32.04 [11685]~P1366(x116851,a39)+P1437(x116851,a50)
% 32.24/32.04 [11686]~P1366(x116861,a39)+P1437(x116861,a83)
% 32.24/32.04 [11687]~P1366(x116871,a39)+P1437(x116871,a61)
% 32.24/32.04 [11688]~P1366(x116881,a39)+P1437(x116881,a29)
% 32.24/32.04 [11689]~P1366(x116891,a39)+P1437(x116891,a30)
% 32.24/32.04 [11690]~P1366(x116901,a39)+P1437(x116901,a91)
% 32.24/32.04 [11691]~P1366(x116911,a39)+P1437(x116911,a92)
% 32.24/32.04 [11692]~P1366(x116921,a39)+P1437(x116921,a31)
% 32.24/32.04 [11693]~P1366(x116931,a39)+P1437(x116931,a32)
% 32.24/32.04 [11694]~P1366(x116941,a39)+P1437(x116941,a33)
% 32.24/32.04 [11695]~P1366(x116951,a39)+P1437(x116951,a34)
% 32.24/32.04 [11696]~P1366(x116961,a39)+P1437(x116961,a35)
% 32.24/32.04 [11697]~P1423(x116971,a27)+P1366(x116971,a27)
% 32.24/32.04 [11698]~P1423(x116981,a26)+P1366(x116981,a27)
% 32.24/32.04 [11699]~P1423(x116991,a28)+P1366(x116991,a27)
% 32.24/32.04 [11700]~P1423(x117001,a39)+P1366(x117001,a27)
% 32.24/32.04 [11701]~P1423(x117011,a62)+P1366(x117011,a27)
% 32.24/32.04 [11702]~P1423(x117021,a50)+P1366(x117021,a27)
% 32.24/32.04 [11703]~P1423(x117031,a83)+P1366(x117031,a27)
% 32.24/32.04 [11704]~P1423(x117041,a61)+P1366(x117041,a27)
% 32.24/32.04 [11705]~P1423(x117051,a29)+P1366(x117051,a27)
% 32.24/32.04 [11706]~P1423(x117061,a30)+P1366(x117061,a27)
% 32.24/32.04 [11707]~P1423(x117071,a91)+P1366(x117071,a27)
% 32.24/32.04 [11708]~P1423(x117081,a92)+P1366(x117081,a27)
% 32.24/32.04 [11709]~P1423(x117091,a31)+P1366(x117091,a27)
% 32.24/32.04 [11710]~P1423(x117101,a32)+P1366(x117101,a27)
% 32.24/32.04 [11711]~P1423(x117111,a33)+P1366(x117111,a27)
% 32.24/32.04 [11712]~P1423(x117121,a34)+P1366(x117121,a27)
% 32.24/32.04 [11713]~P1423(x117131,a35)+P1366(x117131,a27)
% 32.24/32.04 [11714]~P1426(x117141,a27)+P1366(x117141,a26)
% 32.24/32.04 [11715]~P1426(x117151,a26)+P1366(x117151,a26)
% 32.24/32.04 [11716]~P1426(x117161,a28)+P1366(x117161,a26)
% 32.24/32.04 [11717]~P1426(x117171,a39)+P1366(x117171,a26)
% 32.24/32.04 [11718]~P1426(x117181,a62)+P1366(x117181,a26)
% 32.24/32.04 [11719]~P1426(x117191,a50)+P1366(x117191,a26)
% 32.24/32.04 [11720]~P1426(x117201,a83)+P1366(x117201,a26)
% 32.24/32.04 [11721]~P1426(x117211,a61)+P1366(x117211,a26)
% 32.24/32.04 [11722]~P1426(x117221,a29)+P1366(x117221,a26)
% 32.24/32.04 [11723]~P1426(x117231,a30)+P1366(x117231,a26)
% 32.24/32.04 [11724]~P1426(x117241,a91)+P1366(x117241,a26)
% 32.24/32.04 [11725]~P1426(x117251,a92)+P1366(x117251,a26)
% 32.24/32.04 [11726]~P1426(x117261,a31)+P1366(x117261,a26)
% 32.24/32.04 [11727]~P1426(x117271,a32)+P1366(x117271,a26)
% 32.24/32.04 [11728]~P1426(x117281,a33)+P1366(x117281,a26)
% 32.24/32.04 [11729]~P1426(x117291,a34)+P1366(x117291,a26)
% 32.24/32.04 [11730]~P1426(x117301,a35)+P1366(x117301,a26)
% 32.24/32.04 [11731]~P1434(x117311,a27)+P1366(x117311,a28)
% 32.24/32.04 [11732]~P1434(x117321,a26)+P1366(x117321,a28)
% 32.24/32.04 [11733]~P1434(x117331,a28)+P1366(x117331,a28)
% 32.24/32.04 [11734]~P1434(x117341,a39)+P1366(x117341,a28)
% 32.24/32.04 [11735]~P1434(x117351,a62)+P1366(x117351,a28)
% 32.24/32.04 [11736]~P1434(x117361,a50)+P1366(x117361,a28)
% 32.24/32.04 [11737]~P1434(x117371,a83)+P1366(x117371,a28)
% 32.24/32.04 [11738]~P1434(x117381,a61)+P1366(x117381,a28)
% 32.24/32.04 [11739]~P1434(x117391,a29)+P1366(x117391,a28)
% 32.24/32.04 [11740]~P1434(x117401,a30)+P1366(x117401,a28)
% 32.24/32.04 [11741]~P1434(x117411,a91)+P1366(x117411,a28)
% 32.24/32.04 [11742]~P1434(x117421,a92)+P1366(x117421,a28)
% 32.24/32.04 [11743]~P1434(x117431,a31)+P1366(x117431,a28)
% 32.24/32.04 [11744]~P1434(x117441,a32)+P1366(x117441,a28)
% 32.24/32.04 [11745]~P1434(x117451,a33)+P1366(x117451,a28)
% 32.24/32.04 [11746]~P1434(x117461,a34)+P1366(x117461,a28)
% 32.24/32.04 [11747]~P1434(x117471,a35)+P1366(x117471,a28)
% 32.24/32.04 [11748]~P1437(x117481,a27)+P1366(x117481,a39)
% 32.24/32.04 [11749]~P1437(x117491,a26)+P1366(x117491,a39)
% 32.24/32.04 [11750]~P1437(x117501,a28)+P1366(x117501,a39)
% 32.24/32.04 [11751]~P1437(x117511,a39)+P1366(x117511,a39)
% 32.24/32.04 [11752]~P1437(x117521,a62)+P1366(x117521,a39)
% 32.24/32.04 [11753]~P1437(x117531,a50)+P1366(x117531,a39)
% 32.24/32.04 [11754]~P1437(x117541,a83)+P1366(x117541,a39)
% 32.24/32.04 [11755]~P1437(x117551,a61)+P1366(x117551,a39)
% 32.24/32.04 [11756]~P1437(x117561,a29)+P1366(x117561,a39)
% 32.24/32.04 [11757]~P1437(x117571,a30)+P1366(x117571,a39)
% 32.24/32.04 [11758]~P1437(x117581,a91)+P1366(x117581,a39)
% 32.24/32.04 [11759]~P1437(x117591,a92)+P1366(x117591,a39)
% 32.24/32.04 [11760]~P1437(x117601,a31)+P1366(x117601,a39)
% 32.24/32.04 [11761]~P1437(x117611,a32)+P1366(x117611,a39)
% 32.24/32.04 [11762]~P1437(x117621,a33)+P1366(x117621,a39)
% 32.24/32.04 [11763]~P1437(x117631,a34)+P1366(x117631,a39)
% 32.24/32.04 [11764]~P1437(x117641,a35)+P1366(x117641,a39)
% 32.24/32.04 [11765]~P1435(x117651,a92)+P1363(x117651,a27)
% 32.24/32.04 [11766]~P1435(x117661,a91)+P1363(x117661,a26)
% 32.24/32.04 [11767]~P1435(x117671,a29)+P1363(x117671,a28)
% 32.24/32.04 [11768]~P1435(x117681,a30)+P1363(x117681,a39)
% 32.24/32.04 [11769]~P1435(x117691,a32)+P1363(x117691,a62)
% 32.24/32.04 [11770]~P1435(x117701,a31)+P1363(x117701,a50)
% 32.24/32.04 [11771]~P1435(x117711,a34)+P1363(x117711,a83)
% 32.24/32.04 [11772]~P1435(x117721,a33)+P1363(x117721,a61)
% 32.24/32.04 [11773]~P1435(x117731,a35)+P1363(x117731,a92)
% 32.24/32.04 [11774]~P1370(x117741,a26)+P1432(x117741,a62)
% 32.24/32.04 [11775]~P1370(x117751,a27)+P1432(x117751,a50)
% 32.24/32.04 [11776]~P1370(x117761,a39)+P1432(x117761,a83)
% 32.24/32.04 [11777]~P1370(x117771,a28)+P1432(x117771,a61)
% 32.24/32.04 [11778]~P1370(x117781,a61)+P1432(x117781,a29)
% 32.24/32.04 [11779]~P1370(x117791,a83)+P1432(x117791,a30)
% 32.24/32.04 [11780]~P1370(x117801,a62)+P1432(x117801,a91)
% 32.24/32.04 [11781]~P1370(x117811,a50)+P1432(x117811,a92)
% 32.24/32.04 [11782]~P1370(x117821,a92)+P1432(x117821,a31)
% 32.24/32.04 [11783]~P1370(x117831,a91)+P1432(x117831,a32)
% 32.24/32.04 [11784]~P1370(x117841,a29)+P1432(x117841,a33)
% 32.24/32.04 [11785]~P1370(x117851,a30)+P1432(x117851,a34)
% 32.24/32.04 [11786]~P1370(x117861,a31)+P1432(x117861,a35)
% 32.24/32.04 [11787]~P1366(x117871,a28)+P1434(x117871,a27)
% 32.24/32.04 [11788]~P1366(x117881,a28)+P1434(x117881,a26)
% 32.24/32.04 [11789]~P1366(x117891,a28)+P1434(x117891,a28)
% 32.24/32.04 [11790]~P1366(x117901,a28)+P1434(x117901,a39)
% 32.24/32.04 [11791]~P1366(x117911,a28)+P1434(x117911,a62)
% 32.24/32.04 [11792]~P1366(x117921,a28)+P1434(x117921,a50)
% 32.24/32.04 [11793]~P1366(x117931,a28)+P1434(x117931,a83)
% 32.24/32.04 [11794]~P1366(x117941,a28)+P1434(x117941,a61)
% 32.24/32.04 [11795]~P1366(x117951,a28)+P1434(x117951,a29)
% 32.24/32.04 [11796]~P1366(x117961,a28)+P1434(x117961,a30)
% 32.24/32.04 [11797]~P1366(x117971,a28)+P1434(x117971,a91)
% 32.24/32.04 [11798]~P1366(x117981,a28)+P1434(x117981,a92)
% 32.24/32.04 [11799]~P1366(x117991,a28)+P1434(x117991,a31)
% 32.24/32.04 [11800]~P1366(x118001,a28)+P1434(x118001,a32)
% 32.24/32.04 [11801]~P1366(x118011,a28)+P1434(x118011,a33)
% 32.24/32.04 [11802]~P1366(x118021,a28)+P1434(x118021,a34)
% 32.24/32.04 [11803]~P1366(x118031,a28)+P1434(x118031,a35)
% 32.24/32.04 [11804]~P1432(x118041,a50)+P1370(x118041,a27)
% 32.24/32.04 [11805]~P1432(x118051,a62)+P1370(x118051,a26)
% 32.24/32.04 [11806]~P1432(x118061,a61)+P1370(x118061,a28)
% 32.24/32.04 [11807]~P1432(x118071,a83)+P1370(x118071,a39)
% 32.24/32.04 [11808]~P1432(x118081,a91)+P1370(x118081,a62)
% 32.24/32.04 [11809]~P1432(x118091,a92)+P1370(x118091,a50)
% 32.24/32.04 [11810]~P1432(x118101,a30)+P1370(x118101,a83)
% 32.24/32.04 [11811]~P1432(x118111,a29)+P1370(x118111,a61)
% 32.24/32.04 [11812]~P1432(x118121,a33)+P1370(x118121,a29)
% 32.24/32.04 [11813]~P1432(x118131,a34)+P1370(x118131,a30)
% 32.24/32.04 [11814]~P1432(x118141,a32)+P1370(x118141,a91)
% 32.24/32.04 [11815]~P1432(x118151,a31)+P1370(x118151,a92)
% 32.24/32.04 [11816]~P1432(x118161,a35)+P1370(x118161,a31)
% 32.24/32.04 [11817]~P1371(x118171,a27)+P1424(x118171,a28)
% 32.24/32.04 [11818]~P1371(x118181,a26)+P1424(x118181,a39)
% 32.24/32.04 [11819]~P1371(x118191,a39)+P1424(x118191,a62)
% 32.24/32.04 [11820]~P1371(x118201,a28)+P1424(x118201,a50)
% 32.24/32.04 [11821]~P1371(x118211,a62)+P1424(x118211,a83)
% 32.24/32.04 [11822]~P1371(x118221,a50)+P1424(x118221,a61)
% 32.24/32.04 [11823]~P1371(x118231,a92)+P1424(x118231,a29)
% 32.24/32.04 [11824]~P1371(x118241,a91)+P1424(x118241,a30)
% 32.24/32.04 [11825]~P1371(x118251,a83)+P1424(x118251,a91)
% 32.24/32.04 [11826]~P1371(x118261,a61)+P1424(x118261,a92)
% 32.24/32.04 [11827]~P1371(x118271,a29)+P1424(x118271,a31)
% 32.24/32.04 [11828]~P1371(x118281,a30)+P1424(x118281,a32)
% 32.24/32.04 [11829]~P1371(x118291,a31)+P1424(x118291,a33)
% 32.24/32.04 [11830]~P1371(x118301,a32)+P1424(x118301,a34)
% 32.24/32.04 [11831]~P1371(x118311,a33)+P1424(x118311,a35)
% 32.24/32.04 [11832]~P1366(x118321,a26)+P1426(x118321,a27)
% 32.24/32.04 [11833]~P1366(x118331,a26)+P1426(x118331,a26)
% 32.24/32.04 [11834]~P1366(x118341,a26)+P1426(x118341,a28)
% 32.24/32.04 [11835]~P1366(x118351,a26)+P1426(x118351,a39)
% 32.24/32.04 [11836]~P1366(x118361,a26)+P1426(x118361,a62)
% 32.24/32.04 [11837]~P1366(x118371,a26)+P1426(x118371,a50)
% 32.24/32.04 [11838]~P1366(x118381,a26)+P1426(x118381,a83)
% 32.24/32.04 [11839]~P1366(x118391,a26)+P1426(x118391,a61)
% 32.24/32.04 [11840]~P1366(x118401,a26)+P1426(x118401,a29)
% 32.24/32.04 [11841]~P1366(x118411,a26)+P1426(x118411,a30)
% 32.24/32.04 [11842]~P1366(x118421,a26)+P1426(x118421,a91)
% 32.24/32.04 [11843]~P1366(x118431,a26)+P1426(x118431,a92)
% 32.24/32.04 [11844]~P1366(x118441,a26)+P1426(x118441,a31)
% 32.24/32.04 [11845]~P1366(x118451,a26)+P1426(x118451,a32)
% 32.24/32.04 [11846]~P1366(x118461,a26)+P1426(x118461,a33)
% 32.24/32.04 [11847]~P1366(x118471,a26)+P1426(x118471,a34)
% 32.24/32.04 [11848]~P1366(x118481,a26)+P1426(x118481,a35)
% 32.24/32.04 [11849]~P1424(x118491,a28)+P1371(x118491,a27)
% 32.24/32.04 [11850]~P1424(x118501,a39)+P1371(x118501,a26)
% 32.24/32.04 [11851]~P1424(x118511,a50)+P1371(x118511,a28)
% 32.24/32.04 [11852]~P1424(x118521,a62)+P1371(x118521,a39)
% 32.24/32.04 [11853]~P1424(x118531,a83)+P1371(x118531,a62)
% 32.24/32.04 [11854]~P1424(x118541,a61)+P1371(x118541,a50)
% 32.24/32.04 [11855]~P1424(x118551,a91)+P1371(x118551,a83)
% 32.24/32.04 [11856]~P1424(x118561,a92)+P1371(x118561,a61)
% 32.24/32.04 [11857]~P1424(x118571,a31)+P1371(x118571,a29)
% 32.24/32.04 [11858]~P1424(x118581,a32)+P1371(x118581,a30)
% 32.24/32.04 [11859]~P1424(x118591,a30)+P1371(x118591,a91)
% 32.24/32.04 [11860]~P1424(x118601,a29)+P1371(x118601,a92)
% 32.24/32.04 [11861]~P1424(x118611,a33)+P1371(x118611,a31)
% 32.24/32.04 [11862]~P1424(x118621,a34)+P1371(x118621,a32)
% 32.24/32.04 [11863]~P1424(x118631,a35)+P1371(x118631,a33)
% 32.24/32.04 [11864]~P1369(x118641,a27)+P1105(x118641,a26)
% 32.24/32.04 [11865]~P1369(x118651,a26)+P1105(x118651,a28)
% 32.24/32.04 [11866]~P1369(x118661,a28)+P1105(x118661,a39)
% 32.24/32.04 [11867]~P1369(x118671,a50)+P1105(x118671,a62)
% 32.24/32.04 [11868]~P1369(x118681,a39)+P1105(x118681,a50)
% 32.24/32.04 [11869]~P1369(x118691,a61)+P1105(x118691,a83)
% 32.24/32.04 [11870]~P1369(x118701,a62)+P1105(x118701,a61)
% 32.24/32.04 [11871]~P1369(x118711,a91)+P1105(x118711,a29)
% 32.24/32.04 [11872]~P1369(x118721,a29)+P1105(x118721,a30)
% 32.24/32.04 [11873]~P1369(x118731,a92)+P1105(x118731,a91)
% 32.24/32.04 [11874]~P1369(x118741,a83)+P1105(x118741,a92)
% 32.24/32.04 [11875]~P1369(x118751,a30)+P1105(x118751,a31)
% 32.24/32.04 [11876]~P1369(x118761,a31)+P1105(x118761,a32)
% 32.24/32.04 [11877]~P1369(x118771,a32)+P1105(x118771,a33)
% 32.24/32.04 [11878]~P1369(x118781,a33)+P1105(x118781,a34)
% 32.24/32.04 [11879]~P1369(x118791,a34)+P1105(x118791,a35)
% 32.24/32.04 [11880]~P1366(x118801,a27)+P1423(x118801,a27)
% 32.24/32.04 [11881]~P1366(x118811,a27)+P1423(x118811,a26)
% 32.24/32.04 [11882]~P1366(x118821,a27)+P1423(x118821,a28)
% 32.24/32.04 [11883]~P1366(x118831,a27)+P1423(x118831,a39)
% 32.24/32.04 [11884]~P1366(x118841,a27)+P1423(x118841,a62)
% 32.24/32.04 [11885]~P1366(x118851,a27)+P1423(x118851,a50)
% 32.24/32.04 [11886]~P1366(x118861,a27)+P1423(x118861,a83)
% 32.24/32.04 [11887]~P1366(x118871,a27)+P1423(x118871,a61)
% 32.24/32.04 [11888]~P1366(x118881,a27)+P1423(x118881,a29)
% 32.24/32.04 [11889]~P1366(x118891,a27)+P1423(x118891,a30)
% 32.24/32.04 [11890]~P1366(x118901,a27)+P1423(x118901,a91)
% 32.24/32.04 [11891]~P1366(x118911,a27)+P1423(x118911,a92)
% 32.24/32.04 [11892]~P1366(x118921,a27)+P1423(x118921,a31)
% 32.24/32.04 [11893]~P1366(x118931,a27)+P1423(x118931,a32)
% 32.24/32.04 [11894]~P1366(x118941,a27)+P1423(x118941,a33)
% 32.24/32.04 [11895]~P1366(x118951,a27)+P1423(x118951,a34)
% 32.24/32.04 [11896]~P1366(x118961,a27)+P1423(x118961,a35)
% 32.24/32.04 [11897]~P1105(x118971,a26)+P1369(x118971,a27)
% 32.24/32.04 [11898]~P1105(x118981,a28)+P1369(x118981,a26)
% 32.24/32.04 [11899]~P1105(x118991,a39)+P1369(x118991,a28)
% 32.24/32.04 [11900]~P1105(x119001,a50)+P1369(x119001,a39)
% 32.24/32.04 [11901]~P1105(x119011,a61)+P1369(x119011,a62)
% 32.24/32.04 [11902]~P1105(x119021,a62)+P1369(x119021,a50)
% 32.24/32.04 [11903]~P1105(x119031,a92)+P1369(x119031,a83)
% 32.24/32.04 [11904]~P1105(x119041,a83)+P1369(x119041,a61)
% 32.24/32.04 [11905]~P1105(x119051,a30)+P1369(x119051,a29)
% 32.24/32.04 [11906]~P1144(x119061,a28)+P1369(x119061,a29)
% 32.24/32.04 [11907]~P1105(x119071,a31)+P1369(x119071,a30)
% 32.24/32.04 [11908]~P1144(x119081,a39)+P1369(x119081,a30)
% 32.24/32.04 [11909]~P1105(x119091,a29)+P1369(x119091,a91)
% 32.24/32.04 [11910]~P1144(x119101,a26)+P1369(x119101,a91)
% 32.24/32.04 [11911]~P1105(x119111,a91)+P1369(x119111,a92)
% 32.24/32.04 [11912]~P1144(x119121,a27)+P1369(x119121,a92)
% 32.24/32.04 [11913]~P1105(x119131,a32)+P1369(x119131,a31)
% 32.24/32.04 [11914]~P1144(x119141,a50)+P1369(x119141,a31)
% 32.24/32.04 [11915]~P1105(x119151,a33)+P1369(x119151,a32)
% 32.24/32.04 [11916]~P1144(x119161,a62)+P1369(x119161,a32)
% 32.24/32.04 [11917]~P1105(x119171,a34)+P1369(x119171,a33)
% 32.24/32.04 [11918]~P1144(x119181,a61)+P1369(x119181,a33)
% 32.24/32.04 [11919]~P1105(x119191,a35)+P1369(x119191,a34)
% 32.24/32.04 [11920]~P1144(x119201,a83)+P1369(x119201,a34)
% 32.24/32.04 [11921]~P1144(x119211,a92)+P1369(x119211,a35)
% 32.24/32.04 [11922]~P1369(x119221,a92)+P1144(x119221,a27)
% 32.24/32.04 [11923]~P1148(x119231,a27)+P1144(x119231,a27)
% 32.24/32.04 [11924]~P1369(x119241,a91)+P1144(x119241,a26)
% 32.24/32.04 [11925]~P1148(x119251,a26)+P1144(x119251,a26)
% 32.24/32.04 [11926]~P1369(x119261,a29)+P1144(x119261,a28)
% 32.24/32.04 [11927]~P1148(x119271,a28)+P1144(x119271,a28)
% 32.24/32.04 [11928]~P1369(x119281,a30)+P1144(x119281,a39)
% 32.24/32.04 [11929]~P1148(x119291,a39)+P1144(x119291,a39)
% 32.24/32.04 [11930]~P1369(x119301,a32)+P1144(x119301,a62)
% 32.24/32.04 [11931]~P1148(x119311,a62)+P1144(x119311,a62)
% 32.24/32.04 [11932]~P1369(x119321,a31)+P1144(x119321,a50)
% 32.24/32.04 [11933]~P1148(x119331,a50)+P1144(x119331,a50)
% 32.24/32.04 [11934]~P1369(x119341,a34)+P1144(x119341,a83)
% 32.24/32.04 [11935]~P1148(x119351,a83)+P1144(x119351,a83)
% 32.24/32.04 [11936]~P1369(x119361,a33)+P1144(x119361,a61)
% 32.24/32.04 [11937]~P1148(x119371,a61)+P1144(x119371,a61)
% 32.24/32.04 [11938]~P1369(x119381,a35)+P1144(x119381,a92)
% 32.24/32.04 [11939]~P1148(x119391,a92)+P1144(x119391,a92)
% 32.24/32.04 [11940]~P499(x119401,a62)+P1361(x119401,a27)
% 32.24/32.04 [11941]~P499(x119411,a61)+P1361(x119411,a26)
% 32.24/32.04 [11942]~P499(x119421,a83)+P1361(x119421,a28)
% 32.24/32.04 [11943]~P499(x119431,a92)+P1361(x119431,a39)
% 32.24/32.04 [11944]~P1144(x119441,a27)+P1148(x119441,a27)
% 32.24/32.04 [11945]~P1144(x119451,a26)+P1148(x119451,a26)
% 32.24/32.04 [11946]~P1144(x119461,a28)+P1148(x119461,a28)
% 32.24/32.04 [11947]~P1144(x119471,a39)+P1148(x119471,a39)
% 32.24/32.04 [11948]~P1144(x119481,a62)+P1148(x119481,a62)
% 32.24/32.04 [11949]~P1144(x119491,a50)+P1148(x119491,a50)
% 32.24/32.04 [11950]~P1144(x119501,a83)+P1148(x119501,a83)
% 32.24/32.04 [11951]~P1144(x119511,a61)+P1148(x119511,a61)
% 32.24/32.04 [11952]~P1144(x119521,a92)+P1148(x119521,a92)
% 32.24/32.04 [11953]~P1146(x119531,a50)+P1356(x119531,a27)
% 32.24/32.04 [11954]~P1146(x119541,a50)+P1356(x119541,a26)
% 32.24/32.04 [11955]~P1146(x119551,a50)+P1356(x119551,a28)
% 32.24/32.04 [11956]~P1146(x119561,a50)+P1356(x119561,a39)
% 32.24/32.04 [11957]~P1146(x119571,a50)+P1356(x119571,a62)
% 32.24/32.04 [11958]~P1146(x119581,a50)+P1356(x119581,a50)
% 32.24/32.04 [11959]~P1146(x119591,a50)+P1356(x119591,a83)
% 32.24/32.04 [11960]~P1146(x119601,a50)+P1356(x119601,a61)
% 32.24/32.04 [11961]~P1146(x119611,a50)+P1356(x119611,a29)
% 32.24/32.04 [11962]~P1146(x119621,a50)+P1356(x119621,a30)
% 32.24/32.04 [11963]~P1146(x119631,a50)+P1356(x119631,a91)
% 32.24/32.04 [11964]~P1146(x119641,a50)+P1356(x119641,a92)
% 32.24/32.04 [11965]~P1146(x119651,a50)+P1356(x119651,a31)
% 32.24/32.04 [11966]~P1146(x119661,a50)+P1356(x119661,a32)
% 32.24/32.04 [11967]~P1146(x119671,a50)+P1356(x119671,a33)
% 32.24/32.04 [11968]~P1146(x119681,a50)+P1356(x119681,a34)
% 32.24/32.04 [11969]~P1146(x119691,a50)+P1356(x119691,a35)
% 32.24/32.04 [11970]~P1146(x119701,a50)+P1356(x119701,a36)
% 32.24/32.04 [11971]~P1146(x119711,a50)+P1356(x119711,a37)
% 32.24/32.04 [11972]~P1146(x119721,a50)+P1356(x119721,a38)
% 32.24/32.04 [11973]~P1146(x119731,a50)+P1356(x119731,a40)
% 32.24/32.04 [11974]~P1146(x119741,a50)+P1356(x119741,a41)
% 32.24/32.04 [11975]~P1146(x119751,a50)+P1356(x119751,a42)
% 32.24/32.04 [11976]~P1146(x119761,a50)+P1356(x119761,a43)
% 32.24/32.04 [11977]~P1146(x119771,a50)+P1356(x119771,a44)
% 32.24/32.04 [11978]~P1146(x119781,a50)+P1356(x119781,a45)
% 32.24/32.04 [11979]~P1146(x119791,a50)+P1356(x119791,a46)
% 32.24/32.04 [11980]~P1146(x119801,a50)+P1356(x119801,a47)
% 32.24/32.04 [11981]~P1146(x119811,a50)+P1356(x119811,a48)
% 32.24/32.04 [11982]~P1146(x119821,a50)+P1356(x119821,a49)
% 32.24/32.04 [11983]~P1146(x119831,a50)+P1356(x119831,a51)
% 32.24/32.04 [11984]~P1146(x119841,a50)+P1356(x119841,a52)
% 32.24/32.04 [11985]~P1146(x119851,a50)+P1356(x119851,a53)
% 32.24/32.04 [11986]~P1146(x119861,a50)+P1356(x119861,a54)
% 32.24/32.04 [11987]~P1146(x119871,a50)+P1356(x119871,a55)
% 32.24/32.04 [11988]~P1146(x119881,a50)+P1356(x119881,a56)
% 32.24/32.04 [11989]~P1146(x119891,a50)+P1356(x119891,a57)
% 32.24/32.04 [11990]~P1146(x119901,a50)+P1356(x119901,a58)
% 32.24/32.04 [11991]~P1146(x119911,a50)+P1356(x119911,a59)
% 32.24/32.04 [11992]~P1146(x119921,a50)+P1356(x119921,a60)
% 32.24/32.04 [11993]~P1357(x119931,a27)+P1146(x119931,a27)
% 32.24/32.04 [11994]~P1357(x119941,a26)+P1146(x119941,a27)
% 32.24/32.04 [11995]~P1357(x119951,a28)+P1146(x119951,a27)
% 32.24/32.04 [11996]~P1357(x119961,a39)+P1146(x119961,a27)
% 32.24/32.04 [11997]~P1357(x119971,a62)+P1146(x119971,a27)
% 32.24/32.04 [11998]~P1357(x119981,a50)+P1146(x119981,a27)
% 32.24/32.04 [11999]~P1357(x119991,a83)+P1146(x119991,a27)
% 32.24/32.04 [12000]~P1357(x120001,a61)+P1146(x120001,a27)
% 32.24/32.04 [12001]~P1357(x120011,a91)+P1146(x120011,a27)
% 32.24/32.04 [12002]~P1357(x120021,a92)+P1146(x120021,a27)
% 32.24/32.04 [12003]~P1341(x120031,a27)+P1146(x120031,a27)
% 32.24/32.04 [12004]~P1341(x120041,a26)+P1146(x120041,a27)
% 32.24/32.04 [12005]~P1341(x120051,a28)+P1146(x120051,a27)
% 32.24/32.04 [12006]~P1341(x120061,a39)+P1146(x120061,a27)
% 32.24/32.04 [12007]~P1341(x120071,a62)+P1146(x120071,a27)
% 32.24/32.04 [12008]~P1341(x120081,a50)+P1146(x120081,a27)
% 32.24/32.04 [12009]~P1341(x120091,a83)+P1146(x120091,a27)
% 32.24/32.04 [12010]~P1341(x120101,a61)+P1146(x120101,a27)
% 32.24/32.04 [12011]~P1341(x120111,a29)+P1146(x120111,a27)
% 32.24/32.04 [12012]~P1341(x120121,a30)+P1146(x120121,a27)
% 32.24/32.04 [12013]~P1341(x120131,a91)+P1146(x120131,a27)
% 32.24/32.04 [12014]~P1341(x120141,a92)+P1146(x120141,a27)
% 32.24/32.04 [12015]~P1328(x120151,a27)+P1146(x120151,a27)
% 32.24/32.04 [12016]~P1328(x120161,a26)+P1146(x120161,a27)
% 32.24/32.04 [12017]~P1328(x120171,a28)+P1146(x120171,a27)
% 32.24/32.04 [12018]~P1328(x120181,a39)+P1146(x120181,a27)
% 32.24/32.04 [12019]~P1328(x120191,a62)+P1146(x120191,a27)
% 32.24/32.04 [12020]~P1328(x120201,a50)+P1146(x120201,a27)
% 32.24/32.04 [12021]~P1328(x120211,a83)+P1146(x120211,a27)
% 32.24/32.04 [12022]~P1328(x120221,a61)+P1146(x120221,a27)
% 32.24/32.04 [12023]~P1328(x120231,a29)+P1146(x120231,a27)
% 32.24/32.04 [12024]~P1328(x120241,a30)+P1146(x120241,a27)
% 32.24/32.04 [12025]~P1328(x120251,a91)+P1146(x120251,a27)
% 32.24/32.04 [12026]~P1328(x120261,a92)+P1146(x120261,a27)
% 32.24/32.04 [12027]~P1328(x120271,a31)+P1146(x120271,a27)
% 32.24/32.04 [12028]~P1328(x120281,a32)+P1146(x120281,a27)
% 32.24/32.04 [12029]~P1319(x120291,a27)+P1146(x120291,a27)
% 32.24/32.04 [12030]~P1319(x120301,a26)+P1146(x120301,a27)
% 32.24/32.04 [12031]~P1319(x120311,a28)+P1146(x120311,a27)
% 32.24/32.04 [12032]~P1319(x120321,a39)+P1146(x120321,a27)
% 32.24/32.04 [12033]~P1319(x120331,a62)+P1146(x120331,a27)
% 32.24/32.04 [12034]~P1319(x120341,a50)+P1146(x120341,a27)
% 32.24/32.04 [12035]~P1319(x120351,a83)+P1146(x120351,a27)
% 32.24/32.04 [12036]~P1319(x120361,a61)+P1146(x120361,a27)
% 32.24/32.04 [12037]~P1319(x120371,a29)+P1146(x120371,a27)
% 32.24/32.04 [12038]~P1319(x120381,a30)+P1146(x120381,a27)
% 32.24/32.04 [12039]~P1319(x120391,a91)+P1146(x120391,a27)
% 32.24/32.04 [12040]~P1319(x120401,a92)+P1146(x120401,a27)
% 32.24/32.04 [12041]~P1319(x120411,a31)+P1146(x120411,a27)
% 32.24/32.04 [12042]~P1319(x120421,a32)+P1146(x120421,a27)
% 32.24/32.04 [12043]~P1319(x120431,a33)+P1146(x120431,a27)
% 32.24/32.04 [12044]~P1319(x120441,a34)+P1146(x120441,a27)
% 32.24/32.04 [12045]~P1302(x120451,a27)+P1146(x120451,a27)
% 32.24/32.04 [12046]~P1302(x120461,a26)+P1146(x120461,a27)
% 32.24/32.04 [12047]~P1302(x120471,a28)+P1146(x120471,a27)
% 32.24/32.04 [12048]~P1302(x120481,a39)+P1146(x120481,a27)
% 32.24/32.04 [12049]~P1302(x120491,a62)+P1146(x120491,a27)
% 32.24/32.04 [12050]~P1302(x120501,a50)+P1146(x120501,a27)
% 32.24/32.04 [12051]~P1302(x120511,a83)+P1146(x120511,a27)
% 32.24/32.04 [12052]~P1302(x120521,a61)+P1146(x120521,a27)
% 32.24/32.04 [12053]~P1302(x120531,a29)+P1146(x120531,a27)
% 32.24/32.04 [12054]~P1302(x120541,a30)+P1146(x120541,a27)
% 32.24/32.04 [12055]~P1302(x120551,a91)+P1146(x120551,a27)
% 32.24/32.04 [12056]~P1302(x120561,a92)+P1146(x120561,a27)
% 32.24/32.04 [12057]~P1302(x120571,a31)+P1146(x120571,a27)
% 32.24/32.04 [12058]~P1302(x120581,a32)+P1146(x120581,a27)
% 32.24/32.04 [12059]~P1302(x120591,a33)+P1146(x120591,a27)
% 32.24/32.04 [12060]~P1302(x120601,a34)+P1146(x120601,a27)
% 32.24/32.04 [12061]~P1302(x120611,a35)+P1146(x120611,a27)
% 32.24/32.04 [12062]~P1302(x120621,a36)+P1146(x120621,a27)
% 32.24/32.04 [12063]~P1293(x120631,a27)+P1146(x120631,a27)
% 32.24/32.04 [12064]~P1293(x120641,a26)+P1146(x120641,a27)
% 32.24/32.04 [12065]~P1293(x120651,a28)+P1146(x120651,a27)
% 32.24/32.04 [12066]~P1293(x120661,a39)+P1146(x120661,a27)
% 32.24/32.04 [12067]~P1293(x120671,a62)+P1146(x120671,a27)
% 32.24/32.04 [12068]~P1293(x120681,a50)+P1146(x120681,a27)
% 32.24/32.04 [12069]~P1293(x120691,a83)+P1146(x120691,a27)
% 32.24/32.04 [12070]~P1293(x120701,a61)+P1146(x120701,a27)
% 32.24/32.04 [12071]~P1293(x120711,a29)+P1146(x120711,a27)
% 32.24/32.04 [12072]~P1293(x120721,a30)+P1146(x120721,a27)
% 32.24/32.04 [12073]~P1293(x120731,a91)+P1146(x120731,a27)
% 32.24/32.04 [12074]~P1293(x120741,a92)+P1146(x120741,a27)
% 32.24/32.04 [12075]~P1293(x120751,a31)+P1146(x120751,a27)
% 32.24/32.04 [12076]~P1293(x120761,a32)+P1146(x120761,a27)
% 32.24/32.04 [12077]~P1293(x120771,a33)+P1146(x120771,a27)
% 32.24/32.04 [12078]~P1293(x120781,a34)+P1146(x120781,a27)
% 32.24/32.04 [12079]~P1293(x120791,a35)+P1146(x120791,a27)
% 32.24/32.04 [12080]~P1293(x120801,a36)+P1146(x120801,a27)
% 32.24/32.04 [12081]~P1293(x120811,a37)+P1146(x120811,a27)
% 32.24/32.04 [12082]~P1293(x120821,a38)+P1146(x120821,a27)
% 32.24/32.04 [12083]~P1279(x120831,a27)+P1146(x120831,a27)
% 32.24/32.04 [12084]~P1279(x120841,a26)+P1146(x120841,a27)
% 32.24/32.04 [12085]~P1279(x120851,a28)+P1146(x120851,a27)
% 32.24/32.04 [12086]~P1279(x120861,a39)+P1146(x120861,a27)
% 32.24/32.04 [12087]~P1279(x120871,a62)+P1146(x120871,a27)
% 32.24/32.04 [12088]~P1279(x120881,a50)+P1146(x120881,a27)
% 32.24/32.04 [12089]~P1279(x120891,a83)+P1146(x120891,a27)
% 32.24/32.04 [12090]~P1279(x120901,a61)+P1146(x120901,a27)
% 32.24/32.04 [12091]~P1279(x120911,a29)+P1146(x120911,a27)
% 32.24/32.04 [12092]~P1279(x120921,a30)+P1146(x120921,a27)
% 32.24/32.04 [12093]~P1279(x120931,a91)+P1146(x120931,a27)
% 32.24/32.04 [12094]~P1279(x120941,a92)+P1146(x120941,a27)
% 32.24/32.04 [12095]~P1279(x120951,a31)+P1146(x120951,a27)
% 32.24/32.04 [12096]~P1279(x120961,a32)+P1146(x120961,a27)
% 32.24/32.04 [12097]~P1279(x120971,a33)+P1146(x120971,a27)
% 32.24/32.04 [12098]~P1279(x120981,a34)+P1146(x120981,a27)
% 32.24/32.04 [12099]~P1279(x120991,a35)+P1146(x120991,a27)
% 32.24/32.04 [12100]~P1279(x121001,a36)+P1146(x121001,a27)
% 32.24/32.04 [12101]~P1279(x121011,a37)+P1146(x121011,a27)
% 32.24/32.04 [12102]~P1279(x121021,a38)+P1146(x121021,a27)
% 32.24/32.04 [12103]~P1279(x121031,a40)+P1146(x121031,a27)
% 32.24/32.04 [12104]~P1279(x121041,a41)+P1146(x121041,a27)
% 32.24/32.04 [12105]~P1271(x121051,a27)+P1146(x121051,a27)
% 32.24/32.04 [12106]~P1271(x121061,a26)+P1146(x121061,a27)
% 32.24/32.04 [12107]~P1271(x121071,a28)+P1146(x121071,a27)
% 32.24/32.04 [12108]~P1271(x121081,a39)+P1146(x121081,a27)
% 32.24/32.04 [12109]~P1271(x121091,a62)+P1146(x121091,a27)
% 32.24/32.04 [12110]~P1271(x121101,a50)+P1146(x121101,a27)
% 32.24/32.04 [12111]~P1271(x121111,a83)+P1146(x121111,a27)
% 32.24/32.04 [12112]~P1271(x121121,a61)+P1146(x121121,a27)
% 32.24/32.04 [12113]~P1271(x121131,a29)+P1146(x121131,a27)
% 32.24/32.04 [12114]~P1271(x121141,a30)+P1146(x121141,a27)
% 32.24/32.04 [12115]~P1271(x121151,a91)+P1146(x121151,a27)
% 32.24/32.04 [12116]~P1271(x121161,a92)+P1146(x121161,a27)
% 32.24/32.04 [12117]~P1271(x121171,a31)+P1146(x121171,a27)
% 32.24/32.04 [12118]~P1271(x121181,a32)+P1146(x121181,a27)
% 32.24/32.04 [12119]~P1271(x121191,a33)+P1146(x121191,a27)
% 32.24/32.04 [12120]~P1271(x121201,a34)+P1146(x121201,a27)
% 32.24/32.04 [12121]~P1271(x121211,a35)+P1146(x121211,a27)
% 32.24/32.04 [12122]~P1271(x121221,a36)+P1146(x121221,a27)
% 32.24/32.04 [12123]~P1271(x121231,a37)+P1146(x121231,a27)
% 32.24/32.04 [12124]~P1271(x121241,a38)+P1146(x121241,a27)
% 32.24/32.04 [12125]~P1271(x121251,a40)+P1146(x121251,a27)
% 32.24/32.04 [12126]~P1271(x121261,a41)+P1146(x121261,a27)
% 32.24/32.04 [12127]~P1271(x121271,a42)+P1146(x121271,a27)
% 32.24/32.04 [12128]~P1271(x121281,a43)+P1146(x121281,a27)
% 32.24/32.04 [12129]~P1249(x121291,a27)+P1146(x121291,a27)
% 32.24/32.04 [12130]~P1249(x121301,a26)+P1146(x121301,a27)
% 32.24/32.04 [12131]~P1249(x121311,a28)+P1146(x121311,a27)
% 32.24/32.04 [12132]~P1249(x121321,a39)+P1146(x121321,a27)
% 32.24/32.04 [12133]~P1249(x121331,a62)+P1146(x121331,a27)
% 32.24/32.04 [12134]~P1249(x121341,a50)+P1146(x121341,a27)
% 32.24/32.04 [12135]~P1249(x121351,a83)+P1146(x121351,a27)
% 32.24/32.04 [12136]~P1249(x121361,a61)+P1146(x121361,a27)
% 32.24/32.04 [12137]~P1249(x121371,a29)+P1146(x121371,a27)
% 32.24/32.04 [12138]~P1249(x121381,a30)+P1146(x121381,a27)
% 32.24/32.04 [12139]~P1249(x121391,a91)+P1146(x121391,a27)
% 32.24/32.04 [12140]~P1249(x121401,a92)+P1146(x121401,a27)
% 32.24/32.04 [12141]~P1249(x121411,a31)+P1146(x121411,a27)
% 32.24/32.04 [12142]~P1249(x121421,a32)+P1146(x121421,a27)
% 32.24/32.04 [12143]~P1249(x121431,a33)+P1146(x121431,a27)
% 32.24/32.04 [12144]~P1249(x121441,a34)+P1146(x121441,a27)
% 32.24/32.04 [12145]~P1249(x121451,a35)+P1146(x121451,a27)
% 32.24/32.04 [12146]~P1249(x121461,a36)+P1146(x121461,a27)
% 32.24/32.04 [12147]~P1249(x121471,a37)+P1146(x121471,a27)
% 32.24/32.04 [12148]~P1249(x121481,a38)+P1146(x121481,a27)
% 32.24/32.04 [12149]~P1249(x121491,a40)+P1146(x121491,a27)
% 32.24/32.04 [12150]~P1249(x121501,a41)+P1146(x121501,a27)
% 32.24/32.04 [12151]~P1249(x121511,a42)+P1146(x121511,a27)
% 32.24/32.04 [12152]~P1249(x121521,a43)+P1146(x121521,a27)
% 32.24/32.04 [12153]~P1249(x121531,a44)+P1146(x121531,a27)
% 32.24/32.04 [12154]~P1249(x121541,a45)+P1146(x121541,a27)
% 32.24/32.04 [12155]~P1239(x121551,a27)+P1146(x121551,a27)
% 32.24/32.04 [12156]~P1239(x121561,a26)+P1146(x121561,a27)
% 32.24/32.04 [12157]~P1239(x121571,a28)+P1146(x121571,a27)
% 32.24/32.04 [12158]~P1239(x121581,a39)+P1146(x121581,a27)
% 32.24/32.04 [12159]~P1239(x121591,a62)+P1146(x121591,a27)
% 32.24/32.04 [12160]~P1239(x121601,a50)+P1146(x121601,a27)
% 32.24/32.04 [12161]~P1239(x121611,a83)+P1146(x121611,a27)
% 32.24/32.04 [12162]~P1239(x121621,a61)+P1146(x121621,a27)
% 32.24/32.04 [12163]~P1239(x121631,a29)+P1146(x121631,a27)
% 32.24/32.04 [12164]~P1239(x121641,a30)+P1146(x121641,a27)
% 32.24/32.04 [12165]~P1239(x121651,a91)+P1146(x121651,a27)
% 32.24/32.04 [12166]~P1239(x121661,a92)+P1146(x121661,a27)
% 32.24/32.04 [12167]~P1239(x121671,a31)+P1146(x121671,a27)
% 32.24/32.04 [12168]~P1239(x121681,a32)+P1146(x121681,a27)
% 32.24/32.04 [12169]~P1239(x121691,a33)+P1146(x121691,a27)
% 32.24/32.04 [12170]~P1239(x121701,a34)+P1146(x121701,a27)
% 32.24/32.04 [12171]~P1239(x121711,a35)+P1146(x121711,a27)
% 32.24/32.04 [12172]~P1239(x121721,a36)+P1146(x121721,a27)
% 32.24/32.04 [12173]~P1239(x121731,a37)+P1146(x121731,a27)
% 32.24/32.04 [12174]~P1239(x121741,a38)+P1146(x121741,a27)
% 32.24/32.04 [12175]~P1239(x121751,a40)+P1146(x121751,a27)
% 32.24/32.04 [12176]~P1239(x121761,a41)+P1146(x121761,a27)
% 32.24/32.04 [12177]~P1239(x121771,a42)+P1146(x121771,a27)
% 32.24/32.04 [12178]~P1239(x121781,a43)+P1146(x121781,a27)
% 32.24/32.04 [12179]~P1239(x121791,a44)+P1146(x121791,a27)
% 32.24/32.04 [12180]~P1239(x121801,a45)+P1146(x121801,a27)
% 32.24/32.04 [12181]~P1239(x121811,a46)+P1146(x121811,a27)
% 32.24/32.04 [12182]~P1239(x121821,a47)+P1146(x121821,a27)
% 32.24/32.04 [12183]~P1225(x121831,a27)+P1146(x121831,a27)
% 32.24/32.04 [12184]~P1225(x121841,a26)+P1146(x121841,a27)
% 32.24/32.04 [12185]~P1225(x121851,a28)+P1146(x121851,a27)
% 32.24/32.04 [12186]~P1225(x121861,a39)+P1146(x121861,a27)
% 32.24/32.04 [12187]~P1225(x121871,a62)+P1146(x121871,a27)
% 32.24/32.04 [12188]~P1225(x121881,a50)+P1146(x121881,a27)
% 32.24/32.04 [12189]~P1225(x121891,a83)+P1146(x121891,a27)
% 32.24/32.04 [12190]~P1225(x121901,a61)+P1146(x121901,a27)
% 32.24/32.04 [12191]~P1225(x121911,a29)+P1146(x121911,a27)
% 32.24/32.04 [12192]~P1225(x121921,a30)+P1146(x121921,a27)
% 32.24/32.04 [12193]~P1225(x121931,a91)+P1146(x121931,a27)
% 32.24/32.04 [12194]~P1225(x121941,a92)+P1146(x121941,a27)
% 32.24/32.04 [12195]~P1225(x121951,a31)+P1146(x121951,a27)
% 32.24/32.04 [12196]~P1225(x121961,a32)+P1146(x121961,a27)
% 32.24/32.04 [12197]~P1225(x121971,a33)+P1146(x121971,a27)
% 32.24/32.04 [12198]~P1225(x121981,a34)+P1146(x121981,a27)
% 32.24/32.04 [12199]~P1225(x121991,a35)+P1146(x121991,a27)
% 32.24/32.04 [12200]~P1225(x122001,a36)+P1146(x122001,a27)
% 32.24/32.04 [12201]~P1225(x122011,a37)+P1146(x122011,a27)
% 32.24/32.04 [12202]~P1225(x122021,a38)+P1146(x122021,a27)
% 32.24/32.04 [12203]~P1225(x122031,a40)+P1146(x122031,a27)
% 32.24/32.04 [12204]~P1225(x122041,a41)+P1146(x122041,a27)
% 32.24/32.04 [12205]~P1225(x122051,a42)+P1146(x122051,a27)
% 32.24/32.04 [12206]~P1225(x122061,a43)+P1146(x122061,a27)
% 32.24/32.04 [12207]~P1225(x122071,a44)+P1146(x122071,a27)
% 32.24/32.04 [12208]~P1225(x122081,a45)+P1146(x122081,a27)
% 32.24/32.04 [12209]~P1225(x122091,a46)+P1146(x122091,a27)
% 32.24/32.04 [12210]~P1225(x122101,a47)+P1146(x122101,a27)
% 32.24/32.04 [12211]~P1225(x122111,a48)+P1146(x122111,a27)
% 32.24/32.04 [12212]~P1225(x122121,a49)+P1146(x122121,a27)
% 32.24/32.04 [12213]~P1217(x122131,a27)+P1146(x122131,a27)
% 32.24/32.04 [12214]~P1217(x122141,a26)+P1146(x122141,a27)
% 32.24/32.04 [12215]~P1217(x122151,a28)+P1146(x122151,a27)
% 32.24/32.04 [12216]~P1217(x122161,a39)+P1146(x122161,a27)
% 32.24/32.04 [12217]~P1217(x122171,a62)+P1146(x122171,a27)
% 32.24/32.04 [12218]~P1217(x122181,a50)+P1146(x122181,a27)
% 32.24/32.04 [12219]~P1217(x122191,a83)+P1146(x122191,a27)
% 32.24/32.04 [12220]~P1217(x122201,a61)+P1146(x122201,a27)
% 32.24/32.04 [12221]~P1217(x122211,a29)+P1146(x122211,a27)
% 32.24/32.04 [12222]~P1217(x122221,a30)+P1146(x122221,a27)
% 32.24/32.04 [12223]~P1217(x122231,a91)+P1146(x122231,a27)
% 32.24/32.04 [12224]~P1217(x122241,a92)+P1146(x122241,a27)
% 32.24/32.04 [12225]~P1217(x122251,a31)+P1146(x122251,a27)
% 32.24/32.04 [12226]~P1217(x122261,a32)+P1146(x122261,a27)
% 32.24/32.04 [12227]~P1217(x122271,a33)+P1146(x122271,a27)
% 32.24/32.04 [12228]~P1217(x122281,a34)+P1146(x122281,a27)
% 32.24/32.04 [12229]~P1217(x122291,a35)+P1146(x122291,a27)
% 32.24/32.04 [12230]~P1217(x122301,a36)+P1146(x122301,a27)
% 32.24/32.04 [12231]~P1217(x122311,a37)+P1146(x122311,a27)
% 32.24/32.04 [12232]~P1217(x122321,a38)+P1146(x122321,a27)
% 32.24/32.04 [12233]~P1217(x122331,a40)+P1146(x122331,a27)
% 32.24/32.04 [12234]~P1217(x122341,a41)+P1146(x122341,a27)
% 32.24/32.04 [12235]~P1217(x122351,a42)+P1146(x122351,a27)
% 32.24/32.04 [12236]~P1217(x122361,a43)+P1146(x122361,a27)
% 32.24/32.04 [12237]~P1217(x122371,a44)+P1146(x122371,a27)
% 32.24/32.04 [12238]~P1217(x122381,a45)+P1146(x122381,a27)
% 32.24/32.04 [12239]~P1217(x122391,a46)+P1146(x122391,a27)
% 32.24/32.04 [12240]~P1217(x122401,a47)+P1146(x122401,a27)
% 32.24/32.04 [12241]~P1217(x122411,a48)+P1146(x122411,a27)
% 32.24/32.04 [12242]~P1217(x122421,a49)+P1146(x122421,a27)
% 32.24/32.04 [12243]~P1217(x122431,a51)+P1146(x122431,a27)
% 32.24/32.04 [12244]~P1217(x122441,a52)+P1146(x122441,a27)
% 32.24/32.04 [12245]~P1199(x122451,a27)+P1146(x122451,a27)
% 32.24/32.04 [12246]~P1199(x122461,a26)+P1146(x122461,a27)
% 32.24/32.04 [12247]~P1199(x122471,a28)+P1146(x122471,a27)
% 32.24/32.04 [12248]~P1199(x122481,a39)+P1146(x122481,a27)
% 32.24/32.04 [12249]~P1199(x122491,a62)+P1146(x122491,a27)
% 32.24/32.04 [12250]~P1199(x122501,a50)+P1146(x122501,a27)
% 32.24/32.04 [12251]~P1199(x122511,a83)+P1146(x122511,a27)
% 32.24/32.04 [12252]~P1199(x122521,a61)+P1146(x122521,a27)
% 32.24/32.04 [12253]~P1199(x122531,a29)+P1146(x122531,a27)
% 32.24/32.04 [12254]~P1199(x122541,a30)+P1146(x122541,a27)
% 32.24/32.04 [12255]~P1199(x122551,a91)+P1146(x122551,a27)
% 32.24/32.04 [12256]~P1199(x122561,a92)+P1146(x122561,a27)
% 32.24/32.04 [12257]~P1199(x122571,a31)+P1146(x122571,a27)
% 32.24/32.04 [12258]~P1199(x122581,a32)+P1146(x122581,a27)
% 32.24/32.04 [12259]~P1199(x122591,a33)+P1146(x122591,a27)
% 32.24/32.04 [12260]~P1199(x122601,a34)+P1146(x122601,a27)
% 32.24/32.04 [12261]~P1199(x122611,a35)+P1146(x122611,a27)
% 32.24/32.04 [12262]~P1199(x122621,a36)+P1146(x122621,a27)
% 32.24/32.04 [12263]~P1199(x122631,a37)+P1146(x122631,a27)
% 32.24/32.04 [12264]~P1199(x122641,a38)+P1146(x122641,a27)
% 32.24/32.04 [12265]~P1199(x122651,a40)+P1146(x122651,a27)
% 32.24/32.04 [12266]~P1199(x122661,a41)+P1146(x122661,a27)
% 32.24/32.04 [12267]~P1199(x122671,a42)+P1146(x122671,a27)
% 32.24/32.04 [12268]~P1199(x122681,a43)+P1146(x122681,a27)
% 32.24/32.04 [12269]~P1199(x122691,a44)+P1146(x122691,a27)
% 32.24/32.04 [12270]~P1199(x122701,a45)+P1146(x122701,a27)
% 32.24/32.04 [12271]~P1199(x122711,a46)+P1146(x122711,a27)
% 32.24/32.04 [12272]~P1199(x122721,a47)+P1146(x122721,a27)
% 32.24/32.04 [12273]~P1199(x122731,a48)+P1146(x122731,a27)
% 32.24/32.04 [12274]~P1199(x122741,a49)+P1146(x122741,a27)
% 32.24/32.04 [12275]~P1199(x122751,a51)+P1146(x122751,a27)
% 32.24/32.04 [12276]~P1199(x122761,a52)+P1146(x122761,a27)
% 32.24/32.04 [12277]~P1199(x122771,a53)+P1146(x122771,a27)
% 32.24/32.04 [12278]~P1199(x122781,a54)+P1146(x122781,a27)
% 32.24/32.04 [12279]~P1188(x122791,a27)+P1146(x122791,a27)
% 32.24/32.04 [12280]~P1188(x122801,a26)+P1146(x122801,a27)
% 32.24/32.04 [12281]~P1188(x122811,a28)+P1146(x122811,a27)
% 32.24/32.04 [12282]~P1188(x122821,a39)+P1146(x122821,a27)
% 32.24/32.04 [12283]~P1188(x122831,a62)+P1146(x122831,a27)
% 32.24/32.04 [12284]~P1188(x122841,a50)+P1146(x122841,a27)
% 32.24/32.04 [12285]~P1188(x122851,a83)+P1146(x122851,a27)
% 32.24/32.04 [12286]~P1188(x122861,a61)+P1146(x122861,a27)
% 32.24/32.04 [12287]~P1188(x122871,a29)+P1146(x122871,a27)
% 32.24/32.04 [12288]~P1188(x122881,a30)+P1146(x122881,a27)
% 32.24/32.04 [12289]~P1188(x122891,a91)+P1146(x122891,a27)
% 32.24/32.04 [12290]~P1188(x122901,a92)+P1146(x122901,a27)
% 32.24/32.04 [12291]~P1188(x122911,a31)+P1146(x122911,a27)
% 32.24/32.04 [12292]~P1188(x122921,a32)+P1146(x122921,a27)
% 32.24/32.04 [12293]~P1188(x122931,a33)+P1146(x122931,a27)
% 32.24/32.04 [12294]~P1188(x122941,a34)+P1146(x122941,a27)
% 32.24/32.04 [12295]~P1188(x122951,a35)+P1146(x122951,a27)
% 32.24/32.04 [12296]~P1188(x122961,a36)+P1146(x122961,a27)
% 32.24/32.04 [12297]~P1188(x122971,a37)+P1146(x122971,a27)
% 32.24/32.04 [12298]~P1188(x122981,a38)+P1146(x122981,a27)
% 32.24/32.04 [12299]~P1188(x122991,a40)+P1146(x122991,a27)
% 32.24/32.04 [12300]~P1188(x123001,a41)+P1146(x123001,a27)
% 32.24/32.04 [12301]~P1188(x123011,a42)+P1146(x123011,a27)
% 32.24/32.04 [12302]~P1188(x123021,a43)+P1146(x123021,a27)
% 32.24/32.04 [12303]~P1188(x123031,a44)+P1146(x123031,a27)
% 32.24/32.04 [12304]~P1188(x123041,a45)+P1146(x123041,a27)
% 32.24/32.04 [12305]~P1188(x123051,a46)+P1146(x123051,a27)
% 32.24/32.04 [12306]~P1188(x123061,a47)+P1146(x123061,a27)
% 32.24/32.04 [12307]~P1188(x123071,a48)+P1146(x123071,a27)
% 32.24/32.04 [12308]~P1188(x123081,a49)+P1146(x123081,a27)
% 32.24/32.04 [12309]~P1188(x123091,a51)+P1146(x123091,a27)
% 32.24/32.04 [12310]~P1188(x123101,a52)+P1146(x123101,a27)
% 32.24/32.04 [12311]~P1188(x123111,a53)+P1146(x123111,a27)
% 32.24/32.04 [12312]~P1188(x123121,a54)+P1146(x123121,a27)
% 32.24/32.04 [12313]~P1188(x123131,a55)+P1146(x123131,a27)
% 32.24/32.04 [12314]~P1188(x123141,a56)+P1146(x123141,a27)
% 32.24/32.04 [12315]~P1175(x123151,a27)+P1146(x123151,a27)
% 32.24/32.04 [12316]~P1175(x123161,a26)+P1146(x123161,a27)
% 32.24/32.04 [12317]~P1175(x123171,a28)+P1146(x123171,a27)
% 32.24/32.04 [12318]~P1175(x123181,a39)+P1146(x123181,a27)
% 32.24/32.04 [12319]~P1175(x123191,a62)+P1146(x123191,a27)
% 32.24/32.04 [12320]~P1175(x123201,a50)+P1146(x123201,a27)
% 32.24/32.04 [12321]~P1175(x123211,a83)+P1146(x123211,a27)
% 32.24/32.04 [12322]~P1175(x123221,a61)+P1146(x123221,a27)
% 32.24/32.04 [12323]~P1175(x123231,a29)+P1146(x123231,a27)
% 32.24/32.04 [12324]~P1175(x123241,a30)+P1146(x123241,a27)
% 32.24/32.04 [12325]~P1175(x123251,a91)+P1146(x123251,a27)
% 32.24/32.04 [12326]~P1175(x123261,a92)+P1146(x123261,a27)
% 32.24/32.04 [12327]~P1175(x123271,a31)+P1146(x123271,a27)
% 32.24/32.04 [12328]~P1175(x123281,a32)+P1146(x123281,a27)
% 32.24/32.04 [12329]~P1175(x123291,a33)+P1146(x123291,a27)
% 32.24/32.04 [12330]~P1175(x123301,a34)+P1146(x123301,a27)
% 32.24/32.04 [12331]~P1175(x123311,a35)+P1146(x123311,a27)
% 32.24/32.04 [12332]~P1175(x123321,a36)+P1146(x123321,a27)
% 32.24/32.04 [12333]~P1175(x123331,a37)+P1146(x123331,a27)
% 32.24/32.04 [12334]~P1175(x123341,a38)+P1146(x123341,a27)
% 32.24/32.04 [12335]~P1175(x123351,a40)+P1146(x123351,a27)
% 32.24/32.04 [12336]~P1175(x123361,a41)+P1146(x123361,a27)
% 32.24/32.04 [12337]~P1175(x123371,a42)+P1146(x123371,a27)
% 32.24/32.04 [12338]~P1175(x123381,a43)+P1146(x123381,a27)
% 32.24/32.04 [12339]~P1175(x123391,a44)+P1146(x123391,a27)
% 32.24/32.04 [12340]~P1175(x123401,a45)+P1146(x123401,a27)
% 32.24/32.04 [12341]~P1175(x123411,a46)+P1146(x123411,a27)
% 32.24/32.04 [12342]~P1175(x123421,a47)+P1146(x123421,a27)
% 32.24/32.04 [12343]~P1175(x123431,a48)+P1146(x123431,a27)
% 32.24/32.04 [12344]~P1175(x123441,a49)+P1146(x123441,a27)
% 32.24/32.04 [12345]~P1175(x123451,a51)+P1146(x123451,a27)
% 32.24/32.04 [12346]~P1175(x123461,a52)+P1146(x123461,a27)
% 32.24/32.04 [12347]~P1175(x123471,a53)+P1146(x123471,a27)
% 32.24/32.04 [12348]~P1175(x123481,a54)+P1146(x123481,a27)
% 32.24/32.04 [12349]~P1175(x123491,a55)+P1146(x123491,a27)
% 32.24/32.04 [12350]~P1175(x123501,a56)+P1146(x123501,a27)
% 32.24/32.04 [12351]~P1175(x123511,a57)+P1146(x123511,a27)
% 32.24/32.04 [12352]~P1175(x123521,a58)+P1146(x123521,a27)
% 32.24/32.04 [12353]~P1165(x123531,a27)+P1146(x123531,a27)
% 32.24/32.04 [12354]~P1165(x123541,a26)+P1146(x123541,a27)
% 32.24/32.04 [12355]~P1165(x123551,a28)+P1146(x123551,a27)
% 32.24/32.04 [12356]~P1165(x123561,a39)+P1146(x123561,a27)
% 32.24/32.04 [12357]~P1165(x123571,a62)+P1146(x123571,a27)
% 32.24/32.04 [12358]~P1165(x123581,a50)+P1146(x123581,a27)
% 32.24/32.04 [12359]~P1165(x123591,a83)+P1146(x123591,a27)
% 32.24/32.04 [12360]~P1165(x123601,a61)+P1146(x123601,a27)
% 32.24/32.04 [12361]~P1165(x123611,a29)+P1146(x123611,a27)
% 32.24/32.04 [12362]~P1165(x123621,a30)+P1146(x123621,a27)
% 32.24/32.04 [12363]~P1165(x123631,a91)+P1146(x123631,a27)
% 32.24/32.04 [12364]~P1165(x123641,a92)+P1146(x123641,a27)
% 32.24/32.04 [12365]~P1165(x123651,a31)+P1146(x123651,a27)
% 32.24/32.04 [12366]~P1165(x123661,a32)+P1146(x123661,a27)
% 32.24/32.04 [12367]~P1165(x123671,a33)+P1146(x123671,a27)
% 32.24/32.04 [12368]~P1165(x123681,a34)+P1146(x123681,a27)
% 32.24/32.04 [12369]~P1165(x123691,a35)+P1146(x123691,a27)
% 32.24/32.04 [12370]~P1165(x123701,a36)+P1146(x123701,a27)
% 32.24/32.04 [12371]~P1165(x123711,a37)+P1146(x123711,a27)
% 32.24/32.04 [12372]~P1165(x123721,a38)+P1146(x123721,a27)
% 32.24/32.04 [12373]~P1165(x123731,a40)+P1146(x123731,a27)
% 32.24/32.04 [12374]~P1165(x123741,a41)+P1146(x123741,a27)
% 32.24/32.04 [12375]~P1165(x123751,a42)+P1146(x123751,a27)
% 32.24/32.04 [12376]~P1165(x123761,a43)+P1146(x123761,a27)
% 32.24/32.04 [12377]~P1165(x123771,a44)+P1146(x123771,a27)
% 32.24/32.04 [12378]~P1165(x123781,a45)+P1146(x123781,a27)
% 32.24/32.04 [12379]~P1165(x123791,a46)+P1146(x123791,a27)
% 32.24/32.04 [12380]~P1165(x123801,a47)+P1146(x123801,a27)
% 32.24/32.04 [12381]~P1165(x123811,a48)+P1146(x123811,a27)
% 32.24/32.04 [12382]~P1165(x123821,a49)+P1146(x123821,a27)
% 32.24/32.04 [12383]~P1165(x123831,a51)+P1146(x123831,a27)
% 32.24/32.04 [12384]~P1165(x123841,a52)+P1146(x123841,a27)
% 32.24/32.04 [12385]~P1165(x123851,a53)+P1146(x123851,a27)
% 32.24/32.04 [12386]~P1165(x123861,a54)+P1146(x123861,a27)
% 32.24/32.04 [12387]~P1165(x123871,a55)+P1146(x123871,a27)
% 32.24/32.04 [12388]~P1165(x123881,a56)+P1146(x123881,a27)
% 32.24/32.04 [12389]~P1165(x123891,a57)+P1146(x123891,a27)
% 32.24/32.04 [12390]~P1165(x123901,a58)+P1146(x123901,a27)
% 32.24/32.04 [12391]~P1165(x123911,a59)+P1146(x123911,a27)
% 32.24/32.04 [12392]~P1165(x123921,a60)+P1146(x123921,a27)
% 32.24/32.04 [12393]~P1358(x123931,a27)+P1146(x123931,a26)
% 32.24/32.04 [12394]~P1358(x123941,a26)+P1146(x123941,a26)
% 32.24/32.04 [12395]~P1358(x123951,a28)+P1146(x123951,a26)
% 32.24/32.04 [12396]~P1358(x123961,a39)+P1146(x123961,a26)
% 32.24/32.04 [12397]~P1358(x123971,a62)+P1146(x123971,a26)
% 32.24/32.04 [12398]~P1358(x123981,a50)+P1146(x123981,a26)
% 32.24/32.04 [12399]~P1358(x123991,a83)+P1146(x123991,a26)
% 32.24/32.04 [12400]~P1358(x124001,a61)+P1146(x124001,a26)
% 32.24/32.04 [12401]~P1358(x124011,a29)+P1146(x124011,a26)
% 32.24/32.04 [12402]~P1358(x124021,a30)+P1146(x124021,a26)
% 32.24/32.04 [12403]~P1358(x124031,a91)+P1146(x124031,a26)
% 32.24/32.04 [12404]~P1358(x124041,a92)+P1146(x124041,a26)
% 32.24/32.04 [12405]~P1329(x124051,a27)+P1146(x124051,a26)
% 32.24/32.04 [12406]~P1329(x124061,a26)+P1146(x124061,a26)
% 32.24/32.04 [12407]~P1329(x124071,a28)+P1146(x124071,a26)
% 32.24/32.04 [12408]~P1329(x124081,a39)+P1146(x124081,a26)
% 32.24/32.04 [12409]~P1329(x124091,a62)+P1146(x124091,a26)
% 32.24/32.04 [12410]~P1329(x124101,a50)+P1146(x124101,a26)
% 32.24/32.04 [12411]~P1329(x124111,a83)+P1146(x124111,a26)
% 32.24/32.04 [12412]~P1329(x124121,a61)+P1146(x124121,a26)
% 32.24/32.04 [12413]~P1329(x124131,a29)+P1146(x124131,a26)
% 32.24/32.04 [12414]~P1329(x124141,a30)+P1146(x124141,a26)
% 32.24/32.04 [12415]~P1329(x124151,a91)+P1146(x124151,a26)
% 32.24/32.04 [12416]~P1329(x124161,a92)+P1146(x124161,a26)
% 32.24/32.04 [12417]~P1329(x124171,a31)+P1146(x124171,a26)
% 32.24/32.04 [12418]~P1329(x124181,a32)+P1146(x124181,a26)
% 32.24/32.04 [12419]~P1329(x124191,a33)+P1146(x124191,a26)
% 32.24/32.04 [12420]~P1329(x124201,a34)+P1146(x124201,a26)
% 32.24/32.04 [12421]~P1303(x124211,a27)+P1146(x124211,a26)
% 32.24/32.04 [12422]~P1303(x124221,a26)+P1146(x124221,a26)
% 32.24/32.04 [12423]~P1303(x124231,a28)+P1146(x124231,a26)
% 32.24/32.04 [12424]~P1303(x124241,a39)+P1146(x124241,a26)
% 32.24/32.04 [12425]~P1303(x124251,a62)+P1146(x124251,a26)
% 32.24/32.04 [12426]~P1303(x124261,a50)+P1146(x124261,a26)
% 32.24/32.04 [12427]~P1303(x124271,a83)+P1146(x124271,a26)
% 32.24/32.04 [12428]~P1303(x124281,a61)+P1146(x124281,a26)
% 32.24/32.04 [12429]~P1303(x124291,a29)+P1146(x124291,a26)
% 32.24/32.04 [12430]~P1303(x124301,a30)+P1146(x124301,a26)
% 32.24/32.04 [12431]~P1303(x124311,a91)+P1146(x124311,a26)
% 32.24/32.04 [12432]~P1303(x124321,a92)+P1146(x124321,a26)
% 32.24/32.04 [12433]~P1303(x124331,a31)+P1146(x124331,a26)
% 32.24/32.04 [12434]~P1303(x124341,a32)+P1146(x124341,a26)
% 32.24/32.04 [12435]~P1303(x124351,a33)+P1146(x124351,a26)
% 32.24/32.04 [12436]~P1303(x124361,a34)+P1146(x124361,a26)
% 32.24/32.04 [12437]~P1303(x124371,a35)+P1146(x124371,a26)
% 32.24/32.04 [12438]~P1303(x124381,a36)+P1146(x124381,a26)
% 32.24/32.04 [12439]~P1303(x124391,a37)+P1146(x124391,a26)
% 32.24/32.04 [12440]~P1303(x124401,a38)+P1146(x124401,a26)
% 32.24/32.04 [12441]~P1281(x124411,a27)+P1146(x124411,a26)
% 32.24/32.04 [12442]~P1281(x124421,a26)+P1146(x124421,a26)
% 32.24/32.04 [12443]~P1281(x124431,a28)+P1146(x124431,a26)
% 32.24/32.04 [12444]~P1281(x124441,a39)+P1146(x124441,a26)
% 32.24/32.04 [12445]~P1281(x124451,a62)+P1146(x124451,a26)
% 32.24/32.04 [12446]~P1281(x124461,a50)+P1146(x124461,a26)
% 32.24/32.04 [12447]~P1281(x124471,a83)+P1146(x124471,a26)
% 32.24/32.04 [12448]~P1281(x124481,a61)+P1146(x124481,a26)
% 32.24/32.04 [12449]~P1281(x124491,a29)+P1146(x124491,a26)
% 32.24/32.04 [12450]~P1281(x124501,a30)+P1146(x124501,a26)
% 32.24/32.04 [12451]~P1281(x124511,a91)+P1146(x124511,a26)
% 32.24/32.04 [12452]~P1281(x124521,a92)+P1146(x124521,a26)
% 32.24/32.04 [12453]~P1281(x124531,a31)+P1146(x124531,a26)
% 32.24/32.04 [12454]~P1281(x124541,a32)+P1146(x124541,a26)
% 32.24/32.04 [12455]~P1281(x124551,a33)+P1146(x124551,a26)
% 32.24/32.04 [12456]~P1281(x124561,a34)+P1146(x124561,a26)
% 32.24/32.04 [12457]~P1281(x124571,a35)+P1146(x124571,a26)
% 32.24/32.04 [12458]~P1281(x124581,a36)+P1146(x124581,a26)
% 32.24/32.04 [12459]~P1281(x124591,a37)+P1146(x124591,a26)
% 32.24/32.04 [12460]~P1281(x124601,a38)+P1146(x124601,a26)
% 32.24/32.04 [12461]~P1281(x124611,a40)+P1146(x124611,a26)
% 32.24/32.04 [12462]~P1281(x124621,a41)+P1146(x124621,a26)
% 32.24/32.04 [12463]~P1281(x124631,a42)+P1146(x124631,a26)
% 32.24/32.04 [12464]~P1281(x124641,a43)+P1146(x124641,a26)
% 32.24/32.04 [12465]~P1250(x124651,a27)+P1146(x124651,a26)
% 32.24/32.04 [12466]~P1250(x124661,a26)+P1146(x124661,a26)
% 32.24/32.04 [12467]~P1250(x124671,a28)+P1146(x124671,a26)
% 32.24/32.04 [12468]~P1250(x124681,a39)+P1146(x124681,a26)
% 32.24/32.04 [12469]~P1250(x124691,a62)+P1146(x124691,a26)
% 32.24/32.04 [12470]~P1250(x124701,a50)+P1146(x124701,a26)
% 32.24/32.04 [12471]~P1250(x124711,a83)+P1146(x124711,a26)
% 32.24/32.04 [12472]~P1250(x124721,a61)+P1146(x124721,a26)
% 32.24/32.04 [12473]~P1250(x124731,a29)+P1146(x124731,a26)
% 32.24/32.04 [12474]~P1250(x124741,a30)+P1146(x124741,a26)
% 32.24/32.04 [12475]~P1250(x124751,a91)+P1146(x124751,a26)
% 32.24/32.04 [12476]~P1250(x124761,a92)+P1146(x124761,a26)
% 32.24/32.04 [12477]~P1250(x124771,a31)+P1146(x124771,a26)
% 32.24/32.04 [12478]~P1250(x124781,a32)+P1146(x124781,a26)
% 32.24/32.04 [12479]~P1250(x124791,a33)+P1146(x124791,a26)
% 32.24/32.04 [12480]~P1250(x124801,a34)+P1146(x124801,a26)
% 32.24/32.04 [12481]~P1250(x124811,a35)+P1146(x124811,a26)
% 32.24/32.04 [12482]~P1250(x124821,a36)+P1146(x124821,a26)
% 32.24/32.04 [12483]~P1250(x124831,a37)+P1146(x124831,a26)
% 32.24/32.04 [12484]~P1250(x124841,a38)+P1146(x124841,a26)
% 32.24/32.04 [12485]~P1250(x124851,a40)+P1146(x124851,a26)
% 32.24/32.04 [12486]~P1250(x124861,a41)+P1146(x124861,a26)
% 32.24/32.04 [12487]~P1250(x124871,a42)+P1146(x124871,a26)
% 32.24/32.04 [12488]~P1250(x124881,a43)+P1146(x124881,a26)
% 32.24/32.04 [12489]~P1250(x124891,a44)+P1146(x124891,a26)
% 32.24/32.04 [12490]~P1250(x124901,a45)+P1146(x124901,a26)
% 32.24/32.04 [12491]~P1250(x124911,a46)+P1146(x124911,a26)
% 32.24/32.04 [12492]~P1250(x124921,a47)+P1146(x124921,a26)
% 32.24/32.04 [12493]~P1227(x124931,a27)+P1146(x124931,a26)
% 32.24/32.04 [12494]~P1227(x124941,a26)+P1146(x124941,a26)
% 32.24/32.04 [12495]~P1227(x124951,a28)+P1146(x124951,a26)
% 32.24/32.04 [12496]~P1227(x124961,a39)+P1146(x124961,a26)
% 32.24/32.04 [12497]~P1227(x124971,a62)+P1146(x124971,a26)
% 32.24/32.04 [12498]~P1227(x124981,a50)+P1146(x124981,a26)
% 32.24/32.04 [12499]~P1227(x124991,a83)+P1146(x124991,a26)
% 32.24/32.04 [12500]~P1227(x125001,a61)+P1146(x125001,a26)
% 32.24/32.04 [12501]~P1227(x125011,a29)+P1146(x125011,a26)
% 32.24/32.04 [12502]~P1227(x125021,a30)+P1146(x125021,a26)
% 32.24/32.04 [12503]~P1227(x125031,a91)+P1146(x125031,a26)
% 32.24/32.04 [12504]~P1227(x125041,a92)+P1146(x125041,a26)
% 32.24/32.04 [12505]~P1227(x125051,a31)+P1146(x125051,a26)
% 32.24/32.04 [12506]~P1227(x125061,a32)+P1146(x125061,a26)
% 32.24/32.04 [12507]~P1227(x125071,a33)+P1146(x125071,a26)
% 32.24/32.04 [12508]~P1227(x125081,a34)+P1146(x125081,a26)
% 32.24/32.04 [12509]~P1227(x125091,a35)+P1146(x125091,a26)
% 32.24/32.04 [12510]~P1227(x125101,a36)+P1146(x125101,a26)
% 32.24/32.04 [12511]~P1227(x125111,a37)+P1146(x125111,a26)
% 32.24/32.04 [12512]~P1227(x125121,a38)+P1146(x125121,a26)
% 32.24/32.04 [12513]~P1227(x125131,a40)+P1146(x125131,a26)
% 32.24/32.04 [12514]~P1227(x125141,a41)+P1146(x125141,a26)
% 32.24/32.04 [12515]~P1227(x125151,a42)+P1146(x125151,a26)
% 32.24/32.04 [12516]~P1227(x125161,a43)+P1146(x125161,a26)
% 32.24/32.04 [12517]~P1227(x125171,a44)+P1146(x125171,a26)
% 32.24/32.04 [12518]~P1227(x125181,a45)+P1146(x125181,a26)
% 32.24/32.04 [12519]~P1227(x125191,a46)+P1146(x125191,a26)
% 32.24/32.04 [12520]~P1227(x125201,a47)+P1146(x125201,a26)
% 32.24/32.04 [12521]~P1227(x125211,a48)+P1146(x125211,a26)
% 32.24/32.04 [12522]~P1227(x125221,a49)+P1146(x125221,a26)
% 32.24/32.04 [12523]~P1227(x125231,a51)+P1146(x125231,a26)
% 32.24/32.04 [12524]~P1227(x125241,a52)+P1146(x125241,a26)
% 32.24/32.04 [12525]~P1200(x125251,a27)+P1146(x125251,a26)
% 32.24/32.04 [12526]~P1200(x125261,a26)+P1146(x125261,a26)
% 32.24/32.04 [12527]~P1200(x125271,a28)+P1146(x125271,a26)
% 32.24/32.04 [12528]~P1200(x125281,a39)+P1146(x125281,a26)
% 32.24/32.04 [12529]~P1200(x125291,a62)+P1146(x125291,a26)
% 32.24/32.04 [12530]~P1200(x125301,a50)+P1146(x125301,a26)
% 32.24/32.04 [12531]~P1200(x125311,a83)+P1146(x125311,a26)
% 32.24/32.04 [12532]~P1200(x125321,a61)+P1146(x125321,a26)
% 32.24/32.04 [12533]~P1200(x125331,a29)+P1146(x125331,a26)
% 32.24/32.04 [12534]~P1200(x125341,a30)+P1146(x125341,a26)
% 32.24/32.04 [12535]~P1200(x125351,a91)+P1146(x125351,a26)
% 32.24/32.04 [12536]~P1200(x125361,a92)+P1146(x125361,a26)
% 32.24/32.04 [12537]~P1200(x125371,a31)+P1146(x125371,a26)
% 32.24/32.04 [12538]~P1200(x125381,a32)+P1146(x125381,a26)
% 32.24/32.04 [12539]~P1200(x125391,a33)+P1146(x125391,a26)
% 32.24/32.04 [12540]~P1200(x125401,a34)+P1146(x125401,a26)
% 32.24/32.04 [12541]~P1200(x125411,a35)+P1146(x125411,a26)
% 32.24/32.04 [12542]~P1200(x125421,a36)+P1146(x125421,a26)
% 32.24/32.04 [12543]~P1200(x125431,a37)+P1146(x125431,a26)
% 32.24/32.04 [12544]~P1200(x125441,a38)+P1146(x125441,a26)
% 32.24/32.04 [12545]~P1200(x125451,a40)+P1146(x125451,a26)
% 32.24/32.04 [12546]~P1200(x125461,a41)+P1146(x125461,a26)
% 32.24/32.04 [12547]~P1200(x125471,a42)+P1146(x125471,a26)
% 32.24/32.04 [12548]~P1200(x125481,a43)+P1146(x125481,a26)
% 32.24/32.04 [12549]~P1200(x125491,a44)+P1146(x125491,a26)
% 32.24/32.04 [12550]~P1200(x125501,a45)+P1146(x125501,a26)
% 32.24/32.04 [12551]~P1200(x125511,a46)+P1146(x125511,a26)
% 32.24/32.04 [12552]~P1200(x125521,a47)+P1146(x125521,a26)
% 32.24/32.04 [12553]~P1200(x125531,a48)+P1146(x125531,a26)
% 32.24/32.04 [12554]~P1200(x125541,a49)+P1146(x125541,a26)
% 32.24/32.04 [12555]~P1200(x125551,a51)+P1146(x125551,a26)
% 32.24/32.04 [12556]~P1200(x125561,a52)+P1146(x125561,a26)
% 32.24/32.04 [12557]~P1200(x125571,a53)+P1146(x125571,a26)
% 32.24/32.04 [12558]~P1200(x125581,a54)+P1146(x125581,a26)
% 32.24/32.04 [12559]~P1200(x125591,a55)+P1146(x125591,a26)
% 32.24/32.04 [12560]~P1200(x125601,a56)+P1146(x125601,a26)
% 32.24/32.04 [12561]~P1176(x125611,a27)+P1146(x125611,a26)
% 32.24/32.04 [12562]~P1176(x125621,a26)+P1146(x125621,a26)
% 32.24/32.04 [12563]~P1176(x125631,a28)+P1146(x125631,a26)
% 32.24/32.04 [12564]~P1176(x125641,a39)+P1146(x125641,a26)
% 32.24/32.04 [12565]~P1176(x125651,a62)+P1146(x125651,a26)
% 32.24/32.04 [12566]~P1176(x125661,a50)+P1146(x125661,a26)
% 32.24/32.04 [12567]~P1176(x125671,a83)+P1146(x125671,a26)
% 32.24/32.04 [12568]~P1176(x125681,a61)+P1146(x125681,a26)
% 32.24/32.04 [12569]~P1176(x125691,a29)+P1146(x125691,a26)
% 32.24/32.04 [12570]~P1176(x125701,a30)+P1146(x125701,a26)
% 32.24/32.04 [12571]~P1176(x125711,a91)+P1146(x125711,a26)
% 32.24/32.04 [12572]~P1176(x125721,a92)+P1146(x125721,a26)
% 32.24/32.04 [12573]~P1176(x125731,a31)+P1146(x125731,a26)
% 32.24/32.04 [12574]~P1176(x125741,a32)+P1146(x125741,a26)
% 32.24/32.04 [12575]~P1176(x125751,a33)+P1146(x125751,a26)
% 32.24/32.04 [12576]~P1176(x125761,a34)+P1146(x125761,a26)
% 32.24/32.04 [12577]~P1176(x125771,a35)+P1146(x125771,a26)
% 32.24/32.04 [12578]~P1176(x125781,a36)+P1146(x125781,a26)
% 32.24/32.04 [12579]~P1176(x125791,a37)+P1146(x125791,a26)
% 32.24/32.04 [12580]~P1176(x125801,a38)+P1146(x125801,a26)
% 32.24/32.04 [12581]~P1176(x125811,a40)+P1146(x125811,a26)
% 32.24/32.04 [12582]~P1176(x125821,a41)+P1146(x125821,a26)
% 32.24/32.04 [12583]~P1176(x125831,a42)+P1146(x125831,a26)
% 32.24/32.04 [12584]~P1176(x125841,a43)+P1146(x125841,a26)
% 32.24/32.04 [12585]~P1176(x125851,a44)+P1146(x125851,a26)
% 32.24/32.04 [12586]~P1176(x125861,a45)+P1146(x125861,a26)
% 32.24/32.04 [12587]~P1176(x125871,a46)+P1146(x125871,a26)
% 32.24/32.04 [12588]~P1176(x125881,a47)+P1146(x125881,a26)
% 32.24/32.04 [12589]~P1176(x125891,a48)+P1146(x125891,a26)
% 32.24/32.04 [12590]~P1176(x125901,a49)+P1146(x125901,a26)
% 32.24/32.04 [12591]~P1176(x125911,a51)+P1146(x125911,a26)
% 32.24/32.04 [12592]~P1176(x125921,a52)+P1146(x125921,a26)
% 32.24/32.04 [12593]~P1176(x125931,a53)+P1146(x125931,a26)
% 32.24/32.04 [12594]~P1176(x125941,a54)+P1146(x125941,a26)
% 32.24/32.04 [12595]~P1176(x125951,a55)+P1146(x125951,a26)
% 32.24/32.04 [12596]~P1176(x125961,a56)+P1146(x125961,a26)
% 32.24/32.04 [12597]~P1176(x125971,a57)+P1146(x125971,a26)
% 32.24/32.04 [12598]~P1176(x125981,a58)+P1146(x125981,a26)
% 32.24/32.04 [12599]~P1176(x125991,a59)+P1146(x125991,a26)
% 32.24/32.04 [12600]~P1176(x126001,a60)+P1146(x126001,a26)
% 32.24/32.04 [12601]~P1359(x126011,a27)+P1146(x126011,a28)
% 32.24/32.04 [12602]~P1359(x126021,a26)+P1146(x126021,a28)
% 32.24/32.04 [12603]~P1359(x126031,a28)+P1146(x126031,a28)
% 32.24/32.04 [12604]~P1359(x126041,a39)+P1146(x126041,a28)
% 32.24/32.04 [12605]~P1359(x126051,a62)+P1146(x126051,a28)
% 32.24/32.04 [12606]~P1359(x126061,a50)+P1146(x126061,a28)
% 32.24/32.04 [12607]~P1359(x126071,a83)+P1146(x126071,a28)
% 32.24/32.04 [12608]~P1359(x126081,a61)+P1146(x126081,a28)
% 32.24/32.04 [12609]~P1359(x126091,a29)+P1146(x126091,a28)
% 32.24/32.04 [12610]~P1359(x126101,a30)+P1146(x126101,a28)
% 32.24/32.04 [12611]~P1359(x126111,a91)+P1146(x126111,a28)
% 32.24/32.04 [12612]~P1359(x126121,a92)+P1146(x126121,a28)
% 32.24/32.04 [12613]~P1359(x126131,a31)+P1146(x126131,a28)
% 32.24/32.04 [12614]~P1359(x126141,a32)+P1146(x126141,a28)
% 32.24/32.04 [12615]~P1359(x126151,a33)+P1146(x126151,a28)
% 32.24/32.04 [12616]~P1359(x126161,a34)+P1146(x126161,a28)
% 32.24/32.04 [12617]~P1304(x126171,a27)+P1146(x126171,a28)
% 32.24/32.04 [12618]~P1304(x126181,a26)+P1146(x126181,a28)
% 32.24/32.04 [12619]~P1304(x126191,a28)+P1146(x126191,a28)
% 32.24/32.04 [12620]~P1304(x126201,a39)+P1146(x126201,a28)
% 32.24/32.04 [12621]~P1304(x126211,a62)+P1146(x126211,a28)
% 32.24/32.04 [12622]~P1304(x126221,a50)+P1146(x126221,a28)
% 32.24/32.04 [12623]~P1304(x126231,a83)+P1146(x126231,a28)
% 32.24/32.04 [12624]~P1304(x126241,a61)+P1146(x126241,a28)
% 32.24/32.04 [12625]~P1304(x126251,a29)+P1146(x126251,a28)
% 32.24/32.04 [12626]~P1304(x126261,a30)+P1146(x126261,a28)
% 32.24/32.04 [12627]~P1304(x126271,a91)+P1146(x126271,a28)
% 32.24/32.04 [12628]~P1304(x126281,a92)+P1146(x126281,a28)
% 32.24/32.04 [12629]~P1304(x126291,a31)+P1146(x126291,a28)
% 32.24/32.04 [12630]~P1304(x126301,a32)+P1146(x126301,a28)
% 32.24/32.04 [12631]~P1304(x126311,a33)+P1146(x126311,a28)
% 32.24/32.04 [12632]~P1304(x126321,a34)+P1146(x126321,a28)
% 32.24/32.04 [12633]~P1304(x126331,a35)+P1146(x126331,a28)
% 32.24/32.04 [12634]~P1304(x126341,a36)+P1146(x126341,a28)
% 32.24/32.04 [12635]~P1304(x126351,a37)+P1146(x126351,a28)
% 32.24/32.04 [12636]~P1304(x126361,a38)+P1146(x126361,a28)
% 32.24/32.04 [12637]~P1304(x126371,a40)+P1146(x126371,a28)
% 32.24/32.04 [12638]~P1304(x126381,a41)+P1146(x126381,a28)
% 32.24/32.04 [12639]~P1304(x126391,a42)+P1146(x126391,a28)
% 32.24/32.04 [12640]~P1304(x126401,a43)+P1146(x126401,a28)
% 32.24/32.04 [12641]~P1251(x126411,a27)+P1146(x126411,a28)
% 32.24/32.04 [12642]~P1251(x126421,a26)+P1146(x126421,a28)
% 32.24/32.04 [12643]~P1251(x126431,a28)+P1146(x126431,a28)
% 32.24/32.04 [12644]~P1251(x126441,a39)+P1146(x126441,a28)
% 32.24/32.04 [12645]~P1251(x126451,a62)+P1146(x126451,a28)
% 32.24/32.04 [12646]~P1251(x126461,a50)+P1146(x126461,a28)
% 32.24/32.04 [12647]~P1251(x126471,a83)+P1146(x126471,a28)
% 32.24/32.04 [12648]~P1251(x126481,a61)+P1146(x126481,a28)
% 32.24/32.04 [12649]~P1251(x126491,a29)+P1146(x126491,a28)
% 32.24/32.04 [12650]~P1251(x126501,a30)+P1146(x126501,a28)
% 32.24/32.04 [12651]~P1251(x126511,a91)+P1146(x126511,a28)
% 32.24/32.04 [12652]~P1251(x126521,a92)+P1146(x126521,a28)
% 32.24/32.04 [12653]~P1251(x126531,a31)+P1146(x126531,a28)
% 32.24/32.04 [12654]~P1251(x126541,a32)+P1146(x126541,a28)
% 32.24/32.04 [12655]~P1251(x126551,a33)+P1146(x126551,a28)
% 32.24/32.04 [12656]~P1251(x126561,a34)+P1146(x126561,a28)
% 32.24/32.04 [12657]~P1251(x126571,a35)+P1146(x126571,a28)
% 32.24/32.04 [12658]~P1251(x126581,a36)+P1146(x126581,a28)
% 32.24/32.04 [12659]~P1251(x126591,a37)+P1146(x126591,a28)
% 32.24/32.04 [12660]~P1251(x126601,a38)+P1146(x126601,a28)
% 32.24/32.04 [12661]~P1251(x126611,a40)+P1146(x126611,a28)
% 32.24/32.04 [12662]~P1251(x126621,a41)+P1146(x126621,a28)
% 32.24/32.04 [12663]~P1251(x126631,a42)+P1146(x126631,a28)
% 32.24/32.04 [12664]~P1251(x126641,a43)+P1146(x126641,a28)
% 32.24/32.04 [12665]~P1251(x126651,a44)+P1146(x126651,a28)
% 32.24/32.04 [12666]~P1251(x126661,a45)+P1146(x126661,a28)
% 32.24/32.04 [12667]~P1251(x126671,a46)+P1146(x126671,a28)
% 32.24/32.04 [12668]~P1251(x126681,a47)+P1146(x126681,a28)
% 32.24/32.04 [12669]~P1251(x126691,a48)+P1146(x126691,a28)
% 32.24/32.04 [12670]~P1251(x126701,a49)+P1146(x126701,a28)
% 32.24/32.04 [12671]~P1251(x126711,a51)+P1146(x126711,a28)
% 32.24/32.04 [12672]~P1251(x126721,a52)+P1146(x126721,a28)
% 32.24/32.04 [12673]~P1201(x126731,a27)+P1146(x126731,a28)
% 32.24/32.04 [12674]~P1201(x126741,a26)+P1146(x126741,a28)
% 32.24/32.04 [12675]~P1201(x126751,a28)+P1146(x126751,a28)
% 32.24/32.04 [12676]~P1201(x126761,a39)+P1146(x126761,a28)
% 32.24/32.04 [12677]~P1201(x126771,a62)+P1146(x126771,a28)
% 32.24/32.04 [12678]~P1201(x126781,a50)+P1146(x126781,a28)
% 32.24/32.04 [12679]~P1201(x126791,a83)+P1146(x126791,a28)
% 32.24/32.04 [12680]~P1201(x126801,a61)+P1146(x126801,a28)
% 32.24/32.04 [12681]~P1201(x126811,a29)+P1146(x126811,a28)
% 32.24/32.04 [12682]~P1201(x126821,a30)+P1146(x126821,a28)
% 32.24/32.04 [12683]~P1201(x126831,a91)+P1146(x126831,a28)
% 32.24/32.04 [12684]~P1201(x126841,a92)+P1146(x126841,a28)
% 32.24/32.04 [12685]~P1201(x126851,a31)+P1146(x126851,a28)
% 32.24/32.04 [12686]~P1201(x126861,a32)+P1146(x126861,a28)
% 32.24/32.04 [12687]~P1201(x126871,a33)+P1146(x126871,a28)
% 32.24/32.04 [12688]~P1201(x126881,a34)+P1146(x126881,a28)
% 32.24/32.04 [12689]~P1201(x126891,a35)+P1146(x126891,a28)
% 32.24/32.04 [12690]~P1201(x126901,a36)+P1146(x126901,a28)
% 32.24/32.04 [12691]~P1201(x126911,a37)+P1146(x126911,a28)
% 32.24/32.04 [12692]~P1201(x126921,a38)+P1146(x126921,a28)
% 32.24/32.04 [12693]~P1201(x126931,a40)+P1146(x126931,a28)
% 32.24/32.04 [12694]~P1201(x126941,a41)+P1146(x126941,a28)
% 32.24/32.04 [12695]~P1201(x126951,a42)+P1146(x126951,a28)
% 32.24/32.04 [12696]~P1201(x126961,a43)+P1146(x126961,a28)
% 32.24/32.04 [12697]~P1201(x126971,a44)+P1146(x126971,a28)
% 32.24/32.04 [12698]~P1201(x126981,a45)+P1146(x126981,a28)
% 32.24/32.04 [12699]~P1201(x126991,a46)+P1146(x126991,a28)
% 32.24/32.04 [12700]~P1201(x127001,a47)+P1146(x127001,a28)
% 32.24/32.04 [12701]~P1201(x127011,a48)+P1146(x127011,a28)
% 32.24/32.04 [12702]~P1201(x127021,a49)+P1146(x127021,a28)
% 32.24/32.04 [12703]~P1201(x127031,a51)+P1146(x127031,a28)
% 32.24/32.04 [12704]~P1201(x127041,a52)+P1146(x127041,a28)
% 32.24/32.04 [12705]~P1201(x127051,a53)+P1146(x127051,a28)
% 32.24/32.04 [12706]~P1201(x127061,a54)+P1146(x127061,a28)
% 32.24/32.04 [12707]~P1201(x127071,a55)+P1146(x127071,a28)
% 32.24/32.04 [12708]~P1201(x127081,a56)+P1146(x127081,a28)
% 32.24/32.04 [12709]~P1201(x127091,a57)+P1146(x127091,a28)
% 32.24/32.04 [12710]~P1201(x127101,a58)+P1146(x127101,a28)
% 32.24/32.04 [12711]~P1201(x127111,a59)+P1146(x127111,a28)
% 32.24/32.04 [12712]~P1201(x127121,a60)+P1146(x127121,a28)
% 32.24/32.04 [12713]~P1360(x127131,a27)+P1146(x127131,a39)
% 32.24/32.04 [12714]~P1360(x127141,a26)+P1146(x127141,a39)
% 32.24/32.04 [12715]~P1360(x127151,a28)+P1146(x127151,a39)
% 32.24/32.04 [12716]~P1360(x127161,a39)+P1146(x127161,a39)
% 32.24/32.04 [12717]~P1360(x127171,a62)+P1146(x127171,a39)
% 32.24/32.04 [12718]~P1360(x127181,a50)+P1146(x127181,a39)
% 32.24/32.04 [12719]~P1360(x127191,a83)+P1146(x127191,a39)
% 32.24/32.04 [12720]~P1360(x127201,a61)+P1146(x127201,a39)
% 32.24/32.04 [12721]~P1360(x127211,a29)+P1146(x127211,a39)
% 32.24/32.04 [12722]~P1360(x127221,a30)+P1146(x127221,a39)
% 32.24/32.04 [12723]~P1360(x127231,a91)+P1146(x127231,a39)
% 32.24/32.04 [12724]~P1360(x127241,a92)+P1146(x127241,a39)
% 32.24/32.04 [12725]~P1360(x127251,a31)+P1146(x127251,a39)
% 32.24/32.04 [12726]~P1360(x127261,a32)+P1146(x127261,a39)
% 32.24/32.04 [12727]~P1360(x127271,a33)+P1146(x127271,a39)
% 32.24/32.04 [12728]~P1360(x127281,a34)+P1146(x127281,a39)
% 32.24/32.04 [12729]~P1360(x127291,a35)+P1146(x127291,a39)
% 32.24/32.04 [12730]~P1360(x127301,a36)+P1146(x127301,a39)
% 32.24/32.04 [12731]~P1360(x127311,a37)+P1146(x127311,a39)
% 32.24/32.04 [12732]~P1360(x127321,a38)+P1146(x127321,a39)
% 32.24/32.04 [12733]~P1360(x127331,a40)+P1146(x127331,a39)
% 32.24/32.04 [12734]~P1360(x127341,a41)+P1146(x127341,a39)
% 32.24/32.04 [12735]~P1360(x127351,a42)+P1146(x127351,a39)
% 32.24/32.04 [12736]~P1360(x127361,a43)+P1146(x127361,a39)
% 32.24/32.04 [12737]~P1252(x127371,a27)+P1146(x127371,a39)
% 32.24/32.04 [12738]~P1252(x127381,a26)+P1146(x127381,a39)
% 32.24/32.04 [12739]~P1252(x127391,a28)+P1146(x127391,a39)
% 32.24/32.04 [12740]~P1252(x127401,a39)+P1146(x127401,a39)
% 32.24/32.04 [12741]~P1252(x127411,a62)+P1146(x127411,a39)
% 32.24/32.04 [12742]~P1252(x127421,a50)+P1146(x127421,a39)
% 32.24/32.04 [12743]~P1252(x127431,a83)+P1146(x127431,a39)
% 32.24/32.04 [12744]~P1252(x127441,a61)+P1146(x127441,a39)
% 32.24/32.04 [12745]~P1252(x127451,a29)+P1146(x127451,a39)
% 32.24/32.04 [12746]~P1252(x127461,a30)+P1146(x127461,a39)
% 32.24/32.04 [12747]~P1252(x127471,a91)+P1146(x127471,a39)
% 32.24/32.04 [12748]~P1252(x127481,a92)+P1146(x127481,a39)
% 32.24/32.04 [12749]~P1252(x127491,a31)+P1146(x127491,a39)
% 32.24/32.04 [12750]~P1252(x127501,a32)+P1146(x127501,a39)
% 32.24/32.04 [12751]~P1252(x127511,a33)+P1146(x127511,a39)
% 32.24/32.04 [12752]~P1252(x127521,a34)+P1146(x127521,a39)
% 32.24/32.04 [12753]~P1252(x127531,a35)+P1146(x127531,a39)
% 32.24/32.04 [12754]~P1252(x127541,a36)+P1146(x127541,a39)
% 32.24/32.04 [12755]~P1252(x127551,a37)+P1146(x127551,a39)
% 32.24/32.04 [12756]~P1252(x127561,a38)+P1146(x127561,a39)
% 32.24/32.04 [12757]~P1252(x127571,a40)+P1146(x127571,a39)
% 32.24/32.04 [12758]~P1252(x127581,a41)+P1146(x127581,a39)
% 32.24/32.04 [12759]~P1252(x127591,a42)+P1146(x127591,a39)
% 32.24/32.04 [12760]~P1252(x127601,a43)+P1146(x127601,a39)
% 32.24/32.04 [12761]~P1252(x127611,a44)+P1146(x127611,a39)
% 32.24/32.04 [12762]~P1252(x127621,a45)+P1146(x127621,a39)
% 32.24/32.04 [12763]~P1252(x127631,a46)+P1146(x127631,a39)
% 32.24/32.04 [12764]~P1252(x127641,a47)+P1146(x127641,a39)
% 32.24/32.04 [12765]~P1252(x127651,a48)+P1146(x127651,a39)
% 32.24/32.04 [12766]~P1252(x127661,a49)+P1146(x127661,a39)
% 32.24/32.04 [12767]~P1252(x127671,a51)+P1146(x127671,a39)
% 32.24/32.04 [12768]~P1252(x127681,a52)+P1146(x127681,a39)
% 32.24/32.04 [12769]~P1252(x127691,a53)+P1146(x127691,a39)
% 32.24/32.04 [12770]~P1252(x127701,a54)+P1146(x127701,a39)
% 32.24/32.04 [12771]~P1252(x127711,a55)+P1146(x127711,a39)
% 32.24/32.04 [12772]~P1252(x127721,a56)+P1146(x127721,a39)
% 32.24/32.04 [12773]~P1252(x127731,a57)+P1146(x127731,a39)
% 32.24/32.04 [12774]~P1252(x127741,a58)+P1146(x127741,a39)
% 32.24/32.04 [12775]~P1252(x127751,a59)+P1146(x127751,a39)
% 32.24/32.04 [12776]~P1252(x127761,a60)+P1146(x127761,a39)
% 32.24/32.04 [12777]~P1356(x127771,a27)+P1146(x127771,a50)
% 32.24/32.04 [12778]~P1356(x127781,a26)+P1146(x127781,a50)
% 32.24/32.04 [12779]~P1356(x127791,a28)+P1146(x127791,a50)
% 32.24/32.04 [12780]~P1356(x127801,a39)+P1146(x127801,a50)
% 32.24/32.04 [12781]~P1356(x127811,a62)+P1146(x127811,a50)
% 32.24/32.04 [12782]~P1356(x127821,a50)+P1146(x127821,a50)
% 32.24/32.04 [12783]~P1356(x127831,a83)+P1146(x127831,a50)
% 32.24/32.04 [12784]~P1356(x127841,a61)+P1146(x127841,a50)
% 32.24/32.04 [12785]~P1356(x127851,a29)+P1146(x127851,a50)
% 32.24/32.04 [12786]~P1356(x127861,a30)+P1146(x127861,a50)
% 32.24/32.04 [12787]~P1356(x127871,a91)+P1146(x127871,a50)
% 32.24/32.04 [12788]~P1356(x127881,a92)+P1146(x127881,a50)
% 32.24/32.04 [12789]~P1356(x127891,a31)+P1146(x127891,a50)
% 32.24/32.04 [12790]~P1356(x127901,a32)+P1146(x127901,a50)
% 32.24/32.04 [12791]~P1356(x127911,a33)+P1146(x127911,a50)
% 32.24/32.04 [12792]~P1356(x127921,a34)+P1146(x127921,a50)
% 32.24/32.04 [12793]~P1356(x127931,a35)+P1146(x127931,a50)
% 32.24/32.04 [12794]~P1356(x127941,a36)+P1146(x127941,a50)
% 32.24/32.04 [12795]~P1356(x127951,a37)+P1146(x127951,a50)
% 32.24/32.04 [12796]~P1356(x127961,a38)+P1146(x127961,a50)
% 32.24/32.04 [12797]~P1356(x127971,a40)+P1146(x127971,a50)
% 32.24/32.04 [12798]~P1356(x127981,a41)+P1146(x127981,a50)
% 32.24/32.04 [12799]~P1356(x127991,a42)+P1146(x127991,a50)
% 32.24/32.04 [12800]~P1356(x128001,a43)+P1146(x128001,a50)
% 32.24/32.04 [12801]~P1356(x128011,a44)+P1146(x128011,a50)
% 32.24/32.04 [12802]~P1356(x128021,a45)+P1146(x128021,a50)
% 32.24/32.04 [12803]~P1356(x128031,a46)+P1146(x128031,a50)
% 32.24/32.04 [12804]~P1356(x128041,a47)+P1146(x128041,a50)
% 32.24/32.04 [12805]~P1356(x128051,a48)+P1146(x128051,a50)
% 32.24/32.04 [12806]~P1356(x128061,a49)+P1146(x128061,a50)
% 32.24/32.04 [12807]~P1356(x128071,a51)+P1146(x128071,a50)
% 32.24/32.04 [12808]~P1356(x128081,a52)+P1146(x128081,a50)
% 32.24/32.04 [12809]~P1356(x128091,a53)+P1146(x128091,a50)
% 32.24/32.04 [12810]~P1356(x128101,a54)+P1146(x128101,a50)
% 32.24/32.04 [12811]~P1356(x128111,a55)+P1146(x128111,a50)
% 32.24/32.04 [12812]~P1356(x128121,a56)+P1146(x128121,a50)
% 32.24/32.04 [12813]~P1356(x128131,a57)+P1146(x128131,a50)
% 32.24/32.04 [12814]~P1356(x128141,a58)+P1146(x128141,a50)
% 32.24/32.04 [12815]~P1356(x128151,a59)+P1146(x128151,a50)
% 32.24/32.04 [12816]~P1356(x128161,a60)+P1146(x128161,a50)
% 32.24/32.04 [12817]~P1146(x128171,a39)+P1360(x128171,a27)
% 32.24/32.04 [12818]~P1146(x128181,a39)+P1360(x128181,a26)
% 32.24/32.04 [12819]~P1146(x128191,a39)+P1360(x128191,a28)
% 32.24/32.04 [12820]~P1146(x128201,a39)+P1360(x128201,a39)
% 32.24/32.04 [12821]~P1146(x128211,a39)+P1360(x128211,a62)
% 32.24/32.04 [12822]~P1146(x128221,a39)+P1360(x128221,a50)
% 32.24/32.04 [12823]~P1146(x128231,a39)+P1360(x128231,a83)
% 32.24/32.04 [12824]~P1146(x128241,a39)+P1360(x128241,a61)
% 32.24/32.04 [12825]~P1146(x128251,a39)+P1360(x128251,a29)
% 32.24/32.04 [12826]~P1146(x128261,a39)+P1360(x128261,a30)
% 32.24/32.04 [12827]~P1146(x128271,a39)+P1360(x128271,a91)
% 32.24/32.04 [12828]~P1146(x128281,a39)+P1360(x128281,a92)
% 32.24/32.04 [12829]~P1146(x128291,a39)+P1360(x128291,a31)
% 32.24/32.04 [12830]~P1146(x128301,a39)+P1360(x128301,a32)
% 32.24/32.04 [12831]~P1146(x128311,a39)+P1360(x128311,a33)
% 32.24/32.04 [12832]~P1146(x128321,a39)+P1360(x128321,a34)
% 32.24/32.04 [12833]~P1146(x128331,a39)+P1360(x128331,a35)
% 32.24/32.04 [12834]~P1146(x128341,a39)+P1360(x128341,a36)
% 32.24/32.04 [12835]~P1146(x128351,a39)+P1360(x128351,a37)
% 32.24/32.04 [12836]~P1146(x128361,a39)+P1360(x128361,a38)
% 32.24/32.04 [12837]~P1146(x128371,a39)+P1360(x128371,a40)
% 32.24/32.04 [12838]~P1146(x128381,a39)+P1360(x128381,a41)
% 32.24/32.04 [12839]~P1146(x128391,a39)+P1360(x128391,a42)
% 32.24/32.04 [12840]~P1146(x128401,a39)+P1360(x128401,a43)
% 32.24/32.04 [12841]~P1146(x128411,a28)+P1359(x128411,a27)
% 32.24/32.04 [12842]~P1146(x128421,a28)+P1359(x128421,a26)
% 32.24/32.04 [12843]~P1146(x128431,a28)+P1359(x128431,a28)
% 32.24/32.04 [12844]~P1146(x128441,a28)+P1359(x128441,a39)
% 32.24/32.04 [12845]~P1146(x128451,a28)+P1359(x128451,a62)
% 32.24/32.04 [12846]~P1146(x128461,a28)+P1359(x128461,a50)
% 32.24/32.04 [12847]~P1146(x128471,a28)+P1359(x128471,a83)
% 32.24/32.04 [12848]~P1146(x128481,a28)+P1359(x128481,a61)
% 32.24/32.04 [12849]~P1146(x128491,a28)+P1359(x128491,a29)
% 32.24/32.04 [12850]~P1146(x128501,a28)+P1359(x128501,a30)
% 32.24/32.04 [12851]~P1146(x128511,a28)+P1359(x128511,a91)
% 32.24/32.04 [12852]~P1146(x128521,a28)+P1359(x128521,a92)
% 32.24/32.04 [12853]~P1146(x128531,a28)+P1359(x128531,a31)
% 32.24/32.04 [12854]~P1146(x128541,a28)+P1359(x128541,a32)
% 32.24/32.04 [12855]~P1146(x128551,a28)+P1359(x128551,a33)
% 32.24/32.04 [12856]~P1146(x128561,a28)+P1359(x128561,a34)
% 32.24/32.04 [12857]~P1146(x128571,a26)+P1358(x128571,a27)
% 32.24/32.04 [12858]~P1146(x128581,a26)+P1358(x128581,a26)
% 32.24/32.04 [12859]~P1146(x128591,a26)+P1358(x128591,a28)
% 32.24/32.04 [12860]~P1146(x128601,a26)+P1358(x128601,a39)
% 32.24/32.04 [12861]~P1146(x128611,a26)+P1358(x128611,a62)
% 32.24/32.04 [12862]~P1146(x128621,a26)+P1358(x128621,a50)
% 32.24/32.04 [12863]~P1146(x128631,a26)+P1358(x128631,a83)
% 32.24/32.04 [12864]~P1146(x128641,a26)+P1358(x128641,a61)
% 32.24/32.04 [12865]~P1146(x128651,a26)+P1358(x128651,a29)
% 32.24/32.04 [12866]~P1146(x128661,a26)+P1358(x128661,a30)
% 32.24/32.04 [12867]~P1146(x128671,a26)+P1358(x128671,a91)
% 32.24/32.04 [12868]~P1146(x128681,a26)+P1358(x128681,a92)
% 32.24/32.04 [12869]~P1156(x128691,a52)+P1343(x128691,a27)
% 32.24/32.04 [12870]~P1156(x128701,a53)+P1343(x128701,a26)
% 32.24/32.04 [12871]~P1156(x128711,a54)+P1343(x128711,a28)
% 32.24/32.04 [12872]~P1156(x128721,a55)+P1343(x128721,a39)
% 32.24/32.04 [12873]~P1156(x128731,a57)+P1343(x128731,a62)
% 32.24/32.04 [12874]~P1156(x128741,a56)+P1343(x128741,a50)
% 32.24/32.04 [12875]~P1156(x128751,a59)+P1343(x128751,a83)
% 32.24/32.04 [12876]~P1156(x128761,a58)+P1343(x128761,a61)
% 32.24/32.04 [12877]~P1156(x128771,a60)+P1343(x128771,a92)
% 32.24/32.04 [12878]~P1146(x128781,a27)+P1357(x128781,a27)
% 32.24/32.04 [12879]~P1146(x128791,a27)+P1357(x128791,a26)
% 32.24/32.04 [12880]~P1146(x128801,a27)+P1357(x128801,a28)
% 32.24/32.04 [12881]~P1146(x128811,a27)+P1357(x128811,a39)
% 32.24/32.04 [12882]~P1146(x128821,a27)+P1357(x128821,a62)
% 32.24/32.04 [12883]~P1146(x128831,a27)+P1357(x128831,a50)
% 32.24/32.04 [12884]~P1146(x128841,a27)+P1357(x128841,a83)
% 32.24/32.04 [12885]~P1146(x128851,a27)+P1357(x128851,a61)
% 32.24/32.04 [12886]~P1146(x128861,a27)+P1357(x128861,a91)
% 32.24/32.04 [12887]~P1146(x128871,a27)+P1357(x128871,a92)
% 32.24/32.04 [12888]~P1110(x128881,a27)+P1156(x128881,a26)
% 32.24/32.04 [12889]~P1170(x128891,a27)+P1156(x128891,a28)
% 32.24/32.04 [12890]~P1110(x128901,a26)+P1156(x128901,a28)
% 32.24/32.04 [12891]~P1170(x128911,a26)+P1156(x128911,a39)
% 32.24/32.04 [12892]~P1167(x128921,a27)+P1156(x128921,a39)
% 32.24/32.04 [12893]~P1110(x128931,a28)+P1156(x128931,a39)
% 32.24/32.04 [12894]~P1185(x128941,a26)+P1156(x128941,a62)
% 32.24/32.04 [12895]~P1179(x128951,a27)+P1156(x128951,a62)
% 32.24/32.04 [12896]~P1170(x128961,a39)+P1156(x128961,a62)
% 32.24/32.04 [12897]~P1167(x128971,a28)+P1156(x128971,a62)
% 32.24/32.04 [12898]~P1110(x128981,a50)+P1156(x128981,a62)
% 32.24/32.04 [12899]~P1185(x128991,a27)+P1156(x128991,a50)
% 32.24/32.04 [12900]~P1170(x129001,a28)+P1156(x129001,a50)
% 32.24/32.04 [12901]~P1167(x129011,a26)+P1156(x129011,a50)
% 32.24/32.04 [12902]~P1110(x129021,a39)+P1156(x129021,a50)
% 32.24/32.04 [12903]~P1193(x129031,a26)+P1156(x129031,a83)
% 32.24/32.04 [12904]~P1190(x129041,a27)+P1156(x129041,a83)
% 32.24/32.04 [12905]~P1185(x129051,a39)+P1156(x129051,a83)
% 32.24/32.04 [12906]~P1179(x129061,a28)+P1156(x129061,a83)
% 32.24/32.04 [12907]~P1170(x129071,a62)+P1156(x129071,a83)
% 32.24/32.04 [12908]~P1167(x129081,a50)+P1156(x129081,a83)
% 32.24/32.04 [12909]~P1110(x129091,a61)+P1156(x129091,a83)
% 32.24/32.04 [12910]~P1193(x129101,a27)+P1156(x129101,a61)
% 32.24/32.04 [12911]~P1185(x129111,a28)+P1156(x129111,a61)
% 32.24/32.04 [12912]~P1179(x129121,a26)+P1156(x129121,a61)
% 32.24/32.04 [12913]~P1170(x129131,a50)+P1156(x129131,a61)
% 32.24/32.04 [12914]~P1167(x129141,a39)+P1156(x129141,a61)
% 32.24/32.04 [12915]~P1110(x129151,a62)+P1156(x129151,a61)
% 32.24/32.04 [12916]~P1221(x129161,a27)+P1156(x129161,a29)
% 32.24/32.04 [12917]~P1208(x129171,a28)+P1156(x129171,a29)
% 32.24/32.04 [12918]~P1205(x129181,a26)+P1156(x129181,a29)
% 32.24/32.04 [12919]~P1193(x129191,a50)+P1156(x129191,a29)
% 32.24/32.04 [12920]~P1190(x129201,a39)+P1156(x129201,a29)
% 32.24/32.04 [12921]~P1185(x129211,a61)+P1156(x129211,a29)
% 32.24/32.04 [12922]~P1179(x129221,a62)+P1156(x129221,a29)
% 32.24/32.04 [12923]~P1170(x129231,a92)+P1156(x129231,a29)
% 32.24/32.04 [12924]~P1167(x129241,a83)+P1156(x129241,a29)
% 32.24/32.04 [12925]~P1110(x129251,a91)+P1156(x129251,a29)
% 32.24/32.04 [12926]~P1221(x129261,a26)+P1156(x129261,a30)
% 32.24/32.04 [12927]~P1219(x129271,a27)+P1156(x129271,a30)
% 32.24/32.04 [12928]~P1208(x129281,a39)+P1156(x129281,a30)
% 32.24/32.04 [12929]~P1205(x129291,a28)+P1156(x129291,a30)
% 32.24/32.04 [12930]~P1193(x129301,a62)+P1156(x129301,a30)
% 32.24/32.04 [12931]~P1190(x129311,a50)+P1156(x129311,a30)
% 32.24/32.04 [12932]~P1185(x129321,a83)+P1156(x129321,a30)
% 32.24/32.04 [12933]~P1179(x129331,a61)+P1156(x129331,a30)
% 32.24/32.04 [12934]~P1170(x129341,a91)+P1156(x129341,a30)
% 32.24/32.04 [12935]~P1167(x129351,a92)+P1156(x129351,a30)
% 32.24/32.04 [12936]~P1110(x129361,a29)+P1156(x129361,a30)
% 32.24/32.04 [12937]~P1208(x129371,a26)+P1156(x129371,a91)
% 32.24/32.04 [12938]~P1205(x129381,a27)+P1156(x129381,a91)
% 32.24/32.04 [12939]~P1193(x129391,a39)+P1156(x129391,a91)
% 32.24/32.04 [12940]~P1190(x129401,a28)+P1156(x129401,a91)
% 32.24/32.04 [12941]~P1185(x129411,a62)+P1156(x129411,a91)
% 32.24/32.04 [12942]~P1179(x129421,a50)+P1156(x129421,a91)
% 32.24/32.04 [12943]~P1170(x129431,a83)+P1156(x129431,a91)
% 32.24/32.04 [12944]~P1167(x129441,a61)+P1156(x129441,a91)
% 32.24/32.04 [12945]~P1110(x129451,a92)+P1156(x129451,a91)
% 32.24/32.04 [12946]~P1208(x129461,a27)+P1156(x129461,a92)
% 32.24/32.04 [12947]~P1193(x129471,a28)+P1156(x129471,a92)
% 32.24/32.04 [12948]~P1190(x129481,a26)+P1156(x129481,a92)
% 32.24/32.04 [12949]~P1185(x129491,a50)+P1156(x129491,a92)
% 32.24/32.04 [12950]~P1179(x129501,a39)+P1156(x129501,a92)
% 32.24/32.04 [12951]~P1170(x129511,a61)+P1156(x129511,a92)
% 32.24/32.04 [12952]~P1167(x129521,a62)+P1156(x129521,a92)
% 32.24/32.04 [12953]~P1110(x129531,a83)+P1156(x129531,a92)
% 32.24/32.04 [12954]~P1233(x129541,a27)+P1156(x129541,a31)
% 32.24/32.04 [12955]~P1221(x129551,a28)+P1156(x129551,a31)
% 32.24/32.04 [12956]~P1219(x129561,a26)+P1156(x129561,a31)
% 32.24/32.04 [12957]~P1208(x129571,a50)+P1156(x129571,a31)
% 32.24/32.04 [12958]~P1205(x129581,a39)+P1156(x129581,a31)
% 32.24/32.04 [12959]~P1193(x129591,a61)+P1156(x129591,a31)
% 32.24/32.04 [12960]~P1190(x129601,a62)+P1156(x129601,a31)
% 32.24/32.04 [12961]~P1185(x129611,a92)+P1156(x129611,a31)
% 32.24/32.04 [12962]~P1179(x129621,a83)+P1156(x129621,a31)
% 32.24/32.04 [12963]~P1170(x129631,a29)+P1156(x129631,a31)
% 32.24/32.04 [12964]~P1167(x129641,a91)+P1156(x129641,a31)
% 32.24/32.04 [12965]~P1110(x129651,a30)+P1156(x129651,a31)
% 32.24/32.04 [12966]~P1233(x129661,a26)+P1156(x129661,a32)
% 32.24/32.04 [12967]~P1230(x129671,a27)+P1156(x129671,a32)
% 32.24/32.04 [12968]~P1221(x129681,a39)+P1156(x129681,a32)
% 32.24/32.04 [12969]~P1219(x129691,a28)+P1156(x129691,a32)
% 32.24/32.04 [12970]~P1208(x129701,a62)+P1156(x129701,a32)
% 32.24/32.04 [12971]~P1205(x129711,a50)+P1156(x129711,a32)
% 32.24/32.04 [12972]~P1193(x129721,a83)+P1156(x129721,a32)
% 32.24/32.04 [12973]~P1190(x129731,a61)+P1156(x129731,a32)
% 32.24/32.04 [12974]~P1185(x129741,a91)+P1156(x129741,a32)
% 32.24/32.04 [12975]~P1179(x129751,a92)+P1156(x129751,a32)
% 32.24/32.04 [12976]~P1170(x129761,a30)+P1156(x129761,a32)
% 32.24/32.04 [12977]~P1167(x129771,a29)+P1156(x129771,a32)
% 32.24/32.04 [12978]~P1110(x129781,a31)+P1156(x129781,a32)
% 32.24/32.04 [12979]~P1243(x129791,a27)+P1156(x129791,a33)
% 32.24/32.04 [12980]~P1233(x129801,a28)+P1156(x129801,a33)
% 32.24/32.04 [12981]~P1230(x129811,a26)+P1156(x129811,a33)
% 32.24/32.04 [12982]~P1221(x129821,a50)+P1156(x129821,a33)
% 32.24/32.04 [12983]~P1219(x129831,a39)+P1156(x129831,a33)
% 32.24/32.04 [12984]~P1208(x129841,a61)+P1156(x129841,a33)
% 32.24/32.04 [12985]~P1205(x129851,a62)+P1156(x129851,a33)
% 32.24/32.04 [12986]~P1193(x129861,a92)+P1156(x129861,a33)
% 32.24/32.04 [12987]~P1190(x129871,a83)+P1156(x129871,a33)
% 32.24/32.04 [12988]~P1185(x129881,a29)+P1156(x129881,a33)
% 32.24/32.04 [12989]~P1179(x129891,a91)+P1156(x129891,a33)
% 32.24/32.04 [12990]~P1170(x129901,a31)+P1156(x129901,a33)
% 32.24/32.04 [12991]~P1167(x129911,a30)+P1156(x129911,a33)
% 32.24/32.04 [12992]~P1110(x129921,a32)+P1156(x129921,a33)
% 32.24/32.04 [12993]~P1243(x129931,a26)+P1156(x129931,a34)
% 32.24/32.04 [12994]~P1241(x129941,a27)+P1156(x129941,a34)
% 32.24/32.04 [12995]~P1233(x129951,a39)+P1156(x129951,a34)
% 32.24/32.04 [12996]~P1230(x129961,a28)+P1156(x129961,a34)
% 32.24/32.04 [12997]~P1221(x129971,a62)+P1156(x129971,a34)
% 32.24/32.04 [12998]~P1219(x129981,a50)+P1156(x129981,a34)
% 32.24/32.04 [12999]~P1208(x129991,a83)+P1156(x129991,a34)
% 32.24/32.04 [13000]~P1205(x130001,a61)+P1156(x130001,a34)
% 32.24/32.04 [13001]~P1193(x130011,a91)+P1156(x130011,a34)
% 32.24/32.04 [13002]~P1190(x130021,a92)+P1156(x130021,a34)
% 32.24/32.04 [13003]~P1185(x130031,a30)+P1156(x130031,a34)
% 32.24/32.04 [13004]~P1179(x130041,a29)+P1156(x130041,a34)
% 32.24/32.04 [13005]~P1170(x130051,a32)+P1156(x130051,a34)
% 32.24/32.04 [13006]~P1167(x130061,a31)+P1156(x130061,a34)
% 32.24/32.04 [13007]~P1110(x130071,a33)+P1156(x130071,a34)
% 32.24/32.04 [13008]~P1261(x130081,a27)+P1156(x130081,a35)
% 32.24/32.04 [13009]~P1243(x130091,a28)+P1156(x130091,a35)
% 32.24/32.04 [13010]~P1241(x130101,a26)+P1156(x130101,a35)
% 32.24/32.04 [13011]~P1233(x130111,a50)+P1156(x130111,a35)
% 32.24/32.04 [13012]~P1230(x130121,a39)+P1156(x130121,a35)
% 32.24/32.04 [13013]~P1221(x130131,a61)+P1156(x130131,a35)
% 32.24/32.04 [13014]~P1219(x130141,a62)+P1156(x130141,a35)
% 32.24/32.04 [13015]~P1208(x130151,a92)+P1156(x130151,a35)
% 32.24/32.04 [13016]~P1205(x130161,a83)+P1156(x130161,a35)
% 32.24/32.04 [13017]~P1193(x130171,a29)+P1156(x130171,a35)
% 32.24/32.04 [13018]~P1190(x130181,a91)+P1156(x130181,a35)
% 32.24/32.04 [13019]~P1185(x130191,a31)+P1156(x130191,a35)
% 32.24/32.04 [13020]~P1179(x130201,a30)+P1156(x130201,a35)
% 32.24/32.04 [13021]~P1170(x130211,a33)+P1156(x130211,a35)
% 32.24/32.04 [13022]~P1167(x130221,a32)+P1156(x130221,a35)
% 32.24/32.04 [13023]~P1110(x130231,a34)+P1156(x130231,a35)
% 32.24/32.04 [13024]~P1261(x130241,a26)+P1156(x130241,a36)
% 32.24/32.04 [13025]~P1257(x130251,a27)+P1156(x130251,a36)
% 32.24/32.04 [13026]~P1243(x130261,a39)+P1156(x130261,a36)
% 32.24/32.04 [13027]~P1241(x130271,a28)+P1156(x130271,a36)
% 32.24/32.04 [13028]~P1233(x130281,a62)+P1156(x130281,a36)
% 32.24/32.04 [13029]~P1230(x130291,a50)+P1156(x130291,a36)
% 32.24/32.04 [13030]~P1221(x130301,a83)+P1156(x130301,a36)
% 32.24/32.04 [13031]~P1219(x130311,a61)+P1156(x130311,a36)
% 32.24/32.04 [13032]~P1208(x130321,a91)+P1156(x130321,a36)
% 32.24/32.04 [13033]~P1205(x130331,a92)+P1156(x130331,a36)
% 32.24/32.04 [13034]~P1193(x130341,a30)+P1156(x130341,a36)
% 32.24/32.04 [13035]~P1190(x130351,a29)+P1156(x130351,a36)
% 32.24/32.04 [13036]~P1185(x130361,a32)+P1156(x130361,a36)
% 32.24/32.04 [13037]~P1179(x130371,a31)+P1156(x130371,a36)
% 32.24/32.04 [13038]~P1170(x130381,a34)+P1156(x130381,a36)
% 32.24/32.04 [13039]~P1167(x130391,a33)+P1156(x130391,a36)
% 32.24/32.04 [13040]~P1110(x130401,a35)+P1156(x130401,a36)
% 32.24/32.04 [13041]~P1275(x130411,a27)+P1156(x130411,a37)
% 32.24/32.04 [13042]~P1261(x130421,a28)+P1156(x130421,a37)
% 32.24/32.05 [13043]~P1257(x130431,a26)+P1156(x130431,a37)
% 32.24/32.05 [13044]~P1243(x130441,a50)+P1156(x130441,a37)
% 32.24/32.05 [13045]~P1241(x130451,a39)+P1156(x130451,a37)
% 32.24/32.05 [13046]~P1233(x130461,a61)+P1156(x130461,a37)
% 32.24/32.05 [13047]~P1230(x130471,a62)+P1156(x130471,a37)
% 32.24/32.05 [13048]~P1221(x130481,a92)+P1156(x130481,a37)
% 32.24/32.05 [13049]~P1219(x130491,a83)+P1156(x130491,a37)
% 32.24/32.05 [13050]~P1208(x130501,a29)+P1156(x130501,a37)
% 32.24/32.05 [13051]~P1205(x130511,a91)+P1156(x130511,a37)
% 32.24/32.05 [13052]~P1193(x130521,a31)+P1156(x130521,a37)
% 32.24/32.05 [13053]~P1190(x130531,a30)+P1156(x130531,a37)
% 32.24/32.05 [13054]~P1185(x130541,a33)+P1156(x130541,a37)
% 32.24/32.05 [13055]~P1179(x130551,a32)+P1156(x130551,a37)
% 32.24/32.05 [13056]~P1170(x130561,a35)+P1156(x130561,a37)
% 32.24/32.05 [13057]~P1167(x130571,a34)+P1156(x130571,a37)
% 32.24/32.05 [13058]~P1110(x130581,a36)+P1156(x130581,a37)
% 32.24/32.05 [13059]~P1275(x130591,a26)+P1156(x130591,a38)
% 32.24/32.05 [13060]~P1273(x130601,a27)+P1156(x130601,a38)
% 32.24/32.05 [13061]~P1261(x130611,a39)+P1156(x130611,a38)
% 32.24/32.05 [13062]~P1257(x130621,a28)+P1156(x130621,a38)
% 32.24/32.05 [13063]~P1243(x130631,a62)+P1156(x130631,a38)
% 32.24/32.05 [13064]~P1241(x130641,a50)+P1156(x130641,a38)
% 32.24/32.05 [13065]~P1233(x130651,a83)+P1156(x130651,a38)
% 32.24/32.05 [13066]~P1230(x130661,a61)+P1156(x130661,a38)
% 32.24/32.05 [13067]~P1221(x130671,a91)+P1156(x130671,a38)
% 32.24/32.05 [13068]~P1219(x130681,a92)+P1156(x130681,a38)
% 32.24/32.05 [13069]~P1208(x130691,a30)+P1156(x130691,a38)
% 32.24/32.05 [13070]~P1205(x130701,a29)+P1156(x130701,a38)
% 32.24/32.05 [13071]~P1193(x130711,a32)+P1156(x130711,a38)
% 32.24/32.05 [13072]~P1190(x130721,a31)+P1156(x130721,a38)
% 32.24/32.05 [13073]~P1185(x130731,a34)+P1156(x130731,a38)
% 32.24/32.05 [13074]~P1179(x130741,a33)+P1156(x130741,a38)
% 32.24/32.05 [13075]~P1170(x130751,a36)+P1156(x130751,a38)
% 32.24/32.05 [13076]~P1167(x130761,a35)+P1156(x130761,a38)
% 32.24/32.05 [13077]~P1110(x130771,a37)+P1156(x130771,a38)
% 32.24/32.05 [13078]~P1287(x130781,a27)+P1156(x130781,a40)
% 32.24/32.05 [13079]~P1275(x130791,a28)+P1156(x130791,a40)
% 32.24/32.05 [13080]~P1273(x130801,a26)+P1156(x130801,a40)
% 32.24/32.05 [13081]~P1261(x130811,a50)+P1156(x130811,a40)
% 32.24/32.05 [13082]~P1257(x130821,a39)+P1156(x130821,a40)
% 32.24/32.05 [13083]~P1243(x130831,a61)+P1156(x130831,a40)
% 32.24/32.05 [13084]~P1241(x130841,a62)+P1156(x130841,a40)
% 32.24/32.05 [13085]~P1233(x130851,a92)+P1156(x130851,a40)
% 32.24/32.05 [13086]~P1230(x130861,a83)+P1156(x130861,a40)
% 32.24/32.05 [13087]~P1221(x130871,a29)+P1156(x130871,a40)
% 32.24/32.05 [13088]~P1219(x130881,a91)+P1156(x130881,a40)
% 32.24/32.05 [13089]~P1208(x130891,a31)+P1156(x130891,a40)
% 32.24/32.05 [13090]~P1205(x130901,a30)+P1156(x130901,a40)
% 32.24/32.05 [13091]~P1193(x130911,a33)+P1156(x130911,a40)
% 32.24/32.05 [13092]~P1190(x130921,a32)+P1156(x130921,a40)
% 32.24/32.05 [13093]~P1185(x130931,a35)+P1156(x130931,a40)
% 32.24/32.05 [13094]~P1179(x130941,a34)+P1156(x130941,a40)
% 32.24/32.05 [13095]~P1170(x130951,a37)+P1156(x130951,a40)
% 32.24/32.05 [13096]~P1167(x130961,a36)+P1156(x130961,a40)
% 32.24/32.05 [13097]~P1110(x130971,a38)+P1156(x130971,a40)
% 32.24/32.05 [13098]~P1287(x130981,a26)+P1156(x130981,a41)
% 32.24/32.05 [13099]~P1284(x130991,a27)+P1156(x130991,a41)
% 32.24/32.05 [13100]~P1275(x131001,a39)+P1156(x131001,a41)
% 32.24/32.05 [13101]~P1273(x131011,a28)+P1156(x131011,a41)
% 32.24/32.05 [13102]~P1261(x131021,a62)+P1156(x131021,a41)
% 32.24/32.05 [13103]~P1257(x131031,a50)+P1156(x131031,a41)
% 32.24/32.05 [13104]~P1243(x131041,a83)+P1156(x131041,a41)
% 32.24/32.05 [13105]~P1241(x131051,a61)+P1156(x131051,a41)
% 32.24/32.05 [13106]~P1233(x131061,a91)+P1156(x131061,a41)
% 32.24/32.05 [13107]~P1230(x131071,a92)+P1156(x131071,a41)
% 32.24/32.05 [13108]~P1221(x131081,a30)+P1156(x131081,a41)
% 32.24/32.05 [13109]~P1219(x131091,a29)+P1156(x131091,a41)
% 32.24/32.05 [13110]~P1208(x131101,a32)+P1156(x131101,a41)
% 32.24/32.05 [13111]~P1205(x131111,a31)+P1156(x131111,a41)
% 32.24/32.05 [13112]~P1193(x131121,a34)+P1156(x131121,a41)
% 32.24/32.05 [13113]~P1190(x131131,a33)+P1156(x131131,a41)
% 32.24/32.05 [13114]~P1185(x131141,a36)+P1156(x131141,a41)
% 32.24/32.05 [13115]~P1179(x131151,a35)+P1156(x131151,a41)
% 32.24/32.05 [13116]~P1170(x131161,a38)+P1156(x131161,a41)
% 32.24/32.05 [13117]~P1167(x131171,a37)+P1156(x131171,a41)
% 32.24/32.05 [13118]~P1110(x131181,a40)+P1156(x131181,a41)
% 32.24/32.05 [13119]~P1297(x131191,a27)+P1156(x131191,a42)
% 32.24/32.05 [13120]~P1287(x131201,a28)+P1156(x131201,a42)
% 32.24/32.05 [13121]~P1284(x131211,a26)+P1156(x131211,a42)
% 32.24/32.05 [13122]~P1275(x131221,a50)+P1156(x131221,a42)
% 32.24/32.05 [13123]~P1273(x131231,a39)+P1156(x131231,a42)
% 32.24/32.05 [13124]~P1261(x131241,a61)+P1156(x131241,a42)
% 32.24/32.05 [13125]~P1257(x131251,a62)+P1156(x131251,a42)
% 32.24/32.05 [13126]~P1243(x131261,a92)+P1156(x131261,a42)
% 32.24/32.05 [13127]~P1241(x131271,a83)+P1156(x131271,a42)
% 32.24/32.05 [13128]~P1233(x131281,a29)+P1156(x131281,a42)
% 32.24/32.05 [13129]~P1230(x131291,a91)+P1156(x131291,a42)
% 32.24/32.05 [13130]~P1221(x131301,a31)+P1156(x131301,a42)
% 32.24/32.05 [13131]~P1219(x131311,a30)+P1156(x131311,a42)
% 32.24/32.05 [13132]~P1208(x131321,a33)+P1156(x131321,a42)
% 32.24/32.05 [13133]~P1205(x131331,a32)+P1156(x131331,a42)
% 32.24/32.05 [13134]~P1193(x131341,a35)+P1156(x131341,a42)
% 32.24/32.05 [13135]~P1190(x131351,a34)+P1156(x131351,a42)
% 32.24/32.05 [13136]~P1185(x131361,a37)+P1156(x131361,a42)
% 32.24/32.05 [13137]~P1179(x131371,a36)+P1156(x131371,a42)
% 32.24/32.05 [13138]~P1170(x131381,a40)+P1156(x131381,a42)
% 32.24/32.05 [13139]~P1167(x131391,a38)+P1156(x131391,a42)
% 32.24/32.05 [13140]~P1110(x131401,a41)+P1156(x131401,a42)
% 32.24/32.05 [13141]~P1297(x131411,a26)+P1156(x131411,a43)
% 32.24/32.05 [13142]~P1295(x131421,a27)+P1156(x131421,a43)
% 32.24/32.05 [13143]~P1287(x131431,a39)+P1156(x131431,a43)
% 32.24/32.05 [13144]~P1284(x131441,a28)+P1156(x131441,a43)
% 32.24/32.05 [13145]~P1275(x131451,a62)+P1156(x131451,a43)
% 32.24/32.05 [13146]~P1273(x131461,a50)+P1156(x131461,a43)
% 32.24/32.05 [13147]~P1261(x131471,a83)+P1156(x131471,a43)
% 32.24/32.05 [13148]~P1257(x131481,a61)+P1156(x131481,a43)
% 32.24/32.05 [13149]~P1243(x131491,a91)+P1156(x131491,a43)
% 32.24/32.05 [13150]~P1241(x131501,a92)+P1156(x131501,a43)
% 32.24/32.05 [13151]~P1233(x131511,a30)+P1156(x131511,a43)
% 32.24/32.05 [13152]~P1230(x131521,a29)+P1156(x131521,a43)
% 32.24/32.05 [13153]~P1221(x131531,a32)+P1156(x131531,a43)
% 32.24/32.05 [13154]~P1219(x131541,a31)+P1156(x131541,a43)
% 32.24/32.05 [13155]~P1208(x131551,a34)+P1156(x131551,a43)
% 32.24/32.05 [13156]~P1205(x131561,a33)+P1156(x131561,a43)
% 32.24/32.05 [13157]~P1193(x131571,a36)+P1156(x131571,a43)
% 32.24/32.05 [13158]~P1190(x131581,a35)+P1156(x131581,a43)
% 32.24/32.05 [13159]~P1185(x131591,a38)+P1156(x131591,a43)
% 32.24/32.05 [13160]~P1179(x131601,a37)+P1156(x131601,a43)
% 32.24/32.05 [13161]~P1170(x131611,a41)+P1156(x131611,a43)
% 32.24/32.05 [13162]~P1167(x131621,a40)+P1156(x131621,a43)
% 32.24/32.05 [13163]~P1110(x131631,a42)+P1156(x131631,a43)
% 32.24/32.05 [13164]~P1315(x131641,a27)+P1156(x131641,a44)
% 32.24/32.05 [13165]~P1297(x131651,a28)+P1156(x131651,a44)
% 32.24/32.05 [13166]~P1295(x131661,a26)+P1156(x131661,a44)
% 32.24/32.05 [13167]~P1287(x131671,a50)+P1156(x131671,a44)
% 32.24/32.05 [13168]~P1284(x131681,a39)+P1156(x131681,a44)
% 32.24/32.05 [13169]~P1275(x131691,a61)+P1156(x131691,a44)
% 32.24/32.05 [13170]~P1273(x131701,a62)+P1156(x131701,a44)
% 32.24/32.05 [13171]~P1261(x131711,a92)+P1156(x131711,a44)
% 32.24/32.05 [13172]~P1257(x131721,a83)+P1156(x131721,a44)
% 32.24/32.05 [13173]~P1243(x131731,a29)+P1156(x131731,a44)
% 32.24/32.05 [13174]~P1241(x131741,a91)+P1156(x131741,a44)
% 32.24/32.05 [13175]~P1233(x131751,a31)+P1156(x131751,a44)
% 32.24/32.05 [13176]~P1230(x131761,a30)+P1156(x131761,a44)
% 32.24/32.05 [13177]~P1221(x131771,a33)+P1156(x131771,a44)
% 32.24/32.05 [13178]~P1219(x131781,a32)+P1156(x131781,a44)
% 32.24/32.05 [13179]~P1208(x131791,a35)+P1156(x131791,a44)
% 32.24/32.05 [13180]~P1205(x131801,a34)+P1156(x131801,a44)
% 32.24/32.05 [13181]~P1193(x131811,a37)+P1156(x131811,a44)
% 32.24/32.05 [13182]~P1190(x131821,a36)+P1156(x131821,a44)
% 32.24/32.05 [13183]~P1185(x131831,a40)+P1156(x131831,a44)
% 32.24/32.05 [13184]~P1179(x131841,a38)+P1156(x131841,a44)
% 32.24/32.05 [13185]~P1170(x131851,a42)+P1156(x131851,a44)
% 32.24/32.05 [13186]~P1167(x131861,a41)+P1156(x131861,a44)
% 32.24/32.05 [13187]~P1110(x131871,a43)+P1156(x131871,a44)
% 32.24/32.05 [13188]~P1315(x131881,a26)+P1156(x131881,a45)
% 32.24/32.05 [13189]~P1308(x131891,a27)+P1156(x131891,a45)
% 32.24/32.05 [13190]~P1297(x131901,a39)+P1156(x131901,a45)
% 32.24/32.05 [13191]~P1295(x131911,a28)+P1156(x131911,a45)
% 32.24/32.05 [13192]~P1287(x131921,a62)+P1156(x131921,a45)
% 32.24/32.05 [13193]~P1284(x131931,a50)+P1156(x131931,a45)
% 32.24/32.05 [13194]~P1275(x131941,a83)+P1156(x131941,a45)
% 32.24/32.05 [13195]~P1273(x131951,a61)+P1156(x131951,a45)
% 32.24/32.05 [13196]~P1261(x131961,a91)+P1156(x131961,a45)
% 32.24/32.05 [13197]~P1257(x131971,a92)+P1156(x131971,a45)
% 32.24/32.05 [13198]~P1243(x131981,a30)+P1156(x131981,a45)
% 32.24/32.05 [13199]~P1241(x131991,a29)+P1156(x131991,a45)
% 32.24/32.05 [13200]~P1233(x132001,a32)+P1156(x132001,a45)
% 32.24/32.05 [13201]~P1230(x132011,a31)+P1156(x132011,a45)
% 32.24/32.05 [13202]~P1221(x132021,a34)+P1156(x132021,a45)
% 32.24/32.05 [13203]~P1219(x132031,a33)+P1156(x132031,a45)
% 32.24/32.05 [13204]~P1208(x132041,a36)+P1156(x132041,a45)
% 32.24/32.05 [13205]~P1205(x132051,a35)+P1156(x132051,a45)
% 32.24/32.05 [13206]~P1193(x132061,a38)+P1156(x132061,a45)
% 32.24/32.05 [13207]~P1190(x132071,a37)+P1156(x132071,a45)
% 32.24/32.05 [13208]~P1185(x132081,a41)+P1156(x132081,a45)
% 32.24/32.05 [13209]~P1179(x132091,a40)+P1156(x132091,a45)
% 32.24/32.05 [13210]~P1170(x132101,a43)+P1156(x132101,a45)
% 32.24/32.05 [13211]~P1167(x132111,a42)+P1156(x132111,a45)
% 32.24/32.05 [13212]~P1110(x132121,a44)+P1156(x132121,a45)
% 32.24/32.05 [13213]~P1323(x132131,a27)+P1156(x132131,a46)
% 32.24/32.05 [13214]~P1315(x132141,a28)+P1156(x132141,a46)
% 32.24/32.05 [13215]~P1308(x132151,a26)+P1156(x132151,a46)
% 32.24/32.05 [13216]~P1297(x132161,a50)+P1156(x132161,a46)
% 32.24/32.05 [13217]~P1295(x132171,a39)+P1156(x132171,a46)
% 32.24/32.05 [13218]~P1287(x132181,a61)+P1156(x132181,a46)
% 32.24/32.05 [13219]~P1284(x132191,a62)+P1156(x132191,a46)
% 32.24/32.05 [13220]~P1275(x132201,a92)+P1156(x132201,a46)
% 32.24/32.05 [13221]~P1273(x132211,a83)+P1156(x132211,a46)
% 32.24/32.05 [13222]~P1261(x132221,a29)+P1156(x132221,a46)
% 32.24/32.05 [13223]~P1257(x132231,a91)+P1156(x132231,a46)
% 32.24/32.05 [13224]~P1243(x132241,a31)+P1156(x132241,a46)
% 32.24/32.05 [13225]~P1241(x132251,a30)+P1156(x132251,a46)
% 32.24/32.05 [13226]~P1233(x132261,a33)+P1156(x132261,a46)
% 32.24/32.05 [13227]~P1230(x132271,a32)+P1156(x132271,a46)
% 32.24/32.05 [13228]~P1221(x132281,a35)+P1156(x132281,a46)
% 32.24/32.05 [13229]~P1219(x132291,a34)+P1156(x132291,a46)
% 32.24/32.05 [13230]~P1208(x132301,a37)+P1156(x132301,a46)
% 32.24/32.05 [13231]~P1205(x132311,a36)+P1156(x132311,a46)
% 32.24/32.05 [13232]~P1193(x132321,a40)+P1156(x132321,a46)
% 32.24/32.05 [13233]~P1190(x132331,a38)+P1156(x132331,a46)
% 32.24/32.05 [13234]~P1185(x132341,a42)+P1156(x132341,a46)
% 32.24/32.05 [13235]~P1179(x132351,a41)+P1156(x132351,a46)
% 32.24/32.05 [13236]~P1170(x132361,a44)+P1156(x132361,a46)
% 32.24/32.05 [13237]~P1167(x132371,a43)+P1156(x132371,a46)
% 32.24/32.05 [13238]~P1110(x132381,a45)+P1156(x132381,a46)
% 32.24/32.05 [13239]~P1323(x132391,a26)+P1156(x132391,a47)
% 32.24/32.05 [13240]~P1321(x132401,a27)+P1156(x132401,a47)
% 32.24/32.05 [13241]~P1315(x132411,a39)+P1156(x132411,a47)
% 32.24/32.05 [13242]~P1308(x132421,a28)+P1156(x132421,a47)
% 32.24/32.05 [13243]~P1297(x132431,a62)+P1156(x132431,a47)
% 32.24/32.05 [13244]~P1295(x132441,a50)+P1156(x132441,a47)
% 32.24/32.05 [13245]~P1287(x132451,a83)+P1156(x132451,a47)
% 32.24/32.05 [13246]~P1284(x132461,a61)+P1156(x132461,a47)
% 32.24/32.05 [13247]~P1275(x132471,a91)+P1156(x132471,a47)
% 32.24/32.05 [13248]~P1273(x132481,a92)+P1156(x132481,a47)
% 32.24/32.05 [13249]~P1261(x132491,a30)+P1156(x132491,a47)
% 32.24/32.05 [13250]~P1257(x132501,a29)+P1156(x132501,a47)
% 32.24/32.05 [13251]~P1243(x132511,a32)+P1156(x132511,a47)
% 32.24/32.05 [13252]~P1241(x132521,a31)+P1156(x132521,a47)
% 32.24/32.05 [13253]~P1233(x132531,a34)+P1156(x132531,a47)
% 32.24/32.05 [13254]~P1230(x132541,a33)+P1156(x132541,a47)
% 32.24/32.05 [13255]~P1221(x132551,a36)+P1156(x132551,a47)
% 32.24/32.05 [13256]~P1219(x132561,a35)+P1156(x132561,a47)
% 32.24/32.05 [13257]~P1208(x132571,a38)+P1156(x132571,a47)
% 32.24/32.05 [13258]~P1205(x132581,a37)+P1156(x132581,a47)
% 32.24/32.05 [13259]~P1193(x132591,a41)+P1156(x132591,a47)
% 32.24/32.05 [13260]~P1190(x132601,a40)+P1156(x132601,a47)
% 32.24/32.05 [13261]~P1185(x132611,a43)+P1156(x132611,a47)
% 32.24/32.05 [13262]~P1179(x132621,a42)+P1156(x132621,a47)
% 32.24/32.05 [13263]~P1170(x132631,a45)+P1156(x132631,a47)
% 32.24/32.05 [13264]~P1167(x132641,a44)+P1156(x132641,a47)
% 32.24/32.05 [13265]~P1110(x132651,a46)+P1156(x132651,a47)
% 32.24/32.05 [13266]~P1336(x132661,a27)+P1156(x132661,a48)
% 32.24/32.05 [13267]~P1323(x132671,a28)+P1156(x132671,a48)
% 32.24/32.05 [13268]~P1321(x132681,a26)+P1156(x132681,a48)
% 32.24/32.05 [13269]~P1315(x132691,a50)+P1156(x132691,a48)
% 32.24/32.05 [13270]~P1308(x132701,a39)+P1156(x132701,a48)
% 32.24/32.05 [13271]~P1297(x132711,a61)+P1156(x132711,a48)
% 32.24/32.05 [13272]~P1295(x132721,a62)+P1156(x132721,a48)
% 32.24/32.05 [13273]~P1287(x132731,a92)+P1156(x132731,a48)
% 32.24/32.05 [13274]~P1284(x132741,a83)+P1156(x132741,a48)
% 32.24/32.05 [13275]~P1275(x132751,a29)+P1156(x132751,a48)
% 32.24/32.05 [13276]~P1273(x132761,a91)+P1156(x132761,a48)
% 32.24/32.05 [13277]~P1261(x132771,a31)+P1156(x132771,a48)
% 32.24/32.05 [13278]~P1257(x132781,a30)+P1156(x132781,a48)
% 32.24/32.05 [13279]~P1243(x132791,a33)+P1156(x132791,a48)
% 32.24/32.05 [13280]~P1241(x132801,a32)+P1156(x132801,a48)
% 32.24/32.05 [13281]~P1233(x132811,a35)+P1156(x132811,a48)
% 32.24/32.05 [13282]~P1230(x132821,a34)+P1156(x132821,a48)
% 32.24/32.05 [13283]~P1221(x132831,a37)+P1156(x132831,a48)
% 32.24/32.05 [13284]~P1219(x132841,a36)+P1156(x132841,a48)
% 32.24/32.05 [13285]~P1208(x132851,a40)+P1156(x132851,a48)
% 32.24/32.05 [13286]~P1205(x132861,a38)+P1156(x132861,a48)
% 32.24/32.05 [13287]~P1193(x132871,a42)+P1156(x132871,a48)
% 32.24/32.05 [13288]~P1190(x132881,a41)+P1156(x132881,a48)
% 32.24/32.05 [13289]~P1185(x132891,a44)+P1156(x132891,a48)
% 32.24/32.05 [13290]~P1179(x132901,a43)+P1156(x132901,a48)
% 32.24/32.05 [13291]~P1170(x132911,a46)+P1156(x132911,a48)
% 32.24/32.05 [13292]~P1167(x132921,a45)+P1156(x132921,a48)
% 32.24/32.05 [13293]~P1110(x132931,a47)+P1156(x132931,a48)
% 32.24/32.05 [13294]~P1336(x132941,a26)+P1156(x132941,a49)
% 32.24/32.05 [13295]~P1332(x132951,a27)+P1156(x132951,a49)
% 32.24/32.05 [13296]~P1323(x132961,a39)+P1156(x132961,a49)
% 32.24/32.05 [13297]~P1321(x132971,a28)+P1156(x132971,a49)
% 32.24/32.05 [13298]~P1315(x132981,a62)+P1156(x132981,a49)
% 32.24/32.05 [13299]~P1308(x132991,a50)+P1156(x132991,a49)
% 32.24/32.05 [13300]~P1297(x133001,a83)+P1156(x133001,a49)
% 32.24/32.05 [13301]~P1295(x133011,a61)+P1156(x133011,a49)
% 32.24/32.05 [13302]~P1287(x133021,a91)+P1156(x133021,a49)
% 32.24/32.05 [13303]~P1284(x133031,a92)+P1156(x133031,a49)
% 32.24/32.05 [13304]~P1275(x133041,a30)+P1156(x133041,a49)
% 32.24/32.05 [13305]~P1273(x133051,a29)+P1156(x133051,a49)
% 32.24/32.05 [13306]~P1261(x133061,a32)+P1156(x133061,a49)
% 32.24/32.05 [13307]~P1257(x133071,a31)+P1156(x133071,a49)
% 32.24/32.05 [13308]~P1243(x133081,a34)+P1156(x133081,a49)
% 32.24/32.05 [13309]~P1241(x133091,a33)+P1156(x133091,a49)
% 32.24/32.05 [13310]~P1233(x133101,a36)+P1156(x133101,a49)
% 32.24/32.05 [13311]~P1230(x133111,a35)+P1156(x133111,a49)
% 32.24/32.05 [13312]~P1221(x133121,a38)+P1156(x133121,a49)
% 32.24/32.05 [13313]~P1219(x133131,a37)+P1156(x133131,a49)
% 32.24/32.05 [13314]~P1208(x133141,a41)+P1156(x133141,a49)
% 32.24/32.05 [13315]~P1205(x133151,a40)+P1156(x133151,a49)
% 32.24/32.05 [13316]~P1193(x133161,a43)+P1156(x133161,a49)
% 32.24/32.05 [13317]~P1190(x133171,a42)+P1156(x133171,a49)
% 32.24/32.05 [13318]~P1185(x133181,a45)+P1156(x133181,a49)
% 32.24/32.05 [13319]~P1179(x133191,a44)+P1156(x133191,a49)
% 32.24/32.05 [13320]~P1170(x133201,a47)+P1156(x133201,a49)
% 32.24/32.05 [13321]~P1167(x133211,a46)+P1156(x133211,a49)
% 32.24/32.05 [13322]~P1110(x133221,a48)+P1156(x133221,a49)
% 32.24/32.05 [13323]~P1346(x133231,a27)+P1156(x133231,a51)
% 32.24/32.05 [13324]~P1336(x133241,a28)+P1156(x133241,a51)
% 32.24/32.05 [13325]~P1332(x133251,a26)+P1156(x133251,a51)
% 32.24/32.05 [13326]~P1323(x133261,a50)+P1156(x133261,a51)
% 32.24/32.05 [13327]~P1321(x133271,a39)+P1156(x133271,a51)
% 32.24/32.05 [13328]~P1315(x133281,a61)+P1156(x133281,a51)
% 32.24/32.05 [13329]~P1308(x133291,a62)+P1156(x133291,a51)
% 32.24/32.05 [13330]~P1297(x133301,a92)+P1156(x133301,a51)
% 32.24/32.05 [13331]~P1295(x133311,a83)+P1156(x133311,a51)
% 32.24/32.05 [13332]~P1287(x133321,a29)+P1156(x133321,a51)
% 32.24/32.05 [13333]~P1284(x133331,a91)+P1156(x133331,a51)
% 32.24/32.05 [13334]~P1275(x133341,a31)+P1156(x133341,a51)
% 32.24/32.05 [13335]~P1273(x133351,a30)+P1156(x133351,a51)
% 32.24/32.05 [13336]~P1261(x133361,a33)+P1156(x133361,a51)
% 32.24/32.05 [13337]~P1257(x133371,a32)+P1156(x133371,a51)
% 32.24/32.05 [13338]~P1243(x133381,a35)+P1156(x133381,a51)
% 32.24/32.05 [13339]~P1241(x133391,a34)+P1156(x133391,a51)
% 32.24/32.05 [13340]~P1233(x133401,a37)+P1156(x133401,a51)
% 32.24/32.05 [13341]~P1230(x133411,a36)+P1156(x133411,a51)
% 32.24/32.05 [13342]~P1221(x133421,a40)+P1156(x133421,a51)
% 32.24/32.05 [13343]~P1219(x133431,a38)+P1156(x133431,a51)
% 32.24/32.05 [13344]~P1208(x133441,a42)+P1156(x133441,a51)
% 32.24/32.05 [13345]~P1205(x133451,a41)+P1156(x133451,a51)
% 32.24/32.05 [13346]~P1193(x133461,a44)+P1156(x133461,a51)
% 32.24/32.05 [13347]~P1190(x133471,a43)+P1156(x133471,a51)
% 32.24/32.05 [13348]~P1185(x133481,a46)+P1156(x133481,a51)
% 32.24/32.05 [13349]~P1179(x133491,a45)+P1156(x133491,a51)
% 32.24/32.05 [13350]~P1170(x133501,a48)+P1156(x133501,a51)
% 32.24/32.05 [13351]~P1167(x133511,a47)+P1156(x133511,a51)
% 32.24/32.05 [13352]~P1110(x133521,a49)+P1156(x133521,a51)
% 32.24/32.05 [13353]~P1346(x133531,a26)+P1156(x133531,a52)
% 32.24/32.05 [13354]~P1343(x133541,a27)+P1156(x133541,a52)
% 32.24/32.05 [13355]~P1336(x133551,a39)+P1156(x133551,a52)
% 32.24/32.05 [13356]~P1332(x133561,a28)+P1156(x133561,a52)
% 32.24/32.05 [13357]~P1323(x133571,a62)+P1156(x133571,a52)
% 32.24/32.05 [13358]~P1321(x133581,a50)+P1156(x133581,a52)
% 32.24/32.05 [13359]~P1315(x133591,a83)+P1156(x133591,a52)
% 32.24/32.05 [13360]~P1308(x133601,a61)+P1156(x133601,a52)
% 32.24/32.05 [13361]~P1297(x133611,a91)+P1156(x133611,a52)
% 32.24/32.05 [13362]~P1295(x133621,a92)+P1156(x133621,a52)
% 32.24/32.05 [13363]~P1287(x133631,a30)+P1156(x133631,a52)
% 32.24/32.05 [13364]~P1284(x133641,a29)+P1156(x133641,a52)
% 32.24/32.05 [13365]~P1275(x133651,a32)+P1156(x133651,a52)
% 32.24/32.05 [13366]~P1273(x133661,a31)+P1156(x133661,a52)
% 32.24/32.05 [13367]~P1261(x133671,a34)+P1156(x133671,a52)
% 32.24/32.05 [13368]~P1257(x133681,a33)+P1156(x133681,a52)
% 32.24/32.05 [13369]~P1243(x133691,a36)+P1156(x133691,a52)
% 32.24/32.05 [13370]~P1241(x133701,a35)+P1156(x133701,a52)
% 32.24/32.05 [13371]~P1233(x133711,a38)+P1156(x133711,a52)
% 32.24/32.05 [13372]~P1230(x133721,a37)+P1156(x133721,a52)
% 32.24/32.05 [13373]~P1221(x133731,a41)+P1156(x133731,a52)
% 32.24/32.05 [13374]~P1219(x133741,a40)+P1156(x133741,a52)
% 32.24/32.05 [13375]~P1208(x133751,a43)+P1156(x133751,a52)
% 32.24/32.05 [13376]~P1205(x133761,a42)+P1156(x133761,a52)
% 32.24/32.05 [13377]~P1193(x133771,a45)+P1156(x133771,a52)
% 32.24/32.05 [13378]~P1190(x133781,a44)+P1156(x133781,a52)
% 32.24/32.05 [13379]~P1185(x133791,a47)+P1156(x133791,a52)
% 32.24/32.05 [13380]~P1179(x133801,a46)+P1156(x133801,a52)
% 32.24/32.05 [13381]~P1170(x133811,a49)+P1156(x133811,a52)
% 32.24/32.05 [13382]~P1167(x133821,a48)+P1156(x133821,a52)
% 32.24/32.05 [13383]~P1110(x133831,a51)+P1156(x133831,a52)
% 32.24/32.05 [13384]~P1346(x133841,a28)+P1156(x133841,a53)
% 32.24/32.05 [13385]~P1343(x133851,a26)+P1156(x133851,a53)
% 32.24/32.05 [13386]~P1336(x133861,a50)+P1156(x133861,a53)
% 32.24/32.05 [13387]~P1332(x133871,a39)+P1156(x133871,a53)
% 32.24/32.05 [13388]~P1323(x133881,a61)+P1156(x133881,a53)
% 32.24/32.05 [13389]~P1321(x133891,a62)+P1156(x133891,a53)
% 32.24/32.05 [13390]~P1315(x133901,a92)+P1156(x133901,a53)
% 32.24/32.05 [13391]~P1308(x133911,a83)+P1156(x133911,a53)
% 32.24/32.05 [13392]~P1297(x133921,a29)+P1156(x133921,a53)
% 32.24/32.05 [13393]~P1295(x133931,a91)+P1156(x133931,a53)
% 32.24/32.05 [13394]~P1287(x133941,a31)+P1156(x133941,a53)
% 32.24/32.05 [13395]~P1284(x133951,a30)+P1156(x133951,a53)
% 32.24/32.05 [13396]~P1275(x133961,a33)+P1156(x133961,a53)
% 32.24/32.05 [13397]~P1273(x133971,a32)+P1156(x133971,a53)
% 32.24/32.05 [13398]~P1261(x133981,a35)+P1156(x133981,a53)
% 32.24/32.05 [13399]~P1257(x133991,a34)+P1156(x133991,a53)
% 32.24/32.05 [13400]~P1243(x134001,a37)+P1156(x134001,a53)
% 32.24/32.05 [13401]~P1241(x134011,a36)+P1156(x134011,a53)
% 32.24/32.05 [13402]~P1233(x134021,a40)+P1156(x134021,a53)
% 32.24/32.05 [13403]~P1230(x134031,a38)+P1156(x134031,a53)
% 32.24/32.05 [13404]~P1221(x134041,a42)+P1156(x134041,a53)
% 32.24/32.05 [13405]~P1219(x134051,a41)+P1156(x134051,a53)
% 32.24/32.05 [13406]~P1208(x134061,a44)+P1156(x134061,a53)
% 32.24/32.05 [13407]~P1205(x134071,a43)+P1156(x134071,a53)
% 32.24/32.05 [13408]~P1193(x134081,a46)+P1156(x134081,a53)
% 32.24/32.05 [13409]~P1190(x134091,a45)+P1156(x134091,a53)
% 32.24/32.05 [13410]~P1185(x134101,a48)+P1156(x134101,a53)
% 32.24/32.05 [13411]~P1179(x134111,a47)+P1156(x134111,a53)
% 32.24/32.05 [13412]~P1170(x134121,a51)+P1156(x134121,a53)
% 32.24/32.05 [13413]~P1167(x134131,a49)+P1156(x134131,a53)
% 32.24/32.05 [13414]~P1110(x134141,a52)+P1156(x134141,a53)
% 32.24/32.05 [13415]~P1147(x134151,a27)+P1156(x134151,a53)
% 32.24/32.05 [13416]~P1346(x134161,a39)+P1156(x134161,a54)
% 32.24/32.05 [13417]~P1343(x134171,a28)+P1156(x134171,a54)
% 32.24/32.05 [13418]~P1336(x134181,a62)+P1156(x134181,a54)
% 32.24/32.05 [13419]~P1332(x134191,a50)+P1156(x134191,a54)
% 32.24/32.05 [13420]~P1323(x134201,a83)+P1156(x134201,a54)
% 32.24/32.05 [13421]~P1321(x134211,a61)+P1156(x134211,a54)
% 32.24/32.05 [13422]~P1315(x134221,a91)+P1156(x134221,a54)
% 32.24/32.05 [13423]~P1308(x134231,a92)+P1156(x134231,a54)
% 32.24/32.05 [13424]~P1297(x134241,a30)+P1156(x134241,a54)
% 32.24/32.05 [13425]~P1295(x134251,a29)+P1156(x134251,a54)
% 32.24/32.05 [13426]~P1287(x134261,a32)+P1156(x134261,a54)
% 32.24/32.05 [13427]~P1284(x134271,a31)+P1156(x134271,a54)
% 32.24/32.05 [13428]~P1275(x134281,a34)+P1156(x134281,a54)
% 32.24/32.05 [13429]~P1273(x134291,a33)+P1156(x134291,a54)
% 32.24/32.05 [13430]~P1261(x134301,a36)+P1156(x134301,a54)
% 32.24/32.05 [13431]~P1257(x134311,a35)+P1156(x134311,a54)
% 32.24/32.05 [13432]~P1243(x134321,a38)+P1156(x134321,a54)
% 32.24/32.05 [13433]~P1241(x134331,a37)+P1156(x134331,a54)
% 32.24/32.05 [13434]~P1233(x134341,a41)+P1156(x134341,a54)
% 32.24/32.05 [13435]~P1230(x134351,a40)+P1156(x134351,a54)
% 32.24/32.05 [13436]~P1221(x134361,a43)+P1156(x134361,a54)
% 32.24/32.05 [13437]~P1219(x134371,a42)+P1156(x134371,a54)
% 32.24/32.05 [13438]~P1208(x134381,a45)+P1156(x134381,a54)
% 32.24/32.05 [13439]~P1205(x134391,a44)+P1156(x134391,a54)
% 32.24/32.05 [13440]~P1193(x134401,a47)+P1156(x134401,a54)
% 32.24/32.05 [13441]~P1190(x134411,a46)+P1156(x134411,a54)
% 32.24/32.05 [13442]~P1185(x134421,a49)+P1156(x134421,a54)
% 32.24/32.05 [13443]~P1179(x134431,a48)+P1156(x134431,a54)
% 32.24/32.05 [13444]~P1170(x134441,a52)+P1156(x134441,a54)
% 32.24/32.05 [13445]~P1167(x134451,a51)+P1156(x134451,a54)
% 32.24/32.05 [13446]~P1110(x134461,a53)+P1156(x134461,a54)
% 32.24/32.05 [13447]~P1147(x134471,a26)+P1156(x134471,a54)
% 32.24/32.05 [13448]~P1346(x134481,a50)+P1156(x134481,a55)
% 32.24/32.05 [13449]~P1343(x134491,a39)+P1156(x134491,a55)
% 32.24/32.05 [13450]~P1336(x134501,a61)+P1156(x134501,a55)
% 32.24/32.05 [13451]~P1332(x134511,a62)+P1156(x134511,a55)
% 32.24/32.05 [13452]~P1323(x134521,a92)+P1156(x134521,a55)
% 32.24/32.05 [13453]~P1321(x134531,a83)+P1156(x134531,a55)
% 32.24/32.05 [13454]~P1315(x134541,a29)+P1156(x134541,a55)
% 32.24/32.05 [13455]~P1308(x134551,a91)+P1156(x134551,a55)
% 32.24/32.05 [13456]~P1297(x134561,a31)+P1156(x134561,a55)
% 32.24/32.05 [13457]~P1295(x134571,a30)+P1156(x134571,a55)
% 32.24/32.05 [13458]~P1287(x134581,a33)+P1156(x134581,a55)
% 32.24/32.05 [13459]~P1284(x134591,a32)+P1156(x134591,a55)
% 32.24/32.05 [13460]~P1275(x134601,a35)+P1156(x134601,a55)
% 32.24/32.05 [13461]~P1273(x134611,a34)+P1156(x134611,a55)
% 32.24/32.05 [13462]~P1261(x134621,a37)+P1156(x134621,a55)
% 32.24/32.05 [13463]~P1257(x134631,a36)+P1156(x134631,a55)
% 32.24/32.05 [13464]~P1243(x134641,a40)+P1156(x134641,a55)
% 32.24/32.05 [13465]~P1241(x134651,a38)+P1156(x134651,a55)
% 32.24/32.05 [13466]~P1233(x134661,a42)+P1156(x134661,a55)
% 32.24/32.05 [13467]~P1230(x134671,a41)+P1156(x134671,a55)
% 32.24/32.05 [13468]~P1221(x134681,a44)+P1156(x134681,a55)
% 32.24/32.05 [13469]~P1219(x134691,a43)+P1156(x134691,a55)
% 32.24/32.05 [13470]~P1208(x134701,a46)+P1156(x134701,a55)
% 32.24/32.05 [13471]~P1205(x134711,a45)+P1156(x134711,a55)
% 32.24/32.05 [13472]~P1193(x134721,a48)+P1156(x134721,a55)
% 32.24/32.05 [13473]~P1190(x134731,a47)+P1156(x134731,a55)
% 32.24/32.05 [13474]~P1185(x134741,a51)+P1156(x134741,a55)
% 32.24/32.05 [13475]~P1179(x134751,a49)+P1156(x134751,a55)
% 32.24/32.05 [13476]~P1170(x134761,a53)+P1156(x134761,a55)
% 32.24/32.05 [13477]~P1167(x134771,a52)+P1156(x134771,a55)
% 32.24/32.05 [13478]~P1110(x134781,a54)+P1156(x134781,a55)
% 32.24/32.05 [13479]~P1147(x134791,a28)+P1156(x134791,a55)
% 32.24/32.05 [13480]~P1346(x134801,a62)+P1156(x134801,a56)
% 32.24/32.05 [13481]~P1343(x134811,a50)+P1156(x134811,a56)
% 32.24/32.05 [13482]~P1336(x134821,a83)+P1156(x134821,a56)
% 32.24/32.05 [13483]~P1332(x134831,a61)+P1156(x134831,a56)
% 32.24/32.05 [13484]~P1323(x134841,a91)+P1156(x134841,a56)
% 32.24/32.05 [13485]~P1321(x134851,a92)+P1156(x134851,a56)
% 32.24/32.05 [13486]~P1315(x134861,a30)+P1156(x134861,a56)
% 32.24/32.05 [13487]~P1308(x134871,a29)+P1156(x134871,a56)
% 32.24/32.05 [13488]~P1297(x134881,a32)+P1156(x134881,a56)
% 32.24/32.05 [13489]~P1295(x134891,a31)+P1156(x134891,a56)
% 32.24/32.05 [13490]~P1287(x134901,a34)+P1156(x134901,a56)
% 32.24/32.05 [13491]~P1284(x134911,a33)+P1156(x134911,a56)
% 32.24/32.05 [13492]~P1275(x134921,a36)+P1156(x134921,a56)
% 32.24/32.05 [13493]~P1273(x134931,a35)+P1156(x134931,a56)
% 32.24/32.05 [13494]~P1261(x134941,a38)+P1156(x134941,a56)
% 32.24/32.05 [13495]~P1257(x134951,a37)+P1156(x134951,a56)
% 32.24/32.05 [13496]~P1243(x134961,a41)+P1156(x134961,a56)
% 32.24/32.05 [13497]~P1241(x134971,a40)+P1156(x134971,a56)
% 32.24/32.05 [13498]~P1233(x134981,a43)+P1156(x134981,a56)
% 32.24/32.05 [13499]~P1230(x134991,a42)+P1156(x134991,a56)
% 32.24/32.05 [13500]~P1221(x135001,a45)+P1156(x135001,a56)
% 32.24/32.05 [13501]~P1219(x135011,a44)+P1156(x135011,a56)
% 32.24/32.05 [13502]~P1208(x135021,a47)+P1156(x135021,a56)
% 32.24/32.05 [13503]~P1205(x135031,a46)+P1156(x135031,a56)
% 32.24/32.05 [13504]~P1193(x135041,a49)+P1156(x135041,a56)
% 32.24/32.05 [13505]~P1190(x135051,a48)+P1156(x135051,a56)
% 32.24/32.05 [13506]~P1185(x135061,a52)+P1156(x135061,a56)
% 32.24/32.05 [13507]~P1179(x135071,a51)+P1156(x135071,a56)
% 32.24/32.05 [13508]~P1170(x135081,a54)+P1156(x135081,a56)
% 32.24/32.05 [13509]~P1167(x135091,a53)+P1156(x135091,a56)
% 32.24/32.05 [13510]~P1110(x135101,a55)+P1156(x135101,a56)
% 32.24/32.05 [13511]~P1147(x135111,a39)+P1156(x135111,a56)
% 32.24/32.05 [13512]~P1346(x135121,a61)+P1156(x135121,a57)
% 32.24/32.05 [13513]~P1343(x135131,a62)+P1156(x135131,a57)
% 32.24/32.05 [13514]~P1336(x135141,a92)+P1156(x135141,a57)
% 32.24/32.05 [13515]~P1332(x135151,a83)+P1156(x135151,a57)
% 32.24/32.05 [13516]~P1323(x135161,a29)+P1156(x135161,a57)
% 32.24/32.05 [13517]~P1321(x135171,a91)+P1156(x135171,a57)
% 32.24/32.05 [13518]~P1315(x135181,a31)+P1156(x135181,a57)
% 32.24/32.05 [13519]~P1308(x135191,a30)+P1156(x135191,a57)
% 32.24/32.05 [13520]~P1297(x135201,a33)+P1156(x135201,a57)
% 32.24/32.05 [13521]~P1295(x135211,a32)+P1156(x135211,a57)
% 32.24/32.05 [13522]~P1287(x135221,a35)+P1156(x135221,a57)
% 32.24/32.05 [13523]~P1284(x135231,a34)+P1156(x135231,a57)
% 32.24/32.05 [13524]~P1275(x135241,a37)+P1156(x135241,a57)
% 32.24/32.05 [13525]~P1273(x135251,a36)+P1156(x135251,a57)
% 32.24/32.05 [13526]~P1261(x135261,a40)+P1156(x135261,a57)
% 32.24/32.05 [13527]~P1257(x135271,a38)+P1156(x135271,a57)
% 32.24/32.05 [13528]~P1243(x135281,a42)+P1156(x135281,a57)
% 32.24/32.05 [13529]~P1241(x135291,a41)+P1156(x135291,a57)
% 32.24/32.05 [13530]~P1233(x135301,a44)+P1156(x135301,a57)
% 32.24/32.05 [13531]~P1230(x135311,a43)+P1156(x135311,a57)
% 32.24/32.05 [13532]~P1221(x135321,a46)+P1156(x135321,a57)
% 32.24/32.05 [13533]~P1219(x135331,a45)+P1156(x135331,a57)
% 32.24/32.05 [13534]~P1208(x135341,a48)+P1156(x135341,a57)
% 32.24/32.05 [13535]~P1205(x135351,a47)+P1156(x135351,a57)
% 32.24/32.05 [13536]~P1193(x135361,a51)+P1156(x135361,a57)
% 32.24/32.05 [13537]~P1190(x135371,a49)+P1156(x135371,a57)
% 32.24/32.05 [13538]~P1185(x135381,a53)+P1156(x135381,a57)
% 32.24/32.05 [13539]~P1179(x135391,a52)+P1156(x135391,a57)
% 32.24/32.05 [13540]~P1170(x135401,a55)+P1156(x135401,a57)
% 32.24/32.05 [13541]~P1167(x135411,a54)+P1156(x135411,a57)
% 32.24/32.05 [13542]~P1110(x135421,a56)+P1156(x135421,a57)
% 32.24/32.05 [13543]~P1147(x135431,a50)+P1156(x135431,a57)
% 32.24/32.05 [13544]~P1346(x135441,a83)+P1156(x135441,a58)
% 32.24/32.05 [13545]~P1343(x135451,a61)+P1156(x135451,a58)
% 32.24/32.05 [13546]~P1336(x135461,a91)+P1156(x135461,a58)
% 32.24/32.05 [13547]~P1332(x135471,a92)+P1156(x135471,a58)
% 32.24/32.05 [13548]~P1323(x135481,a30)+P1156(x135481,a58)
% 32.24/32.05 [13549]~P1321(x135491,a29)+P1156(x135491,a58)
% 32.24/32.05 [13550]~P1315(x135501,a32)+P1156(x135501,a58)
% 32.24/32.05 [13551]~P1308(x135511,a31)+P1156(x135511,a58)
% 32.24/32.05 [13552]~P1297(x135521,a34)+P1156(x135521,a58)
% 32.24/32.05 [13553]~P1295(x135531,a33)+P1156(x135531,a58)
% 32.24/32.05 [13554]~P1287(x135541,a36)+P1156(x135541,a58)
% 32.24/32.05 [13555]~P1284(x135551,a35)+P1156(x135551,a58)
% 32.24/32.05 [13556]~P1275(x135561,a38)+P1156(x135561,a58)
% 32.24/32.05 [13557]~P1273(x135571,a37)+P1156(x135571,a58)
% 32.24/32.05 [13558]~P1261(x135581,a41)+P1156(x135581,a58)
% 32.24/32.05 [13559]~P1257(x135591,a40)+P1156(x135591,a58)
% 32.24/32.05 [13560]~P1243(x135601,a43)+P1156(x135601,a58)
% 32.24/32.05 [13561]~P1241(x135611,a42)+P1156(x135611,a58)
% 32.24/32.05 [13562]~P1233(x135621,a45)+P1156(x135621,a58)
% 32.24/32.05 [13563]~P1230(x135631,a44)+P1156(x135631,a58)
% 32.24/32.05 [13564]~P1221(x135641,a47)+P1156(x135641,a58)
% 32.24/32.05 [13565]~P1219(x135651,a46)+P1156(x135651,a58)
% 32.24/32.05 [13566]~P1208(x135661,a49)+P1156(x135661,a58)
% 32.24/32.05 [13567]~P1205(x135671,a48)+P1156(x135671,a58)
% 32.24/32.05 [13568]~P1193(x135681,a52)+P1156(x135681,a58)
% 32.24/32.05 [13569]~P1190(x135691,a51)+P1156(x135691,a58)
% 32.24/32.05 [13570]~P1185(x135701,a54)+P1156(x135701,a58)
% 32.24/32.05 [13571]~P1179(x135711,a53)+P1156(x135711,a58)
% 32.24/32.05 [13572]~P1170(x135721,a56)+P1156(x135721,a58)
% 32.24/32.05 [13573]~P1167(x135731,a55)+P1156(x135731,a58)
% 32.24/32.05 [13574]~P1110(x135741,a57)+P1156(x135741,a58)
% 32.24/32.05 [13575]~P1147(x135751,a62)+P1156(x135751,a58)
% 32.24/32.05 [13576]~P1346(x135761,a92)+P1156(x135761,a59)
% 32.24/32.05 [13577]~P1343(x135771,a83)+P1156(x135771,a59)
% 32.24/32.05 [13578]~P1336(x135781,a29)+P1156(x135781,a59)
% 32.24/32.05 [13579]~P1332(x135791,a91)+P1156(x135791,a59)
% 32.24/32.05 [13580]~P1323(x135801,a31)+P1156(x135801,a59)
% 32.24/32.05 [13581]~P1321(x135811,a30)+P1156(x135811,a59)
% 32.24/32.05 [13582]~P1315(x135821,a33)+P1156(x135821,a59)
% 32.24/32.05 [13583]~P1308(x135831,a32)+P1156(x135831,a59)
% 32.24/32.05 [13584]~P1297(x135841,a35)+P1156(x135841,a59)
% 32.24/32.05 [13585]~P1295(x135851,a34)+P1156(x135851,a59)
% 32.24/32.05 [13586]~P1287(x135861,a37)+P1156(x135861,a59)
% 32.24/32.05 [13587]~P1284(x135871,a36)+P1156(x135871,a59)
% 32.24/32.05 [13588]~P1275(x135881,a40)+P1156(x135881,a59)
% 32.24/32.05 [13589]~P1273(x135891,a38)+P1156(x135891,a59)
% 32.24/32.05 [13590]~P1261(x135901,a42)+P1156(x135901,a59)
% 32.24/32.05 [13591]~P1257(x135911,a41)+P1156(x135911,a59)
% 32.24/32.05 [13592]~P1243(x135921,a44)+P1156(x135921,a59)
% 32.24/32.05 [13593]~P1241(x135931,a43)+P1156(x135931,a59)
% 32.24/32.05 [13594]~P1233(x135941,a46)+P1156(x135941,a59)
% 32.24/32.05 [13595]~P1230(x135951,a45)+P1156(x135951,a59)
% 32.24/32.05 [13596]~P1221(x135961,a48)+P1156(x135961,a59)
% 32.24/32.05 [13597]~P1219(x135971,a47)+P1156(x135971,a59)
% 32.24/32.05 [13598]~P1208(x135981,a51)+P1156(x135981,a59)
% 32.24/32.05 [13599]~P1205(x135991,a49)+P1156(x135991,a59)
% 32.24/32.05 [13600]~P1193(x136001,a53)+P1156(x136001,a59)
% 32.24/32.05 [13601]~P1190(x136011,a52)+P1156(x136011,a59)
% 32.24/32.05 [13602]~P1185(x136021,a55)+P1156(x136021,a59)
% 32.24/32.05 [13603]~P1179(x136031,a54)+P1156(x136031,a59)
% 32.24/32.05 [13604]~P1170(x136041,a57)+P1156(x136041,a59)
% 32.24/32.05 [13605]~P1167(x136051,a56)+P1156(x136051,a59)
% 32.24/32.05 [13606]~P1110(x136061,a58)+P1156(x136061,a59)
% 32.24/32.05 [13607]~P1147(x136071,a61)+P1156(x136071,a59)
% 32.24/32.05 [13608]~P1346(x136081,a91)+P1156(x136081,a60)
% 32.24/32.05 [13609]~P1343(x136091,a92)+P1156(x136091,a60)
% 32.24/32.05 [13610]~P1336(x136101,a30)+P1156(x136101,a60)
% 32.24/32.05 [13611]~P1332(x136111,a29)+P1156(x136111,a60)
% 32.24/32.05 [13612]~P1323(x136121,a32)+P1156(x136121,a60)
% 32.24/32.05 [13613]~P1321(x136131,a31)+P1156(x136131,a60)
% 32.24/32.05 [13614]~P1315(x136141,a34)+P1156(x136141,a60)
% 32.24/32.05 [13615]~P1308(x136151,a33)+P1156(x136151,a60)
% 32.24/32.05 [13616]~P1297(x136161,a36)+P1156(x136161,a60)
% 32.24/32.05 [13617]~P1295(x136171,a35)+P1156(x136171,a60)
% 32.24/32.05 [13618]~P1287(x136181,a38)+P1156(x136181,a60)
% 32.24/32.05 [13619]~P1284(x136191,a37)+P1156(x136191,a60)
% 32.24/32.05 [13620]~P1275(x136201,a41)+P1156(x136201,a60)
% 32.24/32.05 [13621]~P1273(x136211,a40)+P1156(x136211,a60)
% 32.24/32.05 [13622]~P1261(x136221,a43)+P1156(x136221,a60)
% 32.24/32.05 [13623]~P1257(x136231,a42)+P1156(x136231,a60)
% 32.24/32.05 [13624]~P1243(x136241,a45)+P1156(x136241,a60)
% 32.24/32.05 [13625]~P1241(x136251,a44)+P1156(x136251,a60)
% 32.24/32.05 [13626]~P1233(x136261,a47)+P1156(x136261,a60)
% 32.24/32.05 [13627]~P1230(x136271,a46)+P1156(x136271,a60)
% 32.24/32.05 [13628]~P1221(x136281,a49)+P1156(x136281,a60)
% 32.24/32.05 [13629]~P1219(x136291,a48)+P1156(x136291,a60)
% 32.24/32.05 [13630]~P1208(x136301,a52)+P1156(x136301,a60)
% 32.24/32.05 [13631]~P1205(x136311,a51)+P1156(x136311,a60)
% 32.24/32.05 [13632]~P1193(x136321,a54)+P1156(x136321,a60)
% 32.24/32.05 [13633]~P1190(x136331,a53)+P1156(x136331,a60)
% 32.24/32.05 [13634]~P1185(x136341,a56)+P1156(x136341,a60)
% 32.24/32.05 [13635]~P1179(x136351,a55)+P1156(x136351,a60)
% 32.24/32.05 [13636]~P1170(x136361,a58)+P1156(x136361,a60)
% 32.24/32.05 [13637]~P1167(x136371,a57)+P1156(x136371,a60)
% 32.24/32.05 [13638]~P1110(x136381,a59)+P1156(x136381,a60)
% 32.24/32.05 [13639]~P1147(x136391,a83)+P1156(x136391,a60)
% 32.24/32.05 [13640]~P1346(x136401,a27)+P1344(x136401,a27)
% 32.24/32.05 [13641]~P1346(x136411,a26)+P1344(x136411,a26)
% 32.24/32.05 [13642]~P1346(x136421,a28)+P1344(x136421,a28)
% 32.24/32.05 [13643]~P1346(x136431,a39)+P1344(x136431,a39)
% 32.24/32.05 [13644]~P1346(x136441,a62)+P1344(x136441,a62)
% 32.24/32.05 [13645]~P1346(x136451,a50)+P1344(x136451,a50)
% 32.24/32.05 [13646]~P1346(x136461,a83)+P1344(x136461,a83)
% 32.24/32.05 [13647]~P1346(x136471,a61)+P1344(x136471,a61)
% 32.24/32.05 [13648]~P1346(x136481,a91)+P1344(x136481,a91)
% 32.24/32.05 [13649]~P1346(x136491,a92)+P1344(x136491,a92)
% 32.24/32.05 [13650]~P1156(x136501,a49)+P1332(x136501,a27)
% 32.24/32.05 [13651]~P1156(x136511,a51)+P1332(x136511,a26)
% 32.24/32.05 [13652]~P1156(x136521,a52)+P1332(x136521,a28)
% 32.24/32.05 [13653]~P1156(x136531,a53)+P1332(x136531,a39)
% 32.24/32.05 [13654]~P1156(x136541,a55)+P1332(x136541,a62)
% 32.24/32.05 [13655]~P1156(x136551,a54)+P1332(x136551,a50)
% 32.24/32.05 [13656]~P1156(x136561,a57)+P1332(x136561,a83)
% 32.24/32.05 [13657]~P1156(x136571,a56)+P1332(x136571,a61)
% 32.24/32.05 [13658]~P1156(x136581,a60)+P1332(x136581,a29)
% 32.24/32.05 [13659]~P1156(x136591,a59)+P1332(x136591,a91)
% 32.24/32.05 [13660]~P1156(x136601,a58)+P1332(x136601,a92)
% 32.24/32.05 [13661]~P1146(x136611,a27)+P1341(x136611,a27)
% 32.24/32.05 [13662]~P1146(x136621,a27)+P1341(x136621,a26)
% 32.24/32.05 [13663]~P1146(x136631,a27)+P1341(x136631,a28)
% 32.24/32.05 [13664]~P1146(x136641,a27)+P1341(x136641,a39)
% 32.24/32.05 [13665]~P1146(x136651,a27)+P1341(x136651,a62)
% 32.24/32.05 [13666]~P1146(x136661,a27)+P1341(x136661,a50)
% 32.24/32.05 [13667]~P1146(x136671,a27)+P1341(x136671,a83)
% 32.24/32.05 [13668]~P1146(x136681,a27)+P1341(x136681,a61)
% 32.24/32.05 [13669]~P1146(x136691,a27)+P1341(x136691,a29)
% 32.24/32.05 [13670]~P1146(x136701,a27)+P1341(x136701,a30)
% 32.24/32.05 [13671]~P1146(x136711,a27)+P1341(x136711,a91)
% 32.24/32.05 [13672]~P1146(x136721,a27)+P1341(x136721,a92)
% 32.24/32.05 [13673]~P1336(x136731,a27)+P1333(x136731,a27)
% 32.24/32.05 [13674]~P1336(x136741,a26)+P1333(x136741,a26)
% 32.24/32.05 [13675]~P1336(x136751,a28)+P1333(x136751,a28)
% 32.24/32.05 [13676]~P1336(x136761,a39)+P1333(x136761,a39)
% 32.24/32.05 [13677]~P1336(x136771,a62)+P1333(x136771,a62)
% 32.24/32.05 [13678]~P1336(x136781,a50)+P1333(x136781,a50)
% 32.24/32.05 [13679]~P1336(x136791,a83)+P1333(x136791,a83)
% 32.24/32.05 [13680]~P1336(x136801,a61)+P1333(x136801,a61)
% 32.24/32.05 [13681]~P1336(x136811,a29)+P1333(x136811,a29)
% 32.24/32.05 [13682]~P1336(x136821,a30)+P1333(x136821,a30)
% 32.24/32.05 [13683]~P1336(x136831,a91)+P1333(x136831,a91)
% 32.24/32.05 [13684]~P1336(x136841,a92)+P1333(x136841,a92)
% 32.24/32.05 [13685]~P1146(x136851,a26)+P1329(x136851,a27)
% 32.24/32.05 [13686]~P1146(x136861,a26)+P1329(x136861,a26)
% 32.24/32.05 [13687]~P1146(x136871,a26)+P1329(x136871,a28)
% 32.24/32.05 [13688]~P1146(x136881,a26)+P1329(x136881,a39)
% 32.24/32.05 [13689]~P1146(x136891,a26)+P1329(x136891,a62)
% 32.24/32.05 [13690]~P1146(x136901,a26)+P1329(x136901,a50)
% 32.24/32.05 [13691]~P1146(x136911,a26)+P1329(x136911,a83)
% 32.24/32.05 [13692]~P1146(x136921,a26)+P1329(x136921,a61)
% 32.24/32.05 [13693]~P1146(x136931,a26)+P1329(x136931,a29)
% 32.24/32.05 [13694]~P1146(x136941,a26)+P1329(x136941,a30)
% 32.24/32.05 [13695]~P1146(x136951,a26)+P1329(x136951,a91)
% 32.24/32.05 [13696]~P1146(x136961,a26)+P1329(x136961,a92)
% 32.24/32.05 [13697]~P1146(x136971,a26)+P1329(x136971,a31)
% 32.24/32.05 [13698]~P1146(x136981,a26)+P1329(x136981,a32)
% 32.24/32.05 [13699]~P1146(x136991,a26)+P1329(x136991,a33)
% 32.24/32.05 [13700]~P1146(x137001,a26)+P1329(x137001,a34)
% 32.24/32.05 [13701]~P1156(x137011,a47)+P1321(x137011,a27)
% 32.24/32.05 [13702]~P1156(x137021,a48)+P1321(x137021,a26)
% 32.24/32.05 [13703]~P1156(x137031,a49)+P1321(x137031,a28)
% 32.24/32.05 [13704]~P1156(x137041,a51)+P1321(x137041,a39)
% 32.24/32.05 [13705]~P1156(x137051,a53)+P1321(x137051,a62)
% 32.24/32.05 [13706]~P1156(x137061,a52)+P1321(x137061,a50)
% 32.24/32.05 [13707]~P1156(x137071,a55)+P1321(x137071,a83)
% 32.24/32.05 [13708]~P1156(x137081,a54)+P1321(x137081,a61)
% 32.24/32.05 [13709]~P1156(x137091,a58)+P1321(x137091,a29)
% 32.24/32.05 [13710]~P1156(x137101,a59)+P1321(x137101,a30)
% 32.24/32.05 [13711]~P1156(x137111,a57)+P1321(x137111,a91)
% 32.24/32.05 [13712]~P1156(x137121,a56)+P1321(x137121,a92)
% 32.24/32.05 [13713]~P1156(x137131,a60)+P1321(x137131,a31)
% 32.24/32.05 [13714]~P1146(x137141,a27)+P1328(x137141,a27)
% 32.24/32.05 [13715]~P1146(x137151,a27)+P1328(x137151,a26)
% 32.24/32.05 [13716]~P1146(x137161,a27)+P1328(x137161,a28)
% 32.24/32.05 [13717]~P1146(x137171,a27)+P1328(x137171,a39)
% 32.24/32.05 [13718]~P1146(x137181,a27)+P1328(x137181,a62)
% 32.24/32.05 [13719]~P1146(x137191,a27)+P1328(x137191,a50)
% 32.24/32.05 [13720]~P1146(x137201,a27)+P1328(x137201,a83)
% 32.24/32.05 [13721]~P1146(x137211,a27)+P1328(x137211,a61)
% 32.24/32.05 [13722]~P1146(x137221,a27)+P1328(x137221,a29)
% 32.24/32.05 [13723]~P1146(x137231,a27)+P1328(x137231,a30)
% 32.24/32.05 [13724]~P1146(x137241,a27)+P1328(x137241,a91)
% 32.24/32.05 [13725]~P1146(x137251,a27)+P1328(x137251,a92)
% 32.24/32.05 [13726]~P1146(x137261,a27)+P1328(x137261,a31)
% 32.24/32.05 [13727]~P1146(x137271,a27)+P1328(x137271,a32)
% 32.24/32.05 [13728]~P1323(x137281,a27)+P1322(x137281,a27)
% 32.24/32.05 [13729]~P1323(x137291,a26)+P1322(x137291,a26)
% 32.24/32.05 [13730]~P1323(x137301,a28)+P1322(x137301,a28)
% 32.24/32.05 [13731]~P1323(x137311,a39)+P1322(x137311,a39)
% 32.24/32.05 [13732]~P1323(x137321,a62)+P1322(x137321,a62)
% 32.24/32.05 [13733]~P1323(x137331,a50)+P1322(x137331,a50)
% 32.24/32.05 [13734]~P1323(x137341,a83)+P1322(x137341,a83)
% 32.24/32.05 [13735]~P1323(x137351,a61)+P1322(x137351,a61)
% 32.24/32.05 [13736]~P1323(x137361,a29)+P1322(x137361,a29)
% 32.24/32.05 [13737]~P1323(x137371,a30)+P1322(x137371,a30)
% 32.24/32.05 [13738]~P1323(x137381,a91)+P1322(x137381,a91)
% 32.24/32.05 [13739]~P1323(x137391,a92)+P1322(x137391,a92)
% 32.24/32.05 [13740]~P1323(x137401,a31)+P1322(x137401,a31)
% 32.24/32.05 [13741]~P1323(x137411,a32)+P1322(x137411,a32)
% 32.24/32.05 [13742]~P1156(x137421,a45)+P1308(x137421,a27)
% 32.24/32.05 [13743]~P1156(x137431,a46)+P1308(x137431,a26)
% 32.24/32.05 [13744]~P1156(x137441,a47)+P1308(x137441,a28)
% 32.24/32.05 [13745]~P1156(x137451,a48)+P1308(x137451,a39)
% 32.24/32.05 [13746]~P1156(x137461,a51)+P1308(x137461,a62)
% 32.24/32.05 [13747]~P1156(x137471,a49)+P1308(x137471,a50)
% 32.24/32.05 [13748]~P1156(x137481,a53)+P1308(x137481,a83)
% 32.24/32.05 [13749]~P1156(x137491,a52)+P1308(x137491,a61)
% 32.24/32.05 [13750]~P1156(x137501,a56)+P1308(x137501,a29)
% 32.24/32.05 [13751]~P1156(x137511,a57)+P1308(x137511,a30)
% 32.24/32.05 [13752]~P1156(x137521,a55)+P1308(x137521,a91)
% 32.24/32.05 [13753]~P1156(x137531,a54)+P1308(x137531,a92)
% 32.24/32.05 [13754]~P1156(x137541,a58)+P1308(x137541,a31)
% 32.24/32.05 [13755]~P1156(x137551,a59)+P1308(x137551,a32)
% 32.24/32.05 [13756]~P1156(x137561,a60)+P1308(x137561,a33)
% 32.24/32.05 [13757]~P1146(x137571,a27)+P1319(x137571,a27)
% 32.24/32.05 [13758]~P1146(x137581,a27)+P1319(x137581,a26)
% 32.24/32.05 [13759]~P1146(x137591,a27)+P1319(x137591,a28)
% 32.24/32.05 [13760]~P1146(x137601,a27)+P1319(x137601,a39)
% 32.24/32.05 [13761]~P1146(x137611,a27)+P1319(x137611,a62)
% 32.24/32.05 [13762]~P1146(x137621,a27)+P1319(x137621,a50)
% 32.24/32.05 [13763]~P1146(x137631,a27)+P1319(x137631,a83)
% 32.24/32.05 [13764]~P1146(x137641,a27)+P1319(x137641,a61)
% 32.24/32.05 [13765]~P1146(x137651,a27)+P1319(x137651,a29)
% 32.24/32.05 [13766]~P1146(x137661,a27)+P1319(x137661,a30)
% 32.24/32.05 [13767]~P1146(x137671,a27)+P1319(x137671,a91)
% 32.24/32.05 [13768]~P1146(x137681,a27)+P1319(x137681,a92)
% 32.24/32.05 [13769]~P1146(x137691,a27)+P1319(x137691,a31)
% 32.24/32.05 [13770]~P1146(x137701,a27)+P1319(x137701,a32)
% 32.24/32.05 [13771]~P1146(x137711,a27)+P1319(x137711,a33)
% 32.24/32.05 [13772]~P1146(x137721,a27)+P1319(x137721,a34)
% 32.24/32.05 [13773]~P1315(x137731,a27)+P1309(x137731,a27)
% 32.24/32.05 [13774]~P1315(x137741,a26)+P1309(x137741,a26)
% 32.24/32.05 [13775]~P1315(x137751,a28)+P1309(x137751,a28)
% 32.24/32.05 [13776]~P1315(x137761,a39)+P1309(x137761,a39)
% 32.24/32.05 [13777]~P1315(x137771,a62)+P1309(x137771,a62)
% 32.24/32.05 [13778]~P1315(x137781,a50)+P1309(x137781,a50)
% 32.24/32.05 [13779]~P1315(x137791,a83)+P1309(x137791,a83)
% 32.24/32.05 [13780]~P1315(x137801,a61)+P1309(x137801,a61)
% 32.24/32.05 [13781]~P1315(x137811,a29)+P1309(x137811,a29)
% 32.24/32.05 [13782]~P1315(x137821,a30)+P1309(x137821,a30)
% 32.24/32.05 [13783]~P1315(x137831,a91)+P1309(x137831,a91)
% 32.24/32.05 [13784]~P1315(x137841,a92)+P1309(x137841,a92)
% 32.24/32.05 [13785]~P1315(x137851,a31)+P1309(x137851,a31)
% 32.24/32.05 [13786]~P1315(x137861,a32)+P1309(x137861,a32)
% 32.24/32.05 [13787]~P1315(x137871,a33)+P1309(x137871,a33)
% 32.24/32.05 [13788]~P1315(x137881,a34)+P1309(x137881,a34)
% 32.24/32.05 [13789]~P1146(x137891,a28)+P1304(x137891,a27)
% 32.24/32.05 [13790]~P1146(x137901,a28)+P1304(x137901,a26)
% 32.24/32.05 [13791]~P1146(x137911,a28)+P1304(x137911,a28)
% 32.24/32.05 [13792]~P1146(x137921,a28)+P1304(x137921,a39)
% 32.24/32.05 [13793]~P1146(x137931,a28)+P1304(x137931,a62)
% 32.24/32.05 [13794]~P1146(x137941,a28)+P1304(x137941,a50)
% 32.24/32.05 [13795]~P1146(x137951,a28)+P1304(x137951,a83)
% 32.24/32.05 [13796]~P1146(x137961,a28)+P1304(x137961,a61)
% 32.24/32.05 [13797]~P1146(x137971,a28)+P1304(x137971,a29)
% 32.24/32.05 [13798]~P1146(x137981,a28)+P1304(x137981,a30)
% 32.24/32.05 [13799]~P1146(x137991,a28)+P1304(x137991,a91)
% 32.24/32.05 [13800]~P1146(x138001,a28)+P1304(x138001,a92)
% 32.24/32.05 [13801]~P1146(x138011,a28)+P1304(x138011,a31)
% 32.24/32.05 [13802]~P1146(x138021,a28)+P1304(x138021,a32)
% 32.24/32.05 [13803]~P1146(x138031,a28)+P1304(x138031,a33)
% 32.24/32.05 [13804]~P1146(x138041,a28)+P1304(x138041,a34)
% 32.24/32.05 [13805]~P1146(x138051,a28)+P1304(x138051,a35)
% 32.24/32.05 [13806]~P1146(x138061,a28)+P1304(x138061,a36)
% 32.24/32.05 [13807]~P1146(x138071,a28)+P1304(x138071,a37)
% 32.24/32.05 [13808]~P1146(x138081,a28)+P1304(x138081,a38)
% 32.24/32.05 [13809]~P1146(x138091,a28)+P1304(x138091,a40)
% 32.24/32.05 [13810]~P1146(x138101,a28)+P1304(x138101,a41)
% 32.24/32.05 [13811]~P1146(x138111,a28)+P1304(x138111,a42)
% 32.24/32.05 [13812]~P1146(x138121,a28)+P1304(x138121,a43)
% 32.24/32.05 [13813]~P1146(x138131,a26)+P1303(x138131,a27)
% 32.24/32.05 [13814]~P1146(x138141,a26)+P1303(x138141,a26)
% 32.24/32.05 [13815]~P1146(x138151,a26)+P1303(x138151,a28)
% 32.24/32.05 [13816]~P1146(x138161,a26)+P1303(x138161,a39)
% 32.24/32.05 [13817]~P1146(x138171,a26)+P1303(x138171,a62)
% 32.24/32.05 [13818]~P1146(x138181,a26)+P1303(x138181,a50)
% 32.24/32.05 [13819]~P1146(x138191,a26)+P1303(x138191,a83)
% 32.24/32.05 [13820]~P1146(x138201,a26)+P1303(x138201,a61)
% 32.24/32.05 [13821]~P1146(x138211,a26)+P1303(x138211,a29)
% 32.24/32.05 [13822]~P1146(x138221,a26)+P1303(x138221,a30)
% 32.24/32.05 [13823]~P1146(x138231,a26)+P1303(x138231,a91)
% 32.24/32.05 [13824]~P1146(x138241,a26)+P1303(x138241,a92)
% 32.24/32.05 [13825]~P1146(x138251,a26)+P1303(x138251,a31)
% 32.24/32.05 [13826]~P1146(x138261,a26)+P1303(x138261,a32)
% 32.24/32.05 [13827]~P1146(x138271,a26)+P1303(x138271,a33)
% 32.24/32.05 [13828]~P1146(x138281,a26)+P1303(x138281,a34)
% 32.24/32.05 [13829]~P1146(x138291,a26)+P1303(x138291,a35)
% 32.24/32.05 [13830]~P1146(x138301,a26)+P1303(x138301,a36)
% 32.24/32.05 [13831]~P1146(x138311,a26)+P1303(x138311,a37)
% 32.24/32.05 [13832]~P1146(x138321,a26)+P1303(x138321,a38)
% 32.24/32.05 [13833]~P1156(x138331,a43)+P1295(x138331,a27)
% 32.24/32.05 [13834]~P1156(x138341,a44)+P1295(x138341,a26)
% 32.24/32.05 [13835]~P1156(x138351,a45)+P1295(x138351,a28)
% 32.24/32.05 [13836]~P1156(x138361,a46)+P1295(x138361,a39)
% 32.24/32.05 [13837]~P1156(x138371,a48)+P1295(x138371,a62)
% 32.24/32.05 [13838]~P1156(x138381,a47)+P1295(x138381,a50)
% 32.24/32.05 [13839]~P1156(x138391,a51)+P1295(x138391,a83)
% 32.24/32.05 [13840]~P1156(x138401,a49)+P1295(x138401,a61)
% 32.24/32.05 [13841]~P1156(x138411,a54)+P1295(x138411,a29)
% 32.24/32.05 [13842]~P1156(x138421,a55)+P1295(x138421,a30)
% 32.24/32.05 [13843]~P1156(x138431,a53)+P1295(x138431,a91)
% 32.24/32.05 [13844]~P1156(x138441,a52)+P1295(x138441,a92)
% 32.24/32.05 [13845]~P1156(x138451,a56)+P1295(x138451,a31)
% 32.24/32.05 [13846]~P1156(x138461,a57)+P1295(x138461,a32)
% 32.24/32.05 [13847]~P1156(x138471,a58)+P1295(x138471,a33)
% 32.24/32.05 [13848]~P1156(x138481,a59)+P1295(x138481,a34)
% 32.24/32.05 [13849]~P1156(x138491,a60)+P1295(x138491,a35)
% 32.24/32.05 [13850]~P1146(x138501,a27)+P1302(x138501,a27)
% 32.24/32.05 [13851]~P1146(x138511,a27)+P1302(x138511,a26)
% 32.24/32.05 [13852]~P1146(x138521,a27)+P1302(x138521,a28)
% 32.24/32.05 [13853]~P1146(x138531,a27)+P1302(x138531,a39)
% 32.24/32.05 [13854]~P1146(x138541,a27)+P1302(x138541,a62)
% 32.24/32.05 [13855]~P1146(x138551,a27)+P1302(x138551,a50)
% 32.24/32.05 [13856]~P1146(x138561,a27)+P1302(x138561,a83)
% 32.24/32.05 [13857]~P1146(x138571,a27)+P1302(x138571,a61)
% 32.24/32.05 [13858]~P1146(x138581,a27)+P1302(x138581,a29)
% 32.24/32.05 [13859]~P1146(x138591,a27)+P1302(x138591,a30)
% 32.24/32.05 [13860]~P1146(x138601,a27)+P1302(x138601,a91)
% 32.24/32.05 [13861]~P1146(x138611,a27)+P1302(x138611,a92)
% 32.24/32.05 [13862]~P1146(x138621,a27)+P1302(x138621,a31)
% 32.24/32.05 [13863]~P1146(x138631,a27)+P1302(x138631,a32)
% 32.24/32.05 [13864]~P1146(x138641,a27)+P1302(x138641,a33)
% 32.24/32.05 [13865]~P1146(x138651,a27)+P1302(x138651,a34)
% 32.24/32.05 [13866]~P1146(x138661,a27)+P1302(x138661,a35)
% 32.24/32.05 [13867]~P1146(x138671,a27)+P1302(x138671,a36)
% 32.24/32.05 [13868]~P1297(x138681,a27)+P1296(x138681,a27)
% 32.24/32.05 [13869]~P1297(x138691,a26)+P1296(x138691,a26)
% 32.24/32.05 [13870]~P1297(x138701,a28)+P1296(x138701,a28)
% 32.24/32.05 [13871]~P1297(x138711,a39)+P1296(x138711,a39)
% 32.24/32.05 [13872]~P1297(x138721,a62)+P1296(x138721,a62)
% 32.24/32.05 [13873]~P1297(x138731,a50)+P1296(x138731,a50)
% 32.24/32.05 [13874]~P1297(x138741,a83)+P1296(x138741,a83)
% 32.24/32.05 [13875]~P1297(x138751,a61)+P1296(x138751,a61)
% 32.24/32.05 [13876]~P1297(x138761,a29)+P1296(x138761,a29)
% 32.24/32.05 [13877]~P1297(x138771,a30)+P1296(x138771,a30)
% 32.24/32.05 [13878]~P1297(x138781,a91)+P1296(x138781,a91)
% 32.24/32.05 [13879]~P1297(x138791,a92)+P1296(x138791,a92)
% 32.24/32.05 [13880]~P1297(x138801,a31)+P1296(x138801,a31)
% 32.24/32.05 [13881]~P1297(x138811,a32)+P1296(x138811,a32)
% 32.24/32.05 [13882]~P1297(x138821,a33)+P1296(x138821,a33)
% 32.24/32.05 [13883]~P1297(x138831,a34)+P1296(x138831,a34)
% 32.24/32.05 [13884]~P1297(x138841,a35)+P1296(x138841,a35)
% 32.24/32.05 [13885]~P1297(x138851,a36)+P1296(x138851,a36)
% 32.24/32.05 [13886]~P1156(x138861,a41)+P1284(x138861,a27)
% 32.24/32.05 [13887]~P1156(x138871,a42)+P1284(x138871,a26)
% 32.24/32.05 [13888]~P1156(x138881,a43)+P1284(x138881,a28)
% 32.24/32.05 [13889]~P1156(x138891,a44)+P1284(x138891,a39)
% 32.24/32.05 [13890]~P1156(x138901,a46)+P1284(x138901,a62)
% 32.24/32.05 [13891]~P1156(x138911,a45)+P1284(x138911,a50)
% 32.24/32.05 [13892]~P1156(x138921,a48)+P1284(x138921,a83)
% 32.24/32.05 [13893]~P1156(x138931,a47)+P1284(x138931,a61)
% 32.24/32.05 [13894]~P1156(x138941,a52)+P1284(x138941,a29)
% 32.24/32.05 [13895]~P1156(x138951,a53)+P1284(x138951,a30)
% 32.24/32.05 [13896]~P1156(x138961,a51)+P1284(x138961,a91)
% 32.24/32.05 [13897]~P1156(x138971,a49)+P1284(x138971,a92)
% 32.24/32.05 [13898]~P1156(x138981,a54)+P1284(x138981,a31)
% 32.24/32.05 [13899]~P1156(x138991,a55)+P1284(x138991,a32)
% 32.24/32.05 [13900]~P1156(x139001,a56)+P1284(x139001,a33)
% 32.24/32.05 [13901]~P1156(x139011,a57)+P1284(x139011,a34)
% 32.24/32.05 [13902]~P1156(x139021,a58)+P1284(x139021,a35)
% 32.24/32.05 [13903]~P1156(x139031,a59)+P1284(x139031,a36)
% 32.24/32.05 [13904]~P1156(x139041,a60)+P1284(x139041,a37)
% 32.24/32.05 [13905]~P1146(x139051,a27)+P1293(x139051,a27)
% 32.24/32.05 [13906]~P1146(x139061,a27)+P1293(x139061,a26)
% 32.24/32.05 [13907]~P1146(x139071,a27)+P1293(x139071,a28)
% 32.24/32.05 [13908]~P1146(x139081,a27)+P1293(x139081,a39)
% 32.24/32.05 [13909]~P1146(x139091,a27)+P1293(x139091,a62)
% 32.24/32.05 [13910]~P1146(x139101,a27)+P1293(x139101,a50)
% 32.24/32.05 [13911]~P1146(x139111,a27)+P1293(x139111,a83)
% 32.24/32.05 [13912]~P1146(x139121,a27)+P1293(x139121,a61)
% 32.24/32.05 [13913]~P1146(x139131,a27)+P1293(x139131,a29)
% 32.24/32.05 [13914]~P1146(x139141,a27)+P1293(x139141,a30)
% 32.24/32.05 [13915]~P1146(x139151,a27)+P1293(x139151,a91)
% 32.24/32.05 [13916]~P1146(x139161,a27)+P1293(x139161,a92)
% 32.24/32.05 [13917]~P1146(x139171,a27)+P1293(x139171,a31)
% 32.24/32.05 [13918]~P1146(x139181,a27)+P1293(x139181,a32)
% 32.24/32.05 [13919]~P1146(x139191,a27)+P1293(x139191,a33)
% 32.24/32.05 [13920]~P1146(x139201,a27)+P1293(x139201,a34)
% 32.24/32.05 [13921]~P1146(x139211,a27)+P1293(x139211,a35)
% 32.24/32.05 [13922]~P1146(x139221,a27)+P1293(x139221,a36)
% 32.24/32.05 [13923]~P1146(x139231,a27)+P1293(x139231,a37)
% 32.24/32.05 [13924]~P1146(x139241,a27)+P1293(x139241,a38)
% 32.24/32.05 [13925]~P1287(x139251,a27)+P1286(x139251,a27)
% 32.24/32.05 [13926]~P1287(x139261,a26)+P1286(x139261,a26)
% 32.24/32.05 [13927]~P1287(x139271,a28)+P1286(x139271,a28)
% 32.24/32.05 [13928]~P1287(x139281,a39)+P1286(x139281,a39)
% 32.24/32.05 [13929]~P1287(x139291,a62)+P1286(x139291,a62)
% 32.24/32.05 [13930]~P1287(x139301,a50)+P1286(x139301,a50)
% 32.24/32.05 [13931]~P1287(x139311,a83)+P1286(x139311,a83)
% 32.24/32.05 [13932]~P1287(x139321,a61)+P1286(x139321,a61)
% 32.24/32.05 [13933]~P1287(x139331,a29)+P1286(x139331,a29)
% 32.24/32.05 [13934]~P1287(x139341,a30)+P1286(x139341,a30)
% 32.24/32.05 [13935]~P1287(x139351,a91)+P1286(x139351,a91)
% 32.24/32.05 [13936]~P1287(x139361,a92)+P1286(x139361,a92)
% 32.24/32.05 [13937]~P1287(x139371,a31)+P1286(x139371,a31)
% 32.24/32.05 [13938]~P1287(x139381,a32)+P1286(x139381,a32)
% 32.24/32.05 [13939]~P1287(x139391,a33)+P1286(x139391,a33)
% 32.24/32.05 [13940]~P1287(x139401,a34)+P1286(x139401,a34)
% 32.24/32.05 [13941]~P1287(x139411,a35)+P1286(x139411,a35)
% 32.24/32.05 [13942]~P1287(x139421,a36)+P1286(x139421,a36)
% 32.24/32.05 [13943]~P1287(x139431,a37)+P1286(x139431,a37)
% 32.24/32.05 [13944]~P1287(x139441,a38)+P1286(x139441,a38)
% 32.24/32.05 [13945]~P1146(x139451,a26)+P1281(x139451,a27)
% 32.24/32.05 [13946]~P1146(x139461,a26)+P1281(x139461,a26)
% 32.24/32.05 [13947]~P1146(x139471,a26)+P1281(x139471,a28)
% 32.24/32.05 [13948]~P1146(x139481,a26)+P1281(x139481,a39)
% 32.24/32.05 [13949]~P1146(x139491,a26)+P1281(x139491,a62)
% 32.24/32.05 [13950]~P1146(x139501,a26)+P1281(x139501,a50)
% 32.24/32.05 [13951]~P1146(x139511,a26)+P1281(x139511,a83)
% 32.24/32.05 [13952]~P1146(x139521,a26)+P1281(x139521,a61)
% 32.24/32.05 [13953]~P1146(x139531,a26)+P1281(x139531,a29)
% 32.24/32.05 [13954]~P1146(x139541,a26)+P1281(x139541,a30)
% 32.24/32.05 [13955]~P1146(x139551,a26)+P1281(x139551,a91)
% 32.24/32.05 [13956]~P1146(x139561,a26)+P1281(x139561,a92)
% 32.24/32.05 [13957]~P1146(x139571,a26)+P1281(x139571,a31)
% 32.24/32.05 [13958]~P1146(x139581,a26)+P1281(x139581,a32)
% 32.24/32.05 [13959]~P1146(x139591,a26)+P1281(x139591,a33)
% 32.24/32.05 [13960]~P1146(x139601,a26)+P1281(x139601,a34)
% 32.24/32.05 [13961]~P1146(x139611,a26)+P1281(x139611,a35)
% 32.24/32.05 [13962]~P1146(x139621,a26)+P1281(x139621,a36)
% 32.24/32.05 [13963]~P1146(x139631,a26)+P1281(x139631,a37)
% 32.24/32.05 [13964]~P1146(x139641,a26)+P1281(x139641,a38)
% 32.24/32.05 [13965]~P1146(x139651,a26)+P1281(x139651,a40)
% 32.24/32.05 [13966]~P1146(x139661,a26)+P1281(x139661,a41)
% 32.24/32.05 [13967]~P1146(x139671,a26)+P1281(x139671,a42)
% 32.24/32.05 [13968]~P1146(x139681,a26)+P1281(x139681,a43)
% 32.24/32.05 [13969]~P1156(x139691,a38)+P1273(x139691,a27)
% 32.24/32.05 [13970]~P1156(x139701,a40)+P1273(x139701,a26)
% 32.24/32.05 [13971]~P1156(x139711,a41)+P1273(x139711,a28)
% 32.24/32.05 [13972]~P1156(x139721,a42)+P1273(x139721,a39)
% 32.24/32.05 [13973]~P1156(x139731,a44)+P1273(x139731,a62)
% 32.24/32.05 [13974]~P1156(x139741,a43)+P1273(x139741,a50)
% 32.24/32.05 [13975]~P1156(x139751,a46)+P1273(x139751,a83)
% 32.24/32.05 [13976]~P1156(x139761,a45)+P1273(x139761,a61)
% 32.24/32.05 [13977]~P1156(x139771,a49)+P1273(x139771,a29)
% 32.24/32.05 [13978]~P1156(x139781,a51)+P1273(x139781,a30)
% 32.24/32.05 [13979]~P1156(x139791,a48)+P1273(x139791,a91)
% 32.24/32.05 [13980]~P1156(x139801,a47)+P1273(x139801,a92)
% 32.24/32.05 [13981]~P1156(x139811,a52)+P1273(x139811,a31)
% 32.24/32.05 [13982]~P1156(x139821,a53)+P1273(x139821,a32)
% 32.24/32.05 [13983]~P1156(x139831,a54)+P1273(x139831,a33)
% 32.24/32.05 [13984]~P1156(x139841,a55)+P1273(x139841,a34)
% 32.24/32.05 [13985]~P1156(x139851,a56)+P1273(x139851,a35)
% 32.24/32.05 [13986]~P1156(x139861,a57)+P1273(x139861,a36)
% 32.24/32.05 [13987]~P1156(x139871,a58)+P1273(x139871,a37)
% 32.24/32.05 [13988]~P1156(x139881,a59)+P1273(x139881,a38)
% 32.24/32.05 [13989]~P1156(x139891,a60)+P1273(x139891,a40)
% 32.24/32.05 [13990]~P1146(x139901,a27)+P1279(x139901,a27)
% 32.24/32.05 [13991]~P1146(x139911,a27)+P1279(x139911,a26)
% 32.24/32.05 [13992]~P1146(x139921,a27)+P1279(x139921,a28)
% 32.24/32.05 [13993]~P1146(x139931,a27)+P1279(x139931,a39)
% 32.24/32.05 [13994]~P1146(x139941,a27)+P1279(x139941,a62)
% 32.24/32.05 [13995]~P1146(x139951,a27)+P1279(x139951,a50)
% 32.24/32.05 [13996]~P1146(x139961,a27)+P1279(x139961,a83)
% 32.24/32.05 [13997]~P1146(x139971,a27)+P1279(x139971,a61)
% 32.24/32.05 [13998]~P1146(x139981,a27)+P1279(x139981,a29)
% 32.24/32.05 [13999]~P1146(x139991,a27)+P1279(x139991,a30)
% 32.24/32.05 [14000]~P1146(x140001,a27)+P1279(x140001,a91)
% 32.24/32.05 [14001]~P1146(x140011,a27)+P1279(x140011,a92)
% 32.24/32.05 [14002]~P1146(x140021,a27)+P1279(x140021,a31)
% 32.24/32.05 [14003]~P1146(x140031,a27)+P1279(x140031,a32)
% 32.24/32.05 [14004]~P1146(x140041,a27)+P1279(x140041,a33)
% 32.24/32.05 [14005]~P1146(x140051,a27)+P1279(x140051,a34)
% 32.24/32.05 [14006]~P1146(x140061,a27)+P1279(x140061,a35)
% 32.24/32.05 [14007]~P1146(x140071,a27)+P1279(x140071,a36)
% 32.24/32.05 [14008]~P1146(x140081,a27)+P1279(x140081,a37)
% 32.24/32.05 [14009]~P1146(x140091,a27)+P1279(x140091,a38)
% 32.24/32.05 [14010]~P1146(x140101,a27)+P1279(x140101,a40)
% 32.24/32.05 [14011]~P1146(x140111,a27)+P1279(x140111,a41)
% 32.24/32.05 [14012]~P1275(x140121,a27)+P1274(x140121,a27)
% 32.24/32.05 [14013]~P1275(x140131,a26)+P1274(x140131,a26)
% 32.24/32.05 [14014]~P1275(x140141,a28)+P1274(x140141,a28)
% 32.24/32.05 [14015]~P1275(x140151,a39)+P1274(x140151,a39)
% 32.24/32.05 [14016]~P1275(x140161,a62)+P1274(x140161,a62)
% 32.24/32.05 [14017]~P1275(x140171,a50)+P1274(x140171,a50)
% 32.24/32.05 [14018]~P1275(x140181,a83)+P1274(x140181,a83)
% 32.24/32.05 [14019]~P1275(x140191,a61)+P1274(x140191,a61)
% 32.24/32.05 [14020]~P1275(x140201,a29)+P1274(x140201,a29)
% 32.24/32.05 [14021]~P1275(x140211,a30)+P1274(x140211,a30)
% 32.24/32.05 [14022]~P1275(x140221,a91)+P1274(x140221,a91)
% 32.24/32.05 [14023]~P1275(x140231,a92)+P1274(x140231,a92)
% 32.24/32.05 [14024]~P1275(x140241,a31)+P1274(x140241,a31)
% 32.24/32.05 [14025]~P1275(x140251,a32)+P1274(x140251,a32)
% 32.24/32.05 [14026]~P1275(x140261,a33)+P1274(x140261,a33)
% 32.24/32.05 [14027]~P1275(x140271,a34)+P1274(x140271,a34)
% 32.24/32.05 [14028]~P1275(x140281,a35)+P1274(x140281,a35)
% 32.24/32.05 [14029]~P1275(x140291,a36)+P1274(x140291,a36)
% 32.24/32.05 [14030]~P1275(x140301,a37)+P1274(x140301,a37)
% 32.24/32.05 [14031]~P1275(x140311,a38)+P1274(x140311,a38)
% 32.24/32.05 [14032]~P1275(x140321,a40)+P1274(x140321,a40)
% 32.24/32.05 [14033]~P1275(x140331,a41)+P1274(x140331,a41)
% 32.24/32.05 [14034]~P1156(x140341,a36)+P1257(x140341,a27)
% 32.24/32.05 [14035]~P1156(x140351,a37)+P1257(x140351,a26)
% 32.24/32.05 [14036]~P1156(x140361,a38)+P1257(x140361,a28)
% 32.24/32.05 [14037]~P1156(x140371,a40)+P1257(x140371,a39)
% 32.24/32.05 [14038]~P1156(x140381,a42)+P1257(x140381,a62)
% 32.24/32.05 [14039]~P1156(x140391,a41)+P1257(x140391,a50)
% 32.24/32.05 [14040]~P1156(x140401,a44)+P1257(x140401,a83)
% 32.24/32.05 [14041]~P1156(x140411,a43)+P1257(x140411,a61)
% 32.24/32.05 [14042]~P1156(x140421,a47)+P1257(x140421,a29)
% 32.24/32.05 [14043]~P1156(x140431,a48)+P1257(x140431,a30)
% 32.24/32.05 [14044]~P1156(x140441,a46)+P1257(x140441,a91)
% 32.24/32.05 [14045]~P1156(x140451,a45)+P1257(x140451,a92)
% 32.24/32.05 [14046]~P1156(x140461,a49)+P1257(x140461,a31)
% 32.24/32.05 [14047]~P1156(x140471,a51)+P1257(x140471,a32)
% 32.24/32.05 [14048]~P1156(x140481,a52)+P1257(x140481,a33)
% 32.24/32.05 [14049]~P1156(x140491,a53)+P1257(x140491,a34)
% 32.24/32.05 [14050]~P1156(x140501,a54)+P1257(x140501,a35)
% 32.24/32.05 [14051]~P1156(x140511,a55)+P1257(x140511,a36)
% 32.24/32.05 [14052]~P1156(x140521,a56)+P1257(x140521,a37)
% 32.24/32.05 [14053]~P1156(x140531,a57)+P1257(x140531,a38)
% 32.24/32.05 [14054]~P1156(x140541,a58)+P1257(x140541,a40)
% 32.24/32.05 [14055]~P1156(x140551,a59)+P1257(x140551,a41)
% 32.24/32.05 [14056]~P1156(x140561,a60)+P1257(x140561,a42)
% 32.24/32.05 [14057]~P1146(x140571,a27)+P1271(x140571,a27)
% 32.24/32.05 [14058]~P1146(x140581,a27)+P1271(x140581,a26)
% 32.24/32.05 [14059]~P1146(x140591,a27)+P1271(x140591,a28)
% 32.24/32.05 [14060]~P1146(x140601,a27)+P1271(x140601,a39)
% 32.24/32.05 [14061]~P1146(x140611,a27)+P1271(x140611,a62)
% 32.24/32.05 [14062]~P1146(x140621,a27)+P1271(x140621,a50)
% 32.24/32.05 [14063]~P1146(x140631,a27)+P1271(x140631,a83)
% 32.24/32.05 [14064]~P1146(x140641,a27)+P1271(x140641,a61)
% 32.24/32.05 [14065]~P1146(x140651,a27)+P1271(x140651,a29)
% 32.24/32.05 [14066]~P1146(x140661,a27)+P1271(x140661,a30)
% 32.24/32.05 [14067]~P1146(x140671,a27)+P1271(x140671,a91)
% 32.24/32.05 [14068]~P1146(x140681,a27)+P1271(x140681,a92)
% 32.24/32.05 [14069]~P1146(x140691,a27)+P1271(x140691,a31)
% 32.24/32.05 [14070]~P1146(x140701,a27)+P1271(x140701,a32)
% 32.24/32.05 [14071]~P1146(x140711,a27)+P1271(x140711,a33)
% 32.24/32.05 [14072]~P1146(x140721,a27)+P1271(x140721,a34)
% 32.24/32.05 [14073]~P1146(x140731,a27)+P1271(x140731,a35)
% 32.24/32.05 [14074]~P1146(x140741,a27)+P1271(x140741,a36)
% 32.24/32.05 [14075]~P1146(x140751,a27)+P1271(x140751,a37)
% 32.24/32.05 [14076]~P1146(x140761,a27)+P1271(x140761,a38)
% 32.24/32.05 [14077]~P1146(x140771,a27)+P1271(x140771,a40)
% 32.24/32.05 [14078]~P1146(x140781,a27)+P1271(x140781,a41)
% 32.24/32.05 [14079]~P1146(x140791,a27)+P1271(x140791,a42)
% 32.24/32.05 [14080]~P1146(x140801,a27)+P1271(x140801,a43)
% 32.24/32.05 [14081]~P1261(x140811,a27)+P1260(x140811,a27)
% 32.24/32.05 [14082]~P1261(x140821,a26)+P1260(x140821,a26)
% 32.24/32.05 [14083]~P1261(x140831,a28)+P1260(x140831,a28)
% 32.24/32.05 [14084]~P1261(x140841,a39)+P1260(x140841,a39)
% 32.24/32.05 [14085]~P1261(x140851,a62)+P1260(x140851,a62)
% 32.24/32.05 [14086]~P1261(x140861,a50)+P1260(x140861,a50)
% 32.24/32.05 [14087]~P1261(x140871,a83)+P1260(x140871,a83)
% 32.24/32.05 [14088]~P1261(x140881,a61)+P1260(x140881,a61)
% 32.24/32.05 [14089]~P1261(x140891,a29)+P1260(x140891,a29)
% 32.24/32.05 [14090]~P1261(x140901,a30)+P1260(x140901,a30)
% 32.24/32.05 [14091]~P1261(x140911,a91)+P1260(x140911,a91)
% 32.24/32.05 [14092]~P1261(x140921,a92)+P1260(x140921,a92)
% 32.24/32.05 [14093]~P1261(x140931,a31)+P1260(x140931,a31)
% 32.24/32.05 [14094]~P1261(x140941,a32)+P1260(x140941,a32)
% 32.24/32.05 [14095]~P1261(x140951,a33)+P1260(x140951,a33)
% 32.24/32.05 [14096]~P1261(x140961,a34)+P1260(x140961,a34)
% 32.24/32.05 [14097]~P1261(x140971,a35)+P1260(x140971,a35)
% 32.24/32.05 [14098]~P1261(x140981,a36)+P1260(x140981,a36)
% 32.24/32.05 [14099]~P1261(x140991,a37)+P1260(x140991,a37)
% 32.24/32.05 [14100]~P1261(x141001,a38)+P1260(x141001,a38)
% 32.24/32.05 [14101]~P1261(x141011,a40)+P1260(x141011,a40)
% 32.24/32.05 [14102]~P1261(x141021,a41)+P1260(x141021,a41)
% 32.24/32.05 [14103]~P1261(x141031,a42)+P1260(x141031,a42)
% 32.24/32.05 [14104]~P1261(x141041,a43)+P1260(x141041,a43)
% 32.24/32.05 [14105]~P1146(x141051,a39)+P1252(x141051,a27)
% 32.24/32.05 [14106]~P1146(x141061,a39)+P1252(x141061,a26)
% 32.24/32.05 [14107]~P1146(x141071,a39)+P1252(x141071,a28)
% 32.24/32.05 [14108]~P1146(x141081,a39)+P1252(x141081,a39)
% 32.24/32.05 [14109]~P1146(x141091,a39)+P1252(x141091,a62)
% 32.24/32.05 [14110]~P1146(x141101,a39)+P1252(x141101,a50)
% 32.24/32.05 [14111]~P1146(x141111,a39)+P1252(x141111,a83)
% 32.24/32.05 [14112]~P1146(x141121,a39)+P1252(x141121,a61)
% 32.24/32.05 [14113]~P1146(x141131,a39)+P1252(x141131,a29)
% 32.24/32.05 [14114]~P1146(x141141,a39)+P1252(x141141,a30)
% 32.24/32.05 [14115]~P1146(x141151,a39)+P1252(x141151,a91)
% 32.24/32.05 [14116]~P1146(x141161,a39)+P1252(x141161,a92)
% 32.24/32.05 [14117]~P1146(x141171,a39)+P1252(x141171,a31)
% 32.24/32.05 [14118]~P1146(x141181,a39)+P1252(x141181,a32)
% 32.24/32.05 [14119]~P1146(x141191,a39)+P1252(x141191,a33)
% 32.24/32.05 [14120]~P1146(x141201,a39)+P1252(x141201,a34)
% 32.24/32.05 [14121]~P1146(x141211,a39)+P1252(x141211,a35)
% 32.24/32.05 [14122]~P1146(x141221,a39)+P1252(x141221,a36)
% 32.24/32.05 [14123]~P1146(x141231,a39)+P1252(x141231,a37)
% 32.24/32.05 [14124]~P1146(x141241,a39)+P1252(x141241,a38)
% 32.24/32.05 [14125]~P1146(x141251,a39)+P1252(x141251,a40)
% 32.24/32.05 [14126]~P1146(x141261,a39)+P1252(x141261,a41)
% 32.24/32.05 [14127]~P1146(x141271,a39)+P1252(x141271,a42)
% 32.24/32.05 [14128]~P1146(x141281,a39)+P1252(x141281,a43)
% 32.24/32.05 [14129]~P1146(x141291,a39)+P1252(x141291,a44)
% 32.24/32.05 [14130]~P1146(x141301,a39)+P1252(x141301,a45)
% 32.24/32.05 [14131]~P1146(x141311,a39)+P1252(x141311,a46)
% 32.24/32.05 [14132]~P1146(x141321,a39)+P1252(x141321,a47)
% 32.24/32.05 [14133]~P1146(x141331,a39)+P1252(x141331,a48)
% 32.24/32.05 [14134]~P1146(x141341,a39)+P1252(x141341,a49)
% 32.24/32.05 [14135]~P1146(x141351,a39)+P1252(x141351,a51)
% 32.24/32.05 [14136]~P1146(x141361,a39)+P1252(x141361,a52)
% 32.24/32.05 [14137]~P1146(x141371,a39)+P1252(x141371,a53)
% 32.24/32.05 [14138]~P1146(x141381,a39)+P1252(x141381,a54)
% 32.24/32.05 [14139]~P1146(x141391,a39)+P1252(x141391,a55)
% 32.24/32.05 [14140]~P1146(x141401,a39)+P1252(x141401,a56)
% 32.24/32.05 [14141]~P1146(x141411,a39)+P1252(x141411,a57)
% 32.24/32.05 [14142]~P1146(x141421,a39)+P1252(x141421,a58)
% 32.24/32.05 [14143]~P1146(x141431,a39)+P1252(x141431,a59)
% 32.24/32.05 [14144]~P1146(x141441,a39)+P1252(x141441,a60)
% 32.24/32.05 [14145]~P1146(x141451,a28)+P1251(x141451,a27)
% 32.24/32.05 [14146]~P1146(x141461,a28)+P1251(x141461,a26)
% 32.24/32.05 [14147]~P1146(x141471,a28)+P1251(x141471,a28)
% 32.24/32.05 [14148]~P1146(x141481,a28)+P1251(x141481,a39)
% 32.24/32.05 [14149]~P1146(x141491,a28)+P1251(x141491,a62)
% 32.24/32.05 [14150]~P1146(x141501,a28)+P1251(x141501,a50)
% 32.24/32.05 [14151]~P1146(x141511,a28)+P1251(x141511,a83)
% 32.24/32.05 [14152]~P1146(x141521,a28)+P1251(x141521,a61)
% 32.24/32.05 [14153]~P1146(x141531,a28)+P1251(x141531,a29)
% 32.24/32.05 [14154]~P1146(x141541,a28)+P1251(x141541,a30)
% 32.24/32.05 [14155]~P1146(x141551,a28)+P1251(x141551,a91)
% 32.24/32.05 [14156]~P1146(x141561,a28)+P1251(x141561,a92)
% 32.24/32.05 [14157]~P1146(x141571,a28)+P1251(x141571,a31)
% 32.24/32.05 [14158]~P1146(x141581,a28)+P1251(x141581,a32)
% 32.24/32.05 [14159]~P1146(x141591,a28)+P1251(x141591,a33)
% 32.24/32.05 [14160]~P1146(x141601,a28)+P1251(x141601,a34)
% 32.24/32.05 [14161]~P1146(x141611,a28)+P1251(x141611,a35)
% 32.24/32.05 [14162]~P1146(x141621,a28)+P1251(x141621,a36)
% 32.24/32.05 [14163]~P1146(x141631,a28)+P1251(x141631,a37)
% 32.24/32.05 [14164]~P1146(x141641,a28)+P1251(x141641,a38)
% 32.24/32.05 [14165]~P1146(x141651,a28)+P1251(x141651,a40)
% 32.24/32.05 [14166]~P1146(x141661,a28)+P1251(x141661,a41)
% 32.24/32.05 [14167]~P1146(x141671,a28)+P1251(x141671,a42)
% 32.24/32.05 [14168]~P1146(x141681,a28)+P1251(x141681,a43)
% 32.24/32.05 [14169]~P1146(x141691,a28)+P1251(x141691,a44)
% 32.24/32.05 [14170]~P1146(x141701,a28)+P1251(x141701,a45)
% 32.24/32.05 [14171]~P1146(x141711,a28)+P1251(x141711,a46)
% 32.24/32.05 [14172]~P1146(x141721,a28)+P1251(x141721,a47)
% 32.24/32.05 [14173]~P1146(x141731,a28)+P1251(x141731,a48)
% 32.24/32.05 [14174]~P1146(x141741,a28)+P1251(x141741,a49)
% 32.24/32.05 [14175]~P1146(x141751,a28)+P1251(x141751,a51)
% 32.24/32.05 [14176]~P1146(x141761,a28)+P1251(x141761,a52)
% 32.24/32.05 [14177]~P1146(x141771,a26)+P1250(x141771,a27)
% 32.24/32.05 [14178]~P1146(x141781,a26)+P1250(x141781,a26)
% 32.24/32.05 [14179]~P1146(x141791,a26)+P1250(x141791,a28)
% 32.24/32.05 [14180]~P1146(x141801,a26)+P1250(x141801,a39)
% 32.24/32.05 [14181]~P1146(x141811,a26)+P1250(x141811,a62)
% 32.24/32.05 [14182]~P1146(x141821,a26)+P1250(x141821,a50)
% 32.24/32.05 [14183]~P1146(x141831,a26)+P1250(x141831,a83)
% 32.24/32.05 [14184]~P1146(x141841,a26)+P1250(x141841,a61)
% 32.24/32.05 [14185]~P1146(x141851,a26)+P1250(x141851,a29)
% 32.24/32.05 [14186]~P1146(x141861,a26)+P1250(x141861,a30)
% 32.24/32.05 [14187]~P1146(x141871,a26)+P1250(x141871,a91)
% 32.24/32.05 [14188]~P1146(x141881,a26)+P1250(x141881,a92)
% 32.24/32.05 [14189]~P1146(x141891,a26)+P1250(x141891,a31)
% 32.24/32.05 [14190]~P1146(x141901,a26)+P1250(x141901,a32)
% 32.24/32.05 [14191]~P1146(x141911,a26)+P1250(x141911,a33)
% 32.24/32.05 [14192]~P1146(x141921,a26)+P1250(x141921,a34)
% 32.24/32.05 [14193]~P1146(x141931,a26)+P1250(x141931,a35)
% 32.24/32.05 [14194]~P1146(x141941,a26)+P1250(x141941,a36)
% 32.24/32.05 [14195]~P1146(x141951,a26)+P1250(x141951,a37)
% 32.24/32.05 [14196]~P1146(x141961,a26)+P1250(x141961,a38)
% 32.24/32.05 [14197]~P1146(x141971,a26)+P1250(x141971,a40)
% 32.24/32.05 [14198]~P1146(x141981,a26)+P1250(x141981,a41)
% 32.24/32.05 [14199]~P1146(x141991,a26)+P1250(x141991,a42)
% 32.24/32.05 [14200]~P1146(x142001,a26)+P1250(x142001,a43)
% 32.24/32.05 [14201]~P1146(x142011,a26)+P1250(x142011,a44)
% 32.24/32.05 [14202]~P1146(x142021,a26)+P1250(x142021,a45)
% 32.24/32.05 [14203]~P1146(x142031,a26)+P1250(x142031,a46)
% 32.24/32.05 [14204]~P1146(x142041,a26)+P1250(x142041,a47)
% 32.24/32.05 [14205]~P1156(x142051,a34)+P1241(x142051,a27)
% 32.24/32.05 [14206]~P1156(x142061,a35)+P1241(x142061,a26)
% 32.24/32.05 [14207]~P1156(x142071,a36)+P1241(x142071,a28)
% 32.24/32.05 [14208]~P1156(x142081,a37)+P1241(x142081,a39)
% 32.24/32.05 [14209]~P1156(x142091,a40)+P1241(x142091,a62)
% 32.24/32.05 [14210]~P1156(x142101,a38)+P1241(x142101,a50)
% 32.24/32.05 [14211]~P1156(x142111,a42)+P1241(x142111,a83)
% 32.24/32.05 [14212]~P1156(x142121,a41)+P1241(x142121,a61)
% 32.24/32.05 [14213]~P1156(x142131,a45)+P1241(x142131,a29)
% 32.24/32.05 [14214]~P1156(x142141,a46)+P1241(x142141,a30)
% 32.24/32.05 [14215]~P1156(x142151,a44)+P1241(x142151,a91)
% 32.24/32.05 [14216]~P1156(x142161,a43)+P1241(x142161,a92)
% 32.24/32.05 [14217]~P1156(x142171,a47)+P1241(x142171,a31)
% 32.24/32.05 [14218]~P1156(x142181,a48)+P1241(x142181,a32)
% 32.24/32.05 [14219]~P1156(x142191,a49)+P1241(x142191,a33)
% 32.24/32.05 [14220]~P1156(x142201,a51)+P1241(x142201,a34)
% 32.24/32.05 [14221]~P1156(x142211,a52)+P1241(x142211,a35)
% 32.24/32.05 [14222]~P1156(x142221,a53)+P1241(x142221,a36)
% 32.24/32.05 [14223]~P1156(x142231,a54)+P1241(x142231,a37)
% 32.24/32.05 [14224]~P1156(x142241,a55)+P1241(x142241,a38)
% 32.24/32.05 [14225]~P1156(x142251,a56)+P1241(x142251,a40)
% 32.24/32.05 [14226]~P1156(x142261,a57)+P1241(x142261,a41)
% 32.24/32.05 [14227]~P1156(x142271,a58)+P1241(x142271,a42)
% 32.24/32.05 [14228]~P1156(x142281,a59)+P1241(x142281,a43)
% 32.24/32.05 [14229]~P1156(x142291,a60)+P1241(x142291,a44)
% 32.24/32.05 [14230]~P1146(x142301,a27)+P1249(x142301,a27)
% 32.24/32.05 [14231]~P1146(x142311,a27)+P1249(x142311,a26)
% 32.24/32.05 [14232]~P1146(x142321,a27)+P1249(x142321,a28)
% 32.24/32.05 [14233]~P1146(x142331,a27)+P1249(x142331,a39)
% 32.24/32.05 [14234]~P1146(x142341,a27)+P1249(x142341,a62)
% 32.24/32.05 [14235]~P1146(x142351,a27)+P1249(x142351,a50)
% 32.24/32.05 [14236]~P1146(x142361,a27)+P1249(x142361,a83)
% 32.24/32.05 [14237]~P1146(x142371,a27)+P1249(x142371,a61)
% 32.24/32.05 [14238]~P1146(x142381,a27)+P1249(x142381,a29)
% 32.24/32.05 [14239]~P1146(x142391,a27)+P1249(x142391,a30)
% 32.24/32.05 [14240]~P1146(x142401,a27)+P1249(x142401,a91)
% 32.24/32.05 [14241]~P1146(x142411,a27)+P1249(x142411,a92)
% 32.24/32.05 [14242]~P1146(x142421,a27)+P1249(x142421,a31)
% 32.24/32.05 [14243]~P1146(x142431,a27)+P1249(x142431,a32)
% 32.24/32.05 [14244]~P1146(x142441,a27)+P1249(x142441,a33)
% 32.24/32.05 [14245]~P1146(x142451,a27)+P1249(x142451,a34)
% 32.24/32.05 [14246]~P1146(x142461,a27)+P1249(x142461,a35)
% 32.24/32.05 [14247]~P1146(x142471,a27)+P1249(x142471,a36)
% 32.24/32.05 [14248]~P1146(x142481,a27)+P1249(x142481,a37)
% 32.24/32.05 [14249]~P1146(x142491,a27)+P1249(x142491,a38)
% 32.24/32.05 [14250]~P1146(x142501,a27)+P1249(x142501,a40)
% 32.24/32.05 [14251]~P1146(x142511,a27)+P1249(x142511,a41)
% 32.24/32.05 [14252]~P1146(x142521,a27)+P1249(x142521,a42)
% 32.24/32.05 [14253]~P1146(x142531,a27)+P1249(x142531,a43)
% 32.24/32.05 [14254]~P1146(x142541,a27)+P1249(x142541,a44)
% 32.24/32.05 [14255]~P1146(x142551,a27)+P1249(x142551,a45)
% 32.24/32.05 [14256]~P1243(x142561,a27)+P1242(x142561,a27)
% 32.24/32.05 [14257]~P1243(x142571,a26)+P1242(x142571,a26)
% 32.24/32.05 [14258]~P1243(x142581,a28)+P1242(x142581,a28)
% 32.24/32.05 [14259]~P1243(x142591,a39)+P1242(x142591,a39)
% 32.24/32.05 [14260]~P1243(x142601,a62)+P1242(x142601,a62)
% 32.24/32.05 [14261]~P1243(x142611,a50)+P1242(x142611,a50)
% 32.24/32.05 [14262]~P1243(x142621,a83)+P1242(x142621,a83)
% 32.24/32.05 [14263]~P1243(x142631,a61)+P1242(x142631,a61)
% 32.24/32.05 [14264]~P1243(x142641,a29)+P1242(x142641,a29)
% 32.24/32.05 [14265]~P1243(x142651,a30)+P1242(x142651,a30)
% 32.24/32.05 [14266]~P1243(x142661,a91)+P1242(x142661,a91)
% 32.24/32.05 [14267]~P1243(x142671,a92)+P1242(x142671,a92)
% 32.24/32.05 [14268]~P1243(x142681,a31)+P1242(x142681,a31)
% 32.24/32.05 [14269]~P1243(x142691,a32)+P1242(x142691,a32)
% 32.24/32.05 [14270]~P1243(x142701,a33)+P1242(x142701,a33)
% 32.24/32.05 [14271]~P1243(x142711,a34)+P1242(x142711,a34)
% 32.24/32.05 [14272]~P1243(x142721,a35)+P1242(x142721,a35)
% 32.24/32.05 [14273]~P1243(x142731,a36)+P1242(x142731,a36)
% 32.24/32.05 [14274]~P1243(x142741,a37)+P1242(x142741,a37)
% 32.24/32.05 [14275]~P1243(x142751,a38)+P1242(x142751,a38)
% 32.24/32.05 [14276]~P1243(x142761,a40)+P1242(x142761,a40)
% 32.24/32.05 [14277]~P1243(x142771,a41)+P1242(x142771,a41)
% 32.24/32.05 [14278]~P1243(x142781,a42)+P1242(x142781,a42)
% 32.24/32.05 [14279]~P1243(x142791,a43)+P1242(x142791,a43)
% 32.24/32.05 [14280]~P1243(x142801,a44)+P1242(x142801,a44)
% 32.24/32.05 [14281]~P1243(x142811,a45)+P1242(x142811,a45)
% 32.24/32.05 [14282]~P1156(x142821,a32)+P1230(x142821,a27)
% 32.24/32.05 [14283]~P1156(x142831,a33)+P1230(x142831,a26)
% 32.24/32.05 [14284]~P1156(x142841,a34)+P1230(x142841,a28)
% 32.24/32.05 [14285]~P1156(x142851,a35)+P1230(x142851,a39)
% 32.24/32.05 [14286]~P1156(x142861,a37)+P1230(x142861,a62)
% 32.24/32.05 [14287]~P1156(x142871,a36)+P1230(x142871,a50)
% 32.24/32.05 [14288]~P1156(x142881,a40)+P1230(x142881,a83)
% 32.24/32.05 [14289]~P1156(x142891,a38)+P1230(x142891,a61)
% 32.24/32.05 [14290]~P1156(x142901,a43)+P1230(x142901,a29)
% 32.24/32.05 [14291]~P1156(x142911,a44)+P1230(x142911,a30)
% 32.24/32.05 [14292]~P1156(x142921,a42)+P1230(x142921,a91)
% 32.24/32.05 [14293]~P1156(x142931,a41)+P1230(x142931,a92)
% 32.24/32.05 [14294]~P1156(x142941,a45)+P1230(x142941,a31)
% 32.24/32.05 [14295]~P1156(x142951,a46)+P1230(x142951,a32)
% 32.24/32.05 [14296]~P1156(x142961,a47)+P1230(x142961,a33)
% 32.24/32.05 [14297]~P1156(x142971,a48)+P1230(x142971,a34)
% 32.24/32.05 [14298]~P1156(x142981,a49)+P1230(x142981,a35)
% 32.24/32.05 [14299]~P1156(x142991,a51)+P1230(x142991,a36)
% 32.24/32.05 [14300]~P1156(x143001,a52)+P1230(x143001,a37)
% 32.24/32.05 [14301]~P1156(x143011,a53)+P1230(x143011,a38)
% 32.24/32.05 [14302]~P1156(x143021,a54)+P1230(x143021,a40)
% 32.24/32.05 [14303]~P1156(x143031,a55)+P1230(x143031,a41)
% 32.24/32.05 [14304]~P1156(x143041,a56)+P1230(x143041,a42)
% 32.24/32.05 [14305]~P1156(x143051,a57)+P1230(x143051,a43)
% 32.24/32.05 [14306]~P1156(x143061,a58)+P1230(x143061,a44)
% 32.24/32.05 [14307]~P1156(x143071,a59)+P1230(x143071,a45)
% 32.24/32.05 [14308]~P1156(x143081,a60)+P1230(x143081,a46)
% 32.24/32.05 [14309]~P1146(x143091,a27)+P1239(x143091,a27)
% 32.24/32.05 [14310]~P1146(x143101,a27)+P1239(x143101,a26)
% 32.24/32.05 [14311]~P1146(x143111,a27)+P1239(x143111,a28)
% 32.24/32.05 [14312]~P1146(x143121,a27)+P1239(x143121,a39)
% 32.24/32.05 [14313]~P1146(x143131,a27)+P1239(x143131,a62)
% 32.24/32.05 [14314]~P1146(x143141,a27)+P1239(x143141,a50)
% 32.24/32.05 [14315]~P1146(x143151,a27)+P1239(x143151,a83)
% 32.24/32.05 [14316]~P1146(x143161,a27)+P1239(x143161,a61)
% 32.24/32.05 [14317]~P1146(x143171,a27)+P1239(x143171,a29)
% 32.24/32.05 [14318]~P1146(x143181,a27)+P1239(x143181,a30)
% 32.24/32.05 [14319]~P1146(x143191,a27)+P1239(x143191,a91)
% 32.24/32.05 [14320]~P1146(x143201,a27)+P1239(x143201,a92)
% 32.24/32.05 [14321]~P1146(x143211,a27)+P1239(x143211,a31)
% 32.24/32.05 [14322]~P1146(x143221,a27)+P1239(x143221,a32)
% 32.24/32.05 [14323]~P1146(x143231,a27)+P1239(x143231,a33)
% 32.24/32.05 [14324]~P1146(x143241,a27)+P1239(x143241,a34)
% 32.24/32.05 [14325]~P1146(x143251,a27)+P1239(x143251,a35)
% 32.24/32.05 [14326]~P1146(x143261,a27)+P1239(x143261,a36)
% 32.24/32.05 [14327]~P1146(x143271,a27)+P1239(x143271,a37)
% 32.24/32.05 [14328]~P1146(x143281,a27)+P1239(x143281,a38)
% 32.24/32.05 [14329]~P1146(x143291,a27)+P1239(x143291,a40)
% 32.24/32.05 [14330]~P1146(x143301,a27)+P1239(x143301,a41)
% 32.24/32.05 [14331]~P1146(x143311,a27)+P1239(x143311,a42)
% 32.24/32.05 [14332]~P1146(x143321,a27)+P1239(x143321,a43)
% 32.24/32.05 [14333]~P1146(x143331,a27)+P1239(x143331,a44)
% 32.24/32.05 [14334]~P1146(x143341,a27)+P1239(x143341,a45)
% 32.24/32.05 [14335]~P1146(x143351,a27)+P1239(x143351,a46)
% 32.24/32.05 [14336]~P1146(x143361,a27)+P1239(x143361,a47)
% 32.24/32.05 [14337]~P1233(x143371,a27)+P1232(x143371,a27)
% 32.24/32.05 [14338]~P1233(x143381,a26)+P1232(x143381,a26)
% 32.24/32.05 [14339]~P1233(x143391,a28)+P1232(x143391,a28)
% 32.24/32.05 [14340]~P1233(x143401,a39)+P1232(x143401,a39)
% 32.24/32.05 [14341]~P1233(x143411,a62)+P1232(x143411,a62)
% 32.24/32.05 [14342]~P1233(x143421,a50)+P1232(x143421,a50)
% 32.24/32.05 [14343]~P1233(x143431,a83)+P1232(x143431,a83)
% 32.24/32.05 [14344]~P1233(x143441,a61)+P1232(x143441,a61)
% 32.24/32.05 [14345]~P1233(x143451,a29)+P1232(x143451,a29)
% 32.24/32.05 [14346]~P1233(x143461,a30)+P1232(x143461,a30)
% 32.24/32.05 [14347]~P1233(x143471,a91)+P1232(x143471,a91)
% 32.24/32.05 [14348]~P1233(x143481,a92)+P1232(x143481,a92)
% 32.24/32.05 [14349]~P1233(x143491,a31)+P1232(x143491,a31)
% 32.24/32.05 [14350]~P1233(x143501,a32)+P1232(x143501,a32)
% 32.24/32.05 [14351]~P1233(x143511,a33)+P1232(x143511,a33)
% 32.24/32.05 [14352]~P1233(x143521,a34)+P1232(x143521,a34)
% 32.24/32.05 [14353]~P1233(x143531,a35)+P1232(x143531,a35)
% 32.24/32.05 [14354]~P1233(x143541,a36)+P1232(x143541,a36)
% 32.24/32.05 [14355]~P1233(x143551,a37)+P1232(x143551,a37)
% 32.24/32.05 [14356]~P1233(x143561,a38)+P1232(x143561,a38)
% 32.24/32.05 [14357]~P1233(x143571,a40)+P1232(x143571,a40)
% 32.24/32.05 [14358]~P1233(x143581,a41)+P1232(x143581,a41)
% 32.24/32.05 [14359]~P1233(x143591,a42)+P1232(x143591,a42)
% 32.24/32.05 [14360]~P1233(x143601,a43)+P1232(x143601,a43)
% 32.24/32.05 [14361]~P1233(x143611,a44)+P1232(x143611,a44)
% 32.24/32.05 [14362]~P1233(x143621,a45)+P1232(x143621,a45)
% 32.24/32.05 [14363]~P1233(x143631,a46)+P1232(x143631,a46)
% 32.24/32.05 [14364]~P1233(x143641,a47)+P1232(x143641,a47)
% 32.24/32.05 [14365]~P1146(x143651,a26)+P1227(x143651,a27)
% 32.24/32.05 [14366]~P1146(x143661,a26)+P1227(x143661,a26)
% 32.24/32.05 [14367]~P1146(x143671,a26)+P1227(x143671,a28)
% 32.24/32.05 [14368]~P1146(x143681,a26)+P1227(x143681,a39)
% 32.24/32.05 [14369]~P1146(x143691,a26)+P1227(x143691,a62)
% 32.24/32.05 [14370]~P1146(x143701,a26)+P1227(x143701,a50)
% 32.24/32.05 [14371]~P1146(x143711,a26)+P1227(x143711,a83)
% 32.24/32.05 [14372]~P1146(x143721,a26)+P1227(x143721,a61)
% 32.24/32.05 [14373]~P1146(x143731,a26)+P1227(x143731,a29)
% 32.24/32.05 [14374]~P1146(x143741,a26)+P1227(x143741,a30)
% 32.24/32.05 [14375]~P1146(x143751,a26)+P1227(x143751,a91)
% 32.24/32.05 [14376]~P1146(x143761,a26)+P1227(x143761,a92)
% 32.24/32.05 [14377]~P1146(x143771,a26)+P1227(x143771,a31)
% 32.24/32.05 [14378]~P1146(x143781,a26)+P1227(x143781,a32)
% 32.24/32.05 [14379]~P1146(x143791,a26)+P1227(x143791,a33)
% 32.24/32.05 [14380]~P1146(x143801,a26)+P1227(x143801,a34)
% 32.24/32.05 [14381]~P1146(x143811,a26)+P1227(x143811,a35)
% 32.24/32.05 [14382]~P1146(x143821,a26)+P1227(x143821,a36)
% 32.24/32.05 [14383]~P1146(x143831,a26)+P1227(x143831,a37)
% 32.24/32.05 [14384]~P1146(x143841,a26)+P1227(x143841,a38)
% 32.24/32.05 [14385]~P1146(x143851,a26)+P1227(x143851,a40)
% 32.24/32.05 [14386]~P1146(x143861,a26)+P1227(x143861,a41)
% 32.24/32.05 [14387]~P1146(x143871,a26)+P1227(x143871,a42)
% 32.24/32.05 [14388]~P1146(x143881,a26)+P1227(x143881,a43)
% 32.24/32.05 [14389]~P1146(x143891,a26)+P1227(x143891,a44)
% 32.24/32.05 [14390]~P1146(x143901,a26)+P1227(x143901,a45)
% 32.24/32.05 [14391]~P1146(x143911,a26)+P1227(x143911,a46)
% 32.24/32.05 [14392]~P1146(x143921,a26)+P1227(x143921,a47)
% 32.24/32.05 [14393]~P1146(x143931,a26)+P1227(x143931,a48)
% 32.24/32.05 [14394]~P1146(x143941,a26)+P1227(x143941,a49)
% 32.24/32.05 [14395]~P1146(x143951,a26)+P1227(x143951,a51)
% 32.24/32.05 [14396]~P1146(x143961,a26)+P1227(x143961,a52)
% 32.24/32.05 [14397]~P1156(x143971,a30)+P1219(x143971,a27)
% 32.24/32.05 [14398]~P1156(x143981,a31)+P1219(x143981,a26)
% 32.24/32.05 [14399]~P1156(x143991,a32)+P1219(x143991,a28)
% 32.24/32.05 [14400]~P1156(x144001,a33)+P1219(x144001,a39)
% 32.24/32.05 [14401]~P1156(x144011,a35)+P1219(x144011,a62)
% 32.24/32.05 [14402]~P1156(x144021,a34)+P1219(x144021,a50)
% 32.24/32.05 [14403]~P1156(x144031,a37)+P1219(x144031,a83)
% 32.24/32.05 [14404]~P1156(x144041,a36)+P1219(x144041,a61)
% 32.24/32.05 [14405]~P1156(x144051,a41)+P1219(x144051,a29)
% 32.24/32.05 [14406]~P1156(x144061,a42)+P1219(x144061,a30)
% 32.24/32.05 [14407]~P1156(x144071,a40)+P1219(x144071,a91)
% 32.24/32.05 [14408]~P1156(x144081,a38)+P1219(x144081,a92)
% 32.24/32.05 [14409]~P1156(x144091,a43)+P1219(x144091,a31)
% 32.24/32.05 [14410]~P1156(x144101,a44)+P1219(x144101,a32)
% 32.24/32.05 [14411]~P1156(x144111,a45)+P1219(x144111,a33)
% 32.24/32.05 [14412]~P1156(x144121,a46)+P1219(x144121,a34)
% 32.24/32.05 [14413]~P1156(x144131,a47)+P1219(x144131,a35)
% 32.24/32.05 [14414]~P1156(x144141,a48)+P1219(x144141,a36)
% 32.24/32.05 [14415]~P1156(x144151,a49)+P1219(x144151,a37)
% 32.24/32.05 [14416]~P1156(x144161,a51)+P1219(x144161,a38)
% 32.24/32.05 [14417]~P1156(x144171,a52)+P1219(x144171,a40)
% 32.24/32.05 [14418]~P1156(x144181,a53)+P1219(x144181,a41)
% 32.24/32.05 [14419]~P1156(x144191,a54)+P1219(x144191,a42)
% 32.24/32.05 [14420]~P1156(x144201,a55)+P1219(x144201,a43)
% 32.24/32.05 [14421]~P1156(x144211,a56)+P1219(x144211,a44)
% 32.24/32.05 [14422]~P1156(x144221,a57)+P1219(x144221,a45)
% 32.24/32.05 [14423]~P1156(x144231,a58)+P1219(x144231,a46)
% 32.24/32.05 [14424]~P1156(x144241,a59)+P1219(x144241,a47)
% 32.24/32.05 [14425]~P1156(x144251,a60)+P1219(x144251,a48)
% 32.24/32.05 [14426]~P1146(x144261,a27)+P1225(x144261,a27)
% 32.24/32.05 [14427]~P1146(x144271,a27)+P1225(x144271,a26)
% 32.24/32.05 [14428]~P1146(x144281,a27)+P1225(x144281,a28)
% 32.24/32.05 [14429]~P1146(x144291,a27)+P1225(x144291,a39)
% 32.24/32.05 [14430]~P1146(x144301,a27)+P1225(x144301,a62)
% 32.24/32.05 [14431]~P1146(x144311,a27)+P1225(x144311,a50)
% 32.24/32.05 [14432]~P1146(x144321,a27)+P1225(x144321,a83)
% 32.24/32.05 [14433]~P1146(x144331,a27)+P1225(x144331,a61)
% 32.24/32.05 [14434]~P1146(x144341,a27)+P1225(x144341,a29)
% 32.24/32.05 [14435]~P1146(x144351,a27)+P1225(x144351,a30)
% 32.24/32.05 [14436]~P1146(x144361,a27)+P1225(x144361,a91)
% 32.24/32.05 [14437]~P1146(x144371,a27)+P1225(x144371,a92)
% 32.24/32.05 [14438]~P1146(x144381,a27)+P1225(x144381,a31)
% 32.24/32.05 [14439]~P1146(x144391,a27)+P1225(x144391,a32)
% 32.24/32.05 [14440]~P1146(x144401,a27)+P1225(x144401,a33)
% 32.24/32.05 [14441]~P1146(x144411,a27)+P1225(x144411,a34)
% 32.24/32.05 [14442]~P1146(x144421,a27)+P1225(x144421,a35)
% 32.24/32.05 [14443]~P1146(x144431,a27)+P1225(x144431,a36)
% 32.24/32.05 [14444]~P1146(x144441,a27)+P1225(x144441,a37)
% 32.24/32.05 [14445]~P1146(x144451,a27)+P1225(x144451,a38)
% 32.24/32.05 [14446]~P1146(x144461,a27)+P1225(x144461,a40)
% 32.24/32.05 [14447]~P1146(x144471,a27)+P1225(x144471,a41)
% 32.24/32.05 [14448]~P1146(x144481,a27)+P1225(x144481,a42)
% 32.24/32.05 [14449]~P1146(x144491,a27)+P1225(x144491,a43)
% 32.24/32.05 [14450]~P1146(x144501,a27)+P1225(x144501,a44)
% 32.24/32.05 [14451]~P1146(x144511,a27)+P1225(x144511,a45)
% 32.24/32.05 [14452]~P1146(x144521,a27)+P1225(x144521,a46)
% 32.24/32.05 [14453]~P1146(x144531,a27)+P1225(x144531,a47)
% 32.24/32.05 [14454]~P1146(x144541,a27)+P1225(x144541,a48)
% 32.24/32.05 [14455]~P1146(x144551,a27)+P1225(x144551,a49)
% 32.24/32.05 [14456]~P1221(x144561,a27)+P1220(x144561,a27)
% 32.24/32.05 [14457]~P1221(x144571,a26)+P1220(x144571,a26)
% 32.24/32.05 [14458]~P1221(x144581,a28)+P1220(x144581,a28)
% 32.24/32.05 [14459]~P1221(x144591,a39)+P1220(x144591,a39)
% 32.24/32.05 [14460]~P1221(x144601,a62)+P1220(x144601,a62)
% 32.24/32.05 [14461]~P1221(x144611,a50)+P1220(x144611,a50)
% 32.24/32.05 [14462]~P1221(x144621,a83)+P1220(x144621,a83)
% 32.24/32.05 [14463]~P1221(x144631,a61)+P1220(x144631,a61)
% 32.24/32.05 [14464]~P1221(x144641,a29)+P1220(x144641,a29)
% 32.24/32.05 [14465]~P1221(x144651,a30)+P1220(x144651,a30)
% 32.24/32.05 [14466]~P1221(x144661,a91)+P1220(x144661,a91)
% 32.24/32.05 [14467]~P1221(x144671,a92)+P1220(x144671,a92)
% 32.24/32.05 [14468]~P1221(x144681,a31)+P1220(x144681,a31)
% 32.24/32.05 [14469]~P1221(x144691,a32)+P1220(x144691,a32)
% 32.24/32.05 [14470]~P1221(x144701,a33)+P1220(x144701,a33)
% 32.24/32.05 [14471]~P1221(x144711,a34)+P1220(x144711,a34)
% 32.24/32.05 [14472]~P1221(x144721,a35)+P1220(x144721,a35)
% 32.24/32.05 [14473]~P1221(x144731,a36)+P1220(x144731,a36)
% 32.24/32.05 [14474]~P1221(x144741,a37)+P1220(x144741,a37)
% 32.24/32.05 [14475]~P1221(x144751,a38)+P1220(x144751,a38)
% 32.24/32.05 [14476]~P1221(x144761,a40)+P1220(x144761,a40)
% 32.24/32.05 [14477]~P1221(x144771,a41)+P1220(x144771,a41)
% 32.24/32.05 [14478]~P1221(x144781,a42)+P1220(x144781,a42)
% 32.24/32.05 [14479]~P1221(x144791,a43)+P1220(x144791,a43)
% 32.24/32.05 [14480]~P1221(x144801,a44)+P1220(x144801,a44)
% 32.24/32.05 [14481]~P1221(x144811,a45)+P1220(x144811,a45)
% 32.24/32.05 [14482]~P1221(x144821,a46)+P1220(x144821,a46)
% 32.24/32.05 [14483]~P1221(x144831,a47)+P1220(x144831,a47)
% 32.24/32.05 [14484]~P1221(x144841,a48)+P1220(x144841,a48)
% 32.24/32.05 [14485]~P1221(x144851,a49)+P1220(x144851,a49)
% 32.24/32.05 [14486]~P1156(x144861,a91)+P1205(x144861,a27)
% 32.24/32.05 [14487]~P1156(x144871,a29)+P1205(x144871,a26)
% 32.24/32.05 [14488]~P1156(x144881,a30)+P1205(x144881,a28)
% 32.24/32.05 [14489]~P1156(x144891,a31)+P1205(x144891,a39)
% 32.24/32.05 [14490]~P1156(x144901,a33)+P1205(x144901,a62)
% 32.24/32.05 [14491]~P1156(x144911,a32)+P1205(x144911,a50)
% 32.24/32.05 [14492]~P1156(x144921,a35)+P1205(x144921,a83)
% 32.24/32.05 [14493]~P1156(x144931,a34)+P1205(x144931,a61)
% 32.24/32.05 [14494]~P1156(x144941,a38)+P1205(x144941,a29)
% 32.24/32.05 [14495]~P1156(x144951,a40)+P1205(x144951,a30)
% 32.24/32.05 [14496]~P1156(x144961,a37)+P1205(x144961,a91)
% 32.24/32.05 [14497]~P1156(x144971,a36)+P1205(x144971,a92)
% 32.24/32.05 [14498]~P1156(x144981,a41)+P1205(x144981,a31)
% 32.24/32.05 [14499]~P1156(x144991,a42)+P1205(x144991,a32)
% 32.24/32.05 [14500]~P1156(x145001,a43)+P1205(x145001,a33)
% 32.24/32.05 [14501]~P1156(x145011,a44)+P1205(x145011,a34)
% 32.24/32.05 [14502]~P1156(x145021,a45)+P1205(x145021,a35)
% 32.24/32.05 [14503]~P1156(x145031,a46)+P1205(x145031,a36)
% 32.24/32.05 [14504]~P1156(x145041,a47)+P1205(x145041,a37)
% 32.24/32.05 [14505]~P1156(x145051,a48)+P1205(x145051,a38)
% 32.24/32.05 [14506]~P1156(x145061,a49)+P1205(x145061,a40)
% 32.24/32.05 [14507]~P1156(x145071,a51)+P1205(x145071,a41)
% 32.24/32.05 [14508]~P1156(x145081,a52)+P1205(x145081,a42)
% 32.24/32.05 [14509]~P1156(x145091,a53)+P1205(x145091,a43)
% 32.24/32.05 [14510]~P1156(x145101,a54)+P1205(x145101,a44)
% 32.24/32.05 [14511]~P1156(x145111,a55)+P1205(x145111,a45)
% 32.24/32.05 [14512]~P1156(x145121,a56)+P1205(x145121,a46)
% 32.24/32.05 [14513]~P1156(x145131,a57)+P1205(x145131,a47)
% 32.24/32.05 [14514]~P1156(x145141,a58)+P1205(x145141,a48)
% 32.24/32.05 [14515]~P1156(x145151,a59)+P1205(x145151,a49)
% 32.24/32.05 [14516]~P1156(x145161,a60)+P1205(x145161,a51)
% 32.24/32.05 [14517]~P1146(x145171,a27)+P1217(x145171,a27)
% 32.24/32.05 [14518]~P1146(x145181,a27)+P1217(x145181,a26)
% 32.24/32.05 [14519]~P1146(x145191,a27)+P1217(x145191,a28)
% 32.24/32.05 [14520]~P1146(x145201,a27)+P1217(x145201,a39)
% 32.24/32.05 [14521]~P1146(x145211,a27)+P1217(x145211,a62)
% 32.24/32.05 [14522]~P1146(x145221,a27)+P1217(x145221,a50)
% 32.24/32.05 [14523]~P1146(x145231,a27)+P1217(x145231,a83)
% 32.24/32.05 [14524]~P1146(x145241,a27)+P1217(x145241,a61)
% 32.24/32.05 [14525]~P1146(x145251,a27)+P1217(x145251,a29)
% 32.24/32.05 [14526]~P1146(x145261,a27)+P1217(x145261,a30)
% 32.24/32.05 [14527]~P1146(x145271,a27)+P1217(x145271,a91)
% 32.24/32.05 [14528]~P1146(x145281,a27)+P1217(x145281,a92)
% 32.24/32.05 [14529]~P1146(x145291,a27)+P1217(x145291,a31)
% 32.24/32.05 [14530]~P1146(x145301,a27)+P1217(x145301,a32)
% 32.24/32.05 [14531]~P1146(x145311,a27)+P1217(x145311,a33)
% 32.24/32.05 [14532]~P1146(x145321,a27)+P1217(x145321,a34)
% 32.24/32.05 [14533]~P1146(x145331,a27)+P1217(x145331,a35)
% 32.24/32.05 [14534]~P1146(x145341,a27)+P1217(x145341,a36)
% 32.24/32.05 [14535]~P1146(x145351,a27)+P1217(x145351,a37)
% 32.24/32.05 [14536]~P1146(x145361,a27)+P1217(x145361,a38)
% 32.24/32.05 [14537]~P1146(x145371,a27)+P1217(x145371,a40)
% 32.24/32.05 [14538]~P1146(x145381,a27)+P1217(x145381,a41)
% 32.24/32.05 [14539]~P1146(x145391,a27)+P1217(x145391,a42)
% 32.24/32.05 [14540]~P1146(x145401,a27)+P1217(x145401,a43)
% 32.24/32.05 [14541]~P1146(x145411,a27)+P1217(x145411,a44)
% 32.24/32.05 [14542]~P1146(x145421,a27)+P1217(x145421,a45)
% 32.24/32.05 [14543]~P1146(x145431,a27)+P1217(x145431,a46)
% 32.24/32.05 [14544]~P1146(x145441,a27)+P1217(x145441,a47)
% 32.24/32.05 [14545]~P1146(x145451,a27)+P1217(x145451,a48)
% 32.24/32.05 [14546]~P1146(x145461,a27)+P1217(x145461,a49)
% 32.24/32.05 [14547]~P1146(x145471,a27)+P1217(x145471,a51)
% 32.24/32.05 [14548]~P1146(x145481,a27)+P1217(x145481,a52)
% 32.24/32.05 [14549]~P1208(x145491,a27)+P1207(x145491,a27)
% 32.24/32.05 [14550]~P1208(x145501,a26)+P1207(x145501,a26)
% 32.24/32.05 [14551]~P1208(x145511,a28)+P1207(x145511,a28)
% 32.24/32.05 [14552]~P1208(x145521,a39)+P1207(x145521,a39)
% 32.24/32.05 [14553]~P1208(x145531,a62)+P1207(x145531,a62)
% 32.24/32.05 [14554]~P1208(x145541,a50)+P1207(x145541,a50)
% 32.24/32.05 [14555]~P1208(x145551,a83)+P1207(x145551,a83)
% 32.24/32.05 [14556]~P1208(x145561,a61)+P1207(x145561,a61)
% 32.24/32.05 [14557]~P1208(x145571,a29)+P1207(x145571,a29)
% 32.24/32.05 [14558]~P1208(x145581,a30)+P1207(x145581,a30)
% 32.24/32.05 [14559]~P1208(x145591,a91)+P1207(x145591,a91)
% 32.24/32.05 [14560]~P1208(x145601,a92)+P1207(x145601,a92)
% 32.24/32.05 [14561]~P1208(x145611,a31)+P1207(x145611,a31)
% 32.24/32.05 [14562]~P1208(x145621,a32)+P1207(x145621,a32)
% 32.24/32.05 [14563]~P1208(x145631,a33)+P1207(x145631,a33)
% 32.24/32.05 [14564]~P1208(x145641,a34)+P1207(x145641,a34)
% 32.24/32.05 [14565]~P1208(x145651,a35)+P1207(x145651,a35)
% 32.24/32.05 [14566]~P1208(x145661,a36)+P1207(x145661,a36)
% 32.24/32.05 [14567]~P1208(x145671,a37)+P1207(x145671,a37)
% 32.24/32.05 [14568]~P1208(x145681,a38)+P1207(x145681,a38)
% 32.24/32.05 [14569]~P1208(x145691,a40)+P1207(x145691,a40)
% 32.24/32.05 [14570]~P1208(x145701,a41)+P1207(x145701,a41)
% 32.24/32.05 [14571]~P1208(x145711,a42)+P1207(x145711,a42)
% 32.24/32.05 [14572]~P1208(x145721,a43)+P1207(x145721,a43)
% 32.24/32.05 [14573]~P1208(x145731,a44)+P1207(x145731,a44)
% 32.24/32.05 [14574]~P1208(x145741,a45)+P1207(x145741,a45)
% 32.24/32.05 [14575]~P1208(x145751,a46)+P1207(x145751,a46)
% 32.24/32.05 [14576]~P1208(x145761,a47)+P1207(x145761,a47)
% 32.24/32.05 [14577]~P1208(x145771,a48)+P1207(x145771,a48)
% 32.24/32.05 [14578]~P1208(x145781,a49)+P1207(x145781,a49)
% 32.24/32.05 [14579]~P1208(x145791,a51)+P1207(x145791,a51)
% 32.24/32.05 [14580]~P1208(x145801,a52)+P1207(x145801,a52)
% 32.24/32.05 [14581]~P1146(x145811,a28)+P1201(x145811,a27)
% 32.24/32.05 [14582]~P1146(x145821,a28)+P1201(x145821,a26)
% 32.24/32.05 [14583]~P1146(x145831,a28)+P1201(x145831,a28)
% 32.24/32.05 [14584]~P1146(x145841,a28)+P1201(x145841,a39)
% 32.24/32.05 [14585]~P1146(x145851,a28)+P1201(x145851,a62)
% 32.24/32.05 [14586]~P1146(x145861,a28)+P1201(x145861,a50)
% 32.24/32.05 [14587]~P1146(x145871,a28)+P1201(x145871,a83)
% 32.24/32.05 [14588]~P1146(x145881,a28)+P1201(x145881,a61)
% 32.24/32.05 [14589]~P1146(x145891,a28)+P1201(x145891,a29)
% 32.24/32.05 [14590]~P1146(x145901,a28)+P1201(x145901,a30)
% 32.24/32.05 [14591]~P1146(x145911,a28)+P1201(x145911,a91)
% 32.24/32.05 [14592]~P1146(x145921,a28)+P1201(x145921,a92)
% 32.24/32.05 [14593]~P1146(x145931,a28)+P1201(x145931,a31)
% 32.24/32.05 [14594]~P1146(x145941,a28)+P1201(x145941,a32)
% 32.24/32.05 [14595]~P1146(x145951,a28)+P1201(x145951,a33)
% 32.24/32.05 [14596]~P1146(x145961,a28)+P1201(x145961,a34)
% 32.24/32.05 [14597]~P1146(x145971,a28)+P1201(x145971,a35)
% 32.24/32.05 [14598]~P1146(x145981,a28)+P1201(x145981,a36)
% 32.24/32.05 [14599]~P1146(x145991,a28)+P1201(x145991,a37)
% 32.24/32.05 [14600]~P1146(x146001,a28)+P1201(x146001,a38)
% 32.24/32.05 [14601]~P1146(x146011,a28)+P1201(x146011,a40)
% 32.24/32.05 [14602]~P1146(x146021,a28)+P1201(x146021,a41)
% 32.24/32.05 [14603]~P1146(x146031,a28)+P1201(x146031,a42)
% 32.24/32.05 [14604]~P1146(x146041,a28)+P1201(x146041,a43)
% 32.24/32.05 [14605]~P1146(x146051,a28)+P1201(x146051,a44)
% 32.24/32.05 [14606]~P1146(x146061,a28)+P1201(x146061,a45)
% 32.24/32.05 [14607]~P1146(x146071,a28)+P1201(x146071,a46)
% 32.24/32.05 [14608]~P1146(x146081,a28)+P1201(x146081,a47)
% 32.24/32.05 [14609]~P1146(x146091,a28)+P1201(x146091,a48)
% 32.24/32.05 [14610]~P1146(x146101,a28)+P1201(x146101,a49)
% 32.24/32.05 [14611]~P1146(x146111,a28)+P1201(x146111,a51)
% 32.24/32.05 [14612]~P1146(x146121,a28)+P1201(x146121,a52)
% 32.24/32.05 [14613]~P1146(x146131,a28)+P1201(x146131,a53)
% 32.24/32.05 [14614]~P1146(x146141,a28)+P1201(x146141,a54)
% 32.24/32.05 [14615]~P1146(x146151,a28)+P1201(x146151,a55)
% 32.24/32.05 [14616]~P1146(x146161,a28)+P1201(x146161,a56)
% 32.24/32.05 [14617]~P1146(x146171,a28)+P1201(x146171,a57)
% 32.24/32.05 [14618]~P1146(x146181,a28)+P1201(x146181,a58)
% 32.24/32.05 [14619]~P1146(x146191,a28)+P1201(x146191,a59)
% 32.24/32.05 [14620]~P1146(x146201,a28)+P1201(x146201,a60)
% 32.24/32.05 [14621]~P1146(x146211,a26)+P1200(x146211,a27)
% 32.24/32.05 [14622]~P1146(x146221,a26)+P1200(x146221,a26)
% 32.24/32.05 [14623]~P1146(x146231,a26)+P1200(x146231,a28)
% 32.24/32.05 [14624]~P1146(x146241,a26)+P1200(x146241,a39)
% 32.24/32.05 [14625]~P1146(x146251,a26)+P1200(x146251,a62)
% 32.24/32.05 [14626]~P1146(x146261,a26)+P1200(x146261,a50)
% 32.24/32.05 [14627]~P1146(x146271,a26)+P1200(x146271,a83)
% 32.24/32.05 [14628]~P1146(x146281,a26)+P1200(x146281,a61)
% 32.24/32.05 [14629]~P1146(x146291,a26)+P1200(x146291,a29)
% 32.24/32.05 [14630]~P1146(x146301,a26)+P1200(x146301,a30)
% 32.24/32.05 [14631]~P1146(x146311,a26)+P1200(x146311,a91)
% 32.24/32.05 [14632]~P1146(x146321,a26)+P1200(x146321,a92)
% 32.24/32.05 [14633]~P1146(x146331,a26)+P1200(x146331,a31)
% 32.24/32.05 [14634]~P1146(x146341,a26)+P1200(x146341,a32)
% 32.24/32.05 [14635]~P1146(x146351,a26)+P1200(x146351,a33)
% 32.24/32.05 [14636]~P1146(x146361,a26)+P1200(x146361,a34)
% 32.24/32.05 [14637]~P1146(x146371,a26)+P1200(x146371,a35)
% 32.24/32.05 [14638]~P1146(x146381,a26)+P1200(x146381,a36)
% 32.24/32.05 [14639]~P1146(x146391,a26)+P1200(x146391,a37)
% 32.24/32.05 [14640]~P1146(x146401,a26)+P1200(x146401,a38)
% 32.24/32.05 [14641]~P1146(x146411,a26)+P1200(x146411,a40)
% 32.24/32.05 [14642]~P1146(x146421,a26)+P1200(x146421,a41)
% 32.24/32.05 [14643]~P1146(x146431,a26)+P1200(x146431,a42)
% 32.24/32.05 [14644]~P1146(x146441,a26)+P1200(x146441,a43)
% 32.24/32.05 [14645]~P1146(x146451,a26)+P1200(x146451,a44)
% 32.24/32.05 [14646]~P1146(x146461,a26)+P1200(x146461,a45)
% 32.24/32.05 [14647]~P1146(x146471,a26)+P1200(x146471,a46)
% 32.24/32.05 [14648]~P1146(x146481,a26)+P1200(x146481,a47)
% 32.24/32.05 [14649]~P1146(x146491,a26)+P1200(x146491,a48)
% 32.24/32.05 [14650]~P1146(x146501,a26)+P1200(x146501,a49)
% 32.24/32.05 [14651]~P1146(x146511,a26)+P1200(x146511,a51)
% 32.24/32.05 [14652]~P1146(x146521,a26)+P1200(x146521,a52)
% 32.24/32.05 [14653]~P1146(x146531,a26)+P1200(x146531,a53)
% 32.24/32.05 [14654]~P1146(x146541,a26)+P1200(x146541,a54)
% 32.24/32.05 [14655]~P1146(x146551,a26)+P1200(x146551,a55)
% 32.24/32.05 [14656]~P1146(x146561,a26)+P1200(x146561,a56)
% 32.24/32.05 [14657]~P1156(x146571,a83)+P1190(x146571,a27)
% 32.24/32.05 [14658]~P1156(x146581,a92)+P1190(x146581,a26)
% 32.24/32.05 [14659]~P1156(x146591,a91)+P1190(x146591,a28)
% 32.24/32.05 [14660]~P1156(x146601,a29)+P1190(x146601,a39)
% 32.24/32.05 [14661]~P1156(x146611,a31)+P1190(x146611,a62)
% 32.24/32.05 [14662]~P1156(x146621,a30)+P1190(x146621,a50)
% 32.24/32.05 [14663]~P1156(x146631,a33)+P1190(x146631,a83)
% 32.24/32.05 [14664]~P1156(x146641,a32)+P1190(x146641,a61)
% 32.24/32.05 [14665]~P1156(x146651,a36)+P1190(x146651,a29)
% 32.24/32.05 [14666]~P1156(x146661,a37)+P1190(x146661,a30)
% 32.24/32.05 [14667]~P1156(x146671,a35)+P1190(x146671,a91)
% 32.24/32.05 [14668]~P1156(x146681,a34)+P1190(x146681,a92)
% 32.24/32.05 [14669]~P1156(x146691,a38)+P1190(x146691,a31)
% 32.24/32.05 [14670]~P1156(x146701,a40)+P1190(x146701,a32)
% 32.24/32.05 [14671]~P1156(x146711,a41)+P1190(x146711,a33)
% 32.24/32.05 [14672]~P1156(x146721,a42)+P1190(x146721,a34)
% 32.24/32.05 [14673]~P1156(x146731,a43)+P1190(x146731,a35)
% 32.24/32.05 [14674]~P1156(x146741,a44)+P1190(x146741,a36)
% 32.24/32.05 [14675]~P1156(x146751,a45)+P1190(x146751,a37)
% 32.24/32.05 [14676]~P1156(x146761,a46)+P1190(x146761,a38)
% 32.24/32.05 [14677]~P1156(x146771,a47)+P1190(x146771,a40)
% 32.24/32.05 [14678]~P1156(x146781,a48)+P1190(x146781,a41)
% 32.24/32.05 [14679]~P1156(x146791,a49)+P1190(x146791,a42)
% 32.24/32.05 [14680]~P1156(x146801,a51)+P1190(x146801,a43)
% 32.24/32.05 [14681]~P1156(x146811,a52)+P1190(x146811,a44)
% 32.24/32.05 [14682]~P1156(x146821,a53)+P1190(x146821,a45)
% 32.24/32.05 [14683]~P1156(x146831,a54)+P1190(x146831,a46)
% 32.24/32.05 [14684]~P1156(x146841,a55)+P1190(x146841,a47)
% 32.24/32.05 [14685]~P1156(x146851,a56)+P1190(x146851,a48)
% 32.24/32.05 [14686]~P1156(x146861,a57)+P1190(x146861,a49)
% 32.24/32.05 [14687]~P1156(x146871,a58)+P1190(x146871,a51)
% 32.24/32.05 [14688]~P1156(x146881,a59)+P1190(x146881,a52)
% 32.24/32.05 [14689]~P1156(x146891,a60)+P1190(x146891,a53)
% 32.24/32.05 [14690]~P1146(x146901,a27)+P1199(x146901,a27)
% 32.24/32.05 [14691]~P1146(x146911,a27)+P1199(x146911,a26)
% 32.24/32.05 [14692]~P1146(x146921,a27)+P1199(x146921,a28)
% 32.24/32.05 [14693]~P1146(x146931,a27)+P1199(x146931,a39)
% 32.24/32.05 [14694]~P1146(x146941,a27)+P1199(x146941,a62)
% 32.24/32.05 [14695]~P1146(x146951,a27)+P1199(x146951,a50)
% 32.24/32.05 [14696]~P1146(x146961,a27)+P1199(x146961,a83)
% 32.24/32.05 [14697]~P1146(x146971,a27)+P1199(x146971,a61)
% 32.24/32.05 [14698]~P1146(x146981,a27)+P1199(x146981,a29)
% 32.24/32.05 [14699]~P1146(x146991,a27)+P1199(x146991,a30)
% 32.24/32.05 [14700]~P1146(x147001,a27)+P1199(x147001,a91)
% 32.24/32.05 [14701]~P1146(x147011,a27)+P1199(x147011,a92)
% 32.24/32.05 [14702]~P1146(x147021,a27)+P1199(x147021,a31)
% 32.24/32.05 [14703]~P1146(x147031,a27)+P1199(x147031,a32)
% 32.24/32.05 [14704]~P1146(x147041,a27)+P1199(x147041,a33)
% 32.24/32.05 [14705]~P1146(x147051,a27)+P1199(x147051,a34)
% 32.24/32.05 [14706]~P1146(x147061,a27)+P1199(x147061,a35)
% 32.24/32.05 [14707]~P1146(x147071,a27)+P1199(x147071,a36)
% 32.24/32.05 [14708]~P1146(x147081,a27)+P1199(x147081,a37)
% 32.24/32.05 [14709]~P1146(x147091,a27)+P1199(x147091,a38)
% 32.24/32.05 [14710]~P1146(x147101,a27)+P1199(x147101,a40)
% 32.24/32.05 [14711]~P1146(x147111,a27)+P1199(x147111,a41)
% 32.24/32.05 [14712]~P1146(x147121,a27)+P1199(x147121,a42)
% 32.24/32.05 [14713]~P1146(x147131,a27)+P1199(x147131,a43)
% 32.24/32.05 [14714]~P1146(x147141,a27)+P1199(x147141,a44)
% 32.24/32.05 [14715]~P1146(x147151,a27)+P1199(x147151,a45)
% 32.24/32.05 [14716]~P1146(x147161,a27)+P1199(x147161,a46)
% 32.24/32.05 [14717]~P1146(x147171,a27)+P1199(x147171,a47)
% 32.24/32.05 [14718]~P1146(x147181,a27)+P1199(x147181,a48)
% 32.24/32.05 [14719]~P1146(x147191,a27)+P1199(x147191,a49)
% 32.24/32.05 [14720]~P1146(x147201,a27)+P1199(x147201,a51)
% 32.24/32.05 [14721]~P1146(x147211,a27)+P1199(x147211,a52)
% 32.24/32.05 [14722]~P1146(x147221,a27)+P1199(x147221,a53)
% 32.24/32.05 [14723]~P1146(x147231,a27)+P1199(x147231,a54)
% 32.24/32.05 [14724]~P1193(x147241,a27)+P1195(x147241,a27)
% 32.24/32.05 [14725]~P1193(x147251,a26)+P1195(x147251,a26)
% 32.24/32.05 [14726]~P1193(x147261,a28)+P1195(x147261,a28)
% 32.24/32.05 [14727]~P1193(x147271,a39)+P1195(x147271,a39)
% 32.24/32.05 [14728]~P1193(x147281,a62)+P1195(x147281,a62)
% 32.24/32.05 [14729]~P1193(x147291,a50)+P1195(x147291,a50)
% 32.24/32.05 [14730]~P1193(x147301,a83)+P1195(x147301,a83)
% 32.24/32.05 [14731]~P1193(x147311,a61)+P1195(x147311,a61)
% 32.24/32.05 [14732]~P1193(x147321,a29)+P1195(x147321,a29)
% 32.24/32.05 [14733]~P1193(x147331,a30)+P1195(x147331,a30)
% 32.24/32.05 [14734]~P1193(x147341,a91)+P1195(x147341,a91)
% 32.24/32.05 [14735]~P1193(x147351,a92)+P1195(x147351,a92)
% 32.24/32.05 [14736]~P1193(x147361,a31)+P1195(x147361,a31)
% 32.24/32.05 [14737]~P1193(x147371,a32)+P1195(x147371,a32)
% 32.24/32.05 [14738]~P1193(x147381,a33)+P1195(x147381,a33)
% 32.24/32.05 [14739]~P1193(x147391,a34)+P1195(x147391,a34)
% 32.24/32.05 [14740]~P1193(x147401,a35)+P1195(x147401,a35)
% 32.24/32.05 [14741]~P1193(x147411,a36)+P1195(x147411,a36)
% 32.24/32.05 [14742]~P1193(x147421,a37)+P1195(x147421,a37)
% 32.24/32.05 [14743]~P1193(x147431,a38)+P1195(x147431,a38)
% 32.24/32.05 [14744]~P1193(x147441,a40)+P1195(x147441,a40)
% 32.24/32.05 [14745]~P1193(x147451,a41)+P1195(x147451,a41)
% 32.24/32.05 [14746]~P1193(x147461,a42)+P1195(x147461,a42)
% 32.24/32.05 [14747]~P1193(x147471,a43)+P1195(x147471,a43)
% 32.24/32.05 [14748]~P1193(x147481,a44)+P1195(x147481,a44)
% 32.24/32.05 [14749]~P1193(x147491,a45)+P1195(x147491,a45)
% 32.24/32.05 [14750]~P1193(x147501,a46)+P1195(x147501,a46)
% 32.24/32.05 [14751]~P1193(x147511,a47)+P1195(x147511,a47)
% 32.24/32.05 [14752]~P1193(x147521,a48)+P1195(x147521,a48)
% 32.24/32.05 [14753]~P1193(x147531,a49)+P1195(x147531,a49)
% 32.24/32.05 [14754]~P1193(x147541,a51)+P1195(x147541,a51)
% 32.24/32.05 [14755]~P1193(x147551,a52)+P1195(x147551,a52)
% 32.24/32.05 [14756]~P1193(x147561,a53)+P1195(x147561,a53)
% 32.24/32.05 [14757]~P1193(x147571,a54)+P1195(x147571,a54)
% 32.24/32.05 [14758]~P1156(x147581,a62)+P1179(x147581,a27)
% 32.24/32.05 [14759]~P1156(x147591,a61)+P1179(x147591,a26)
% 32.24/32.05 [14760]~P1156(x147601,a83)+P1179(x147601,a28)
% 32.24/32.05 [14761]~P1156(x147611,a92)+P1179(x147611,a39)
% 32.24/32.05 [14762]~P1156(x147621,a29)+P1179(x147621,a62)
% 32.24/32.05 [14763]~P1156(x147631,a91)+P1179(x147631,a50)
% 32.24/32.05 [14764]~P1156(x147641,a31)+P1179(x147641,a83)
% 32.24/32.05 [14765]~P1156(x147651,a30)+P1179(x147651,a61)
% 32.24/32.05 [14766]~P1156(x147661,a34)+P1179(x147661,a29)
% 32.24/32.05 [14767]~P1156(x147671,a35)+P1179(x147671,a30)
% 32.24/32.05 [14768]~P1156(x147681,a33)+P1179(x147681,a91)
% 32.24/32.05 [14769]~P1156(x147691,a32)+P1179(x147691,a92)
% 32.24/32.05 [14770]~P1156(x147701,a36)+P1179(x147701,a31)
% 32.24/32.05 [14771]~P1156(x147711,a37)+P1179(x147711,a32)
% 32.24/32.05 [14772]~P1156(x147721,a38)+P1179(x147721,a33)
% 32.24/32.05 [14773]~P1156(x147731,a40)+P1179(x147731,a34)
% 32.24/32.05 [14774]~P1156(x147741,a41)+P1179(x147741,a35)
% 32.24/32.05 [14775]~P1156(x147751,a42)+P1179(x147751,a36)
% 32.24/32.05 [14776]~P1156(x147761,a43)+P1179(x147761,a37)
% 32.24/32.05 [14777]~P1156(x147771,a44)+P1179(x147771,a38)
% 32.24/32.05 [14778]~P1156(x147781,a45)+P1179(x147781,a40)
% 32.24/32.05 [14779]~P1156(x147791,a46)+P1179(x147791,a41)
% 32.24/32.05 [14780]~P1156(x147801,a47)+P1179(x147801,a42)
% 32.24/32.05 [14781]~P1156(x147811,a48)+P1179(x147811,a43)
% 32.24/32.05 [14782]~P1156(x147821,a49)+P1179(x147821,a44)
% 32.24/32.05 [14783]~P1156(x147831,a51)+P1179(x147831,a45)
% 32.24/32.05 [14784]~P1156(x147841,a52)+P1179(x147841,a46)
% 32.24/32.05 [14785]~P1156(x147851,a53)+P1179(x147851,a47)
% 32.24/32.05 [14786]~P1156(x147861,a54)+P1179(x147861,a48)
% 32.24/32.05 [14787]~P1156(x147871,a55)+P1179(x147871,a49)
% 32.24/32.05 [14788]~P1156(x147881,a56)+P1179(x147881,a51)
% 32.24/32.05 [14789]~P1156(x147891,a57)+P1179(x147891,a52)
% 32.24/32.05 [14790]~P1156(x147901,a58)+P1179(x147901,a53)
% 32.24/32.05 [14791]~P1156(x147911,a59)+P1179(x147911,a54)
% 32.24/32.05 [14792]~P1156(x147921,a60)+P1179(x147921,a55)
% 32.24/32.05 [14793]~P1146(x147931,a27)+P1188(x147931,a27)
% 32.24/32.05 [14794]~P1146(x147941,a27)+P1188(x147941,a26)
% 32.24/32.05 [14795]~P1146(x147951,a27)+P1188(x147951,a28)
% 32.24/32.05 [14796]~P1146(x147961,a27)+P1188(x147961,a39)
% 32.24/32.05 [14797]~P1146(x147971,a27)+P1188(x147971,a62)
% 32.24/32.05 [14798]~P1146(x147981,a27)+P1188(x147981,a50)
% 32.24/32.05 [14799]~P1146(x147991,a27)+P1188(x147991,a83)
% 32.24/32.05 [14800]~P1146(x148001,a27)+P1188(x148001,a61)
% 32.24/32.05 [14801]~P1146(x148011,a27)+P1188(x148011,a29)
% 32.24/32.05 [14802]~P1146(x148021,a27)+P1188(x148021,a30)
% 32.24/32.05 [14803]~P1146(x148031,a27)+P1188(x148031,a91)
% 32.24/32.05 [14804]~P1146(x148041,a27)+P1188(x148041,a92)
% 32.24/32.05 [14805]~P1146(x148051,a27)+P1188(x148051,a31)
% 32.24/32.05 [14806]~P1146(x148061,a27)+P1188(x148061,a32)
% 32.24/32.05 [14807]~P1146(x148071,a27)+P1188(x148071,a33)
% 32.24/32.05 [14808]~P1146(x148081,a27)+P1188(x148081,a34)
% 32.24/32.05 [14809]~P1146(x148091,a27)+P1188(x148091,a35)
% 32.24/32.05 [14810]~P1146(x148101,a27)+P1188(x148101,a36)
% 32.24/32.05 [14811]~P1146(x148111,a27)+P1188(x148111,a37)
% 32.24/32.05 [14812]~P1146(x148121,a27)+P1188(x148121,a38)
% 32.24/32.05 [14813]~P1146(x148131,a27)+P1188(x148131,a40)
% 32.24/32.05 [14814]~P1146(x148141,a27)+P1188(x148141,a41)
% 32.24/32.05 [14815]~P1146(x148151,a27)+P1188(x148151,a42)
% 32.24/32.05 [14816]~P1146(x148161,a27)+P1188(x148161,a43)
% 32.24/32.05 [14817]~P1146(x148171,a27)+P1188(x148171,a44)
% 32.24/32.05 [14818]~P1146(x148181,a27)+P1188(x148181,a45)
% 32.24/32.05 [14819]~P1146(x148191,a27)+P1188(x148191,a46)
% 32.24/32.05 [14820]~P1146(x148201,a27)+P1188(x148201,a47)
% 32.24/32.05 [14821]~P1146(x148211,a27)+P1188(x148211,a48)
% 32.24/32.05 [14822]~P1146(x148221,a27)+P1188(x148221,a49)
% 32.24/32.05 [14823]~P1146(x148231,a27)+P1188(x148231,a51)
% 32.24/32.05 [14824]~P1146(x148241,a27)+P1188(x148241,a52)
% 32.24/32.05 [14825]~P1146(x148251,a27)+P1188(x148251,a53)
% 32.24/32.05 [14826]~P1146(x148261,a27)+P1188(x148261,a54)
% 32.24/32.05 [14827]~P1146(x148271,a27)+P1188(x148271,a55)
% 32.24/32.05 [14828]~P1146(x148281,a27)+P1188(x148281,a56)
% 32.24/32.05 [14829]~P1185(x148291,a27)+P1184(x148291,a27)
% 32.24/32.05 [14830]~P1185(x148301,a26)+P1184(x148301,a26)
% 32.24/32.05 [14831]~P1185(x148311,a28)+P1184(x148311,a28)
% 32.24/32.05 [14832]~P1185(x148321,a39)+P1184(x148321,a39)
% 32.24/32.05 [14833]~P1185(x148331,a62)+P1184(x148331,a62)
% 32.24/32.05 [14834]~P1185(x148341,a50)+P1184(x148341,a50)
% 32.24/32.05 [14835]~P1185(x148351,a83)+P1184(x148351,a83)
% 32.24/32.05 [14836]~P1185(x148361,a61)+P1184(x148361,a61)
% 32.24/32.05 [14837]~P1185(x148371,a29)+P1184(x148371,a29)
% 32.24/32.05 [14838]~P1185(x148381,a30)+P1184(x148381,a30)
% 32.24/32.05 [14839]~P1185(x148391,a91)+P1184(x148391,a91)
% 32.24/32.05 [14840]~P1185(x148401,a92)+P1184(x148401,a92)
% 32.24/32.05 [14841]~P1185(x148411,a31)+P1184(x148411,a31)
% 32.24/32.05 [14842]~P1185(x148421,a32)+P1184(x148421,a32)
% 32.24/32.05 [14843]~P1185(x148431,a33)+P1184(x148431,a33)
% 32.24/32.05 [14844]~P1185(x148441,a34)+P1184(x148441,a34)
% 32.24/32.05 [14845]~P1185(x148451,a35)+P1184(x148451,a35)
% 32.24/32.05 [14846]~P1185(x148461,a36)+P1184(x148461,a36)
% 32.24/32.05 [14847]~P1185(x148471,a37)+P1184(x148471,a37)
% 32.24/32.05 [14848]~P1185(x148481,a38)+P1184(x148481,a38)
% 32.24/32.05 [14849]~P1185(x148491,a40)+P1184(x148491,a40)
% 32.24/32.05 [14850]~P1185(x148501,a41)+P1184(x148501,a41)
% 32.24/32.05 [14851]~P1185(x148511,a42)+P1184(x148511,a42)
% 32.24/32.05 [14852]~P1185(x148521,a43)+P1184(x148521,a43)
% 32.24/32.05 [14853]~P1185(x148531,a44)+P1184(x148531,a44)
% 32.24/32.05 [14854]~P1185(x148541,a45)+P1184(x148541,a45)
% 32.24/32.05 [14855]~P1185(x148551,a46)+P1184(x148551,a46)
% 32.24/32.05 [14856]~P1185(x148561,a47)+P1184(x148561,a47)
% 32.24/32.05 [14857]~P1185(x148571,a48)+P1184(x148571,a48)
% 32.24/32.05 [14858]~P1185(x148581,a49)+P1184(x148581,a49)
% 32.24/32.05 [14859]~P1185(x148591,a51)+P1184(x148591,a51)
% 32.24/32.05 [14860]~P1185(x148601,a52)+P1184(x148601,a52)
% 32.24/32.05 [14861]~P1185(x148611,a53)+P1184(x148611,a53)
% 32.24/32.05 [14862]~P1185(x148621,a54)+P1184(x148621,a54)
% 32.24/32.05 [14863]~P1185(x148631,a55)+P1184(x148631,a55)
% 32.24/32.05 [14864]~P1185(x148641,a56)+P1184(x148641,a56)
% 32.24/32.05 [14865]~P1146(x148651,a26)+P1176(x148651,a27)
% 32.24/32.05 [14866]~P1146(x148661,a26)+P1176(x148661,a26)
% 32.24/32.05 [14867]~P1146(x148671,a26)+P1176(x148671,a28)
% 32.24/32.05 [14868]~P1146(x148681,a26)+P1176(x148681,a39)
% 32.24/32.05 [14869]~P1146(x148691,a26)+P1176(x148691,a62)
% 32.24/32.05 [14870]~P1146(x148701,a26)+P1176(x148701,a50)
% 32.24/32.05 [14871]~P1146(x148711,a26)+P1176(x148711,a83)
% 32.24/32.05 [14872]~P1146(x148721,a26)+P1176(x148721,a61)
% 32.24/32.05 [14873]~P1146(x148731,a26)+P1176(x148731,a29)
% 32.24/32.05 [14874]~P1146(x148741,a26)+P1176(x148741,a30)
% 32.24/32.05 [14875]~P1146(x148751,a26)+P1176(x148751,a91)
% 32.24/32.05 [14876]~P1146(x148761,a26)+P1176(x148761,a92)
% 32.24/32.05 [14877]~P1146(x148771,a26)+P1176(x148771,a31)
% 32.24/32.05 [14878]~P1146(x148781,a26)+P1176(x148781,a32)
% 32.24/32.05 [14879]~P1146(x148791,a26)+P1176(x148791,a33)
% 32.24/32.05 [14880]~P1146(x148801,a26)+P1176(x148801,a34)
% 32.24/32.05 [14881]~P1146(x148811,a26)+P1176(x148811,a35)
% 32.24/32.05 [14882]~P1146(x148821,a26)+P1176(x148821,a36)
% 32.24/32.05 [14883]~P1146(x148831,a26)+P1176(x148831,a37)
% 32.24/32.05 [14884]~P1146(x148841,a26)+P1176(x148841,a38)
% 32.24/32.05 [14885]~P1146(x148851,a26)+P1176(x148851,a40)
% 32.24/32.05 [14886]~P1146(x148861,a26)+P1176(x148861,a41)
% 32.24/32.05 [14887]~P1146(x148871,a26)+P1176(x148871,a42)
% 32.24/32.05 [14888]~P1146(x148881,a26)+P1176(x148881,a43)
% 32.24/32.05 [14889]~P1146(x148891,a26)+P1176(x148891,a44)
% 32.24/32.05 [14890]~P1146(x148901,a26)+P1176(x148901,a45)
% 32.24/32.05 [14891]~P1146(x148911,a26)+P1176(x148911,a46)
% 32.24/32.05 [14892]~P1146(x148921,a26)+P1176(x148921,a47)
% 32.24/32.05 [14893]~P1146(x148931,a26)+P1176(x148931,a48)
% 32.24/32.05 [14894]~P1146(x148941,a26)+P1176(x148941,a49)
% 32.24/32.05 [14895]~P1146(x148951,a26)+P1176(x148951,a51)
% 32.24/32.05 [14896]~P1146(x148961,a26)+P1176(x148961,a52)
% 32.24/32.05 [14897]~P1146(x148971,a26)+P1176(x148971,a53)
% 32.24/32.05 [14898]~P1146(x148981,a26)+P1176(x148981,a54)
% 32.24/32.05 [14899]~P1146(x148991,a26)+P1176(x148991,a55)
% 32.24/32.05 [14900]~P1146(x149001,a26)+P1176(x149001,a56)
% 32.24/32.05 [14901]~P1146(x149011,a26)+P1176(x149011,a57)
% 32.24/32.05 [14902]~P1146(x149021,a26)+P1176(x149021,a58)
% 32.24/32.05 [14903]~P1146(x149031,a26)+P1176(x149031,a59)
% 32.24/32.05 [14904]~P1146(x149041,a26)+P1176(x149041,a60)
% 32.24/32.05 [14905]~P1156(x149051,a39)+P1167(x149051,a27)
% 32.24/32.05 [14906]~P1156(x149061,a50)+P1167(x149061,a26)
% 32.24/32.05 [14907]~P1156(x149071,a62)+P1167(x149071,a28)
% 32.24/32.05 [14908]~P1156(x149081,a61)+P1167(x149081,a39)
% 32.24/32.05 [14909]~P1156(x149091,a92)+P1167(x149091,a62)
% 32.24/32.05 [14910]~P1156(x149101,a83)+P1167(x149101,a50)
% 32.24/32.05 [14911]~P1156(x149111,a29)+P1167(x149111,a83)
% 32.24/32.05 [14912]~P1156(x149121,a91)+P1167(x149121,a61)
% 32.24/32.05 [14913]~P1156(x149131,a32)+P1167(x149131,a29)
% 32.24/32.05 [14914]~P1156(x149141,a33)+P1167(x149141,a30)
% 32.24/32.05 [14915]~P1156(x149151,a31)+P1167(x149151,a91)
% 32.24/32.05 [14916]~P1156(x149161,a30)+P1167(x149161,a92)
% 32.24/32.05 [14917]~P1156(x149171,a34)+P1167(x149171,a31)
% 32.24/32.05 [14918]~P1156(x149181,a35)+P1167(x149181,a32)
% 32.24/32.05 [14919]~P1156(x149191,a36)+P1167(x149191,a33)
% 32.24/32.05 [14920]~P1156(x149201,a37)+P1167(x149201,a34)
% 32.24/32.05 [14921]~P1156(x149211,a38)+P1167(x149211,a35)
% 32.24/32.05 [14922]~P1156(x149221,a40)+P1167(x149221,a36)
% 32.24/32.05 [14923]~P1156(x149231,a41)+P1167(x149231,a37)
% 32.24/32.05 [14924]~P1156(x149241,a42)+P1167(x149241,a38)
% 32.24/32.05 [14925]~P1156(x149251,a43)+P1167(x149251,a40)
% 32.24/32.05 [14926]~P1156(x149261,a44)+P1167(x149261,a41)
% 32.24/32.05 [14927]~P1156(x149271,a45)+P1167(x149271,a42)
% 32.24/32.05 [14928]~P1156(x149281,a46)+P1167(x149281,a43)
% 32.24/32.05 [14929]~P1156(x149291,a47)+P1167(x149291,a44)
% 32.24/32.05 [14930]~P1156(x149301,a48)+P1167(x149301,a45)
% 32.24/32.05 [14931]~P1156(x149311,a49)+P1167(x149311,a46)
% 32.24/32.05 [14932]~P1156(x149321,a51)+P1167(x149321,a47)
% 32.24/32.05 [14933]~P1156(x149331,a52)+P1167(x149331,a48)
% 32.24/32.05 [14934]~P1156(x149341,a53)+P1167(x149341,a49)
% 32.24/32.05 [14935]~P1156(x149351,a54)+P1167(x149351,a51)
% 32.24/32.05 [14936]~P1156(x149361,a55)+P1167(x149361,a52)
% 32.24/32.05 [14937]~P1156(x149371,a56)+P1167(x149371,a53)
% 32.24/32.05 [14938]~P1156(x149381,a57)+P1167(x149381,a54)
% 32.24/32.05 [14939]~P1156(x149391,a58)+P1167(x149391,a55)
% 32.24/32.05 [14940]~P1156(x149401,a59)+P1167(x149401,a56)
% 32.24/32.05 [14941]~P1156(x149411,a60)+P1167(x149411,a57)
% 32.24/32.05 [14942]~P1146(x149421,a27)+P1175(x149421,a27)
% 32.24/32.05 [14943]~P1146(x149431,a27)+P1175(x149431,a26)
% 32.24/32.05 [14944]~P1146(x149441,a27)+P1175(x149441,a28)
% 32.24/32.05 [14945]~P1146(x149451,a27)+P1175(x149451,a39)
% 32.24/32.05 [14946]~P1146(x149461,a27)+P1175(x149461,a62)
% 32.24/32.05 [14947]~P1146(x149471,a27)+P1175(x149471,a50)
% 32.24/32.05 [14948]~P1146(x149481,a27)+P1175(x149481,a83)
% 32.24/32.05 [14949]~P1146(x149491,a27)+P1175(x149491,a61)
% 32.24/32.05 [14950]~P1146(x149501,a27)+P1175(x149501,a29)
% 32.24/32.05 [14951]~P1146(x149511,a27)+P1175(x149511,a30)
% 32.24/32.05 [14952]~P1146(x149521,a27)+P1175(x149521,a91)
% 32.24/32.05 [14953]~P1146(x149531,a27)+P1175(x149531,a92)
% 32.24/32.05 [14954]~P1146(x149541,a27)+P1175(x149541,a31)
% 32.24/32.05 [14955]~P1146(x149551,a27)+P1175(x149551,a32)
% 32.24/32.05 [14956]~P1146(x149561,a27)+P1175(x149561,a33)
% 32.24/32.05 [14957]~P1146(x149571,a27)+P1175(x149571,a34)
% 32.24/32.05 [14958]~P1146(x149581,a27)+P1175(x149581,a35)
% 32.24/32.05 [14959]~P1146(x149591,a27)+P1175(x149591,a36)
% 32.24/32.05 [14960]~P1146(x149601,a27)+P1175(x149601,a37)
% 32.24/32.05 [14961]~P1146(x149611,a27)+P1175(x149611,a38)
% 32.24/32.05 [14962]~P1146(x149621,a27)+P1175(x149621,a40)
% 32.24/32.05 [14963]~P1146(x149631,a27)+P1175(x149631,a41)
% 32.24/32.05 [14964]~P1146(x149641,a27)+P1175(x149641,a42)
% 32.24/32.05 [14965]~P1146(x149651,a27)+P1175(x149651,a43)
% 32.24/32.05 [14966]~P1146(x149661,a27)+P1175(x149661,a44)
% 32.24/32.05 [14967]~P1146(x149671,a27)+P1175(x149671,a45)
% 32.24/32.05 [14968]~P1146(x149681,a27)+P1175(x149681,a46)
% 32.24/32.05 [14969]~P1146(x149691,a27)+P1175(x149691,a47)
% 32.24/32.05 [14970]~P1146(x149701,a27)+P1175(x149701,a48)
% 32.24/32.05 [14971]~P1146(x149711,a27)+P1175(x149711,a49)
% 32.24/32.05 [14972]~P1146(x149721,a27)+P1175(x149721,a51)
% 32.24/32.05 [14973]~P1146(x149731,a27)+P1175(x149731,a52)
% 32.24/32.05 [14974]~P1146(x149741,a27)+P1175(x149741,a53)
% 32.24/32.05 [14975]~P1146(x149751,a27)+P1175(x149751,a54)
% 32.24/32.05 [14976]~P1146(x149761,a27)+P1175(x149761,a55)
% 32.24/32.05 [14977]~P1146(x149771,a27)+P1175(x149771,a56)
% 32.24/32.05 [14978]~P1146(x149781,a27)+P1175(x149781,a57)
% 32.24/32.05 [14979]~P1146(x149791,a27)+P1175(x149791,a58)
% 32.24/32.05 [14980]~P1170(x149801,a27)+P1169(x149801,a27)
% 32.24/32.05 [14981]~P1170(x149811,a26)+P1169(x149811,a26)
% 32.24/32.05 [14982]~P1170(x149821,a28)+P1169(x149821,a28)
% 32.24/32.05 [14983]~P1170(x149831,a39)+P1169(x149831,a39)
% 32.24/32.05 [14984]~P1170(x149841,a62)+P1169(x149841,a62)
% 32.24/32.05 [14985]~P1170(x149851,a50)+P1169(x149851,a50)
% 32.24/32.05 [14986]~P1170(x149861,a83)+P1169(x149861,a83)
% 32.24/32.05 [14987]~P1170(x149871,a61)+P1169(x149871,a61)
% 32.24/32.05 [14988]~P1170(x149881,a29)+P1169(x149881,a29)
% 32.24/32.05 [14989]~P1170(x149891,a30)+P1169(x149891,a30)
% 32.24/32.05 [14990]~P1170(x149901,a91)+P1169(x149901,a91)
% 32.24/32.05 [14991]~P1170(x149911,a92)+P1169(x149911,a92)
% 32.24/32.05 [14992]~P1170(x149921,a31)+P1169(x149921,a31)
% 32.24/32.05 [14993]~P1170(x149931,a32)+P1169(x149931,a32)
% 32.24/32.05 [14994]~P1170(x149941,a33)+P1169(x149941,a33)
% 32.24/32.05 [14995]~P1170(x149951,a34)+P1169(x149951,a34)
% 32.24/32.05 [14996]~P1170(x149961,a35)+P1169(x149961,a35)
% 32.24/32.05 [14997]~P1170(x149971,a36)+P1169(x149971,a36)
% 32.24/32.05 [14998]~P1170(x149981,a37)+P1169(x149981,a37)
% 32.24/32.05 [14999]~P1170(x149991,a38)+P1169(x149991,a38)
% 32.24/32.05 [15000]~P1170(x150001,a40)+P1169(x150001,a40)
% 32.24/32.05 [15001]~P1170(x150011,a41)+P1169(x150011,a41)
% 32.24/32.05 [15002]~P1170(x150021,a42)+P1169(x150021,a42)
% 32.24/32.05 [15003]~P1170(x150031,a43)+P1169(x150031,a43)
% 32.24/32.05 [15004]~P1170(x150041,a44)+P1169(x150041,a44)
% 32.24/32.05 [15005]~P1170(x150051,a45)+P1169(x150051,a45)
% 32.24/32.05 [15006]~P1170(x150061,a46)+P1169(x150061,a46)
% 32.24/32.05 [15007]~P1170(x150071,a47)+P1169(x150071,a47)
% 32.24/32.05 [15008]~P1170(x150081,a48)+P1169(x150081,a48)
% 32.24/32.05 [15009]~P1170(x150091,a49)+P1169(x150091,a49)
% 32.24/32.05 [15010]~P1170(x150101,a51)+P1169(x150101,a51)
% 32.24/32.05 [15011]~P1170(x150111,a52)+P1169(x150111,a52)
% 32.24/32.05 [15012]~P1170(x150121,a53)+P1169(x150121,a53)
% 32.24/32.05 [15013]~P1170(x150131,a54)+P1169(x150131,a54)
% 32.24/32.05 [15014]~P1170(x150141,a55)+P1169(x150141,a55)
% 32.24/32.05 [15015]~P1170(x150151,a56)+P1169(x150151,a56)
% 32.24/32.05 [15016]~P1170(x150161,a57)+P1169(x150161,a57)
% 32.24/32.05 [15017]~P1170(x150171,a58)+P1169(x150171,a58)
% 32.24/32.05 [15018]~P1156(x150181,a26)+P1110(x150181,a27)
% 32.24/32.05 [15019]~P1156(x150191,a28)+P1110(x150191,a26)
% 32.24/32.05 [15020]~P1156(x150201,a39)+P1110(x150201,a28)
% 32.24/32.05 [15021]~P1156(x150211,a50)+P1110(x150211,a39)
% 32.24/32.05 [15022]~P1156(x150221,a61)+P1110(x150221,a62)
% 32.24/32.05 [15023]~P1156(x150231,a62)+P1110(x150231,a50)
% 32.24/32.05 [15024]~P1156(x150241,a92)+P1110(x150241,a83)
% 32.24/32.05 [15025]~P1156(x150251,a83)+P1110(x150251,a61)
% 32.24/32.05 [15026]~P1156(x150261,a30)+P1110(x150261,a29)
% 32.24/32.05 [15027]~P1156(x150271,a31)+P1110(x150271,a30)
% 32.24/32.05 [15028]~P1156(x150281,a29)+P1110(x150281,a91)
% 32.24/32.05 [15029]~P1156(x150291,a91)+P1110(x150291,a92)
% 32.24/32.05 [15030]~P1156(x150301,a32)+P1110(x150301,a31)
% 32.24/32.05 [15031]~P1156(x150311,a33)+P1110(x150311,a32)
% 32.24/32.05 [15032]~P1156(x150321,a34)+P1110(x150321,a33)
% 32.24/32.05 [15033]~P1156(x150331,a35)+P1110(x150331,a34)
% 32.24/32.05 [15034]~P1156(x150341,a36)+P1110(x150341,a35)
% 32.24/32.05 [15035]~P1156(x150351,a37)+P1110(x150351,a36)
% 32.24/32.05 [15036]~P1156(x150361,a38)+P1110(x150361,a37)
% 32.24/32.05 [15037]~P1156(x150371,a40)+P1110(x150371,a38)
% 32.24/32.05 [15038]~P1156(x150381,a41)+P1110(x150381,a40)
% 32.24/32.05 [15039]~P1156(x150391,a42)+P1110(x150391,a41)
% 32.24/32.05 [15040]~P1156(x150401,a43)+P1110(x150401,a42)
% 32.24/32.05 [15041]~P1156(x150411,a44)+P1110(x150411,a43)
% 32.24/32.05 [15042]~P1156(x150421,a45)+P1110(x150421,a44)
% 32.24/32.05 [15043]~P1156(x150431,a46)+P1110(x150431,a45)
% 32.24/32.05 [15044]~P1156(x150441,a47)+P1110(x150441,a46)
% 32.24/32.05 [15045]~P1156(x150451,a48)+P1110(x150451,a47)
% 32.24/32.05 [15046]~P1156(x150461,a49)+P1110(x150461,a48)
% 32.24/32.05 [15047]~P1156(x150471,a51)+P1110(x150471,a49)
% 32.24/32.05 [15048]~P1156(x150481,a52)+P1110(x150481,a51)
% 32.24/32.05 [15049]~P1156(x150491,a53)+P1110(x150491,a52)
% 32.24/32.05 [15050]~P1156(x150501,a54)+P1110(x150501,a53)
% 32.24/32.05 [15051]~P1156(x150511,a55)+P1110(x150511,a54)
% 32.24/32.05 [15052]~P1156(x150521,a56)+P1110(x150521,a55)
% 32.24/32.05 [15053]~P1156(x150531,a57)+P1110(x150531,a56)
% 32.24/32.05 [15054]~P1156(x150541,a58)+P1110(x150541,a57)
% 32.24/32.05 [15055]~P1156(x150551,a59)+P1110(x150551,a58)
% 32.24/32.05 [15056]~P1156(x150561,a60)+P1110(x150561,a59)
% 32.24/32.05 [15057]~P1146(x150571,a27)+P1165(x150571,a27)
% 32.24/32.05 [15058]~P1146(x150581,a27)+P1165(x150581,a26)
% 32.24/32.05 [15059]~P1146(x150591,a27)+P1165(x150591,a28)
% 32.24/32.05 [15060]~P1146(x150601,a27)+P1165(x150601,a39)
% 32.24/32.05 [15061]~P1146(x150611,a27)+P1165(x150611,a62)
% 32.24/32.05 [15062]~P1146(x150621,a27)+P1165(x150621,a50)
% 32.24/32.05 [15063]~P1146(x150631,a27)+P1165(x150631,a83)
% 32.24/32.05 [15064]~P1146(x150641,a27)+P1165(x150641,a61)
% 32.24/32.05 [15065]~P1146(x150651,a27)+P1165(x150651,a29)
% 32.24/32.05 [15066]~P1146(x150661,a27)+P1165(x150661,a30)
% 32.24/32.05 [15067]~P1146(x150671,a27)+P1165(x150671,a91)
% 32.24/32.05 [15068]~P1146(x150681,a27)+P1165(x150681,a92)
% 32.24/32.05 [15069]~P1146(x150691,a27)+P1165(x150691,a31)
% 32.24/32.05 [15070]~P1146(x150701,a27)+P1165(x150701,a32)
% 32.24/32.05 [15071]~P1146(x150711,a27)+P1165(x150711,a33)
% 32.24/32.05 [15072]~P1146(x150721,a27)+P1165(x150721,a34)
% 32.24/32.05 [15073]~P1146(x150731,a27)+P1165(x150731,a35)
% 32.24/32.05 [15074]~P1146(x150741,a27)+P1165(x150741,a36)
% 32.24/32.05 [15075]~P1146(x150751,a27)+P1165(x150751,a37)
% 32.24/32.05 [15076]~P1146(x150761,a27)+P1165(x150761,a38)
% 32.24/32.05 [15077]~P1146(x150771,a27)+P1165(x150771,a40)
% 32.24/32.05 [15078]~P1146(x150781,a27)+P1165(x150781,a41)
% 32.24/32.05 [15079]~P1146(x150791,a27)+P1165(x150791,a42)
% 32.24/32.05 [15080]~P1146(x150801,a27)+P1165(x150801,a43)
% 32.24/32.05 [15081]~P1146(x150811,a27)+P1165(x150811,a44)
% 32.24/32.05 [15082]~P1146(x150821,a27)+P1165(x150821,a45)
% 32.24/32.05 [15083]~P1146(x150831,a27)+P1165(x150831,a46)
% 32.24/32.05 [15084]~P1146(x150841,a27)+P1165(x150841,a47)
% 32.24/32.05 [15085]~P1146(x150851,a27)+P1165(x150851,a48)
% 32.24/32.05 [15086]~P1146(x150861,a27)+P1165(x150861,a49)
% 32.24/32.05 [15087]~P1146(x150871,a27)+P1165(x150871,a51)
% 32.24/32.05 [15088]~P1146(x150881,a27)+P1165(x150881,a52)
% 32.24/32.05 [15089]~P1146(x150891,a27)+P1165(x150891,a53)
% 32.24/32.05 [15090]~P1146(x150901,a27)+P1165(x150901,a54)
% 32.24/32.05 [15091]~P1146(x150911,a27)+P1165(x150911,a55)
% 32.24/32.05 [15092]~P1146(x150921,a27)+P1165(x150921,a56)
% 32.24/32.05 [15093]~P1146(x150931,a27)+P1165(x150931,a57)
% 32.24/32.05 [15094]~P1146(x150941,a27)+P1165(x150941,a58)
% 32.24/32.05 [15095]~P1146(x150951,a27)+P1165(x150951,a59)
% 32.24/32.05 [15096]~P1146(x150961,a27)+P1165(x150961,a60)
% 32.24/32.05 [15097]~P1156(x150971,a53)+P1147(x150971,a27)
% 32.24/32.05 [15098]~P1156(x150981,a54)+P1147(x150981,a26)
% 32.24/32.05 [15099]~P1156(x150991,a55)+P1147(x150991,a28)
% 32.24/32.05 [15100]~P1156(x151001,a56)+P1147(x151001,a39)
% 32.24/32.05 [15101]~P1156(x151011,a58)+P1147(x151011,a62)
% 32.24/32.05 [15102]~P1156(x151021,a57)+P1147(x151021,a50)
% 32.24/32.05 [15103]~P1156(x151031,a60)+P1147(x151031,a83)
% 32.24/32.05 [15104]~P1156(x151041,a59)+P1147(x151041,a61)
% 32.24/32.05 [15105]~P1103(x151051,a27)+P1045(x151051,a27)
% 32.24/32.05 [15106]~P1103(x151061,a26)+P1045(x151061,a26)
% 32.24/32.05 [15107]~P1045(x151071,a27)+P1103(x151071,a27)
% 32.24/32.05 [15108]~P1045(x151081,a26)+P1103(x151081,a26)
% 32.24/32.05 [15109]~P1064(x151091,a27)+P1046(x151091,a27)
% 32.24/32.05 [15110]~P1064(x151101,a26)+P1046(x151101,a26)
% 32.24/32.05 [15111]~P1046(x151111,a27)+P1055(x151111,a26)
% 32.24/32.05 [15112]~P1055(x151121,a27)+P1055(x151121,a26)
% 32.24/32.05 [15113]~P1046(x151131,a27)+P1064(x151131,a27)
% 32.24/32.05 [15114]~P1046(x151141,a26)+P1064(x151141,a26)
% 32.24/32.05 [15115]~P2446(x151151,a87)+P2445(x151151,a27)
% 32.24/32.05 [15116]~P2446(x151161,a90)+P2445(x151161,a26)
% 32.24/32.05 [15117]~P2446(x151171,a89)+P2445(x151171,a28)
% 32.24/32.05 [15118]~P2446(x151181,a88)+P2445(x151181,a39)
% 32.24/32.05 [15119]~P292(x151191,a39)+P2445(x151191,a39)
% 32.24/32.05 [15120]~P839(x151201,a27)+P873(x151201,a27)
% 32.24/32.05 [15121]~P2445(x151211,a27)+P2446(x151211,a87)
% 32.24/32.05 [15122]~P2445(x151221,a39)+P2446(x151221,a88)
% 32.24/32.05 [15123]~P2445(x151231,a28)+P2446(x151231,a89)
% 32.24/32.05 [15124]~P2445(x151241,a26)+P2446(x151241,a90)
% 32.24/32.05 [15125]~P902(x151251,a30)+P757(x151251,a29)
% 32.24/32.05 [15126]~P2549(x151261,a26)+P2548(x151261,a26)
% 32.24/32.05 [15127]~P2548(x151271,a26)+P2549(x151271,a26)
% 32.24/32.05 [15128]~P2550(x151281,a36)+P2549(x151281,a26)
% 32.24/32.05 [15129]~P2551(x151291,a27)+P2550(x151291,a27)
% 32.24/32.05 [15130]~P277(x151301,a27)+P2550(x151301,a27)
% 32.24/32.05 [15131]~P2551(x151311,a34)+P2550(x151311,a34)
% 32.24/32.05 [15132]~P277(x151321,a34)+P2550(x151321,a34)
% 32.24/32.05 [15133]~P2549(x151331,a26)+P2550(x151331,a36)
% 32.24/32.05 [15134]~P2551(x151341,a36)+P2550(x151341,a36)
% 32.24/32.05 [15135]~P2550(x151351,a27)+P2551(x151351,a27)
% 32.24/32.05 [15136]~P168(x151361,a27)+P2551(x151361,a27)
% 32.24/32.05 [15137]~P2550(x151371,a34)+P2551(x151371,a34)
% 32.24/32.05 [15138]~P168(x151381,a34)+P2551(x151381,a34)
% 32.24/32.05 [15139]~P2550(x151391,a36)+P2551(x151391,a36)
% 32.24/32.05 [15140]~P168(x151401,a36)+P2551(x151401,a36)
% 32.24/32.05 [15141]~P2551(x151411,a27)+P168(x151411,a27)
% 32.24/32.05 [15142]~P2551(x151421,a34)+P168(x151421,a34)
% 32.24/32.05 [15143]~P2551(x151431,a36)+P168(x151431,a36)
% 32.24/32.05 [15144]~P902(x151441,a26)+P709(x151441,a27)
% 32.24/32.05 [15145]~P473(x151451,a27)+P182(x151451,a26)
% 32.24/32.05 [15146]~P484(x151461,a26)+P182(x151461,a28)
% 32.24/32.05 [15147]~P446(x151471,a28)+P182(x151471,a39)
% 32.24/32.05 [15148]~P460(x151481,a39)+P182(x151481,a50)
% 32.24/32.05 [15149]~P182(x151491,a28)+P484(x151491,a26)
% 32.24/32.05 [15150]~P182(x151501,a26)+P473(x151501,a27)
% 32.24/32.05 [15151]~P182(x151511,a50)+P460(x151511,a39)
% 32.24/32.05 [15152]~P182(x151521,a39)+P446(x151521,a28)
% 32.24/32.05 [15153]~P2093(x151531,a50)+P419(x151531,a27)
% 32.24/32.05 [15154]~P902(x151541,a91)+P389(x151541,a92)
% 32.24/32.05 [15155]~P902(x151551,a92)+P375(x151551,a83)
% 32.24/32.05 [15156]~P902(x151561,a61)+P356(x151561,a62)
% 32.24/32.05 [15157]~P902(x151571,a62)+P353(x151571,a50)
% 32.24/32.05 [15158]~P902(x151581,a50)+P345(x151581,a39)
% 32.24/32.05 [15159]~P902(x151591,a39)+P342(x151591,a28)
% 32.24/32.05 [15160]~P902(x151601,a28)+P333(x151601,a26)
% 32.24/32.05 [15161]~P2445(x151611,a39)+P292(x151611,a39)
% 32.24/32.05 [15162]~P277(x151621,a27)+P283(x151621,a27)
% 32.24/32.05 [15163]~P2550(x151631,a27)+P277(x151631,a27)
% 32.24/32.05 [15164]~P283(x151641,a27)+P277(x151641,a27)
% 32.24/32.05 [15165]~P2550(x151651,a34)+P277(x151651,a34)
% 32.24/32.05 [15166]~P196(x151661,a62)+P197(x151661,a83)
% 32.24/32.05 [15167]~P196(x151671,a62)+P197(x151671,a61)
% 32.24/32.05 [15168]~P196(x151681,a62)+P197(x151681,a29)
% 32.24/32.05 [15169]~P196(x151691,a62)+P197(x151691,a30)
% 32.24/32.05 [15170]~P196(x151701,a62)+P197(x151701,a91)
% 32.24/32.05 [15171]~P196(x151711,a62)+P197(x151711,a92)
% 32.24/32.05 [15172]~P196(x151721,a62)+P197(x151721,a31)
% 32.24/32.05 [15173]~P196(x151731,a62)+P197(x151731,a32)
% 32.24/32.05 [15174]~P196(x151741,a62)+P197(x151741,a33)
% 32.24/32.05 [15175]~P196(x151751,a62)+P197(x151751,a34)
% 32.24/32.05 [15176]~P196(x151761,a62)+P197(x151761,a35)
% 32.24/32.05 [15177]~P196(x151771,a62)+P197(x151771,a36)
% 32.24/32.05 [15178]~P196(x151781,a62)+P197(x151781,a37)
% 32.24/32.05 [15179]~P196(x151791,a62)+P197(x151791,a38)
% 32.24/32.05 [15180]~P196(x151801,a62)+P197(x151801,a40)
% 32.24/32.05 [15181]~P196(x151811,a62)+P197(x151811,a41)
% 32.24/32.05 [15182]~P196(x151821,a62)+P197(x151821,a42)
% 32.24/32.05 [15183]~P196(x151831,a62)+P197(x151831,a43)
% 32.24/32.05 [15184]~P196(x151841,a62)+P197(x151841,a44)
% 32.24/32.05 [15185]~P196(x151851,a62)+P197(x151851,a45)
% 32.24/32.05 [15186]~P196(x151861,a62)+P197(x151861,a46)
% 32.24/32.05 [15187]~P196(x151871,a62)+P197(x151871,a47)
% 32.24/32.05 [15188]~P196(x151881,a62)+P197(x151881,a48)
% 32.24/32.05 [15189]~P196(x151891,a62)+P197(x151891,a49)
% 32.24/32.05 [15190]~P196(x151901,a62)+P197(x151901,a51)
% 32.24/32.05 [15191]~P196(x151911,a62)+P197(x151911,a52)
% 32.24/32.05 [15192]~P197(x151921,a83)+P196(x151921,a62)
% 32.24/32.05 [15193]~P197(x151931,a61)+P196(x151931,a62)
% 32.24/32.05 [15194]~P197(x151941,a29)+P196(x151941,a62)
% 32.24/32.05 [15195]~P197(x151951,a30)+P196(x151951,a62)
% 32.24/32.05 [15196]~P197(x151961,a91)+P196(x151961,a62)
% 32.24/32.05 [15197]~P197(x151971,a92)+P196(x151971,a62)
% 32.24/32.05 [15198]~P197(x151981,a31)+P196(x151981,a62)
% 32.24/32.05 [15199]~P197(x151991,a32)+P196(x151991,a62)
% 32.24/32.05 [15200]~P197(x152001,a33)+P196(x152001,a62)
% 32.24/32.05 [15201]~P197(x152011,a34)+P196(x152011,a62)
% 32.24/32.05 [15202]~P197(x152021,a35)+P196(x152021,a62)
% 32.24/32.05 [15203]~P197(x152031,a36)+P196(x152031,a62)
% 32.24/32.05 [15204]~P197(x152041,a37)+P196(x152041,a62)
% 32.24/32.05 [15205]~P197(x152051,a38)+P196(x152051,a62)
% 32.24/32.05 [15206]~P197(x152061,a40)+P196(x152061,a62)
% 32.24/32.05 [15207]~P197(x152071,a41)+P196(x152071,a62)
% 32.24/32.05 [15208]~P197(x152081,a42)+P196(x152081,a62)
% 32.24/32.05 [15209]~P197(x152091,a43)+P196(x152091,a62)
% 32.24/32.05 [15210]~P197(x152101,a44)+P196(x152101,a62)
% 32.24/32.05 [15211]~P197(x152111,a45)+P196(x152111,a62)
% 32.24/32.05 [15212]~P197(x152121,a46)+P196(x152121,a62)
% 32.24/32.05 [15213]~P197(x152131,a47)+P196(x152131,a62)
% 32.24/32.05 [15214]~P197(x152141,a48)+P196(x152141,a62)
% 32.24/32.05 [15215]~P197(x152151,a49)+P196(x152151,a62)
% 32.24/32.05 [15216]~P197(x152161,a51)+P196(x152161,a62)
% 32.24/32.05 [15217]~P197(x152171,a52)+P196(x152171,a62)
% 32.24/32.05 [15218]~P2558(x152181,a27)+P2557(x152181,a35)
% 32.24/32.05 [15219]~P2558(x152191,a26)+P2557(x152191,a36)
% 32.24/32.05 [15220]~P2557(x152201,a35)+P2558(x152201,a27)
% 32.24/32.05 [15221]~P2557(x152211,a36)+P2558(x152211,a26)
% 32.24/32.05 [15222]~P2527(x152221,a26)+P2539(x152221,a27)
% 32.24/32.05 [15223]~P2527(x152231,a28)+P2539(x152231,a26)
% 32.24/32.05 [15224]~P2517(x152241,a26)+P2530(x152241,a27)
% 32.24/32.05 [15225]~P2517(x152251,a28)+P2530(x152251,a26)
% 32.24/32.05 [15226]~P2462(x152261,a27)+P2453(x152261,a30)
% 32.24/32.05 [15227]~P2462(x152271,a26)+P2453(x152271,a31)
% 32.24/32.05 [15228]~P2462(x152281,a28)+P2453(x152281,a32)
% 32.24/32.05 [15229]~P2462(x152291,a39)+P2453(x152291,a33)
% 32.24/32.05 [15230]~P2462(x152301,a50)+P2453(x152301,a34)
% 32.24/32.05 [15231]~P2462(x152311,a62)+P2453(x152311,a35)
% 32.24/32.05 [15232]~P2462(x152321,a61)+P2453(x152321,a36)
% 32.24/32.05 [15233]~P2462(x152331,a83)+P2453(x152331,a37)
% 32.24/32.05 [15234]~P2462(x152341,a92)+P2453(x152341,a38)
% 32.24/32.05 [15235]~P2462(x152351,a91)+P2453(x152351,a40)
% 32.24/32.05 [15236]~P2462(x152361,a29)+P2453(x152361,a41)
% 32.24/32.05 [15237]~P2462(x152371,a30)+P2453(x152371,a42)
% 32.24/32.05 [15238]~P2462(x152381,a31)+P2453(x152381,a43)
% 32.24/32.05 [15239]~P2462(x152391,a32)+P2453(x152391,a44)
% 32.24/32.05 [15240]~P2462(x152401,a33)+P2453(x152401,a45)
% 32.24/32.05 [15241]~P2462(x152411,a34)+P2453(x152411,a46)
% 32.24/32.05 [15242]~P2454(x152421,a27)+P2453(x152421,a47)
% 32.24/32.05 [15243]~P2454(x152431,a26)+P2453(x152431,a48)
% 32.24/32.05 [15244]~P2454(x152441,a28)+P2453(x152441,a49)
% 32.24/32.05 [15245]~P2454(x152451,a39)+P2453(x152451,a51)
% 32.24/32.05 [15246]~P2454(x152461,a50)+P2453(x152461,a52)
% 32.24/32.05 [15247]~P2454(x152471,a62)+P2453(x152471,a53)
% 32.24/32.05 [15248]~P2454(x152481,a61)+P2453(x152481,a54)
% 32.24/32.05 [15249]~P2454(x152491,a83)+P2453(x152491,a55)
% 32.24/32.05 [15250]~P2454(x152501,a92)+P2453(x152501,a56)
% 32.24/32.05 [15251]~P2454(x152511,a91)+P2453(x152511,a57)
% 32.24/32.05 [15252]~P2454(x152521,a29)+P2453(x152521,a58)
% 32.24/32.05 [15253]~P2454(x152531,a30)+P2453(x152531,a59)
% 32.24/32.05 [15254]~P2454(x152541,a31)+P2453(x152541,a60)
% 32.24/32.05 [15255]~P2454(x152551,a46)+P2453(x152551,a73)
% 32.24/32.05 [15256]~P2454(x152561,a32)+P2453(x152561,a63)
% 32.24/32.05 [15257]~P2454(x152571,a33)+P2453(x152571,a64)
% 32.24/32.05 [15258]~P2454(x152581,a34)+P2453(x152581,a65)
% 32.24/32.05 [15259]~P2454(x152591,a35)+P2453(x152591,a66)
% 32.24/32.05 [15260]~P2454(x152601,a36)+P2453(x152601,a67)
% 32.24/32.05 [15261]~P2454(x152611,a37)+P2453(x152611,a68)
% 32.24/32.05 [15262]~P2454(x152621,a38)+P2453(x152621,a69)
% 32.24/32.05 [15263]~P2454(x152631,a40)+P2453(x152631,a70)
% 32.24/32.05 [15264]~P2454(x152641,a41)+P2453(x152641,a71)
% 32.24/32.05 [15265]~P2454(x152651,a42)+P2453(x152651,a72)
% 32.24/32.05 [15266]~P2454(x152661,a43)+P2453(x152661,a74)
% 32.24/32.05 [15267]~P2454(x152671,a44)+P2453(x152671,a75)
% 32.24/32.05 [15268]~P2454(x152681,a45)+P2453(x152681,a76)
% 32.24/32.05 [15269]~P2454(x152691,a47)+P2453(x152691,a77)
% 32.24/32.05 [15270]~P2454(x152701,a48)+P2453(x152701,a78)
% 32.24/32.05 [15271]~P2454(x152711,a49)+P2453(x152711,a79)
% 32.24/32.05 [15272]~P2454(x152721,a51)+P2453(x152721,a80)
% 32.24/32.05 [15273]~P2454(x152731,a52)+P2453(x152731,a81)
% 32.24/32.05 [15274]~P2454(x152741,a53)+P2453(x152741,a82)
% 32.24/32.05 [15275]~P2454(x152751,a54)+P2453(x152751,a84)
% 32.24/32.05 [15276]~P2454(x152761,a55)+P2453(x152761,a85)
% 32.24/32.05 [15277]~P2454(x152771,a56)+P2453(x152771,a86)
% 32.24/32.05 [15278]~P2455(x152781,a27)+P2453(x152781,a87)
% 32.24/32.05 [15279]~P2455(x152791,a39)+P2453(x152791,a88)
% 32.24/32.05 [15280]~P2455(x152801,a28)+P2453(x152801,a89)
% 32.24/32.05 [15281]~P2455(x152811,a26)+P2453(x152811,a90)
% 32.24/32.05 [15282]~P2453(x152821,a30)+P2462(x152821,a27)
% 32.24/32.05 [15283]~P2453(x152831,a31)+P2462(x152831,a26)
% 32.24/32.05 [15284]~P2453(x152841,a32)+P2462(x152841,a28)
% 32.24/32.05 [15285]~P2453(x152851,a33)+P2462(x152851,a39)
% 32.24/32.05 [15286]~P2453(x152861,a35)+P2462(x152861,a62)
% 32.24/32.05 [15287]~P2453(x152871,a34)+P2462(x152871,a50)
% 32.24/32.05 [15288]~P2453(x152881,a37)+P2462(x152881,a83)
% 32.24/32.05 [15289]~P2453(x152891,a36)+P2462(x152891,a61)
% 32.24/32.05 [15290]~P2453(x152901,a41)+P2462(x152901,a29)
% 32.24/32.05 [15291]~P2453(x152911,a42)+P2462(x152911,a30)
% 32.24/32.05 [15292]~P2453(x152921,a40)+P2462(x152921,a91)
% 32.24/32.05 [15293]~P2453(x152931,a38)+P2462(x152931,a92)
% 32.24/32.05 [15294]~P2453(x152941,a43)+P2462(x152941,a31)
% 32.24/32.05 [15295]~P2453(x152951,a44)+P2462(x152951,a32)
% 32.24/32.05 [15296]~P2453(x152961,a45)+P2462(x152961,a33)
% 32.24/32.05 [15297]~P2453(x152971,a46)+P2462(x152971,a34)
% 32.24/32.05 [15298]~P2453(x152981,a47)+P2454(x152981,a27)
% 32.24/32.05 [15299]~P2453(x152991,a48)+P2454(x152991,a26)
% 32.24/32.05 [15300]~P2453(x153001,a49)+P2454(x153001,a28)
% 32.24/32.05 [15301]~P2453(x153011,a51)+P2454(x153011,a39)
% 32.24/32.05 [15302]~P2453(x153021,a53)+P2454(x153021,a62)
% 32.24/32.05 [15303]~P2453(x153031,a52)+P2454(x153031,a50)
% 32.24/32.05 [15304]~P2453(x153041,a55)+P2454(x153041,a83)
% 32.24/32.05 [15305]~P2453(x153051,a54)+P2454(x153051,a61)
% 32.24/32.05 [15306]~P2453(x153061,a58)+P2454(x153061,a29)
% 32.24/32.05 [15307]~P2453(x153071,a59)+P2454(x153071,a30)
% 32.24/32.05 [15308]~P2453(x153081,a57)+P2454(x153081,a91)
% 32.24/32.05 [15309]~P2453(x153091,a56)+P2454(x153091,a92)
% 32.24/32.05 [15310]~P2453(x153101,a60)+P2454(x153101,a31)
% 32.24/32.05 [15311]~P2453(x153111,a63)+P2454(x153111,a32)
% 32.24/32.05 [15312]~P2453(x153121,a64)+P2454(x153121,a33)
% 32.24/32.05 [15313]~P2453(x153131,a65)+P2454(x153131,a34)
% 32.24/32.05 [15314]~P2453(x153141,a66)+P2454(x153141,a35)
% 32.24/32.05 [15315]~P2453(x153151,a67)+P2454(x153151,a36)
% 32.24/32.05 [15316]~P2453(x153161,a68)+P2454(x153161,a37)
% 32.24/32.05 [15317]~P2453(x153171,a69)+P2454(x153171,a38)
% 32.24/32.05 [15318]~P2453(x153181,a70)+P2454(x153181,a40)
% 32.24/32.05 [15319]~P2453(x153191,a71)+P2454(x153191,a41)
% 32.24/32.05 [15320]~P2453(x153201,a72)+P2454(x153201,a42)
% 32.24/32.05 [15321]~P2453(x153211,a74)+P2454(x153211,a43)
% 32.24/32.05 [15322]~P2453(x153221,a75)+P2454(x153221,a44)
% 32.24/32.05 [15323]~P2453(x153231,a76)+P2454(x153231,a45)
% 32.24/32.05 [15324]~P2453(x153241,a73)+P2454(x153241,a46)
% 32.24/32.05 [15325]~P2453(x153251,a77)+P2454(x153251,a47)
% 32.24/32.05 [15326]~P2453(x153261,a78)+P2454(x153261,a48)
% 32.24/32.05 [15327]~P2453(x153271,a79)+P2454(x153271,a49)
% 32.24/32.05 [15328]~P2453(x153281,a80)+P2454(x153281,a51)
% 32.24/32.05 [15329]~P2453(x153291,a81)+P2454(x153291,a52)
% 32.24/32.05 [15330]~P2453(x153301,a82)+P2454(x153301,a53)
% 32.24/32.05 [15331]~P2453(x153311,a84)+P2454(x153311,a54)
% 32.24/32.05 [15332]~P2453(x153321,a85)+P2454(x153321,a55)
% 32.24/32.05 [15333]~P2453(x153331,a86)+P2454(x153331,a56)
% 32.24/32.05 [15334]~P2453(x153341,a87)+P2455(x153341,a27)
% 32.24/32.05 [15335]~P2453(x153351,a90)+P2455(x153351,a26)
% 32.24/32.05 [15336]~P2453(x153361,a89)+P2455(x153361,a28)
% 32.24/32.05 [15337]~P2453(x153371,a88)+P2455(x153371,a39)
% 32.24/32.05 [15338]~P2313(x153381,a62)+P2314(x153381,a83)
% 32.24/32.05 [15339]~P2313(x153391,a62)+P2314(x153391,a61)
% 32.24/32.05 [15340]~P2313(x153401,a62)+P2314(x153401,a29)
% 32.24/32.05 [15341]~P2313(x153411,a62)+P2314(x153411,a30)
% 32.24/32.05 [15342]~P2313(x153421,a62)+P2314(x153421,a91)
% 32.24/32.05 [15343]~P2313(x153431,a62)+P2314(x153431,a92)
% 32.24/32.05 [15344]~P2313(x153441,a62)+P2314(x153441,a31)
% 32.24/32.05 [15345]~P2313(x153451,a62)+P2314(x153451,a32)
% 32.24/32.05 [15346]~P2313(x153461,a62)+P2314(x153461,a33)
% 32.24/32.05 [15347]~P2313(x153471,a62)+P2314(x153471,a34)
% 32.24/32.05 [15348]~P2313(x153481,a62)+P2314(x153481,a35)
% 32.24/32.05 [15349]~P2313(x153491,a62)+P2314(x153491,a36)
% 32.24/32.05 [15350]~P2313(x153501,a62)+P2314(x153501,a37)
% 32.24/32.05 [15351]~P2313(x153511,a62)+P2314(x153511,a38)
% 32.24/32.05 [15352]~P2313(x153521,a62)+P2314(x153521,a40)
% 32.24/32.05 [15353]~P2313(x153531,a62)+P2314(x153531,a41)
% 32.24/32.05 [15354]~P2313(x153541,a62)+P2314(x153541,a42)
% 32.24/32.05 [15355]~P2313(x153551,a62)+P2314(x153551,a43)
% 32.24/32.05 [15356]~P2313(x153561,a62)+P2314(x153561,a44)
% 32.24/32.05 [15357]~P2313(x153571,a62)+P2314(x153571,a45)
% 32.24/32.05 [15358]~P2313(x153581,a62)+P2314(x153581,a46)
% 32.24/32.05 [15359]~P2313(x153591,a62)+P2314(x153591,a47)
% 32.24/32.05 [15360]~P2313(x153601,a62)+P2314(x153601,a48)
% 32.24/32.05 [15361]~P2313(x153611,a62)+P2314(x153611,a49)
% 32.24/32.05 [15362]~P2313(x153621,a62)+P2314(x153621,a51)
% 32.24/32.05 [15363]~P2313(x153631,a62)+P2314(x153631,a52)
% 32.24/32.05 [15364]~P2314(x153641,a83)+P2313(x153641,a62)
% 32.24/32.05 [15365]~P2314(x153651,a61)+P2313(x153651,a62)
% 32.24/32.05 [15366]~P2314(x153661,a29)+P2313(x153661,a62)
% 32.24/32.05 [15367]~P2314(x153671,a30)+P2313(x153671,a62)
% 32.24/32.05 [15368]~P2314(x153681,a91)+P2313(x153681,a62)
% 32.24/32.05 [15369]~P2314(x153691,a92)+P2313(x153691,a62)
% 32.24/32.05 [15370]~P2314(x153701,a31)+P2313(x153701,a62)
% 32.24/32.05 [15371]~P2314(x153711,a32)+P2313(x153711,a62)
% 32.24/32.05 [15372]~P2314(x153721,a33)+P2313(x153721,a62)
% 32.24/32.05 [15373]~P2314(x153731,a34)+P2313(x153731,a62)
% 32.24/32.05 [15374]~P2314(x153741,a35)+P2313(x153741,a62)
% 32.24/32.05 [15375]~P2314(x153751,a36)+P2313(x153751,a62)
% 32.24/32.05 [15376]~P2314(x153761,a37)+P2313(x153761,a62)
% 32.24/32.05 [15377]~P2314(x153771,a38)+P2313(x153771,a62)
% 32.24/32.05 [15378]~P2314(x153781,a40)+P2313(x153781,a62)
% 32.24/32.05 [15379]~P2314(x153791,a41)+P2313(x153791,a62)
% 32.24/32.05 [15380]~P2314(x153801,a42)+P2313(x153801,a62)
% 32.24/32.05 [15381]~P2314(x153811,a43)+P2313(x153811,a62)
% 32.24/32.05 [15382]~P2314(x153821,a44)+P2313(x153821,a62)
% 32.24/32.05 [15383]~P2314(x153831,a45)+P2313(x153831,a62)
% 32.24/32.05 [15384]~P2314(x153841,a46)+P2313(x153841,a62)
% 32.24/32.05 [15385]~P2314(x153851,a47)+P2313(x153851,a62)
% 32.24/32.05 [15386]~P2314(x153861,a48)+P2313(x153861,a62)
% 32.24/32.05 [15387]~P2314(x153871,a49)+P2313(x153871,a62)
% 32.24/32.05 [15388]~P2314(x153881,a51)+P2313(x153881,a62)
% 32.24/32.05 [15389]~P2314(x153891,a52)+P2313(x153891,a62)
% 32.24/32.05 [15390]~P2199(x153901,a62)+P2200(x153901,a83)
% 32.24/32.05 [15391]~P2199(x153911,a62)+P2200(x153911,a61)
% 32.24/32.05 [15392]~P2199(x153921,a62)+P2200(x153921,a29)
% 32.24/32.05 [15393]~P2199(x153931,a62)+P2200(x153931,a30)
% 32.24/32.05 [15394]~P2199(x153941,a62)+P2200(x153941,a91)
% 32.24/32.05 [15395]~P2199(x153951,a62)+P2200(x153951,a92)
% 32.24/32.05 [15396]~P2199(x153961,a62)+P2200(x153961,a31)
% 32.24/32.05 [15397]~P2199(x153971,a62)+P2200(x153971,a32)
% 32.24/32.05 [15398]~P2199(x153981,a62)+P2200(x153981,a33)
% 32.24/32.05 [15399]~P2199(x153991,a62)+P2200(x153991,a34)
% 32.24/32.05 [15400]~P2199(x154001,a62)+P2200(x154001,a35)
% 32.24/32.05 [15401]~P2199(x154011,a62)+P2200(x154011,a36)
% 32.24/32.05 [15402]~P2199(x154021,a62)+P2200(x154021,a37)
% 32.24/32.05 [15403]~P2199(x154031,a62)+P2200(x154031,a38)
% 32.24/32.05 [15404]~P2199(x154041,a62)+P2200(x154041,a40)
% 32.24/32.05 [15405]~P2199(x154051,a62)+P2200(x154051,a41)
% 32.24/32.05 [15406]~P2199(x154061,a62)+P2200(x154061,a42)
% 32.24/32.05 [15407]~P2199(x154071,a62)+P2200(x154071,a43)
% 32.24/32.05 [15408]~P2199(x154081,a62)+P2200(x154081,a44)
% 32.24/32.05 [15409]~P2199(x154091,a62)+P2200(x154091,a45)
% 32.24/32.05 [15410]~P2199(x154101,a62)+P2200(x154101,a46)
% 32.24/32.05 [15411]~P2199(x154111,a62)+P2200(x154111,a47)
% 32.24/32.05 [15412]~P2199(x154121,a62)+P2200(x154121,a48)
% 32.24/32.05 [15413]~P2199(x154131,a62)+P2200(x154131,a49)
% 32.24/32.05 [15414]~P2199(x154141,a62)+P2200(x154141,a51)
% 32.24/32.05 [15415]~P2199(x154151,a62)+P2200(x154151,a52)
% 32.24/32.05 [15416]~P2200(x154161,a83)+P2199(x154161,a62)
% 32.24/32.05 [15417]~P2200(x154171,a61)+P2199(x154171,a62)
% 32.24/32.05 [15418]~P2200(x154181,a29)+P2199(x154181,a62)
% 32.24/32.05 [15419]~P2200(x154191,a30)+P2199(x154191,a62)
% 32.24/32.05 [15420]~P2200(x154201,a91)+P2199(x154201,a62)
% 32.24/32.05 [15421]~P2200(x154211,a92)+P2199(x154211,a62)
% 32.24/32.05 [15422]~P2200(x154221,a31)+P2199(x154221,a62)
% 32.24/32.05 [15423]~P2200(x154231,a32)+P2199(x154231,a62)
% 32.24/32.05 [15424]~P2200(x154241,a33)+P2199(x154241,a62)
% 32.24/32.05 [15425]~P2200(x154251,a34)+P2199(x154251,a62)
% 32.24/32.05 [15426]~P2200(x154261,a35)+P2199(x154261,a62)
% 32.24/32.05 [15427]~P2200(x154271,a36)+P2199(x154271,a62)
% 32.24/32.05 [15428]~P2200(x154281,a37)+P2199(x154281,a62)
% 32.24/32.05 [15429]~P2200(x154291,a38)+P2199(x154291,a62)
% 32.24/32.05 [15430]~P2200(x154301,a40)+P2199(x154301,a62)
% 32.24/32.05 [15431]~P2200(x154311,a41)+P2199(x154311,a62)
% 32.24/32.05 [15432]~P2200(x154321,a42)+P2199(x154321,a62)
% 32.24/32.05 [15433]~P2200(x154331,a43)+P2199(x154331,a62)
% 32.24/32.05 [15434]~P2200(x154341,a44)+P2199(x154341,a62)
% 32.24/32.05 [15435]~P2200(x154351,a45)+P2199(x154351,a62)
% 32.24/32.05 [15436]~P2200(x154361,a46)+P2199(x154361,a62)
% 32.24/32.05 [15437]~P2200(x154371,a47)+P2199(x154371,a62)
% 32.24/32.05 [15438]~P2200(x154381,a48)+P2199(x154381,a62)
% 32.24/32.05 [15439]~P2200(x154391,a49)+P2199(x154391,a62)
% 32.24/32.05 [15440]~P2200(x154401,a51)+P2199(x154401,a62)
% 32.24/32.05 [15441]~P2200(x154411,a52)+P2199(x154411,a62)
% 32.24/32.05 [15442]~P2100(x154421,a92)+P2082(x154421,a92)
% 32.24/32.05 [15443]~P2082(x154431,a92)+P2100(x154431,a92)
% 32.24/32.05 [15444]~P2119(x154441,a92)+P2100(x154441,a92)
% 32.24/32.05 [15445]~P2100(x154451,a92)+P2119(x154451,a92)
% 32.24/32.05 [15446]~P2130(x154461,a92)+P2119(x154461,a92)
% 32.24/32.05 [15447]~P2119(x154471,a92)+P2130(x154471,a92)
% 32.24/32.05 [15448]~P1041(x154481,a50)+P1034(x154481,a62)
% 32.24/32.05 [15449]~P1041(x154491,a50)+P1034(x154491,a83)
% 32.24/32.05 [15450]~P1041(x154501,a50)+P1034(x154501,a61)
% 32.24/32.05 [15451]~P1041(x154511,a50)+P1034(x154511,a29)
% 32.24/32.05 [15452]~P1041(x154521,a50)+P1034(x154521,a30)
% 32.24/32.05 [15453]~P1041(x154531,a50)+P1034(x154531,a91)
% 32.24/32.05 [15454]~P1041(x154541,a50)+P1034(x154541,a92)
% 32.24/32.05 [15455]~P1041(x154551,a50)+P1034(x154551,a31)
% 32.24/32.05 [15456]~P1041(x154561,a50)+P1034(x154561,a32)
% 32.24/32.05 [15457]~P1041(x154571,a50)+P1034(x154571,a33)
% 32.24/32.05 [15458]~P1041(x154581,a50)+P1034(x154581,a34)
% 32.24/32.05 [15459]~P1041(x154591,a50)+P1034(x154591,a35)
% 32.24/32.05 [15460]~P1041(x154601,a50)+P1034(x154601,a36)
% 32.24/32.05 [15461]~P1041(x154611,a50)+P1034(x154611,a37)
% 32.24/32.05 [15462]~P1041(x154621,a50)+P1034(x154621,a38)
% 32.24/32.05 [15463]~P1041(x154631,a50)+P1034(x154631,a40)
% 32.24/32.05 [15464]~P1041(x154641,a50)+P1034(x154641,a41)
% 32.24/32.05 [15465]~P1041(x154651,a50)+P1034(x154651,a42)
% 32.24/32.05 [15466]~P1041(x154661,a50)+P1034(x154661,a43)
% 32.24/32.05 [15467]~P1041(x154671,a50)+P1034(x154671,a44)
% 32.24/32.05 [15468]~P1041(x154681,a50)+P1034(x154681,a45)
% 32.24/32.05 [15469]~P1041(x154691,a50)+P1034(x154691,a46)
% 32.24/32.05 [15470]~P1041(x154701,a50)+P1034(x154701,a47)
% 32.24/32.05 [15471]~P1041(x154711,a50)+P1034(x154711,a48)
% 32.24/32.05 [15472]~P1041(x154721,a50)+P1034(x154721,a49)
% 32.24/32.05 [15473]~P1041(x154731,a50)+P1034(x154731,a51)
% 32.24/32.05 [15474]~P1041(x154741,a50)+P1034(x154741,a52)
% 32.24/32.05 [15475]~P1034(x154751,a62)+P1041(x154751,a50)
% 32.24/32.05 [15476]~P1034(x154761,a83)+P1041(x154761,a50)
% 32.24/32.05 [15477]~P1034(x154771,a61)+P1041(x154771,a50)
% 32.24/32.05 [15478]~P1034(x154781,a29)+P1041(x154781,a50)
% 32.24/32.05 [15479]~P1034(x154791,a30)+P1041(x154791,a50)
% 32.24/32.05 [15480]~P1034(x154801,a91)+P1041(x154801,a50)
% 32.24/32.05 [15481]~P1034(x154811,a92)+P1041(x154811,a50)
% 32.24/32.05 [15482]~P1034(x154821,a31)+P1041(x154821,a50)
% 32.24/32.05 [15483]~P1034(x154831,a32)+P1041(x154831,a50)
% 32.24/32.05 [15484]~P1034(x154841,a33)+P1041(x154841,a50)
% 32.24/32.05 [15485]~P1034(x154851,a34)+P1041(x154851,a50)
% 32.24/32.05 [15486]~P1034(x154861,a35)+P1041(x154861,a50)
% 32.24/32.05 [15487]~P1034(x154871,a36)+P1041(x154871,a50)
% 32.24/32.05 [15488]~P1034(x154881,a37)+P1041(x154881,a50)
% 32.24/32.05 [15489]~P1034(x154891,a38)+P1041(x154891,a50)
% 32.24/32.05 [15490]~P1034(x154901,a40)+P1041(x154901,a50)
% 32.24/32.05 [15491]~P1034(x154911,a41)+P1041(x154911,a50)
% 32.24/32.05 [15492]~P1034(x154921,a42)+P1041(x154921,a50)
% 32.24/32.05 [15493]~P1034(x154931,a43)+P1041(x154931,a50)
% 32.24/32.05 [15494]~P1034(x154941,a44)+P1041(x154941,a50)
% 32.24/32.05 [15495]~P1034(x154951,a45)+P1041(x154951,a50)
% 32.24/32.05 [15496]~P1034(x154961,a46)+P1041(x154961,a50)
% 32.24/32.05 [15497]~P1034(x154971,a47)+P1041(x154971,a50)
% 32.24/32.05 [15498]~P1034(x154981,a48)+P1041(x154981,a50)
% 32.24/32.05 [15499]~P1034(x154991,a49)+P1041(x154991,a50)
% 32.24/32.05 [15500]~P1034(x155001,a51)+P1041(x155001,a50)
% 32.24/32.05 [15501]~P1034(x155011,a52)+P1041(x155011,a50)
% 32.24/32.05 [15502]~P499(x155021,a77)+P573(x155021,a27)
% 32.24/32.05 [15503]~P499(x155031,a78)+P573(x155031,a26)
% 32.24/32.05 [15504]~P499(x155041,a79)+P573(x155041,a28)
% 32.24/32.05 [15505]~P499(x155051,a80)+P573(x155051,a39)
% 32.24/32.05 [15506]~P499(x155061,a82)+P573(x155061,a62)
% 32.24/32.05 [15507]~P499(x155071,a81)+P573(x155071,a50)
% 32.24/32.05 [15508]~P499(x155081,a84)+P573(x155081,a61)
% 32.24/32.05 [15509]~P165(a103,x155091)+P20(a106,x155091)
% 32.24/32.05 [15510]~P165(a102,x155101)+P20(a107,x155101)
% 32.24/32.05 [15511]~P165(a101,x155111)+P20(a108,x155111)
% 32.24/32.05 [15512]~P165(a100,x155121)+P20(a109,x155121)
% 32.24/32.05 [15513]~P165(a99,x155131)+P20(a110,x155131)
% 32.24/32.05 [15514]~P165(a98,x155141)+P20(a111,x155141)
% 32.24/32.05 [15515]~P165(a97,x155151)+P20(a112,x155151)
% 32.24/32.05 [15516]~P165(a96,x155161)+P20(a113,x155161)
% 32.24/32.05 [15517]~P165(a95,x155171)+P20(a114,x155171)
% 32.24/32.05 [15518]~P165(a94,x155181)+P20(a115,x155181)
% 32.24/32.05 [15519]~P165(a93,x155191)+P20(a116,x155191)
% 32.24/32.05 [15520]~P165(a104,x155201)+P20(a120,x155201)
% 32.24/32.05 [15521]~P165(a1,x155211)+P20(a121,x155211)
% 32.24/32.05 [15522]~P165(a2,x155221)+P20(a122,x155221)
% 32.24/32.05 [15523]~P165(a3,x155231)+P20(a123,x155231)
% 32.24/32.05 [15524]~P165(a4,x155241)+P20(a124,x155241)
% 32.24/32.05 [15525]~P165(a5,x155251)+P20(a125,x155251)
% 32.24/32.05 [15526]~P165(a6,x155261)+P20(a126,x155261)
% 32.24/32.05 [15527]~P165(a7,x155271)+P20(a119,x155271)
% 32.24/32.05 [15528]~P165(a8,x155281)+P20(a117,x155281)
% 32.24/32.05 [15529]~P165(a9,x155291)+P20(a118,x155291)
% 32.24/32.05 [15530]~P2016(a103,x155301)+P20(a127,x155301)
% 32.24/32.05 [15531]~P2016(a102,x155311)+P20(a128,x155311)
% 32.24/32.05 [15532]~P2016(a101,x155321)+P20(a129,x155321)
% 32.24/32.05 [15533]~P2016(a100,x155331)+P20(a130,x155331)
% 32.24/32.05 [15534]~P2016(a99,x155341)+P20(a131,x155341)
% 32.24/32.05 [15535]~P2016(a98,x155351)+P20(a132,x155351)
% 32.24/32.05 [15536]~P2016(a97,x155361)+P20(a133,x155361)
% 32.24/32.05 [15537]~P2016(a96,x155371)+P20(a134,x155371)
% 32.24/32.05 [15538]~P2016(a95,x155381)+P20(a135,x155381)
% 32.24/32.05 [15539]~P2016(a94,x155391)+P20(a136,x155391)
% 32.24/32.05 [15540]~P2016(a93,x155401)+P20(a137,x155401)
% 32.24/32.05 [15541]~P2016(a104,x155411)+P20(a183,x155411)
% 32.24/32.05 [15542]~P2016(a1,x155421)+P20(a184,x155421)
% 32.24/32.05 [15543]~P2016(a2,x155431)+P20(a185,x155431)
% 32.24/32.05 [15544]~P2016(a3,x155441)+P20(a186,x155441)
% 32.24/32.05 [15545]~P2016(a4,x155451)+P20(a187,x155451)
% 32.24/32.05 [15546]~P2016(a5,x155461)+P20(a188,x155461)
% 32.24/32.05 [15547]~P2016(a6,x155471)+P20(a189,x155471)
% 32.24/32.05 [15548]~P2016(a7,x155481)+P20(a182,x155481)
% 32.24/32.05 [15549]~P2016(a8,x155491)+P20(a138,x155491)
% 32.24/32.05 [15550]~P2016(a9,x155501)+P20(a139,x155501)
% 32.24/32.05 [15551]~P2511(a103,x155511)+P20(a140,x155511)
% 32.24/32.05 [15552]~P2511(a102,x155521)+P20(a141,x155521)
% 32.24/32.05 [15553]~P2511(a101,x155531)+P20(a142,x155531)
% 32.24/32.05 [15554]~P2511(a100,x155541)+P20(a143,x155541)
% 32.24/32.05 [15555]~P2511(a99,x155551)+P20(a144,x155551)
% 32.24/32.05 [15556]~P2511(a98,x155561)+P20(a145,x155561)
% 32.24/32.05 [15557]~P2511(a97,x155571)+P20(a146,x155571)
% 32.24/32.05 [15558]~P2511(a96,x155581)+P20(a147,x155581)
% 32.24/32.05 [15559]~P2511(a95,x155591)+P20(a148,x155591)
% 32.24/32.05 [15560]~P2511(a94,x155601)+P20(a149,x155601)
% 32.24/32.05 [15561]~P2511(a93,x155611)+P20(a150,x155611)
% 32.24/32.05 [15562]~P2511(a104,x155621)+P20(a175,x155621)
% 32.24/32.05 [15563]~P2511(a1,x155631)+P20(a176,x155631)
% 32.24/32.05 [15564]~P2511(a2,x155641)+P20(a177,x155641)
% 32.24/32.05 [15565]~P2511(a3,x155651)+P20(a178,x155651)
% 32.24/32.05 [15566]~P2511(a4,x155661)+P20(a179,x155661)
% 32.24/32.05 [15567]~P2511(a5,x155671)+P20(a180,x155671)
% 32.24/32.05 [15568]~P2511(a6,x155681)+P20(a181,x155681)
% 32.24/32.05 [15569]~P2511(a7,x155691)+P20(a174,x155691)
% 32.24/32.05 [15570]~P2511(a8,x155701)+P20(a151,x155701)
% 32.24/32.05 [15571]~P2511(a9,x155711)+P20(a152,x155711)
% 32.24/32.05 [15572]~P2018(a103,x155721)+P20(a153,x155721)
% 32.24/32.05 [15573]~P2018(a102,x155731)+P20(a154,x155731)
% 32.24/32.05 [15574]~P2018(a101,x155741)+P20(a155,x155741)
% 32.24/32.05 [15575]~P2018(a100,x155751)+P20(a156,x155751)
% 32.24/32.05 [15576]~P2018(a99,x155761)+P20(a157,x155761)
% 32.24/32.05 [15577]~P2018(a98,x155771)+P20(a158,x155771)
% 32.24/32.05 [15578]~P2018(a97,x155781)+P20(a159,x155781)
% 32.24/32.05 [15579]~P2018(a96,x155791)+P20(a160,x155791)
% 32.24/32.05 [15580]~P2018(a95,x155801)+P20(a161,x155801)
% 32.24/32.05 [15581]~P2018(a94,x155811)+P20(a162,x155811)
% 32.24/32.05 [15582]~P2018(a93,x155821)+P20(a163,x155821)
% 32.24/32.05 [15583]~P2018(a104,x155831)+P20(a167,x155831)
% 32.24/32.05 [15584]~P2018(a1,x155841)+P20(a168,x155841)
% 32.24/32.05 [15585]~P2018(a2,x155851)+P20(a169,x155851)
% 32.24/32.05 [15586]~P2018(a3,x155861)+P20(a170,x155861)
% 32.24/32.05 [15587]~P2018(a4,x155871)+P20(a171,x155871)
% 32.24/32.05 [15588]~P2018(a5,x155881)+P20(a172,x155881)
% 32.24/32.05 [15589]~P2018(a6,x155891)+P20(a173,x155891)
% 32.24/32.05 [15590]~P2018(a7,x155901)+P20(a166,x155901)
% 32.24/32.05 [15591]~P2018(a8,x155911)+P20(a164,x155911)
% 32.24/32.05 [15592]~P2018(a9,x155921)+P20(a165,x155921)
% 32.24/32.05 [15593]~P20(a121,x155931)+P165(a1,x155931)
% 32.24/32.05 [15594]~P20(a120,x155941)+P165(a104,x155941)
% 32.24/32.05 [15595]~P20(a122,x155951)+P165(a2,x155951)
% 32.24/32.05 [15596]~P20(a123,x155961)+P165(a3,x155961)
% 32.24/32.05 [15597]~P20(a124,x155971)+P165(a4,x155971)
% 32.24/32.05 [15598]~P20(a125,x155981)+P165(a5,x155981)
% 32.24/32.05 [15599]~P20(a126,x155991)+P165(a6,x155991)
% 32.24/32.05 [15600]~P20(a119,x156001)+P165(a7,x156001)
% 32.24/32.05 [15601]~P20(a117,x156011)+P165(a8,x156011)
% 32.24/32.05 [15602]~P20(a118,x156021)+P165(a9,x156021)
% 32.24/32.05 [15603]~P20(a116,x156031)+P165(a93,x156031)
% 32.24/32.05 [15604]~P20(a115,x156041)+P165(a94,x156041)
% 32.24/32.05 [15605]~P20(a114,x156051)+P165(a95,x156051)
% 32.24/32.05 [15606]~P20(a113,x156061)+P165(a96,x156061)
% 32.24/32.05 [15607]~P20(a112,x156071)+P165(a97,x156071)
% 32.24/32.05 [15608]~P20(a111,x156081)+P165(a98,x156081)
% 32.24/32.05 [15609]~P20(a110,x156091)+P165(a99,x156091)
% 32.24/32.05 [15610]~P20(a109,x156101)+P165(a100,x156101)
% 32.24/32.05 [15611]~P20(a108,x156111)+P165(a101,x156111)
% 32.24/32.05 [15612]~P20(a107,x156121)+P165(a102,x156121)
% 32.24/32.05 [15613]~P20(a106,x156131)+P165(a103,x156131)
% 32.24/32.05 [15614]~P20(a184,x156141)+P2016(a1,x156141)
% 32.24/32.05 [15615]~P20(a183,x156151)+P2016(a104,x156151)
% 32.24/32.05 [15616]~P20(a185,x156161)+P2016(a2,x156161)
% 32.24/32.05 [15617]~P20(a186,x156171)+P2016(a3,x156171)
% 32.24/32.05 [15618]~P20(a187,x156181)+P2016(a4,x156181)
% 32.24/32.05 [15619]~P20(a188,x156191)+P2016(a5,x156191)
% 32.24/32.05 [15620]~P20(a189,x156201)+P2016(a6,x156201)
% 32.24/32.05 [15621]~P20(a182,x156211)+P2016(a7,x156211)
% 32.24/32.05 [15622]~P20(a138,x156221)+P2016(a8,x156221)
% 32.24/32.05 [15623]~P20(a139,x156231)+P2016(a9,x156231)
% 32.24/32.05 [15624]~P20(a137,x156241)+P2016(a93,x156241)
% 32.24/32.05 [15625]~P20(a136,x156251)+P2016(a94,x156251)
% 32.24/32.05 [15626]~P20(a135,x156261)+P2016(a95,x156261)
% 32.24/32.05 [15627]~P20(a134,x156271)+P2016(a96,x156271)
% 32.24/32.05 [15628]~P20(a133,x156281)+P2016(a97,x156281)
% 32.24/32.05 [15629]~P20(a132,x156291)+P2016(a98,x156291)
% 32.24/32.05 [15630]~P20(a131,x156301)+P2016(a99,x156301)
% 32.24/32.05 [15631]~P20(a130,x156311)+P2016(a100,x156311)
% 32.24/32.05 [15632]~P20(a129,x156321)+P2016(a101,x156321)
% 32.24/32.05 [15633]~P20(a128,x156331)+P2016(a102,x156331)
% 32.24/32.05 [15634]~P20(a127,x156341)+P2016(a103,x156341)
% 32.24/32.05 [15635]~P20(a176,x156351)+P2511(a1,x156351)
% 32.24/32.05 [15636]~P20(a175,x156361)+P2511(a104,x156361)
% 32.24/32.05 [15637]~P20(a177,x156371)+P2511(a2,x156371)
% 32.24/32.05 [15638]~P20(a178,x156381)+P2511(a3,x156381)
% 32.24/32.05 [15639]~P20(a179,x156391)+P2511(a4,x156391)
% 32.24/32.05 [15640]~P20(a180,x156401)+P2511(a5,x156401)
% 32.24/32.05 [15641]~P20(a181,x156411)+P2511(a6,x156411)
% 32.24/32.05 [15642]~P20(a174,x156421)+P2511(a7,x156421)
% 32.24/32.05 [15643]~P20(a151,x156431)+P2511(a8,x156431)
% 32.24/32.05 [15644]~P20(a152,x156441)+P2511(a9,x156441)
% 32.24/32.05 [15645]~P20(a150,x156451)+P2511(a93,x156451)
% 32.24/32.05 [15646]~P20(a149,x156461)+P2511(a94,x156461)
% 32.24/32.05 [15647]~P20(a148,x156471)+P2511(a95,x156471)
% 32.24/32.05 [15648]~P20(a147,x156481)+P2511(a96,x156481)
% 32.24/32.05 [15649]~P20(a146,x156491)+P2511(a97,x156491)
% 32.24/32.05 [15650]~P20(a145,x156501)+P2511(a98,x156501)
% 32.24/32.05 [15651]~P20(a144,x156511)+P2511(a99,x156511)
% 32.24/32.05 [15652]~P20(a143,x156521)+P2511(a100,x156521)
% 32.24/32.05 [15653]~P20(a142,x156531)+P2511(a101,x156531)
% 32.24/32.05 [15654]~P20(a141,x156541)+P2511(a102,x156541)
% 32.24/32.05 [15655]~P20(a140,x156551)+P2511(a103,x156551)
% 32.24/32.05 [15656]~P20(a168,x156561)+P2018(a1,x156561)
% 32.24/32.05 [15657]~P20(a167,x156571)+P2018(a104,x156571)
% 32.24/32.05 [15658]~P20(a169,x156581)+P2018(a2,x156581)
% 32.24/32.05 [15659]~P20(a170,x156591)+P2018(a3,x156591)
% 32.24/32.05 [15660]~P20(a171,x156601)+P2018(a4,x156601)
% 32.24/32.05 [15661]~P20(a172,x156611)+P2018(a5,x156611)
% 32.24/32.05 [15662]~P20(a173,x156621)+P2018(a6,x156621)
% 32.24/32.05 [15663]~P20(a166,x156631)+P2018(a7,x156631)
% 32.24/32.05 [15664]~P20(a164,x156641)+P2018(a8,x156641)
% 32.24/32.05 [15665]~P20(a165,x156651)+P2018(a9,x156651)
% 32.24/32.05 [15666]~P20(a163,x156661)+P2018(a93,x156661)
% 32.24/32.05 [15667]~P20(a162,x156671)+P2018(a94,x156671)
% 32.24/32.05 [15668]~P20(a161,x156681)+P2018(a95,x156681)
% 32.24/32.05 [15669]~P20(a160,x156691)+P2018(a96,x156691)
% 32.24/32.05 [15670]~P20(a159,x156701)+P2018(a97,x156701)
% 32.24/32.05 [15671]~P20(a158,x156711)+P2018(a98,x156711)
% 32.24/32.05 [15672]~P20(a157,x156721)+P2018(a99,x156721)
% 32.24/32.05 [15673]~P20(a156,x156731)+P2018(a100,x156731)
% 32.24/32.05 [15674]~P20(a155,x156741)+P2018(a101,x156741)
% 32.24/32.05 [15675]~P20(a154,x156751)+P2018(a102,x156751)
% 32.24/32.05 [15676]~P20(a153,x156761)+P2018(a103,x156761)
% 32.24/32.05 [9403]~P141(x94032)+P1369(x94031,x94032)
% 32.24/32.05 [10855]P1(x108551)+~P63(x108552,x108551)
% 32.24/32.05 [10856]P1(x108561)+~P63(x108561,x108562)
% 32.24/32.05 [11239]~P129(x112391)+~P1432(x112392,x112391)
% 32.24/32.05 [11240]~P115(x112401)+~P1424(x112402,x112401)
% 32.24/32.05 [11241]~P141(x112411)+~P1435(x112412,x112411)
% 32.24/32.05 [4857]~P115(x48571)+E(a26,x48571)+E(a27,x48571)
% 32.24/32.05 [4858]~P131(x48581)+E(a28,x48581)+E(a26,x48581)
% 32.24/32.05 [4859]~P116(x48591)+E(a33,x48591)+E(a32,x48591)
% 32.24/32.05 [7140]P2138(x71401)+~P2133(x71401)+P2137(x71401)
% 32.24/32.05 [7141]P2135(x71411)+~P2090(x71411)+P2076(x71411)
% 32.24/32.05 [7142]P2104(x71421)+~P2092(x71421)+P2103(x71421)
% 32.24/32.05 [7143]P2106(x71431)+~P2103(x71431)+P2105(x71431)
% 32.24/32.05 [7144]P2122(x71441)+~P2105(x71441)+P2108(x71441)
% 32.24/32.05 [7145]P2121(x71451)+~P2108(x71451)+P2109(x71451)
% 32.24/32.05 [7146]P2120(x71461)+~P2109(x71461)+P2110(x71461)
% 32.24/32.05 [7147]P2117(x71471)+~P2110(x71471)+P2111(x71471)
% 32.24/32.05 [7148]P1938(x71481)+~P1911(x71481)+P2155(x71481)
% 32.24/32.05 [7149]P2059(x71491)+~P2002(x71491)+P2060(x71491)
% 32.24/32.05 [7150]P2030(x71501)+~P2048(x71501)+P2021(x71501)
% 32.24/32.05 [7151]P2030(x71511)+~P2047(x71511)+P2021(x71511)
% 32.24/32.05 [7152]P1975(x71521)+~P1992(x71521)+P1986(x71521)
% 32.24/32.05 [7153]P1992(x71531)+~P1986(x71531)+P1975(x71531)
% 32.24/32.05 [7154]P1997(x71541)+~P1993(x71541)+P1994(x71541)
% 32.24/32.05 [7155]P1983(x71551)+~P1994(x71551)+P1995(x71551)
% 32.24/32.05 [7156]P1981(x71561)+~P1995(x71561)+P1998(x71561)
% 32.24/32.05 [7157]P2520(x71571)+~P1998(x71571)+P1999(x71571)
% 32.24/32.05 [7158]P773(x71581)+~P2524(x71581)+P2520(x71581)
% 32.24/32.05 [7159]P1979(x71591)+~P1999(x71591)+P2505(x71591)
% 32.24/32.05 [7160]P712(x71601)+~P706(x71601)+P2505(x71601)
% 32.24/32.05 [7161]P1972(x71611)+~P1966(x71611)+P1967(x71611)
% 32.24/32.05 [7162]P1963(x71621)+~P1967(x71621)+P1968(x71621)
% 32.24/32.05 [7163]P1964(x71631)+~P1968(x71631)+P1965(x71631)
% 32.24/32.05 [7164]P1957(x71641)+~P1947(x71641)+P1925(x71641)
% 32.24/32.05 [7165]P1959(x71651)+~P1958(x71651)+P1906(x71651)
% 32.24/32.05 [7166]P1932(x71661)+~P1912(x71661)+P1918(x71661)
% 32.24/32.05 [7167]P1928(x71671)+~P1918(x71671)+P1919(x71671)
% 32.24/32.05 [7168]P2542(x71681)+~P1904(x71681)+P199(x71681)
% 32.24/32.05 [7169]P1929(x71691)+~P1919(x71691)+P1920(x71691)
% 32.24/32.05 [7170]P1908(x71701)+~P1920(x71701)+P1909(x71701)
% 32.24/32.05 [7171]P1812(x71711)+~P1761(x71711)+P1768(x71711)
% 32.24/32.05 [7172]P1889(x71721)+~P1884(x71721)+P1888(x71721)
% 32.24/32.05 [7173]P1886(x71731)+~P1880(x71731)+P1874(x71731)
% 32.24/32.05 [7174]P1882(x71741)+~P1876(x71741)+P1875(x71741)
% 32.24/32.05 [7175]P1878(x71751)+~P1870(x71751)+P1835(x71751)
% 32.24/32.05 [7176]P1847(x71761)+~P1864(x71761)+P1836(x71761)
% 32.24/32.05 [7177]P1848(x71771)+~P1860(x71771)+P1837(x71771)
% 32.24/32.05 [7178]P1851(x71781)+~P1856(x71781)+P1838(x71781)
% 32.24/32.05 [7179]P1853(x71791)+~P1852(x71791)+P1816(x71791)
% 32.24/32.05 [7180]P1811(x71801)+~P1768(x71801)+P1799(x71801)
% 32.24/32.05 [7181]P998(x71811)+~P1799(x71811)+P1808(x71811)
% 32.24/32.05 [7182]P1756(x71821)+~P1803(x71821)+P1802(x71821)
% 32.24/32.05 [7183]P1803(x71831)+~P1802(x71831)+P1756(x71831)
% 32.24/32.05 [7184]P1775(x71841)+~P1769(x71841)+P1756(x71841)
% 32.24/32.05 [7185]P1778(x71851)+~P1757(x71851)+P1803(x71851)
% 32.24/32.05 [7186]P1757(x71861)+~P1803(x71861)+P1778(x71861)
% 32.24/32.05 [7187]P1798(x71871)+~P1777(x71871)+P1778(x71871)
% 32.24/32.05 [7188]P1783(x71881)+~P1800(x71881)+P1757(x71881)
% 32.24/32.05 [7189]P1784(x71891)+~P1807(x71891)+P1757(x71891)
% 32.24/32.05 [7190]P1785(x71901)+~P1780(x71901)+P1781(x71901)
% 32.24/32.05 [7191]P1783(x71911)+~P1757(x71911)+P1800(x71911)
% 32.24/32.05 [7192]P1784(x71921)+~P1757(x71921)+P1807(x71921)
% 32.24/32.05 [7193]P1793(x71931)+~P1791(x71931)+P1783(x71931)
% 32.24/32.05 [7194]P1788(x71941)+~P1786(x71941)+P1784(x71941)
% 32.24/32.05 [7195]P1789(x71951)+~P1779(x71951)+P1780(x71951)
% 32.24/32.05 [7196]P1736(x71961)+~P1734(x71961)+P1735(x71961)
% 32.24/32.05 [7197]P1738(x71971)+~P1735(x71971)+P1737(x71971)
% 32.24/32.05 [7198]P1733(x71981)+~P1728(x71981)+P1669(x71981)
% 32.24/32.05 [7199]P1715(x71991)+~P1712(x71991)+P1714(x71991)
% 32.24/32.05 [7200]P1719(x72001)+~P1717(x72001)+P1718(x72001)
% 32.24/32.05 [7201]P1722(x72011)+~P1720(x72011)+P1721(x72011)
% 32.24/32.05 [7202]P1725(x72021)+~P1723(x72021)+P1724(x72021)
% 32.24/32.05 [7203]P1635(x72031)+~P1705(x72031)+P1562(x72031)
% 32.24/32.05 [7204]P1567(x72041)+~P1564(x72041)+P1562(x72041)
% 32.24/32.05 [7205]P1640(x72051)+~P1637(x72051)+P1635(x72051)
% 32.24/32.05 [7206]P1673(x72061)+~P1707(x72061)+P1670(x72061)
% 32.24/32.05 [7207]P1702(x72071)+~P1699(x72071)+P1672(x72071)
% 32.24/32.05 [7208]P1675(x72081)+~P1701(x72081)+P1610(x72081)
% 32.24/32.05 [7209]P1698(x72091)+~P1695(x72091)+P1674(x72091)
% 32.24/32.05 [7210]P1680(x72101)+~P1697(x72101)+P1611(x72101)
% 32.24/32.05 [7211]P1694(x72111)+~P1689(x72111)+P1679(x72111)
% 32.24/32.05 [7212]P1684(x72121)+~P1691(x72121)+P1612(x72121)
% 32.24/32.05 [7213]P1685(x72131)+~P1663(x72131)+P1613(x72131)
% 32.24/32.05 [7214]P1627(x72141)+~P1692(x72141)+P1553(x72141)
% 32.24/32.05 [7215]P1538(x72151)+~P1580(x72151)+P1553(x72151)
% 32.24/32.05 [7216]P1543(x72161)+~P1545(x72161)+P1553(x72161)
% 32.24/32.05 [7217]P1618(x72171)+~P1619(x72171)+P1627(x72171)
% 32.24/32.05 [7218]P1686(x72181)+~P1612(x72181)+P1667(x72181)
% 32.24/32.05 [7219]P1631(x72191)+~P1687(x72191)+P1557(x72191)
% 32.24/32.05 [7220]P1537(x72201)+~P1583(x72201)+P1557(x72201)
% 32.24/32.05 [7221]P1552(x72211)+~P1554(x72211)+P1557(x72211)
% 32.24/32.05 [7222]P1626(x72221)+~P1628(x72221)+P1631(x72221)
% 32.24/32.05 [7223]P1681(x72231)+~P1611(x72231)+P1668(x72231)
% 32.24/32.05 [7224]P1636(x72241)+~P1682(x72241)+P1563(x72241)
% 32.24/32.05 [7225]P1536(x72251)+~P1588(x72251)+P1563(x72251)
% 32.24/32.05 [7226]P1551(x72261)+~P1558(x72261)+P1563(x72261)
% 32.24/32.05 [7227]P1625(x72271)+~P1632(x72271)+P1636(x72271)
% 32.24/32.05 [7228]P1676(x72281)+~P1610(x72281)+P1671(x72281)
% 32.24/32.05 [7229]P1640(x72291)+~P1677(x72291)+P1567(x72291)
% 32.24/32.05 [7230]P782(x72301)+~P804(x72301)+P1810(x72301)
% 32.24/32.05 [7231]P1604(x72311)+~P1596(x72311)+P1607(x72311)
% 32.24/32.05 [7232]P1593(x72321)+~P1604(x72321)+P1585(x72321)
% 32.24/32.05 [7233]P1609(x72331)+~P1607(x72331)+P1409(x72331)
% 32.24/32.05 [7234]P1594(x72341)+~P1585(x72341)+P1584(x72341)
% 32.24/32.05 [7235]P1599(x72351)+~P1597(x72351)+P1598(x72351)
% 32.24/32.05 [7236]P1529(x72361)+~P1528(x72361)+P1534(x72361)
% 32.24/32.05 [7237]P1531(x72371)+~P1529(x72371)+P1533(x72371)
% 32.24/32.05 [7238]P1535(x72381)+~P1534(x72381)+P1410(x72381)
% 32.24/32.05 [7239]P1487(x72391)+~P1490(x72391)+P1491(x72391)
% 32.24/32.05 [7240]P1490(x72401)+~P1489(x72401)+P1496(x72401)
% 32.24/32.05 [7241]P1489(x72411)+~P1488(x72411)+P1505(x72411)
% 32.24/32.05 [7242]P1488(x72421)+~P1485(x72421)+P1504(x72421)
% 32.24/32.05 [7243]P1508(x72431)+~P1506(x72431)+P1507(x72431)
% 32.24/32.05 [7244]P1486(x72441)+~P1478(x72441)+P1485(x72441)
% 32.24/32.05 [7245]P1498(x72451)+~P1496(x72451)+P1497(x72451)
% 32.24/32.05 [7246]P1500(x72461)+~P1497(x72461)+P1499(x72461)
% 32.24/32.05 [7247]P1502(x72471)+~P1499(x72471)+P1501(x72471)
% 32.24/32.05 [7248]P1495(x72481)+~P1487(x72481)+P1494(x72481)
% 32.24/32.05 [7249]P1467(x72491)+~P1466(x72491)+P1121(x72491)
% 32.24/32.05 [7250]P1414(x72501)+~P1463(x72501)+P1460(x72501)
% 32.24/32.05 [7251]P1463(x72511)+~P1460(x72511)+P1414(x72511)
% 32.24/32.05 [7252]P1447(x72521)+~P1463(x72521)+P1464(x72521)
% 32.24/32.05 [7253]P1125(x72531)+~P1465(x72531)+P1466(x72531)
% 32.24/32.05 [7254]P1417(x72541)+~P1125(x72541)+P1126(x72541)
% 32.24/32.05 [7255]P1391(x72551)+~P1403(x72551)+P1382(x72551)
% 32.24/32.05 [7256]P1383(x72561)+~P1397(x72561)+P1382(x72561)
% 32.24/32.05 [7257]P1387(x72571)+~P1405(x72571)+P1350(x72571)
% 32.24/32.05 [7258]P1400(x72581)+~P1398(x72581)+P1392(x72581)
% 32.24/32.05 [7259]P1375(x72591)+~P1396(x72591)+P1393(x72591)
% 32.24/32.05 [7260]P1376(x72601)+~P1352(x72601)+P1351(x72601)
% 32.24/32.05 [7261]P1384(x72611)+~P1390(x72611)+P1377(x72611)
% 32.24/32.05 [7262]P1386(x72621)+~P1385(x72621)+P1378(x72621)
% 32.24/32.05 [7263]P1068(x72631)+~P1082(x72631)+P1102(x72631)
% 32.24/32.05 [7264]P1082(x72641)+~P1068(x72641)+P1102(x72641)
% 32.24/32.05 [7265]P1082(x72651)+~P1102(x72651)+P1068(x72651)
% 32.24/32.05 [7266]P1053(x72661)+~P1047(x72661)+P1059(x72661)
% 32.24/32.05 [7267]P1023(x72671)+~P1021(x72671)+P1022(x72671)
% 32.24/32.05 [7268]P1026(x72681)+~P1022(x72681)+P1024(x72681)
% 32.24/32.05 [7269]P1028(x72691)+~P1024(x72691)+P1027(x72691)
% 32.24/32.05 [7270]P1030(x72701)+~P1027(x72701)+P1029(x72701)
% 32.24/32.05 [7271]P1032(x72711)+~P1029(x72711)+P1031(x72711)
% 32.24/32.05 [7272]P1014(x72721)+~P1012(x72721)+P1013(x72721)
% 32.24/32.05 [7273]P1016(x72731)+~P1013(x72731)+P1015(x72731)
% 32.24/32.05 [7274]P1019(x72741)+~P1015(x72741)+P1017(x72741)
% 32.24/32.05 [7275]P813(x72751)+~P1002(x72751)+P1001(x72751)
% 32.24/32.05 [7276]P1002(x72761)+~P1001(x72761)+P813(x72761)
% 32.24/32.05 [7277]P972(x72771)+~P966(x72771)+P813(x72771)
% 32.24/32.05 [7278]P975(x72781)+~P957(x72781)+P1002(x72781)
% 32.24/32.05 [7279]P957(x72791)+~P1002(x72791)+P975(x72791)
% 32.24/32.05 [7280]P996(x72801)+~P974(x72801)+P975(x72801)
% 32.24/32.05 [7281]P983(x72811)+~P999(x72811)+P957(x72811)
% 32.24/32.05 [7282]P984(x72821)+~P1007(x72821)+P957(x72821)
% 32.24/32.05 [7283]P985(x72831)+~P977(x72831)+P978(x72831)
% 32.24/32.05 [7284]P983(x72841)+~P957(x72841)+P999(x72841)
% 32.24/32.05 [7285]P984(x72851)+~P957(x72851)+P1007(x72851)
% 32.24/32.05 [7286]P994(x72861)+~P991(x72861)+P983(x72861)
% 32.24/32.05 [7287]P988(x72871)+~P986(x72871)+P984(x72871)
% 32.24/32.05 [7288]P989(x72881)+~P976(x72881)+P977(x72881)
% 32.24/32.05 [7289]P864(x72891)+~P946(x72891)+P958(x72891)
% 32.24/32.05 [7290]P946(x72901)+~P958(x72901)+P864(x72901)
% 32.24/32.05 [7291]P918(x72911)+~P939(x72911)+P932(x72911)
% 32.24/32.05 [7292]P939(x72921)+~P932(x72921)+P918(x72921)
% 32.24/32.05 [7293]P919(x72931)+~P928(x72931)+P890(x72931)
% 32.24/32.05 [7294]P928(x72941)+~P890(x72941)+P919(x72941)
% 32.24/32.05 [7295]P929(x72951)+~P928(x72951)+P927(x72951)
% 32.24/32.05 [7296]P767(x72961)+~P808(x72961)+P809(x72961)
% 32.24/32.05 [7297]P808(x72971)+~P809(x72971)+P767(x72971)
% 32.24/32.05 [7298]P804(x72981)+~P783(x72981)+P767(x72981)
% 32.24/32.05 [7299]P799(x72991)+~P784(x72991)+P798(x72991)
% 32.24/32.05 [7300]P790(x73001)+~P785(x73001)+P789(x73001)
% 32.24/32.05 [7301]P787(x73011)+~P778(x73011)+P777(x73011)
% 32.24/32.05 [7302]P780(x73021)+~P771(x73021)+P770(x73021)
% 32.24/32.05 [7303]P764(x73031)+~P754(x73031)+P760(x73031)
% 32.24/32.05 [7304]P748(x73041)+~P760(x73041)+P761(x73041)
% 32.24/32.05 [7305]P749(x73051)+~P761(x73051)+P750(x73051)
% 32.24/32.05 [7306]P751(x73061)+~P738(x73061)+P739(x73061)
% 32.24/32.05 [7307]P743(x73071)+~P739(x73071)+P740(x73071)
% 32.24/32.05 [7308]P744(x73081)+~P740(x73081)+P741(x73081)
% 32.24/32.05 [7309]P745(x73091)+~P741(x73091)+P737(x73091)
% 32.24/32.05 [7310]P729(x73101)+~P723(x73101)+P728(x73101)
% 32.24/32.05 [7311]P725(x73111)+~P717(x73111)+P716(x73111)
% 32.24/32.05 [7312]P719(x73121)+~P704(x73121)+P641(x73121)
% 32.24/32.05 [7313]P285(x73131)+~P176(x73131)+P706(x73131)
% 32.24/32.05 [7314]P279(x73141)+~P712(x73141)+P177(x73141)
% 32.24/32.05 [7315]P642(x73151)+~P685(x73151)+P690(x73151)
% 32.24/32.05 [7316]P673(x73161)+~P690(x73161)+P691(x73161)
% 32.24/32.05 [7317]P674(x73171)+~P691(x73171)+P692(x73171)
% 32.24/32.05 [7318]P675(x73181)+~P692(x73181)+P693(x73181)
% 32.24/32.05 [7319]P676(x73191)+~P693(x73191)+P694(x73191)
% 32.24/32.05 [7320]P677(x73201)+~P694(x73201)+P678(x73201)
% 32.24/32.05 [7321]P643(x73211)+~P618(x73211)+P620(x73211)
% 32.24/32.05 [7322]P679(x73221)+~P680(x73221)+P681(x73221)
% 32.24/32.05 [7323]P644(x73231)+~P620(x73231)+P621(x73231)
% 32.24/32.05 [7324]P671(x73241)+~P670(x73241)+P669(x73241)
% 32.24/32.05 [7325]P661(x73251)+~P621(x73251)+P622(x73251)
% 32.24/32.05 [7326]P667(x73261)+~P665(x73261)+P666(x73261)
% 32.24/32.05 [7327]P668(x73271)+~P666(x73271)+P664(x73271)
% 32.24/32.05 [7328]P653(x73281)+~P622(x73281)+P623(x73281)
% 32.24/32.05 [7329]P662(x73291)+~P660(x73291)+P652(x73291)
% 32.24/32.05 [7330]P654(x73301)+~P623(x73301)+P624(x73301)
% 32.24/32.05 [7331]P658(x73311)+~P656(x73311)+P657(x73311)
% 32.24/32.05 [7332]P659(x73321)+~P657(x73321)+P655(x73321)
% 32.24/32.05 [7333]P647(x73331)+~P624(x73331)+P617(x73331)
% 32.24/32.05 [7334]P649(x73341)+~P648(x73341)+P646(x73341)
% 32.24/32.05 [7335]P632(x73351)+~P626(x73351)+P627(x73351)
% 32.24/32.05 [7336]P616(x73361)+~P627(x73361)+P625(x73361)
% 32.24/32.05 [7337]P528(x73371)+~P310(x73371)+P610(x73371)
% 32.24/32.05 [7338]P310(x73381)+~P610(x73381)+P528(x73381)
% 32.24/32.05 [7339]P552(x73391)+~P597(x73391)+P542(x73391)
% 32.24/32.05 [7340]P552(x73401)+~P585(x73401)+P542(x73401)
% 32.24/32.05 [7341]P570(x73411)+~P600(x73411)+P604(x73411)
% 32.24/32.05 [7342]P574(x73421)+~P572(x73421)+P570(x73421)
% 32.24/32.05 [7343]P575(x73431)+~P604(x73431)+P605(x73431)
% 32.24/32.05 [7344]P577(x73441)+~P574(x73441)+P575(x73441)
% 32.24/32.05 [7345]P576(x73451)+~P605(x73451)+P606(x73451)
% 32.24/32.05 [7346]P582(x73461)+~P581(x73461)+P576(x73461)
% 32.24/32.05 [7347]P555(x73471)+~P606(x73471)+P607(x73471)
% 32.24/32.05 [7348]P590(x73481)+~P589(x73481)+P555(x73481)
% 32.24/32.05 [7349]P578(x73491)+~P577(x73491)+P555(x73491)
% 32.24/32.05 [7350]P560(x73501)+~P559(x73501)+P555(x73501)
% 32.24/32.05 [7351]P556(x73511)+~P607(x73511)+P608(x73511)
% 32.24/32.05 [7352]P591(x73521)+~P590(x73521)+P556(x73521)
% 32.24/32.05 [7353]P579(x73531)+~P578(x73531)+P556(x73531)
% 32.24/32.05 [7354]P561(x73541)+~P560(x73541)+P556(x73541)
% 32.24/32.05 [7355]P557(x73551)+~P608(x73551)+P609(x73551)
% 32.24/32.05 [7356]P558(x73561)+~P561(x73561)+P557(x73561)
% 32.24/32.05 [7357]P592(x73571)+~P591(x73571)+P557(x73571)
% 32.24/32.05 [7358]P580(x73581)+~P579(x73581)+P557(x73581)
% 32.24/32.05 [7359]P558(x73591)+~P609(x73591)+P544(x73591)
% 32.24/32.05 [7360]P593(x73601)+~P592(x73601)+P558(x73601)
% 32.24/32.05 [7361]P581(x73611)+~P580(x73611)+P558(x73611)
% 32.24/32.05 [7362]P548(x73621)+~P544(x73621)+P547(x73621)
% 32.24/32.05 [7363]P548(x73631)+~P545(x73631)+P547(x73631)
% 32.24/32.05 [7364]P595(x73641)+~P594(x73641)+P548(x73641)
% 32.24/32.05 [7365]P583(x73651)+~P582(x73651)+P548(x73651)
% 32.24/32.05 [7366]P530(x73661)+~P533(x73661)+P523(x73661)
% 32.24/32.05 [7367]P603(x73671)+~P601(x73671)+P602(x73671)
% 32.24/32.05 [7368]P563(x73681)+~P586(x73681)+P589(x73681)
% 32.24/32.05 [7369]P553(x73691)+~P593(x73691)+P594(x73691)
% 32.24/32.05 [7370]P549(x73701)+~P595(x73701)+P596(x73701)
% 32.24/32.05 [7371]P584(x73711)+~P583(x73711)+P549(x73711)
% 32.24/32.05 [7372]P550(x73721)+~P547(x73721)+P549(x73721)
% 32.24/32.05 [7373]P551(x73731)+~P596(x73731)+P597(x73731)
% 32.24/32.05 [7374]P552(x73741)+~P550(x73741)+P551(x73741)
% 32.24/32.05 [7375]P585(x73751)+~P584(x73751)+P551(x73751)
% 32.24/32.05 [7376]P530(x73761)+~P523(x73761)+P533(x73761)
% 32.24/32.05 [7377]P515(x73771)+~P500(x73771)+P478(x73771)
% 32.24/32.05 [7378]P479(x73781)+~P501(x73781)+P494(x73781)
% 32.24/32.05 [7379]P501(x73791)+~P494(x73791)+P479(x73791)
% 32.24/32.05 [7380]P493(x73801)+~P482(x73801)+P488(x73801)
% 32.24/32.05 [7381]P492(x73811)+~P488(x73811)+P489(x73811)
% 32.24/32.05 [7382]P469(x73821)+~P470(x73821)+P477(x73821)
% 32.24/32.05 [7383]P454(x73831)+~P458(x73831)+P464(x73831)
% 32.24/32.05 [7384]P455(x73841)+~P464(x73841)+P457(x73841)
% 32.24/32.05 [7385]P451(x73851)+~P452(x73851)+P453(x73851)
% 32.24/32.05 [7386]P439(x73861)+~P431(x73861)+P432(x73861)
% 32.24/32.05 [7387]P428(x73871)+~P432(x73871)+P430(x73871)
% 32.24/32.05 [7388]P400(x73881)+~P386(x73881)+P392(x73881)
% 32.24/32.05 [7389]P401(x73891)+~P392(x73891)+P393(x73891)
% 32.24/32.05 [7390]P408(x73901)+~P393(x73901)+P394(x73901)
% 32.24/32.05 [7391]P409(x73911)+~P394(x73911)+P395(x73911)
% 32.24/32.05 [7392]P411(x73921)+~P395(x73921)+P396(x73921)
% 32.24/32.05 [7393]P403(x73931)+~P396(x73931)+P385(x73931)
% 32.24/32.05 [7394]P367(x73941)+~P378(x73941)+P379(x73941)
% 32.24/32.05 [7395]P369(x73951)+~P379(x73951)+P380(x73951)
% 32.24/32.05 [7396]P381(x73961)+~P380(x73961)+P372(x73961)
% 32.24/32.05 [7397]P358(x73971)+~P359(x73971)+P362(x73971)
% 32.24/32.05 [7398]P338(x73981)+~P339(x73981)+P349(x73981)
% 32.24/32.05 [7399]P324(x73991)+~P325(x73991)+P326(x73991)
% 32.24/32.05 [7400]P262(x74001)+~P256(x74001)+P261(x74001)
% 32.24/32.05 [7401]P258(x74011)+~P252(x74011)+P246(x74011)
% 32.24/32.05 [7402]P254(x74021)+~P248(x74021)+P247(x74021)
% 32.24/32.05 [7403]P250(x74031)+~P242(x74031)+P207(x74031)
% 32.24/32.05 [7404]P219(x74041)+~P236(x74041)+P208(x74041)
% 32.24/32.05 [7405]P220(x74051)+~P232(x74051)+P209(x74051)
% 32.24/32.05 [7406]P223(x74061)+~P229(x74061)+P210(x74061)
% 32.24/32.05 [7407]P225(x74071)+~P224(x74071)+P184(x74071)
% 32.24/32.05 [7408]P2591(x74081)+~P2586(x74081)+P2590(x74081)
% 32.24/32.05 [7409]P2588(x74091)+~P2580(x74091)+P2579(x74091)
% 32.24/32.05 [7410]P2582(x74101)+~P2573(x74101)+P2572(x74101)
% 32.24/32.05 [7411]P2495(x74111)+~P2490(x74111)+P2494(x74111)
% 32.24/32.05 [7412]P2492(x74121)+~P2484(x74121)+P2483(x74121)
% 32.24/32.05 [7413]P2486(x74131)+~P2476(x74131)+P2475(x74131)
% 32.24/32.05 [7414]P2440(x74141)+~P2599(x74141)+P2441(x74141)
% 32.24/32.05 [7415]P2599(x74151)+~P2441(x74151)+P2440(x74151)
% 32.24/32.05 [7416]P2430(x74161)+~P2431(x74161)+P2599(x74161)
% 32.24/32.05 [7417]P2430(x74171)+~P2599(x74171)+P2431(x74171)
% 32.24/32.05 [7418]P2281(x74181)+~P2401(x74181)+P2404(x74181)
% 32.24/32.05 [7419]P2401(x74191)+~P2404(x74191)+P2281(x74191)
% 32.24/32.05 [7420]P2285(x74201)+~P2395(x74201)+P2281(x74201)
% 32.24/32.05 [7421]P2285(x74211)+~P2297(x74211)+P2281(x74211)
% 32.24/32.05 [7422]P2299(x74221)+~P2304(x74221)+P2281(x74221)
% 32.24/32.05 [7423]P2304(x74231)+~P2299(x74231)+P2281(x74231)
% 32.24/32.05 [7424]P2202(x74241)+~P2405(x74241)+P2401(x74241)
% 32.24/32.05 [7425]P2204(x74251)+~P2402(x74251)+P2403(x74251)
% 32.24/32.05 [7426]P2405(x74261)+~P2401(x74261)+P2202(x74261)
% 32.24/32.05 [7427]P2304(x74271)+~P2303(x74271)+P2202(x74271)
% 32.24/32.05 [7428]P2303(x74281)+~P2304(x74281)+P2202(x74281)
% 32.24/32.05 [7429]P2402(x74291)+~P2403(x74291)+P2204(x74291)
% 32.24/32.05 [7430]P2298(x74301)+~P2296(x74301)+P2204(x74301)
% 32.24/32.05 [7431]P2296(x74311)+~P2298(x74311)+P2204(x74311)
% 32.24/32.05 [7432]P2393(x74321)+~P2389(x74321)+P2381(x74321)
% 32.24/32.05 [7433]P2375(x74331)+~P2370(x74331)+P2374(x74331)
% 32.24/32.05 [7434]P2372(x74341)+~P2365(x74341)+P2358(x74341)
% 32.24/32.05 [7435]P2367(x74351)+~P2363(x74351)+P2359(x74351)
% 32.24/32.05 [7436]P2361(x74361)+~P2355(x74361)+P2344(x74361)
% 32.24/32.05 [7437]P2327(x74371)+~P2349(x74371)+P2316(x74371)
% 32.24/32.05 [7438]P2328(x74381)+~P2339(x74381)+P2317(x74381)
% 32.24/32.05 [7439]P2331(x74391)+~P2336(x74391)+P2318(x74391)
% 32.24/32.05 [7440]P2333(x74401)+~P2332(x74401)+P2300(x74401)
% 32.24/32.05 [7441]P2279(x74411)+~P2284(x74411)+P2286(x74411)
% 32.24/32.05 [7442]P2284(x74421)+~P2286(x74421)+P2279(x74421)
% 32.24/32.05 [7443]P2282(x74431)+~P2280(x74431)+P2279(x74431)
% 32.24/32.05 [7444]P2265(x74441)+~P2260(x74441)+P2264(x74441)
% 32.24/32.05 [7445]P2262(x74451)+~P2254(x74451)+P2248(x74451)
% 32.24/32.05 [7446]P2256(x74461)+~P2250(x74461)+P2249(x74461)
% 32.24/32.05 [7447]P2252(x74471)+~P2244(x74471)+P2209(x74471)
% 32.24/32.05 [7448]P2221(x74481)+~P2238(x74481)+P2210(x74481)
% 32.24/32.05 [7449]P2222(x74491)+~P2234(x74491)+P2211(x74491)
% 32.24/32.05 [7450]P2225(x74501)+~P2231(x74501)+P2212(x74501)
% 32.24/32.05 [7451]P2227(x74511)+~P2226(x74511)+P2186(x74511)
% 32.24/32.05 [7452]P1492(x74521)+~P1481(x74521)+P1482(x74521)
% 32.24/32.05 [7453]P1456(x74531)+~P1451(x74531)+P1445(x74531)
% 32.24/32.05 [7454]P1420(x74541)+~P1374(x74541)+P1381(x74541)
% 32.24/32.05 [7455]P1139(x74551)+~P1246(x74551)+P1113(x74551)
% 32.24/32.05 [7456]P1142(x74561)+~P1206(x74561)+P1080(x74561)
% 32.24/32.05 [7457]P1153(x74571)+~P1145(x74571)+P1066(x74571)
% 32.24/32.05 [7458]P905(x74581)+~P340(x74581)+P898(x74581)
% 32.24/32.05 [7459]P340(x74591)+~P898(x74591)+P905(x74591)
% 32.24/32.05 [7460]P707(x74601)+~P628(x74601)+P636(x74601)
% 32.24/32.05 [7461]P688(x74611)+~P636(x74611)+P651(x74611)
% 32.24/32.05 [7462]P702(x74621)+~P688(x74621)+P697(x74621)
% 32.24/32.05 [7463]P682(x74631)+~P663(x74631)+P672(x74631)
% 32.24/32.05 [7582]~P2147(x75821)+~P2156(x75821)+P2146(x75821)
% 32.24/32.05 [7583]~P2158(x75831)+~P2160(x75831)+P2157(x75831)
% 32.24/32.05 [7584]~P2161(x75841)+~P2163(x75841)+P2159(x75841)
% 32.24/32.05 [7585]~P2133(x75851)+~P2139(x75851)+P2134(x75851)
% 32.24/32.05 [7586]~P2090(x75861)+~P2136(x75861)+P2091(x75861)
% 32.24/32.05 [7587]~P2124(x75871)+~P366(x75871)+P2104(x75871)
% 32.24/32.05 [7588]~P2118(x75881)+~P363(x75881)+P2107(x75881)
% 32.24/32.05 [7589]~P2123(x75891)+~P368(x75891)+P2106(x75891)
% 32.24/32.05 [7590]~P2107(x75901)+~P198(x75901)+P2123(x75901)
% 32.24/32.05 [7591]~P2113(x75911)+~P407(x75911)+P2122(x75911)
% 32.24/32.05 [7592]~P2114(x75921)+~P351(x75921)+P2121(x75921)
% 32.24/32.05 [7593]~P2107(x75931)+~P198(x75931)+P2114(x75931)
% 32.24/32.05 [7594]~P2115(x75941)+~P410(x75941)+P2120(x75941)
% 32.24/32.05 [7595]~P2112(x75951)+~P404(x75951)+P2111(x75951)
% 32.24/32.05 [7596]~P2116(x75961)+~P329(x75961)+P2117(x75961)
% 32.24/32.05 [7597]~P2107(x75971)+~P198(x75971)+P2116(x75971)
% 32.24/32.05 [7598]~P629(x75981)+~P2534(x75981)+P2118(x75981)
% 32.24/32.05 [7599]~P2118(x75991)+~P363(x75991)+P2112(x75991)
% 32.24/32.05 [7600]~P527(x76001)+~P365(x76001)+P629(x76001)
% 32.24/32.05 [7601]~P2023(x76011)+~P2015(x76011)+P2005(x76011)
% 32.24/32.05 [7602]~P2024(x76021)+~P2014(x76021)+P2023(x76021)
% 32.24/32.05 [7603]~P2025(x76031)+~P2012(x76031)+P2024(x76031)
% 32.24/32.05 [7604]~P2026(x76041)+~P2011(x76041)+P2025(x76041)
% 32.24/32.05 [7605]~P2027(x76051)+~P2010(x76051)+P2026(x76051)
% 32.24/32.05 [7606]~P2028(x76061)+~P2009(x76061)+P2027(x76061)
% 32.24/32.05 [7607]~P2006(x76071)+~P2008(x76071)+P2028(x76071)
% 32.24/32.05 [7608]~P1987(x76081)+~P1990(x76081)+P2489(x76081)
% 32.24/32.05 [7609]~P2489(x76091)+~P1987(x76091)+P1990(x76091)
% 32.24/32.05 [7610]~P1923(x76101)+~P1935(x76101)+P1972(x76101)
% 32.24/32.05 [7611]~P407(x76111)+~P1973(x76111)+P1963(x76111)
% 32.24/32.05 [7612]~P1933(x76121)+~P525(x76121)+P1973(x76121)
% 32.24/32.05 [7613]~P631(x76131)+~P199(x76131)+P1933(x76131)
% 32.24/32.05 [7614]~P404(x76141)+~P1970(x76141)+P1965(x76141)
% 32.24/32.05 [7615]~P410(x76151)+~P1971(x76151)+P1964(x76151)
% 32.24/32.05 [7616]~P1933(x76161)+~P525(x76161)+P1971(x76161)
% 32.24/32.05 [7617]~P1933(x76171)+~P525(x76171)+P1970(x76171)
% 32.24/32.05 [7618]~P1937(x76181)+~P1927(x76181)+P1906(x76181)
% 32.24/32.05 [7619]~P1958(x76191)+~P1955(x76191)+P1957(x76191)
% 32.24/32.05 [7620]~P1944(x76201)+~P1956(x76201)+P1959(x76201)
% 32.24/32.05 [7621]~P1945(x76211)+~P1926(x76211)+P1944(x76211)
% 32.24/32.05 [7622]~P2155(x76221)+~P1935(x76221)+P1932(x76221)
% 32.24/32.05 [7623]~P366(x76231)+~P1934(x76231)+P1928(x76231)
% 32.24/32.05 [7624]~P1933(x76241)+~P525(x76241)+P1934(x76241)
% 32.24/32.05 [7625]~P363(x76251)+~P635(x76251)+P631(x76251)
% 32.24/32.05 [7626]~P368(x76261)+~P1931(x76261)+P1929(x76261)
% 32.24/32.05 [7627]~P525(x76271)+~P1922(x76271)+P1931(x76271)
% 32.24/32.05 [7628]~P199(x76281)+~P645(x76281)+P1922(x76281)
% 32.24/32.05 [7629]~P329(x76291)+~P1921(x76291)+P1909(x76291)
% 32.24/32.05 [7630]~P351(x76301)+~P1930(x76301)+P1908(x76301)
% 32.24/32.05 [7631]~P525(x76311)+~P1922(x76311)+P1930(x76311)
% 32.24/32.05 [7632]~P525(x76321)+~P1922(x76321)+P1921(x76321)
% 32.24/32.05 [7633]~P198(x76331)+~P631(x76331)+P645(x76331)
% 32.24/32.05 [7634]~P1900(x76341)+~P1904(x76341)+P1903(x76341)
% 32.24/32.05 [7635]~P2544(x76351)+~P278(x76351)+P2542(x76351)
% 32.24/32.05 [7636]~P1884(x76361)+~P1890(x76361)+P1885(x76361)
% 32.24/32.05 [7637]~P1880(x76371)+~P1887(x76371)+P1881(x76371)
% 32.24/32.05 [7638]~P1876(x76381)+~P1883(x76381)+P1877(x76381)
% 32.24/32.05 [7639]~P1870(x76391)+~P1879(x76391)+P1871(x76391)
% 32.24/32.05 [7640]~P1862(x76401)+~P1866(x76401)+P1863(x76401)
% 32.24/32.05 [7641]~P1858(x76411)+~P1864(x76411)+P1859(x76411)
% 32.24/32.05 [7642]~P1854(x76421)+~P1860(x76421)+P1855(x76421)
% 32.24/32.05 [7643]~P1849(x76431)+~P1856(x76431)+P1850(x76431)
% 32.24/32.05 [7644]~P1825(x76441)+~P1852(x76441)+P1826(x76441)
% 32.24/32.05 [7645]~P1838(x76451)+~P1851(x76451)+P1839(x76451)
% 32.24/32.05 [7646]~P1837(x76461)+~P1848(x76461)+P1840(x76461)
% 32.24/32.05 [7647]~P1836(x76471)+~P1847(x76471)+P1841(x76471)
% 32.24/32.05 [7648]~P1745(x76481)+~P1749(x76481)+P1811(x76481)
% 32.24/32.05 [7649]~P1809(x76491)+~P1795(x76491)+P1808(x76491)
% 32.24/32.05 [7650]~P807(x76501)+~P1734(x76501)+P998(x76501)
% 32.24/32.05 [7651]~P1782(x76511)+~P2394(x76511)+P1809(x76511)
% 32.24/32.05 [7652]~P800(x76521)+~P810(x76521)+P1782(x76521)
% 32.24/32.05 [7653]~P1771(x76531)+~P1804(x76531)+P1755(x76531)
% 32.24/32.05 [7654]~P1755(x76541)+~P1771(x76541)+P1804(x76541)
% 32.24/32.05 [7655]~P1756(x76551)+~P1742(x76551)+P1802(x76551)
% 32.24/32.05 [7656]~P1778(x76561)+~P1805(x76561)+P1803(x76561)
% 32.24/32.05 [7657]~P1802(x76571)+~P1756(x76571)+P1742(x76571)
% 32.24/32.05 [7658]~P1767(x76581)+~P1779(x76581)+P1778(x76581)
% 32.24/32.05 [7659]~P1803(x76591)+~P1778(x76591)+P1805(x76591)
% 32.24/32.05 [7660]~P1781(x76601)+~P1801(x76601)+P1805(x76601)
% 32.24/32.05 [7661]~P1785(x76611)+~P1807(x76611)+P1805(x76611)
% 32.24/32.05 [7662]~P1786(x76621)+~P1790(x76621)+P1785(x76621)
% 32.24/32.05 [7663]~P1805(x76631)+~P1785(x76631)+P1807(x76631)
% 32.24/32.05 [7664]~P1805(x76641)+~P1781(x76641)+P1801(x76641)
% 32.24/32.05 [7665]~P1777(x76651)+~P1796(x76651)+P1775(x76651)
% 32.24/32.05 [7666]~P1758(x76661)+~P1797(x76661)+P1798(x76661)
% 32.24/32.05 [7667]~P1791(x76671)+~P1794(x76671)+P1789(x76671)
% 32.24/32.05 [7668]~P1758(x76681)+~P1792(x76681)+P1793(x76681)
% 32.24/32.05 [7669]~P1758(x76691)+~P1787(x76691)+P1788(x76691)
% 32.24/32.05 [7670]~P1739(x76701)+~P1746(x76701)+P1736(x76701)
% 32.24/32.05 [7671]~P1705(x76711)+~P1708(x76711)+P1706(x76711)
% 32.24/32.05 [7672]~P1699(x76721)+~P1707(x76721)+P1700(x76721)
% 32.24/32.05 [7673]~P1695(x76731)+~P1701(x76731)+P1696(x76731)
% 32.24/32.05 [7674]~P1689(x76741)+~P1697(x76741)+P1690(x76741)
% 32.24/32.05 [7675]~P1663(x76751)+~P1691(x76751)+P1664(x76751)
% 32.24/32.05 [7676]~P2523(x76761)+~P784(x76761)+P2444(x76761)
% 32.24/32.05 [7677]~P1677(x76771)+~P1678(x76771)+P1673(x76771)
% 32.24/32.05 [7678]~P1682(x76781)+~P1683(x76781)+P1675(x76781)
% 32.24/32.05 [7679]~P1687(x76791)+~P1688(x76791)+P1680(x76791)
% 32.24/32.05 [7680]~P1692(x76801)+~P1693(x76801)+P1684(x76801)
% 32.24/32.05 [7681]~P1611(x76811)+~P1680(x76811)+P1667(x76811)
% 32.24/32.05 [7682]~P1610(x76821)+~P1675(x76821)+P1668(x76821)
% 32.24/32.05 [7683]~P1670(x76831)+~P1673(x76831)+P1671(x76831)
% 32.24/32.05 [7684]~P1810(x76841)+~P1651(x76841)+P1641(x76841)
% 32.24/32.05 [7685]~P1810(x76851)+~P1614(x76851)+P1650(x76851)
% 32.24/32.05 [7686]~P1553(x76861)+~P1656(x76861)+P1653(x76861)
% 32.24/32.05 [7687]~P1557(x76871)+~P1657(x76871)+P1656(x76871)
% 32.24/32.05 [7688]~P1563(x76881)+~P1655(x76881)+P1657(x76881)
% 32.24/32.05 [7689]~P1562(x76891)+~P1567(x76891)+P1655(x76891)
% 32.24/32.05 [7690]~P2523(x76901)+~P1012(x76901)+P1008(x76901)
% 32.24/32.05 [7691]~P1021(x76911)+~P2523(x76911)+P981(x76911)
% 32.24/32.05 [7692]~P1637(x76921)+~P1642(x76921)+P1638(x76921)
% 32.24/32.05 [7693]~P1632(x76931)+~P1639(x76931)+P1633(x76931)
% 32.24/32.05 [7694]~P1628(x76941)+~P1634(x76941)+P1629(x76941)
% 32.24/32.05 [7695]~P1619(x76951)+~P1630(x76951)+P1620(x76951)
% 32.24/32.05 [7696]~P1008(x76961)+~P1608(x76961)+P1593(x76961)
% 32.24/32.05 [7697]~P1810(x76971)+~P1595(x76971)+P1584(x76971)
% 32.24/32.05 [7698]~P1597(x76981)+~P1600(x76981)+P1594(x76981)
% 32.24/32.05 [7699]~P981(x76991)+~P1532(x76991)+P1533(x76991)
% 32.24/32.05 [7700]~P1586(x77001)+~P1590(x77001)+P1587(x77001)
% 32.24/32.05 [7701]~P1581(x77011)+~P1588(x77011)+P1582(x77011)
% 32.24/32.05 [7702]~P1578(x77021)+~P1583(x77021)+P1579(x77021)
% 32.24/32.05 [7703]~P1568(x77031)+~P1580(x77031)+P1569(x77031)
% 32.24/32.05 [7704]~P1557(x77041)+~P1537(x77041)+P1572(x77041)
% 32.24/32.05 [7705]~P1563(x77051)+~P1536(x77051)+P1573(x77051)
% 32.24/32.05 [7706]~P1564(x77061)+~P1570(x77061)+P1565(x77061)
% 32.24/32.05 [7707]~P1558(x77071)+~P1566(x77071)+P1559(x77071)
% 32.24/32.05 [7708]~P1554(x77081)+~P1560(x77081)+P1555(x77081)
% 32.24/32.05 [7709]~P1545(x77091)+~P1556(x77091)+P1546(x77091)
% 32.24/32.05 [7710]~P1020(x77101)+~P1411(x77101)+P1531(x77101)
% 32.24/32.05 [7711]~P1037(x77111)+~P1524(x77111)+P1020(x77111)
% 32.24/32.05 [7712]~P1493(x77121)+~P663(x77121)+P1491(x77121)
% 32.24/32.05 [7713]~P1506(x77131)+~P1454(x77131)+P1504(x77131)
% 32.24/32.05 [7714]~P1123(x77141)+~P1112(x77141)+P1121(x77141)
% 32.24/32.05 [7715]~P1457(x77151)+~P1461(x77151)+P1040(x77151)
% 32.24/32.05 [7716]~P1040(x77161)+~P1457(x77161)+P1461(x77161)
% 32.24/32.05 [7717]~P1455(x77171)+~P1415(x77171)+P1447(x77171)
% 32.24/32.05 [7718]~P1042(x77181)+~P1452(x77181)+P1455(x77181)
% 32.24/32.05 [7719]~P1448(x77191)+~P1450(x77191)+P1449(x77191)
% 32.24/32.05 [7720]~P1042(x77201)+~P1081(x77201)+P1448(x77201)
% 32.24/32.05 [7721]~P1418(x77211)+~P1138(x77211)+P1126(x77211)
% 32.24/32.05 [7722]~P1416(x77221)+~P1130(x77221)+P1417(x77221)
% 32.24/32.05 [7723]~P1136(x77231)+~P1111(x77231)+P1130(x77231)
% 32.24/32.05 [7724]~P1130(x77241)+~P1124(x77241)+P1418(x77241)
% 32.24/32.05 [7725]~P1403(x77251)+~P1406(x77251)+P1404(x77251)
% 32.24/32.05 [7726]~P1398(x77261)+~P1405(x77261)+P1399(x77261)
% 32.24/32.05 [7727]~P1352(x77271)+~P1396(x77271)+P1353(x77271)
% 32.24/32.05 [7728]~P1395(x77281)+~P1397(x77281)+P1349(x77281)
% 32.24/32.05 [7729]~P1389(x77291)+~P1390(x77291)+P1350(x77291)
% 32.24/32.05 [7730]~P1350(x77301)+~P1387(x77301)+P1375(x77301)
% 32.24/32.05 [7731]~P1380(x77311)+~P1385(x77311)+P1351(x77311)
% 32.24/32.05 [7732]~P1382(x77321)+~P1383(x77321)+P1377(x77321)
% 32.24/32.05 [7733]~P1377(x77331)+~P1384(x77331)+P1378(x77331)
% 32.24/32.05 [7734]~P1081(x77341)+~P1135(x77341)+P1136(x77341)
% 32.24/32.05 [7735]~P1042(x77351)+~P1131(x77351)+P1135(x77351)
% 32.24/32.05 [7736]~P663(x77361)+~P1137(x77361)+P1129(x77361)
% 32.24/32.05 [7737]~P1042(x77371)+~P1122(x77371)+P1114(x77371)
% 32.24/32.05 [7738]~P1042(x77381)+~P1120(x77381)+P1115(x77381)
% 32.24/32.05 [7739]~P1116(x77391)+~P1119(x77391)+P1117(x77391)
% 32.24/32.05 [7740]~P1042(x77401)+~P1081(x77401)+P1116(x77401)
% 32.24/32.05 [7741]~P1101(x77411)+~P1079(x77411)+P1063(x77411)
% 32.24/32.05 [7742]~P1081(x77421)+~P1102(x77421)+P1101(x77421)
% 32.24/32.05 [7743]~P1060(x77431)+~P1062(x77431)+P1044(x77431)
% 32.24/32.05 [7744]~P1057(x77441)+~P1056(x77441)+P1060(x77441)
% 32.24/32.05 [7745]~P980(x77451)+~P1058(x77451)+P1059(x77451)
% 32.24/32.05 [7746]~P968(x77461)+~P1003(x77461)+P825(x77461)
% 32.24/32.05 [7747]~P825(x77471)+~P968(x77471)+P1003(x77471)
% 32.24/32.05 [7748]~P813(x77481)+~P522(x77481)+P1001(x77481)
% 32.24/32.05 [7749]~P975(x77491)+~P1005(x77491)+P1002(x77491)
% 32.24/32.05 [7750]~P1001(x77501)+~P813(x77501)+P522(x77501)
% 32.24/32.05 [7751]~P878(x77511)+~P976(x77511)+P975(x77511)
% 32.24/32.05 [7752]~P1002(x77521)+~P975(x77521)+P1005(x77521)
% 32.24/32.05 [7753]~P978(x77531)+~P1000(x77531)+P1005(x77531)
% 32.24/32.05 [7754]~P985(x77541)+~P1007(x77541)+P1005(x77541)
% 32.24/32.05 [7755]~P986(x77551)+~P990(x77551)+P985(x77551)
% 32.24/32.05 [7756]~P1005(x77561)+~P985(x77561)+P1007(x77561)
% 32.24/32.05 [7757]~P1005(x77571)+~P978(x77571)+P1000(x77571)
% 32.24/32.05 [7758]~P974(x77581)+~P982(x77581)+P972(x77581)
% 32.24/32.05 [7759]~P836(x77591)+~P995(x77591)+P996(x77591)
% 32.24/32.05 [7760]~P991(x77601)+~P997(x77601)+P989(x77601)
% 32.24/32.05 [7761]~P836(x77611)+~P993(x77611)+P994(x77611)
% 32.24/32.05 [7762]~P836(x77621)+~P987(x77621)+P988(x77621)
% 32.24/32.05 [7763]~P883(x77631)+~P937(x77631)+P882(x77631)
% 32.24/32.05 [7764]~P959(x77641)+~P962(x77641)+P904(x77641)
% 32.24/32.05 [7765]~P904(x77651)+~P959(x77651)+P962(x77651)
% 32.24/32.05 [7766]~P933(x77661)+~P936(x77661)+P180(x77661)
% 32.24/32.05 [7767]~P180(x77671)+~P933(x77671)+P936(x77671)
% 32.24/32.05 [7768]~P938(x77681)+~P890(x77681)+P939(x77681)
% 32.24/32.05 [7769]~P927(x77691)+~P930(x77691)+P928(x77691)
% 32.24/32.05 [7770]~P929(x77701)+~P931(x77701)+P928(x77701)
% 32.24/32.05 [7771]~P928(x77711)+~P929(x77711)+P931(x77711)
% 32.24/32.05 [7772]~P928(x77721)+~P927(x77721)+P930(x77721)
% 32.24/32.05 [7773]~P1782(x77731)+~P800(x77731)+P810(x77731)
% 32.24/32.05 [7774]~P2394(x77741)+~P2444(x77741)+P782(x77741)
% 32.24/32.05 [7775]~P785(x77751)+~P791(x77751)+P786(x77751)
% 32.24/32.05 [7776]~P778(x77761)+~P788(x77761)+P779(x77761)
% 32.24/32.05 [7777]~P771(x77771)+~P781(x77771)+P772(x77771)
% 32.24/32.05 [7778]~P524(x77781)+~P755(x77781)+P764(x77781)
% 32.24/32.05 [7779]~P407(x77791)+~P765(x77791)+P748(x77791)
% 32.24/32.05 [7780]~P384(x77801)+~P637(x77801)+P765(x77801)
% 32.24/32.05 [7781]~P363(x77811)+~P398(x77811)+P384(x77811)
% 32.24/32.05 [7782]~P404(x77821)+~P762(x77821)+P750(x77821)
% 32.24/32.05 [7783]~P410(x77831)+~P763(x77831)+P749(x77831)
% 32.24/32.05 [7784]~P384(x77841)+~P637(x77841)+P763(x77841)
% 32.24/32.05 [7785]~P384(x77851)+~P637(x77851)+P762(x77851)
% 32.24/32.05 [7786]~P2155(x77861)+~P755(x77861)+P751(x77861)
% 32.24/32.05 [7787]~P366(x77871)+~P752(x77871)+P743(x77871)
% 32.24/32.05 [7788]~P384(x77881)+~P637(x77881)+P752(x77881)
% 32.24/32.05 [7789]~P368(x77891)+~P747(x77891)+P744(x77891)
% 32.24/32.05 [7790]~P637(x77901)+~P402(x77901)+P747(x77901)
% 32.24/32.05 [7791]~P198(x77911)+~P384(x77911)+P402(x77911)
% 32.24/32.05 [7792]~P329(x77921)+~P742(x77921)+P737(x77921)
% 32.24/32.05 [7793]~P351(x77931)+~P746(x77931)+P745(x77931)
% 32.24/32.05 [7794]~P637(x77941)+~P402(x77941)+P746(x77941)
% 32.24/32.05 [7795]~P637(x77951)+~P402(x77951)+P742(x77951)
% 32.24/32.05 [7796]~P722(x77961)+~P638(x77961)+P2547(x77961)
% 32.24/32.05 [7797]~P723(x77971)+~P730(x77971)+P724(x77971)
% 32.24/32.05 [7798]~P717(x77981)+~P726(x77981)+P718(x77981)
% 32.24/32.05 [7799]~P704(x77991)+~P720(x77991)+P705(x77991)
% 32.24/32.05 [7800]~P201(x78001)+~P272(x78001)+P177(x78001)
% 32.24/32.05 [7801]~P281(x78011)+~P284(x78011)+P279(x78011)
% 32.24/32.05 [7802]~P366(x78021)+~P703(x78021)+P642(x78021)
% 32.24/32.05 [7803]~P2542(x78031)+~P633(x78031)+P703(x78031)
% 32.24/32.05 [7804]~P631(x78041)+~P526(x78041)+P633(x78041)
% 32.24/32.05 [7805]~P368(x78051)+~P701(x78051)+P673(x78051)
% 32.24/32.05 [7806]~P2542(x78061)+~P650(x78061)+P701(x78061)
% 32.24/32.05 [7807]~P645(x78071)+~P526(x78071)+P650(x78071)
% 32.24/32.05 [7808]~P407(x78081)+~P700(x78081)+P674(x78081)
% 32.24/32.05 [7809]~P2542(x78091)+~P633(x78091)+P700(x78091)
% 32.24/32.05 [7810]~P351(x78101)+~P699(x78101)+P675(x78101)
% 32.24/32.05 [7811]~P2542(x78111)+~P650(x78111)+P699(x78111)
% 32.24/32.05 [7812]~P410(x78121)+~P698(x78121)+P676(x78121)
% 32.24/32.05 [7813]~P2542(x78131)+~P633(x78131)+P698(x78131)
% 32.24/32.05 [7814]~P404(x78141)+~P695(x78141)+P678(x78141)
% 32.24/32.05 [7815]~P329(x78151)+~P696(x78151)+P677(x78151)
% 32.24/32.05 [7816]~P2542(x78161)+~P650(x78161)+P696(x78161)
% 32.24/32.05 [7817]~P2542(x78171)+~P633(x78171)+P695(x78171)
% 32.24/32.05 [7818]~P366(x78181)+~P680(x78181)+P643(x78181)
% 32.24/32.05 [7819]~P525(x78191)+~P633(x78191)+P679(x78191)
% 32.24/32.05 [7820]~P363(x78201)+~P630(x78201)+P615(x78201)
% 32.24/32.05 [7821]~P368(x78211)+~P670(x78211)+P644(x78211)
% 32.24/32.05 [7822]~P198(x78221)+~P615(x78221)+P669(x78221)
% 32.24/32.05 [7823]~P525(x78231)+~P650(x78231)+P671(x78231)
% 32.24/32.05 [7824]~P407(x78241)+~P665(x78241)+P661(x78241)
% 32.24/32.05 [7825]~P525(x78251)+~P633(x78251)+P667(x78251)
% 32.24/32.05 [7826]~P351(x78261)+~P660(x78261)+P653(x78261)
% 32.24/32.05 [7827]~P198(x78271)+~P615(x78271)+P652(x78271)
% 32.24/32.05 [7828]~P525(x78281)+~P650(x78281)+P662(x78281)
% 32.24/32.05 [7829]~P410(x78291)+~P656(x78291)+P654(x78291)
% 32.24/32.05 [7830]~P525(x78301)+~P633(x78301)+P658(x78301)
% 32.24/32.05 [7831]~P404(x78311)+~P626(x78311)+P617(x78311)
% 32.24/32.05 [7832]~P329(x78321)+~P648(x78321)+P647(x78321)
% 32.24/32.05 [7833]~P198(x78331)+~P615(x78331)+P646(x78331)
% 32.24/32.05 [7834]~P525(x78341)+~P650(x78341)+P649(x78341)
% 32.24/32.05 [7835]~P629(x78351)+~P364(x78351)+P630(x78351)
% 32.24/32.05 [7836]~P525(x78361)+~P633(x78361)+P632(x78361)
% 32.24/32.05 [7837]~P634(x78371)+~P364(x78371)+P635(x78371)
% 32.24/32.05 [7838]~P2518(x78381)+~P527(x78381)+P634(x78381)
% 32.24/32.05 [7839]~P363(x78391)+~P630(x78391)+P616(x78391)
% 32.24/32.05 [7840]~P297(x78401)+~P619(x78401)+P299(x78401)
% 32.24/32.05 [7841]~P611(x78411)+~P614(x78411)+P306(x78411)
% 32.24/32.05 [7842]~P306(x78421)+~P611(x78421)+P614(x78421)
% 32.24/32.05 [7843]~P572(x78431)+~P588(x78431)+P310(x78431)
% 32.24/32.05 [7844]~P310(x78441)+~P572(x78441)+P588(x78441)
% 32.24/32.05 [7845]~P542(x78451)+~P598(x78451)+P588(x78451)
% 32.24/32.05 [7846]~P588(x78461)+~P542(x78461)+P598(x78461)
% 32.24/32.05 [7847]~P311(x78471)+~P587(x78471)+P598(x78471)
% 32.24/32.05 [7848]~P563(x78481)+~P540(x78481)+P575(x78481)
% 32.24/32.05 [7849]~P553(x78491)+~P541(x78491)+P576(x78491)
% 32.24/32.05 [7850]~P598(x78501)+~P311(x78501)+P587(x78501)
% 32.24/32.05 [7851]~P601(x78511)+~P523(x78511)+P599(x78511)
% 32.24/32.05 [7852]~P534(x78521)+~P539(x78521)+P181(x78521)
% 32.24/32.05 [7853]~P181(x78531)+~P534(x78531)+P539(x78531)
% 32.24/32.05 [7854]~P516(x78541)+~P514(x78541)+P515(x78541)
% 32.24/32.05 [7855]~P495(x78551)+~P498(x78551)+P319(x78551)
% 32.24/32.05 [7856]~P319(x78561)+~P495(x78561)+P498(x78561)
% 32.24/32.05 [7857]~P490(x78571)+~P442(x78571)+P493(x78571)
% 32.24/32.05 [7858]~P297(x78581)+~P480(x78581)+P490(x78581)
% 32.24/32.05 [7859]~P481(x78591)+~P434(x78591)+P489(x78591)
% 32.24/32.05 [7860]~P491(x78601)+~P440(x78601)+P492(x78601)
% 32.24/32.05 [7861]~P297(x78611)+~P480(x78611)+P491(x78611)
% 32.24/32.05 [7862]~P440(x78621)+~P422(x78621)+P469(x78621)
% 32.24/32.05 [7863]~P442(x78631)+~P471(x78631)+P454(x78631)
% 32.24/32.05 [7864]~P427(x78641)+~P466(x78641)+P467(x78641)
% 32.24/32.05 [7865]~P434(x78651)+~P465(x78651)+P457(x78651)
% 32.24/32.05 [7866]~P440(x78661)+~P468(x78661)+P455(x78661)
% 32.24/32.05 [7867]~P297(x78671)+~P320(x78671)+P427(x78671)
% 32.24/32.05 [7868]~P320(x78681)+~P466(x78681)+P456(x78681)
% 32.24/32.05 [7869]~P442(x78691)+~P423(x78691)+P451(x78691)
% 32.24/32.05 [7870]~P442(x78701)+~P441(x78701)+P439(x78701)
% 32.24/32.05 [7871]~P437(x78711)+~P435(x78711)+P441(x78711)
% 32.24/32.05 [7872]~P434(x78721)+~P433(x78721)+P430(x78721)
% 32.24/32.05 [7873]~P440(x78731)+~P438(x78731)+P428(x78731)
% 32.24/32.05 [7874]~P437(x78741)+~P435(x78741)+P438(x78741)
% 32.24/32.05 [7875]~P435(x78751)+~P429(x78751)+P433(x78751)
% 32.24/32.05 [7876]~P366(x78761)+~P416(x78761)+P400(x78761)
% 32.24/32.05 [7877]~P384(x78771)+~P286(x78771)+P416(x78771)
% 32.24/32.05 [7878]~P368(x78781)+~P415(x78781)+P401(x78781)
% 32.24/32.05 [7879]~P402(x78791)+~P286(x78791)+P415(x78791)
% 32.24/32.05 [7880]~P407(x78801)+~P414(x78801)+P408(x78801)
% 32.24/32.05 [7881]~P384(x78811)+~P286(x78811)+P414(x78811)
% 32.24/32.05 [7882]~P351(x78821)+~P413(x78821)+P409(x78821)
% 32.24/32.05 [7883]~P402(x78831)+~P286(x78831)+P413(x78831)
% 32.24/32.05 [7884]~P410(x78841)+~P412(x78841)+P411(x78841)
% 32.24/32.05 [7885]~P384(x78851)+~P286(x78851)+P412(x78851)
% 32.24/32.05 [7886]~P404(x78861)+~P397(x78861)+P385(x78861)
% 32.24/32.05 [7887]~P329(x78871)+~P405(x78871)+P403(x78871)
% 32.24/32.05 [7888]~P402(x78881)+~P286(x78881)+P405(x78881)
% 32.24/32.05 [7889]~P384(x78891)+~P286(x78891)+P397(x78891)
% 32.24/32.05 [7890]~P364(x78901)+~P399(x78901)+P398(x78901)
% 32.24/32.05 [7891]~P365(x78911)+~P2519(x78911)+P399(x78911)
% 32.24/32.05 [7892]~P366(x78921)+~P383(x78921)+P367(x78921)
% 32.24/32.05 [7893]~P368(x78931)+~P382(x78931)+P369(x78931)
% 32.24/32.05 [7894]~P198(x78941)+~P2155(x78941)+P382(x78941)
% 32.24/32.05 [7895]~P329(x78951)+~P371(x78951)+P372(x78951)
% 32.24/32.05 [7896]~P351(x78961)+~P370(x78961)+P381(x78961)
% 32.24/32.05 [7897]~P198(x78971)+~P2155(x78971)+P370(x78971)
% 32.24/32.05 [7898]~P198(x78981)+~P2155(x78981)+P371(x78981)
% 32.24/32.05 [7899]~P368(x78991)+~P293(x78991)+P358(x78991)
% 32.24/32.05 [7900]~P351(x79001)+~P294(x79001)+P338(x79001)
% 32.24/32.05 [7901]~P329(x79011)+~P295(x79011)+P324(x79011)
% 32.24/32.05 [7902]~P2544(x79021)+~P200(x79021)+P281(x79021)
% 32.24/32.05 [7903]~P202(x79031)+~P276(x79031)+P271(x79031)
% 32.24/32.05 [7904]~P256(x79041)+~P263(x79041)+P257(x79041)
% 32.24/32.05 [7905]~P252(x79051)+~P259(x79051)+P253(x79051)
% 32.24/32.05 [7906]~P248(x79061)+~P255(x79061)+P249(x79061)
% 32.24/32.05 [7907]~P242(x79071)+~P251(x79071)+P243(x79071)
% 32.24/32.05 [7908]~P234(x79081)+~P238(x79081)+P235(x79081)
% 32.24/32.05 [7909]~P230(x79091)+~P236(x79091)+P231(x79091)
% 32.24/32.05 [7910]~P227(x79101)+~P232(x79101)+P228(x79101)
% 32.24/32.05 [7911]~P221(x79111)+~P229(x79111)+P222(x79111)
% 32.24/32.05 [7912]~P193(x79121)+~P224(x79121)+P194(x79121)
% 32.24/32.05 [7913]~P210(x79131)+~P223(x79131)+P211(x79131)
% 32.24/32.05 [7914]~P209(x79141)+~P220(x79141)+P212(x79141)
% 32.24/32.05 [7915]~P208(x79151)+~P219(x79151)+P213(x79151)
% 32.24/32.05 [7916]~P2556(x79161)+~P160(x79161)+P161(x79161)
% 32.24/32.05 [7917]~P2586(x79171)+~P2592(x79171)+P2587(x79171)
% 32.24/32.05 [7918]~P2580(x79181)+~P2589(x79181)+P2581(x79181)
% 32.24/32.05 [7919]~P2573(x79191)+~P2583(x79191)+P2574(x79191)
% 32.24/32.05 [7920]~P2461(x79201)+~P2504(x79201)+P2509(x79201)
% 32.24/32.05 [7921]~P2490(x79211)+~P2496(x79211)+P2491(x79211)
% 32.24/32.05 [7922]~P2484(x79221)+~P2493(x79221)+P2485(x79221)
% 32.24/32.05 [7923]~P2476(x79231)+~P2487(x79231)+P2477(x79231)
% 32.24/32.05 [7924]~P2436(x79241)+~P2442(x79241)+P2407(x79241)
% 32.24/32.05 [7925]~P2407(x79251)+~P2436(x79251)+P2442(x79251)
% 32.24/32.05 [7926]~P2440(x79261)+~P2410(x79261)+P2441(x79261)
% 32.24/32.05 [7927]~P2413(x79271)+~P2443(x79271)+P2440(x79271)
% 32.24/32.05 [7928]~P2441(x79281)+~P2440(x79281)+P2410(x79281)
% 32.24/32.05 [7929]~P2426(x79291)+~P2432(x79291)+P2181(x79291)
% 32.24/32.05 [7930]~P2181(x79301)+~P2426(x79301)+P2432(x79301)
% 32.24/32.05 [7931]~P2430(x79311)+~P2418(x79311)+P2431(x79311)
% 32.24/32.05 [7932]~P2414(x79321)+~P2433(x79321)+P2430(x79321)
% 32.24/32.05 [7933]~P2431(x79331)+~P2430(x79331)+P2418(x79331)
% 32.24/32.05 [7934]~P2395(x79341)+~P2404(x79341)+P1913(x79341)
% 32.24/32.05 [7935]~P1913(x79351)+~P2395(x79351)+P2404(x79351)
% 32.24/32.05 [7936]~P2281(x79361)+~P2403(x79361)+P2404(x79361)
% 32.24/32.05 [7937]~P2404(x79371)+~P2281(x79371)+P2403(x79371)
% 32.24/32.05 [7938]~P2381(x79381)+~P2390(x79381)+P2391(x79381)
% 32.24/32.05 [7939]~P2281(x79391)+~P2380(x79391)+P2381(x79391)
% 32.24/32.05 [7940]~P2391(x79401)+~P2381(x79401)+P2390(x79401)
% 32.24/32.05 [7941]~P2202(x79411)+~P2285(x79411)+P2393(x79411)
% 32.24/32.05 [7942]~P2370(x79421)+~P2376(x79421)+P2371(x79421)
% 32.24/32.05 [7943]~P2365(x79431)+~P2373(x79431)+P2366(x79431)
% 32.24/32.05 [7944]~P2363(x79441)+~P2368(x79441)+P2364(x79441)
% 32.24/32.05 [7945]~P2355(x79451)+~P2362(x79451)+P2356(x79451)
% 32.24/32.05 [7946]~P2347(x79461)+~P2351(x79461)+P2348(x79461)
% 32.24/32.05 [7947]~P2337(x79471)+~P2349(x79471)+P2338(x79471)
% 32.24/32.05 [7948]~P2334(x79481)+~P2339(x79481)+P2335(x79481)
% 32.24/32.05 [7949]~P2329(x79491)+~P2336(x79491)+P2330(x79491)
% 32.24/32.05 [7950]~P2311(x79501)+~P2332(x79501)+P2312(x79501)
% 32.24/32.05 [7951]~P2318(x79511)+~P2331(x79511)+P2319(x79511)
% 32.24/32.05 [7952]~P2317(x79521)+~P2328(x79521)+P2320(x79521)
% 32.24/32.05 [7953]~P2316(x79531)+~P2327(x79531)+P2322(x79531)
% 32.24/32.05 [7954]~P2297(x79541)+~P2299(x79541)+P2170(x79541)
% 32.24/32.05 [7955]~P2281(x79551)+~P2298(x79551)+P2299(x79551)
% 32.24/32.05 [7956]~P2170(x79561)+~P2297(x79561)+P2299(x79561)
% 32.24/32.05 [7957]~P2281(x79571)+~P2299(x79571)+P2298(x79571)
% 32.24/32.05 [7958]~P2281(x79581)+~P2204(x79581)+P2279(x79581)
% 32.24/32.05 [7959]~P2285(x79591)+~P2203(x79591)+P2282(x79591)
% 32.24/32.05 [7960]~P2260(x79601)+~P2266(x79601)+P2261(x79601)
% 32.24/32.05 [7961]~P2254(x79611)+~P2263(x79611)+P2255(x79611)
% 32.24/32.05 [7962]~P2250(x79621)+~P2257(x79621)+P2251(x79621)
% 32.24/32.05 [7963]~P2244(x79631)+~P2253(x79631)+P2245(x79631)
% 32.24/32.05 [7964]~P2236(x79641)+~P2240(x79641)+P2237(x79641)
% 32.24/32.05 [7965]~P2232(x79651)+~P2238(x79651)+P2233(x79651)
% 32.24/32.05 [7966]~P2229(x79661)+~P2234(x79661)+P2230(x79661)
% 32.24/32.05 [7967]~P2223(x79671)+~P2231(x79671)+P2224(x79671)
% 32.24/32.05 [7968]~P2197(x79681)+~P2226(x79681)+P2198(x79681)
% 32.24/32.05 [7969]~P2212(x79691)+~P2225(x79691)+P2213(x79691)
% 32.24/32.05 [7970]~P2211(x79701)+~P2222(x79701)+P2214(x79701)
% 32.24/32.05 [7971]~P2210(x79711)+~P2221(x79711)+P2215(x79711)
% 32.24/32.05 [7972]~P2169(x79721)+~P2140(x79721)+P2166(x79721)
% 32.24/32.05 [7973]~P1481(x79731)+~P1503(x79731)+P1470(x79731)
% 32.24/32.05 [7974]~P1451(x79741)+~P1468(x79741)+P1444(x79741)
% 32.24/32.05 [7975]~P1374(x79751)+~P1427(x79751)+P1354(x79751)
% 32.24/32.05 [7976]~P1269(x79761)+~P1285(x79761)+P1258(x79761)
% 32.24/32.05 [7977]~P1224(x79771)+~P1246(x79771)+P1215(x79771)
% 32.24/32.05 [7978]~P1180(x79781)+~P1206(x79781)+P1168(x79781)
% 32.24/32.05 [7979]~P1061(x79791)+~P1145(x79791)+P1051(x79791)
% 32.24/32.05 [7980]~P1080(x79801)+~P1142(x79801)+P1093(x79801)
% 32.24/32.05 [7981]~P1113(x79811)+~P1139(x79811)+P1118(x79811)
% 32.24/32.05 [7982]~P852(x79821)+~P911(x79821)+P315(x79821)
% 32.24/32.05 [7983]~P315(x79831)+~P852(x79831)+P911(x79831)
% 32.24/32.05 [7984]~P806(x79841)+~P727(x79841)+P340(x79841)
% 32.24/32.05 [7985]~P812(x79851)+~P436(x79851)+P806(x79851)
% 32.24/32.05 [9402]~P1068(x94021)+~P1082(x94021)+~P1102(x94021)
% 32.24/32.05 [9407]~P2154(x94071)+P2157(x94071)+P2150(x94071,a39)
% 32.24/32.05 [9408]~P2158(x94081)+P2159(x94081)+P2150(x94081,a28)
% 32.24/32.05 [9409]~P2161(x94091)+P2162(x94091)+P2150(x94091,a26)
% 32.24/32.05 [9410]~P2136(x94101)+P2075(x94101)+P2478(x94101,a28)
% 32.24/32.05 [9411]~P1924(x94111)+P1936(x94111)+P2567(x94111,a28)
% 32.24/32.05 [9412]~P1937(x94121)+P1936(x94121)+P2567(x94121,a28)
% 32.24/32.05 [9413]~P1945(x94131)+P1946(x94131)+P2584(x94131,a28)
% 32.24/32.05 [9414]~P1938(x94141)+P1939(x94141)+P2093(x94141,a30)
% 32.24/32.05 [9415]~P1939(x94151)+P1940(x94151)+P2093(x94151,a29)
% 32.24/32.05 [9416]~P1940(x94161)+P1941(x94161)+P2093(x94161,a91)
% 32.24/32.05 [9417]~P1941(x94171)+P1942(x94171)+P2093(x94171,a92)
% 32.24/32.05 [9418]~P1887(x94181)+P1832(x94181)+P1740(x94181,a28)
% 32.24/32.05 [9419]~P1883(x94191)+P1833(x94191)+P1740(x94191,a39)
% 32.24/32.05 [9420]~P1879(x94201)+P1834(x94201)+P1740(x94201,a50)
% 32.24/32.05 [9421]~P1862(x94211)+P1865(x94211)+P1815(x94211,a26)
% 32.24/32.05 [9422]~P1866(x94221)+P1845(x94221)+P1815(x94221,a27)
% 32.24/32.05 [9423]~P1858(x94231)+P1842(x94231)+P1815(x94231,a28)
% 32.24/32.05 [9424]~P1854(x94241)+P1843(x94241)+P1815(x94241,a39)
% 32.24/32.05 [9425]~P1849(x94251)+P1844(x94251)+P1815(x94251,a50)
% 32.24/32.05 [9426]~P1825(x94261)+P1817(x94261)+P1815(x94261,a62)
% 32.24/32.05 [9427]~P1816(x94271)+P1839(x94271)+P1815(x94271,a50)
% 32.24/32.05 [9428]~P1838(x94281)+P1840(x94281)+P1815(x94281,a39)
% 32.24/32.05 [9429]~P1837(x94291)+P1841(x94291)+P1815(x94291,a28)
% 32.24/32.05 [9430]~P1836(x94301)+P1846(x94301)+P1815(x94301,a26)
% 32.24/32.05 [9431]~P1586(x94311)+P1562(x94311)+P1033(x94311,a26)
% 32.24/32.05 [9432]~P1590(x94321)+P1567(x94321)+P1033(x94321,a27)
% 32.24/32.05 [9433]~P1639(x94331)+P1615(x94331)+P1591(x94331,a28)
% 32.24/32.05 [9434]~P1634(x94341)+P1616(x94341)+P1591(x94341,a39)
% 32.24/32.05 [9435]~P1630(x94351)+P1617(x94351)+P1591(x94351,a50)
% 32.24/32.05 [9436]~P1581(x94361)+P1575(x94361)+P1033(x94361,a28)
% 32.24/32.05 [9437]~P1578(x94371)+P1576(x94371)+P1033(x94371,a39)
% 32.24/32.05 [9438]~P1568(x94381)+P1539(x94381)+P1033(x94381,a50)
% 32.24/32.05 [9439]~P1538(x94391)+P1572(x94391)+P1033(x94391,a39)
% 32.24/32.05 [9440]~P1537(x94401)+P1573(x94401)+P1033(x94401,a28)
% 32.24/32.05 [9441]~P1536(x94411)+P1577(x94411)+P1033(x94411,a26)
% 32.24/32.05 [9442]~P1566(x94421)+P1540(x94421)+P1033(x94421,a28)
% 32.24/32.05 [9443]~P1560(x94431)+P1541(x94431)+P1033(x94431,a39)
% 32.24/32.05 [9444]~P1556(x94441)+P1542(x94441)+P1033(x94441,a50)
% 32.24/32.05 [9445]~P1464(x94451)+P1465(x94451)+P1043(x94451,a31)
% 32.24/32.05 [9446]~P1467(x94461)+P1469(x94461)+P1043(x94461,a91)
% 32.24/32.05 [9447]~P1406(x94471)+P1349(x94471)+P1355(x94471,a27)
% 32.24/32.05 [9448]~P1389(x94481)+P1388(x94481)+P1355(x94481,a28)
% 32.24/32.05 [9449]~P1380(x94491)+P1379(x94491)+P1355(x94491,a39)
% 32.24/32.05 [9450]~P1084(x94501)+P1085(x94501)+P1086(x94501,a34)
% 32.24/32.05 [9451]~P1085(x94511)+P1087(x94511)+P1086(x94511,a33)
% 32.24/32.05 [9452]~P1087(x94521)+P1088(x94521)+P1086(x94521,a32)
% 32.24/32.05 [9453]~P1088(x94531)+P1089(x94531)+P1086(x94531,a31)
% 32.24/32.05 [9454]~P1089(x94541)+P1090(x94541)+P1086(x94541,a30)
% 32.24/32.05 [9455]~P1090(x94551)+P1091(x94551)+P1086(x94551,a29)
% 32.24/32.05 [9456]~P1091(x94561)+P1092(x94561)+P1086(x94561,a91)
% 32.24/32.05 [9457]~P1092(x94571)+P1094(x94571)+P1086(x94571,a92)
% 32.24/32.05 [9458]~P1094(x94581)+P1095(x94581)+P1086(x94581,a83)
% 32.24/32.05 [9459]~P1095(x94591)+P1096(x94591)+P1086(x94591,a61)
% 32.24/32.05 [9460]~P1096(x94601)+P1097(x94601)+P1086(x94601,a62)
% 32.24/32.05 [9461]~P1097(x94611)+P1098(x94611)+P1086(x94611,a50)
% 32.24/32.05 [9462]~P1098(x94621)+P1099(x94621)+P1086(x94621,a39)
% 32.24/32.05 [9463]~P1099(x94631)+P1100(x94631)+P1086(x94631,a28)
% 32.24/32.05 [9464]~P788(x94641)+P768(x94641)+P2511(x94641,a28)
% 32.24/32.05 [9465]~P781(x94651)+P769(x94651)+P2511(x94651,a39)
% 32.24/32.05 [9466]~P726(x94661)+P639(x94661)+P165(x94661,a28)
% 32.24/32.05 [9467]~P720(x94671)+P640(x94671)+P165(x94671,a39)
% 32.24/32.05 [9468]~P686(x94681)+P327(x94681)+P2093(x94681,a27)
% 32.24/32.05 [9469]~P516(x94691)+P517(x94691)+P321(x94691,a39)
% 32.24/32.05 [9470]~P323(x94701)+P417(x94701)+P2093(x94701,a83)
% 32.24/32.05 [9471]~P259(x94711)+P204(x94711)+P170(x94711,a28)
% 32.24/32.05 [9472]~P255(x94721)+P205(x94721)+P170(x94721,a39)
% 32.24/32.05 [9473]~P251(x94731)+P206(x94731)+P170(x94731,a50)
% 32.24/32.05 [9474]~P234(x94741)+P237(x94741)+P183(x94741,a26)
% 32.24/32.05 [9475]~P238(x94751)+P217(x94751)+P183(x94751,a27)
% 32.24/32.05 [9476]~P230(x94761)+P214(x94761)+P183(x94761,a28)
% 32.24/32.05 [9477]~P227(x94771)+P215(x94771)+P183(x94771,a39)
% 32.24/32.05 [9478]~P221(x94781)+P216(x94781)+P183(x94781,a50)
% 32.24/32.05 [9479]~P193(x94791)+P185(x94791)+P183(x94791,a62)
% 32.24/32.05 [9480]~P184(x94801)+P211(x94801)+P183(x94801,a50)
% 32.24/32.05 [9481]~P210(x94811)+P212(x94811)+P183(x94811,a39)
% 32.24/32.05 [9482]~P209(x94821)+P213(x94821)+P183(x94821,a28)
% 32.24/32.05 [9483]~P208(x94831)+P218(x94831)+P183(x94831,a26)
% 32.24/32.05 [9484]~P2589(x94841)+P2570(x94841)+P2016(x94841,a28)
% 32.24/32.05 [9485]~P2583(x94851)+P2571(x94851)+P2016(x94851,a39)
% 32.24/32.05 [9486]~P2493(x94861)+P2473(x94861)+P2018(x94861,a28)
% 32.24/32.05 [9487]~P2487(x94871)+P2474(x94871)+P2018(x94871,a39)
% 32.24/32.05 [9488]~P2396(x94881)+P2288(x94881)+P1984(x94881,a27)
% 32.24/32.05 [9489]~P2290(x94891)+P2288(x94891)+P1984(x94891,a26)
% 32.24/32.05 [9490]~P2373(x94901)+P2341(x94901)+P2013(x94901,a28)
% 32.24/32.05 [9491]~P2368(x94911)+P2342(x94911)+P2013(x94911,a39)
% 32.24/32.05 [9492]~P2362(x94921)+P2343(x94921)+P2013(x94921,a50)
% 32.24/32.05 [9493]~P2347(x94931)+P2350(x94931)+P2184(x94931,a26)
% 32.24/32.05 [9494]~P2351(x94941)+P2325(x94941)+P2184(x94941,a27)
% 32.24/32.05 [9495]~P2337(x94951)+P2345(x94951)+P2184(x94951,a28)
% 32.24/32.05 [9496]~P2334(x94961)+P2323(x94961)+P2184(x94961,a39)
% 32.24/32.05 [9497]~P2329(x94971)+P2324(x94971)+P2184(x94971,a50)
% 32.24/32.05 [9498]~P2311(x94981)+P2301(x94981)+P2184(x94981,a62)
% 32.24/32.05 [9499]~P2300(x94991)+P2319(x94991)+P2184(x94991,a50)
% 32.24/32.05 [9500]~P2318(x95001)+P2320(x95001)+P2184(x95001,a39)
% 32.24/32.05 [9501]~P2317(x95011)+P2322(x95011)+P2184(x95011,a28)
% 32.24/32.05 [9502]~P2316(x95021)+P2326(x95021)+P2184(x95021,a26)
% 32.24/32.05 [9503]~P2263(x95031)+P2206(x95031)+P2174(x95031,a28)
% 32.24/32.05 [9504]~P2257(x95041)+P2207(x95041)+P2174(x95041,a39)
% 32.24/32.05 [9505]~P2253(x95051)+P2208(x95051)+P2174(x95051,a50)
% 32.24/32.05 [9506]~P2236(x95061)+P2239(x95061)+P2185(x95061,a26)
% 32.24/32.05 [9507]~P2240(x95071)+P2219(x95071)+P2185(x95071,a27)
% 32.24/32.05 [9508]~P2232(x95081)+P2216(x95081)+P2185(x95081,a28)
% 32.24/32.05 [9509]~P2229(x95091)+P2217(x95091)+P2185(x95091,a39)
% 32.24/32.05 [9510]~P2223(x95101)+P2218(x95101)+P2185(x95101,a50)
% 32.24/32.05 [9511]~P2197(x95111)+P2187(x95111)+P2185(x95111,a62)
% 32.24/32.05 [9512]~P2186(x95121)+P2213(x95121)+P2185(x95121,a50)
% 32.24/32.05 [9513]~P2212(x95131)+P2214(x95131)+P2185(x95131,a39)
% 32.24/32.05 [9514]~P2211(x95141)+P2215(x95141)+P2185(x95141,a28)
% 32.24/32.05 [9515]~P2210(x95151)+P2220(x95151)+P2185(x95151,a26)
% 32.24/32.05 [9516]~P1468(x95161)+P1401(x95161)+P244(x95161,a28)
% 32.24/32.05 [9517]~P1427(x95171)+P1394(x95171)+P244(x95171,a39)
% 32.24/32.05 [9518]~P1269(x95181)+P1278(x95181)+P1065(x95181,a26)
% 32.24/32.05 [9519]~P1285(x95191)+P1133(x95191)+P1065(x95191,a27)
% 32.24/32.05 [9520]~P1224(x95201)+P1231(x95201)+P1065(x95201,a28)
% 32.24/32.05 [9521]~P1180(x95211)+P1191(x95211)+P1065(x95211,a39)
% 32.24/32.05 [9522]~P1061(x95221)+P1067(x95221)+P1065(x95221,a50)
% 32.24/32.05 [9523]~P1066(x95231)+P1093(x95231)+P1065(x95231,a39)
% 32.24/32.05 [9524]~P1080(x95241)+P1118(x95241)+P1065(x95241,a28)
% 32.24/32.05 [9525]~P1113(x95251)+P1127(x95251)+P1065(x95251,a26)
% 32.24/32.05 [9526]~P753(x95261)+P792(x95261)+P766(x95261,a28)
% 32.24/32.05 [10857]~P683(x108571)+~P689(x108571)+P902(x108571,a27)
% 32.24/32.05 [10858]~P2397(x108581)+~P2400(x108581)+P1814(x108581,a27)
% 32.24/32.05 [10859]~P2291(x108591)+~P2295(x108591)+P1814(x108591,a26)
% 32.24/32.05 [10860]~P2389(x108601)+~P2391(x108601)+P1984(x108601,a27)
% 32.24/32.05 [10861]~P2280(x108611)+~P2286(x108611)+P1984(x108611,a26)
% 32.24/32.05 [11236]P327(x112361)+P686(x112361)+~P2093(x112361,a27)
% 32.24/32.05 [11237]P2288(x112371)+P2396(x112371)+~P1984(x112371,a27)
% 32.24/32.05 [11238]P2290(x112381)+P2288(x112381)+~P1984(x112381,a26)
% 32.24/32.05 [11243]P2069(x112431)+P2068(x112431,a27)+P2068(x112431,a26)
% 32.24/32.05 [11244]P2060(x112441)+P2003(x112441,a27)+P2003(x112441,a26)
% 32.24/32.05 [11245]P2042(x112451)+P2003(x112451,a27)+P2003(x112451,a26)
% 32.24/32.05 [11246]P1822(x112461)+P1821(x112461,a27)+P1821(x112461,a26)
% 32.24/32.05 [11247]P1644(x112471)+P1009(x112471,a27)+P1009(x112471,a26)
% 32.24/32.05 [11248]P190(x112481)+P189(x112481,a27)+P189(x112481,a26)
% 32.24/32.05 [11249]P2309(x112491)+P2308(x112491,a27)+P2308(x112491,a26)
% 32.24/32.05 [11250]P2195(x112501)+P2194(x112501,a27)+P2194(x112501,a26)
% 32.24/32.05 [11251]P979(x112511)+P992(x112511,a27)+P992(x112511,a26)
% 32.24/32.05 [11312]~P2151(x113121)+P2152(x113121)+~P2150(x113121,a62)
% 32.24/32.05 [11313]~P2154(x113131)+P2151(x113131)+~P2150(x113131,a50)
% 32.24/32.05 [11314]~P2164(x113141)+P2162(x113141)+~P2150(x113141,a27)
% 32.24/32.05 [11315]~P2000(x113151)+P1997(x113151)+~P902(x113151,a91)
% 32.24/32.05 [11316]~P1976(x113161)+P1983(x113161)+~P902(x113161,a92)
% 32.24/32.05 [11317]~P1977(x113171)+P1981(x113171)+~P902(x113171,a62)
% 32.24/32.05 [11318]~P1978(x113181)+P1979(x113181)+~P902(x113181,a28)
% 32.24/32.05 [11319]~P1832(x113191)+P1833(x113191)+~P1740(x113191,a28)
% 32.24/32.05 [11320]~P1833(x113201)+P1834(x113201)+~P1740(x113201,a39)
% 32.24/32.05 [11321]~P1845(x113211)+P1846(x113211)+~P1815(x113211,a27)
% 32.24/32.05 [11322]~P1717(x113221)+P1715(x113221)+~P1716(x113221,a50)
% 32.24/32.05 [11323]~P1720(x113231)+P1719(x113231)+~P1716(x113231,a39)
% 32.24/32.05 [11324]~P1723(x113241)+P1722(x113241)+~P1716(x113241,a28)
% 32.24/32.05 [11325]~P1726(x113251)+P1725(x113251)+~P1716(x113251,a26)
% 32.24/32.05 [11326]~P1615(x113261)+P1616(x113261)+~P1591(x113261,a28)
% 32.24/32.05 [11327]~P1616(x113271)+P1617(x113271)+~P1591(x113271,a39)
% 32.24/32.05 [11328]~P1567(x113281)+P1577(x113281)+~P1033(x113281,a27)
% 32.24/32.05 [11329]~P1540(x113291)+P1541(x113291)+~P1033(x113291,a28)
% 32.24/32.05 [11330]~P1541(x113301)+P1542(x113301)+~P1033(x113301,a39)
% 32.24/32.05 [11331]~P1419(x113311)+P1141(x113311)+~P1143(x113311,a92)
% 32.24/32.05 [11332]~P1438(x113321)+P1419(x113321)+~P1143(x113321,a83)
% 32.24/32.05 [11333]~P1439(x113331)+P1438(x113331)+~P1143(x113331,a61)
% 32.24/32.05 [11334]~P1440(x113341)+P1439(x113341)+~P1143(x113341,a62)
% 32.24/32.05 [11335]~P1441(x113351)+P1440(x113351)+~P1143(x113351,a50)
% 32.24/32.05 [11336]~P1442(x113361)+P1441(x113361)+~P1143(x113361,a39)
% 32.24/32.05 [11337]~P1443(x113371)+P1442(x113371)+~P1143(x113371,a28)
% 32.24/32.05 [11338]~P1349(x113381)+P1387(x113381)+~P1355(x113381,a27)
% 32.24/32.05 [11339]~P768(x113391)+P769(x113391)+~P2511(x113391,a28)
% 32.24/32.05 [11340]~P639(x113401)+P640(x113401)+~P165(x113401,a28)
% 32.24/32.05 [11341]~P683(x113411)+P689(x113411)+~P902(x113411,a27)
% 32.24/32.05 [11342]~P518(x113421)+P517(x113421)+~P321(x113421,a26)
% 32.24/32.05 [11343]~P467(x113431)+P471(x113431)+~P418(x113431,a26)
% 32.24/32.05 [11344]~P467(x113441)+P468(x113441)+~P418(x113441,a26)
% 32.24/32.05 [11345]~P456(x113451)+P465(x113451)+~P418(x113451,a26)
% 32.24/32.05 [11346]~P427(x113461)+P437(x113461)+~P418(x113461,a27)
% 32.24/32.05 [11347]~P320(x113471)+P429(x113471)+~P418(x113471,a27)
% 32.24/32.05 [11348]~P204(x113481)+P205(x113481)+~P170(x113481,a28)
% 32.24/32.05 [11349]~P205(x113491)+P206(x113491)+~P170(x113491,a39)
% 32.24/32.05 [11350]~P217(x113501)+P218(x113501)+~P183(x113501,a27)
% 32.24/32.05 [11351]~P2570(x113511)+P2571(x113511)+~P2016(x113511,a28)
% 32.24/32.05 [11352]~P2473(x113521)+P2474(x113521)+~P2018(x113521,a28)
% 32.24/32.05 [11353]~P2397(x113531)+P2400(x113531)+~P1814(x113531,a27)
% 32.24/32.05 [11354]~P2389(x113541)+P2391(x113541)+~P1984(x113541,a27)
% 32.24/32.05 [11355]~P2341(x113551)+P2342(x113551)+~P2013(x113551,a28)
% 32.24/32.05 [11356]~P2342(x113561)+P2343(x113561)+~P2013(x113561,a39)
% 32.24/32.05 [11357]~P2325(x113571)+P2326(x113571)+~P2184(x113571,a27)
% 32.24/32.05 [11358]~P2291(x113581)+P2295(x113581)+~P1814(x113581,a26)
% 32.24/32.05 [11359]~P2280(x113591)+P2286(x113591)+~P1984(x113591,a26)
% 32.24/32.05 [11360]~P2206(x113601)+P2207(x113601)+~P2174(x113601,a28)
% 32.24/32.05 [11361]~P2207(x113611)+P2208(x113611)+~P2174(x113611,a39)
% 32.24/32.05 [11362]~P2219(x113621)+P2220(x113621)+~P2185(x113621,a27)
% 32.24/32.05 [11363]~P1401(x113631)+P1394(x113631)+~P244(x113631,a28)
% 32.24/32.05 [11364]~P1133(x113641)+P1127(x113641)+~P1065(x113641,a27)
% 32.24/32.05 [11365]~P663(x113651)+P651(x113651)+~P472(x113651,a27)
% 32.24/32.05 [11366]~P730(x113661)+P165(x113661,a26)+P165(x113661,a27)
% 32.24/32.05 [11367]~P2592(x113671)+P2016(x113671,a26)+P2016(x113671,a27)
% 32.24/32.05 [11368]~P791(x113681)+P2511(x113681,a26)+P2511(x113681,a27)
% 32.24/32.05 [11369]~P2496(x113691)+P2018(x113691,a26)+P2018(x113691,a27)
% 32.24/32.05 [11370]~P2156(x113701)+P2019(x113701,a26)+P2019(x113701,a27)
% 32.24/32.05 [11371]~P2139(x113711)+P2478(x113711,a26)+P2478(x113711,a27)
% 32.24/32.05 [11372]~P417(x113721)+P2093(x113721,a50)+P2093(x113721,a26)
% 32.24/32.05 [11373]~P421(x113731)+P2093(x113731,a83)+P2093(x113731,a26)
% 32.24/32.05 [11374]~P1942(x113741)+P2093(x113741,a62)+P2093(x113741,a28)
% 32.24/32.05 [11375]~P1980(x113751)+P2093(x113751,a91)+P2093(x113751,a28)
% 32.24/32.05 [11376]~P1982(x113761)+P2093(x113761,a91)+P2093(x113761,a62)
% 32.24/32.05 [11377]~P1985(x113771)+P2093(x113771,a92)+P2093(x113771,a91)
% 32.24/32.05 [11378]~P1936(x113781)+P2567(x113781,a26)+P2567(x113781,a27)
% 32.24/32.05 [11379]~P1946(x113791)+P2584(x113791,a26)+P2584(x113791,a27)
% 32.24/32.05 [11380]~P1890(x113801)+P1740(x113801,a26)+P1740(x113801,a27)
% 32.24/32.05 [11381]~P1570(x113811)+P1033(x113811,a26)+P1033(x113811,a27)
% 32.24/32.05 [11382]~P1708(x113821)+P1591(x113821,a27)+P1033(x113821,a27)
% 32.24/32.05 [11383]~P1678(x113831)+P1591(x113831,a26)+P1033(x113831,a26)
% 32.24/32.05 [11384]~P1683(x113841)+P1591(x113841,a28)+P1033(x113841,a28)
% 32.24/32.05 [11385]~P1688(x113851)+P1591(x113851,a39)+P1033(x113851,a39)
% 32.24/32.05 [11386]~P1693(x113861)+P1591(x113861,a50)+P1033(x113861,a50)
% 32.24/32.05 [11387]~P1642(x113871)+P1591(x113871,a26)+P1591(x113871,a27)
% 32.24/32.05 [11388]~P1469(x113881)+P1043(x113881,a61)+P1043(x113881,a39)
% 32.24/32.05 [11389]~P1395(x113891)+P1355(x113891,a26)+P1355(x113891,a27)
% 32.24/32.05 [11390]~P1100(x113901)+P1086(x113901,a26)+P1086(x113901,a27)
% 32.24/32.05 [11391]~P619(x113911)+P182(x113911,a50)+P182(x113911,a28)
% 32.24/32.05 [11392]~P263(x113921)+P170(x113921,a26)+P170(x113921,a27)
% 32.24/32.05 [11393]~P2376(x113931)+P2013(x113931,a26)+P2013(x113931,a27)
% 32.24/32.05 [11394]~P2266(x113941)+P2174(x113941,a26)+P2174(x113941,a27)
% 32.24/32.05 [11395]~P1503(x113951)+P244(x113951,a26)+P244(x113951,a27)
% 32.24/32.05 [11396]~P792(x113961)+P766(x113961,a26)+P766(x113961,a27)
% 32.24/32.05 [16150]P2067(x161501)+P2066(x161501,a26)+~P2066(x161501,a27)
% 32.24/32.05 [16151]P2072(x161511)+P2071(x161511,a27)+~P2071(x161511,a26)
% 32.24/32.05 [16152]P2059(x161521)+P2003(x161521,a26)+~P2003(x161521,a27)
% 32.24/32.05 [16153]P2051(x161531)+P2003(x161531,a26)+~P2003(x161531,a27)
% 32.24/32.05 [16154]P1820(x161541)+P1819(x161541,a26)+~P1819(x161541,a27)
% 32.24/32.05 [16155]P1868(x161551)+P1867(x161551,a27)+~P1867(x161551,a26)
% 32.24/32.05 [16156]P1739(x161561)+P1009(x161561,a27)+~P1009(x161561,a26)
% 32.24/32.05 [16157]P1737(x161571)+P1009(x161571,a26)+~P1009(x161571,a27)
% 32.24/32.05 [16158]P1643(x161581)+P1009(x161581,a26)+~P1009(x161581,a27)
% 32.24/32.05 [16159]P1658(x161591)+P1009(x161591,a27)+~P1009(x161591,a26)
% 32.24/32.05 [16160]P1608(x161601)+P1009(x161601,a27)+~P1009(x161601,a26)
% 32.24/32.05 [16161]P1598(x161611)+P1009(x161611,a27)+~P1009(x161611,a26)
% 32.24/32.05 [16162]P1595(x161621)+P1009(x161621,a26)+~P1009(x161621,a27)
% 32.24/32.05 [16163]P424(x161631)+P321(x161631,a26)+~P449(x161631,a27)
% 32.24/32.05 [16164]P424(x161641)+P321(x161641,a28)+~P449(x161641,a26)
% 32.24/32.05 [16165]P424(x161651)+P321(x161651,a39)+~P449(x161651,a28)
% 32.24/32.05 [16166]P424(x161661)+P321(x161661,a50)+~P449(x161661,a39)
% 32.24/32.05 [16167]P424(x161671)+P449(x161671,a27)+~P321(x161671,a26)
% 32.24/32.05 [16168]P424(x161681)+P449(x161681,a26)+~P321(x161681,a28)
% 32.24/32.05 [16169]P424(x161691)+P449(x161691,a28)+~P321(x161691,a39)
% 32.24/32.05 [16170]P424(x161701)+P449(x161701,a39)+~P321(x161701,a50)
% 32.24/32.05 [16171]P188(x161711)+P187(x161711,a26)+~P187(x161711,a27)
% 32.24/32.05 [16172]P240(x161721)+P239(x161721,a27)+~P239(x161721,a26)
% 32.24/32.05 [16173]P2307(x161731)+P2306(x161731,a26)+~P2306(x161731,a27)
% 32.24/32.05 [16174]P2353(x161741)+P2352(x161741,a27)+~P2352(x161741,a26)
% 32.24/32.05 [16175]P2193(x161751)+P2192(x161751,a26)+~P2192(x161751,a27)
% 32.24/32.05 [16176]P2242(x161761)+P2241(x161761,a27)+~P2241(x161761,a26)
% 32.24/32.05 [16177]P1004(x161771)+P1010(x161771,a26)+~P1010(x161771,a27)
% 32.24/32.05 [16178]P1301(x161781)+P1310(x161781,a27)+~P1310(x161781,a26)
% 32.24/32.05 [16212]~P86(x162121)+~P336(x162121,a27)+P2093(x162121,a26)
% 32.24/32.05 [16213]~P86(x162131)+~P336(x162131,a26)+P2093(x162131,a28)
% 32.24/32.05 [16214]~P86(x162141)+~P336(x162141,a28)+P2093(x162141,a39)
% 32.24/32.05 [16215]~P86(x162151)+~P336(x162151,a50)+P2093(x162151,a62)
% 32.24/32.05 [16216]~P86(x162161)+~P336(x162161,a39)+P2093(x162161,a50)
% 32.24/32.05 [16217]~P86(x162171)+~P336(x162171,a61)+P2093(x162171,a83)
% 32.24/32.05 [16218]~P86(x162181)+~P336(x162181,a62)+P2093(x162181,a61)
% 32.24/32.05 [16219]~P86(x162191)+~P336(x162191,a91)+P2093(x162191,a29)
% 32.24/32.05 [16220]~P86(x162201)+~P336(x162201,a29)+P2093(x162201,a30)
% 32.24/32.05 [16221]~P86(x162211)+~P336(x162211,a92)+P2093(x162211,a91)
% 32.24/32.05 [16222]~P86(x162221)+~P336(x162221,a83)+P2093(x162221,a92)
% 32.24/32.05 [16223]~P86(x162231)+~P2093(x162231,a26)+P336(x162231,a27)
% 32.24/32.05 [16224]~P86(x162241)+~P2093(x162241,a28)+P336(x162241,a26)
% 32.24/32.05 [16225]~P86(x162251)+~P2093(x162251,a39)+P336(x162251,a28)
% 32.24/32.05 [16226]~P86(x162261)+~P2093(x162261,a50)+P336(x162261,a39)
% 32.24/32.05 [16227]~P86(x162271)+~P2093(x162271,a61)+P336(x162271,a62)
% 32.24/32.05 [16228]~P86(x162281)+~P2093(x162281,a62)+P336(x162281,a50)
% 32.24/32.05 [16229]~P86(x162291)+~P2093(x162291,a92)+P336(x162291,a83)
% 32.24/32.05 [16230]~P86(x162301)+~P2093(x162301,a83)+P336(x162301,a61)
% 32.24/32.05 [16231]~P86(x162311)+~P2093(x162311,a30)+P336(x162311,a29)
% 32.24/32.05 [16232]~P86(x162321)+~P2093(x162321,a29)+P336(x162321,a91)
% 32.24/32.05 [16233]~P86(x162331)+~P2093(x162331,a91)+P336(x162331,a92)
% 32.24/32.05 [16679]P2148(x166791)+~P2019(x166791,a27)+~P2019(x166791,a26)
% 32.24/32.05 [16680]P2075(x166801)+~P2478(x166801,a27)+~P2478(x166801,a26)
% 32.24/32.05 [16681]P2080(x166811)+~P2079(x166811,a27)+~P2079(x166811,a26)
% 32.24/32.05 [16682]P1893(x166821)+~P1892(x166821,a27)+~P1892(x166821,a26)
% 32.24/32.05 [16683]P1832(x166831)+~P1740(x166831,a27)+~P1740(x166831,a26)
% 32.24/32.05 [16684]P1738(x166841)+~P1009(x166841,a27)+~P1009(x166841,a26)
% 32.24/32.05 [16685]P1709(x166851)+~P1009(x166851,a27)+~P1009(x166851,a26)
% 32.24/32.05 [16686]P1670(x166861)+~P1033(x166861,a27)+~P1591(x166861,a27)
% 32.24/32.05 [16687]P1686(x166871)+~P1033(x166871,a39)+~P1591(x166871,a39)
% 32.24/32.05 [16688]P1681(x166881)+~P1033(x166881,a28)+~P1591(x166881,a28)
% 32.24/32.05 [16689]P1676(x166891)+~P1033(x166891,a26)+~P1591(x166891,a26)
% 32.24/32.05 [16690]P1615(x166901)+~P1591(x166901,a27)+~P1591(x166901,a26)
% 32.24/32.05 [16691]P1599(x166911)+~P1009(x166911,a27)+~P1009(x166911,a26)
% 32.24/32.05 [16692]P1540(x166921)+~P1033(x166921,a27)+~P1033(x166921,a26)
% 32.24/32.05 [16693]P1443(x166931)+~P1143(x166931,a27)+~P1143(x166931,a26)
% 32.24/32.05 [16694]P768(x166941)+~P2511(x166941,a27)+~P2511(x166941,a26)
% 32.24/32.05 [16695]P639(x166951)+~P165(x166951,a27)+~P165(x166951,a26)
% 32.24/32.05 [16696]P265(x166961)+~P264(x166961,a27)+~P264(x166961,a26)
% 32.24/32.05 [16697]P204(x166971)+~P170(x166971,a27)+~P170(x166971,a26)
% 32.24/32.05 [16698]P2570(x166981)+~P2016(x166981,a27)+~P2016(x166981,a26)
% 32.24/32.05 [16699]P2473(x166991)+~P2018(x166991,a27)+~P2018(x166991,a26)
% 32.24/32.05 [16700]P2378(x167001)+~P2377(x167001,a27)+~P2377(x167001,a26)
% 32.24/32.05 [16701]P2341(x167011)+~P2013(x167011,a27)+~P2013(x167011,a26)
% 32.24/32.05 [16702]P2267(x167021)+~P2270(x167021,a27)+~P2270(x167021,a26)
% 32.24/32.05 [16703]P2206(x167031)+~P2174(x167031,a27)+~P2174(x167031,a26)
% 32.24/32.05 [16704]P1509(x167041)+~P1515(x167041,a27)+~P1515(x167041,a26)
% 32.24/32.05 [16705]P1401(x167051)+~P244(x167051,a27)+~P244(x167051,a26)
% 32.24/32.05 [16706]P1055(x167061,a27)+~P1055(x167061,a26)+P1046(x167061,a27)
% 32.24/32.05 [16977]~P1156(x169771,a51)+~P1344(x169771,a27)+P1346(x169771,a27)
% 32.24/32.05 [16978]~P1156(x169781,a52)+~P1344(x169781,a26)+P1346(x169781,a26)
% 32.24/32.05 [16979]~P1156(x169791,a53)+~P1344(x169791,a28)+P1346(x169791,a28)
% 32.24/32.05 [16980]~P1156(x169801,a54)+~P1344(x169801,a39)+P1346(x169801,a39)
% 32.24/32.05 [16981]~P1156(x169811,a56)+~P1344(x169811,a62)+P1346(x169811,a62)
% 32.24/32.05 [16982]~P1156(x169821,a55)+~P1344(x169821,a50)+P1346(x169821,a50)
% 32.24/32.05 [16983]~P1156(x169831,a58)+~P1344(x169831,a83)+P1346(x169831,a83)
% 32.24/32.05 [16984]~P1156(x169841,a57)+~P1344(x169841,a61)+P1346(x169841,a61)
% 32.24/32.05 [16985]~P1156(x169851,a60)+~P1344(x169851,a91)+P1346(x169851,a91)
% 32.24/32.05 [16986]~P1156(x169861,a59)+~P1344(x169861,a92)+P1346(x169861,a92)
% 32.24/32.05 [16987]~P1156(x169871,a48)+~P1333(x169871,a27)+P1336(x169871,a27)
% 32.24/32.05 [16988]~P1156(x169881,a49)+~P1333(x169881,a26)+P1336(x169881,a26)
% 32.24/32.05 [16989]~P1156(x169891,a51)+~P1333(x169891,a28)+P1336(x169891,a28)
% 32.24/32.05 [16990]~P1156(x169901,a52)+~P1333(x169901,a39)+P1336(x169901,a39)
% 32.24/32.05 [16991]~P1156(x169911,a54)+~P1333(x169911,a62)+P1336(x169911,a62)
% 32.24/32.05 [16992]~P1156(x169921,a53)+~P1333(x169921,a50)+P1336(x169921,a50)
% 32.24/32.05 [16993]~P1156(x169931,a56)+~P1333(x169931,a83)+P1336(x169931,a83)
% 32.24/32.05 [16994]~P1156(x169941,a55)+~P1333(x169941,a61)+P1336(x169941,a61)
% 32.24/32.05 [16995]~P1156(x169951,a59)+~P1333(x169951,a29)+P1336(x169951,a29)
% 32.24/32.05 [16996]~P1156(x169961,a60)+~P1333(x169961,a30)+P1336(x169961,a30)
% 32.24/32.05 [16997]~P1156(x169971,a58)+~P1333(x169971,a91)+P1336(x169971,a91)
% 32.24/32.05 [16998]~P1156(x169981,a57)+~P1333(x169981,a92)+P1336(x169981,a92)
% 32.24/32.05 [16999]~P1156(x169991,a46)+~P1322(x169991,a27)+P1323(x169991,a27)
% 32.24/32.05 [17000]~P1156(x170001,a47)+~P1322(x170001,a26)+P1323(x170001,a26)
% 32.24/32.05 [17001]~P1156(x170011,a48)+~P1322(x170011,a28)+P1323(x170011,a28)
% 32.24/32.05 [17002]~P1156(x170021,a49)+~P1322(x170021,a39)+P1323(x170021,a39)
% 32.24/32.05 [17003]~P1156(x170031,a52)+~P1322(x170031,a62)+P1323(x170031,a62)
% 32.24/32.05 [17004]~P1156(x170041,a51)+~P1322(x170041,a50)+P1323(x170041,a50)
% 32.24/32.05 [17005]~P1156(x170051,a54)+~P1322(x170051,a83)+P1323(x170051,a83)
% 32.24/32.05 [17006]~P1156(x170061,a53)+~P1322(x170061,a61)+P1323(x170061,a61)
% 32.24/32.05 [17007]~P1156(x170071,a57)+~P1322(x170071,a29)+P1323(x170071,a29)
% 32.24/32.05 [17008]~P1156(x170081,a58)+~P1322(x170081,a30)+P1323(x170081,a30)
% 32.24/32.05 [17009]~P1156(x170091,a56)+~P1322(x170091,a91)+P1323(x170091,a91)
% 32.24/32.05 [17010]~P1156(x170101,a55)+~P1322(x170101,a92)+P1323(x170101,a92)
% 32.24/32.05 [17011]~P1156(x170111,a59)+~P1322(x170111,a31)+P1323(x170111,a31)
% 32.24/32.05 [17012]~P1156(x170121,a60)+~P1322(x170121,a32)+P1323(x170121,a32)
% 32.24/32.05 [17013]~P1156(x170131,a44)+~P1309(x170131,a27)+P1315(x170131,a27)
% 32.24/32.05 [17014]~P1156(x170141,a45)+~P1309(x170141,a26)+P1315(x170141,a26)
% 32.24/32.05 [17015]~P1156(x170151,a46)+~P1309(x170151,a28)+P1315(x170151,a28)
% 32.24/32.05 [17016]~P1156(x170161,a47)+~P1309(x170161,a39)+P1315(x170161,a39)
% 32.24/32.05 [17017]~P1156(x170171,a49)+~P1309(x170171,a62)+P1315(x170171,a62)
% 32.24/32.05 [17018]~P1156(x170181,a48)+~P1309(x170181,a50)+P1315(x170181,a50)
% 32.24/32.05 [17019]~P1156(x170191,a52)+~P1309(x170191,a83)+P1315(x170191,a83)
% 32.24/32.05 [17020]~P1156(x170201,a51)+~P1309(x170201,a61)+P1315(x170201,a61)
% 32.24/32.05 [17021]~P1156(x170211,a55)+~P1309(x170211,a29)+P1315(x170211,a29)
% 32.24/32.05 [17022]~P1156(x170221,a56)+~P1309(x170221,a30)+P1315(x170221,a30)
% 32.24/32.05 [17023]~P1156(x170231,a54)+~P1309(x170231,a91)+P1315(x170231,a91)
% 32.24/32.05 [17024]~P1156(x170241,a53)+~P1309(x170241,a92)+P1315(x170241,a92)
% 32.24/32.05 [17025]~P1156(x170251,a57)+~P1309(x170251,a31)+P1315(x170251,a31)
% 32.24/32.05 [17026]~P1156(x170261,a58)+~P1309(x170261,a32)+P1315(x170261,a32)
% 32.24/32.05 [17027]~P1156(x170271,a59)+~P1309(x170271,a33)+P1315(x170271,a33)
% 32.24/32.05 [17028]~P1156(x170281,a60)+~P1309(x170281,a34)+P1315(x170281,a34)
% 32.24/32.05 [17029]~P1156(x170291,a42)+~P1296(x170291,a27)+P1297(x170291,a27)
% 32.24/32.05 [17030]~P1156(x170301,a43)+~P1296(x170301,a26)+P1297(x170301,a26)
% 32.24/32.05 [17031]~P1156(x170311,a44)+~P1296(x170311,a28)+P1297(x170311,a28)
% 32.24/32.05 [17032]~P1156(x170321,a45)+~P1296(x170321,a39)+P1297(x170321,a39)
% 32.24/32.05 [17033]~P1156(x170331,a47)+~P1296(x170331,a62)+P1297(x170331,a62)
% 32.24/32.05 [17034]~P1156(x170341,a46)+~P1296(x170341,a50)+P1297(x170341,a50)
% 32.24/32.05 [17035]~P1156(x170351,a49)+~P1296(x170351,a83)+P1297(x170351,a83)
% 32.24/32.05 [17036]~P1156(x170361,a48)+~P1296(x170361,a61)+P1297(x170361,a61)
% 32.24/32.05 [17037]~P1156(x170371,a53)+~P1296(x170371,a29)+P1297(x170371,a29)
% 32.24/32.05 [17038]~P1156(x170381,a54)+~P1296(x170381,a30)+P1297(x170381,a30)
% 32.24/32.05 [17039]~P1156(x170391,a52)+~P1296(x170391,a91)+P1297(x170391,a91)
% 32.24/32.06 [17040]~P1156(x170401,a51)+~P1296(x170401,a92)+P1297(x170401,a92)
% 32.24/32.06 [17041]~P1156(x170411,a55)+~P1296(x170411,a31)+P1297(x170411,a31)
% 32.24/32.06 [17042]~P1156(x170421,a56)+~P1296(x170421,a32)+P1297(x170421,a32)
% 32.24/32.06 [17043]~P1156(x170431,a57)+~P1296(x170431,a33)+P1297(x170431,a33)
% 32.24/32.06 [17044]~P1156(x170441,a58)+~P1296(x170441,a34)+P1297(x170441,a34)
% 32.24/32.06 [17045]~P1156(x170451,a59)+~P1296(x170451,a35)+P1297(x170451,a35)
% 32.24/32.06 [17046]~P1156(x170461,a60)+~P1296(x170461,a36)+P1297(x170461,a36)
% 32.24/32.06 [17047]~P1156(x170471,a40)+~P1286(x170471,a27)+P1287(x170471,a27)
% 32.24/32.06 [17048]~P1156(x170481,a41)+~P1286(x170481,a26)+P1287(x170481,a26)
% 32.24/32.06 [17049]~P1156(x170491,a42)+~P1286(x170491,a28)+P1287(x170491,a28)
% 32.24/32.06 [17050]~P1156(x170501,a43)+~P1286(x170501,a39)+P1287(x170501,a39)
% 32.24/32.06 [17051]~P1156(x170511,a45)+~P1286(x170511,a62)+P1287(x170511,a62)
% 32.24/32.06 [17052]~P1156(x170521,a44)+~P1286(x170521,a50)+P1287(x170521,a50)
% 32.24/32.06 [17053]~P1156(x170531,a47)+~P1286(x170531,a83)+P1287(x170531,a83)
% 32.24/32.06 [17054]~P1156(x170541,a46)+~P1286(x170541,a61)+P1287(x170541,a61)
% 32.24/32.06 [17055]~P1156(x170551,a51)+~P1286(x170551,a29)+P1287(x170551,a29)
% 32.24/32.06 [17056]~P1156(x170561,a52)+~P1286(x170561,a30)+P1287(x170561,a30)
% 32.24/32.06 [17057]~P1156(x170571,a49)+~P1286(x170571,a91)+P1287(x170571,a91)
% 32.24/32.06 [17058]~P1156(x170581,a48)+~P1286(x170581,a92)+P1287(x170581,a92)
% 32.24/32.06 [17059]~P1156(x170591,a53)+~P1286(x170591,a31)+P1287(x170591,a31)
% 32.24/32.06 [17060]~P1156(x170601,a54)+~P1286(x170601,a32)+P1287(x170601,a32)
% 32.24/32.06 [17061]~P1156(x170611,a55)+~P1286(x170611,a33)+P1287(x170611,a33)
% 32.24/32.06 [17062]~P1156(x170621,a56)+~P1286(x170621,a34)+P1287(x170621,a34)
% 32.24/32.06 [17063]~P1156(x170631,a57)+~P1286(x170631,a35)+P1287(x170631,a35)
% 32.24/32.06 [17064]~P1156(x170641,a58)+~P1286(x170641,a36)+P1287(x170641,a36)
% 32.24/32.06 [17065]~P1156(x170651,a59)+~P1286(x170651,a37)+P1287(x170651,a37)
% 32.24/32.06 [17066]~P1156(x170661,a60)+~P1286(x170661,a38)+P1287(x170661,a38)
% 32.24/32.06 [17067]~P1156(x170671,a37)+~P1274(x170671,a27)+P1275(x170671,a27)
% 32.24/32.06 [17068]~P1156(x170681,a38)+~P1274(x170681,a26)+P1275(x170681,a26)
% 32.24/32.06 [17069]~P1156(x170691,a40)+~P1274(x170691,a28)+P1275(x170691,a28)
% 32.24/32.06 [17070]~P1156(x170701,a41)+~P1274(x170701,a39)+P1275(x170701,a39)
% 32.24/32.06 [17071]~P1156(x170711,a43)+~P1274(x170711,a62)+P1275(x170711,a62)
% 32.24/32.06 [17072]~P1156(x170721,a42)+~P1274(x170721,a50)+P1275(x170721,a50)
% 32.24/32.06 [17073]~P1156(x170731,a45)+~P1274(x170731,a83)+P1275(x170731,a83)
% 32.24/32.06 [17074]~P1156(x170741,a44)+~P1274(x170741,a61)+P1275(x170741,a61)
% 32.24/32.06 [17075]~P1156(x170751,a48)+~P1274(x170751,a29)+P1275(x170751,a29)
% 32.24/32.06 [17076]~P1156(x170761,a49)+~P1274(x170761,a30)+P1275(x170761,a30)
% 32.24/32.06 [17077]~P1156(x170771,a47)+~P1274(x170771,a91)+P1275(x170771,a91)
% 32.24/32.06 [17078]~P1156(x170781,a46)+~P1274(x170781,a92)+P1275(x170781,a92)
% 32.24/32.06 [17079]~P1156(x170791,a51)+~P1274(x170791,a31)+P1275(x170791,a31)
% 32.24/32.06 [17080]~P1156(x170801,a52)+~P1274(x170801,a32)+P1275(x170801,a32)
% 32.24/32.06 [17081]~P1156(x170811,a53)+~P1274(x170811,a33)+P1275(x170811,a33)
% 32.24/32.06 [17082]~P1156(x170821,a54)+~P1274(x170821,a34)+P1275(x170821,a34)
% 32.24/32.06 [17083]~P1156(x170831,a55)+~P1274(x170831,a35)+P1275(x170831,a35)
% 32.24/32.06 [17084]~P1156(x170841,a56)+~P1274(x170841,a36)+P1275(x170841,a36)
% 32.24/32.06 [17085]~P1156(x170851,a57)+~P1274(x170851,a37)+P1275(x170851,a37)
% 32.24/32.06 [17086]~P1156(x170861,a58)+~P1274(x170861,a38)+P1275(x170861,a38)
% 32.24/32.06 [17087]~P1156(x170871,a59)+~P1274(x170871,a40)+P1275(x170871,a40)
% 32.24/32.06 [17088]~P1156(x170881,a60)+~P1274(x170881,a41)+P1275(x170881,a41)
% 32.24/32.06 [17089]~P1156(x170891,a35)+~P1260(x170891,a27)+P1261(x170891,a27)
% 32.24/32.06 [17090]~P1156(x170901,a36)+~P1260(x170901,a26)+P1261(x170901,a26)
% 32.24/32.06 [17091]~P1156(x170911,a37)+~P1260(x170911,a28)+P1261(x170911,a28)
% 32.24/32.06 [17092]~P1156(x170921,a38)+~P1260(x170921,a39)+P1261(x170921,a39)
% 32.24/32.06 [17093]~P1156(x170931,a41)+~P1260(x170931,a62)+P1261(x170931,a62)
% 32.24/32.06 [17094]~P1156(x170941,a40)+~P1260(x170941,a50)+P1261(x170941,a50)
% 32.24/32.06 [17095]~P1156(x170951,a43)+~P1260(x170951,a83)+P1261(x170951,a83)
% 32.24/32.06 [17096]~P1156(x170961,a42)+~P1260(x170961,a61)+P1261(x170961,a61)
% 32.24/32.06 [17097]~P1156(x170971,a46)+~P1260(x170971,a29)+P1261(x170971,a29)
% 32.24/32.06 [17098]~P1156(x170981,a47)+~P1260(x170981,a30)+P1261(x170981,a30)
% 32.24/32.06 [17099]~P1156(x170991,a45)+~P1260(x170991,a91)+P1261(x170991,a91)
% 32.24/32.06 [17100]~P1156(x171001,a44)+~P1260(x171001,a92)+P1261(x171001,a92)
% 32.24/32.06 [17101]~P1156(x171011,a48)+~P1260(x171011,a31)+P1261(x171011,a31)
% 32.24/32.06 [17102]~P1156(x171021,a49)+~P1260(x171021,a32)+P1261(x171021,a32)
% 32.24/32.06 [17103]~P1156(x171031,a51)+~P1260(x171031,a33)+P1261(x171031,a33)
% 32.24/32.06 [17104]~P1156(x171041,a52)+~P1260(x171041,a34)+P1261(x171041,a34)
% 32.24/32.06 [17105]~P1156(x171051,a53)+~P1260(x171051,a35)+P1261(x171051,a35)
% 32.24/32.06 [17106]~P1156(x171061,a54)+~P1260(x171061,a36)+P1261(x171061,a36)
% 32.24/32.06 [17107]~P1156(x171071,a55)+~P1260(x171071,a37)+P1261(x171071,a37)
% 32.24/32.06 [17108]~P1156(x171081,a56)+~P1260(x171081,a38)+P1261(x171081,a38)
% 32.24/32.06 [17109]~P1156(x171091,a57)+~P1260(x171091,a40)+P1261(x171091,a40)
% 32.24/32.06 [17110]~P1156(x171101,a58)+~P1260(x171101,a41)+P1261(x171101,a41)
% 32.24/32.06 [17111]~P1156(x171111,a59)+~P1260(x171111,a42)+P1261(x171111,a42)
% 32.24/32.06 [17112]~P1156(x171121,a60)+~P1260(x171121,a43)+P1261(x171121,a43)
% 32.24/32.06 [17113]~P1156(x171131,a33)+~P1242(x171131,a27)+P1243(x171131,a27)
% 32.24/32.06 [17114]~P1156(x171141,a34)+~P1242(x171141,a26)+P1243(x171141,a26)
% 32.24/32.06 [17115]~P1156(x171151,a35)+~P1242(x171151,a28)+P1243(x171151,a28)
% 32.24/32.06 [17116]~P1156(x171161,a36)+~P1242(x171161,a39)+P1243(x171161,a39)
% 32.24/32.06 [17117]~P1156(x171171,a38)+~P1242(x171171,a62)+P1243(x171171,a62)
% 32.24/32.06 [17118]~P1156(x171181,a37)+~P1242(x171181,a50)+P1243(x171181,a50)
% 32.24/32.06 [17119]~P1156(x171191,a41)+~P1242(x171191,a83)+P1243(x171191,a83)
% 32.24/32.06 [17120]~P1156(x171201,a40)+~P1242(x171201,a61)+P1243(x171201,a61)
% 32.24/32.06 [17121]~P1156(x171211,a44)+~P1242(x171211,a29)+P1243(x171211,a29)
% 32.24/32.06 [17122]~P1156(x171221,a45)+~P1242(x171221,a30)+P1243(x171221,a30)
% 32.24/32.06 [17123]~P1156(x171231,a43)+~P1242(x171231,a91)+P1243(x171231,a91)
% 32.24/32.06 [17124]~P1156(x171241,a42)+~P1242(x171241,a92)+P1243(x171241,a92)
% 32.24/32.06 [17125]~P1156(x171251,a46)+~P1242(x171251,a31)+P1243(x171251,a31)
% 32.24/32.06 [17126]~P1156(x171261,a47)+~P1242(x171261,a32)+P1243(x171261,a32)
% 32.24/32.06 [17127]~P1156(x171271,a48)+~P1242(x171271,a33)+P1243(x171271,a33)
% 32.24/32.06 [17128]~P1156(x171281,a49)+~P1242(x171281,a34)+P1243(x171281,a34)
% 32.24/32.06 [17129]~P1156(x171291,a51)+~P1242(x171291,a35)+P1243(x171291,a35)
% 32.24/32.06 [17130]~P1156(x171301,a52)+~P1242(x171301,a36)+P1243(x171301,a36)
% 32.24/32.06 [17131]~P1156(x171311,a53)+~P1242(x171311,a37)+P1243(x171311,a37)
% 32.24/32.06 [17132]~P1156(x171321,a54)+~P1242(x171321,a38)+P1243(x171321,a38)
% 32.24/32.06 [17133]~P1156(x171331,a55)+~P1242(x171331,a40)+P1243(x171331,a40)
% 32.24/32.06 [17134]~P1156(x171341,a56)+~P1242(x171341,a41)+P1243(x171341,a41)
% 32.24/32.06 [17135]~P1156(x171351,a57)+~P1242(x171351,a42)+P1243(x171351,a42)
% 32.24/32.06 [17136]~P1156(x171361,a58)+~P1242(x171361,a43)+P1243(x171361,a43)
% 32.24/32.06 [17137]~P1156(x171371,a59)+~P1242(x171371,a44)+P1243(x171371,a44)
% 32.24/32.06 [17138]~P1156(x171381,a60)+~P1242(x171381,a45)+P1243(x171381,a45)
% 32.24/32.06 [17139]~P1156(x171391,a31)+~P1232(x171391,a27)+P1233(x171391,a27)
% 32.24/32.06 [17140]~P1156(x171401,a32)+~P1232(x171401,a26)+P1233(x171401,a26)
% 32.24/32.06 [17141]~P1156(x171411,a33)+~P1232(x171411,a28)+P1233(x171411,a28)
% 32.24/32.06 [17142]~P1156(x171421,a34)+~P1232(x171421,a39)+P1233(x171421,a39)
% 32.24/32.06 [17143]~P1156(x171431,a36)+~P1232(x171431,a62)+P1233(x171431,a62)
% 32.24/32.06 [17144]~P1156(x171441,a35)+~P1232(x171441,a50)+P1233(x171441,a50)
% 32.24/32.06 [17145]~P1156(x171451,a38)+~P1232(x171451,a83)+P1233(x171451,a83)
% 32.24/32.06 [17146]~P1156(x171461,a37)+~P1232(x171461,a61)+P1233(x171461,a61)
% 32.24/32.06 [17147]~P1156(x171471,a42)+~P1232(x171471,a29)+P1233(x171471,a29)
% 32.24/32.06 [17148]~P1156(x171481,a43)+~P1232(x171481,a30)+P1233(x171481,a30)
% 32.24/32.06 [17149]~P1156(x171491,a41)+~P1232(x171491,a91)+P1233(x171491,a91)
% 32.24/32.06 [17150]~P1156(x171501,a40)+~P1232(x171501,a92)+P1233(x171501,a92)
% 32.24/32.06 [17151]~P1156(x171511,a44)+~P1232(x171511,a31)+P1233(x171511,a31)
% 32.24/32.06 [17152]~P1156(x171521,a45)+~P1232(x171521,a32)+P1233(x171521,a32)
% 32.24/32.06 [17153]~P1156(x171531,a46)+~P1232(x171531,a33)+P1233(x171531,a33)
% 32.24/32.06 [17154]~P1156(x171541,a47)+~P1232(x171541,a34)+P1233(x171541,a34)
% 32.24/32.06 [17155]~P1156(x171551,a48)+~P1232(x171551,a35)+P1233(x171551,a35)
% 32.24/32.06 [17156]~P1156(x171561,a49)+~P1232(x171561,a36)+P1233(x171561,a36)
% 32.24/32.06 [17157]~P1156(x171571,a51)+~P1232(x171571,a37)+P1233(x171571,a37)
% 32.24/32.06 [17158]~P1156(x171581,a52)+~P1232(x171581,a38)+P1233(x171581,a38)
% 32.24/32.06 [17159]~P1156(x171591,a53)+~P1232(x171591,a40)+P1233(x171591,a40)
% 32.24/32.06 [17160]~P1156(x171601,a54)+~P1232(x171601,a41)+P1233(x171601,a41)
% 32.24/32.06 [17161]~P1156(x171611,a55)+~P1232(x171611,a42)+P1233(x171611,a42)
% 32.24/32.06 [17162]~P1156(x171621,a56)+~P1232(x171621,a43)+P1233(x171621,a43)
% 32.24/32.06 [17163]~P1156(x171631,a57)+~P1232(x171631,a44)+P1233(x171631,a44)
% 32.24/32.06 [17164]~P1156(x171641,a58)+~P1232(x171641,a45)+P1233(x171641,a45)
% 32.24/32.06 [17165]~P1156(x171651,a59)+~P1232(x171651,a46)+P1233(x171651,a46)
% 32.24/32.06 [17166]~P1156(x171661,a60)+~P1232(x171661,a47)+P1233(x171661,a47)
% 32.24/32.06 [17167]~P1156(x171671,a29)+~P1220(x171671,a27)+P1221(x171671,a27)
% 32.24/32.06 [17168]~P1156(x171681,a30)+~P1220(x171681,a26)+P1221(x171681,a26)
% 32.24/32.06 [17169]~P1156(x171691,a31)+~P1220(x171691,a28)+P1221(x171691,a28)
% 32.24/32.06 [17170]~P1156(x171701,a32)+~P1220(x171701,a39)+P1221(x171701,a39)
% 32.24/32.06 [17171]~P1156(x171711,a34)+~P1220(x171711,a62)+P1221(x171711,a62)
% 32.24/32.06 [17172]~P1156(x171721,a33)+~P1220(x171721,a50)+P1221(x171721,a50)
% 32.24/32.06 [17173]~P1156(x171731,a36)+~P1220(x171731,a83)+P1221(x171731,a83)
% 32.24/32.06 [17174]~P1156(x171741,a35)+~P1220(x171741,a61)+P1221(x171741,a61)
% 32.24/32.06 [17175]~P1156(x171751,a40)+~P1220(x171751,a29)+P1221(x171751,a29)
% 32.24/32.06 [17176]~P1156(x171761,a41)+~P1220(x171761,a30)+P1221(x171761,a30)
% 32.24/32.06 [17177]~P1156(x171771,a38)+~P1220(x171771,a91)+P1221(x171771,a91)
% 32.24/32.06 [17178]~P1156(x171781,a37)+~P1220(x171781,a92)+P1221(x171781,a92)
% 32.24/32.06 [17179]~P1156(x171791,a42)+~P1220(x171791,a31)+P1221(x171791,a31)
% 32.24/32.06 [17180]~P1156(x171801,a43)+~P1220(x171801,a32)+P1221(x171801,a32)
% 32.24/32.06 [17181]~P1156(x171811,a44)+~P1220(x171811,a33)+P1221(x171811,a33)
% 32.24/32.06 [17182]~P1156(x171821,a45)+~P1220(x171821,a34)+P1221(x171821,a34)
% 32.24/32.06 [17183]~P1156(x171831,a46)+~P1220(x171831,a35)+P1221(x171831,a35)
% 32.24/32.06 [17184]~P1156(x171841,a47)+~P1220(x171841,a36)+P1221(x171841,a36)
% 32.24/32.06 [17185]~P1156(x171851,a48)+~P1220(x171851,a37)+P1221(x171851,a37)
% 32.24/32.06 [17186]~P1156(x171861,a49)+~P1220(x171861,a38)+P1221(x171861,a38)
% 32.24/32.06 [17187]~P1156(x171871,a51)+~P1220(x171871,a40)+P1221(x171871,a40)
% 32.24/32.06 [17188]~P1156(x171881,a52)+~P1220(x171881,a41)+P1221(x171881,a41)
% 32.24/32.06 [17189]~P1156(x171891,a53)+~P1220(x171891,a42)+P1221(x171891,a42)
% 32.24/32.06 [17190]~P1156(x171901,a54)+~P1220(x171901,a43)+P1221(x171901,a43)
% 32.24/32.06 [17191]~P1156(x171911,a55)+~P1220(x171911,a44)+P1221(x171911,a44)
% 32.24/32.06 [17192]~P1156(x171921,a56)+~P1220(x171921,a45)+P1221(x171921,a45)
% 32.24/32.06 [17193]~P1156(x171931,a57)+~P1220(x171931,a46)+P1221(x171931,a46)
% 32.24/32.06 [17194]~P1156(x171941,a58)+~P1220(x171941,a47)+P1221(x171941,a47)
% 32.24/32.06 [17195]~P1156(x171951,a59)+~P1220(x171951,a48)+P1221(x171951,a48)
% 32.24/32.06 [17196]~P1156(x171961,a60)+~P1220(x171961,a49)+P1221(x171961,a49)
% 32.24/32.06 [17197]~P1156(x171971,a92)+~P1207(x171971,a27)+P1208(x171971,a27)
% 32.24/32.06 [17198]~P1156(x171981,a91)+~P1207(x171981,a26)+P1208(x171981,a26)
% 32.24/32.06 [17199]~P1156(x171991,a29)+~P1207(x171991,a28)+P1208(x171991,a28)
% 32.24/32.06 [17200]~P1156(x172001,a30)+~P1207(x172001,a39)+P1208(x172001,a39)
% 32.24/32.06 [17201]~P1156(x172011,a32)+~P1207(x172011,a62)+P1208(x172011,a62)
% 32.24/32.06 [17202]~P1156(x172021,a31)+~P1207(x172021,a50)+P1208(x172021,a50)
% 32.24/32.06 [17203]~P1156(x172031,a34)+~P1207(x172031,a83)+P1208(x172031,a83)
% 32.24/32.06 [17204]~P1156(x172041,a33)+~P1207(x172041,a61)+P1208(x172041,a61)
% 32.24/32.06 [17205]~P1156(x172051,a37)+~P1207(x172051,a29)+P1208(x172051,a29)
% 32.24/32.06 [17206]~P1156(x172061,a38)+~P1207(x172061,a30)+P1208(x172061,a30)
% 32.24/32.06 [17207]~P1156(x172071,a36)+~P1207(x172071,a91)+P1208(x172071,a91)
% 32.24/32.06 [17208]~P1156(x172081,a35)+~P1207(x172081,a92)+P1208(x172081,a92)
% 32.24/32.06 [17209]~P1156(x172091,a40)+~P1207(x172091,a31)+P1208(x172091,a31)
% 32.24/32.06 [17210]~P1156(x172101,a41)+~P1207(x172101,a32)+P1208(x172101,a32)
% 32.24/32.06 [17211]~P1156(x172111,a42)+~P1207(x172111,a33)+P1208(x172111,a33)
% 32.24/32.06 [17212]~P1156(x172121,a43)+~P1207(x172121,a34)+P1208(x172121,a34)
% 32.24/32.06 [17213]~P1156(x172131,a44)+~P1207(x172131,a35)+P1208(x172131,a35)
% 32.24/32.06 [17214]~P1156(x172141,a45)+~P1207(x172141,a36)+P1208(x172141,a36)
% 32.24/32.06 [17215]~P1156(x172151,a46)+~P1207(x172151,a37)+P1208(x172151,a37)
% 32.24/32.06 [17216]~P1156(x172161,a47)+~P1207(x172161,a38)+P1208(x172161,a38)
% 32.24/32.06 [17217]~P1156(x172171,a48)+~P1207(x172171,a40)+P1208(x172171,a40)
% 32.24/32.06 [17218]~P1156(x172181,a49)+~P1207(x172181,a41)+P1208(x172181,a41)
% 32.24/32.06 [17219]~P1156(x172191,a51)+~P1207(x172191,a42)+P1208(x172191,a42)
% 32.24/32.06 [17220]~P1156(x172201,a52)+~P1207(x172201,a43)+P1208(x172201,a43)
% 32.24/32.06 [17221]~P1156(x172211,a53)+~P1207(x172211,a44)+P1208(x172211,a44)
% 32.24/32.06 [17222]~P1156(x172221,a54)+~P1207(x172221,a45)+P1208(x172221,a45)
% 32.24/32.06 [17223]~P1156(x172231,a55)+~P1207(x172231,a46)+P1208(x172231,a46)
% 32.24/32.06 [17224]~P1156(x172241,a56)+~P1207(x172241,a47)+P1208(x172241,a47)
% 32.24/32.06 [17225]~P1156(x172251,a57)+~P1207(x172251,a48)+P1208(x172251,a48)
% 32.24/32.06 [17226]~P1156(x172261,a58)+~P1207(x172261,a49)+P1208(x172261,a49)
% 32.24/32.06 [17227]~P1156(x172271,a59)+~P1207(x172271,a51)+P1208(x172271,a51)
% 32.24/32.06 [17228]~P1156(x172281,a60)+~P1207(x172281,a52)+P1208(x172281,a52)
% 32.24/32.06 [17229]~P1156(x172291,a61)+~P1195(x172291,a27)+P1193(x172291,a27)
% 32.24/32.06 [17230]~P1156(x172301,a83)+~P1195(x172301,a26)+P1193(x172301,a26)
% 32.24/32.06 [17231]~P1156(x172311,a92)+~P1195(x172311,a28)+P1193(x172311,a28)
% 32.24/32.06 [17232]~P1156(x172321,a91)+~P1195(x172321,a39)+P1193(x172321,a39)
% 32.24/32.06 [17233]~P1156(x172331,a30)+~P1195(x172331,a62)+P1193(x172331,a62)
% 32.24/32.06 [17234]~P1156(x172341,a29)+~P1195(x172341,a50)+P1193(x172341,a50)
% 32.24/32.06 [17235]~P1156(x172351,a32)+~P1195(x172351,a83)+P1193(x172351,a83)
% 32.24/32.06 [17236]~P1156(x172361,a31)+~P1195(x172361,a61)+P1193(x172361,a61)
% 32.24/32.06 [17237]~P1156(x172371,a35)+~P1195(x172371,a29)+P1193(x172371,a29)
% 32.24/32.06 [17238]~P1156(x172381,a36)+~P1195(x172381,a30)+P1193(x172381,a30)
% 32.24/32.06 [17239]~P1156(x172391,a34)+~P1195(x172391,a91)+P1193(x172391,a91)
% 32.24/32.06 [17240]~P1156(x172401,a33)+~P1195(x172401,a92)+P1193(x172401,a92)
% 32.24/32.06 [17241]~P1156(x172411,a37)+~P1195(x172411,a31)+P1193(x172411,a31)
% 32.24/32.06 [17242]~P1156(x172421,a38)+~P1195(x172421,a32)+P1193(x172421,a32)
% 32.24/32.06 [17243]~P1156(x172431,a40)+~P1195(x172431,a33)+P1193(x172431,a33)
% 32.24/32.06 [17244]~P1156(x172441,a41)+~P1195(x172441,a34)+P1193(x172441,a34)
% 32.24/32.06 [17245]~P1156(x172451,a42)+~P1195(x172451,a35)+P1193(x172451,a35)
% 32.24/32.06 [17246]~P1156(x172461,a43)+~P1195(x172461,a36)+P1193(x172461,a36)
% 32.24/32.06 [17247]~P1156(x172471,a44)+~P1195(x172471,a37)+P1193(x172471,a37)
% 32.24/32.06 [17248]~P1156(x172481,a45)+~P1195(x172481,a38)+P1193(x172481,a38)
% 32.24/32.06 [17249]~P1156(x172491,a46)+~P1195(x172491,a40)+P1193(x172491,a40)
% 32.24/32.06 [17250]~P1156(x172501,a47)+~P1195(x172501,a41)+P1193(x172501,a41)
% 32.24/32.06 [17251]~P1156(x172511,a48)+~P1195(x172511,a42)+P1193(x172511,a42)
% 32.24/32.06 [17252]~P1156(x172521,a49)+~P1195(x172521,a43)+P1193(x172521,a43)
% 32.24/32.06 [17253]~P1156(x172531,a51)+~P1195(x172531,a44)+P1193(x172531,a44)
% 32.24/32.06 [17254]~P1156(x172541,a52)+~P1195(x172541,a45)+P1193(x172541,a45)
% 32.24/32.06 [17255]~P1156(x172551,a53)+~P1195(x172551,a46)+P1193(x172551,a46)
% 32.24/32.06 [17256]~P1156(x172561,a54)+~P1195(x172561,a47)+P1193(x172561,a47)
% 32.24/32.06 [17257]~P1156(x172571,a55)+~P1195(x172571,a48)+P1193(x172571,a48)
% 32.24/32.06 [17258]~P1156(x172581,a56)+~P1195(x172581,a49)+P1193(x172581,a49)
% 32.24/32.06 [17259]~P1156(x172591,a57)+~P1195(x172591,a51)+P1193(x172591,a51)
% 32.24/32.06 [17260]~P1156(x172601,a58)+~P1195(x172601,a52)+P1193(x172601,a52)
% 32.24/32.06 [17261]~P1156(x172611,a59)+~P1195(x172611,a53)+P1193(x172611,a53)
% 32.24/32.06 [17262]~P1156(x172621,a60)+~P1195(x172621,a54)+P1193(x172621,a54)
% 32.24/32.06 [17263]~P1156(x172631,a50)+~P1184(x172631,a27)+P1185(x172631,a27)
% 32.24/32.06 [17264]~P1156(x172641,a62)+~P1184(x172641,a26)+P1185(x172641,a26)
% 32.24/32.06 [17265]~P1156(x172651,a61)+~P1184(x172651,a28)+P1185(x172651,a28)
% 32.24/32.06 [17266]~P1156(x172661,a83)+~P1184(x172661,a39)+P1185(x172661,a39)
% 32.24/32.06 [17267]~P1156(x172671,a91)+~P1184(x172671,a62)+P1185(x172671,a62)
% 32.24/32.06 [17268]~P1156(x172681,a92)+~P1184(x172681,a50)+P1185(x172681,a50)
% 32.24/32.06 [17269]~P1156(x172691,a30)+~P1184(x172691,a83)+P1185(x172691,a83)
% 32.24/32.06 [17270]~P1156(x172701,a29)+~P1184(x172701,a61)+P1185(x172701,a61)
% 32.24/32.06 [17271]~P1156(x172711,a33)+~P1184(x172711,a29)+P1185(x172711,a29)
% 32.24/32.06 [17272]~P1156(x172721,a34)+~P1184(x172721,a30)+P1185(x172721,a30)
% 32.24/32.06 [17273]~P1156(x172731,a32)+~P1184(x172731,a91)+P1185(x172731,a91)
% 32.24/32.06 [17274]~P1156(x172741,a31)+~P1184(x172741,a92)+P1185(x172741,a92)
% 32.24/32.06 [17275]~P1156(x172751,a35)+~P1184(x172751,a31)+P1185(x172751,a31)
% 32.24/32.06 [17276]~P1156(x172761,a36)+~P1184(x172761,a32)+P1185(x172761,a32)
% 32.24/32.06 [17277]~P1156(x172771,a37)+~P1184(x172771,a33)+P1185(x172771,a33)
% 32.24/32.06 [17278]~P1156(x172781,a38)+~P1184(x172781,a34)+P1185(x172781,a34)
% 32.24/32.06 [17279]~P1156(x172791,a40)+~P1184(x172791,a35)+P1185(x172791,a35)
% 32.24/32.06 [17280]~P1156(x172801,a41)+~P1184(x172801,a36)+P1185(x172801,a36)
% 32.24/32.06 [17281]~P1156(x172811,a42)+~P1184(x172811,a37)+P1185(x172811,a37)
% 32.24/32.06 [17282]~P1156(x172821,a43)+~P1184(x172821,a38)+P1185(x172821,a38)
% 32.24/32.06 [17283]~P1156(x172831,a44)+~P1184(x172831,a40)+P1185(x172831,a40)
% 32.24/32.06 [17284]~P1156(x172841,a45)+~P1184(x172841,a41)+P1185(x172841,a41)
% 32.24/32.06 [17285]~P1156(x172851,a46)+~P1184(x172851,a42)+P1185(x172851,a42)
% 32.24/32.06 [17286]~P1156(x172861,a47)+~P1184(x172861,a43)+P1185(x172861,a43)
% 32.24/32.06 [17287]~P1156(x172871,a48)+~P1184(x172871,a44)+P1185(x172871,a44)
% 32.24/32.06 [17288]~P1156(x172881,a49)+~P1184(x172881,a45)+P1185(x172881,a45)
% 32.24/32.06 [17289]~P1156(x172891,a51)+~P1184(x172891,a46)+P1185(x172891,a46)
% 32.24/32.06 [17290]~P1156(x172901,a52)+~P1184(x172901,a47)+P1185(x172901,a47)
% 32.24/32.06 [17291]~P1156(x172911,a53)+~P1184(x172911,a48)+P1185(x172911,a48)
% 32.24/32.06 [17292]~P1156(x172921,a54)+~P1184(x172921,a49)+P1185(x172921,a49)
% 32.24/32.06 [17293]~P1156(x172931,a55)+~P1184(x172931,a51)+P1185(x172931,a51)
% 32.24/32.06 [17294]~P1156(x172941,a56)+~P1184(x172941,a52)+P1185(x172941,a52)
% 32.24/32.06 [17295]~P1156(x172951,a57)+~P1184(x172951,a53)+P1185(x172951,a53)
% 32.24/32.06 [17296]~P1156(x172961,a58)+~P1184(x172961,a54)+P1185(x172961,a54)
% 32.24/32.06 [17297]~P1156(x172971,a59)+~P1184(x172971,a55)+P1185(x172971,a55)
% 32.24/32.06 [17298]~P1156(x172981,a60)+~P1184(x172981,a56)+P1185(x172981,a56)
% 32.24/32.06 [17299]~P1156(x172991,a28)+~P1169(x172991,a27)+P1170(x172991,a27)
% 32.24/32.06 [17300]~P1156(x173001,a39)+~P1169(x173001,a26)+P1170(x173001,a26)
% 32.24/32.06 [17301]~P1156(x173011,a50)+~P1169(x173011,a28)+P1170(x173011,a28)
% 32.24/32.06 [17302]~P1156(x173021,a62)+~P1169(x173021,a39)+P1170(x173021,a39)
% 32.24/32.06 [17303]~P1156(x173031,a83)+~P1169(x173031,a62)+P1170(x173031,a62)
% 32.24/32.06 [17304]~P1156(x173041,a61)+~P1169(x173041,a50)+P1170(x173041,a50)
% 32.24/32.06 [17305]~P1156(x173051,a91)+~P1169(x173051,a83)+P1170(x173051,a83)
% 32.24/32.06 [17306]~P1156(x173061,a92)+~P1169(x173061,a61)+P1170(x173061,a61)
% 32.24/32.06 [17307]~P1156(x173071,a31)+~P1169(x173071,a29)+P1170(x173071,a29)
% 32.24/32.06 [17308]~P1156(x173081,a32)+~P1169(x173081,a30)+P1170(x173081,a30)
% 32.24/32.06 [17309]~P1156(x173091,a30)+~P1169(x173091,a91)+P1170(x173091,a91)
% 32.24/32.06 [17310]~P1156(x173101,a29)+~P1169(x173101,a92)+P1170(x173101,a92)
% 32.24/32.06 [17311]~P1156(x173111,a33)+~P1169(x173111,a31)+P1170(x173111,a31)
% 32.24/32.06 [17312]~P1156(x173121,a34)+~P1169(x173121,a32)+P1170(x173121,a32)
% 32.24/32.06 [17313]~P1156(x173131,a35)+~P1169(x173131,a33)+P1170(x173131,a33)
% 32.24/32.06 [17314]~P1156(x173141,a36)+~P1169(x173141,a34)+P1170(x173141,a34)
% 32.24/32.06 [17315]~P1156(x173151,a37)+~P1169(x173151,a35)+P1170(x173151,a35)
% 32.24/32.06 [17316]~P1156(x173161,a38)+~P1169(x173161,a36)+P1170(x173161,a36)
% 32.24/32.06 [17317]~P1156(x173171,a40)+~P1169(x173171,a37)+P1170(x173171,a37)
% 32.24/32.06 [17318]~P1156(x173181,a41)+~P1169(x173181,a38)+P1170(x173181,a38)
% 32.24/32.06 [17319]~P1156(x173191,a42)+~P1169(x173191,a40)+P1170(x173191,a40)
% 32.24/32.06 [17320]~P1156(x173201,a43)+~P1169(x173201,a41)+P1170(x173201,a41)
% 32.24/32.06 [17321]~P1156(x173211,a44)+~P1169(x173211,a42)+P1170(x173211,a42)
% 32.24/32.06 [17322]~P1156(x173221,a45)+~P1169(x173221,a43)+P1170(x173221,a43)
% 32.24/32.06 [17323]~P1156(x173231,a46)+~P1169(x173231,a44)+P1170(x173231,a44)
% 32.24/32.06 [17324]~P1156(x173241,a47)+~P1169(x173241,a45)+P1170(x173241,a45)
% 32.24/32.06 [17325]~P1156(x173251,a48)+~P1169(x173251,a46)+P1170(x173251,a46)
% 32.24/32.06 [17326]~P1156(x173261,a49)+~P1169(x173261,a47)+P1170(x173261,a47)
% 32.24/32.06 [17327]~P1156(x173271,a51)+~P1169(x173271,a48)+P1170(x173271,a48)
% 32.24/32.06 [17328]~P1156(x173281,a52)+~P1169(x173281,a49)+P1170(x173281,a49)
% 32.24/32.06 [17329]~P1156(x173291,a53)+~P1169(x173291,a51)+P1170(x173291,a51)
% 32.24/32.06 [17330]~P1156(x173301,a54)+~P1169(x173301,a52)+P1170(x173301,a52)
% 32.24/32.06 [17331]~P1156(x173311,a55)+~P1169(x173311,a53)+P1170(x173311,a53)
% 32.24/32.06 [17332]~P1156(x173321,a56)+~P1169(x173321,a54)+P1170(x173321,a54)
% 32.24/32.06 [17333]~P1156(x173331,a57)+~P1169(x173331,a55)+P1170(x173331,a55)
% 32.24/32.06 [17334]~P1156(x173341,a58)+~P1169(x173341,a56)+P1170(x173341,a56)
% 32.24/32.06 [17335]~P1156(x173351,a59)+~P1169(x173351,a57)+P1170(x173351,a57)
% 32.24/32.06 [17336]~P1156(x173361,a60)+~P1169(x173361,a58)+P1170(x173361,a58)
% 32.24/32.06 [10853]~P115(x108532)+P1712(x108531)+P1713(x108531,x108532)
% 32.24/32.06 [11234]~P113(x112342)+~P1925(x112341)+P1960(x112341,x112342)
% 32.24/32.06 [11235]~P115(x112352)+~P1661(x112351)+P1662(x112351,x112352)
% 32.24/32.06 [11253]~P63(x112531,x112532)+P157(x112531)+P157(x112532)
% 32.24/32.06 [11254]P1606(x112541)+P2141(x112541)+~P63(x112542,x112541)
% 32.24/32.06 [11255]P1592(x112551)+P1606(x112551)+~P63(x112552,x112551)
% 32.24/32.06 [11256]P331(x112561)+P2126(x112561)+~P63(x112562,x112561)
% 32.24/32.06 [11257]P1988(x112571)+P331(x112571)+~P63(x112572,x112571)
% 32.24/32.06 [11258]P1914(x112581)+P331(x112581)+~P63(x112582,x112581)
% 32.24/32.06 [11259]P756(x112591)+P331(x112591)+~P63(x112592,x112591)
% 32.24/32.06 [11260]P708(x112601)+P331(x112601)+~P63(x112602,x112601)
% 32.24/32.06 [11261]P687(x112611)+P331(x112611)+~P63(x112612,x112611)
% 32.24/32.06 [11262]P388(x112621)+P331(x112621)+~P63(x112622,x112621)
% 32.24/32.06 [11263]P374(x112631)+P331(x112631)+~P63(x112632,x112631)
% 32.24/32.06 [11264]P360(x112641)+P331(x112641)+~P63(x112642,x112641)
% 32.24/32.06 [11265]P352(x112651)+P331(x112651)+~P63(x112652,x112651)
% 32.24/32.06 [11266]P348(x112661)+P331(x112661)+~P63(x112662,x112661)
% 32.24/32.06 [11267]P341(x112671)+P331(x112671)+~P63(x112672,x112671)
% 32.24/32.06 [11268]P332(x112681)+P331(x112681)+~P63(x112682,x112681)
% 32.24/32.06 [11269]P2086(x112691)+P2098(x112691)+~P63(x112692,x112691)
% 32.24/32.06 [11270]P2094(x112701)+P2086(x112701)+~P63(x112702,x112701)
% 32.24/32.06 [11271]P2087(x112711)+P2086(x112711)+~P63(x112712,x112711)
% 32.24/32.06 [11272]P2056(x112721)+P2053(x112721)+~P63(x112722,x112721)
% 32.24/32.06 [11273]P1952(x112731)+P1949(x112731)+~P63(x112732,x112731)
% 32.24/32.06 [11274]P2497(x112741)+P1894(x112741)+~P63(x112742,x112741)
% 32.24/32.06 [11275]P794(x112751)+P2497(x112751)+~P63(x112752,x112751)
% 32.24/32.06 [11276]P2512(x112761)+P2497(x112761)+~P63(x112762,x112761)
% 32.24/32.06 [11277]P2506(x112771)+P2497(x112771)+~P63(x112772,x112771)
% 32.24/32.06 [11278]P2498(x112781)+P2497(x112781)+~P63(x112782,x112781)
% 32.24/32.06 [11279]P1774(x112791)+P1772(x112791)+~P63(x112792,x112791)
% 32.24/32.06 [11280]P870(x112801)+P1763(x112801)+~P63(x112802,x112801)
% 32.24/32.06 [11281]P960(x112811)+P870(x112811)+~P63(x112812,x112811)
% 32.24/32.06 [11282]P934(x112821)+P870(x112821)+~P63(x112822,x112821)
% 32.24/32.06 [11283]P871(x112831)+P870(x112831)+~P63(x112832,x112831)
% 32.24/32.06 [11284]P801(x112841)+P1729(x112841)+~P63(x112842,x112841)
% 32.24/32.06 [11285]P1601(x112851)+P801(x112851)+~P63(x112852,x112851)
% 32.24/32.06 [11286]P1525(x112861)+P801(x112861)+~P63(x112862,x112861)
% 32.24/32.06 [11287]P802(x112871)+P801(x112871)+~P63(x112872,x112871)
% 32.24/32.06 [11288]P1520(x112881)+P1516(x112881)+~P63(x112882,x112881)
% 32.24/32.06 [11289]P879(x112891)+P1458(x112891)+~P63(x112892,x112891)
% 32.24/32.06 [11290]P872(x112901)+P879(x112901)+~P63(x112902,x112901)
% 32.24/32.06 [11291]P971(x112911)+P969(x112911)+~P63(x112912,x112911)
% 32.24/32.06 [11292]P2593(x112921)+P731(x112921)+~P63(x112922,x112921)
% 32.24/32.06 [11293]P266(x112931)+P2593(x112931)+~P63(x112932,x112931)
% 32.24/32.06 [11294]P166(x112941)+P2593(x112941)+~P63(x112942,x112941)
% 32.24/32.06 [11295]P2600(x112951)+P2593(x112951)+~P63(x112952,x112951)
% 32.24/32.06 [11296]P2594(x112961)+P2593(x112961)+~P63(x112962,x112961)
% 32.24/32.06 [11297]P536(x112971)+P612(x112971)+~P63(x112972,x112971)
% 32.24/32.06 [11298]P565(x112981)+P536(x112981)+~P63(x112982,x112981)
% 32.24/32.06 [11299]P537(x112991)+P536(x112991)+~P63(x112992,x112991)
% 32.24/32.06 [11300]P444(x113001)+P504(x113001)+~P63(x113002,x113001)
% 32.24/32.06 [11301]P496(x113011)+P444(x113011)+~P63(x113012,x113011)
% 32.24/32.06 [11302]P483(x113021)+P444(x113021)+~P63(x113022,x113021)
% 32.24/32.06 [11303]P474(x113031)+P444(x113031)+~P63(x113032,x113031)
% 32.24/32.06 [11304]P463(x113041)+P444(x113041)+~P63(x113042,x113041)
% 32.24/32.06 [11305]P445(x113051)+P444(x113051)+~P63(x113052,x113051)
% 32.24/32.06 [11306]P2439(x113061)+P2437(x113061)+~P63(x113062,x113061)
% 32.24/32.06 [11307]P2429(x113071)+P2427(x113071)+~P63(x113072,x113071)
% 32.24/32.06 [11308]P2292(x113081)+P2398(x113081)+~P63(x113082,x113081)
% 32.24/32.06 [11309]P2293(x113091)+P2292(x113091)+~P63(x113092,x113091)
% 32.24/32.06 [11310]P2386(x113101)+P2383(x113101)+~P63(x113102,x113101)
% 32.24/32.06 [11311]P2276(x113111)+P2273(x113111)+~P63(x113112,x113111)
% 32.24/32.06 [15682]~P2143(x156821)+P2142(x156821)+~P63(x156822,x156821)
% 32.24/32.06 [15683]~P2142(x156831)+P2143(x156831)+~P63(x156832,x156831)
% 32.24/32.06 [15684]~P2143(x156841)+P2141(x156841)+~P63(x156842,x156841)
% 32.24/32.06 [15685]~P63(x156851,x156852)+P1523(x156851)+~P1606(x156852)
% 32.24/32.06 [15686]~P2143(x156861)+P1523(x156861)+~P63(x156862,x156861)
% 32.24/32.06 [15687]~P1589(x156871)+P1523(x156871)+~P63(x156872,x156871)
% 32.24/32.06 [15688]~P63(x156882,x156881)+P1606(x156881)+~P1523(x156882)
% 32.24/32.06 [15689]~P2129(x156891)+P2128(x156891)+~P63(x156892,x156891)
% 32.24/32.06 [15690]~P2128(x156901)+P2129(x156901)+~P63(x156902,x156901)
% 32.24/32.06 [15691]~P2129(x156911)+P2126(x156911)+~P63(x156912,x156911)
% 32.24/32.06 [15692]~P63(x156921,x156922)+P328(x156921)+~P331(x156922)
% 32.24/32.06 [15693]~P2129(x156931)+P328(x156931)+~P63(x156932,x156931)
% 32.24/32.06 [15694]~P1989(x156941)+P328(x156941)+~P63(x156942,x156941)
% 32.24/32.06 [15695]~P1916(x156951)+P328(x156951)+~P63(x156952,x156951)
% 32.24/32.06 [15696]~P758(x156961)+P328(x156961)+~P63(x156962,x156961)
% 32.24/32.06 [15697]~P710(x156971)+P328(x156971)+~P63(x156972,x156971)
% 32.24/32.06 [15698]~P684(x156981)+P328(x156981)+~P63(x156982,x156981)
% 32.24/32.06 [15699]~P390(x156991)+P328(x156991)+~P63(x156992,x156991)
% 32.24/32.06 [15700]~P376(x157001)+P328(x157001)+~P63(x157002,x157001)
% 32.24/32.06 [15701]~P361(x157011)+P328(x157011)+~P63(x157012,x157011)
% 32.24/32.06 [15702]~P354(x157021)+P328(x157021)+~P63(x157022,x157021)
% 32.24/32.06 [15703]~P346(x157031)+P328(x157031)+~P63(x157032,x157031)
% 32.24/32.06 [15704]~P343(x157041)+P328(x157041)+~P63(x157042,x157041)
% 32.24/32.06 [15705]~P334(x157051)+P328(x157051)+~P63(x157052,x157051)
% 32.24/32.06 [15706]~P63(x157062,x157061)+P331(x157061)+~P328(x157062)
% 32.24/32.06 [15707]~P2102(x157071)+P2101(x157071)+~P63(x157072,x157071)
% 32.24/32.06 [15708]~P2101(x157081)+P2102(x157081)+~P63(x157082,x157081)
% 32.24/32.06 [15709]~P2102(x157091)+P2098(x157091)+~P63(x157092,x157091)
% 32.24/32.06 [15710]~P63(x157101,x157102)+P2078(x157101)+~P2086(x157102)
% 32.24/32.06 [15711]~P2102(x157111)+P2078(x157111)+~P63(x157112,x157111)
% 32.24/32.06 [15712]~P2096(x157121)+P2078(x157121)+~P63(x157122,x157121)
% 32.24/32.06 [15713]~P2084(x157131)+P2078(x157131)+~P63(x157132,x157131)
% 32.24/32.06 [15714]~P63(x157142,x157141)+P2086(x157141)+~P2078(x157142)
% 32.24/32.06 [15715]~P2096(x157151)+P2097(x157151)+~P63(x157152,x157151)
% 32.24/32.06 [15716]~P2097(x157161)+P2096(x157161)+~P63(x157162,x157161)
% 32.24/32.06 [15717]~P2096(x157171)+P2094(x157171)+~P63(x157172,x157171)
% 32.24/32.06 [15718]~P2084(x157181)+P2085(x157181)+~P63(x157182,x157181)
% 32.24/32.06 [15719]~P2085(x157191)+P2084(x157191)+~P63(x157192,x157191)
% 32.24/32.06 [15720]~P2084(x157201)+P2087(x157201)+~P63(x157202,x157201)
% 32.24/32.06 [15721]~P63(x157211,x157212)+P2050(x157211)+~P2056(x157212)
% 32.24/32.06 [15722]~P2054(x157221)+P2050(x157221)+~P63(x157222,x157221)
% 32.24/32.06 [15723]~P2054(x157231)+P2055(x157231)+~P63(x157232,x157231)
% 32.24/32.06 [15724]~P2055(x157241)+P2054(x157241)+~P63(x157242,x157241)
% 32.24/32.06 [15725]~P2054(x157251)+P2053(x157251)+~P63(x157252,x157251)
% 32.24/32.06 [15726]~P63(x157262,x157261)+P2056(x157261)+~P2050(x157262)
% 32.24/32.06 [15727]~P1989(x157271)+P1987(x157271)+~P63(x157272,x157271)
% 32.24/32.06 [15728]~P63(x157282,x157281)+P1990(x157281)+~P1986(x157282)
% 32.24/32.06 [15729]~P63(x157291,x157292)+P1986(x157291)+~P1990(x157292)
% 32.24/32.06 [15730]~P1987(x157301)+P1989(x157301)+~P63(x157302,x157301)
% 32.24/32.06 [15731]~P1989(x157311)+P1988(x157311)+~P63(x157312,x157311)
% 32.24/32.06 [15732]~P1951(x157321)+P1950(x157321)+~P63(x157322,x157321)
% 32.24/32.06 [15733]~P63(x157332,x157331)+P1954(x157331)+~P1947(x157332)
% 32.24/32.06 [15734]~P1951(x157341)+P1954(x157341)+~P63(x157342,x157341)
% 32.24/32.06 [15735]~P63(x157351,x157352)+P1947(x157351)+~P1954(x157352)
% 32.24/32.06 [15736]~P1950(x157361)+P1949(x157361)+~P63(x157362,x157361)
% 32.24/32.06 [15737]~P63(x157371,x157372)+P1948(x157371)+~P1952(x157372)
% 32.24/32.06 [15738]~P1950(x157381)+P1948(x157381)+~P63(x157382,x157381)
% 32.24/32.06 [15739]~P63(x157392,x157391)+P1952(x157391)+~P1948(x157392)
% 32.24/32.06 [15740]~P63(x157401,x157402)+P1544(x157401)+~P801(x157402)
% 32.24/32.06 [15741]~P1730(x157411)+P1544(x157411)+~P63(x157412,x157411)
% 32.24/32.06 [15742]~P1602(x157421)+P1544(x157421)+~P63(x157422,x157421)
% 32.24/32.06 [15743]~P1526(x157431)+P1544(x157431)+~P63(x157432,x157431)
% 32.24/32.06 [15744]~P803(x157441)+P1544(x157441)+~P63(x157442,x157441)
% 32.24/32.06 [15745]~P1916(x157451)+P1917(x157451)+~P63(x157452,x157451)
% 32.24/32.06 [15746]~P1917(x157461)+P1916(x157461)+~P63(x157462,x157461)
% 32.24/32.06 [15747]~P1916(x157471)+P1914(x157471)+~P63(x157472,x157471)
% 32.24/32.06 [15748]~P1896(x157481)+P1895(x157481)+~P63(x157482,x157481)
% 32.24/32.06 [15749]~P1895(x157491)+P1896(x157491)+~P63(x157492,x157491)
% 32.24/32.06 [15750]~P1896(x157501)+P1894(x157501)+~P63(x157502,x157501)
% 32.24/32.06 [15751]~P63(x157511,x157512)+P2451(x157511)+~P2497(x157512)
% 32.24/32.06 [15752]~P1896(x157521)+P2451(x157521)+~P63(x157522,x157521)
% 32.24/32.06 [15753]~P795(x157531)+P2451(x157531)+~P63(x157532,x157531)
% 32.24/32.06 [15754]~P2513(x157541)+P2451(x157541)+~P63(x157542,x157541)
% 32.24/32.06 [15755]~P2507(x157551)+P2451(x157551)+~P63(x157552,x157551)
% 32.24/32.06 [15756]~P2499(x157561)+P2451(x157561)+~P63(x157562,x157561)
% 32.24/32.06 [15757]~P63(x157572,x157571)+P2497(x157571)+~P2451(x157572)
% 32.24/32.06 [15758]~P63(x157582,x157581)+P1804(x157581)+~P1802(x157582)
% 32.24/32.06 [15759]~P63(x157591,x157592)+P1802(x157591)+~P1804(x157592)
% 32.24/32.06 [15760]~P1771(x157601)+P1773(x157601)+~P63(x157602,x157601)
% 32.24/32.06 [15761]~P63(x157612,x157611)+P1776(x157611)+~P1769(x157612)
% 32.24/32.06 [15762]~P1771(x157621)+P1776(x157621)+~P63(x157622,x157621)
% 32.24/32.06 [15763]~P63(x157631,x157632)+P1769(x157631)+~P1776(x157632)
% 32.24/32.06 [15764]~P1773(x157641)+P1772(x157641)+~P63(x157642,x157641)
% 32.24/32.06 [15765]~P63(x157651,x157652)+P1770(x157651)+~P1774(x157652)
% 32.24/32.06 [15766]~P1773(x157661)+P1770(x157661)+~P63(x157662,x157661)
% 32.24/32.06 [15767]~P63(x157672,x157671)+P1774(x157671)+~P1770(x157672)
% 32.24/32.06 [15768]~P1766(x157681)+P1765(x157681)+~P63(x157682,x157681)
% 32.24/32.06 [15769]~P1765(x157691)+P1766(x157691)+~P63(x157692,x157691)
% 32.24/32.06 [15770]~P1766(x157701)+P1763(x157701)+~P63(x157702,x157701)
% 32.24/32.06 [15771]~P63(x157711,x157712)+P866(x157711)+~P870(x157712)
% 32.24/32.06 [15772]~P1766(x157721)+P866(x157721)+~P63(x157722,x157721)
% 32.24/32.06 [15773]~P961(x157731)+P866(x157731)+~P63(x157732,x157731)
% 32.24/32.06 [15774]~P935(x157741)+P866(x157741)+~P63(x157742,x157741)
% 32.24/32.06 [15775]~P874(x157751)+P866(x157751)+~P63(x157752,x157751)
% 32.24/32.06 [15776]~P63(x157762,x157761)+P870(x157761)+~P866(x157762)
% 32.24/32.06 [15777]~P1730(x157771)+P1727(x157771)+~P63(x157772,x157771)
% 32.24/32.06 [15778]~P1727(x157781)+P1730(x157781)+~P63(x157782,x157781)
% 32.24/32.06 [15779]~P1730(x157791)+P1729(x157791)+~P63(x157792,x157791)
% 32.24/32.06 [15780]~P63(x157802,x157801)+P801(x157801)+~P1544(x157802)
% 32.24/32.06 [15781]~P1645(x157811,x157812)+P981(x157811)+~P115(x157812)
% 32.24/32.06 [15782]~P1603(x157821)+P1602(x157821)+~P63(x157822,x157821)
% 32.24/32.06 [15783]~P63(x157832,x157831)+P1605(x157831)+~P1596(x157832)
% 32.24/32.06 [15784]~P1603(x157841)+P1605(x157841)+~P63(x157842,x157841)
% 32.24/32.06 [15785]~P63(x157851,x157852)+P1596(x157851)+~P1605(x157852)
% 32.24/32.06 [15786]~P1602(x157861)+P1601(x157861)+~P63(x157862,x157861)
% 32.24/32.06 [15787]~P1527(x157871)+P1526(x157871)+~P63(x157872,x157871)
% 32.24/32.06 [15788]~P63(x157882,x157881)+P1530(x157881)+~P1528(x157882)
% 32.24/32.06 [15789]~P1527(x157891)+P1530(x157891)+~P63(x157892,x157891)
% 32.24/32.06 [15790]~P63(x157901,x157902)+P1528(x157901)+~P1530(x157902)
% 32.24/32.06 [15791]~P1526(x157911)+P1525(x157911)+~P63(x157912,x157911)
% 32.24/32.06 [15792]~P1519(x157921)+P1518(x157921)+~P63(x157922,x157921)
% 32.24/32.06 [15793]~P1518(x157931)+P1519(x157931)+~P63(x157932,x157931)
% 32.24/32.06 [15794]~P1519(x157941)+P1516(x157941)+~P63(x157942,x157941)
% 32.24/32.06 [15795]~P63(x157951,x157952)+P1474(x157951)+~P1520(x157952)
% 32.24/32.06 [15796]~P1519(x157961)+P1474(x157961)+~P63(x157962,x157961)
% 32.24/32.06 [15797]~P63(x157972,x157971)+P1520(x157971)+~P1474(x157972)
% 32.24/32.06 [15798]~P1484(x157981,x157982)+P1478(x157981)+~P129(x157982)
% 32.24/32.06 [15799]~P1510(x157991,x157992)+P1479(x157991)+~P129(x157992)
% 32.24/32.06 [15800]~P1459(x158001)+P1457(x158001)+~P63(x158002,x158001)
% 32.24/32.06 [15801]~P63(x158012,x158011)+P1461(x158011)+~P1460(x158012)
% 32.24/32.06 [15802]~P63(x158021,x158022)+P1460(x158021)+~P1461(x158022)
% 32.24/32.06 [15803]~P1457(x158031)+P1459(x158031)+~P63(x158032,x158031)
% 32.24/32.06 [15804]~P1459(x158041)+P1458(x158041)+~P63(x158042,x158041)
% 32.24/32.06 [15805]~P63(x158051,x158052)+P815(x158051)+~P879(x158052)
% 32.24/32.06 [15806]~P1459(x158061)+P815(x158061)+~P63(x158062,x158061)
% 32.24/32.06 [15807]~P867(x158071)+P815(x158071)+~P63(x158072,x158071)
% 32.24/32.06 [15808]~P63(x158082,x158081)+P879(x158081)+~P815(x158082)
% 32.24/32.06 [15809]~P63(x158092,x158091)+P1003(x158091)+~P1001(x158092)
% 32.24/32.06 [15810]~P63(x158101,x158102)+P1001(x158101)+~P1003(x158102)
% 32.24/32.06 [15811]~P968(x158111)+P970(x158111)+~P63(x158112,x158111)
% 32.24/32.06 [15812]~P63(x158122,x158121)+P973(x158121)+~P966(x158122)
% 32.24/32.06 [15813]~P968(x158131)+P973(x158131)+~P63(x158132,x158131)
% 32.24/32.06 [15814]~P63(x158141,x158142)+P966(x158141)+~P973(x158142)
% 32.24/32.06 [15815]~P970(x158151)+P969(x158151)+~P63(x158152,x158151)
% 32.24/32.06 [15816]~P63(x158161,x158162)+P964(x158161)+~P971(x158162)
% 32.24/32.06 [15817]~P970(x158171)+P964(x158171)+~P63(x158172,x158171)
% 32.24/32.06 [15818]~P63(x158182,x158181)+P971(x158181)+~P964(x158182)
% 32.24/32.06 [15819]~P961(x158191)+P959(x158191)+~P63(x158192,x158191)
% 32.24/32.06 [15820]~P63(x158202,x158201)+P962(x158201)+~P958(x158202)
% 32.24/32.06 [15821]~P63(x158211,x158212)+P958(x158211)+~P962(x158212)
% 32.24/32.06 [15822]~P959(x158221)+P961(x158221)+~P63(x158222,x158221)
% 32.24/32.06 [15823]~P961(x158231)+P960(x158231)+~P63(x158232,x158231)
% 32.24/32.06 [15824]~P935(x158241)+P933(x158241)+~P63(x158242,x158241)
% 32.24/32.06 [15825]~P63(x158252,x158251)+P936(x158251)+~P932(x158252)
% 32.24/32.06 [15826]~P63(x158261,x158262)+P932(x158261)+~P936(x158262)
% 32.24/32.06 [15827]~P933(x158271)+P935(x158271)+~P63(x158272,x158271)
% 32.24/32.06 [15828]~P935(x158281)+P934(x158281)+~P63(x158282,x158281)
% 32.24/32.06 [15829]~P874(x158291)+P875(x158291)+~P63(x158292,x158291)
% 32.24/32.06 [15830]~P875(x158301)+P874(x158301)+~P63(x158302,x158301)
% 32.24/32.06 [15831]~P874(x158311)+P871(x158311)+~P63(x158312,x158311)
% 32.24/32.06 [15832]~P63(x158322,x158321)+P810(x158321)+~P809(x158322)
% 32.24/32.06 [15833]~P63(x158331,x158332)+P809(x158331)+~P810(x158332)
% 32.24/32.06 [15834]~P800(x158341)+P803(x158341)+~P63(x158342,x158341)
% 32.24/32.06 [15835]~P63(x158352,x158351)+P805(x158351)+~P783(x158352)
% 32.24/32.06 [15836]~P800(x158361)+P805(x158361)+~P63(x158362,x158361)
% 32.24/32.06 [15837]~P63(x158371,x158372)+P783(x158371)+~P805(x158372)
% 32.24/32.06 [15838]~P803(x158381)+P802(x158381)+~P63(x158382,x158381)
% 32.24/32.06 [15839]~P795(x158391)+P793(x158391)+~P63(x158392,x158391)
% 32.24/32.06 [15840]~P793(x158401)+P795(x158401)+~P63(x158402,x158401)
% 32.24/32.06 [15841]~P795(x158411)+P794(x158411)+~P63(x158412,x158411)
% 32.24/32.06 [15842]~P758(x158421)+P759(x158421)+~P63(x158422,x158421)
% 32.24/32.06 [15843]~P759(x158431)+P758(x158431)+~P63(x158432,x158431)
% 32.24/32.06 [15844]~P758(x158441)+P756(x158441)+~P63(x158442,x158441)
% 32.24/32.06 [15845]~P733(x158451)+P732(x158451)+~P63(x158452,x158451)
% 32.24/32.06 [15846]~P732(x158461)+P733(x158461)+~P63(x158462,x158461)
% 32.24/32.06 [15847]~P733(x158471)+P731(x158471)+~P63(x158472,x158471)
% 32.24/32.06 [15848]~P63(x158481,x158482)+P2555(x158481)+~P2593(x158482)
% 32.24/32.06 [15849]~P733(x158491)+P2555(x158491)+~P63(x158492,x158491)
% 32.24/32.06 [15850]~P267(x158501)+P2555(x158501)+~P63(x158502,x158501)
% 32.24/32.06 [15851]~P167(x158511)+P2555(x158511)+~P63(x158512,x158511)
% 32.24/32.06 [15852]~P2601(x158521)+P2555(x158521)+~P63(x158522,x158521)
% 32.24/32.06 [15853]~P2595(x158531)+P2555(x158531)+~P63(x158532,x158531)
% 32.24/32.06 [15854]~P63(x158542,x158541)+P2593(x158541)+~P2555(x158542)
% 32.24/32.06 [15855]~P710(x158551)+P711(x158551)+~P63(x158552,x158551)
% 32.24/32.06 [15856]~P711(x158561)+P710(x158561)+~P63(x158562,x158561)
% 32.24/32.06 [15857]~P710(x158571)+P708(x158571)+~P63(x158572,x158571)
% 32.24/32.06 [15858]~P684(x158581)+P683(x158581)+~P63(x158582,x158581)
% 32.24/32.06 [15859]~P63(x158592,x158591)+P689(x158591)+~P686(x158592)
% 32.24/32.06 [15860]~P63(x158601,x158602)+P686(x158601)+~P689(x158602)
% 32.24/32.06 [15861]~P683(x158611)+P684(x158611)+~P63(x158612,x158611)
% 32.24/32.06 [15862]~P684(x158621)+P687(x158621)+~P63(x158622,x158621)
% 32.24/32.06 [15863]~P613(x158631)+P611(x158631)+~P63(x158632,x158631)
% 32.24/32.06 [15864]~P63(x158642,x158641)+P614(x158641)+~P610(x158642)
% 32.24/32.06 [15865]~P63(x158651,x158652)+P610(x158651)+~P614(x158652)
% 32.24/32.06 [15866]~P611(x158661)+P613(x158661)+~P63(x158662,x158661)
% 32.24/32.06 [15867]~P613(x158671)+P612(x158671)+~P63(x158672,x158671)
% 32.24/32.06 [15868]~P63(x158681,x158682)+P532(x158681)+~P536(x158682)
% 32.24/32.06 [15869]~P613(x158691)+P532(x158691)+~P63(x158692,x158691)
% 32.24/32.06 [15870]~P566(x158701)+P532(x158701)+~P63(x158702,x158701)
% 32.24/32.06 [15871]~P538(x158711)+P532(x158711)+~P63(x158712,x158711)
% 32.24/32.06 [15872]~P63(x158722,x158721)+P536(x158721)+~P532(x158722)
% 32.24/32.06 [15873]~P546(x158731,x158732)+P311(x158731)+~P129(x158732)
% 32.24/32.06 [15874]~P564(x158741,x158742)+P540(x158741)+~P129(x158742)
% 32.24/32.06 [15875]~P554(x158751,x158752)+P541(x158751)+~P129(x158752)
% 32.24/32.06 [15876]~P566(x158761)+P567(x158761)+~P63(x158762,x158761)
% 32.24/32.06 [15877]~P567(x158771)+P566(x158771)+~P63(x158772,x158771)
% 32.24/32.06 [15878]~P566(x158781)+P565(x158781)+~P63(x158782,x158781)
% 32.24/32.06 [15879]~P538(x158791)+P534(x158791)+~P63(x158792,x158791)
% 32.24/32.06 [15880]~P63(x158802,x158801)+P539(x158801)+~P533(x158802)
% 32.24/32.06 [15881]~P63(x158811,x158812)+P533(x158811)+~P539(x158812)
% 32.24/32.06 [15882]~P534(x158821)+P538(x158821)+~P63(x158822,x158821)
% 32.24/32.06 [15883]~P538(x158831)+P537(x158831)+~P63(x158832,x158831)
% 32.24/32.06 [15884]~P512(x158841)+P511(x158841)+~P63(x158842,x158841)
% 32.24/32.06 [15885]~P63(x158852,x158851)+P513(x158851)+~P500(x158852)
% 32.24/32.06 [15886]~P512(x158861)+P513(x158861)+~P63(x158862,x158861)
% 32.24/32.06 [15887]~P63(x158871,x158872)+P500(x158871)+~P513(x158872)
% 32.24/32.06 [15888]~P511(x158881)+P504(x158881)+~P63(x158882,x158881)
% 32.24/32.06 [15889]~P63(x158891,x158892)+P425(x158891)+~P444(x158892)
% 32.24/32.06 [15890]~P511(x158901)+P425(x158901)+~P63(x158902,x158901)
% 32.24/32.06 [15891]~P497(x158911)+P425(x158911)+~P63(x158912,x158911)
% 32.24/32.06 [15892]~P485(x158921)+P425(x158921)+~P63(x158922,x158921)
% 32.24/32.06 [15893]~P475(x158931)+P425(x158931)+~P63(x158932,x158931)
% 32.24/32.06 [15894]~P461(x158941)+P425(x158941)+~P63(x158942,x158941)
% 32.24/32.06 [15895]~P447(x158951)+P425(x158951)+~P63(x158952,x158951)
% 32.24/32.06 [15896]~P63(x158962,x158961)+P444(x158961)+~P425(x158962)
% 32.24/32.06 [15897]~P497(x158971)+P495(x158971)+~P63(x158972,x158971)
% 32.24/32.06 [15898]~P63(x158982,x158981)+P498(x158981)+~P494(x158982)
% 32.24/32.06 [15899]~P63(x158991,x158992)+P494(x158991)+~P498(x158992)
% 32.24/32.06 [15900]~P495(x159001)+P497(x159001)+~P63(x159002,x159001)
% 32.24/32.06 [15901]~P497(x159011)+P496(x159011)+~P63(x159012,x159011)
% 32.24/32.06 [15902]~P485(x159021)+P486(x159021)+~P63(x159022,x159021)
% 32.24/32.06 [15903]~P486(x159031)+P485(x159031)+~P63(x159032,x159031)
% 32.24/32.06 [15904]~P485(x159041)+P483(x159041)+~P63(x159042,x159041)
% 32.24/32.06 [15905]~P475(x159051)+P476(x159051)+~P63(x159052,x159051)
% 32.24/32.06 [15906]~P476(x159061)+P475(x159061)+~P63(x159062,x159061)
% 32.24/32.06 [15907]~P475(x159071)+P474(x159071)+~P63(x159072,x159071)
% 32.24/32.06 [15908]~P461(x159081)+P462(x159081)+~P63(x159082,x159081)
% 32.24/32.06 [15909]~P462(x159091)+P461(x159091)+~P63(x159092,x159091)
% 32.24/32.06 [15910]~P461(x159101)+P463(x159101)+~P63(x159102,x159101)
% 32.24/32.06 [15911]~P447(x159111)+P448(x159111)+~P63(x159112,x159111)
% 32.24/32.06 [15912]~P448(x159121)+P447(x159121)+~P63(x159122,x159121)
% 32.24/32.06 [15913]~P447(x159131)+P445(x159131)+~P63(x159132,x159131)
% 32.24/32.06 [15914]~P390(x159141)+P391(x159141)+~P63(x159142,x159141)
% 32.24/32.06 [15915]~P391(x159151)+P390(x159151)+~P63(x159152,x159151)
% 32.24/32.06 [15916]~P390(x159161)+P388(x159161)+~P63(x159162,x159161)
% 32.24/32.06 [15917]~P376(x159171)+P377(x159171)+~P63(x159172,x159171)
% 32.24/32.06 [15918]~P377(x159181)+P376(x159181)+~P63(x159182,x159181)
% 32.24/32.06 [15919]~P376(x159191)+P374(x159191)+~P63(x159192,x159191)
% 32.24/32.06 [15920]~P361(x159201)+P357(x159201)+~P63(x159202,x159201)
% 32.24/32.06 [15921]~P357(x159211)+P361(x159211)+~P63(x159212,x159211)
% 32.24/32.06 [15922]~P361(x159221)+P360(x159221)+~P63(x159222,x159221)
% 32.24/32.06 [15923]~P354(x159231)+P355(x159231)+~P63(x159232,x159231)
% 32.24/32.06 [15924]~P355(x159241)+P354(x159241)+~P63(x159242,x159241)
% 32.24/32.06 [15925]~P354(x159251)+P352(x159251)+~P63(x159252,x159251)
% 32.24/32.06 [15926]~P346(x159261)+P347(x159261)+~P63(x159262,x159261)
% 32.24/32.06 [15927]~P347(x159271)+P346(x159271)+~P63(x159272,x159271)
% 32.24/32.06 [15928]~P346(x159281)+P348(x159281)+~P63(x159282,x159281)
% 32.24/32.06 [15929]~P343(x159291)+P344(x159291)+~P63(x159292,x159291)
% 32.24/32.06 [15930]~P344(x159301)+P343(x159301)+~P63(x159302,x159301)
% 32.24/32.06 [15931]~P343(x159311)+P341(x159311)+~P63(x159312,x159311)
% 32.24/32.06 [15932]~P334(x159321)+P335(x159321)+~P63(x159322,x159321)
% 32.24/32.06 [15933]~P335(x159331)+P334(x159331)+~P63(x159332,x159331)
% 32.24/32.06 [15934]~P334(x159341)+P332(x159341)+~P63(x159342,x159341)
% 32.24/32.06 [15935]~P267(x159351)+P268(x159351)+~P63(x159352,x159351)
% 32.24/32.06 [15936]~P268(x159361)+P267(x159361)+~P63(x159362,x159361)
% 32.24/32.06 [15937]~P267(x159371)+P266(x159371)+~P63(x159372,x159371)
% 32.24/32.06 [15938]~P164(x159381)+P167(x159381)+~P63(x159382,x159381)
% 32.24/32.06 [15939]~P63(x159392,x159391)+P169(x159391)+~P159(x159392)
% 32.24/32.06 [15940]~P164(x159401)+P169(x159401)+~P63(x159402,x159401)
% 32.24/32.06 [15941]~P63(x159411,x159412)+P159(x159411)+~P169(x159412)
% 32.24/32.06 [15942]~P167(x159421)+P166(x159421)+~P63(x159422,x159421)
% 32.24/32.06 [15943]~P2602(x159431)+P2601(x159431)+~P63(x159432,x159431)
% 32.24/32.06 [15944]~P63(x159442,x159441)+P162(x159441)+~P161(x159442)
% 32.24/32.06 [15945]~P2602(x159451)+P162(x159451)+~P63(x159452,x159451)
% 32.24/32.06 [15946]~P63(x159461,x159462)+P161(x159461)+~P162(x159462)
% 32.24/32.06 [15947]~P2601(x159471)+P2600(x159471)+~P63(x159472,x159471)
% 32.24/32.06 [15948]~P2595(x159481)+P2596(x159481)+~P63(x159482,x159481)
% 32.24/32.06 [15949]~P2596(x159491)+P2595(x159491)+~P63(x159492,x159491)
% 32.24/32.06 [15950]~P2595(x159501)+P2594(x159501)+~P63(x159502,x159501)
% 32.24/32.06 [15951]~P2514(x159511)+P2513(x159511)+~P63(x159512,x159511)
% 32.24/32.06 [15952]~P63(x159522,x159521)+P2515(x159521)+~P2503(x159522)
% 32.24/32.06 [15953]~P2514(x159531)+P2515(x159531)+~P63(x159532,x159531)
% 32.24/32.06 [15954]~P63(x159541,x159542)+P2503(x159541)+~P2515(x159542)
% 32.24/32.06 [15955]~P2513(x159551)+P2512(x159551)+~P63(x159552,x159551)
% 32.24/32.06 [15956]~P2508(x159561)+P2507(x159561)+~P63(x159562,x159561)
% 32.24/32.06 [15957]~P63(x159572,x159571)+P2510(x159571)+~P2509(x159572)
% 32.24/32.06 [15958]~P2508(x159581)+P2510(x159581)+~P63(x159582,x159581)
% 32.24/32.06 [15959]~P63(x159591,x159592)+P2509(x159591)+~P2510(x159592)
% 32.24/32.06 [15960]~P2507(x159601)+P2506(x159601)+~P63(x159602,x159601)
% 32.24/32.06 [15961]~P2499(x159611)+P2500(x159611)+~P63(x159612,x159611)
% 32.24/32.06 [15962]~P2500(x159621)+P2499(x159621)+~P63(x159622,x159621)
% 32.24/32.06 [15963]~P2499(x159631)+P2498(x159631)+~P63(x159632,x159631)
% 32.24/32.06 [15964]~P2438(x159641)+P2436(x159641)+~P63(x159642,x159641)
% 32.24/32.06 [15965]~P63(x159652,x159651)+P2442(x159651)+~P2441(x159652)
% 32.24/32.06 [15966]~P63(x159661,x159662)+P2441(x159661)+~P2442(x159662)
% 32.24/32.06 [15967]~P2436(x159671)+P2438(x159671)+~P63(x159672,x159671)
% 32.24/32.06 [15968]~P2438(x159681)+P2437(x159681)+~P63(x159682,x159681)
% 32.24/32.06 [15969]~P63(x159691,x159692)+P2435(x159691)+~P2439(x159692)
% 32.24/32.06 [15970]~P2438(x159701)+P2435(x159701)+~P63(x159702,x159701)
% 32.24/32.06 [15971]~P63(x159712,x159711)+P2439(x159711)+~P2435(x159712)
% 32.24/32.06 [15972]~P2428(x159721)+P2426(x159721)+~P63(x159722,x159721)
% 32.24/32.06 [15973]~P63(x159732,x159731)+P2432(x159731)+~P2431(x159732)
% 32.24/32.06 [15974]~P63(x159741,x159742)+P2431(x159741)+~P2432(x159742)
% 32.24/32.06 [15975]~P2426(x159751)+P2428(x159751)+~P63(x159752,x159751)
% 32.24/32.06 [15976]~P2428(x159761)+P2427(x159761)+~P63(x159762,x159761)
% 32.24/32.06 [15977]~P63(x159771,x159772)+P2421(x159771)+~P2429(x159772)
% 32.24/32.06 [15978]~P2428(x159781)+P2421(x159781)+~P63(x159782,x159781)
% 32.24/32.06 [15979]~P63(x159792,x159791)+P2429(x159791)+~P2421(x159792)
% 32.24/32.06 [15980]~P2399(x159801)+P2397(x159801)+~P63(x159802,x159801)
% 32.24/32.06 [15981]~P63(x159812,x159811)+P2400(x159811)+~P2396(x159812)
% 32.24/32.06 [15982]~P63(x159821,x159822)+P2396(x159821)+~P2400(x159822)
% 32.24/32.06 [15983]~P2397(x159831)+P2399(x159831)+~P63(x159832,x159831)
% 32.24/32.06 [15984]~P2399(x159841)+P2398(x159841)+~P63(x159842,x159841)
% 32.24/32.06 [15985]~P63(x159851,x159852)+P2268(x159851)+~P2292(x159852)
% 32.24/32.06 [15986]~P2399(x159861)+P2268(x159861)+~P63(x159862,x159861)
% 32.24/32.06 [15987]~P2294(x159871)+P2268(x159871)+~P63(x159872,x159871)
% 32.24/32.06 [15988]~P63(x159882,x159881)+P2292(x159881)+~P2268(x159882)
% 32.24/32.06 [15989]~P2385(x159891)+P2384(x159891)+~P63(x159892,x159891)
% 32.24/32.06 [15990]~P2384(x159901)+P2385(x159901)+~P63(x159902,x159901)
% 32.24/32.06 [15991]~P2385(x159911)+P2383(x159911)+~P63(x159912,x159911)
% 32.24/32.06 [15992]~P63(x159921,x159922)+P2369(x159921)+~P2386(x159922)
% 32.24/32.06 [15993]~P2385(x159931)+P2369(x159931)+~P63(x159932,x159931)
% 32.24/32.06 [15994]~P63(x159942,x159941)+P2386(x159941)+~P2369(x159942)
% 32.24/32.06 [15995]~P2294(x159951)+P2291(x159951)+~P63(x159952,x159951)
% 32.24/32.06 [15996]~P63(x159962,x159961)+P2295(x159961)+~P2290(x159962)
% 32.24/32.06 [15997]~P63(x159971,x159972)+P2290(x159971)+~P2295(x159972)
% 32.24/32.06 [15998]~P2291(x159981)+P2294(x159981)+~P63(x159982,x159981)
% 32.24/32.06 [15999]~P2294(x159991)+P2293(x159991)+~P63(x159992,x159991)
% 32.24/32.06 [16000]~P2275(x160001)+P2274(x160001)+~P63(x160002,x160001)
% 32.24/32.06 [16001]~P2274(x160011)+P2275(x160011)+~P63(x160012,x160011)
% 32.24/32.06 [16002]~P2275(x160021)+P2273(x160021)+~P63(x160022,x160021)
% 32.24/32.06 [16003]~P63(x160031,x160032)+P2269(x160031)+~P2276(x160032)
% 32.24/32.06 [16004]~P2275(x160041)+P2269(x160041)+~P63(x160042,x160041)
% 32.24/32.06 [16005]~P63(x160052,x160051)+P2276(x160051)+~P2269(x160052)
% 32.24/32.06 [16006]~P1589(x160061)+P1574(x160061)+~P63(x160062,x160061)
% 32.24/32.06 [16007]~P1574(x160071)+P1589(x160071)+~P63(x160072,x160071)
% 32.24/32.06 [16008]~P1589(x160081)+P1592(x160081)+~P63(x160082,x160081)
% 32.24/32.06 [16009]~P867(x160091)+P852(x160091)+~P63(x160092,x160091)
% 32.24/32.06 [16010]~P63(x160102,x160101)+P911(x160101)+~P898(x160102)
% 32.24/32.06 [16011]~P63(x160111,x160112)+P898(x160111)+~P911(x160112)
% 32.24/32.06 [16012]~P852(x160121)+P867(x160121)+~P63(x160122,x160121)
% 32.24/32.06 [16013]~P867(x160131)+P872(x160131)+~P63(x160132,x160131)
% 32.24/32.06 [16032]P2532(x160321,x160322)+~P113(x160322)+P2517(x160321,x160322)
% 32.24/32.06 [16033]P2540(x160331,x160332)+~P113(x160332)+P2527(x160331,x160332)
% 32.24/32.06 [16034]P1055(x160341,x160342)+~P115(x160342)+P1104(x160341,x160342)
% 32.24/32.06 [16037]~P63(x160372,x160371)+~P157(x160371)+~P157(x160372)
% 32.24/32.06 [16038]~P2144(x160382,x160381)+~P113(x160381)+~P2074(x160382)
% 32.24/32.06 [16039]~P2131(x160392,x160391)+~P113(x160391)+~P2125(x160392)
% 32.24/32.06 [16040]~P1606(x160401)+~P2141(x160401)+~P63(x160402,x160401)
% 32.24/32.06 [16041]~P1592(x160411)+~P1606(x160411)+~P63(x160412,x160411)
% 32.24/32.06 [16042]~P336(x160422,x160421)+~P114(x160421)+~P327(x160422)
% 32.24/32.06 [16043]~P331(x160431)+~P2126(x160431)+~P63(x160432,x160431)
% 32.24/32.06 [16044]~P1988(x160441)+~P331(x160441)+~P63(x160442,x160441)
% 32.24/32.06 [16045]~P1914(x160451)+~P331(x160451)+~P63(x160452,x160451)
% 32.24/32.06 [16046]~P756(x160461)+~P331(x160461)+~P63(x160462,x160461)
% 32.24/32.06 [16047]~P708(x160471)+~P331(x160471)+~P63(x160472,x160471)
% 32.24/32.06 [16048]~P687(x160481)+~P331(x160481)+~P63(x160482,x160481)
% 32.24/32.06 [16049]~P388(x160491)+~P331(x160491)+~P63(x160492,x160491)
% 32.24/32.06 [16050]~P374(x160501)+~P331(x160501)+~P63(x160502,x160501)
% 32.24/32.06 [16051]~P360(x160511)+~P331(x160511)+~P63(x160512,x160511)
% 32.24/32.06 [16052]~P352(x160521)+~P331(x160521)+~P63(x160522,x160521)
% 32.24/32.06 [16053]~P348(x160531)+~P331(x160531)+~P63(x160532,x160531)
% 32.24/32.06 [16054]~P341(x160541)+~P331(x160541)+~P63(x160542,x160541)
% 32.24/32.06 [16055]~P332(x160551)+~P331(x160551)+~P63(x160552,x160551)
% 32.24/32.06 [16056]~P2088(x160562,x160561)+~P129(x160561)+~P2077(x160562)
% 32.24/32.06 [16057]~P2064(x160572,x160571)+~P129(x160571)+~P2063(x160572)
% 32.24/32.06 [16058]~P1521(x160582,x160581)+~P129(x160581)+~P1412(x160582)
% 32.24/32.06 [16059]~P1511(x160592,x160591)+~P129(x160591)+~P1496(x160592)
% 32.24/32.06 [16060]~P796(x160602,x160601)+~P129(x160601)+~P2472(x160602)
% 32.24/32.06 [16061]~P2501(x160612,x160611)+~P129(x160611)+~P2472(x160612)
% 32.24/32.06 [16062]~P775(x160622,x160621)+~P129(x160621)+~P774(x160622)
% 32.24/32.06 [16063]~P734(x160632,x160631)+~P129(x160631)+~P2569(x160632)
% 32.24/32.06 [16064]~P2597(x160642,x160641)+~P129(x160641)+~P2569(x160642)
% 32.24/32.06 [16065]~P714(x160652,x160651)+~P129(x160651)+~P713(x160652)
% 32.24/32.06 [16066]~P564(x160662,x160661)+~P129(x160661)+~P540(x160662)
% 32.24/32.06 [16067]~P554(x160672,x160671)+~P129(x160671)+~P541(x160672)
% 32.24/32.06 [16068]~P568(x160682,x160681)+~P129(x160681)+~P529(x160682)
% 32.24/32.06 [16069]~P313(x160692,x160691)+~P129(x160691)+~P545(x160692)
% 32.24/32.06 [16070]~P313(x160702,x160701)+~P129(x160701)+~P559(x160702)
% 32.24/32.06 [16071]~P519(x160712,x160711)+~P129(x160711)+~P478(x160712)
% 32.24/32.06 [16072]~P449(x160722,x160721)+~P129(x160721)+~P424(x160722)
% 32.24/32.06 [16073]~P2576(x160732,x160731)+~P129(x160731)+~P2575(x160732)
% 32.24/32.06 [16074]~P2480(x160742,x160741)+~P129(x160741)+~P2479(x160742)
% 32.24/32.06 [16075]~P1647(x160752,x160751)+~P129(x160751)+~P1408(x160752)
% 32.24/32.06 [16076]~P2086(x160761)+~P2098(x160761)+~P63(x160762,x160761)
% 32.24/32.06 [16077]~P2094(x160771)+~P2086(x160771)+~P63(x160772,x160771)
% 32.24/32.06 [16078]~P2087(x160781)+~P2086(x160781)+~P63(x160782,x160781)
% 32.24/32.06 [16079]~P2057(x160792,x160791)+~P115(x160791)+~P2038(x160792)
% 32.24/32.06 [16080]~P2004(x160802,x160801)+~P115(x160801)+~P2051(x160802)
% 32.24/32.06 [16081]~P2044(x160812,x160811)+~P115(x160811)+~P2041(x160812)
% 32.24/32.06 [16082]~P2046(x160822,x160821)+~P115(x160821)+~P2045(x160822)
% 32.24/32.06 [16083]~P1731(x160832,x160831)+~P115(x160831)+~P1728(x160832)
% 32.24/32.06 [16084]~P1711(x160842,x160841)+~P115(x160841)+~P1704(x160842)
% 32.24/32.06 [16085]~P1660(x160852,x160851)+~P115(x160851)+~P1654(x160852)
% 32.24/32.06 [16086]~P1649(x160862,x160861)+~P115(x160861)+~P1641(x160862)
% 32.24/32.06 [16087]~P1648(x160872,x160871)+~P115(x160871)+~P1008(x160872)
% 32.24/32.06 [16088]~P2056(x160881)+~P2053(x160881)+~P63(x160882,x160881)
% 32.24/32.06 [16089]~P1952(x160891)+~P1949(x160891)+~P63(x160892,x160891)
% 32.24/32.06 [16090]~P1897(x160902,x160901)+~P137(x160901)+~P1831(x160902)
% 32.24/32.06 [16091]~P1622(x160912,x160911)+~P137(x160911)+~P1607(x160912)
% 32.24/32.06 [16092]~P1623(x160922,x160921)+~P137(x160921)+~P1585(x160922)
% 32.24/32.06 [16093]~P1548(x160932,x160931)+~P137(x160931)+~P1534(x160932)
% 32.24/32.06 [16094]~P269(x160942,x160941)+~P137(x160941)+~P203(x160942)
% 32.24/32.06 [16095]~P2387(x160952,x160951)+~P137(x160951)+~P2382(x160952)
% 32.24/32.06 [16096]~P2277(x160962,x160961)+~P137(x160961)+~P2205(x160962)
% 32.24/32.06 [16097]~P2497(x160971)+~P1894(x160971)+~P63(x160972,x160971)
% 32.24/32.06 [16098]~P794(x160981)+~P2497(x160981)+~P63(x160982,x160981)
% 32.24/32.06 [16099]~P2512(x160991)+~P2497(x160991)+~P63(x160992,x160991)
% 32.24/32.06 [16100]~P2506(x161001)+~P2497(x161001)+~P63(x161002,x161001)
% 32.24/32.06 [16101]~P2498(x161011)+~P2497(x161011)+~P63(x161012,x161011)
% 32.24/32.06 [16102]~P1824(x161021,x161022)+~P1818(x161021)+~P130(x161022)
% 32.24/32.06 [16103]~P192(x161032,x161031)+~P130(x161031)+~P186(x161032)
% 32.24/32.06 [16104]~P2310(x161042,x161041)+~P130(x161041)+~P2305(x161042)
% 32.24/32.06 [16105]~P2196(x161052,x161051)+~P130(x161051)+~P2191(x161052)
% 32.24/32.06 [16106]~P1018(x161062,x161061)+~P130(x161061)+~P1025(x161062)
% 32.24/32.06 [16107]~P1774(x161071)+~P1772(x161071)+~P63(x161072,x161071)
% 32.24/32.06 [16108]~P876(x161082,x161081)+~P139(x161081)+~P864(x161082)
% 32.24/32.06 [16109]~P870(x161091)+~P1763(x161091)+~P63(x161092,x161091)
% 32.24/32.06 [16110]~P960(x161101)+~P870(x161101)+~P63(x161102,x161101)
% 32.24/32.06 [16111]~P934(x161111)+~P870(x161111)+~P63(x161112,x161111)
% 32.24/32.06 [16112]~P871(x161121)+~P870(x161121)+~P63(x161122,x161121)
% 32.24/32.06 [16113]~P801(x161131)+~P1729(x161131)+~P63(x161132,x161131)
% 32.24/32.06 [16114]~P1601(x161141)+~P801(x161141)+~P63(x161142,x161141)
% 32.24/32.06 [16115]~P1525(x161151)+~P801(x161151)+~P63(x161152,x161151)
% 32.24/32.06 [16116]~P802(x161161)+~P801(x161161)+~P63(x161162,x161161)
% 32.24/32.06 [16117]~P1520(x161171)+~P1516(x161171)+~P63(x161172,x161171)
% 32.24/32.06 [16118]~P879(x161181)+~P1458(x161181)+~P63(x161182,x161181)
% 32.24/32.06 [16119]~P872(x161191)+~P879(x161191)+~P63(x161192,x161191)
% 32.24/32.06 [16120]~P971(x161201)+~P969(x161201)+~P63(x161202,x161201)
% 32.24/32.06 [16121]~P2593(x161211)+~P731(x161211)+~P63(x161212,x161211)
% 32.24/32.06 [16122]~P266(x161221)+~P2593(x161221)+~P63(x161222,x161221)
% 32.24/32.06 [16123]~P166(x161231)+~P2593(x161231)+~P63(x161232,x161231)
% 32.24/32.06 [16124]~P2600(x161241)+~P2593(x161241)+~P63(x161242,x161241)
% 32.24/32.06 [16125]~P2594(x161251)+~P2593(x161251)+~P63(x161252,x161251)
% 32.24/32.06 [16126]~P536(x161261)+~P612(x161261)+~P63(x161262,x161261)
% 32.24/32.06 [16127]~P565(x161271)+~P536(x161271)+~P63(x161272,x161271)
% 32.24/32.06 [16128]~P537(x161281)+~P536(x161281)+~P63(x161282,x161281)
% 32.24/32.06 [16129]~P444(x161291)+~P504(x161291)+~P63(x161292,x161291)
% 32.24/32.06 [16130]~P496(x161301)+~P444(x161301)+~P63(x161302,x161301)
% 32.24/32.06 [16131]~P483(x161311)+~P444(x161311)+~P63(x161312,x161311)
% 32.24/32.06 [16132]~P474(x161321)+~P444(x161321)+~P63(x161322,x161321)
% 32.24/32.06 [16133]~P463(x161331)+~P444(x161331)+~P63(x161332,x161331)
% 32.24/32.06 [16134]~P445(x161341)+~P444(x161341)+~P63(x161342,x161341)
% 32.24/32.06 [16135]~P2439(x161351)+~P2437(x161351)+~P63(x161352,x161351)
% 32.24/32.06 [16136]~P2429(x161361)+~P2427(x161361)+~P63(x161362,x161361)
% 32.24/32.06 [16137]~P2292(x161371)+~P2398(x161371)+~P63(x161372,x161371)
% 32.24/32.06 [16138]~P2293(x161381)+~P2292(x161381)+~P63(x161382,x161381)
% 32.24/32.06 [16139]~P2386(x161391)+~P2383(x161391)+~P63(x161392,x161391)
% 32.24/32.06 [16140]~P2276(x161401)+~P2273(x161401)+~P63(x161402,x161401)
% 32.24/32.06 [16322]~P63(x163222,x163221)+P2128(x163221)+P81(x163222,x163221)
% 32.24/32.06 [16323]~P63(x163232,x163231)+P1917(x163231)+P87(x163232,x163231)
% 32.24/32.06 [16324]~P63(x163242,x163241)+P759(x163241)+P88(x163242,x163241)
% 32.24/32.06 [16325]~P63(x163252,x163251)+P711(x163251)+P89(x163252,x163251)
% 32.24/32.06 [16326]~P63(x163262,x163261)+P391(x163261)+P90(x163262,x163261)
% 32.24/32.06 [16327]~P63(x163272,x163271)+P377(x163271)+P91(x163272,x163271)
% 32.24/32.06 [16328]~P63(x163282,x163281)+P357(x163281)+P92(x163282,x163281)
% 32.24/32.06 [16329]~P63(x163292,x163291)+P355(x163291)+P93(x163292,x163291)
% 32.24/32.06 [16330]~P63(x163302,x163301)+P347(x163301)+P94(x163302,x163301)
% 32.24/32.06 [16331]~P63(x163312,x163311)+P344(x163311)+P95(x163312,x163311)
% 32.24/32.06 [16332]~P63(x163322,x163321)+P335(x163321)+P96(x163322,x163321)
% 32.24/32.06 [16335]~P113(x163352)+~P2478(x163351,x163352)+P2150(x163351,x163352)
% 32.24/32.06 [16336]~P113(x163362)+~P2150(x163361,x163362)+P2478(x163361,x163362)
% 32.24/32.06 [16337]~P136(x163372)+~P2020(x163371,x163372)+P2061(x163371,x163372)
% 32.24/32.06 [16338]~P136(x163382)+~P2061(x163381,x163382)+P2020(x163381,x163382)
% 32.24/32.06 [16339]~P113(x163392)+~P2531(x163391,x163392)+P2537(x163391,x163392)
% 32.24/32.06 [16340]~P113(x163402)+~P2541(x163401,x163402)+P2537(x163401,x163402)
% 32.24/32.06 [16341]~P113(x163412)+~P2541(x163411,x163412)+P2526(x163411,x163412)
% 32.24/32.06 [16342]~P113(x163422)+~P2538(x163421,x163422)+P2567(x163421,x163422)
% 32.24/32.06 [16343]~P113(x163432)+~P2529(x163431,x163432)+P2584(x163431,x163432)
% 32.24/32.06 [16344]~P113(x163442)+~P2567(x163441,x163442)+P2584(x163441,x163442)
% 32.24/32.06 [16345]~P113(x163452)+~P2567(x163451,x163452)+P1905(x163451,x163452)
% 32.24/32.06 [16346]~P137(x163462)+~P1815(x163461,x163462)+P1740(x163461,x163462)
% 32.24/32.06 [16347]~P138(x163472)+~P1827(x163471,x163472)+P1828(x163471,x163472)
% 32.24/32.06 [16348]~P138(x163482)+~P1828(x163481,x163482)+P1827(x163481,x163482)
% 32.24/32.06 [16349]~P137(x163492)+~P1740(x163491,x163492)+P1815(x163491,x163492)
% 32.24/32.06 [16350]~P144(x163502)+~P573(x163501,x163502)+P562(x163501,x163502)
% 32.24/32.06 [16351]~P131(x163512)+~P487(x163511,x163512)+P472(x163511,x163512)
% 32.24/32.06 [16352]~P131(x163522)+~P472(x163521,x163522)+P487(x163521,x163522)
% 32.24/32.06 [16353]~P116(x163532)+~P505(x163531,x163532)+P499(x163531,x163532)
% 32.24/32.06 [16354]~P145(x163542)+~P505(x163541,x163542)+P499(x163541,x163542)
% 32.24/32.06 [16355]~P140(x163552)+~P505(x163551,x163552)+P499(x163551,x163552)
% 32.24/32.06 [16356]~P116(x163562)+~P499(x163561,x163562)+P505(x163561,x163562)
% 32.24/32.06 [16357]~P116(x163572)+~P543(x163571,x163572)+P505(x163571,x163572)
% 32.24/32.06 [16358]~P145(x163582)+~P499(x163581,x163582)+P505(x163581,x163582)
% 32.24/32.06 [16359]~P145(x163592)+~P543(x163591,x163592)+P505(x163591,x163592)
% 32.24/32.06 [16360]~P140(x163602)+~P499(x163601,x163602)+P505(x163601,x163602)
% 32.24/32.06 [16361]~P140(x163612)+~P543(x163611,x163612)+P505(x163611,x163612)
% 32.24/32.06 [16362]~P116(x163622)+~P505(x163621,x163622)+P543(x163621,x163622)
% 32.24/32.06 [16363]~P145(x163632)+~P505(x163631,x163632)+P543(x163631,x163632)
% 32.24/32.06 [16364]~P140(x163642)+~P505(x163641,x163642)+P543(x163641,x163642)
% 32.24/32.06 [16365]~P119(x163652)+~P1364(x163651,x163652)+P1362(x163651,x163652)
% 32.24/32.06 [16366]~P119(x163662)+~P1436(x163661,x163662)+P1362(x163661,x163662)
% 32.24/32.06 [16367]~P119(x163672)+~P1436(x163671,x163672)+P1435(x163671,x163672)
% 32.24/32.06 [16368]~P119(x163682)+~P1436(x163681,x163682)+P1437(x163681,x163682)
% 32.24/32.06 [16369]~P119(x163692)+~P1364(x163691,x163692)+P1363(x163691,x163692)
% 32.24/32.06 [16370]~P119(x163702)+~P1365(x163701,x163702)+P1363(x163701,x163702)
% 32.24/32.06 [16371]~P119(x163712)+~P1433(x163711,x163712)+P1363(x163711,x163712)
% 32.24/32.06 [16372]~P119(x163722)+~P1364(x163721,x163722)+P1431(x163721,x163722)
% 32.24/32.06 [16373]~P119(x163732)+~P1433(x163731,x163732)+P1432(x163731,x163732)
% 32.24/32.06 [16374]~P119(x163742)+~P1433(x163741,x163742)+P1434(x163741,x163742)
% 32.24/32.06 [16375]~P119(x163752)+~P1365(x163751,x163752)+P1370(x163751,x163752)
% 32.24/32.06 [16376]~P119(x163762)+~P1372(x163761,x163762)+P1370(x163761,x163762)
% 32.24/32.06 [16377]~P119(x163772)+~P1425(x163771,x163772)+P1370(x163771,x163772)
% 32.24/32.06 [16378]~P119(x163782)+~P1365(x163781,x163782)+P1430(x163781,x163782)
% 32.24/32.06 [16379]~P119(x163792)+~P1425(x163791,x163792)+P1424(x163791,x163792)
% 32.24/32.06 [16380]~P119(x163802)+~P1425(x163801,x163802)+P1426(x163801,x163802)
% 32.24/32.06 [16381]~P119(x163812)+~P1372(x163811,x163812)+P1371(x163811,x163812)
% 32.24/32.06 [16382]~P119(x163822)+~P1373(x163821,x163822)+P1371(x163821,x163822)
% 32.24/32.06 [16383]~P119(x163832)+~P1407(x163831,x163832)+P1371(x163831,x163832)
% 32.24/32.06 [16384]~P119(x163842)+~P1372(x163841,x163842)+P1422(x163841,x163842)
% 32.24/32.06 [16385]~P119(x163852)+~P1407(x163851,x163852)+P1105(x163851,x163852)
% 32.24/32.06 [16386]~P119(x163862)+~P1407(x163861,x163862)+P1423(x163861,x163862)
% 32.24/32.06 [16387]~P119(x163872)+~P1373(x163871,x163872)+P1369(x163871,x163872)
% 32.24/32.06 [16388]~P119(x163882)+~P1373(x163881,x163882)+P1368(x163881,x163882)
% 32.24/32.06 [16389]~P129(x163892)+~P1361(x163891,x163892)+P1355(x163891,x163892)
% 32.24/32.06 [16390]~P129(x163902)+~P1355(x163901,x163902)+P1361(x163901,x163902)
% 32.24/32.06 [16391]~P132(x163912)+~P1149(x163911,x163912)+P1148(x163911,x163912)
% 32.24/32.06 [16392]~P132(x163922)+~P1253(x163921,x163922)+P1148(x163921,x163922)
% 32.24/32.06 [16393]~P132(x163932)+~P1253(x163931,x163932)+P1106(x163931,x163932)
% 32.24/32.06 [16394]~P126(x163942)+~P1259(x163941,x163942)+P1106(x163941,x163942)
% 32.24/32.06 [16395]~P132(x163952)+~P1253(x163951,x163952)+P1356(x163951,x163952)
% 32.24/32.06 [16396]~P126(x163962)+~P1106(x163961,x163962)+P1259(x163961,x163962)
% 32.24/32.06 [16397]~P126(x163972)+~P1262(x163971,x163972)+P1259(x163971,x163972)
% 32.24/32.06 [16398]~P126(x163982)+~P1305(x163981,x163982)+P1259(x163981,x163982)
% 32.24/32.06 [16399]~P126(x163992)+~P1305(x163991,x163992)+P1254(x163991,x163992)
% 32.24/32.06 [16400]~P120(x164002)+~P1311(x164001,x164002)+P1254(x164001,x164002)
% 32.24/32.06 [16401]~P126(x164012)+~P1305(x164011,x164012)+P1360(x164011,x164012)
% 32.24/32.06 [16402]~P120(x164022)+~P1254(x164021,x164022)+P1311(x164021,x164022)
% 32.24/32.06 [16403]~P120(x164032)+~P1312(x164031,x164032)+P1311(x164031,x164032)
% 32.24/32.06 [16404]~P120(x164042)+~P1330(x164041,x164042)+P1311(x164041,x164042)
% 32.24/32.06 [16405]~P120(x164052)+~P1330(x164051,x164052)+P1306(x164051,x164052)
% 32.24/32.06 [16406]~P117(x164062)+~P1335(x164061,x164062)+P1306(x164061,x164062)
% 32.24/32.06 [16407]~P120(x164072)+~P1330(x164071,x164072)+P1359(x164071,x164072)
% 32.24/32.06 [16408]~P117(x164082)+~P1306(x164081,x164082)+P1335(x164081,x164082)
% 32.24/32.06 [16409]~P117(x164092)+~P1337(x164091,x164092)+P1335(x164091,x164092)
% 32.24/32.06 [16410]~P117(x164102)+~P1342(x164101,x164102)+P1335(x164101,x164102)
% 32.24/32.06 [16411]~P117(x164112)+~P1342(x164111,x164112)+P1331(x164111,x164112)
% 32.24/32.06 [16412]~P146(x164122)+~P1347(x164121,x164122)+P1331(x164121,x164122)
% 32.24/32.06 [16413]~P117(x164132)+~P1342(x164131,x164132)+P1358(x164131,x164132)
% 32.24/32.06 [16414]~P146(x164142)+~P1331(x164141,x164142)+P1347(x164141,x164142)
% 32.24/32.06 [16415]~P146(x164152)+~P1346(x164151,x164152)+P1347(x164151,x164152)
% 32.24/32.06 [16416]~P146(x164162)+~P1348(x164161,x164162)+P1347(x164161,x164162)
% 32.24/32.06 [16417]~P146(x164172)+~P1348(x164171,x164172)+P1343(x164171,x164172)
% 32.24/32.06 [16418]~P146(x164182)+~P1348(x164181,x164182)+P1357(x164181,x164182)
% 32.24/32.06 [16419]~P130(x164192)+~P1147(x164191,x164192)+P1156(x164191,x164192)
% 32.24/32.06 [16420]~P132(x164202)+~P1157(x164201,x164202)+P1156(x164201,x164202)
% 32.24/32.06 [16421]~P117(x164212)+~P1337(x164211,x164212)+P1338(x164211,x164212)
% 32.24/32.06 [16422]~P117(x164222)+~P1336(x164221,x164222)+P1338(x164221,x164222)
% 32.24/32.06 [16423]~P117(x164232)+~P1339(x164231,x164232)+P1338(x164231,x164232)
% 32.24/32.06 [16424]~P117(x164242)+~P1337(x164241,x164242)+P1340(x164241,x164242)
% 32.24/32.06 [16425]~P117(x164252)+~P1339(x164251,x164252)+P1332(x164251,x164252)
% 32.24/32.06 [16426]~P117(x164262)+~P1339(x164261,x164262)+P1341(x164261,x164262)
% 32.24/32.06 [16427]~P120(x164272)+~P1312(x164271,x164272)+P1313(x164271,x164272)
% 32.24/32.06 [16428]~P120(x164282)+~P1314(x164281,x164282)+P1313(x164281,x164282)
% 32.24/32.06 [16429]~P120(x164292)+~P1320(x164291,x164292)+P1313(x164291,x164292)
% 32.24/32.06 [16430]~P120(x164302)+~P1312(x164301,x164302)+P1327(x164301,x164302)
% 32.24/32.06 [16431]~P120(x164312)+~P1320(x164311,x164312)+P1307(x164311,x164312)
% 32.24/32.06 [16432]~P118(x164322)+~P1325(x164321,x164322)+P1307(x164321,x164322)
% 32.24/32.06 [16433]~P120(x164332)+~P1320(x164331,x164332)+P1329(x164331,x164332)
% 32.24/32.06 [16434]~P118(x164342)+~P1307(x164341,x164342)+P1325(x164341,x164342)
% 32.24/32.06 [16435]~P118(x164352)+~P1323(x164351,x164352)+P1325(x164351,x164352)
% 32.24/32.06 [16436]~P118(x164362)+~P1326(x164361,x164362)+P1325(x164361,x164362)
% 32.24/32.06 [16437]~P118(x164372)+~P1326(x164371,x164372)+P1321(x164371,x164372)
% 32.24/32.06 [16438]~P118(x164382)+~P1326(x164381,x164382)+P1328(x164381,x164382)
% 32.24/32.06 [16439]~P120(x164392)+~P1314(x164391,x164392)+P1316(x164391,x164392)
% 32.24/32.06 [16440]~P120(x164402)+~P1315(x164401,x164402)+P1316(x164401,x164402)
% 32.24/32.06 [16441]~P120(x164412)+~P1317(x164411,x164412)+P1316(x164411,x164412)
% 32.24/32.06 [16442]~P120(x164422)+~P1314(x164421,x164422)+P1318(x164421,x164422)
% 32.24/32.06 [16443]~P120(x164432)+~P1317(x164431,x164432)+P1308(x164431,x164432)
% 32.24/32.06 [16444]~P120(x164442)+~P1317(x164441,x164442)+P1319(x164441,x164442)
% 32.24/32.06 [16445]~P126(x164452)+~P1262(x164451,x164452)+P1263(x164451,x164452)
% 32.24/32.06 [16446]~P126(x164462)+~P1264(x164461,x164462)+P1263(x164461,x164462)
% 32.24/32.06 [16447]~P126(x164472)+~P1282(x164471,x164472)+P1263(x164471,x164472)
% 32.24/32.06 [16448]~P126(x164482)+~P1262(x164481,x164482)+P1300(x164481,x164482)
% 32.24/32.06 [16449]~P126(x164492)+~P1282(x164491,x164492)+P1255(x164491,x164492)
% 32.24/32.06 [16450]~P121(x164502)+~P1288(x164501,x164502)+P1255(x164501,x164502)
% 32.24/32.06 [16451]~P126(x164512)+~P1282(x164511,x164512)+P1304(x164511,x164512)
% 32.24/32.06 [16452]~P121(x164522)+~P1255(x164521,x164522)+P1288(x164521,x164522)
% 32.24/32.06 [16453]~P121(x164532)+~P1289(x164531,x164532)+P1288(x164531,x164532)
% 32.24/32.06 [16454]~P121(x164542)+~P1294(x164541,x164542)+P1288(x164541,x164542)
% 32.24/32.06 [16455]~P121(x164552)+~P1294(x164551,x164552)+P1283(x164551,x164552)
% 32.24/32.06 [16456]~P122(x164562)+~P1298(x164561,x164562)+P1283(x164561,x164562)
% 32.24/32.06 [16457]~P121(x164572)+~P1294(x164571,x164572)+P1303(x164571,x164572)
% 32.24/32.06 [16458]~P122(x164582)+~P1283(x164581,x164582)+P1298(x164581,x164582)
% 32.24/32.06 [16459]~P122(x164592)+~P1297(x164591,x164592)+P1298(x164591,x164592)
% 32.24/32.06 [16460]~P122(x164602)+~P1299(x164601,x164602)+P1298(x164601,x164602)
% 32.24/32.06 [16461]~P122(x164612)+~P1299(x164611,x164612)+P1295(x164611,x164612)
% 32.24/32.06 [16462]~P122(x164622)+~P1299(x164621,x164622)+P1302(x164621,x164622)
% 32.24/32.06 [16463]~P121(x164632)+~P1289(x164631,x164632)+P1290(x164631,x164632)
% 32.24/32.06 [16464]~P121(x164642)+~P1287(x164641,x164642)+P1290(x164641,x164642)
% 32.24/32.06 [16465]~P121(x164652)+~P1291(x164651,x164652)+P1290(x164651,x164652)
% 32.24/32.06 [16466]~P121(x164662)+~P1289(x164661,x164662)+P1292(x164661,x164662)
% 32.24/32.06 [16467]~P121(x164672)+~P1291(x164671,x164672)+P1284(x164671,x164672)
% 32.24/32.06 [16468]~P121(x164682)+~P1291(x164681,x164682)+P1293(x164681,x164682)
% 32.24/32.06 [16469]~P126(x164692)+~P1264(x164691,x164692)+P1265(x164691,x164692)
% 32.24/32.06 [16470]~P126(x164702)+~P1266(x164701,x164702)+P1265(x164701,x164702)
% 32.24/32.06 [16471]~P126(x164712)+~P1272(x164711,x164712)+P1265(x164711,x164712)
% 32.24/32.06 [16472]~P126(x164722)+~P1264(x164721,x164722)+P1280(x164721,x164722)
% 32.24/32.06 [16473]~P126(x164732)+~P1272(x164731,x164732)+P1256(x164731,x164732)
% 32.24/32.06 [16474]~P123(x164742)+~P1276(x164741,x164742)+P1256(x164741,x164742)
% 32.24/32.06 [16475]~P126(x164752)+~P1272(x164751,x164752)+P1281(x164751,x164752)
% 32.24/32.06 [16476]~P123(x164762)+~P1256(x164761,x164762)+P1276(x164761,x164762)
% 32.24/32.06 [16477]~P123(x164772)+~P1275(x164771,x164772)+P1276(x164771,x164772)
% 32.24/32.06 [16478]~P123(x164782)+~P1277(x164781,x164782)+P1276(x164781,x164782)
% 32.24/32.06 [16479]~P123(x164792)+~P1277(x164791,x164792)+P1273(x164791,x164792)
% 32.24/32.06 [16480]~P123(x164802)+~P1277(x164801,x164802)+P1279(x164801,x164802)
% 32.24/32.06 [16481]~P126(x164812)+~P1266(x164811,x164812)+P1267(x164811,x164812)
% 32.24/32.06 [16482]~P126(x164822)+~P1261(x164821,x164822)+P1267(x164821,x164822)
% 32.24/32.06 [16483]~P126(x164832)+~P1268(x164831,x164832)+P1267(x164831,x164832)
% 32.24/32.06 [16484]~P126(x164842)+~P1266(x164841,x164842)+P1270(x164841,x164842)
% 32.24/32.06 [16485]~P126(x164852)+~P1268(x164851,x164852)+P1257(x164851,x164852)
% 32.24/32.06 [16486]~P126(x164862)+~P1268(x164861,x164862)+P1271(x164861,x164862)
% 32.24/32.06 [16487]~P132(x164872)+~P1149(x164871,x164872)+P1150(x164871,x164872)
% 32.24/32.06 [16488]~P132(x164882)+~P1151(x164881,x164882)+P1150(x164881,x164882)
% 32.24/32.06 [16489]~P132(x164892)+~P1202(x164891,x164892)+P1150(x164891,x164892)
% 32.24/32.06 [16490]~P132(x164902)+~P1149(x164901,x164902)+P1248(x164901,x164902)
% 32.24/32.06 [16491]~P130(x164912)+~P1209(x164911,x164912)+P1107(x164911,x164912)
% 32.24/32.06 [16492]~P132(x164922)+~P1202(x164921,x164922)+P1107(x164921,x164922)
% 32.24/32.06 [16493]~P132(x164932)+~P1202(x164931,x164932)+P1252(x164931,x164932)
% 32.24/32.06 [16494]~P130(x164942)+~P1107(x164941,x164942)+P1209(x164941,x164942)
% 32.24/32.06 [16495]~P130(x164952)+~P1210(x164951,x164952)+P1209(x164951,x164952)
% 32.24/32.06 [16496]~P130(x164962)+~P1228(x164961,x164962)+P1209(x164961,x164962)
% 32.24/32.06 [16497]~P130(x164972)+~P1228(x164971,x164972)+P1203(x164971,x164972)
% 32.24/32.06 [16498]~P124(x164982)+~P1234(x164981,x164982)+P1203(x164981,x164982)
% 32.24/32.06 [16499]~P130(x164992)+~P1228(x164991,x164992)+P1251(x164991,x164992)
% 32.24/32.06 [16500]~P124(x165002)+~P1203(x165001,x165002)+P1234(x165001,x165002)
% 32.24/32.06 [16501]~P124(x165012)+~P1235(x165011,x165012)+P1234(x165011,x165012)
% 32.24/32.06 [16502]~P124(x165022)+~P1240(x165021,x165022)+P1234(x165021,x165022)
% 32.24/32.06 [16503]~P124(x165032)+~P1240(x165031,x165032)+P1229(x165031,x165032)
% 32.24/32.06 [16504]~P125(x165042)+~P1244(x165041,x165042)+P1229(x165041,x165042)
% 32.24/32.06 [16505]~P124(x165052)+~P1240(x165051,x165052)+P1250(x165051,x165052)
% 32.24/32.06 [16506]~P125(x165062)+~P1229(x165061,x165062)+P1244(x165061,x165062)
% 32.24/32.06 [16507]~P125(x165072)+~P1243(x165071,x165072)+P1244(x165071,x165072)
% 32.24/32.06 [16508]~P125(x165082)+~P1245(x165081,x165082)+P1244(x165081,x165082)
% 32.24/32.06 [16509]~P125(x165092)+~P1245(x165091,x165092)+P1241(x165091,x165092)
% 32.24/32.06 [16510]~P125(x165102)+~P1245(x165101,x165102)+P1249(x165101,x165102)
% 32.24/32.06 [16511]~P124(x165112)+~P1235(x165111,x165112)+P1236(x165111,x165112)
% 32.24/32.06 [16512]~P124(x165122)+~P1233(x165121,x165122)+P1236(x165121,x165122)
% 32.24/32.06 [16513]~P124(x165132)+~P1237(x165131,x165132)+P1236(x165131,x165132)
% 32.24/32.06 [16514]~P124(x165142)+~P1235(x165141,x165142)+P1238(x165141,x165142)
% 32.24/32.06 [16515]~P124(x165152)+~P1237(x165151,x165152)+P1230(x165151,x165152)
% 32.24/32.06 [16516]~P124(x165162)+~P1237(x165161,x165162)+P1239(x165161,x165162)
% 32.24/32.06 [16517]~P130(x165172)+~P1210(x165171,x165172)+P1211(x165171,x165172)
% 32.24/32.06 [16518]~P130(x165182)+~P1212(x165181,x165182)+P1211(x165181,x165182)
% 32.24/32.06 [16519]~P130(x165192)+~P1218(x165191,x165192)+P1211(x165191,x165192)
% 32.24/32.06 [16520]~P130(x165202)+~P1210(x165201,x165202)+P1226(x165201,x165202)
% 32.24/32.06 [16521]~P130(x165212)+~P1218(x165211,x165212)+P1204(x165211,x165212)
% 32.24/32.06 [16522]~P128(x165222)+~P1222(x165221,x165222)+P1204(x165221,x165222)
% 32.24/32.06 [16523]~P130(x165232)+~P1218(x165231,x165232)+P1227(x165231,x165232)
% 32.24/32.06 [16524]~P128(x165242)+~P1204(x165241,x165242)+P1222(x165241,x165242)
% 32.24/32.06 [16525]~P128(x165252)+~P1221(x165251,x165252)+P1222(x165251,x165252)
% 32.24/32.06 [16526]~P128(x165262)+~P1223(x165261,x165262)+P1222(x165261,x165262)
% 32.24/32.06 [16527]~P128(x165272)+~P1223(x165271,x165272)+P1219(x165271,x165272)
% 32.24/32.06 [16528]~P128(x165282)+~P1223(x165281,x165282)+P1225(x165281,x165282)
% 32.24/32.06 [16529]~P130(x165292)+~P1212(x165291,x165292)+P1213(x165291,x165292)
% 32.24/32.06 [16530]~P130(x165302)+~P1208(x165301,x165302)+P1213(x165301,x165302)
% 32.24/32.06 [16531]~P130(x165312)+~P1214(x165311,x165312)+P1213(x165311,x165312)
% 32.24/32.06 [16532]~P130(x165322)+~P1212(x165321,x165322)+P1216(x165321,x165322)
% 32.24/32.06 [16533]~P130(x165332)+~P1214(x165331,x165332)+P1205(x165331,x165332)
% 32.24/32.06 [16534]~P130(x165342)+~P1214(x165341,x165342)+P1217(x165341,x165342)
% 32.24/32.06 [16535]~P132(x165352)+~P1151(x165351,x165352)+P1152(x165351,x165352)
% 32.24/32.06 [16536]~P132(x165362)+~P1158(x165361,x165362)+P1152(x165361,x165362)
% 32.24/32.06 [16537]~P132(x165372)+~P1177(x165371,x165372)+P1152(x165371,x165372)
% 32.24/32.06 [16538]~P132(x165382)+~P1151(x165381,x165382)+P1198(x165381,x165382)
% 32.24/32.06 [16539]~P132(x165392)+~P1177(x165391,x165392)+P1108(x165391,x165392)
% 32.24/32.06 [16540]~P133(x165402)+~P1181(x165401,x165402)+P1108(x165401,x165402)
% 32.24/32.06 [16541]~P132(x165412)+~P1177(x165411,x165412)+P1201(x165411,x165412)
% 32.24/32.06 [16542]~P133(x165422)+~P1108(x165421,x165422)+P1181(x165421,x165422)
% 32.24/32.06 [16543]~P133(x165432)+~P1182(x165431,x165432)+P1181(x165431,x165432)
% 32.24/32.06 [16544]~P133(x165442)+~P1189(x165441,x165442)+P1181(x165441,x165442)
% 32.24/32.06 [16545]~P133(x165452)+~P1189(x165451,x165452)+P1178(x165451,x165452)
% 32.24/32.06 [16546]~P134(x165462)+~P1194(x165461,x165462)+P1178(x165461,x165462)
% 32.24/32.06 [16547]~P133(x165472)+~P1189(x165471,x165472)+P1200(x165471,x165472)
% 32.24/32.06 [16548]~P134(x165482)+~P1178(x165481,x165482)+P1194(x165481,x165482)
% 32.24/32.06 [16549]~P134(x165492)+~P1193(x165491,x165492)+P1194(x165491,x165492)
% 32.24/32.06 [16550]~P134(x165502)+~P1196(x165501,x165502)+P1194(x165501,x165502)
% 32.24/32.06 [16551]~P134(x165512)+~P1196(x165511,x165512)+P1190(x165511,x165512)
% 32.24/32.06 [16552]~P134(x165522)+~P1196(x165521,x165522)+P1199(x165521,x165522)
% 32.24/32.06 [16553]~P133(x165532)+~P1182(x165531,x165532)+P1183(x165531,x165532)
% 32.24/32.06 [16554]~P133(x165542)+~P1185(x165541,x165542)+P1183(x165541,x165542)
% 32.24/32.06 [16555]~P133(x165552)+~P1186(x165551,x165552)+P1183(x165551,x165552)
% 32.24/32.06 [16556]~P133(x165562)+~P1182(x165561,x165562)+P1187(x165561,x165562)
% 32.24/32.06 [16557]~P133(x165572)+~P1186(x165571,x165572)+P1179(x165571,x165572)
% 32.24/32.06 [16558]~P133(x165582)+~P1186(x165581,x165582)+P1188(x165581,x165582)
% 32.24/32.06 [16559]~P132(x165592)+~P1158(x165591,x165592)+P1159(x165591,x165592)
% 32.24/32.06 [16560]~P132(x165602)+~P1160(x165601,x165602)+P1159(x165601,x165602)
% 32.24/32.06 [16561]~P132(x165612)+~P1166(x165611,x165612)+P1159(x165611,x165612)
% 32.24/32.06 [16562]~P132(x165622)+~P1158(x165621,x165622)+P1174(x165621,x165622)
% 32.24/32.06 [16563]~P132(x165632)+~P1166(x165631,x165632)+P1109(x165631,x165632)
% 32.24/32.06 [16564]~P135(x165642)+~P1171(x165641,x165642)+P1109(x165641,x165642)
% 32.24/32.06 [16565]~P132(x165652)+~P1166(x165651,x165652)+P1176(x165651,x165652)
% 32.24/32.06 [16566]~P135(x165662)+~P1109(x165661,x165662)+P1171(x165661,x165662)
% 32.24/32.06 [16567]~P135(x165672)+~P1170(x165671,x165672)+P1171(x165671,x165672)
% 32.24/32.06 [16568]~P135(x165682)+~P1172(x165681,x165682)+P1171(x165681,x165682)
% 32.24/32.06 [16569]~P135(x165692)+~P1172(x165691,x165692)+P1167(x165691,x165692)
% 32.24/32.06 [16570]~P135(x165702)+~P1172(x165701,x165702)+P1175(x165701,x165702)
% 32.24/32.06 [16571]~P132(x165712)+~P1160(x165711,x165712)+P1161(x165711,x165712)
% 32.24/32.06 [16572]~P132(x165722)+~P1157(x165721,x165722)+P1161(x165721,x165722)
% 32.24/32.06 [16573]~P132(x165732)+~P1162(x165731,x165732)+P1161(x165731,x165732)
% 32.24/32.06 [16574]~P132(x165742)+~P1160(x165741,x165742)+P1164(x165741,x165742)
% 32.24/32.06 [16575]~P132(x165752)+~P1162(x165751,x165752)+P1110(x165751,x165752)
% 32.24/32.06 [16576]~P132(x165762)+~P1162(x165761,x165762)+P1165(x165761,x165762)
% 32.24/32.06 [16577]~P132(x165772)+~P1157(x165771,x165772)+P1155(x165771,x165772)
% 32.24/32.06 [16578]~P130(x165782)+~P1156(x165781,x165782)+P1147(x165781,x165782)
% 32.24/32.06 [16579]~P115(x165792)+~P1103(x165791,x165792)+P1046(x165791,x165792)
% 32.24/32.06 [16580]~P115(x165802)+~P1103(x165801,x165802)+P1104(x165801,x165802)
% 32.24/32.06 [16581]~P127(x165812)+~P914(x165811,x165812)+P913(x165811,x165812)
% 32.24/32.06 [16582]~P127(x165822)+~P913(x165821,x165822)+P914(x165821,x165822)
% 32.24/32.06 [16583]~P127(x165832)+~P915(x165831,x165832)+P914(x165831,x165832)
% 32.24/32.06 [16584]~P127(x165842)+~P914(x165841,x165842)+P915(x165841,x165842)
% 32.24/32.06 [16585]~P127(x165852)+~P916(x165851,x165852)+P915(x165851,x165852)
% 32.24/32.06 [16586]~P127(x165862)+~P915(x165861,x165862)+P916(x165861,x165862)
% 32.24/32.06 [16587]~P127(x165872)+~P917(x165871,x165872)+P916(x165871,x165872)
% 32.24/32.06 [16588]~P127(x165882)+~P916(x165881,x165882)+P917(x165881,x165882)
% 32.24/32.06 [16589]~P127(x165892)+~P921(x165891,x165892)+P917(x165891,x165892)
% 32.24/32.06 [16590]~P127(x165902)+~P917(x165901,x165902)+P921(x165901,x165902)
% 32.24/32.06 [16591]~P127(x165912)+~P922(x165911,x165912)+P921(x165911,x165912)
% 32.24/32.06 [16592]~P127(x165922)+~P921(x165921,x165922)+P922(x165921,x165922)
% 32.24/32.06 [16593]~P127(x165932)+~P923(x165931,x165932)+P922(x165931,x165932)
% 32.24/32.06 [16594]~P127(x165942)+~P922(x165941,x165942)+P923(x165941,x165942)
% 32.24/32.06 [16595]~P127(x165952)+~P924(x165951,x165952)+P923(x165951,x165952)
% 32.24/32.06 [16596]~P127(x165962)+~P923(x165961,x165962)+P924(x165961,x165962)
% 32.24/32.06 [16597]~P127(x165972)+~P925(x165971,x165972)+P924(x165971,x165972)
% 32.24/32.06 [16598]~P127(x165982)+~P924(x165981,x165982)+P925(x165981,x165982)
% 32.24/32.06 [16599]~P127(x165992)+~P926(x165991,x165992)+P925(x165991,x165992)
% 32.24/32.06 [16600]~P127(x166002)+~P925(x166001,x166002)+P926(x166001,x166002)
% 32.24/32.06 [16601]~P127(x166012)+~P920(x166011,x166012)+P926(x166011,x166012)
% 32.24/32.06 [16602]~P127(x166022)+~P926(x166021,x166022)+P920(x166021,x166022)
% 32.24/32.06 [16603]~P142(x166032)+~P2447(x166031,x166032)+P2446(x166031,x166032)
% 32.24/32.06 [16604]~P142(x166042)+~P2446(x166041,x166042)+P2447(x166041,x166042)
% 32.24/32.06 [16605]~P142(x166052)+~P2516(x166051,x166052)+P2447(x166051,x166052)
% 32.24/32.06 [16606]~P142(x166062)+~P2447(x166061,x166062)+P2516(x166061,x166062)
% 32.24/32.06 [16607]~P129(x166072)+~P506(x166071,x166072)+P503(x166071,x166072)
% 32.24/32.06 [16608]~P129(x166082)+~P503(x166081,x166082)+P506(x166081,x166082)
% 32.24/32.06 [16609]~P129(x166092)+~P507(x166091,x166092)+P506(x166091,x166092)
% 32.24/32.06 [16610]~P129(x166102)+~P506(x166101,x166102)+P507(x166101,x166102)
% 32.24/32.06 [16611]~P129(x166112)+~P508(x166111,x166112)+P507(x166111,x166112)
% 32.24/32.06 [16612]~P129(x166122)+~P507(x166121,x166122)+P508(x166121,x166122)
% 32.24/32.06 [16613]~P129(x166132)+~P509(x166131,x166132)+P508(x166131,x166132)
% 32.24/32.06 [16614]~P129(x166142)+~P508(x166141,x166142)+P509(x166141,x166142)
% 32.24/32.06 [16615]~P129(x166152)+~P510(x166151,x166152)+P509(x166151,x166152)
% 32.24/32.06 [16616]~P129(x166162)+~P509(x166161,x166162)+P510(x166161,x166162)
% 32.24/32.06 [16617]~P115(x166172)+~P420(x166171,x166172)+P418(x166171,x166172)
% 32.24/32.06 [16618]~P115(x166182)+~P418(x166181,x166182)+P420(x166181,x166182)
% 32.24/32.06 [16619]~P115(x166192)+~P419(x166191,x166192)+P420(x166191,x166192)
% 32.24/32.06 [16620]~P115(x166202)+~P420(x166201,x166202)+P419(x166201,x166202)
% 32.24/32.06 [16621]~P137(x166212)+~P183(x166211,x166212)+P170(x166211,x166212)
% 32.24/32.06 [16622]~P138(x166222)+~P196(x166221,x166222)+P197(x166221,x166222)
% 32.24/32.06 [16623]~P138(x166232)+~P197(x166231,x166232)+P196(x166231,x166232)
% 32.24/32.06 [16624]~P137(x166242)+~P170(x166241,x166242)+P183(x166241,x166242)
% 32.24/32.06 [16625]~P120(x166252)+~P2559(x166251,x166252)+P2557(x166251,x166252)
% 32.24/32.06 [16626]~P120(x166262)+~P2557(x166261,x166262)+P2559(x166261,x166262)
% 32.24/32.06 [16627]~P120(x166272)+~P2562(x166271,x166272)+P2559(x166271,x166272)
% 32.24/32.06 [16628]~P115(x166282)+~P2560(x166281,x166282)+P2558(x166281,x166282)
% 32.24/32.06 [16629]~P120(x166292)+~P2559(x166291,x166292)+P2562(x166291,x166292)
% 32.24/32.06 [16630]~P120(x166302)+~P2563(x166301,x166302)+P2562(x166301,x166302)
% 32.24/32.06 [16631]~P120(x166312)+~P2562(x166311,x166312)+P2563(x166311,x166312)
% 32.24/32.06 [16632]~P115(x166322)+~P2558(x166321,x166322)+P2560(x166321,x166322)
% 32.24/32.06 [16633]~P115(x166332)+~P2561(x166331,x166332)+P2560(x166331,x166332)
% 32.24/32.06 [16634]~P115(x166342)+~P2560(x166341,x166342)+P2561(x166341,x166342)
% 32.24/32.06 [16635]~P115(x166352)+~P2567(x166351,x166352)+P2539(x166351,x166352)
% 32.24/32.06 [16636]~P115(x166362)+~P2527(x166361,x166362)+P2539(x166361,x166362)
% 32.24/32.06 [16637]~P115(x166372)+~P2584(x166371,x166372)+P2530(x166371,x166372)
% 32.24/32.06 [16638]~P115(x166382)+~P2517(x166381,x166382)+P2530(x166381,x166382)
% 32.24/32.06 [16639]~P113(x166392)+~P2541(x166391,x166392)+P2536(x166391,x166392)
% 32.24/32.06 [16640]~P113(x166402)+~P2538(x166401,x166402)+P2540(x166401,x166402)
% 32.24/32.06 [16641]~P113(x166412)+~P2529(x166411,x166412)+P2532(x166411,x166412)
% 32.24/32.06 [16642]~P114(x166422)+~P2463(x166421,x166422)+P2453(x166421,x166422)
% 32.24/32.06 [16643]~P114(x166432)+~P2453(x166431,x166432)+P2463(x166431,x166432)
% 32.24/32.06 [16644]~P114(x166442)+~P2466(x166441,x166442)+P2463(x166441,x166442)
% 32.24/32.06 [16645]~P120(x166452)+~P2464(x166451,x166452)+P2462(x166451,x166452)
% 32.24/32.06 [16646]~P133(x166462)+~P2458(x166461,x166462)+P2454(x166461,x166462)
% 32.24/32.06 [16647]~P129(x166472)+~P2456(x166471,x166472)+P2455(x166471,x166472)
% 32.24/32.06 [16648]~P114(x166482)+~P2463(x166481,x166482)+P2466(x166481,x166482)
% 32.24/32.06 [16649]~P114(x166492)+~P2467(x166491,x166492)+P2466(x166491,x166492)
% 32.24/32.06 [16650]~P114(x166502)+~P2466(x166501,x166502)+P2467(x166501,x166502)
% 32.24/32.06 [16651]~P120(x166512)+~P2462(x166511,x166512)+P2464(x166511,x166512)
% 32.24/32.06 [16652]~P120(x166522)+~P2465(x166521,x166522)+P2464(x166521,x166522)
% 32.24/32.06 [16653]~P120(x166532)+~P2464(x166531,x166532)+P2465(x166531,x166532)
% 32.24/32.06 [16654]~P133(x166542)+~P2454(x166541,x166542)+P2458(x166541,x166542)
% 32.24/32.06 [16655]~P133(x166552)+~P2459(x166551,x166552)+P2458(x166551,x166552)
% 32.24/32.06 [16656]~P133(x166562)+~P2458(x166561,x166562)+P2459(x166561,x166562)
% 32.24/32.06 [16657]~P129(x166572)+~P2455(x166571,x166572)+P2456(x166571,x166572)
% 32.24/32.06 [16658]~P129(x166582)+~P2457(x166581,x166582)+P2456(x166581,x166582)
% 32.24/32.06 [16659]~P129(x166592)+~P2456(x166591,x166592)+P2457(x166591,x166592)
% 32.24/32.06 [16660]~P137(x166602)+~P2184(x166601,x166602)+P2013(x166601,x166602)
% 32.24/32.06 [16661]~P138(x166612)+~P2313(x166611,x166612)+P2314(x166611,x166612)
% 32.24/32.06 [16662]~P138(x166622)+~P2314(x166621,x166622)+P2313(x166621,x166622)
% 32.24/32.06 [16663]~P137(x166632)+~P2013(x166631,x166632)+P2184(x166631,x166632)
% 32.24/32.06 [16664]~P137(x166642)+~P2185(x166641,x166642)+P2174(x166641,x166642)
% 32.24/32.06 [16665]~P138(x166652)+~P2199(x166651,x166652)+P2200(x166651,x166652)
% 32.24/32.06 [16666]~P138(x166662)+~P2200(x166661,x166662)+P2199(x166661,x166662)
% 32.24/32.06 [16667]~P137(x166672)+~P2174(x166671,x166672)+P2185(x166671,x166672)
% 32.24/32.06 [16668]~P129(x166682)+~P1065(x166681,x166682)+P244(x166681,x166682)
% 32.24/32.06 [16669]~P137(x166692)+~P1041(x166691,x166692)+P1034(x166691,x166692)
% 32.24/32.06 [16670]~P137(x166702)+~P1034(x166701,x166702)+P1041(x166701,x166702)
% 32.24/32.06 [16671]~P129(x166712)+~P244(x166711,x166712)+P1065(x166711,x166712)
% 32.24/32.06 [16672]~P144(x166722)+~P562(x166721,x166722)+P573(x166721,x166722)
% 32.24/32.06 [16973]~P2532(x169732,x169731)+~P113(x169731)+~P2517(x169732,x169731)
% 32.24/32.06 [16974]~P2540(x169742,x169741)+~P113(x169741)+~P2527(x169742,x169741)
% 32.24/32.06 [16975]~P1055(x169752,x169751)+~P115(x169751)+~P1104(x169752,x169751)
% 32.24/32.06 [17338]~P81(x173381,x173382)+~P2127(x173382,a27)+P902(x173381,a26)
% 32.24/32.06 [17339]~P87(x173391,x173392)+~P1915(x173392,a27)+P902(x173391,a26)
% 32.24/32.06 [17340]~P88(x173401,x173402)+~P757(x173402,a27)+P902(x173401,a26)
% 32.24/32.06 [17341]~P89(x173411,x173412)+~P709(x173412,a27)+P902(x173411,a26)
% 32.24/32.06 [17342]~P90(x173421,x173422)+~P389(x173422,a27)+P902(x173421,a26)
% 32.24/32.06 [17343]~P91(x173431,x173432)+~P375(x173432,a27)+P902(x173431,a26)
% 32.24/32.06 [17344]~P92(x173441,x173442)+~P356(x173442,a27)+P902(x173441,a26)
% 32.24/32.06 [17345]~P93(x173451,x173452)+~P353(x173452,a27)+P902(x173451,a26)
% 32.24/32.06 [17346]~P94(x173461,x173462)+~P345(x173462,a27)+P902(x173461,a26)
% 32.24/32.06 [17347]~P95(x173471,x173472)+~P342(x173472,a27)+P902(x173471,a26)
% 32.24/32.06 [17348]~P96(x173481,x173482)+~P333(x173482,a27)+P902(x173481,a26)
% 32.24/32.06 [17349]~P81(x173491,x173492)+~P2127(x173492,a26)+P902(x173491,a28)
% 32.24/32.06 [17350]~P87(x173501,x173502)+~P1915(x173502,a26)+P902(x173501,a28)
% 32.24/32.06 [17351]~P88(x173511,x173512)+~P757(x173512,a26)+P902(x173511,a28)
% 32.24/32.06 [17352]~P89(x173521,x173522)+~P709(x173522,a26)+P902(x173521,a28)
% 32.24/32.06 [17353]~P90(x173531,x173532)+~P389(x173532,a26)+P902(x173531,a28)
% 32.24/32.06 [17354]~P91(x173541,x173542)+~P375(x173542,a26)+P902(x173541,a28)
% 32.24/32.06 [17355]~P92(x173551,x173552)+~P356(x173552,a26)+P902(x173551,a28)
% 32.24/32.06 [17356]~P93(x173561,x173562)+~P353(x173562,a26)+P902(x173561,a28)
% 32.24/32.06 [17357]~P94(x173571,x173572)+~P345(x173572,a26)+P902(x173571,a28)
% 32.24/32.06 [17358]~P95(x173581,x173582)+~P342(x173582,a26)+P902(x173581,a28)
% 32.24/32.06 [17359]~P96(x173591,x173592)+~P333(x173592,a26)+P902(x173591,a28)
% 32.24/32.06 [17360]~P81(x173601,x173602)+~P2127(x173602,a28)+P902(x173601,a39)
% 32.24/32.06 [17361]~P87(x173611,x173612)+~P1915(x173612,a28)+P902(x173611,a39)
% 32.24/32.06 [17362]~P88(x173621,x173622)+~P757(x173622,a28)+P902(x173621,a39)
% 32.24/32.06 [17363]~P89(x173631,x173632)+~P709(x173632,a28)+P902(x173631,a39)
% 32.24/32.06 [17364]~P90(x173641,x173642)+~P389(x173642,a28)+P902(x173641,a39)
% 32.24/32.06 [17365]~P91(x173651,x173652)+~P375(x173652,a28)+P902(x173651,a39)
% 32.24/32.06 [17366]~P92(x173661,x173662)+~P356(x173662,a28)+P902(x173661,a39)
% 32.24/32.06 [17367]~P93(x173671,x173672)+~P353(x173672,a28)+P902(x173671,a39)
% 32.24/32.06 [17368]~P94(x173681,x173682)+~P345(x173682,a28)+P902(x173681,a39)
% 32.24/32.06 [17369]~P95(x173691,x173692)+~P342(x173692,a28)+P902(x173691,a39)
% 32.24/32.06 [17370]~P96(x173701,x173702)+~P333(x173702,a28)+P902(x173701,a39)
% 32.24/32.06 [17371]~P81(x173711,x173712)+~P2127(x173712,a50)+P902(x173711,a62)
% 32.24/32.06 [17372]~P87(x173721,x173722)+~P1915(x173722,a50)+P902(x173721,a62)
% 32.24/32.06 [17373]~P88(x173731,x173732)+~P757(x173732,a50)+P902(x173731,a62)
% 32.24/32.06 [17374]~P89(x173741,x173742)+~P709(x173742,a50)+P902(x173741,a62)
% 32.24/32.06 [17375]~P90(x173751,x173752)+~P389(x173752,a50)+P902(x173751,a62)
% 32.24/32.06 [17376]~P91(x173761,x173762)+~P375(x173762,a50)+P902(x173761,a62)
% 32.24/32.06 [17377]~P92(x173771,x173772)+~P356(x173772,a50)+P902(x173771,a62)
% 32.24/32.06 [17378]~P93(x173781,x173782)+~P353(x173782,a50)+P902(x173781,a62)
% 32.24/32.06 [17379]~P94(x173791,x173792)+~P345(x173792,a50)+P902(x173791,a62)
% 32.24/32.06 [17380]~P95(x173801,x173802)+~P342(x173802,a50)+P902(x173801,a62)
% 32.24/32.06 [17381]~P96(x173811,x173812)+~P333(x173812,a50)+P902(x173811,a62)
% 32.24/32.06 [17382]~P81(x173821,x173822)+~P2127(x173822,a39)+P902(x173821,a50)
% 32.24/32.06 [17383]~P87(x173831,x173832)+~P1915(x173832,a39)+P902(x173831,a50)
% 32.24/32.06 [17384]~P88(x173841,x173842)+~P757(x173842,a39)+P902(x173841,a50)
% 32.24/32.06 [17385]~P89(x173851,x173852)+~P709(x173852,a39)+P902(x173851,a50)
% 32.24/32.06 [17386]~P90(x173861,x173862)+~P389(x173862,a39)+P902(x173861,a50)
% 32.24/32.06 [17387]~P91(x173871,x173872)+~P375(x173872,a39)+P902(x173871,a50)
% 32.24/32.06 [17388]~P92(x173881,x173882)+~P356(x173882,a39)+P902(x173881,a50)
% 32.24/32.06 [17389]~P93(x173891,x173892)+~P353(x173892,a39)+P902(x173891,a50)
% 32.24/32.06 [17390]~P94(x173901,x173902)+~P345(x173902,a39)+P902(x173901,a50)
% 32.24/32.06 [17391]~P95(x173911,x173912)+~P342(x173912,a39)+P902(x173911,a50)
% 32.24/32.06 [17392]~P96(x173921,x173922)+~P333(x173922,a39)+P902(x173921,a50)
% 32.24/32.06 [17393]~P81(x173931,x173932)+~P2127(x173932,a61)+P902(x173931,a83)
% 32.24/32.06 [17394]~P87(x173941,x173942)+~P1915(x173942,a61)+P902(x173941,a83)
% 32.24/32.06 [17395]~P88(x173951,x173952)+~P757(x173952,a61)+P902(x173951,a83)
% 32.24/32.06 [17396]~P89(x173961,x173962)+~P709(x173962,a61)+P902(x173961,a83)
% 32.24/32.06 [17397]~P90(x173971,x173972)+~P389(x173972,a61)+P902(x173971,a83)
% 32.24/32.06 [17398]~P91(x173981,x173982)+~P375(x173982,a61)+P902(x173981,a83)
% 32.24/32.06 [17399]~P92(x173991,x173992)+~P356(x173992,a61)+P902(x173991,a83)
% 32.24/32.06 [17400]~P93(x174001,x174002)+~P353(x174002,a61)+P902(x174001,a83)
% 32.24/32.06 [17401]~P94(x174011,x174012)+~P345(x174012,a61)+P902(x174011,a83)
% 32.24/32.06 [17402]~P95(x174021,x174022)+~P342(x174022,a61)+P902(x174021,a83)
% 32.24/32.06 [17403]~P96(x174031,x174032)+~P333(x174032,a61)+P902(x174031,a83)
% 32.24/32.06 [17404]~P81(x174041,x174042)+~P2127(x174042,a62)+P902(x174041,a61)
% 32.24/32.06 [17405]~P87(x174051,x174052)+~P1915(x174052,a62)+P902(x174051,a61)
% 32.24/32.06 [17406]~P88(x174061,x174062)+~P757(x174062,a62)+P902(x174061,a61)
% 32.24/32.06 [17407]~P89(x174071,x174072)+~P709(x174072,a62)+P902(x174071,a61)
% 32.24/32.06 [17408]~P90(x174081,x174082)+~P389(x174082,a62)+P902(x174081,a61)
% 32.24/32.06 [17409]~P91(x174091,x174092)+~P375(x174092,a62)+P902(x174091,a61)
% 32.24/32.06 [17410]~P92(x174101,x174102)+~P356(x174102,a62)+P902(x174101,a61)
% 32.24/32.06 [17411]~P93(x174111,x174112)+~P353(x174112,a62)+P902(x174111,a61)
% 32.24/32.06 [17412]~P94(x174121,x174122)+~P345(x174122,a62)+P902(x174121,a61)
% 32.24/32.06 [17413]~P95(x174131,x174132)+~P342(x174132,a62)+P902(x174131,a61)
% 32.24/32.06 [17414]~P96(x174141,x174142)+~P333(x174142,a62)+P902(x174141,a61)
% 32.24/32.06 [17415]~P81(x174151,x174152)+~P2127(x174152,a91)+P902(x174151,a29)
% 32.24/32.06 [17416]~P87(x174161,x174162)+~P1915(x174162,a91)+P902(x174161,a29)
% 32.24/32.06 [17417]~P88(x174171,x174172)+~P757(x174172,a91)+P902(x174171,a29)
% 32.24/32.06 [17418]~P89(x174181,x174182)+~P709(x174182,a91)+P902(x174181,a29)
% 32.24/32.06 [17419]~P90(x174191,x174192)+~P389(x174192,a91)+P902(x174191,a29)
% 32.24/32.06 [17420]~P91(x174201,x174202)+~P375(x174202,a91)+P902(x174201,a29)
% 32.24/32.06 [17421]~P92(x174211,x174212)+~P356(x174212,a91)+P902(x174211,a29)
% 32.24/32.06 [17422]~P93(x174221,x174222)+~P353(x174222,a91)+P902(x174221,a29)
% 32.24/32.06 [17423]~P94(x174231,x174232)+~P345(x174232,a91)+P902(x174231,a29)
% 32.24/32.06 [17424]~P95(x174241,x174242)+~P342(x174242,a91)+P902(x174241,a29)
% 32.24/32.06 [17425]~P96(x174251,x174252)+~P333(x174252,a91)+P902(x174251,a29)
% 32.24/32.06 [17426]~P81(x174261,x174262)+~P2127(x174262,a29)+P902(x174261,a30)
% 32.24/32.06 [17427]~P87(x174271,x174272)+~P1915(x174272,a29)+P902(x174271,a30)
% 32.24/32.06 [17428]~P88(x174281,x174282)+~P757(x174282,a29)+P902(x174281,a30)
% 32.24/32.06 [17429]~P89(x174291,x174292)+~P709(x174292,a29)+P902(x174291,a30)
% 32.24/32.06 [17430]~P90(x174301,x174302)+~P389(x174302,a29)+P902(x174301,a30)
% 32.24/32.06 [17431]~P91(x174311,x174312)+~P375(x174312,a29)+P902(x174311,a30)
% 32.24/32.06 [17432]~P92(x174321,x174322)+~P356(x174322,a29)+P902(x174321,a30)
% 32.24/32.06 [17433]~P93(x174331,x174332)+~P353(x174332,a29)+P902(x174331,a30)
% 32.24/32.06 [17434]~P94(x174341,x174342)+~P345(x174342,a29)+P902(x174341,a30)
% 32.24/32.06 [17435]~P95(x174351,x174352)+~P342(x174352,a29)+P902(x174351,a30)
% 32.24/32.06 [17436]~P96(x174361,x174362)+~P333(x174362,a29)+P902(x174361,a30)
% 32.24/32.06 [17437]~P81(x174371,x174372)+~P2127(x174372,a92)+P902(x174371,a91)
% 32.24/32.06 [17438]~P87(x174381,x174382)+~P1915(x174382,a92)+P902(x174381,a91)
% 32.24/32.06 [17439]~P88(x174391,x174392)+~P757(x174392,a92)+P902(x174391,a91)
% 32.24/32.06 [17440]~P89(x174401,x174402)+~P709(x174402,a92)+P902(x174401,a91)
% 32.24/32.06 [17441]~P90(x174411,x174412)+~P389(x174412,a92)+P902(x174411,a91)
% 32.24/32.06 [17442]~P91(x174421,x174422)+~P375(x174422,a92)+P902(x174421,a91)
% 32.24/32.06 [17443]~P92(x174431,x174432)+~P356(x174432,a92)+P902(x174431,a91)
% 32.24/32.06 [17444]~P93(x174441,x174442)+~P353(x174442,a92)+P902(x174441,a91)
% 32.24/32.06 [17445]~P94(x174451,x174452)+~P345(x174452,a92)+P902(x174451,a91)
% 32.24/32.06 [17446]~P95(x174461,x174462)+~P342(x174462,a92)+P902(x174461,a91)
% 32.24/32.06 [17447]~P96(x174471,x174472)+~P333(x174472,a92)+P902(x174471,a91)
% 32.24/32.06 [17448]~P81(x174481,x174482)+~P2127(x174482,a83)+P902(x174481,a92)
% 32.24/32.06 [17449]~P87(x174491,x174492)+~P1915(x174492,a83)+P902(x174491,a92)
% 32.24/32.06 [17450]~P88(x174501,x174502)+~P757(x174502,a83)+P902(x174501,a92)
% 32.24/32.06 [17451]~P89(x174511,x174512)+~P709(x174512,a83)+P902(x174511,a92)
% 32.24/32.06 [17452]~P90(x174521,x174522)+~P389(x174522,a83)+P902(x174521,a92)
% 32.24/32.06 [17453]~P91(x174531,x174532)+~P375(x174532,a83)+P902(x174531,a92)
% 32.24/32.06 [17454]~P92(x174541,x174542)+~P356(x174542,a83)+P902(x174541,a92)
% 32.24/32.06 [17455]~P93(x174551,x174552)+~P353(x174552,a83)+P902(x174551,a92)
% 32.24/32.06 [17456]~P94(x174561,x174562)+~P345(x174562,a83)+P902(x174561,a92)
% 32.24/32.06 [17457]~P95(x174571,x174572)+~P342(x174572,a83)+P902(x174571,a92)
% 32.24/32.06 [17458]~P96(x174581,x174582)+~P333(x174582,a83)+P902(x174581,a92)
% 32.24/32.06 [17459]~P81(x174592,x174591)+~P902(x174592,a26)+P2127(x174591,a27)
% 32.24/32.06 [17460]~P81(x174602,x174601)+~P902(x174602,a28)+P2127(x174601,a26)
% 32.24/32.06 [17461]~P81(x174612,x174611)+~P902(x174612,a39)+P2127(x174611,a28)
% 32.24/32.06 [17462]~P81(x174622,x174621)+~P902(x174622,a50)+P2127(x174621,a39)
% 32.24/32.06 [17463]~P81(x174632,x174631)+~P902(x174632,a61)+P2127(x174631,a62)
% 32.24/32.06 [17464]~P81(x174642,x174641)+~P902(x174642,a62)+P2127(x174641,a50)
% 32.24/32.06 [17465]~P81(x174652,x174651)+~P902(x174652,a92)+P2127(x174651,a83)
% 32.24/32.06 [17466]~P81(x174662,x174661)+~P902(x174662,a83)+P2127(x174661,a61)
% 32.24/32.06 [17467]~P81(x174672,x174671)+~P902(x174672,a30)+P2127(x174671,a29)
% 32.24/32.06 [17468]~P81(x174682,x174681)+~P902(x174682,a29)+P2127(x174681,a91)
% 32.24/32.06 [17469]~P81(x174692,x174691)+~P902(x174692,a91)+P2127(x174691,a92)
% 32.24/32.06 [17470]~P87(x174702,x174701)+~P902(x174702,a26)+P1915(x174701,a27)
% 32.24/32.06 [17471]~P87(x174712,x174711)+~P902(x174712,a28)+P1915(x174711,a26)
% 32.24/32.06 [17472]~P87(x174722,x174721)+~P902(x174722,a39)+P1915(x174721,a28)
% 32.24/32.06 [17473]~P87(x174732,x174731)+~P902(x174732,a50)+P1915(x174731,a39)
% 32.24/32.06 [17474]~P87(x174742,x174741)+~P902(x174742,a61)+P1915(x174741,a62)
% 32.24/32.06 [17475]~P87(x174752,x174751)+~P902(x174752,a62)+P1915(x174751,a50)
% 32.24/32.06 [17476]~P87(x174762,x174761)+~P902(x174762,a92)+P1915(x174761,a83)
% 32.24/32.06 [17477]~P87(x174772,x174771)+~P902(x174772,a83)+P1915(x174771,a61)
% 32.24/32.06 [17478]~P87(x174782,x174781)+~P902(x174782,a30)+P1915(x174781,a29)
% 32.24/32.06 [17479]~P87(x174792,x174791)+~P902(x174792,a29)+P1915(x174791,a91)
% 32.24/32.06 [17480]~P87(x174802,x174801)+~P902(x174802,a91)+P1915(x174801,a92)
% 32.24/32.06 [17481]~P88(x174812,x174811)+~P902(x174812,a26)+P757(x174811,a27)
% 32.24/32.06 [17482]~P88(x174822,x174821)+~P902(x174822,a28)+P757(x174821,a26)
% 32.24/32.06 [17483]~P88(x174832,x174831)+~P902(x174832,a39)+P757(x174831,a28)
% 32.24/32.06 [17484]~P88(x174842,x174841)+~P902(x174842,a50)+P757(x174841,a39)
% 32.24/32.06 [17485]~P88(x174852,x174851)+~P902(x174852,a61)+P757(x174851,a62)
% 32.24/32.06 [17486]~P88(x174862,x174861)+~P902(x174862,a62)+P757(x174861,a50)
% 32.24/32.06 [17487]~P88(x174872,x174871)+~P902(x174872,a92)+P757(x174871,a83)
% 32.24/32.06 [17488]~P88(x174882,x174881)+~P902(x174882,a83)+P757(x174881,a61)
% 32.24/32.06 [17489]~P88(x174892,x174891)+~P902(x174892,a30)+P757(x174891,a29)
% 32.24/32.06 [17490]~P88(x174902,x174901)+~P902(x174902,a29)+P757(x174901,a91)
% 32.24/32.06 [17491]~P88(x174912,x174911)+~P902(x174912,a91)+P757(x174911,a92)
% 32.24/32.06 [17492]~P89(x174922,x174921)+~P902(x174922,a26)+P709(x174921,a27)
% 32.24/32.06 [17493]~P89(x174932,x174931)+~P902(x174932,a28)+P709(x174931,a26)
% 32.24/32.06 [17494]~P89(x174942,x174941)+~P902(x174942,a39)+P709(x174941,a28)
% 32.24/32.06 [17495]~P89(x174952,x174951)+~P902(x174952,a50)+P709(x174951,a39)
% 32.24/32.06 [17496]~P89(x174962,x174961)+~P902(x174962,a61)+P709(x174961,a62)
% 32.24/32.06 [17497]~P89(x174972,x174971)+~P902(x174972,a62)+P709(x174971,a50)
% 32.24/32.06 [17498]~P89(x174982,x174981)+~P902(x174982,a92)+P709(x174981,a83)
% 32.24/32.06 [17499]~P89(x174992,x174991)+~P902(x174992,a83)+P709(x174991,a61)
% 32.24/32.06 [17500]~P89(x175002,x175001)+~P902(x175002,a30)+P709(x175001,a29)
% 32.24/32.06 [17501]~P89(x175012,x175011)+~P902(x175012,a29)+P709(x175011,a91)
% 32.24/32.06 [17502]~P89(x175022,x175021)+~P902(x175022,a91)+P709(x175021,a92)
% 32.24/32.06 [17503]~P90(x175032,x175031)+~P902(x175032,a26)+P389(x175031,a27)
% 32.24/32.06 [17504]~P90(x175042,x175041)+~P902(x175042,a28)+P389(x175041,a26)
% 32.24/32.06 [17505]~P90(x175052,x175051)+~P902(x175052,a39)+P389(x175051,a28)
% 32.24/32.06 [17506]~P90(x175062,x175061)+~P902(x175062,a50)+P389(x175061,a39)
% 32.24/32.06 [17507]~P90(x175072,x175071)+~P902(x175072,a61)+P389(x175071,a62)
% 32.24/32.06 [17508]~P90(x175082,x175081)+~P902(x175082,a62)+P389(x175081,a50)
% 32.24/32.06 [17509]~P90(x175092,x175091)+~P902(x175092,a92)+P389(x175091,a83)
% 32.24/32.06 [17510]~P90(x175102,x175101)+~P902(x175102,a83)+P389(x175101,a61)
% 32.24/32.06 [17511]~P90(x175112,x175111)+~P902(x175112,a30)+P389(x175111,a29)
% 32.24/32.06 [17512]~P90(x175122,x175121)+~P902(x175122,a29)+P389(x175121,a91)
% 32.24/32.06 [17513]~P90(x175132,x175131)+~P902(x175132,a91)+P389(x175131,a92)
% 32.24/32.06 [17514]~P91(x175142,x175141)+~P902(x175142,a26)+P375(x175141,a27)
% 32.24/32.06 [17515]~P91(x175152,x175151)+~P902(x175152,a28)+P375(x175151,a26)
% 32.24/32.06 [17516]~P91(x175162,x175161)+~P902(x175162,a39)+P375(x175161,a28)
% 32.24/32.06 [17517]~P91(x175172,x175171)+~P902(x175172,a50)+P375(x175171,a39)
% 32.24/32.06 [17518]~P91(x175182,x175181)+~P902(x175182,a61)+P375(x175181,a62)
% 32.24/32.06 [17519]~P91(x175192,x175191)+~P902(x175192,a62)+P375(x175191,a50)
% 32.24/32.06 [17520]~P91(x175202,x175201)+~P902(x175202,a92)+P375(x175201,a83)
% 32.24/32.06 [17521]~P91(x175212,x175211)+~P902(x175212,a83)+P375(x175211,a61)
% 32.24/32.06 [17522]~P91(x175222,x175221)+~P902(x175222,a30)+P375(x175221,a29)
% 32.24/32.06 [17523]~P91(x175232,x175231)+~P902(x175232,a29)+P375(x175231,a91)
% 32.24/32.06 [17524]~P91(x175242,x175241)+~P902(x175242,a91)+P375(x175241,a92)
% 32.24/32.06 [17525]~P92(x175252,x175251)+~P902(x175252,a26)+P356(x175251,a27)
% 32.24/32.06 [17526]~P92(x175262,x175261)+~P902(x175262,a28)+P356(x175261,a26)
% 32.24/32.06 [17527]~P92(x175272,x175271)+~P902(x175272,a39)+P356(x175271,a28)
% 32.24/32.06 [17528]~P92(x175282,x175281)+~P902(x175282,a50)+P356(x175281,a39)
% 32.24/32.06 [17529]~P92(x175292,x175291)+~P902(x175292,a61)+P356(x175291,a62)
% 32.24/32.06 [17530]~P92(x175302,x175301)+~P902(x175302,a62)+P356(x175301,a50)
% 32.24/32.06 [17531]~P92(x175312,x175311)+~P902(x175312,a92)+P356(x175311,a83)
% 32.24/32.06 [17532]~P92(x175322,x175321)+~P902(x175322,a83)+P356(x175321,a61)
% 32.24/32.06 [17533]~P92(x175332,x175331)+~P902(x175332,a30)+P356(x175331,a29)
% 32.24/32.06 [17534]~P92(x175342,x175341)+~P902(x175342,a29)+P356(x175341,a91)
% 32.24/32.06 [17535]~P92(x175352,x175351)+~P902(x175352,a91)+P356(x175351,a92)
% 32.24/32.06 [17536]~P93(x175362,x175361)+~P902(x175362,a26)+P353(x175361,a27)
% 32.24/32.06 [17537]~P93(x175372,x175371)+~P902(x175372,a28)+P353(x175371,a26)
% 32.24/32.06 [17538]~P93(x175382,x175381)+~P902(x175382,a39)+P353(x175381,a28)
% 32.24/32.06 [17539]~P93(x175392,x175391)+~P902(x175392,a50)+P353(x175391,a39)
% 32.24/32.06 [17540]~P93(x175402,x175401)+~P902(x175402,a61)+P353(x175401,a62)
% 32.24/32.06 [17541]~P93(x175412,x175411)+~P902(x175412,a62)+P353(x175411,a50)
% 32.24/32.06 [17542]~P93(x175422,x175421)+~P902(x175422,a92)+P353(x175421,a83)
% 32.24/32.06 [17543]~P93(x175432,x175431)+~P902(x175432,a83)+P353(x175431,a61)
% 32.24/32.06 [17544]~P93(x175442,x175441)+~P902(x175442,a30)+P353(x175441,a29)
% 32.24/32.06 [17545]~P93(x175452,x175451)+~P902(x175452,a29)+P353(x175451,a91)
% 32.24/32.06 [17546]~P93(x175462,x175461)+~P902(x175462,a91)+P353(x175461,a92)
% 32.24/32.06 [17547]~P94(x175472,x175471)+~P902(x175472,a26)+P345(x175471,a27)
% 32.24/32.06 [17548]~P94(x175482,x175481)+~P902(x175482,a28)+P345(x175481,a26)
% 32.24/32.06 [17549]~P94(x175492,x175491)+~P902(x175492,a39)+P345(x175491,a28)
% 32.24/32.06 [17550]~P94(x175502,x175501)+~P902(x175502,a50)+P345(x175501,a39)
% 32.24/32.06 [17551]~P94(x175512,x175511)+~P902(x175512,a61)+P345(x175511,a62)
% 32.24/32.06 [17552]~P94(x175522,x175521)+~P902(x175522,a62)+P345(x175521,a50)
% 32.24/32.06 [17553]~P94(x175532,x175531)+~P902(x175532,a92)+P345(x175531,a83)
% 32.24/32.06 [17554]~P94(x175542,x175541)+~P902(x175542,a83)+P345(x175541,a61)
% 32.24/32.06 [17555]~P94(x175552,x175551)+~P902(x175552,a30)+P345(x175551,a29)
% 32.24/32.06 [17556]~P94(x175562,x175561)+~P902(x175562,a29)+P345(x175561,a91)
% 32.24/32.06 [17557]~P94(x175572,x175571)+~P902(x175572,a91)+P345(x175571,a92)
% 32.24/32.06 [17558]~P95(x175582,x175581)+~P902(x175582,a26)+P342(x175581,a27)
% 32.24/32.06 [17559]~P95(x175592,x175591)+~P902(x175592,a28)+P342(x175591,a26)
% 32.24/32.06 [17560]~P95(x175602,x175601)+~P902(x175602,a39)+P342(x175601,a28)
% 32.24/32.06 [17561]~P95(x175612,x175611)+~P902(x175612,a50)+P342(x175611,a39)
% 32.24/32.06 [17562]~P95(x175622,x175621)+~P902(x175622,a61)+P342(x175621,a62)
% 32.24/32.06 [17563]~P95(x175632,x175631)+~P902(x175632,a62)+P342(x175631,a50)
% 32.24/32.06 [17564]~P95(x175642,x175641)+~P902(x175642,a92)+P342(x175641,a83)
% 32.24/32.06 [17565]~P95(x175652,x175651)+~P902(x175652,a83)+P342(x175651,a61)
% 32.24/32.06 [17566]~P95(x175662,x175661)+~P902(x175662,a30)+P342(x175661,a29)
% 32.24/32.06 [17567]~P95(x175672,x175671)+~P902(x175672,a29)+P342(x175671,a91)
% 32.24/32.06 [17568]~P95(x175682,x175681)+~P902(x175682,a91)+P342(x175681,a92)
% 32.24/32.06 [17569]~P96(x175692,x175691)+~P902(x175692,a26)+P333(x175691,a27)
% 32.24/32.06 [17570]~P96(x175702,x175701)+~P902(x175702,a28)+P333(x175701,a26)
% 32.24/32.06 [17571]~P96(x175712,x175711)+~P902(x175712,a39)+P333(x175711,a28)
% 32.24/32.06 [17572]~P96(x175722,x175721)+~P902(x175722,a50)+P333(x175721,a39)
% 32.24/32.06 [17573]~P96(x175732,x175731)+~P902(x175732,a61)+P333(x175731,a62)
% 32.24/32.06 [17574]~P96(x175742,x175741)+~P902(x175742,a62)+P333(x175741,a50)
% 32.24/32.06 [17575]~P96(x175752,x175751)+~P902(x175752,a92)+P333(x175751,a83)
% 32.24/32.06 [17576]~P96(x175762,x175761)+~P902(x175762,a83)+P333(x175761,a61)
% 32.24/32.06 [17577]~P96(x175772,x175771)+~P902(x175772,a30)+P333(x175771,a29)
% 32.24/32.06 [17578]~P96(x175782,x175781)+~P902(x175782,a29)+P333(x175781,a91)
% 32.24/32.06 [17579]~P96(x175792,x175791)+~P902(x175792,a91)+P333(x175791,a92)
% 32.24/32.06 [6935]~P113(x69351)+E(a26,x69351)+E(a28,x69351)+E(a27,x69351)
% 32.24/32.06 [6936]~P136(x69361)+E(a28,x69361)+E(a39,x69361)+E(a26,x69361)
% 32.24/32.06 [7138]P68(x71381)+~P125(x71381)+E(a45,x71381)+E(a44,x71381)
% 32.24/32.06 [9397]P1781(x93971)+P1785(x93971)+~P1800(x93971)+P1805(x93971)
% 32.24/32.06 [9398]P1785(x93981)+P1800(x93981)+~P1805(x93981)+P1781(x93981)
% 32.24/32.06 [9399]P978(x93991)+P985(x93991)+~P999(x93991)+P1005(x93991)
% 32.24/32.06 [9400]P985(x94001)+P999(x94001)+~P1005(x94001)+P978(x94001)
% 32.24/32.06 [16141]~P69(x161411)+P1498(x161411)+P562(x161411,a27)+P562(x161411,a26)
% 32.24/32.06 [16142]~P70(x161421)+P1500(x161421)+P562(x161421,a27)+P562(x161421,a26)
% 32.24/32.06 [16143]~P71(x161431)+P1501(x161431)+P562(x161431,a27)+P562(x161431,a26)
% 32.24/32.06 [16144]~P112(x161441)+P1502(x161441)+P562(x161441,a27)+P562(x161441,a26)
% 32.24/32.06 [16145]~P73(x161451)+P1494(x161451)+P562(x161451,a27)+P562(x161451,a26)
% 32.24/32.06 [16146]~P72(x161461)+P1495(x161461)+P562(x161461,a27)+P562(x161461,a26)
% 32.24/32.06 [16147]~P107(x161471)+P672(x161471)+P562(x161471,a27)+P562(x161471,a26)
% 32.24/32.06 [16148]~P106(x161481)+P682(x161481)+P562(x161481,a27)+P562(x161481,a26)
% 32.24/32.06 [16673]~P112(x166731)+P1505(x166731)+P562(x166731,a27)+~P562(x166731,a26)
% 32.24/32.06 [16674]~P111(x166741)+P1486(x166741)+P562(x166741,a27)+~P562(x166741,a26)
% 32.24/32.06 [16675]~P74(x166751)+P1454(x166751)+P562(x166751,a27)+~P562(x166751,a26)
% 32.24/32.06 [16676]~P74(x166761)+P707(x166761)+P562(x166761,a26)+~P562(x166761,a27)
% 32.24/32.06 [16677]~P107(x166771)+P697(x166771)+P562(x166771,a26)+~P562(x166771,a27)
% 32.24/32.06 [16678]~P106(x166781)+P702(x166781)+P562(x166781,a26)+~P562(x166781,a27)
% 32.24/32.06 [16816]P1781(x168161)+P1741(x168161,a27)+P1741(x168161,a26)+~P1741(x168161,a28)
% 32.24/32.06 [16817]P1794(x168171)+P1741(x168171,a26)+P1741(x168171,a28)+~P1741(x168171,a27)
% 32.24/32.06 [16818]P1790(x168181)+P1741(x168181,a27)+P1741(x168181,a28)+~P1741(x168181,a26)
% 32.24/32.06 [16819]P1507(x168191)+P472(x168191,a26)+P472(x168191,a28)+~P472(x168191,a27)
% 32.24/32.06 [16820]P978(x168201)+P903(x168201,a27)+P903(x168201,a26)+~P903(x168201,a28)
% 32.24/32.06 [16821]P997(x168211)+P903(x168211,a26)+P903(x168211,a28)+~P903(x168211,a27)
% 32.24/32.06 [16822]P990(x168221)+P903(x168221,a27)+P903(x168221,a28)+~P903(x168221,a26)
% 32.24/32.06 [16971]~P82(x169711)+P931(x169711)+~P913(x169711,a27)+~P913(x169711,a26)
% 32.24/32.06 [16972]~P85(x169721)+P930(x169721)+~P913(x169721,a27)+~P913(x169721,a26)
% 32.24/32.06 [17598]P2125(x175981)+P2478(x175981,a26)+~P2478(x175981,a27)+~P2478(x175981,a28)
% 32.24/32.06 [17681]P1508(x176811)+~P472(x176811,a27)+~P472(x176811,a26)+~P472(x176811,a28)
% 32.24/32.06 [15677]~P115(x156772)+~P37(x156772)+P2045(x156771)+P2046(x156771,x156772)
% 32.24/32.06 [15678]~P115(x156782)+~P43(x156782)+P1661(x156781)+P1662(x156781,x156782)
% 32.24/32.06 [15679]~P115(x156792)+~P37(x156792)+P1650(x156791)+P1652(x156791,x156792)
% 32.24/32.06 [15680]~P8(x156802)+~P129(x156802)+P1479(x156801)+P1513(x156801,x156802)
% 32.24/32.06 [15681]~P7(x156812)+~P129(x156812)+P1507(x156811)+P1514(x156811,x156812)
% 32.24/32.06 [16015]~P137(x160152)+~P1861(x160151)+~P46(x160152)+P1869(x160151,x160152)
% 32.24/32.06 [16016]~P115(x160162)+~P37(x160162)+~P2444(x160161)+P1710(x160161,x160162)
% 32.24/32.06 [16017]~P115(x160172)+~P37(x160172)+~P2444(x160171)+P1659(x160171,x160172)
% 32.24/32.06 [16018]~P115(x160182)+~P1712(x160181)+~P43(x160182)+P1713(x160181,x160182)
% 32.24/32.06 [16019]~P115(x160192)+~P43(x160192)+~P1650(x160191)+P1652(x160191,x160192)
% 32.24/32.06 [16020]~P115(x160202)+~P37(x160202)+~P2444(x160201)+P1646(x160201,x160202)
% 32.24/32.06 [16021]~P115(x160212)+~P43(x160212)+~P981(x160211)+P1645(x160211,x160212)
% 32.24/32.06 [16022]~P12(x160222)+~P129(x160222)+~P1475(x160221)+P1512(x160221,x160222)
% 32.24/32.06 [16023]~P11(x160232)+~P129(x160232)+~P1505(x160231)+P1511(x160231,x160232)
% 32.24/32.06 [16024]~P13(x160242)+~P129(x160242)+~P1491(x160241)+P1511(x160241,x160242)
% 32.24/32.06 [16025]~P9(x160252)+~P129(x160252)+~P1479(x160251)+P1513(x160251,x160252)
% 32.24/32.06 [16026]~P6(x160262)+~P129(x160262)+~P1507(x160261)+P1514(x160261,x160262)
% 32.24/32.06 [16027]~P14(x160272)+~P129(x160272)+~P1479(x160271)+P1510(x160271,x160272)
% 32.24/32.06 [16028]~P137(x160282)+~P46(x160282)+~P233(x160281)+P241(x160281,x160282)
% 32.24/32.06 [16029]~P137(x160292)+~P2346(x160291)+~P44(x160292)+P2354(x160291,x160292)
% 32.24/32.06 [16030]~P137(x160302)+~P44(x160302)+~P2235(x160301)+P2243(x160301,x160302)
% 32.24/32.06 [16031]~P42(x160312)+~P129(x160312)+~P1334(x160311)+P1324(x160311,x160312)
% 32.24/32.06 [16179]~P129(x161791)+~P1514(x161792,x161791)+P7(x161791)+P1507(x161792)
% 32.24/32.06 [16180]~P129(x161801)+~P1513(x161802,x161801)+P8(x161801)+P1479(x161802)
% 32.24/32.06 [16181]P2051(x161811)+~P2004(x161811,x161812)+P2042(x161811)+~P115(x161812)
% 32.24/32.06 [16182]~P115(x161822)+~P2046(x161821,x161822)+P2045(x161821)+P37(x161822)
% 32.24/32.06 [16183]~P115(x161831)+~P1652(x161832,x161831)+P37(x161831)+P1650(x161832)
% 32.24/32.06 [16184]P1987(x161841)+~P63(x161842,x161841)+P2489(x161841)+~P2489(x161842)
% 32.24/32.06 [16185]~P2489(x161852)+~P63(x161851,x161852)+P2489(x161851)+P1987(x161852)
% 32.24/32.06 [16186]P800(x161861)+~P63(x161862,x161861)+P1782(x161861)+~P1782(x161862)
% 32.24/32.06 [16187]~P1782(x161872)+~P63(x161871,x161872)+P1782(x161871)+P800(x161872)
% 32.24/32.06 [16188]P1771(x161881)+~P63(x161882,x161881)+P1755(x161881)+~P1755(x161882)
% 32.24/32.06 [16189]~P1755(x161892)+~P63(x161891,x161892)+P1755(x161891)+P1771(x161892)
% 32.24/32.06 [16190]~P115(x161901)+~P1662(x161902,x161901)+P43(x161901)+P1661(x161902)
% 32.24/32.06 [16191]P1457(x161911)+~P63(x161912,x161911)+P1040(x161911)+~P1040(x161912)
% 32.24/32.06 [16192]~P1040(x161922)+~P63(x161921,x161922)+P1040(x161921)+P1457(x161922)
% 32.24/32.06 [16193]P968(x161931)+~P63(x161932,x161931)+P825(x161931)+~P825(x161932)
% 32.24/32.06 [16194]~P825(x161942)+~P63(x161941,x161942)+P825(x161941)+P968(x161942)
% 32.24/32.06 [16195]P959(x161951)+~P63(x161952,x161951)+P904(x161951)+~P904(x161952)
% 32.24/32.06 [16196]~P904(x161962)+~P63(x161961,x161962)+P904(x161961)+P959(x161962)
% 32.24/32.06 [16197]P933(x161971)+~P63(x161972,x161971)+P180(x161971)+~P180(x161972)
% 32.24/32.06 [16198]~P180(x161982)+~P63(x161981,x161982)+P180(x161981)+P933(x161982)
% 32.24/32.06 [16199]P611(x161991)+~P63(x161992,x161991)+P306(x161991)+~P306(x161992)
% 32.24/32.06 [16200]~P306(x162002)+~P63(x162001,x162002)+P306(x162001)+P611(x162002)
% 32.24/32.06 [16201]P534(x162011)+~P63(x162012,x162011)+P181(x162011)+~P181(x162012)
% 32.24/32.06 [16202]~P181(x162022)+~P63(x162021,x162022)+P181(x162021)+P534(x162022)
% 32.24/32.06 [16203]P495(x162031)+~P63(x162032,x162031)+P319(x162031)+~P319(x162032)
% 32.24/32.06 [16204]~P319(x162042)+~P63(x162041,x162042)+P319(x162041)+P495(x162042)
% 32.24/32.06 [16205]P2436(x162051)+~P63(x162052,x162051)+P2407(x162051)+~P2407(x162052)
% 32.24/32.06 [16206]~P2407(x162062)+~P63(x162061,x162062)+P2407(x162061)+P2436(x162062)
% 32.24/32.06 [16207]P2426(x162071)+~P63(x162072,x162071)+P2181(x162071)+~P2181(x162072)
% 32.24/32.06 [16208]~P2181(x162082)+~P63(x162081,x162082)+P2181(x162081)+P2426(x162082)
% 32.24/32.06 [16209]P852(x162091)+~P63(x162092,x162091)+P315(x162091)+~P315(x162092)
% 32.24/32.06 [16210]~P315(x162102)+~P63(x162101,x162102)+P315(x162101)+P852(x162102)
% 32.24/32.06 [16236]~P129(x162361)+~P1514(x162362,x162361)+P6(x162361)+~P1507(x162362)
% 32.24/32.06 [16237]~P129(x162371)+~P1513(x162372,x162371)+P9(x162371)+~P1479(x162372)
% 32.24/32.06 [16238]~P129(x162381)+~P1511(x162382,x162381)+P11(x162381)+~P1505(x162382)
% 32.24/32.06 [16239]~P129(x162391)+~P1512(x162392,x162391)+P12(x162391)+~P1475(x162392)
% 32.24/32.06 [16240]~P129(x162401)+~P1511(x162402,x162401)+P13(x162401)+~P1491(x162402)
% 32.24/32.06 [16241]~P129(x162411)+~P1510(x162412,x162411)+P14(x162411)+~P1479(x162412)
% 32.24/32.06 [16242]~P129(x162421)+~P1324(x162422,x162421)+P42(x162421)+~P1334(x162422)
% 32.24/32.06 [16243]~P2141(x162431)+~P1523(x162431)+P2143(x162431)+~P63(x162432,x162431)
% 32.24/32.06 [16244]~P2126(x162441)+~P328(x162441)+P2129(x162441)+~P63(x162442,x162441)
% 32.24/32.06 [16245]~P2098(x162451)+~P2078(x162451)+P2102(x162451)+~P63(x162452,x162451)
% 32.24/32.06 [16246]~P2078(x162461)+~P2094(x162461)+P2096(x162461)+~P63(x162462,x162461)
% 32.24/32.06 [16247]~P2078(x162471)+~P2087(x162471)+P2084(x162471)+~P63(x162472,x162471)
% 32.24/32.06 [16248]~P2050(x162481)+~P2053(x162481)+P2054(x162481)+~P63(x162482,x162481)
% 32.24/32.06 [16249]~P115(x162491)+~P1710(x162492,x162491)+P37(x162491)+~P2444(x162492)
% 32.24/32.06 [16250]~P115(x162501)+~P1659(x162502,x162501)+P37(x162501)+~P2444(x162502)
% 32.24/32.06 [16251]~P115(x162511)+~P1646(x162512,x162511)+P37(x162511)+~P2444(x162512)
% 32.24/32.06 [16252]~P328(x162521)+~P1988(x162521)+P1989(x162521)+~P63(x162522,x162521)
% 32.24/32.06 [16253]~P1950(x162531)+~P1954(x162531)+P1951(x162531)+~P63(x162532,x162531)
% 32.24/32.06 [16254]~P1949(x162541)+~P1948(x162541)+P1950(x162541)+~P63(x162542,x162541)
% 32.24/32.06 [16255]~P328(x162551)+~P1914(x162551)+P1916(x162551)+~P63(x162552,x162551)
% 32.24/32.06 [16256]~P1894(x162561)+~P2451(x162561)+P1896(x162561)+~P63(x162562,x162561)
% 32.24/32.06 [16257]~P137(x162571)+~P1869(x162572,x162571)+P46(x162571)+~P1861(x162572)
% 32.24/32.06 [16258]~P137(x162581)+~P241(x162582,x162581)+P46(x162581)+~P233(x162582)
% 32.24/32.06 [16259]~P1773(x162591)+~P1776(x162591)+P1771(x162591)+~P63(x162592,x162591)
% 32.24/32.06 [16260]~P1772(x162601)+~P1770(x162601)+P1773(x162601)+~P63(x162602,x162601)
% 32.24/32.06 [16261]~P1763(x162611)+~P866(x162611)+P1766(x162611)+~P63(x162612,x162611)
% 32.24/32.06 [16262]~P1544(x162621)+~P1729(x162621)+P1730(x162621)+~P63(x162622,x162621)
% 32.24/32.06 [16263]~P115(x162631)+~P1713(x162632,x162631)+P43(x162631)+~P1712(x162632)
% 32.24/32.06 [16264]~P115(x162641)+~P1652(x162642,x162641)+P43(x162641)+~P1650(x162642)
% 32.24/32.06 [16265]~P115(x162651)+~P1645(x162652,x162651)+P43(x162651)+~P981(x162652)
% 32.24/32.06 [16266]~P1602(x162661)+~P1605(x162661)+P1603(x162661)+~P63(x162662,x162661)
% 32.24/32.06 [16267]~P1544(x162671)+~P1601(x162671)+P1602(x162671)+~P63(x162672,x162671)
% 32.24/32.06 [16268]~P1526(x162681)+~P1530(x162681)+P1527(x162681)+~P63(x162682,x162681)
% 32.24/32.06 [16269]~P1544(x162691)+~P1525(x162691)+P1526(x162691)+~P63(x162692,x162691)
% 32.24/32.06 [16270]~P1516(x162701)+~P1474(x162701)+P1519(x162701)+~P63(x162702,x162701)
% 32.24/32.06 [16271]~P1458(x162711)+~P815(x162711)+P1459(x162711)+~P63(x162712,x162711)
% 32.24/32.06 [16272]~P970(x162721)+~P973(x162721)+P968(x162721)+~P63(x162722,x162721)
% 32.24/32.06 [16273]~P969(x162731)+~P964(x162731)+P970(x162731)+~P63(x162732,x162731)
% 32.24/32.06 [16274]~P866(x162741)+~P960(x162741)+P961(x162741)+~P63(x162742,x162741)
% 32.24/32.06 [16275]~P866(x162751)+~P934(x162751)+P935(x162751)+~P63(x162752,x162751)
% 32.24/32.06 [16276]~P866(x162761)+~P871(x162761)+P874(x162761)+~P63(x162762,x162761)
% 32.24/32.06 [16277]~P803(x162771)+~P805(x162771)+P800(x162771)+~P63(x162772,x162771)
% 32.24/32.06 [16278]~P1544(x162781)+~P802(x162781)+P803(x162781)+~P63(x162782,x162781)
% 32.24/32.06 [16279]~P2451(x162791)+~P794(x162791)+P795(x162791)+~P63(x162792,x162791)
% 32.24/32.06 [16280]~P328(x162801)+~P756(x162801)+P758(x162801)+~P63(x162802,x162801)
% 32.24/32.06 [16281]~P731(x162811)+~P2555(x162811)+P733(x162811)+~P63(x162812,x162811)
% 32.24/32.06 [16282]~P328(x162821)+~P708(x162821)+P710(x162821)+~P63(x162822,x162821)
% 32.24/32.06 [16283]~P328(x162831)+~P687(x162831)+P684(x162831)+~P63(x162832,x162831)
% 32.24/32.06 [16284]~P612(x162841)+~P532(x162841)+P613(x162841)+~P63(x162842,x162841)
% 32.24/32.06 [16285]~P532(x162851)+~P565(x162851)+P566(x162851)+~P63(x162852,x162851)
% 32.24/32.06 [16286]~P532(x162861)+~P537(x162861)+P538(x162861)+~P63(x162862,x162861)
% 32.24/32.06 [16287]~P511(x162871)+~P513(x162871)+P512(x162871)+~P63(x162872,x162871)
% 32.24/32.06 [16288]~P504(x162881)+~P425(x162881)+P511(x162881)+~P63(x162882,x162881)
% 32.24/32.06 [16289]~P425(x162891)+~P496(x162891)+P497(x162891)+~P63(x162892,x162891)
% 32.24/32.06 [16290]~P425(x162901)+~P483(x162901)+P485(x162901)+~P63(x162902,x162901)
% 32.24/32.06 [16291]~P425(x162911)+~P474(x162911)+P475(x162911)+~P63(x162912,x162911)
% 32.24/32.06 [16292]~P425(x162921)+~P463(x162921)+P461(x162921)+~P63(x162922,x162921)
% 32.24/32.06 [16293]~P425(x162931)+~P445(x162931)+P447(x162931)+~P63(x162932,x162931)
% 32.24/32.06 [16294]~P328(x162941)+~P388(x162941)+P390(x162941)+~P63(x162942,x162941)
% 32.24/32.06 [16295]~P328(x162951)+~P374(x162951)+P376(x162951)+~P63(x162952,x162951)
% 32.24/32.06 [16296]~P328(x162961)+~P360(x162961)+P361(x162961)+~P63(x162962,x162961)
% 32.24/32.06 [16297]~P328(x162971)+~P352(x162971)+P354(x162971)+~P63(x162972,x162971)
% 32.24/32.06 [16298]~P328(x162981)+~P348(x162981)+P346(x162981)+~P63(x162982,x162981)
% 32.24/32.06 [16299]~P328(x162991)+~P341(x162991)+P343(x162991)+~P63(x162992,x162991)
% 32.24/32.06 [16300]~P328(x163001)+~P332(x163001)+P334(x163001)+~P63(x163002,x163001)
% 32.24/32.06 [16301]~P2555(x163011)+~P266(x163011)+P267(x163011)+~P63(x163012,x163011)
% 32.24/32.06 [16302]~P167(x163021)+~P169(x163021)+P164(x163021)+~P63(x163022,x163021)
% 32.24/32.06 [16303]~P2555(x163031)+~P166(x163031)+P167(x163031)+~P63(x163032,x163031)
% 32.24/32.06 [16304]~P2601(x163041)+~P162(x163041)+P2602(x163041)+~P63(x163042,x163041)
% 32.24/32.06 [16305]~P2555(x163051)+~P2600(x163051)+P2601(x163051)+~P63(x163052,x163051)
% 32.24/32.06 [16306]~P2555(x163061)+~P2594(x163061)+P2595(x163061)+~P63(x163062,x163061)
% 32.24/32.06 [16307]~P2513(x163071)+~P2515(x163071)+P2514(x163071)+~P63(x163072,x163071)
% 32.24/32.06 [16308]~P2451(x163081)+~P2512(x163081)+P2513(x163081)+~P63(x163082,x163081)
% 32.24/32.06 [16309]~P2507(x163091)+~P2510(x163091)+P2508(x163091)+~P63(x163092,x163091)
% 32.24/32.06 [16310]~P2451(x163101)+~P2506(x163101)+P2507(x163101)+~P63(x163102,x163101)
% 32.24/32.06 [16311]~P2451(x163111)+~P2498(x163111)+P2499(x163111)+~P63(x163112,x163111)
% 32.24/32.06 [16312]~P2437(x163121)+~P2435(x163121)+P2438(x163121)+~P63(x163122,x163121)
% 32.24/32.06 [16313]~P2427(x163131)+~P2421(x163131)+P2428(x163131)+~P63(x163132,x163131)
% 32.24/32.06 [16314]~P2398(x163141)+~P2268(x163141)+P2399(x163141)+~P63(x163142,x163141)
% 32.24/32.06 [16315]~P2383(x163151)+~P2369(x163151)+P2385(x163151)+~P63(x163152,x163151)
% 32.24/32.06 [16316]~P137(x163161)+~P2354(x163162,x163161)+P44(x163161)+~P2346(x163162)
% 32.24/32.06 [16317]~P137(x163171)+~P2243(x163172,x163171)+P44(x163171)+~P2235(x163172)
% 32.24/32.06 [16318]~P2268(x163181)+~P2293(x163181)+P2294(x163181)+~P63(x163182,x163181)
% 32.24/32.06 [16319]~P2273(x163191)+~P2269(x163191)+P2275(x163191)+~P63(x163192,x163191)
% 32.24/32.06 [16320]~P1523(x163201)+~P1592(x163201)+P1589(x163201)+~P63(x163202,x163201)
% 32.24/32.06 [16321]~P815(x163211)+~P872(x163211)+P867(x163211)+~P63(x163212,x163211)
% 32.24/32.06 [16333]~P12(x163332)+~P129(x163332)+P520(x163331,x163332)+P321(x163331,a39)
% 32.24/32.06 [16707]~P129(x167071)+~P520(x167072,x167071)+P12(x167071)+P321(x167072,a39)
% 32.24/32.06 [16709]~P113(x167092)+~P912(x167091,x167092)+P2074(x167091)+P2144(x167091,x167092)
% 32.24/32.06 [16710]~P113(x167102)+~P2144(x167101,x167102)+P2074(x167101)+P912(x167101,x167102)
% 32.24/32.06 [16711]~P113(x167112)+~P912(x167111,x167112)+P1036(x167111)+P2478(x167111,x167112)
% 32.24/32.06 [16712]~P113(x167122)+~P2478(x167121,x167122)+P1036(x167121)+P912(x167121,x167122)
% 32.24/32.06 [16713]~P113(x167132)+~P2132(x167131,x167132)+P2125(x167131)+P2131(x167131,x167132)
% 32.24/32.06 [16714]~P113(x167142)+~P2131(x167141,x167142)+P2125(x167141)+P2132(x167141,x167142)
% 32.24/32.06 [16715]~P129(x167152)+~P2088(x167151,x167152)+P2077(x167151)+P2408(x167151,x167152)
% 32.24/32.06 [16716]~P129(x167162)+~P2408(x167161,x167162)+P2077(x167161)+P2088(x167161,x167162)
% 32.24/32.06 [16717]~P129(x167172)+~P2070(x167171,x167172)+P2063(x167171)+P2064(x167171,x167172)
% 32.24/32.06 [16718]~P129(x167182)+~P2064(x167181,x167182)+P2063(x167181)+P2070(x167181,x167182)
% 32.24/32.06 [16719]~P115(x167192)+~P2004(x167191,x167192)+P2038(x167191)+P2057(x167191,x167192)
% 32.24/32.06 [16720]~P115(x167202)+~P2057(x167201,x167202)+P2038(x167201)+P2004(x167201,x167202)
% 32.24/32.06 [16721]~P115(x167212)+~P2046(x167211,x167212)+P2041(x167211)+P2044(x167211,x167212)
% 32.24/32.06 [16722]~P115(x167222)+~P2044(x167221,x167222)+P2041(x167221)+P2046(x167221,x167222)
% 32.24/32.06 [16723]~P113(x167232)+~P1961(x167231,x167232)+P1925(x167231)+P1960(x167231,x167232)
% 32.24/32.06 [16724]~P113(x167242)+~P1960(x167241,x167242)+P1925(x167241)+P1961(x167241,x167242)
% 32.24/32.06 [16725]~P113(x167252)+~P2517(x167251,x167252)+P1906(x167251)+P1961(x167251,x167252)
% 32.24/32.06 [16726]~P113(x167262)+~P1961(x167261,x167262)+P1906(x167261)+P2517(x167261,x167262)
% 32.24/32.06 [16727]~P137(x167272)+~P1823(x167271,x167272)+P1831(x167271)+P1897(x167271,x167272)
% 32.24/32.06 [16728]~P137(x167282)+~P1897(x167281,x167282)+P1831(x167281)+P1823(x167281,x167282)
% 32.24/32.06 [16729]~P129(x167292)+~P2522(x167291,x167292)+P2521(x167291)+P2511(x167291,x167292)
% 32.24/32.06 [16730]~P129(x167302)+~P2511(x167301,x167302)+P2521(x167301)+P2522(x167301,x167302)
% 32.24/32.06 [16731]~P129(x167312)+~P2481(x167311,x167312)+P2461(x167311)+P2018(x167311,x167312)
% 32.24/32.06 [16732]~P129(x167322)+~P2018(x167321,x167322)+P2461(x167321)+P2481(x167321,x167322)
% 32.24/32.06 [16733]~P137(x167332)+~P1872(x167331,x167332)+P1861(x167331)+P1869(x167331,x167332)
% 32.24/32.06 [16734]~P137(x167342)+~P1869(x167341,x167342)+P1861(x167341)+P1872(x167341,x167342)
% 32.24/32.06 [16735]~P130(x167352)+~P1828(x167351,x167352)+P1818(x167351)+P1824(x167351,x167352)
% 32.24/32.06 [16736]~P130(x167362)+~P1824(x167361,x167362)+P1818(x167361)+P1828(x167361,x167362)
% 32.24/32.06 [16737]~P115(x167372)+~P1011(x167371,x167372)+P1728(x167371)+P1731(x167371,x167372)
% 32.24/32.06 [16738]~P115(x167382)+~P1731(x167381,x167382)+P1728(x167381)+P1011(x167381,x167382)
% 32.24/32.06 [16739]~P115(x167392)+~P1711(x167391,x167392)+P2444(x167391)+P1710(x167391,x167392)
% 32.24/32.06 [16740]~P115(x167402)+~P1660(x167401,x167402)+P2444(x167401)+P1659(x167401,x167402)
% 32.24/32.06 [16741]~P115(x167412)+~P1710(x167411,x167412)+P2444(x167411)+P1711(x167411,x167412)
% 32.24/32.06 [16742]~P115(x167422)+~P1659(x167421,x167422)+P2444(x167421)+P1660(x167421,x167422)
% 32.24/32.06 [16743]~P115(x167432)+~P1645(x167431,x167432)+P2444(x167431)+P1646(x167431,x167432)
% 32.24/32.06 [16744]~P115(x167442)+~P1646(x167441,x167442)+P2444(x167441)+P1645(x167441,x167442)
% 32.24/32.06 [16745]~P115(x167452)+~P1713(x167451,x167452)+P1704(x167451)+P1711(x167451,x167452)
% 32.24/32.06 [16746]~P115(x167462)+~P1711(x167461,x167462)+P1704(x167461)+P1713(x167461,x167462)
% 32.24/32.06 [16747]~P115(x167472)+~P1662(x167471,x167472)+P1654(x167471)+P1660(x167471,x167472)
% 32.24/32.06 [16748]~P115(x167482)+~P1660(x167481,x167482)+P1654(x167481)+P1662(x167481,x167482)
% 32.24/32.06 [16749]~P115(x167492)+~P1652(x167491,x167492)+P1641(x167491)+P1649(x167491,x167492)
% 32.24/32.06 [16750]~P115(x167502)+~P1649(x167501,x167502)+P1641(x167501)+P1652(x167501,x167502)
% 32.24/32.06 [16751]~P115(x167512)+~P1646(x167511,x167512)+P1008(x167511)+P1648(x167511,x167512)
% 32.24/32.06 [16752]~P115(x167522)+~P1648(x167521,x167522)+P1008(x167521)+P1646(x167521,x167522)
% 32.24/32.06 [16753]~P137(x167532)+~P1623(x167531,x167532)+P1607(x167531)+P1622(x167531,x167532)
% 32.24/32.06 [16754]~P137(x167542)+~P1622(x167541,x167542)+P1607(x167541)+P1623(x167541,x167542)
% 32.24/32.06 [16755]~P137(x167552)+~P1621(x167551,x167552)+P1585(x167551)+P1623(x167551,x167552)
% 32.24/32.06 [16756]~P137(x167562)+~P1623(x167561,x167562)+P1585(x167561)+P1621(x167561,x167562)
% 32.24/32.06 [16757]~P137(x167572)+~P1549(x167571,x167572)+P1534(x167571)+P1548(x167571,x167572)
% 32.24/32.06 [16758]~P137(x167582)+~P1548(x167581,x167582)+P1534(x167581)+P1549(x167581,x167582)
% 32.24/32.06 [16759]~P137(x167592)+~P1571(x167591,x167592)+P1533(x167591)+P1549(x167591,x167592)
% 32.24/32.06 [16760]~P137(x167602)+~P1549(x167601,x167602)+P1533(x167601)+P1571(x167601,x167602)
% 32.24/32.06 [16761]~P129(x167612)+~P1476(x167611,x167612)+P1412(x167611)+P1521(x167611,x167612)
% 32.24/32.06 [16762]~P129(x167622)+~P1521(x167621,x167622)+P1412(x167621)+P1476(x167621,x167622)
% 32.24/32.06 [16763]~P129(x167632)+~P1483(x167631,x167632)+P1475(x167631)+P1512(x167631,x167632)
% 32.24/32.06 [16764]~P129(x167642)+~P1512(x167641,x167642)+P1475(x167641)+P1483(x167641,x167642)
% 32.24/32.06 [16765]~P139(x167652)+~P876(x167651,x167652)+P864(x167651)+P853(x167651,x167652)
% 32.24/32.06 [16766]~P139(x167662)+~P853(x167661,x167662)+P864(x167661)+P876(x167661,x167662)
% 32.24/32.06 [16767]~P129(x167672)+~P2522(x167671,x167672)+P2472(x167671)+P796(x167671,x167672)
% 32.24/32.06 [16768]~P129(x167682)+~P796(x167681,x167682)+P2472(x167681)+P2522(x167681,x167682)
% 32.24/32.06 [16769]~P129(x167692)+~P2481(x167691,x167692)+P2472(x167691)+P2501(x167691,x167692)
% 32.24/32.06 [16770]~P129(x167702)+~P2501(x167701,x167702)+P2472(x167701)+P2481(x167701,x167702)
% 32.24/32.06 [16771]~P129(x167712)+~P776(x167711,x167712)+P774(x167711)+P775(x167711,x167712)
% 32.24/32.06 [16772]~P129(x167722)+~P775(x167721,x167722)+P774(x167721)+P776(x167721,x167722)
% 32.24/32.06 [16773]~P129(x167732)+~P174(x167731,x167732)+P2569(x167731)+P734(x167731,x167732)
% 32.24/32.06 [16774]~P129(x167742)+~P734(x167741,x167742)+P2569(x167741)+P174(x167741,x167742)
% 32.24/32.06 [16775]~P129(x167752)+~P2577(x167751,x167752)+P2569(x167751)+P2597(x167751,x167752)
% 32.24/32.06 [16776]~P129(x167762)+~P2597(x167761,x167762)+P2569(x167761)+P2577(x167761,x167762)
% 32.24/32.06 [16777]~P129(x167772)+~P174(x167771,x167772)+P173(x167771)+P165(x167771,x167772)
% 32.24/32.06 [16778]~P129(x167782)+~P165(x167781,x167782)+P173(x167781)+P174(x167781,x167782)
% 32.24/32.06 [16779]~P129(x167792)+~P715(x167791,x167792)+P713(x167791)+P714(x167791,x167792)
% 32.24/32.06 [16780]~P129(x167802)+~P714(x167801,x167802)+P713(x167801)+P715(x167801,x167802)
% 32.24/32.06 [16781]~P129(x167812)+~P313(x167811,x167812)+P529(x167811)+P568(x167811,x167812)
% 32.24/32.06 [16782]~P129(x167822)+~P568(x167821,x167822)+P529(x167821)+P313(x167821,x167822)
% 32.24/32.06 [16783]~P129(x167832)+~P520(x167831,x167832)+P478(x167831)+P519(x167831,x167832)
% 32.24/32.06 [16784]~P129(x167842)+~P519(x167841,x167842)+P478(x167841)+P520(x167841,x167842)
% 32.24/32.06 [16785]~P137(x167852)+~P191(x167851,x167852)+P203(x167851)+P269(x167851,x167852)
% 32.24/32.06 [16786]~P137(x167862)+~P269(x167861,x167862)+P203(x167861)+P191(x167861,x167862)
% 32.24/32.06 [16787]~P129(x167872)+~P2577(x167871,x167872)+P2556(x167871)+P2016(x167871,x167872)
% 32.24/32.06 [16788]~P129(x167882)+~P2016(x167881,x167882)+P2556(x167881)+P2577(x167881,x167882)
% 32.24/32.06 [16789]~P137(x167892)+~P245(x167891,x167892)+P233(x167891)+P241(x167891,x167892)
% 32.24/32.06 [16790]~P137(x167902)+~P241(x167901,x167902)+P233(x167901)+P245(x167901,x167902)
% 32.24/32.06 [16791]~P130(x167912)+~P197(x167911,x167912)+P186(x167911)+P192(x167911,x167912)
% 32.24/32.06 [16792]~P130(x167922)+~P192(x167921,x167922)+P186(x167921)+P197(x167921,x167922)
% 32.24/32.06 [16793]~P129(x167932)+~P2578(x167931,x167932)+P2575(x167931)+P2576(x167931,x167932)
% 32.24/32.06 [16794]~P129(x167942)+~P2576(x167941,x167942)+P2575(x167941)+P2578(x167941,x167942)
% 32.24/32.06 [16795]~P129(x167952)+~P2482(x167951,x167952)+P2479(x167951)+P2480(x167951,x167952)
% 32.24/32.06 [16796]~P129(x167962)+~P2480(x167961,x167962)+P2479(x167961)+P2482(x167961,x167962)
% 32.24/32.06 [16797]~P137(x167972)+~P2043(x167971,x167972)+P2382(x167971)+P2387(x167971,x167972)
% 32.24/32.06 [16798]~P137(x167982)+~P2387(x167981,x167982)+P2382(x167981)+P2043(x167981,x167982)
% 32.24/32.06 [16799]~P137(x167992)+~P2357(x167991,x167992)+P2346(x167991)+P2354(x167991,x167992)
% 32.24/32.06 [16800]~P137(x168002)+~P2354(x168001,x168002)+P2346(x168001)+P2357(x168001,x168002)
% 32.24/32.06 [16801]~P130(x168012)+~P2314(x168011,x168012)+P2305(x168011)+P2310(x168011,x168012)
% 32.24/32.06 [16802]~P130(x168022)+~P2310(x168021,x168022)+P2305(x168021)+P2314(x168021,x168022)
% 32.24/32.06 [16803]~P137(x168032)+~P2176(x168031,x168032)+P2205(x168031)+P2277(x168031,x168032)
% 32.24/32.06 [16804]~P137(x168042)+~P2277(x168041,x168042)+P2205(x168041)+P2176(x168041,x168042)
% 32.24/32.06 [16805]~P137(x168052)+~P2246(x168051,x168052)+P2235(x168051)+P2243(x168051,x168052)
% 32.24/32.06 [16806]~P137(x168062)+~P2243(x168061,x168062)+P2235(x168061)+P2246(x168061,x168062)
% 32.24/32.06 [16807]~P130(x168072)+~P2200(x168071,x168072)+P2191(x168071)+P2196(x168071,x168072)
% 32.24/32.06 [16808]~P130(x168082)+~P2196(x168081,x168082)+P2191(x168081)+P2200(x168081,x168082)
% 32.24/32.06 [16809]~P129(x168092)+~P260(x168091,x168092)+P1408(x168091)+P1647(x168091,x168092)
% 32.24/32.06 [16810]~P129(x168102)+~P1647(x168101,x168102)+P1408(x168101)+P260(x168101,x168102)
% 32.24/32.06 [16811]~P129(x168112)+~P1345(x168111,x168112)+P1334(x168111)+P1324(x168111,x168112)
% 32.24/32.06 [16812]~P129(x168122)+~P1324(x168121,x168122)+P1334(x168121)+P1345(x168121,x168122)
% 32.24/32.06 [16813]~P130(x168132)+~P1034(x168131,x168132)+P1025(x168131)+P1018(x168131,x168132)
% 32.24/32.06 [16814]~P130(x168142)+~P1018(x168141,x168142)+P1025(x168141)+P1034(x168141,x168142)
% 32.24/32.06 [16815]~P5(x168152)+~P129(x168152)+P520(x168151,x168152)+~P321(x168151,a39)
% 32.24/32.06 [16823]~P129(x168232)+~P732(x168231)+~P735(x168231,x168232)+P165(x168231,x168232)
% 32.24/32.06 [16824]~P129(x168242)+~P2596(x168241)+~P2598(x168241,x168242)+P2016(x168241,x168242)
% 32.24/32.06 [16825]~P129(x168252)+~P793(x168251)+~P797(x168251,x168252)+P2511(x168251,x168252)
% 32.24/32.06 [16826]~P129(x168262)+~P2500(x168261)+~P2502(x168261,x168262)+P2018(x168261,x168262)
% 32.24/32.06 [16827]~P113(x168272)+~P2142(x168271)+~P2145(x168271,x168272)+P2478(x168271,x168272)
% 32.24/32.06 [16828]~P113(x168282)+~P2142(x168281)+~P2478(x168281,x168282)+P2145(x168281,x168282)
% 32.24/32.06 [16829]~P113(x168292)+~P1036(x168291)+~P2131(x168291,x168292)+P912(x168291,x168292)
% 32.24/32.06 [16830]~P113(x168302)+~P1036(x168301)+~P912(x168301,x168302)+P2131(x168301,x168302)
% 32.24/32.06 [16831]~P2128(x168311)+~P114(x168312)+~P337(x168311,x168312)+P2127(x168311,x168312)
% 32.24/32.06 [16832]~P2128(x168321)+~P114(x168322)+~P2127(x168321,x168322)+P337(x168321,x168322)
% 32.24/32.06 [16833]~P114(x168332)+~P1917(x168331)+~P1915(x168331,x168332)+P337(x168331,x168332)
% 32.24/32.06 [16834]~P114(x168342)+~P759(x168341)+~P757(x168341,x168342)+P337(x168341,x168342)
% 32.24/32.06 [16835]~P114(x168352)+~P711(x168351)+~P709(x168351,x168352)+P337(x168351,x168352)
% 32.24/32.06 [16836]~P114(x168362)+~P391(x168361)+~P389(x168361,x168362)+P337(x168361,x168362)
% 32.24/32.06 [16837]~P114(x168372)+~P377(x168371)+~P375(x168371,x168372)+P337(x168371,x168372)
% 32.24/32.06 [16838]~P114(x168382)+~P357(x168381)+~P356(x168381,x168382)+P337(x168381,x168382)
% 32.24/32.06 [16839]~P114(x168392)+~P355(x168391)+~P353(x168391,x168392)+P337(x168391,x168392)
% 32.24/32.06 [16840]~P114(x168402)+~P347(x168401)+~P345(x168401,x168402)+P337(x168401,x168402)
% 32.24/32.06 [16841]~P114(x168412)+~P344(x168411)+~P342(x168411,x168412)+P337(x168411,x168412)
% 32.24/32.06 [16842]~P114(x168422)+~P335(x168421)+~P333(x168421,x168422)+P337(x168421,x168422)
% 32.24/32.06 [16843]~P129(x168432)+~P2069(x168431)+~P2070(x168431,x168432)+P2321(x168431,x168432)
% 32.24/32.06 [16844]~P2101(x168441)+~P129(x168442)+~P2089(x168441,x168442)+P2099(x168441,x168442)
% 32.24/32.06 [16845]~P2101(x168451)+~P129(x168452)+~P2099(x168451,x168452)+P2089(x168451,x168452)
% 32.24/32.06 [16846]~P129(x168462)+~P2097(x168461)+~P2095(x168461,x168462)+P2089(x168461,x168462)
% 32.24/32.06 [16847]~P129(x168472)+~P2085(x168471)+~P2083(x168471,x168472)+P2089(x168471,x168472)
% 32.24/32.06 [16848]~P129(x168482)+~P2097(x168481)+~P2089(x168481,x168482)+P2095(x168481,x168482)
% 32.24/32.06 [16849]~P129(x168492)+~P2085(x168491)+~P2089(x168491,x168492)+P2083(x168491,x168492)
% 32.24/32.06 [16850]~P129(x168502)+~P2069(x168501)+~P2321(x168501,x168502)+P2070(x168501,x168502)
% 32.24/32.06 [16851]~P129(x168512)+~P2067(x168511)+~P2062(x168511,x168512)+P2070(x168511,x168512)
% 32.24/32.06 [16852]~P129(x168522)+~P2072(x168521)+~P2020(x168521,x168522)+P2070(x168521,x168522)
% 32.24/32.06 [16853]~P129(x168532)+~P2072(x168531)+~P2070(x168531,x168532)+P2020(x168531,x168532)
% 32.24/32.06 [16854]~P129(x168542)+~P2067(x168541)+~P2070(x168541,x168542)+P2062(x168541,x168542)
% 32.24/32.06 [16855]~P2055(x168551)+~P115(x168552)+~P2058(x168551,x168552)+P2003(x168551,x168552)
% 32.24/32.06 [16856]~P2055(x168561)+~P115(x168562)+~P2003(x168561,x168562)+P2058(x168561,x168562)
% 32.24/32.06 [16857]~P115(x168572)+~P2042(x168571)+~P2044(x168571,x168572)+P2004(x168571,x168572)
% 32.24/32.06 [16858]~P115(x168582)+~P2042(x168581)+~P2004(x168581,x168582)+P2044(x168581,x168582)
% 32.24/32.06 [16859]~P113(x168592)+~P1951(x168591)+~P1962(x168591,x168592)+P1905(x168591,x168592)
% 32.24/32.06 [16860]~P113(x168602)+~P1951(x168601)+~P1905(x168601,x168602)+P1962(x168601,x168602)
% 32.24/32.06 [16861]~P113(x168612)+~P1906(x168611)+~P2527(x168611,x168612)+P1961(x168611,x168612)
% 32.24/32.06 [16862]~P113(x168622)+~P1906(x168621)+~P1961(x168621,x168622)+P2527(x168621,x168622)
% 32.24/32.06 [16863]~P114(x168632)+~P1917(x168631)+~P337(x168631,x168632)+P1915(x168631,x168632)
% 32.24/32.06 [16864]~P1895(x168641)+~P137(x168642)+~P1898(x168641,x168642)+P1740(x168641,x168642)
% 32.24/32.06 [16865]~P137(x168652)+~P1822(x168651)+~P1823(x168651,x168652)+P1740(x168651,x168652)
% 32.24/32.06 [16866]~P1895(x168661)+~P137(x168662)+~P1740(x168661,x168662)+P1898(x168661,x168662)
% 32.24/32.06 [16867]~P137(x168672)+~P1822(x168671)+~P1740(x168671,x168672)+P1823(x168671,x168672)
% 32.24/32.06 [16868]~P137(x168682)+~P1820(x168681)+~P1824(x168681,x168682)+P1823(x168681,x168682)
% 32.24/32.06 [16869]~P137(x168692)+~P1868(x168691)+~P1869(x168691,x168692)+P1823(x168691,x168692)
% 32.24/32.06 [16870]~P137(x168702)+~P1868(x168701)+~P1823(x168701,x168702)+P1869(x168701,x168702)
% 32.24/32.06 [16871]~P137(x168712)+~P1820(x168711)+~P1823(x168711,x168712)+P1824(x168711,x168712)
% 32.24/32.06 [16872]~P1765(x168721)+~P139(x168722)+~P877(x168721,x168722)+P1764(x168721,x168722)
% 32.24/32.06 [16873]~P1765(x168731)+~P139(x168732)+~P1764(x168731,x168732)+P877(x168731,x168732)
% 32.24/32.06 [16874]~P139(x168742)+~P875(x168741)+~P873(x168741,x168742)+P877(x168741,x168742)
% 32.24/32.06 [16875]~P115(x168752)+~P1727(x168751)+~P1732(x168751,x168752)+P1009(x168751,x168752)
% 32.24/32.06 [16876]~P115(x168762)+~P1727(x168761)+~P1009(x168761,x168762)+P1732(x168761,x168762)
% 32.24/32.06 [16877]~P115(x168772)+~P1644(x168771)+~P1648(x168771,x168772)+P1011(x168771,x168772)
% 32.24/32.06 [16878]~P115(x168782)+~P1643(x168781)+~P1649(x168781,x168782)+P1011(x168781,x168782)
% 32.24/32.06 [16879]~P115(x168792)+~P1658(x168791)+~P1659(x168791,x168792)+P1011(x168791,x168792)
% 32.24/32.06 [16880]~P115(x168802)+~P1658(x168801)+~P1011(x168801,x168802)+P1659(x168801,x168802)
% 32.24/32.06 [16881]~P115(x168812)+~P1643(x168811)+~P1011(x168811,x168812)+P1649(x168811,x168812)
% 32.24/32.06 [16882]~P115(x168822)+~P1644(x168821)+~P1011(x168821,x168822)+P1648(x168821,x168822)
% 32.24/32.06 [16883]~P137(x168832)+~P1527(x168831)+~P1550(x168831,x168832)+P1033(x168831,x168832)
% 32.24/32.06 [16884]~P137(x168842)+~P1603(x168841)+~P1624(x168841,x168842)+P1591(x168841,x168842)
% 32.24/32.06 [16885]~P137(x168852)+~P1603(x168851)+~P1591(x168851,x168852)+P1624(x168851,x168852)
% 32.24/32.06 [16886]~P137(x168862)+~P1527(x168861)+~P1033(x168861,x168862)+P1550(x168861,x168862)
% 32.24/32.06 [16887]~P137(x168872)+~P1533(x168871)+~P1547(x168871,x168872)+P1549(x168871,x168872)
% 32.24/32.06 [16888]~P137(x168882)+~P1533(x168881)+~P1549(x168881,x168882)+P1547(x168881,x168882)
% 32.24/32.06 [16889]~P129(x168892)+~P1518(x168891)+~P1522(x168891,x168892)+P1517(x168891,x168892)
% 32.24/32.06 [16890]~P129(x168902)+~P1518(x168901)+~P1517(x168901,x168902)+P1522(x168901,x168902)
% 32.24/32.06 [16891]~P129(x168912)+~P1478(x168911)+~P1511(x168911,x168912)+P1484(x168911,x168912)
% 32.24/32.06 [16892]~P129(x168922)+~P1478(x168921)+~P1484(x168921,x168922)+P1511(x168921,x168922)
% 32.24/32.06 [16893]~P129(x168932)+~P1487(x168931)+~P1510(x168931,x168932)+P1511(x168931,x168932)
% 32.24/32.06 [16894]~P129(x168942)+~P1504(x168941)+~P1514(x168941,x168942)+P1511(x168941,x168942)
% 32.24/32.06 [16895]~P129(x168952)+~P1504(x168951)+~P1511(x168951,x168952)+P1514(x168951,x168952)
% 32.24/32.06 [16896]~P129(x168962)+~P1487(x168961)+~P1511(x168961,x168962)+P1510(x168961,x168962)
% 32.24/32.06 [16897]~P139(x168972)+~P875(x168971)+~P877(x168971,x168972)+P873(x168971,x168972)
% 32.24/32.06 [16898]~P129(x168982)+~P793(x168981)+~P2511(x168981,x168982)+P797(x168981,x168982)
% 32.24/32.06 [16899]~P129(x168992)+~P2521(x168991)+~P775(x168991,x168992)+P2522(x168991,x168992)
% 32.24/32.06 [16900]~P129(x169002)+~P2521(x169001)+~P2522(x169001,x169002)+P775(x169001,x169002)
% 32.24/32.06 [16901]~P114(x169012)+~P759(x169011)+~P337(x169011,x169012)+P757(x169011,x169012)
% 32.24/32.06 [16902]~P129(x169022)+~P732(x169021)+~P165(x169021,x169022)+P735(x169021,x169022)
% 32.24/32.06 [16903]~P129(x169032)+~P173(x169031)+~P714(x169031,x169032)+P174(x169031,x169032)
% 32.24/32.06 [16904]~P129(x169042)+~P173(x169041)+~P174(x169041,x169042)+P714(x169041,x169042)
% 32.24/32.06 [16905]~P114(x169052)+~P711(x169051)+~P337(x169051,x169052)+P709(x169051,x169052)
% 32.24/32.06 [16906]~P129(x169062)+~P311(x169061)+~P546(x169061,x169062)+P503(x169061,x169062)
% 32.24/32.06 [16907]~P129(x169072)+~P567(x169071)+~P569(x169071,x169072)+P312(x169071,x169072)
% 32.24/32.06 [16908]~P129(x169082)+~P567(x169081)+~P312(x169081,x169082)+P569(x169081,x169082)
% 32.24/32.06 [16909]~P129(x169092)+~P542(x169091)+~P546(x169091,x169092)+P313(x169091,x169092)
% 32.24/32.06 [16910]~P129(x169102)+~P563(x169101)+~P564(x169101,x169102)+P313(x169101,x169102)
% 32.24/32.06 [16911]~P129(x169112)+~P553(x169111)+~P554(x169111,x169112)+P313(x169111,x169112)
% 32.24/32.06 [16912]~P129(x169122)+~P563(x169121)+~P313(x169121,x169122)+P564(x169121,x169122)
% 32.24/32.06 [16913]~P129(x169132)+~P553(x169131)+~P313(x169131,x169132)+P554(x169131,x169132)
% 32.24/32.06 [16914]~P129(x169142)+~P542(x169141)+~P313(x169141,x169142)+P546(x169141,x169142)
% 32.24/32.06 [16915]~P129(x169152)+~P311(x169151)+~P503(x169151,x169152)+P546(x169151,x169152)
% 32.24/32.06 [16916]~P129(x169162)+~P512(x169161)+~P521(x169161,x169162)+P510(x169161,x169162)
% 32.24/32.06 [16917]~P129(x169172)+~P512(x169171)+~P510(x169171,x169172)+P521(x169171,x169172)
% 32.24/32.06 [16918]~P129(x169182)+~P486(x169181)+~P450(x169181,x169182)+P484(x169181,x169182)
% 32.24/32.06 [16919]~P129(x169192)+~P486(x169191)+~P484(x169191,x169192)+P450(x169191,x169192)
% 32.24/32.06 [16920]~P129(x169202)+~P476(x169201)+~P473(x169201,x169202)+P450(x169201,x169202)
% 32.24/32.06 [16921]~P129(x169212)+~P462(x169211)+~P460(x169211,x169212)+P450(x169211,x169212)
% 32.24/32.06 [16922]~P129(x169222)+~P448(x169221)+~P446(x169221,x169222)+P450(x169221,x169222)
% 32.24/32.06 [16923]~P129(x169232)+~P476(x169231)+~P450(x169231,x169232)+P473(x169231,x169232)
% 32.24/32.06 [16924]~P129(x169242)+~P462(x169241)+~P450(x169241,x169242)+P460(x169241,x169242)
% 32.24/32.06 [16925]~P129(x169252)+~P448(x169251)+~P450(x169251,x169252)+P446(x169251,x169252)
% 32.24/32.06 [16926]~P114(x169262)+~P391(x169261)+~P337(x169261,x169262)+P389(x169261,x169262)
% 32.24/32.06 [16927]~P114(x169272)+~P377(x169271)+~P337(x169271,x169272)+P375(x169271,x169272)
% 32.24/32.06 [16928]~P114(x169282)+~P357(x169281)+~P337(x169281,x169282)+P356(x169281,x169282)
% 32.24/32.06 [16929]~P114(x169292)+~P355(x169291)+~P337(x169291,x169292)+P353(x169291,x169292)
% 32.24/32.06 [16930]~P114(x169302)+~P347(x169301)+~P337(x169301,x169302)+P345(x169301,x169302)
% 32.24/32.06 [16931]~P114(x169312)+~P344(x169311)+~P337(x169311,x169312)+P342(x169311,x169312)
% 32.24/32.06 [16932]~P114(x169322)+~P335(x169321)+~P337(x169321,x169322)+P333(x169321,x169322)
% 32.24/32.06 [16933]~P137(x169332)+~P268(x169331)+~P270(x169331,x169332)+P170(x169331,x169332)
% 32.24/32.06 [16934]~P137(x169342)+~P190(x169341)+~P191(x169341,x169342)+P170(x169341,x169342)
% 32.24/32.06 [16935]~P137(x169352)+~P268(x169351)+~P170(x169351,x169352)+P270(x169351,x169352)
% 32.24/32.06 [16936]~P137(x169362)+~P190(x169361)+~P170(x169361,x169362)+P191(x169361,x169362)
% 32.24/32.06 [16937]~P137(x169372)+~P188(x169371)+~P192(x169371,x169372)+P191(x169371,x169372)
% 32.24/32.06 [16938]~P137(x169382)+~P240(x169381)+~P241(x169381,x169382)+P191(x169381,x169382)
% 32.24/32.06 [16939]~P137(x169392)+~P240(x169391)+~P191(x169391,x169392)+P241(x169391,x169392)
% 32.24/32.06 [16940]~P137(x169402)+~P188(x169401)+~P191(x169401,x169402)+P192(x169401,x169402)
% 32.24/32.06 [16941]~P129(x169412)+~P2596(x169411)+~P2016(x169411,x169412)+P2598(x169411,x169412)
% 32.24/32.06 [16942]~P129(x169422)+~P2556(x169421)+~P2576(x169421,x169422)+P2577(x169421,x169422)
% 32.24/32.06 [16943]~P129(x169432)+~P2556(x169431)+~P2577(x169431,x169432)+P2576(x169431,x169432)
% 32.24/32.06 [16944]~P129(x169442)+~P2500(x169441)+~P2018(x169441,x169442)+P2502(x169441,x169442)
% 32.24/32.06 [16945]~P129(x169452)+~P2461(x169451)+~P2480(x169451,x169452)+P2481(x169451,x169452)
% 32.24/32.06 [16946]~P129(x169462)+~P2461(x169461)+~P2481(x169461,x169462)+P2480(x169461,x169462)
% 32.24/32.06 [16947]~P137(x169472)+~P2384(x169471)+~P2388(x169471,x169472)+P2013(x169471,x169472)
% 32.24/32.06 [16948]~P137(x169482)+~P2309(x169481)+~P2043(x169481,x169482)+P2013(x169481,x169482)
% 32.24/32.06 [16949]~P137(x169492)+~P2384(x169491)+~P2013(x169491,x169492)+P2388(x169491,x169492)
% 32.24/32.06 [16950]~P137(x169502)+~P2309(x169501)+~P2013(x169501,x169502)+P2043(x169501,x169502)
% 32.24/32.06 [16951]~P137(x169512)+~P2307(x169511)+~P2310(x169511,x169512)+P2043(x169511,x169512)
% 32.24/32.06 [16952]~P137(x169522)+~P2353(x169521)+~P2354(x169521,x169522)+P2043(x169521,x169522)
% 32.24/32.06 [16953]~P137(x169532)+~P2353(x169531)+~P2043(x169531,x169532)+P2354(x169531,x169532)
% 32.24/32.06 [16954]~P137(x169542)+~P2307(x169541)+~P2043(x169541,x169542)+P2310(x169541,x169542)
% 32.24/32.06 [16955]~P137(x169552)+~P2274(x169551)+~P2278(x169551,x169552)+P2174(x169551,x169552)
% 32.24/32.06 [16956]~P137(x169562)+~P2195(x169561)+~P2176(x169561,x169562)+P2174(x169561,x169562)
% 32.24/32.06 [16957]~P137(x169572)+~P2274(x169571)+~P2174(x169571,x169572)+P2278(x169571,x169572)
% 32.24/32.06 [16958]~P137(x169582)+~P2195(x169581)+~P2174(x169581,x169582)+P2176(x169581,x169582)
% 32.24/32.06 [16959]~P137(x169592)+~P2193(x169591)+~P2196(x169591,x169592)+P2176(x169591,x169592)
% 32.24/32.06 [16960]~P137(x169602)+~P2242(x169601)+~P2243(x169601,x169602)+P2176(x169601,x169602)
% 32.24/32.06 [16961]~P137(x169612)+~P2242(x169611)+~P2176(x169611,x169612)+P2243(x169611,x169612)
% 32.24/32.06 [16962]~P137(x169622)+~P2193(x169621)+~P2176(x169621,x169622)+P2196(x169621,x169622)
% 32.24/32.06 [16963]~P129(x169632)+~P1574(x169631)+~P1666(x169631,x169632)+P244(x169631,x169632)
% 32.24/32.06 [16964]~P129(x169642)+~P979(x169641)+~P260(x169641,x169642)+P244(x169641,x169642)
% 32.24/32.06 [16965]~P129(x169652)+~P1574(x169651)+~P244(x169651,x169652)+P1666(x169651,x169652)
% 32.24/32.06 [16966]~P129(x169662)+~P979(x169661)+~P244(x169661,x169662)+P260(x169661,x169662)
% 32.24/32.06 [16967]~P129(x169672)+~P1004(x169671)+~P1018(x169671,x169672)+P260(x169671,x169672)
% 32.24/32.06 [16968]~P129(x169682)+~P1301(x169681)+~P1324(x169681,x169682)+P260(x169681,x169682)
% 32.24/32.06 [16969]~P129(x169692)+~P1301(x169691)+~P260(x169691,x169692)+P1324(x169691,x169692)
% 32.24/32.06 [16970]~P129(x169702)+~P1004(x169701)+~P260(x169701,x169702)+P1018(x169701,x169702)
% 32.24/32.06 [17337]~P129(x173371)+P5(x173371)+~P520(x173372,x173371)+~P321(x173372,a39)
% 32.24/32.06 [17599]P2541(x175991,x175992)+~P113(x175992)+~P2537(x175991,x175992)+P2531(x175991,x175992)
% 32.24/32.06 [17600]P2527(x176001,x176002)+~P115(x176002)+~P2539(x176001,x176002)+P2567(x176001,x176002)
% 32.24/32.06 [17601]P2517(x176011,x176012)+~P115(x176012)+~P2530(x176011,x176012)+P2584(x176011,x176012)
% 32.24/32.06 [17602]P1436(x176021,x176022)+~P119(x176022)+~P1362(x176021,x176022)+P1364(x176021,x176022)
% 32.24/32.06 [17603]P1433(x176031,x176032)+~P119(x176032)+~P1363(x176031,x176032)+P1365(x176031,x176032)
% 32.24/32.06 [17604]P1425(x176041,x176042)+~P119(x176042)+~P1370(x176041,x176042)+P1372(x176041,x176042)
% 32.24/32.06 [17605]P1407(x176051,x176052)+~P119(x176052)+~P1371(x176051,x176052)+P1373(x176051,x176052)
% 32.24/32.06 [17606]P1253(x176061,x176062)+~P132(x176062)+~P1148(x176061,x176062)+P1149(x176061,x176062)
% 32.24/32.06 [17607]P1305(x176071,x176072)+~P126(x176072)+~P1259(x176071,x176072)+P1262(x176071,x176072)
% 32.24/32.06 [17608]P1330(x176081,x176082)+~P120(x176082)+~P1311(x176081,x176082)+P1312(x176081,x176082)
% 32.24/32.06 [17609]P1342(x176091,x176092)+~P117(x176092)+~P1335(x176091,x176092)+P1337(x176091,x176092)
% 32.24/32.06 [17610]P1348(x176101,x176102)+~P146(x176102)+~P1347(x176101,x176102)+P1346(x176101,x176102)
% 32.24/32.06 [17611]P1339(x176111,x176112)+~P117(x176112)+~P1338(x176111,x176112)+P1336(x176111,x176112)
% 32.24/32.06 [17612]P1320(x176121,x176122)+~P120(x176122)+~P1313(x176121,x176122)+P1314(x176121,x176122)
% 32.24/32.06 [17613]P1326(x176131,x176132)+~P118(x176132)+~P1325(x176131,x176132)+P1323(x176131,x176132)
% 32.24/32.06 [17614]P1317(x176141,x176142)+~P120(x176142)+~P1316(x176141,x176142)+P1315(x176141,x176142)
% 32.24/32.06 [17615]P1282(x176151,x176152)+~P126(x176152)+~P1263(x176151,x176152)+P1264(x176151,x176152)
% 32.24/32.06 [17616]P1294(x176161,x176162)+~P121(x176162)+~P1288(x176161,x176162)+P1289(x176161,x176162)
% 32.24/32.06 [17617]P1299(x176171,x176172)+~P122(x176172)+~P1298(x176171,x176172)+P1297(x176171,x176172)
% 32.24/32.06 [17618]P1291(x176181,x176182)+~P121(x176182)+~P1290(x176181,x176182)+P1287(x176181,x176182)
% 32.24/32.06 [17619]P1272(x176191,x176192)+~P126(x176192)+~P1265(x176191,x176192)+P1266(x176191,x176192)
% 32.24/32.06 [17620]P1277(x176201,x176202)+~P123(x176202)+~P1276(x176201,x176202)+P1275(x176201,x176202)
% 32.24/32.06 [17621]P1268(x176211,x176212)+~P126(x176212)+~P1267(x176211,x176212)+P1261(x176211,x176212)
% 32.24/32.06 [17622]P1202(x176221,x176222)+~P132(x176222)+~P1150(x176221,x176222)+P1151(x176221,x176222)
% 32.24/32.06 [17623]P1228(x176231,x176232)+~P130(x176232)+~P1209(x176231,x176232)+P1210(x176231,x176232)
% 32.24/32.06 [17624]P1240(x176241,x176242)+~P124(x176242)+~P1234(x176241,x176242)+P1235(x176241,x176242)
% 32.24/32.06 [17625]P1245(x176251,x176252)+~P125(x176252)+~P1244(x176251,x176252)+P1243(x176251,x176252)
% 32.24/32.06 [17626]P1237(x176261,x176262)+~P124(x176262)+~P1236(x176261,x176262)+P1233(x176261,x176262)
% 32.24/32.06 [17627]P1218(x176271,x176272)+~P130(x176272)+~P1211(x176271,x176272)+P1212(x176271,x176272)
% 32.24/32.06 [17628]P1223(x176281,x176282)+~P128(x176282)+~P1222(x176281,x176282)+P1221(x176281,x176282)
% 32.24/32.06 [17629]P1214(x176291,x176292)+~P130(x176292)+~P1213(x176291,x176292)+P1208(x176291,x176292)
% 32.24/32.06 [17630]P1177(x176301,x176302)+~P132(x176302)+~P1152(x176301,x176302)+P1158(x176301,x176302)
% 32.24/32.06 [17631]P1189(x176311,x176312)+~P133(x176312)+~P1181(x176311,x176312)+P1182(x176311,x176312)
% 32.24/32.06 [17632]P1196(x176321,x176322)+~P134(x176322)+~P1194(x176321,x176322)+P1193(x176321,x176322)
% 32.24/32.06 [17633]P1186(x176331,x176332)+~P133(x176332)+~P1183(x176331,x176332)+P1185(x176331,x176332)
% 32.24/32.06 [17634]P1166(x176341,x176342)+~P132(x176342)+~P1159(x176341,x176342)+P1160(x176341,x176342)
% 32.24/32.06 [17635]P1172(x176351,x176352)+~P135(x176352)+~P1171(x176351,x176352)+P1170(x176351,x176352)
% 32.24/32.06 [17636]P1162(x176361,x176362)+~P132(x176362)+~P1161(x176361,x176362)+P1157(x176361,x176362)
% 32.24/32.06 [17637]P683(x176371)+~P63(x176372,x176371)+P902(x176371,a27)+~P902(x176372,a27)
% 32.24/32.06 [17638]~P63(x176382,x176381)+P683(x176381)+~P902(x176381,a27)+P902(x176382,a27)
% 32.24/32.06 [17639]P486(x176391)+~P63(x176392,x176391)+P484(x176391,a27)+~P182(x176392,a26)
% 32.24/32.06 [17640]P486(x176401)+~P63(x176402,x176401)+P484(x176401,a26)+~P182(x176402,a28)
% 32.24/32.06 [17641]P486(x176411)+~P63(x176412,x176411)+P484(x176411,a28)+~P182(x176412,a39)
% 32.24/32.06 [17642]P486(x176421)+~P63(x176422,x176421)+P484(x176421,a39)+~P182(x176422,a50)
% 32.24/32.06 [17643]~P63(x176432,x176431)+P486(x176431)+~P484(x176431,a27)+P182(x176432,a26)
% 32.24/32.06 [17644]~P63(x176442,x176441)+P486(x176441)+~P484(x176441,a26)+P182(x176442,a28)
% 32.24/32.06 [17645]~P63(x176452,x176451)+P486(x176451)+~P484(x176451,a28)+P182(x176452,a39)
% 32.24/32.06 [17646]~P63(x176462,x176461)+P486(x176461)+~P484(x176461,a39)+P182(x176462,a50)
% 32.24/32.06 [17647]P476(x176471)+~P63(x176472,x176471)+P473(x176471,a27)+~P182(x176472,a26)
% 32.24/32.06 [17648]P476(x176481)+~P63(x176482,x176481)+P473(x176481,a26)+~P182(x176482,a28)
% 32.24/32.06 [17649]P476(x176491)+~P63(x176492,x176491)+P473(x176491,a28)+~P182(x176492,a39)
% 32.24/32.06 [17650]P476(x176501)+~P63(x176502,x176501)+P473(x176501,a39)+~P182(x176502,a50)
% 32.24/32.06 [17651]~P63(x176512,x176511)+P476(x176511)+~P473(x176511,a27)+P182(x176512,a26)
% 32.24/32.06 [17652]~P63(x176522,x176521)+P476(x176521)+~P473(x176521,a26)+P182(x176522,a28)
% 32.24/32.06 [17653]~P63(x176532,x176531)+P476(x176531)+~P473(x176531,a28)+P182(x176532,a39)
% 32.24/32.06 [17654]~P63(x176542,x176541)+P476(x176541)+~P473(x176541,a39)+P182(x176542,a50)
% 32.24/32.06 [17655]P462(x176551)+~P63(x176552,x176551)+P460(x176551,a27)+~P182(x176552,a26)
% 32.24/32.06 [17656]P462(x176561)+~P63(x176562,x176561)+P460(x176561,a26)+~P182(x176562,a28)
% 32.24/32.06 [17657]P462(x176571)+~P63(x176572,x176571)+P460(x176571,a28)+~P182(x176572,a39)
% 32.24/32.06 [17658]P462(x176581)+~P63(x176582,x176581)+P460(x176581,a39)+~P182(x176582,a50)
% 32.24/32.06 [17659]~P63(x176592,x176591)+P462(x176591)+~P460(x176591,a27)+P182(x176592,a26)
% 32.24/32.06 [17660]~P63(x176602,x176601)+P462(x176601)+~P460(x176601,a26)+P182(x176602,a28)
% 32.24/32.06 [17661]~P63(x176612,x176611)+P462(x176611)+~P460(x176611,a28)+P182(x176612,a39)
% 32.24/32.06 [17662]~P63(x176622,x176621)+P462(x176621)+~P460(x176621,a39)+P182(x176622,a50)
% 32.24/32.06 [17663]P448(x176631)+~P63(x176632,x176631)+P446(x176631,a27)+~P182(x176632,a26)
% 32.24/32.06 [17664]P448(x176641)+~P63(x176642,x176641)+P446(x176641,a26)+~P182(x176642,a28)
% 32.24/32.06 [17665]P448(x176651)+~P63(x176652,x176651)+P446(x176651,a28)+~P182(x176652,a39)
% 32.24/32.06 [17666]P448(x176661)+~P63(x176662,x176661)+P446(x176661,a39)+~P182(x176662,a50)
% 32.24/32.06 [17667]~P63(x176672,x176671)+P448(x176671)+~P446(x176671,a27)+P182(x176672,a26)
% 32.24/32.06 [17668]~P63(x176682,x176681)+P448(x176681)+~P446(x176681,a26)+P182(x176682,a28)
% 32.24/32.06 [17669]~P63(x176692,x176691)+P448(x176691)+~P446(x176691,a28)+P182(x176692,a39)
% 32.24/32.06 [17670]~P63(x176702,x176701)+P448(x176701)+~P446(x176701,a39)+P182(x176702,a50)
% 32.24/32.06 [17671]P2397(x176711)+~P63(x176712,x176711)+P1814(x176711,a27)+~P1814(x176712,a27)
% 32.24/32.06 [17672]~P63(x176722,x176721)+P2397(x176721)+~P1814(x176721,a27)+P1814(x176722,a27)
% 32.24/32.06 [17673]P2291(x176731)+~P63(x176732,x176731)+P1814(x176731,a26)+~P1814(x176732,a26)
% 32.24/32.06 [17674]~P63(x176742,x176741)+P2291(x176741)+~P1814(x176741,a26)+P1814(x176742,a26)
% 32.24/32.06 [17689]~P113(x176892)+~P2567(x176891,x176892)+~P2540(x176891,x176892)+P2538(x176891,x176892)
% 32.24/32.06 [17690]~P113(x176902)+~P2584(x176901,x176902)+~P2532(x176901,x176902)+P2529(x176901,x176902)
% 32.24/32.06 [17691]~P113(x176912)+~P2584(x176911,x176912)+~P1905(x176911,x176912)+P2567(x176911,x176912)
% 32.24/32.06 [17705]~P119(x177052)+~P1363(x177051,x177052)+~P1431(x177051,x177052)+P1364(x177051,x177052)
% 32.24/32.06 [17706]~P119(x177062)+~P1435(x177061,x177062)+~P1437(x177061,x177062)+P1436(x177061,x177062)
% 32.24/32.06 [17707]~P119(x177072)+~P1370(x177071,x177072)+~P1430(x177071,x177072)+P1365(x177071,x177072)
% 32.24/32.06 [17708]~P119(x177082)+~P1432(x177081,x177082)+~P1434(x177081,x177082)+P1433(x177081,x177082)
% 32.24/32.06 [17709]~P119(x177092)+~P1371(x177091,x177092)+~P1422(x177091,x177092)+P1372(x177091,x177092)
% 32.24/32.06 [17710]~P119(x177102)+~P1424(x177101,x177102)+~P1426(x177101,x177102)+P1425(x177101,x177102)
% 32.24/32.06 [17711]~P119(x177112)+~P1369(x177111,x177112)+~P1368(x177111,x177112)+P1373(x177111,x177112)
% 32.24/32.06 [17712]~P119(x177122)+~P1105(x177121,x177122)+~P1423(x177121,x177122)+P1407(x177121,x177122)
% 32.24/32.06 [17713]~P132(x177132)+~P1150(x177131,x177132)+~P1248(x177131,x177132)+P1149(x177131,x177132)
% 32.24/32.06 [17714]~P132(x177142)+~P1106(x177141,x177142)+~P1356(x177141,x177142)+P1253(x177141,x177142)
% 32.24/32.06 [17715]~P126(x177152)+~P1263(x177151,x177152)+~P1300(x177151,x177152)+P1262(x177151,x177152)
% 32.24/32.06 [17716]~P126(x177162)+~P1254(x177161,x177162)+~P1360(x177161,x177162)+P1305(x177161,x177162)
% 32.24/32.06 [17717]~P120(x177172)+~P1313(x177171,x177172)+~P1327(x177171,x177172)+P1312(x177171,x177172)
% 32.24/32.06 [17718]~P120(x177182)+~P1306(x177181,x177182)+~P1359(x177181,x177182)+P1330(x177181,x177182)
% 32.24/32.06 [17719]~P117(x177192)+~P1338(x177191,x177192)+~P1340(x177191,x177192)+P1337(x177191,x177192)
% 32.24/32.06 [17720]~P117(x177202)+~P1331(x177201,x177202)+~P1358(x177201,x177202)+P1342(x177201,x177202)
% 32.24/32.06 [17721]~P146(x177212)+~P1343(x177211,x177212)+~P1357(x177211,x177212)+P1348(x177211,x177212)
% 32.24/32.06 [17722]~P117(x177222)+~P1332(x177221,x177222)+~P1341(x177221,x177222)+P1339(x177221,x177222)
% 32.24/32.06 [17723]~P120(x177232)+~P1316(x177231,x177232)+~P1318(x177231,x177232)+P1314(x177231,x177232)
% 32.24/32.06 [17724]~P120(x177242)+~P1307(x177241,x177242)+~P1329(x177241,x177242)+P1320(x177241,x177242)
% 32.24/32.06 [17725]~P118(x177252)+~P1321(x177251,x177252)+~P1328(x177251,x177252)+P1326(x177251,x177252)
% 32.24/32.06 [17726]~P120(x177262)+~P1308(x177261,x177262)+~P1319(x177261,x177262)+P1317(x177261,x177262)
% 32.24/32.06 [17727]~P126(x177272)+~P1265(x177271,x177272)+~P1280(x177271,x177272)+P1264(x177271,x177272)
% 32.24/32.06 [17728]~P126(x177282)+~P1255(x177281,x177282)+~P1304(x177281,x177282)+P1282(x177281,x177282)
% 32.24/32.06 [17729]~P121(x177292)+~P1290(x177291,x177292)+~P1292(x177291,x177292)+P1289(x177291,x177292)
% 32.24/32.06 [17730]~P121(x177302)+~P1283(x177301,x177302)+~P1303(x177301,x177302)+P1294(x177301,x177302)
% 32.24/32.06 [17731]~P122(x177312)+~P1295(x177311,x177312)+~P1302(x177311,x177312)+P1299(x177311,x177312)
% 32.24/32.06 [17732]~P121(x177322)+~P1284(x177321,x177322)+~P1293(x177321,x177322)+P1291(x177321,x177322)
% 32.24/32.06 [17733]~P126(x177332)+~P1267(x177331,x177332)+~P1270(x177331,x177332)+P1266(x177331,x177332)
% 32.24/32.06 [17734]~P126(x177342)+~P1256(x177341,x177342)+~P1281(x177341,x177342)+P1272(x177341,x177342)
% 32.24/32.06 [17735]~P123(x177352)+~P1273(x177351,x177352)+~P1279(x177351,x177352)+P1277(x177351,x177352)
% 32.24/32.06 [17736]~P126(x177362)+~P1257(x177361,x177362)+~P1271(x177361,x177362)+P1268(x177361,x177362)
% 32.24/32.06 [17737]~P132(x177372)+~P1152(x177371,x177372)+~P1198(x177371,x177372)+P1151(x177371,x177372)
% 32.24/32.06 [17738]~P132(x177382)+~P1107(x177381,x177382)+~P1252(x177381,x177382)+P1202(x177381,x177382)
% 32.24/32.06 [17739]~P130(x177392)+~P1211(x177391,x177392)+~P1226(x177391,x177392)+P1210(x177391,x177392)
% 32.24/32.06 [17740]~P130(x177402)+~P1203(x177401,x177402)+~P1251(x177401,x177402)+P1228(x177401,x177402)
% 32.24/32.06 [17741]~P124(x177412)+~P1236(x177411,x177412)+~P1238(x177411,x177412)+P1235(x177411,x177412)
% 32.24/32.06 [17742]~P124(x177422)+~P1229(x177421,x177422)+~P1250(x177421,x177422)+P1240(x177421,x177422)
% 32.24/32.06 [17743]~P125(x177432)+~P1241(x177431,x177432)+~P1249(x177431,x177432)+P1245(x177431,x177432)
% 32.24/32.06 [17744]~P124(x177442)+~P1230(x177441,x177442)+~P1239(x177441,x177442)+P1237(x177441,x177442)
% 32.24/32.06 [17745]~P130(x177452)+~P1213(x177451,x177452)+~P1216(x177451,x177452)+P1212(x177451,x177452)
% 32.24/32.06 [17746]~P130(x177462)+~P1204(x177461,x177462)+~P1227(x177461,x177462)+P1218(x177461,x177462)
% 32.24/32.06 [17747]~P128(x177472)+~P1219(x177471,x177472)+~P1225(x177471,x177472)+P1223(x177471,x177472)
% 32.24/32.06 [17748]~P130(x177482)+~P1205(x177481,x177482)+~P1217(x177481,x177482)+P1214(x177481,x177482)
% 32.24/32.06 [17749]~P132(x177492)+~P1159(x177491,x177492)+~P1174(x177491,x177492)+P1158(x177491,x177492)
% 32.24/32.06 [17750]~P132(x177502)+~P1108(x177501,x177502)+~P1201(x177501,x177502)+P1177(x177501,x177502)
% 32.24/32.06 [17751]~P133(x177512)+~P1183(x177511,x177512)+~P1187(x177511,x177512)+P1182(x177511,x177512)
% 32.24/32.06 [17752]~P133(x177522)+~P1178(x177521,x177522)+~P1200(x177521,x177522)+P1189(x177521,x177522)
% 32.24/32.06 [17753]~P134(x177532)+~P1190(x177531,x177532)+~P1199(x177531,x177532)+P1196(x177531,x177532)
% 32.24/32.06 [17754]~P133(x177542)+~P1179(x177541,x177542)+~P1188(x177541,x177542)+P1186(x177541,x177542)
% 32.24/32.06 [17755]~P132(x177552)+~P1161(x177551,x177552)+~P1164(x177551,x177552)+P1160(x177551,x177552)
% 32.24/32.06 [17756]~P132(x177562)+~P1109(x177561,x177562)+~P1176(x177561,x177562)+P1166(x177561,x177562)
% 32.24/32.06 [17757]~P135(x177572)+~P1167(x177571,x177572)+~P1175(x177571,x177572)+P1172(x177571,x177572)
% 32.24/32.06 [17758]~P132(x177582)+~P1156(x177581,x177582)+~P1155(x177581,x177582)+P1157(x177581,x177582)
% 32.24/32.06 [17759]~P132(x177592)+~P1110(x177591,x177592)+~P1165(x177591,x177592)+P1162(x177591,x177592)
% 32.24/32.06 [17760]~P115(x177602)+~P1046(x177601,x177602)+~P1104(x177601,x177602)+P1103(x177601,x177602)
% 32.24/32.06 [17777]~P113(x177772)+~P2526(x177771,x177772)+~P2536(x177771,x177772)+P2541(x177771,x177772)
% 32.24/32.06 [17913]P21(x179131,x179132,a26)+P21(x179131,x179132,a28)+P21(x179131,x179132,a39)+P21(x179131,x179132,a27)
% 32.24/32.06 [17682]~P113(x176822)+~P2144(x176823,x176822)+P2145(x176821,x176822)+~P63(x176823,x176821)
% 32.24/32.06 [17683]~P113(x176832)+~P2145(x176833,x176832)+P2144(x176831,x176832)+~P63(x176831,x176833)
% 32.24/32.06 [17684]~P114(x176842)+~P336(x176843,x176842)+P337(x176841,x176842)+~P63(x176843,x176841)
% 32.24/32.06 [17685]~P129(x176852)+~P2088(x176853,x176852)+P2089(x176851,x176852)+~P63(x176853,x176851)
% 32.24/32.06 [17686]~P129(x176862)+~P2089(x176863,x176862)+P2088(x176861,x176862)+~P63(x176861,x176863)
% 32.24/32.06 [17687]~P115(x176872)+~P2057(x176873,x176872)+P2058(x176871,x176872)+~P63(x176873,x176871)
% 32.24/32.06 [17688]~P115(x176882)+~P2058(x176883,x176882)+P2057(x176881,x176882)+~P63(x176881,x176883)
% 32.24/32.06 [17692]~P113(x176922)+~P1960(x176923,x176922)+P1962(x176921,x176922)+~P63(x176923,x176921)
% 32.24/32.06 [17693]~P113(x176932)+~P1962(x176933,x176932)+P1960(x176931,x176932)+~P63(x176931,x176933)
% 32.24/32.06 [17694]~P137(x176942)+~P1897(x176943,x176942)+P1898(x176941,x176942)+~P63(x176943,x176941)
% 32.24/32.06 [17695]~P137(x176952)+~P1898(x176953,x176952)+P1897(x176951,x176952)+~P63(x176951,x176953)
% 32.24/32.06 [17696]~P139(x176962)+~P876(x176963,x176962)+P877(x176961,x176962)+~P63(x176963,x176961)
% 32.24/32.06 [17697]~P115(x176972)+~P1731(x176973,x176972)+P1732(x176971,x176972)+~P63(x176973,x176971)
% 32.24/32.06 [17698]~P115(x176982)+~P1732(x176983,x176982)+P1731(x176981,x176982)+~P63(x176981,x176983)
% 32.24/32.06 [17699]~P137(x176992)+~P1622(x176993,x176992)+P1624(x176991,x176992)+~P63(x176993,x176991)
% 32.24/32.06 [17700]~P137(x177002)+~P1624(x177003,x177002)+P1622(x177001,x177002)+~P63(x177001,x177003)
% 32.24/32.06 [17701]~P137(x177012)+~P1548(x177013,x177012)+P1550(x177011,x177012)+~P63(x177013,x177011)
% 32.24/32.06 [17702]~P137(x177022)+~P1550(x177023,x177022)+P1548(x177021,x177022)+~P63(x177021,x177023)
% 32.24/32.06 [17703]~P129(x177032)+~P1521(x177033,x177032)+P1522(x177031,x177032)+~P63(x177033,x177031)
% 32.24/32.06 [17704]~P129(x177042)+~P1522(x177043,x177042)+P1521(x177041,x177042)+~P63(x177041,x177043)
% 32.24/32.06 [17761]~P139(x177612)+~P877(x177613,x177612)+P876(x177611,x177612)+~P63(x177611,x177613)
% 32.24/32.06 [17762]~P129(x177622)+~P796(x177623,x177622)+P797(x177621,x177622)+~P63(x177623,x177621)
% 32.24/32.06 [17763]~P129(x177632)+~P797(x177633,x177632)+P796(x177631,x177632)+~P63(x177631,x177633)
% 32.24/32.06 [17764]~P129(x177642)+~P734(x177643,x177642)+P735(x177641,x177642)+~P63(x177643,x177641)
% 32.24/32.06 [17765]~P129(x177652)+~P735(x177653,x177652)+P734(x177651,x177652)+~P63(x177651,x177653)
% 32.24/32.06 [17766]~P129(x177662)+~P568(x177663,x177662)+P569(x177661,x177662)+~P63(x177663,x177661)
% 32.24/32.06 [17767]~P129(x177672)+~P569(x177673,x177672)+P568(x177671,x177672)+~P63(x177671,x177673)
% 32.24/32.06 [17768]~P129(x177682)+~P519(x177683,x177682)+P521(x177681,x177682)+~P63(x177683,x177681)
% 32.24/32.06 [17769]~P129(x177692)+~P521(x177693,x177692)+P519(x177691,x177692)+~P63(x177691,x177693)
% 32.24/32.06 [17770]~P129(x177702)+~P449(x177703,x177702)+P450(x177701,x177702)+~P63(x177703,x177701)
% 32.24/32.06 [17771]~P129(x177712)+~P450(x177713,x177712)+P449(x177711,x177712)+~P63(x177711,x177713)
% 32.24/32.06 [17772]~P114(x177722)+~P337(x177723,x177722)+P336(x177721,x177722)+~P63(x177721,x177723)
% 32.24/32.06 [17773]~P137(x177732)+~P269(x177733,x177732)+P270(x177731,x177732)+~P63(x177733,x177731)
% 32.24/32.06 [17774]~P137(x177742)+~P270(x177743,x177742)+P269(x177741,x177742)+~P63(x177741,x177743)
% 32.24/32.06 [17775]~P129(x177752)+~P2597(x177753,x177752)+P2598(x177751,x177752)+~P63(x177753,x177751)
% 32.24/32.06 [17776]~P129(x177762)+~P2598(x177763,x177762)+P2597(x177761,x177762)+~P63(x177761,x177763)
% 32.24/32.06 [17778]~P129(x177782)+~P2501(x177783,x177782)+P2502(x177781,x177782)+~P63(x177783,x177781)
% 32.24/32.06 [17779]~P129(x177792)+~P2502(x177793,x177792)+P2501(x177791,x177792)+~P63(x177791,x177793)
% 32.24/32.06 [17780]~P137(x177802)+~P2387(x177803,x177802)+P2388(x177801,x177802)+~P63(x177803,x177801)
% 32.24/32.06 [17781]~P137(x177812)+~P2388(x177813,x177812)+P2387(x177811,x177812)+~P63(x177811,x177813)
% 32.24/32.06 [17782]~P137(x177822)+~P2277(x177823,x177822)+P2278(x177821,x177822)+~P63(x177823,x177821)
% 32.24/32.06 [17783]~P137(x177832)+~P2278(x177833,x177832)+P2277(x177831,x177832)+~P63(x177831,x177833)
% 32.24/32.06 [17784]~P129(x177842)+~P1647(x177843,x177842)+P1666(x177841,x177842)+~P63(x177843,x177841)
% 32.24/32.06 [17785]~P129(x177852)+~P1666(x177853,x177852)+P1647(x177851,x177852)+~P63(x177851,x177853)
% 32.24/32.06 [6937]~P129(x69371)+E(a26,x69371)+E(a28,x69371)+E(a39,x69371)+E(a27,x69371)
% 32.24/32.06 [6938]~P145(x69381)+E(a83,x69381)+E(a61,x69381)+E(a92,x69381)+E(a62,x69381)
% 32.24/32.06 [6939]~P142(x69391)+E(a88,x69391)+E(a89,x69391)+E(a90,x69391)+E(a87,x69391)
% 32.24/32.06 [7464]P68(x74641)+~P127(x74641)+E(a45,x74641)+E(a46,x74641)+E(a44,x74641)
% 32.24/32.06 [17580]P1017(x175801)+P2445(x175801,a27)+P2445(x175801,a26)+P2445(x175801,a28)+P2445(x175801,a39)
% 32.24/32.06 [17581]P542(x175811)+P312(x175811,a27)+P312(x175811,a26)+P312(x175811,a28)+P312(x175811,a39)
% 32.24/32.06 [17582]P226(x175821)+P244(x175821,a27)+P244(x175821,a26)+P244(x175821,a28)+P244(x175821,a39)
% 32.24/32.06 [17583]P1025(x175831)+P244(x175831,a27)+P244(x175831,a26)+P244(x175831,a28)+P244(x175831,a39)
% 32.24/32.06 [17675]P1031(x176751)+P2445(x176751,a27)+P2445(x176751,a26)+P2445(x176751,a28)+~P2445(x176751,a39)
% 32.24/32.06 [17676]P1016(x176761)+P2445(x176761,a27)+P2445(x176761,a26)+P2445(x176761,a39)+~P2445(x176761,a28)
% 32.24/32.06 [17677]P1019(x176771)+P2445(x176771,a26)+P2445(x176771,a28)+P2445(x176771,a39)+~P2445(x176771,a27)
% 32.24/32.06 [17678]P548(x176781)+P312(x176781,a27)+P312(x176781,a26)+P312(x176781,a39)+~P312(x176781,a28)
% 32.24/32.06 [17679]P551(x176791)+P312(x176791,a27)+P312(x176791,a28)+P312(x176791,a39)+~P312(x176791,a26)
% 32.24/32.06 [17680]P552(x176801)+P312(x176801,a26)+P312(x176801,a28)+P312(x176801,a39)+~P312(x176801,a27)
% 32.24/32.06 [17796]P1030(x177961)+P2445(x177961,a27)+P2445(x177961,a26)+~P2445(x177961,a28)+~P2445(x177961,a39)
% 32.24/32.06 [17797]P1032(x177971)+P2445(x177971,a26)+P2445(x177971,a28)+~P2445(x177971,a27)+~P2445(x177971,a39)
% 32.24/32.06 [17798]P1014(x177981)+P2445(x177981,a26)+P2445(x177981,a39)+~P2445(x177981,a27)+~P2445(x177981,a28)
% 32.24/32.06 [17799]P798(x177991)+P2445(x177991,a27)+P2445(x177991,a39)+~P2445(x177991,a26)+~P2445(x177991,a28)
% 32.24/32.06 [17800]P555(x178001)+P312(x178001,a27)+P312(x178001,a26)+~P312(x178001,a28)+~P312(x178001,a39)
% 32.24/32.06 [17801]P557(x178011)+P312(x178011,a27)+P312(x178011,a28)+~P312(x178011,a26)+~P312(x178011,a39)
% 32.24/32.06 [17802]P558(x178021)+P312(x178021,a26)+P312(x178021,a28)+~P312(x178021,a27)+~P312(x178021,a39)
% 32.24/32.06 [17803]P602(x178031)+P503(x178031,a26)+P503(x178031,a39)+~P503(x178031,a27)+~P503(x178031,a28)
% 32.24/32.06 [17804]P553(x178041)+P312(x178041,a26)+P312(x178041,a39)+~P312(x178041,a27)+~P312(x178041,a28)
% 32.24/32.06 [17805]P549(x178051)+P312(x178051,a28)+P312(x178051,a39)+~P312(x178051,a27)+~P312(x178051,a26)
% 32.24/32.06 [17806]P1334(x178061)+P244(x178061,a27)+P244(x178061,a39)+~P244(x178061,a26)+~P244(x178061,a28)
% 32.24/32.06 [17860]P1026(x178601)+P2445(x178601,a27)+~P2445(x178601,a26)+~P2445(x178601,a28)+~P2445(x178601,a39)
% 32.24/32.06 [17861]P1028(x178611)+P2445(x178611,a26)+~P2445(x178611,a27)+~P2445(x178611,a28)+~P2445(x178611,a39)
% 32.24/32.06 [17862]P799(x178621)+P2445(x178621,a39)+~P2445(x178621,a27)+~P2445(x178621,a26)+~P2445(x178621,a28)
% 32.24/32.06 [17863]P556(x178631)+P312(x178631,a28)+~P312(x178631,a27)+~P312(x178631,a26)+~P312(x178631,a39)
% 32.24/32.06 [17864]P603(x178641)+P503(x178641,a26)+~P503(x178641,a27)+~P503(x178641,a28)+~P503(x178641,a39)
% 32.24/32.06 [17865]P563(x178651)+P312(x178651,a26)+~P312(x178651,a27)+~P312(x178651,a28)+~P312(x178651,a39)
% 32.24/32.06 [17871]P1023(x178711)+~P2445(x178711,a27)+~P2445(x178711,a26)+~P2445(x178711,a28)+~P2445(x178711,a39)
% 32.24/32.06 [17872]P774(x178721)+~P2511(x178721,a27)+~P2511(x178721,a26)+~P2511(x178721,a28)+~P2511(x178721,a39)
% 32.24/32.06 [17873]P713(x178731)+~P165(x178731,a27)+~P165(x178731,a26)+~P165(x178731,a28)+~P165(x178731,a39)
% 32.24/32.06 [17874]P2575(x178741)+~P2016(x178741,a27)+~P2016(x178741,a26)+~P2016(x178741,a28)+~P2016(x178741,a39)
% 32.24/32.06 [17875]P2479(x178751)+~P2018(x178751,a27)+~P2018(x178751,a26)+~P2018(x178751,a28)+~P2018(x178751,a39)
% 32.24/32.06 [17807]~P113(x178072)+~P2478(x178073,x178072)+P2142(x178071)+P2478(x178071,x178072)+~P63(x178073,x178071)
% 32.24/32.06 [17808]~P113(x178083)+~P63(x178082,x178081)+~P2478(x178081,x178083)+P2142(x178081)+P2478(x178082,x178083)
% 32.24/32.06 [17809]~P129(x178092)+~P2321(x178093,x178092)+P2101(x178091)+P2099(x178091,x178092)+~P63(x178093,x178091)
% 32.24/32.06 [17810]~P129(x178103)+~P63(x178102,x178101)+~P2099(x178101,x178103)+P2101(x178101)+P2321(x178102,x178103)
% 32.24/32.06 [17811]~P129(x178112)+~P2321(x178113,x178112)+P2097(x178111)+P2095(x178111,x178112)+~P63(x178113,x178111)
% 32.24/32.06 [17812]~P129(x178123)+~P63(x178122,x178121)+~P2095(x178121,x178123)+P2097(x178121)+P2321(x178122,x178123)
% 32.24/32.06 [17813]~P129(x178132)+~P2321(x178133,x178132)+P2085(x178131)+P2083(x178131,x178132)+~P63(x178133,x178131)
% 32.24/32.06 [17814]~P129(x178143)+~P63(x178142,x178141)+~P2083(x178141,x178143)+P2085(x178141)+P2321(x178142,x178143)
% 32.24/32.06 [17815]~P115(x178152)+~P2003(x178153,x178152)+P2055(x178151)+P2003(x178151,x178152)+~P63(x178153,x178151)
% 32.24/32.06 [17816]~P115(x178163)+~P63(x178162,x178161)+~P2003(x178161,x178163)+P2055(x178161)+P2003(x178162,x178163)
% 32.24/32.06 [17817]~P113(x178172)+~P1905(x178173,x178172)+P1951(x178171)+P1905(x178171,x178172)+~P63(x178173,x178171)
% 32.24/32.06 [17818]~P113(x178183)+~P63(x178182,x178181)+~P1905(x178181,x178183)+P1951(x178181)+P1905(x178182,x178183)
% 32.24/32.06 [17819]~P137(x178192)+~P1740(x178193,x178192)+P1895(x178191)+P1740(x178191,x178192)+~P63(x178193,x178191)
% 32.24/32.06 [17820]~P137(x178203)+~P63(x178202,x178201)+~P1740(x178201,x178203)+P1895(x178201)+P1740(x178202,x178203)
% 32.24/32.06 [17821]~P139(x178212)+~P839(x178213,x178212)+P1765(x178211)+P1764(x178211,x178212)+~P63(x178213,x178211)
% 32.24/32.06 [17822]~P139(x178223)+~P63(x178222,x178221)+~P1764(x178221,x178223)+P1765(x178221)+P839(x178222,x178223)
% 32.24/32.06 [17823]~P115(x178232)+~P1009(x178233,x178232)+P1727(x178231)+P1009(x178231,x178232)+~P63(x178233,x178231)
% 32.24/32.06 [17824]~P115(x178243)+~P63(x178242,x178241)+~P1009(x178241,x178243)+P1727(x178241)+P1009(x178242,x178243)
% 32.24/32.06 [17825]~P137(x178252)+~P1591(x178253,x178252)+P1603(x178251)+P1591(x178251,x178252)+~P63(x178253,x178251)
% 32.24/32.06 [17826]~P137(x178263)+~P63(x178262,x178261)+~P1591(x178261,x178263)+P1603(x178261)+P1591(x178262,x178263)
% 32.24/32.06 [17827]~P137(x178272)+~P1033(x178273,x178272)+P1527(x178271)+P1033(x178271,x178272)+~P63(x178273,x178271)
% 32.24/32.06 [17828]~P137(x178283)+~P63(x178282,x178281)+~P1033(x178281,x178283)+P1527(x178281)+P1033(x178282,x178283)
% 32.24/32.06 [17829]~P129(x178292)+~P1473(x178293,x178292)+P1518(x178291)+P1517(x178291,x178292)+~P63(x178293,x178291)
% 32.24/32.06 [17830]~P129(x178303)+~P63(x178302,x178301)+~P1517(x178301,x178303)+P1518(x178301)+P1473(x178302,x178303)
% 32.24/32.06 [17831]~P139(x178312)+~P839(x178313,x178312)+P875(x178311)+P873(x178311,x178312)+~P63(x178313,x178311)
% 32.24/32.06 [17832]~P139(x178323)+~P63(x178322,x178321)+~P873(x178321,x178323)+P875(x178321)+P839(x178322,x178323)
% 32.24/32.06 [17833]~P129(x178332)+~P2511(x178333,x178332)+P793(x178331)+P2511(x178331,x178332)+~P63(x178333,x178331)
% 32.24/32.06 [17834]~P129(x178343)+~P63(x178342,x178341)+~P2511(x178341,x178343)+P793(x178341)+P2511(x178342,x178343)
% 32.24/32.06 [17835]~P129(x178352)+~P165(x178353,x178352)+P732(x178351)+P165(x178351,x178352)+~P63(x178353,x178351)
% 32.24/32.06 [17836]~P129(x178363)+~P63(x178362,x178361)+~P165(x178361,x178363)+P732(x178361)+P165(x178362,x178363)
% 32.24/32.06 [17837]~P129(x178372)+~P312(x178373,x178372)+P567(x178371)+P312(x178371,x178372)+~P63(x178373,x178371)
% 32.24/32.06 [17838]~P129(x178383)+~P63(x178382,x178381)+~P312(x178381,x178383)+P567(x178381)+P312(x178382,x178383)
% 32.24/32.06 [17839]~P129(x178392)+~P510(x178393,x178392)+P512(x178391)+P510(x178391,x178392)+~P63(x178393,x178391)
% 32.24/32.06 [17840]~P129(x178403)+~P63(x178402,x178401)+~P510(x178401,x178403)+P512(x178401)+P510(x178402,x178403)
% 32.24/32.06 [17841]~P137(x178412)+~P170(x178413,x178412)+P268(x178411)+P170(x178411,x178412)+~P63(x178413,x178411)
% 32.24/32.06 [17842]~P137(x178423)+~P63(x178422,x178421)+~P170(x178421,x178423)+P268(x178421)+P170(x178422,x178423)
% 32.24/32.06 [17843]~P129(x178432)+~P2016(x178433,x178432)+P2596(x178431)+P2016(x178431,x178432)+~P63(x178433,x178431)
% 32.24/32.06 [17844]~P129(x178443)+~P63(x178442,x178441)+~P2016(x178441,x178443)+P2596(x178441)+P2016(x178442,x178443)
% 32.24/32.06 [17845]~P129(x178452)+~P2018(x178453,x178452)+P2500(x178451)+P2018(x178451,x178452)+~P63(x178453,x178451)
% 32.24/32.06 [17846]~P129(x178463)+~P63(x178462,x178461)+~P2018(x178461,x178463)+P2500(x178461)+P2018(x178462,x178463)
% 32.24/32.06 [17847]~P137(x178472)+~P2013(x178473,x178472)+P2384(x178471)+P2013(x178471,x178472)+~P63(x178473,x178471)
% 32.24/32.06 [17848]~P137(x178483)+~P63(x178482,x178481)+~P2013(x178481,x178483)+P2384(x178481)+P2013(x178482,x178483)
% 32.24/32.06 [17849]~P137(x178492)+~P2174(x178493,x178492)+P2274(x178491)+P2174(x178491,x178492)+~P63(x178493,x178491)
% 32.24/32.06 [17850]~P137(x178503)+~P63(x178502,x178501)+~P2174(x178501,x178503)+P2274(x178501)+P2174(x178502,x178503)
% 32.24/32.06 [17851]~P129(x178512)+~P244(x178513,x178512)+P1574(x178511)+P244(x178511,x178512)+~P63(x178513,x178511)
% 32.24/32.06 [17852]~P129(x178523)+~P63(x178522,x178521)+~P244(x178521,x178523)+P1574(x178521)+P244(x178522,x178523)
% 32.24/32.06 [17885]~P122(x178853)+~P164(x178851)+~P28(x178853)+P2533(x178851,x178852,x178853)+~P63(x178854,x178851)
% 32.24/32.06 [17886]~P143(x178863)+~P2514(x178861)+~P31(x178863)+P2412(x178861,x178862,x178863)+~P63(x178864,x178861)
% 32.24/32.06 [17889]~P122(x178891)+P28(x178891)+~P2533(x178892,x178894,x178891)+~P63(x178893,x178892)+~P164(x178892)
% 32.24/32.06 [17890]~P143(x178901)+P31(x178901)+~P2412(x178902,x178904,x178901)+~P63(x178903,x178902)+~P2514(x178902)
% 32.24/32.06 [17901]~P122(x179013)+~P2552(x179011,x179012,x179013)+P164(x179011)+P2533(x179011,x179012,x179013)+~P63(x179014,x179011)
% 32.24/32.06 [17902]~P122(x179023)+~P2533(x179021,x179022,x179023)+P164(x179021)+P2552(x179021,x179022,x179023)+~P63(x179024,x179021)
% 32.24/32.06 [17903]~P143(x179033)+~P2448(x179031,x179032,x179033)+P2514(x179031)+P2412(x179031,x179032,x179033)+~P63(x179034,x179031)
% 32.24/32.06 [17904]~P143(x179043)+~P2412(x179041,x179042,x179043)+P2514(x179041)+P2448(x179041,x179042,x179043)+~P63(x179044,x179041)
% 32.24/32.06 [7139]~P137(x71391)+E(a26,x71391)+E(a28,x71391)+E(a39,x71391)+E(a50,x71391)+E(a27,x71391)
% 32.24/32.06 [7579]P68(x75791)+~P124(x75791)+E(a45,x75791)+E(a46,x75791)+E(a47,x75791)+E(a44,x75791)
% 32.24/32.06 [17788]P97(x177881)+P1740(x177881,a27)+P1740(x177881,a26)+P1740(x177881,a28)+P1740(x177881,a39)+P1740(x177881,a50)
% 32.24/32.06 [17789]P109(x177891)+P1033(x177891,a27)+P1033(x177891,a26)+P1033(x177891,a28)+P1033(x177891,a39)+P1033(x177891,a50)
% 32.24/32.06 [17790]P76(x177901)+P913(x177901,a42)+P913(x177901,a43)+P913(x177901,a44)+P913(x177901,a45)+P913(x177901,a46)
% 32.24/32.06 [17791]P98(x177911)+P170(x177911,a27)+P170(x177911,a26)+P170(x177911,a28)+P170(x177911,a39)+P170(x177911,a50)
% 32.24/32.06 [17792]P100(x177921)+P2013(x177921,a27)+P2013(x177921,a26)+P2013(x177921,a28)+P2013(x177921,a39)+P2013(x177921,a50)
% 32.24/32.06 [17793]P103(x177931)+P2174(x177931,a27)+P2174(x177931,a26)+P2174(x177931,a28)+P2174(x177931,a39)+P2174(x177931,a50)
% 32.24/32.06 [17794]P107(x177941)+P562(x177941,a28)+P562(x177941,a39)+P562(x177941,a62)+P562(x177941,a50)+P562(x177941,a61)
% 32.24/32.06 [17795]P105(x177951)+P406(x177951,a27)+P406(x177951,a26)+P406(x177951,a28)+P406(x177951,a39)+P406(x177951,a50)
% 32.24/32.06 [17855]P101(x178551)+P1740(x178551,a27)+P1740(x178551,a26)+P1740(x178551,a28)+P1740(x178551,a39)+~P1740(x178551,a50)
% 32.24/32.06 [17856]P73(x178561)+P562(x178561,a28)+P562(x178561,a39)+P562(x178561,a62)+P562(x178561,a50)+~P562(x178561,a61)
% 32.24/32.06 [17857]P74(x178571)+P562(x178571,a28)+P562(x178571,a62)+P562(x178571,a50)+P562(x178571,a61)+~P562(x178571,a39)
% 32.24/32.06 [17858]P99(x178581)+P170(x178581,a27)+P170(x178581,a26)+P170(x178581,a28)+P170(x178581,a39)+~P170(x178581,a50)
% 32.24/32.06 [17859]P106(x178591)+P562(x178591,a28)+P562(x178591,a39)+P562(x178591,a50)+P562(x178591,a61)+~P562(x178591,a62)
% 32.24/32.06 [17868]P111(x178681)+P562(x178681,a28)+P562(x178681,a62)+P562(x178681,a50)+~P562(x178681,a39)+~P562(x178681,a61)
% 32.24/32.06 [17869]P70(x178691)+P562(x178691,a28)+P562(x178691,a39)+P562(x178691,a62)+~P562(x178691,a50)+~P562(x178691,a61)
% 32.24/32.06 [17870]P72(x178701)+P562(x178701,a28)+P562(x178701,a39)+P562(x178701,a50)+~P562(x178701,a62)+~P562(x178701,a61)
% 32.24/32.06 [17879]P69(x178791)+P562(x178791,a28)+P562(x178791,a39)+~P562(x178791,a62)+~P562(x178791,a50)+~P562(x178791,a61)
% 32.24/32.06 [17880]P71(x178801)+P562(x178801,a28)+P562(x178801,a62)+~P562(x178801,a39)+~P562(x178801,a50)+~P562(x178801,a61)
% 32.24/32.06 [17882]P112(x178821)+P562(x178821,a28)+~P562(x178821,a39)+~P562(x178821,a62)+~P562(x178821,a50)+~P562(x178821,a61)
% 32.24/32.06 [17883]P102(x178831)+P2013(x178831,a50)+~P2013(x178831,a27)+~P2013(x178831,a26)+~P2013(x178831,a28)+~P2013(x178831,a39)
% 32.24/32.06 [17884]P104(x178841)+P2174(x178841,a50)+~P2174(x178841,a27)+~P2174(x178841,a26)+~P2174(x178841,a28)+~P2174(x178841,a39)
% 32.24/32.06 [17887]P108(x178871)+~P1747(x178871,a27)+~P1747(x178871,a26)+~P1747(x178871,a28)+~P1747(x178871,a39)+~P1747(x178871,a50)
% 32.24/32.06 [17888]P110(x178881)+~P1665(x178881,a27)+~P1665(x178881,a26)+~P1665(x178881,a28)+~P1665(x178881,a39)+~P1665(x178881,a50)
% 32.24/32.06 [17584]P2067(x175841)+P2072(x175841)+~P129(x175842)+~P2070(x175841,x175842)+P2069(x175841)+P2321(x175841,x175842)
% 32.24/32.06 [17585]P2067(x175851)+P2072(x175851)+~P129(x175852)+~P2321(x175851,x175852)+P2069(x175851)+P2070(x175851,x175852)
% 32.24/32.06 [17586]P1820(x175861)+P1868(x175861)+~P137(x175862)+~P1823(x175861,x175862)+P1822(x175861)+P1740(x175861,x175862)
% 32.24/32.06 [17587]P1820(x175871)+P1868(x175871)+~P137(x175872)+~P1740(x175871,x175872)+P1822(x175871)+P1823(x175871,x175872)
% 32.24/32.06 [17588]P1643(x175881)+P1658(x175881)+~P115(x175882)+~P1710(x175881,x175882)+P1644(x175881)+P1011(x175881,x175882)
% 32.24/32.06 [17589]P1643(x175891)+P1658(x175891)+~P115(x175892)+~P1011(x175891,x175892)+P1644(x175891)+P1710(x175891,x175892)
% 32.24/32.06 [17590]P188(x175901)+P240(x175901)+~P137(x175902)+~P191(x175901,x175902)+P190(x175901)+P170(x175901,x175902)
% 32.24/32.06 [17591]P188(x175911)+P240(x175911)+~P137(x175912)+~P170(x175911,x175912)+P190(x175911)+P191(x175911,x175912)
% 32.24/32.06 [17592]P2307(x175921)+P2353(x175921)+~P137(x175922)+~P2043(x175921,x175922)+P2309(x175921)+P2013(x175921,x175922)
% 32.24/32.06 [17593]P2307(x175931)+P2353(x175931)+~P137(x175932)+~P2013(x175931,x175932)+P2309(x175931)+P2043(x175931,x175932)
% 32.24/32.06 [17594]P2193(x175941)+P2242(x175941)+~P137(x175942)+~P2176(x175941,x175942)+P2195(x175941)+P2174(x175941,x175942)
% 32.24/32.06 [17595]P2193(x175951)+P2242(x175951)+~P137(x175952)+~P2174(x175951,x175952)+P2195(x175951)+P2176(x175951,x175952)
% 32.24/32.06 [17596]P1004(x175961)+P1301(x175961)+~P129(x175962)+~P260(x175961,x175962)+P979(x175961)+P244(x175961,x175962)
% 32.24/32.06 [17597]P1004(x175971)+P1301(x175971)+~P129(x175972)+~P244(x175971,x175972)+P979(x175971)+P260(x175971,x175972)
% 32.24/32.06 [17891]P20(x178911,x178913)+~P2(x178912)+~P2(x178911)+~P21(x178912,x178911,x178913)+E(x178911,x178912)+P20(x178912,x178913)
% 32.24/32.06 [17896]~P2(x178962)+~P2(x178961)+~P20(x178961,x178963)+~P21(x178961,x178962,x178963)+E(x178961,x178962)+~P20(x178962,x178963)
% 32.24/32.06 [17905]~P122(x179054)+~P2568(x179055,x179052)+~P2552(x179055,x179051,x179054)+E(x179051,x179052)+P2533(x179053,x179051,x179054)+~P63(x179053,x179055)
% 32.24/32.06 [17906]~P122(x179064)+~P2568(x179063,x179062)+~P2533(x179065,x179061,x179064)+E(x179061,x179062)+P2552(x179063,x179061,x179064)+~P63(x179065,x179063)
% 32.24/32.06 [17907]~P143(x179074)+~P2471(x179075,x179072)+~P2448(x179075,x179071,x179074)+E(x179071,x179072)+P2412(x179073,x179071,x179074)+~P63(x179073,x179075)
% 32.24/32.06 [17908]~P143(x179084)+~P2471(x179083,x179082)+~P2412(x179085,x179081,x179084)+E(x179081,x179082)+P2448(x179083,x179081,x179084)+~P63(x179085,x179083)
% 32.24/32.06 [17909]~P122(x179093)+~P2533(x179094,x179092,x179093)+P2602(x179091)+P2552(x179091,x179092,x179093)+~P63(x179094,x179091)+~P2568(x179091,x179095)
% 32.24/32.06 [17910]~P122(x179104)+~P63(x179102,x179101)+~P2552(x179101,x179103,x179104)+P2602(x179101)+P2533(x179102,x179103,x179104)+~P2568(x179101,x179105)
% 32.24/32.06 [17911]~P143(x179113)+~P2412(x179114,x179112,x179113)+P2508(x179111)+P2448(x179111,x179112,x179113)+~P63(x179114,x179111)+~P2471(x179111,x179115)
% 32.24/32.06 [17912]~P143(x179124)+~P63(x179122,x179121)+~P2448(x179121,x179123,x179124)+P2508(x179121)+P2412(x179122,x179123,x179124)+~P2471(x179121,x179125)
% 32.24/32.06 [7465]~P138(x74651)+E(a26,x74651)+E(a28,x74651)+E(a39,x74651)+E(a62,x74651)+E(a50,x74651)+E(a27,x74651)
% 32.24/32.06 [17853]~P80(x178531)+P82(x178531)+P913(x178531,a28)+P913(x178531,a39)+P913(x178531,a62)+P913(x178531,a50)+P913(x178531,a61)
% 32.24/32.06 [17854]~P84(x178541)+P85(x178541)+P913(x178541,a28)+P913(x178541,a39)+P913(x178541,a62)+P913(x178541,a50)+P913(x178541,a61)
% 32.24/32.06 [17866]~P79(x178661)+P80(x178661)+P913(x178661,a83)+P913(x178661,a29)+P913(x178661,a91)+P913(x178661,a92)+~P913(x178661,a30)
% 32.24/32.06 [17867]~P83(x178671)+P84(x178671)+P913(x178671,a83)+P913(x178671,a29)+P913(x178671,a91)+P913(x178671,a92)+~P913(x178671,a30)
% 32.24/32.06 [17876]~P77(x178761)+P79(x178761)+P913(x178761,a31)+P913(x178761,a34)+P913(x178761,a35)+~P913(x178761,a32)+~P913(x178761,a33)
% 32.24/32.06 [17877]~P76(x178771)+P78(x178771)+P913(x178771,a36)+P913(x178771,a40)+P913(x178771,a41)+~P913(x178771,a37)+~P913(x178771,a38)
% 32.24/32.06 [17878]~P78(x178781)+P83(x178781)+P913(x178781,a31)+P913(x178781,a34)+P913(x178781,a35)+~P913(x178781,a32)+~P913(x178781,a33)
% 32.24/32.06 [17881]~P76(x178811)+P77(x178811)+P913(x178811,a40)+P913(x178811,a41)+~P913(x178811,a36)+~P913(x178811,a37)+~P913(x178811,a38)
% 32.24/32.06 [16976]P563(x169761)+P553(x169761)+P545(x169761)+P559(x169761)+~P313(x169761,x169762)+P542(x169761)+~P129(x169762)
% 32.24/32.06 [17892]~P2(x178922)+~P122(x178923)+~P156(x178921,x178924)+~P168(x178921,x178923)+P2533(x178921,x178922,x178923)+~E(x178922,x178924)+~P63(x178925,x178921)
% 32.24/32.06 [17893]~P122(x178933)+~P2602(x178931)+~P2568(x178931,x178934)+~P2557(x178931,x178933)+P2552(x178931,x178932,x178933)+~E(x178932,x178934)+~P63(x178935,x178931)
% 32.24/32.06 [17894]~P2(x178942)+~P143(x178943)+~P2017(x178941,x178944)+~P2516(x178941,x178943)+P2412(x178941,x178942,x178943)+~E(x178942,x178944)+~P63(x178945,x178941)
% 32.24/32.06 [17895]~P143(x178953)+~P2508(x178951)+~P2471(x178951,x178954)+~P2453(x178951,x178953)+P2448(x178951,x178952,x178953)+~E(x178952,x178954)+~P63(x178955,x178951)
% 32.24/32.06 [17897]~P2(x178973)+~P143(x178972)+~P2017(x178971,x178974)+~P2412(x178971,x178973,x178972)+P2516(x178971,x178972)+~E(x178973,x178974)+~P63(x178975,x178971)
% 32.24/32.06 [17898]~P2(x178983)+~P122(x178982)+~P156(x178981,x178984)+~P2533(x178981,x178983,x178982)+P168(x178981,x178982)+~E(x178983,x178984)+~P63(x178985,x178981)
% 32.24/32.06 [17899]~P122(x178992)+~P2602(x178991)+~P2568(x178991,x178994)+~P2552(x178991,x178993,x178992)+P2557(x178991,x178992)+~E(x178993,x178994)+~P63(x178995,x178991)
% 32.24/32.06 [17900]~P143(x179002)+~P2508(x179001)+~P2471(x179001,x179004)+~P2448(x179001,x179003,x179002)+P2453(x179001,x179002)+~E(x179003,x179004)+~P63(x179005,x179001)
% 32.24/32.06 [7580]~P144(x75801)+E(a26,x75801)+E(a28,x75801)+E(a39,x75801)+E(a62,x75801)+E(a50,x75801)+E(a61,x75801)+E(a27,x75801)
% 32.24/32.06 [7581]~P140(x75811)+E(a78,x75811)+E(a79,x75811)+E(a80,x75811)+E(a81,x75811)+E(a82,x75811)+E(a84,x75811)+E(a77,x75811)
% 32.24/32.06 [9401]P68(x94011)+~P128(x94011)+E(a45,x94011)+E(a46,x94011)+E(a47,x94011)+E(a48,x94011)+E(a49,x94011)+E(a44,x94011)
% 32.24/32.06 [17786]P1487(x177861)+P1496(x177861)+P1505(x177861)+P1504(x177861)+~P129(x177862)+~P1513(x177861,x177862)+P1491(x177861)+P1511(x177861,x177862)
% 32.24/32.06 [17787]P1487(x177871)+P1496(x177871)+P1505(x177871)+P1504(x177871)+~P129(x177872)+~P1511(x177871,x177872)+P1491(x177871)+P1513(x177871,x177872)
% 32.24/32.06 [7986]~P141(x79861)+E(a26,x79861)+E(a28,x79861)+E(a39,x79861)+E(a62,x79861)+E(a50,x79861)+E(a83,x79861)+E(a61,x79861)+E(a27,x79861)
% 32.24/32.06 [9405]P68(x94051)+~P130(x94051)+E(a45,x94051)+E(a46,x94051)+E(a47,x94051)+E(a48,x94051)+E(a49,x94051)+E(a51,x94051)+E(a52,x94051)+E(a44,x94051)
% 32.24/32.06 [9404]~P146(x94041)+E(a26,x94041)+E(a28,x94041)+E(a39,x94041)+E(a62,x94041)+E(a50,x94041)+E(a83,x94041)+E(a61,x94041)+E(a91,x94041)+E(a92,x94041)+E(a27,x94041)
% 32.24/32.06 [9406]~P114(x94061)+E(a26,x94061)+E(a28,x94061)+E(a39,x94061)+E(a62,x94061)+E(a50,x94061)+E(a83,x94061)+E(a61,x94061)+E(a29,x94061)+E(a91,x94061)+E(a92,x94061)+E(a27,x94061)
% 32.24/32.06 [10854]P68(x108541)+~P134(x108541)+E(a45,x108541)+E(a46,x108541)+E(a47,x108541)+E(a48,x108541)+E(a49,x108541)+E(a51,x108541)+E(a52,x108541)+E(a53,x108541)+E(a54,x108541)+E(a44,x108541)
% 32.24/32.06 [10852]~P117(x108521)+E(a26,x108521)+E(a28,x108521)+E(a39,x108521)+E(a62,x108521)+E(a50,x108521)+E(a83,x108521)+E(a61,x108521)+E(a29,x108521)+E(a30,x108521)+E(a91,x108521)+E(a92,x108521)+E(a27,x108521)
% 32.24/32.06 [11242]P68(x112421)+~P133(x112421)+E(a45,x112421)+E(a46,x112421)+E(a47,x112421)+E(a48,x112421)+E(a49,x112421)+E(a51,x112421)+E(a52,x112421)+E(a53,x112421)+E(a54,x112421)+E(a55,x112421)+E(a56,x112421)+E(a44,x112421)
% 32.24/32.06 [11233]~P118(x112331)+E(a26,x112331)+E(a28,x112331)+E(a39,x112331)+E(a62,x112331)+E(a50,x112331)+E(a83,x112331)+E(a61,x112331)+E(a29,x112331)+E(a30,x112331)+E(a91,x112331)+E(a92,x112331)+E(a31,x112331)+E(a32,x112331)+E(a27,x112331)
% 32.24/32.06 [11397]P68(x113971)+~P135(x113971)+E(a45,x113971)+E(a46,x113971)+E(a47,x113971)+E(a48,x113971)+E(a49,x113971)+E(a51,x113971)+E(a52,x113971)+E(a53,x113971)+E(a54,x113971)+E(a55,x113971)+E(a56,x113971)+E(a57,x113971)+E(a58,x113971)+E(a44,x113971)
% 32.24/32.06 [11252]~P120(x112521)+E(a29,x112521)+E(a34,x112521)+E(a33,x112521)+E(a32,x112521)+E(a31,x112521)+E(a92,x112521)+E(a91,x112521)+E(a30,x112521)+E(a61,x112521)+E(a83,x112521)+E(a50,x112521)+E(a62,x112521)+E(a39,x112521)+E(a28,x112521)+E(a26,x112521)+E(a27,x112521)
% 32.24/32.06 [11398]~P119(x113981)+E(a30,x113981)+E(a35,x113981)+E(a34,x113981)+E(a33,x113981)+E(a32,x113981)+E(a31,x113981)+E(a92,x113981)+E(a91,x113981)+E(a29,x113981)+E(a61,x113981)+E(a83,x113981)+E(a50,x113981)+E(a62,x113981)+E(a39,x113981)+E(a28,x113981)+E(a26,x113981)+E(a27,x113981)
% 32.24/32.06 [16035]~P132(x160351)+P68(x160351)+E(a54,x160351)+E(a60,x160351)+E(a59,x160351)+E(a58,x160351)+E(a57,x160351)+E(a56,x160351)+E(a55,x160351)+E(a53,x160351)+E(a52,x160351)+E(a51,x160351)+E(a49,x160351)+E(a48,x160351)+E(a47,x160351)+E(a46,x160351)+E(a45,x160351)+E(a44,x160351)
% 32.24/32.06 [16036]~P139(x160361)+P75(x160361)+E(a80,x160361)+E(a87,x160361)+E(a86,x160361)+E(a85,x160361)+E(a84,x160361)+E(a82,x160361)+E(a81,x160361)+E(a79,x160361)+E(a78,x160361)+E(a77,x160361)+E(a76,x160361)+E(a75,x160361)+E(a74,x160361)+E(a72,x160361)+E(a71,x160361)+E(a73,x160361)
% 32.24/32.06 [16014]~P122(x160141)+E(a30,x160141)+E(a36,x160141)+E(a35,x160141)+E(a34,x160141)+E(a33,x160141)+E(a32,x160141)+E(a31,x160141)+E(a92,x160141)+E(a91,x160141)+E(a29,x160141)+E(a61,x160141)+E(a83,x160141)+E(a50,x160141)+E(a62,x160141)+E(a39,x160141)+E(a28,x160141)+E(a26,x160141)+E(a27,x160141)
% 32.24/32.06 [16149]~P121(x161491)+E(a91,x161491)+E(a38,x161491)+E(a37,x161491)+E(a36,x161491)+E(a35,x161491)+E(a34,x161491)+E(a33,x161491)+E(a32,x161491)+E(a31,x161491)+E(a92,x161491)+E(a30,x161491)+E(a29,x161491)+E(a61,x161491)+E(a83,x161491)+E(a50,x161491)+E(a62,x161491)+E(a39,x161491)+E(a28,x161491)+E(a26,x161491)+E(a27,x161491)
% 32.24/32.06 [16234]~P143(x162341)+P75(x162341)+E(a81,x162341)+E(a90,x162341)+E(a89,x162341)+E(a88,x162341)+E(a87,x162341)+E(a86,x162341)+E(a85,x162341)+E(a84,x162341)+E(a82,x162341)+E(a80,x162341)+E(a79,x162341)+E(a78,x162341)+E(a77,x162341)+E(a76,x162341)+E(a75,x162341)+E(a74,x162341)+E(a72,x162341)+E(a71,x162341)+E(a73,x162341)
% 32.24/32.06 [16211]~P1(x162111)+E(a94,x162111)+E(a103,x162111)+E(a102,x162111)+E(a101,x162111)+E(a100,x162111)+E(a99,x162111)+E(a98,x162111)+E(a97,x162111)+E(a96,x162111)+E(a95,x162111)+E(a93,x162111)+E(a9,x162111)+E(a8,x162111)+E(a7,x162111)+E(a6,x162111)+E(a5,x162111)+E(a4,x162111)+E(a3,x162111)+E(a2,x162111)+E(a104,x162111)+E(a1,x162111)
% 32.24/32.06 [16235]~P123(x162351)+E(a92,x162351)+E(a41,x162351)+E(a40,x162351)+E(a38,x162351)+E(a37,x162351)+E(a36,x162351)+E(a35,x162351)+E(a34,x162351)+E(a33,x162351)+E(a32,x162351)+E(a31,x162351)+E(a91,x162351)+E(a30,x162351)+E(a29,x162351)+E(a61,x162351)+E(a83,x162351)+E(a50,x162351)+E(a62,x162351)+E(a39,x162351)+E(a28,x162351)+E(a26,x162351)+E(a27,x162351)
% 32.24/32.06 [16334]~P68(x163341)+E(a31,x163341)+E(a43,x163341)+E(a42,x163341)+E(a41,x163341)+E(a40,x163341)+E(a38,x163341)+E(a37,x163341)+E(a36,x163341)+E(a35,x163341)+E(a34,x163341)+E(a33,x163341)+E(a32,x163341)+E(a92,x163341)+E(a91,x163341)+E(a30,x163341)+E(a29,x163341)+E(a61,x163341)+E(a83,x163341)+E(a50,x163341)+E(a62,x163341)+E(a39,x163341)+E(a28,x163341)+E(a26,x163341)+E(a27,x163341)
% 32.24/32.06 [16708]~P75(x167081)+P68(x167081)+E(a58,x167081)+E(a70,x167081)+E(a69,x167081)+E(a68,x167081)+E(a67,x167081)+E(a66,x167081)+E(a65,x167081)+E(a64,x167081)+E(a63,x167081)+E(a60,x167081)+E(a59,x167081)+E(a57,x167081)+E(a56,x167081)+E(a55,x167081)+E(a54,x167081)+E(a53,x167081)+E(a52,x167081)+E(a51,x167081)+E(a49,x167081)+E(a48,x167081)+E(a47,x167081)+E(a46,x167081)+E(a45,x167081)+E(a44,x167081)
% 32.24/32.06 %EqnAxiom
% 32.24/32.06 [1]E(x11,x11)
% 32.24/32.06 [2]E(x22,x21)+~E(x21,x22)
% 32.24/32.06 [3]E(x31,x33)+~E(x31,x32)+~E(x32,x33)
% 32.24/32.06 [4]~P1(x41)+P1(x42)+~E(x41,x42)
% 32.24/32.06 [5]P21(x52,x53,x54)+~E(x51,x52)+~P21(x51,x53,x54)
% 32.24/32.06 [6]P21(x63,x62,x64)+~E(x61,x62)+~P21(x63,x61,x64)
% 32.24/32.06 [7]P21(x73,x74,x72)+~E(x71,x72)+~P21(x73,x74,x71)
% 32.24/32.06 [8]P63(x82,x83)+~E(x81,x82)+~P63(x81,x83)
% 32.24/32.06 [9]P63(x93,x92)+~E(x91,x92)+~P63(x93,x91)
% 32.24/32.06 [10]~P122(x101)+P122(x102)+~E(x101,x102)
% 32.24/32.06 [11]P2552(x112,x113,x114)+~E(x111,x112)+~P2552(x111,x113,x114)
% 32.24/32.06 [12]P2552(x123,x122,x124)+~E(x121,x122)+~P2552(x123,x121,x124)
% 32.24/32.06 [13]P2552(x133,x134,x132)+~E(x131,x132)+~P2552(x133,x134,x131)
% 32.24/32.06 [14]P2448(x142,x143,x144)+~E(x141,x142)+~P2448(x141,x143,x144)
% 32.24/32.06 [15]P2448(x153,x152,x154)+~E(x151,x152)+~P2448(x153,x151,x154)
% 32.24/32.06 [16]P2448(x163,x164,x162)+~E(x161,x162)+~P2448(x163,x164,x161)
% 32.24/32.06 [17]P2471(x172,x173)+~E(x171,x172)+~P2471(x171,x173)
% 32.24/32.06 [18]P2471(x183,x182)+~E(x181,x182)+~P2471(x183,x181)
% 32.24/32.06 [19]P2501(x192,x193)+~E(x191,x192)+~P2501(x191,x193)
% 32.24/32.06 [20]P2501(x203,x202)+~E(x201,x202)+~P2501(x203,x201)
% 32.24/32.06 [21]~P143(x211)+P143(x212)+~E(x211,x212)
% 32.24/32.06 [22]P2412(x222,x223,x224)+~E(x221,x222)+~P2412(x221,x223,x224)
% 32.24/32.06 [23]P2412(x233,x232,x234)+~E(x231,x232)+~P2412(x233,x231,x234)
% 32.24/32.06 [24]P2412(x243,x244,x242)+~E(x241,x242)+~P2412(x243,x244,x241)
% 32.24/32.06 [25]~P2508(x251)+P2508(x252)+~E(x251,x252)
% 32.24/32.06 [26]P1218(x262,x263)+~E(x261,x262)+~P1218(x261,x263)
% 32.24/32.06 [27]P1218(x273,x272)+~E(x271,x272)+~P1218(x273,x271)
% 32.24/32.06 [28]~P139(x281)+P139(x282)+~E(x281,x282)
% 32.24/32.06 [29]P1186(x292,x293)+~E(x291,x292)+~P1186(x291,x293)
% 32.24/32.06 [30]P1186(x303,x302)+~E(x301,x302)+~P1186(x303,x301)
% 32.24/32.06 [31]P1199(x312,x313)+~E(x311,x312)+~P1199(x311,x313)
% 32.24/32.06 [32]P1199(x323,x322)+~E(x321,x322)+~P1199(x323,x321)
% 32.24/32.06 [33]~P129(x331)+P129(x332)+~E(x331,x332)
% 32.24/32.06 [34]P1280(x342,x343)+~E(x341,x342)+~P1280(x341,x343)
% 32.24/32.06 [35]P1280(x353,x352)+~E(x351,x352)+~P1280(x353,x351)
% 32.24/32.06 [36]P734(x362,x363)+~E(x361,x362)+~P734(x361,x363)
% 32.24/32.06 [37]P734(x373,x372)+~E(x371,x372)+~P734(x373,x371)
% 32.24/32.06 [38]P2568(x382,x383)+~E(x381,x382)+~P2568(x381,x383)
% 32.24/32.06 [39]P2568(x393,x392)+~E(x391,x392)+~P2568(x393,x391)
% 32.24/32.06 [40]P796(x402,x403)+~E(x401,x402)+~P796(x401,x403)
% 32.24/32.06 [41]P796(x413,x412)+~E(x411,x412)+~P796(x413,x411)
% 32.24/32.06 [42]P270(x422,x423)+~E(x421,x422)+~P270(x421,x423)
% 32.24/32.06 [43]P270(x433,x432)+~E(x431,x432)+~P270(x433,x431)
% 32.24/32.06 [44]P2533(x442,x443,x444)+~E(x441,x442)+~P2533(x441,x443,x444)
% 32.24/32.06 [45]P2533(x453,x452,x454)+~E(x451,x452)+~P2533(x453,x451,x454)
% 32.24/32.06 [46]P2533(x463,x464,x462)+~E(x461,x462)+~P2533(x463,x464,x461)
% 32.24/32.06 [47]~P2(x471)+P2(x472)+~E(x471,x472)
% 32.24/32.06 [48]P1312(x482,x483)+~E(x481,x482)+~P1312(x481,x483)
% 32.24/32.06 [49]P1312(x493,x492)+~E(x491,x492)+~P1312(x493,x491)
% 32.24/32.06 [50]P1259(x502,x503)+~E(x501,x502)+~P1259(x501,x503)
% 32.24/32.06 [51]P1259(x513,x512)+~E(x511,x512)+~P1259(x513,x511)
% 32.24/32.06 [52]~P126(x521)+P126(x522)+~E(x521,x522)
% 32.24/32.06 [53]P1305(x532,x533)+~E(x531,x532)+~P1305(x531,x533)
% 32.24/32.06 [54]P1305(x543,x542)+~E(x541,x542)+~P1305(x543,x541)
% 32.24/32.06 [55]P1262(x552,x553)+~E(x551,x552)+~P1262(x551,x553)
% 32.24/32.06 [56]P1262(x563,x562)+~E(x561,x562)+~P1262(x563,x561)
% 32.24/32.06 [57]P1148(x572,x573)+~E(x571,x572)+~P1148(x571,x573)
% 32.24/32.06 [58]P1148(x583,x582)+~E(x581,x582)+~P1148(x583,x581)
% 32.24/32.06 [59]~P132(x591)+P132(x592)+~E(x591,x592)
% 32.24/32.06 [60]P1253(x602,x603)+~E(x601,x602)+~P1253(x601,x603)
% 32.24/32.06 [61]P1253(x613,x612)+~E(x611,x612)+~P1253(x613,x611)
% 32.24/32.06 [62]P1149(x622,x623)+~E(x621,x622)+~P1149(x621,x623)
% 32.24/32.06 [63]P1149(x633,x632)+~E(x631,x632)+~P1149(x633,x631)
% 32.24/32.06 [64]P1371(x642,x643)+~E(x641,x642)+~P1371(x641,x643)
% 32.24/32.06 [65]P1371(x653,x652)+~E(x651,x652)+~P1371(x653,x651)
% 32.24/32.06 [66]~P119(x661)+P119(x662)+~E(x661,x662)
% 32.24/32.06 [67]P1407(x672,x673)+~E(x671,x672)+~P1407(x671,x673)
% 32.24/32.06 [68]P1407(x683,x682)+~E(x681,x682)+~P1407(x683,x681)
% 32.24/32.06 [69]P1373(x692,x693)+~E(x691,x692)+~P1373(x691,x693)
% 32.24/32.06 [70]P1373(x703,x702)+~E(x701,x702)+~P1373(x703,x701)
% 32.24/32.06 [71]P1370(x712,x713)+~E(x711,x712)+~P1370(x711,x713)
% 32.24/32.06 [72]P1370(x723,x722)+~E(x721,x722)+~P1370(x723,x721)
% 32.24/32.06 [73]P902(x732,x733)+~E(x731,x732)+~P902(x731,x733)
% 32.24/32.06 [74]P902(x743,x742)+~E(x741,x742)+~P902(x743,x741)
% 32.24/32.06 [75]P1425(x752,x753)+~E(x751,x752)+~P1425(x751,x753)
% 32.24/32.06 [76]P1425(x763,x762)+~E(x761,x762)+~P1425(x763,x761)
% 32.24/32.06 [77]P1372(x772,x773)+~E(x771,x772)+~P1372(x771,x773)
% 32.24/32.06 [78]P1372(x783,x782)+~E(x781,x782)+~P1372(x783,x781)
% 32.24/32.06 [79]P1363(x792,x793)+~E(x791,x792)+~P1363(x791,x793)
% 32.24/32.06 [80]P1363(x803,x802)+~E(x801,x802)+~P1363(x803,x801)
% 32.24/32.06 [81]P92(x812,x813)+~E(x811,x812)+~P92(x811,x813)
% 32.24/32.06 [82]P92(x823,x822)+~E(x821,x822)+~P92(x823,x821)
% 32.24/32.06 [83]P1433(x832,x833)+~E(x831,x832)+~P1433(x831,x833)
% 32.24/32.06 [84]P1433(x843,x842)+~E(x841,x842)+~P1433(x843,x841)
% 32.24/32.06 [85]P1365(x852,x853)+~E(x851,x852)+~P1365(x851,x853)
% 32.24/32.06 [86]P1365(x863,x862)+~E(x861,x862)+~P1365(x863,x861)
% 32.24/32.06 [87]P1362(x872,x873)+~E(x871,x872)+~P1362(x871,x873)
% 32.24/32.06 [88]P1362(x883,x882)+~E(x881,x882)+~P1362(x883,x881)
% 32.24/32.06 [89]P356(x892,x893)+~E(x891,x892)+~P356(x891,x893)
% 32.24/32.06 [90]P356(x903,x902)+~E(x901,x902)+~P356(x903,x901)
% 32.24/32.06 [91]P1436(x912,x913)+~E(x911,x912)+~P1436(x911,x913)
% 32.24/32.06 [92]P1436(x923,x922)+~E(x921,x922)+~P1436(x923,x921)
% 32.24/32.06 [93]P1364(x932,x933)+~E(x931,x932)+~P1364(x931,x933)
% 32.24/32.06 [94]P1364(x943,x942)+~E(x941,x942)+~P1364(x943,x941)
% 32.24/32.06 [95]P2530(x952,x953)+~E(x951,x952)+~P2530(x951,x953)
% 32.24/32.06 [96]P2530(x963,x962)+~E(x961,x962)+~P2530(x963,x961)
% 32.24/32.06 [97]~P115(x971)+P115(x972)+~E(x971,x972)
% 32.24/32.06 [98]P2517(x982,x983)+~E(x981,x982)+~P2517(x981,x983)
% 32.24/32.06 [99]P2517(x993,x992)+~E(x991,x992)+~P2517(x993,x991)
% 32.24/32.06 [100]P2584(x1002,x1003)+~E(x1001,x1002)+~P2584(x1001,x1003)
% 32.24/32.06 [101]P2584(x1013,x1012)+~E(x1011,x1012)+~P2584(x1013,x1011)
% 32.24/32.06 [102]P2539(x1022,x1023)+~E(x1021,x1022)+~P2539(x1021,x1023)
% 32.24/32.06 [103]P2539(x1033,x1032)+~E(x1031,x1032)+~P2539(x1033,x1031)
% 32.24/32.06 [104]P94(x1042,x1043)+~E(x1041,x1042)+~P94(x1041,x1043)
% 32.24/32.06 [105]P94(x1053,x1052)+~E(x1051,x1052)+~P94(x1053,x1051)
% 32.24/32.06 [106]P2527(x1062,x1063)+~E(x1061,x1062)+~P2527(x1061,x1063)
% 32.24/32.06 [107]P2527(x1073,x1072)+~E(x1071,x1072)+~P2527(x1073,x1071)
% 32.24/32.06 [108]P2567(x1082,x1083)+~E(x1081,x1082)+~P2567(x1081,x1083)
% 32.24/32.06 [109]P2567(x1093,x1092)+~E(x1091,x1092)+~P2567(x1093,x1091)
% 32.24/32.06 [110]P2537(x1102,x1103)+~E(x1101,x1102)+~P2537(x1101,x1103)
% 32.24/32.06 [111]P2537(x1113,x1112)+~E(x1111,x1112)+~P2537(x1113,x1111)
% 32.24/32.06 [112]~P113(x1121)+P113(x1122)+~E(x1121,x1122)
% 32.24/32.06 [113]P2541(x1132,x1133)+~E(x1131,x1132)+~P2541(x1131,x1133)
% 32.24/32.06 [114]P2541(x1143,x1142)+~E(x1141,x1142)+~P2541(x1143,x1141)
% 32.24/32.06 [115]P2531(x1152,x1153)+~E(x1151,x1152)+~P2531(x1151,x1153)
% 32.24/32.06 [116]P2531(x1163,x1162)+~E(x1161,x1162)+~P2531(x1163,x1161)
% 32.24/32.06 [117]P2478(x1172,x1173)+~E(x1171,x1172)+~P2478(x1171,x1173)
% 32.24/32.06 [118]P2478(x1183,x1182)+~E(x1181,x1182)+~P2478(x1183,x1181)
% 32.24/32.06 [119]P1156(x1192,x1193)+~E(x1191,x1192)+~P1156(x1191,x1193)
% 32.24/32.06 [120]P1156(x1203,x1202)+~E(x1201,x1202)+~P1156(x1203,x1201)
% 32.24/32.06 [121]P1185(x1212,x1213)+~E(x1211,x1212)+~P1185(x1211,x1213)
% 32.24/32.06 [122]P1185(x1223,x1222)+~E(x1221,x1222)+~P1185(x1223,x1221)
% 32.24/32.06 [123]~P2125(x1231)+P2125(x1232)+~E(x1231,x1232)
% 32.24/32.06 [124]P244(x1242,x1243)+~E(x1241,x1242)+~P244(x1241,x1243)
% 32.24/32.06 [125]P244(x1253,x1252)+~E(x1251,x1252)+~P244(x1253,x1251)
% 32.24/32.06 [126]~P486(x1261)+P486(x1262)+~E(x1261,x1262)
% 32.24/32.06 [127]P260(x1272,x1273)+~E(x1271,x1272)+~P260(x1271,x1273)
% 32.24/32.06 [128]P260(x1283,x1282)+~E(x1281,x1282)+~P260(x1283,x1281)
% 32.24/32.06 [129]~P1301(x1291)+P1301(x1292)+~E(x1291,x1292)
% 32.24/32.06 [130]~P1004(x1301)+P1004(x1302)+~E(x1301,x1302)
% 32.24/32.06 [131]~P979(x1311)+P979(x1312)+~E(x1311,x1312)
% 32.24/32.06 [132]P1511(x1322,x1323)+~E(x1321,x1322)+~P1511(x1321,x1323)
% 32.24/32.06 [133]P1511(x1333,x1332)+~E(x1331,x1332)+~P1511(x1333,x1331)
% 32.24/32.06 [134]P182(x1342,x1343)+~E(x1341,x1342)+~P182(x1341,x1343)
% 32.24/32.06 [135]P182(x1353,x1352)+~E(x1351,x1352)+~P182(x1353,x1351)
% 32.24/32.06 [136]P269(x1362,x1363)+~E(x1361,x1362)+~P269(x1361,x1363)
% 32.24/32.06 [137]P269(x1373,x1372)+~E(x1371,x1372)+~P269(x1373,x1371)
% 32.24/32.06 [138]~P130(x1381)+P130(x1382)+~E(x1381,x1382)
% 32.24/32.06 [139]P876(x1392,x1393)+~E(x1391,x1392)+~P876(x1391,x1393)
% 32.24/32.06 [140]P876(x1403,x1402)+~E(x1401,x1402)+~P876(x1403,x1401)
% 32.24/32.06 [141]P1483(x1412,x1413)+~E(x1411,x1412)+~P1483(x1411,x1413)
% 32.24/32.06 [142]P1483(x1423,x1422)+~E(x1421,x1422)+~P1483(x1423,x1421)
% 32.24/32.06 [143]P2174(x1432,x1433)+~E(x1431,x1432)+~P2174(x1431,x1433)
% 32.24/32.06 [144]P2174(x1443,x1442)+~E(x1441,x1442)+~P2174(x1443,x1441)
% 32.24/32.06 [145]~P137(x1451)+P137(x1452)+~E(x1451,x1452)
% 32.24/32.06 [146]P2176(x1462,x1463)+~E(x1461,x1462)+~P2176(x1461,x1463)
% 32.24/32.06 [147]P2176(x1473,x1472)+~E(x1471,x1472)+~P2176(x1473,x1471)
% 32.24/32.06 [148]~P2242(x1481)+P2242(x1482)+~E(x1481,x1482)
% 32.24/32.06 [149]~P2193(x1491)+P2193(x1492)+~E(x1491,x1492)
% 32.24/32.06 [150]~P2195(x1501)+P2195(x1502)+~E(x1501,x1502)
% 32.24/32.06 [151]~P111(x1511)+P111(x1512)+~E(x1511,x1512)
% 32.24/32.06 [152]P2016(x1522,x1523)+~E(x1521,x1522)+~P2016(x1521,x1523)
% 32.24/32.06 [153]P2016(x1533,x1532)+~E(x1531,x1532)+~P2016(x1533,x1531)
% 32.24/32.06 [154]~P2397(x1541)+P2397(x1542)+~E(x1541,x1542)
% 32.24/32.06 [155]P573(x1552,x1553)+~E(x1551,x1552)+~P573(x1551,x1553)
% 32.24/32.06 [156]P573(x1563,x1562)+~E(x1561,x1562)+~P573(x1563,x1561)
% 32.24/32.06 [157]P1041(x1572,x1573)+~E(x1571,x1572)+~P1041(x1571,x1573)
% 32.24/32.06 [158]P1041(x1583,x1582)+~E(x1581,x1582)+~P1041(x1583,x1581)
% 32.24/32.06 [159]P1182(x1592,x1593)+~E(x1591,x1592)+~P1182(x1591,x1593)
% 32.24/32.06 [160]P1182(x1603,x1602)+~E(x1601,x1602)+~P1182(x1603,x1601)
% 32.24/32.06 [161]P2013(x1612,x1613)+~E(x1611,x1612)+~P2013(x1611,x1613)
% 32.24/32.06 [162]P2013(x1623,x1622)+~E(x1621,x1622)+~P2013(x1623,x1621)
% 32.24/32.06 [163]P2132(x1632,x1633)+~E(x1631,x1632)+~P2132(x1631,x1633)
% 32.24/32.06 [164]P2132(x1643,x1642)+~E(x1641,x1642)+~P2132(x1643,x1641)
% 32.24/32.06 [165]P2043(x1652,x1653)+~E(x1651,x1652)+~P2043(x1651,x1653)
% 32.24/32.06 [166]P2043(x1663,x1662)+~E(x1661,x1662)+~P2043(x1663,x1661)
% 32.24/32.06 [167]~P2353(x1671)+P2353(x1672)+~E(x1671,x1672)
% 32.24/32.06 [168]~P2307(x1681)+P2307(x1682)+~E(x1681,x1682)
% 32.24/32.06 [169]~P2309(x1691)+P2309(x1692)+~E(x1691,x1692)
% 32.24/32.06 [170]P915(x1702,x1703)+~E(x1701,x1702)+~P915(x1701,x1703)
% 32.24/32.06 [171]P915(x1713,x1712)+~E(x1711,x1712)+~P915(x1713,x1711)
% 32.24/32.06 [172]~P2556(x1721)+P2556(x1722)+~E(x1721,x1722)
% 32.24/32.06 [173]~P142(x1731)+P142(x1732)+~E(x1731,x1732)
% 32.24/32.06 [174]P913(x1742,x1743)+~E(x1741,x1742)+~P913(x1741,x1743)
% 32.24/32.06 [175]P913(x1753,x1752)+~E(x1751,x1752)+~P913(x1753,x1751)
% 32.24/32.06 [176]P1046(x1762,x1763)+~E(x1761,x1762)+~P1046(x1761,x1763)
% 32.24/32.06 [177]P1046(x1773,x1772)+~E(x1771,x1772)+~P1046(x1773,x1771)
% 32.24/32.06 [178]P1155(x1782,x1783)+~E(x1781,x1782)+~P1155(x1781,x1783)
% 32.24/32.06 [179]P1155(x1793,x1792)+~E(x1791,x1792)+~P1155(x1793,x1791)
% 32.24/32.06 [180]P170(x1802,x1803)+~E(x1801,x1802)+~P170(x1801,x1803)
% 32.24/32.06 [181]P170(x1813,x1812)+~E(x1811,x1812)+~P170(x1813,x1811)
% 32.24/32.06 [182]~P127(x1821)+P127(x1822)+~E(x1821,x1822)
% 32.24/32.06 [183]P191(x1832,x1833)+~E(x1831,x1832)+~P191(x1831,x1833)
% 32.24/32.06 [184]P191(x1843,x1842)+~E(x1841,x1842)+~P191(x1843,x1841)
% 32.24/32.06 [185]~P240(x1851)+P240(x1852)+~E(x1851,x1852)
% 32.24/32.06 [186]~P188(x1861)+P188(x1862)+~E(x1861,x1862)
% 32.24/32.06 [187]~P190(x1871)+P190(x1872)+~E(x1871,x1872)
% 32.24/32.06 [188]P1272(x1882,x1883)+~E(x1881,x1882)+~P1272(x1881,x1883)
% 32.24/32.06 [189]P1272(x1893,x1892)+~E(x1891,x1892)+~P1272(x1893,x1891)
% 32.24/32.06 [190]P1741(x1902,x1903)+~E(x1901,x1902)+~P1741(x1901,x1903)
% 32.24/32.06 [191]P1741(x1913,x1912)+~E(x1911,x1912)+~P1741(x1913,x1911)
% 32.24/32.06 [192]P1229(x1922,x1923)+~E(x1921,x1922)+~P1229(x1921,x1923)
% 32.24/32.06 [193]P1229(x1933,x1932)+~E(x1931,x1932)+~P1229(x1933,x1931)
% 32.24/32.06 [194]P1266(x1942,x1943)+~E(x1941,x1942)+~P1266(x1941,x1943)
% 32.24/32.06 [195]P1266(x1953,x1952)+~E(x1951,x1952)+~P1266(x1953,x1951)
% 32.24/32.06 [196]P1291(x1962,x1963)+~E(x1961,x1962)+~P1291(x1961,x1963)
% 32.24/32.06 [197]P1291(x1973,x1972)+~E(x1971,x1972)+~P1291(x1973,x1971)
% 32.24/32.06 [198]P1289(x1982,x1983)+~E(x1981,x1982)+~P1289(x1981,x1983)
% 32.24/32.06 [199]P1289(x1993,x1992)+~E(x1991,x1992)+~P1289(x1993,x1991)
% 32.24/32.06 [200]P1011(x2002,x2003)+~E(x2001,x2002)+~P1011(x2001,x2003)
% 32.24/32.06 [201]P1011(x2013,x2012)+~E(x2011,x2012)+~P1011(x2013,x2011)
% 32.24/32.06 [202]P88(x2022,x2023)+~E(x2021,x2022)+~P88(x2021,x2023)
% 32.24/32.06 [203]P88(x2033,x2032)+~E(x2031,x2032)+~P88(x2033,x2031)
% 32.24/32.06 [204]P1710(x2042,x2043)+~E(x2041,x2042)+~P1710(x2041,x2043)
% 32.24/32.06 [205]P1710(x2053,x2052)+~E(x2051,x2052)+~P1710(x2053,x2051)
% 32.24/32.06 [206]~P1658(x2061)+P1658(x2062)+~E(x2061,x2062)
% 32.24/32.06 [207]~P1643(x2071)+P1643(x2072)+~E(x2071,x2072)
% 32.24/32.06 [208]~P1644(x2081)+P1644(x2082)+~E(x2081,x2082)
% 32.24/32.06 [209]P1316(x2092,x2093)+~E(x2091,x2092)+~P1316(x2091,x2093)
% 32.24/32.06 [210]P1316(x2103,x2102)+~E(x2101,x2102)+~P1316(x2103,x2101)
% 32.24/32.06 [211]P353(x2112,x2113)+~E(x2111,x2112)+~P353(x2111,x2113)
% 32.24/32.06 [212]P353(x2123,x2122)+~E(x2121,x2122)+~P353(x2123,x2121)
% 32.24/32.06 [213]~P121(x2131)+P121(x2132)+~E(x2131,x2132)
% 32.24/32.06 [214]~P118(x2141)+P118(x2142)+~E(x2141,x2142)
% 32.24/32.06 [215]~P3(x2151)+P3(x2152)+~E(x2151,x2152)
% 32.24/32.06 [216]P1311(x2162,x2163)+~E(x2161,x2162)+~P1311(x2161,x2163)
% 32.24/32.06 [217]P1311(x2173,x2172)+~E(x2171,x2172)+~P1311(x2173,x2171)
% 32.24/32.06 [218]P1254(x2182,x2183)+~E(x2181,x2182)+~P1254(x2181,x2183)
% 32.24/32.06 [219]P1254(x2193,x2192)+~E(x2191,x2192)+~P1254(x2193,x2191)
% 32.24/32.06 [220]~P120(x2201)+P120(x2202)+~E(x2201,x2202)
% 32.24/32.06 [221]P96(x2212,x2213)+~E(x2211,x2212)+~P96(x2211,x2213)
% 32.24/32.06 [222]P96(x2223,x2222)+~E(x2221,x2222)+~P96(x2223,x2221)
% 32.24/32.06 [223]P1338(x2232,x2233)+~E(x2231,x2232)+~P1338(x2231,x2233)
% 32.24/32.06 [224]P1338(x2243,x2242)+~E(x2241,x2242)+~P1338(x2243,x2241)
% 32.24/32.06 [225]~P4(x2251)+P4(x2252)+~E(x2251,x2252)
% 32.24/32.06 [226]P81(x2262,x2263)+~E(x2261,x2262)+~P81(x2261,x2263)
% 32.24/32.06 [227]P81(x2273,x2272)+~E(x2271,x2272)+~P81(x2273,x2271)
% 32.24/32.06 [228]P375(x2282,x2283)+~E(x2281,x2282)+~P375(x2281,x2283)
% 32.24/32.06 [229]P375(x2293,x2292)+~E(x2291,x2292)+~P375(x2293,x2291)
% 32.24/32.06 [230]P1437(x2302,x2303)+~E(x2301,x2302)+~P1437(x2301,x2303)
% 32.24/32.06 [231]P1437(x2313,x2312)+~E(x2311,x2312)+~P1437(x2313,x2311)
% 32.24/32.06 [232]P87(x2322,x2323)+~E(x2321,x2322)+~P87(x2321,x2323)
% 32.24/32.06 [233]P87(x2333,x2332)+~E(x2331,x2332)+~P87(x2333,x2331)
% 32.24/32.06 [234]P91(x2342,x2343)+~E(x2341,x2342)+~P91(x2341,x2343)
% 32.24/32.06 [235]P91(x2353,x2352)+~E(x2351,x2352)+~P91(x2353,x2351)
% 32.24/32.06 [236]~P5(x2361)+P5(x2362)+~E(x2361,x2362)
% 32.24/32.06 [237]~P344(x2371)+P344(x2372)+~E(x2371,x2372)
% 32.24/32.06 [238]~P1917(x2381)+P1917(x2382)+~E(x2381,x2382)
% 32.24/32.06 [239]P2088(x2392,x2393)+~E(x2391,x2392)+~P2088(x2391,x2393)
% 32.24/32.06 [240]P2088(x2403,x2402)+~E(x2401,x2402)+~P2088(x2403,x2401)
% 32.24/32.06 [241]~P6(x2411)+P6(x2412)+~E(x2411,x2412)
% 32.24/32.06 [242]P562(x2422,x2423)+~E(x2421,x2422)+~P562(x2421,x2423)
% 32.24/32.06 [243]P562(x2433,x2432)+~E(x2431,x2432)+~P562(x2433,x2431)
% 32.24/32.06 [244]~P44(x2441)+P44(x2442)+~E(x2441,x2442)
% 32.24/32.06 [245]P2354(x2452,x2453)+~E(x2451,x2452)+~P2354(x2451,x2453)
% 32.24/32.06 [246]P2354(x2463,x2462)+~E(x2461,x2462)+~P2354(x2463,x2461)
% 32.24/32.06 [247]~P2346(x2471)+P2346(x2472)+~E(x2471,x2472)
% 32.24/32.06 [248]~P106(x2481)+P106(x2482)+~E(x2481,x2482)
% 32.24/32.06 [249]~P7(x2491)+P7(x2492)+~E(x2491,x2492)
% 32.24/32.06 [250]~P1530(x2501)+P1530(x2502)+~E(x2501,x2502)
% 32.24/32.06 [251]~P1526(x2511)+P1526(x2512)+~E(x2511,x2512)
% 32.24/32.06 [252]~P1527(x2521)+P1527(x2522)+~E(x2521,x2522)
% 32.24/32.06 [253]~P8(x2531)+P8(x2532)+~E(x2531,x2532)
% 32.24/32.06 [254]~P1729(x2541)+P1729(x2542)+~E(x2541,x2542)
% 32.24/32.06 [255]~P1544(x2551)+P1544(x2552)+~E(x2551,x2552)
% 32.24/32.06 [256]~P1730(x2561)+P1730(x2562)+~E(x2561,x2562)
% 32.24/32.06 [257]~P9(x2571)+P9(x2572)+~E(x2571,x2572)
% 32.24/32.06 [258]P1646(x2582,x2583)+~E(x2581,x2582)+~P1646(x2581,x2583)
% 32.24/32.06 [259]P1646(x2593,x2592)+~E(x2591,x2592)+~P1646(x2593,x2591)
% 32.24/32.06 [260]~P10(x2601)+P10(x2602)+~E(x2601,x2602)
% 32.24/32.06 [261]P312(x2612,x2613)+~E(x2611,x2612)+~P312(x2611,x2613)
% 32.24/32.06 [262]P312(x2623,x2622)+~E(x2621,x2622)+~P312(x2623,x2621)
% 32.24/32.06 [263]~P2087(x2631)+P2087(x2632)+~E(x2631,x2632)
% 32.24/32.06 [264]~P2078(x2641)+P2078(x2642)+~E(x2641,x2642)
% 32.24/32.06 [265]~P2084(x2651)+P2084(x2652)+~E(x2651,x2652)
% 32.24/32.06 [266]~P86(x2661)+P86(x2662)+~E(x2661,x2662)
% 32.24/32.06 [267]~P11(x2671)+P11(x2672)+~E(x2671,x2672)
% 32.24/32.06 [268]~P2407(x2681)+P2407(x2682)+~E(x2681,x2682)
% 32.24/32.06 [269]~P12(x2691)+P12(x2692)+~E(x2691,x2692)
% 32.24/32.06 [270]~P306(x2701)+P306(x2702)+~E(x2701,x2702)
% 32.24/32.06 [271]~P611(x2711)+P611(x2712)+~E(x2711,x2712)
% 32.24/32.06 [272]~P933(x2721)+P933(x2722)+~E(x2721,x2722)
% 32.24/32.06 [273]~P13(x2731)+P13(x2732)+~E(x2731,x2732)
% 32.24/32.06 [274]~P825(x2741)+P825(x2742)+~E(x2741,x2742)
% 32.24/32.06 [275]~P55(x2751)+P55(x2752)+~E(x2751,x2752)
% 32.24/32.06 [276]~P1755(x2761)+P1755(x2762)+~E(x2761,x2762)
% 32.24/32.06 [277]~P1771(x2771)+P1771(x2772)+~E(x2771,x2772)
% 32.24/32.06 [278]~P800(x2781)+P800(x2782)+~E(x2781,x2782)
% 32.24/32.06 [279]~P39(x2791)+P39(x2792)+~E(x2791,x2792)
% 32.24/32.06 [280]~P144(x2801)+P144(x2802)+~E(x2801,x2802)
% 32.24/32.06 [281]~P14(x2811)+P14(x2812)+~E(x2811,x2812)
% 32.24/32.06 [282]~P42(x2821)+P42(x2822)+~E(x2821,x2822)
% 32.24/32.06 [283]P2241(x2832,x2833)+~E(x2831,x2832)+~P2241(x2831,x2833)
% 32.24/32.06 [284]P2241(x2843,x2842)+~E(x2841,x2842)+~P2241(x2843,x2841)
% 32.24/32.06 [285]~P48(x2851)+P48(x2852)+~E(x2851,x2852)
% 32.24/32.06 [286]P1265(x2862,x2863)+~E(x2861,x2862)+~P1265(x2861,x2863)
% 32.24/32.06 [287]P1265(x2873,x2872)+~E(x2871,x2872)+~P1265(x2873,x2871)
% 32.24/32.06 [288]~P37(x2881)+P37(x2882)+~E(x2881,x2882)
% 32.24/32.06 [289]~P147(x2891)+P147(x2892)+~E(x2891,x2892)
% 32.24/32.06 [290]~P148(x2901)+P148(x2902)+~E(x2901,x2902)
% 32.24/32.06 [291]~P149(x2911)+P149(x2912)+~E(x2911,x2912)
% 32.24/32.06 [292]~P150(x2921)+P150(x2922)+~E(x2921,x2922)
% 32.24/32.06 [293]~P151(x2931)+P151(x2932)+~E(x2931,x2932)
% 32.24/32.06 [294]~P152(x2941)+P152(x2942)+~E(x2941,x2942)
% 32.24/32.06 [295]~P153(x2951)+P153(x2952)+~E(x2951,x2952)
% 32.24/32.06 [296]~P154(x2961)+P154(x2962)+~E(x2961,x2962)
% 32.24/32.06 [297]~P46(x2971)+P46(x2972)+~E(x2971,x2972)
% 32.24/32.06 [298]~P43(x2981)+P43(x2982)+~E(x2981,x2982)
% 32.24/32.06 [299]~P57(x2991)+P57(x2992)+~E(x2991,x2992)
% 32.24/32.06 [300]P1867(x3002,x3003)+~E(x3001,x3002)+~P1867(x3001,x3003)
% 32.24/32.06 [301]P1867(x3013,x3012)+~E(x3011,x3012)+~P1867(x3013,x3011)
% 32.24/32.06 [302]~P1868(x3021)+P1868(x3022)+~E(x3021,x3022)
% 32.24/32.06 [303]P1819(x3032,x3033)+~E(x3031,x3032)+~P1819(x3031,x3033)
% 32.24/32.06 [304]P1819(x3043,x3042)+~E(x3041,x3042)+~P1819(x3043,x3041)
% 32.24/32.06 [305]P1342(x3052,x3053)+~E(x3051,x3052)+~P1342(x3051,x3053)
% 32.24/32.06 [306]P1342(x3063,x3062)+~E(x3061,x3062)+~P1342(x3063,x3061)
% 32.24/32.06 [307]~P49(x3071)+P49(x3072)+~E(x3071,x3072)
% 32.24/32.06 [308]~P805(x3081)+P805(x3082)+~E(x3081,x3082)
% 32.24/32.06 [309]~P1495(x3091)+P1495(x3092)+~E(x3091,x3092)
% 32.24/32.06 [310]~P58(x3101)+P58(x3102)+~E(x3101,x3102)
% 32.24/32.06 [311]~P70(x3111)+P70(x3112)+~E(x3111,x3112)
% 32.24/32.06 [312]~P2451(x3121)+P2451(x3122)+~E(x3121,x3122)
% 32.24/32.06 [313]~P794(x3131)+P794(x3132)+~E(x3131,x3132)
% 32.24/32.06 [314]~P1500(x3141)+P1500(x3142)+~E(x3141,x3142)
% 32.24/32.06 [315]~P56(x3151)+P56(x3152)+~E(x3151,x3152)
% 32.24/32.06 [316]~P444(x3161)+P444(x3162)+~E(x3161,x3162)
% 32.24/32.06 [317]P2003(x3172,x3173)+~E(x3171,x3172)+~P2003(x3171,x3173)
% 32.24/32.06 [318]P2003(x3183,x3182)+~E(x3181,x3182)+~P2003(x3183,x3181)
% 32.24/32.06 [319]~P50(x3191)+P50(x3192)+~E(x3191,x3192)
% 32.24/32.06 [320]~P879(x3201)+P879(x3202)+~E(x3201,x3202)
% 32.24/32.06 [321]~P59(x3211)+P59(x3212)+~E(x3211,x3212)
% 32.24/32.06 [322]P2019(x3222,x3223)+~E(x3221,x3222)+~P2019(x3221,x3223)
% 32.24/32.06 [323]P2019(x3233,x3232)+~E(x3231,x3232)+~P2019(x3233,x3231)
% 32.24/32.06 [324]~P1601(x3241)+P1601(x3242)+~E(x3241,x3242)
% 32.24/32.06 [325]~P801(x3251)+P801(x3252)+~E(x3251,x3252)
% 32.24/32.06 [326]~P51(x3261)+P51(x3262)+~E(x3261,x3262)
% 32.24/32.06 [327]~P2191(x3271)+P2191(x3272)+~E(x3271,x3272)
% 32.24/32.06 [328]P1282(x3282,x3283)+~E(x3281,x3282)+~P1282(x3281,x3283)
% 32.24/32.06 [329]P1282(x3293,x3292)+~E(x3291,x3292)+~P1282(x3293,x3291)
% 32.24/32.06 [330]~P53(x3301)+P53(x3302)+~E(x3301,x3302)
% 32.24/32.06 [331]~P803(x3311)+P803(x3312)+~E(x3311,x3312)
% 32.24/32.06 [332]~P47(x3321)+P47(x3322)+~E(x3321,x3322)
% 32.24/32.06 [333]~P34(x3331)+P34(x3332)+~E(x3331,x3332)
% 32.24/32.06 [334]~P2382(x3341)+P2382(x3342)+~E(x3341,x3342)
% 32.24/32.06 [335]~P60(x3351)+P60(x3352)+~E(x3351,x3352)
% 32.24/32.06 [336]P2079(x3362,x3363)+~E(x3361,x3362)+~P2079(x3361,x3363)
% 32.24/32.06 [337]P2079(x3373,x3372)+~E(x3371,x3372)+~P2079(x3373,x3371)
% 32.24/32.06 [338]P1622(x3382,x3383)+~E(x3381,x3382)+~P1622(x3381,x3383)
% 32.24/32.06 [339]P1622(x3393,x3392)+~E(x3391,x3392)+~P1622(x3393,x3391)
% 32.24/32.06 [340]~P1607(x3401)+P1607(x3402)+~E(x3401,x3402)
% 32.24/32.06 [341]~P1893(x3411)+P1893(x3412)+~E(x3411,x3412)
% 32.24/32.06 [342]P1897(x3422,x3423)+~E(x3421,x3422)+~P1897(x3421,x3423)
% 32.24/32.06 [343]P1897(x3433,x3432)+~E(x3431,x3432)+~P1897(x3433,x3431)
% 32.24/32.06 [344]~P1831(x3441)+P1831(x3442)+~E(x3441,x3442)
% 32.24/32.06 [345]P1892(x3452,x3453)+~E(x3451,x3452)+~P1892(x3451,x3453)
% 32.24/32.06 [346]P1892(x3463,x3462)+~E(x3461,x3462)+~P1892(x3463,x3461)
% 32.24/32.06 [347]~P61(x3471)+P61(x3472)+~E(x3471,x3472)
% 32.24/32.06 [348]~P2086(x3481)+P2086(x3482)+~E(x3481,x3482)
% 32.24/32.06 [349]P1009(x3492,x3493)+~E(x3491,x3492)+~P1009(x3491,x3493)
% 32.24/32.06 [350]P1009(x3503,x3502)+~E(x3501,x3502)+~P1009(x3503,x3501)
% 32.24/32.06 [351]~P2094(x3511)+P2094(x3512)+~E(x3511,x3512)
% 32.24/32.06 [352]P554(x3522,x3523)+~E(x3521,x3522)+~P554(x3521,x3523)
% 32.24/32.06 [353]P554(x3533,x3532)+~E(x3531,x3532)+~P554(x3533,x3531)
% 32.24/32.06 [354]P757(x3542,x3543)+~E(x3541,x3542)+~P757(x3541,x3543)
% 32.24/32.06 [355]P757(x3553,x3552)+~E(x3551,x3552)+~P757(x3553,x3551)
% 32.24/32.06 [356]~P541(x3561)+P541(x3562)+~E(x3561,x3562)
% 32.24/32.06 [357]~P2098(x3571)+P2098(x3572)+~E(x3571,x3572)
% 32.24/32.06 [358]P1647(x3582,x3583)+~E(x3581,x3582)+~P1647(x3581,x3583)
% 32.24/32.06 [359]P1647(x3593,x3592)+~E(x3591,x3592)+~P1647(x3593,x3591)
% 32.24/32.06 [360]~P1408(x3601)+P1408(x3602)+~E(x3601,x3602)
% 32.24/32.06 [361]~P552(x3611)+P552(x3612)+~E(x3611,x3612)
% 32.24/32.06 [362]P2480(x3622,x3623)+~E(x3621,x3622)+~P2480(x3621,x3623)
% 32.24/32.06 [363]P2480(x3633,x3632)+~E(x3631,x3632)+~P2480(x3633,x3631)
% 32.24/32.06 [364]~P2479(x3641)+P2479(x3642)+~E(x3641,x3642)
% 32.24/32.06 [365]P2093(x3652,x3653)+~E(x3651,x3652)+~P2093(x3651,x3653)
% 32.24/32.06 [366]P2093(x3663,x3662)+~E(x3661,x3662)+~P2093(x3663,x3661)
% 32.24/32.06 [367]P2576(x3672,x3673)+~E(x3671,x3672)+~P2576(x3671,x3673)
% 32.24/32.06 [368]P2576(x3683,x3682)+~E(x3681,x3682)+~P2576(x3683,x3681)
% 32.24/32.06 [369]~P2575(x3691)+P2575(x3692)+~E(x3691,x3692)
% 32.24/32.06 [370]~P181(x3701)+P181(x3702)+~E(x3701,x3702)
% 32.24/32.06 [371]P449(x3712,x3713)+~E(x3711,x3712)+~P449(x3711,x3713)
% 32.24/32.06 [372]P449(x3723,x3722)+~E(x3721,x3722)+~P449(x3723,x3721)
% 32.24/32.06 [373]~P424(x3731)+P424(x3732)+~E(x3731,x3732)
% 32.24/32.06 [374]P336(x3742,x3743)+~E(x3741,x3742)+~P336(x3741,x3743)
% 32.24/32.06 [375]P336(x3753,x3752)+~E(x3751,x3752)+~P336(x3753,x3751)
% 32.24/32.06 [376]P519(x3762,x3763)+~E(x3761,x3762)+~P519(x3761,x3763)
% 32.24/32.06 [377]P519(x3773,x3772)+~E(x3771,x3772)+~P519(x3773,x3771)
% 32.24/32.06 [378]~P478(x3781)+P478(x3782)+~E(x3781,x3782)
% 32.24/32.06 [379]P1510(x3792,x3793)+~E(x3791,x3792)+~P1510(x3791,x3793)
% 32.24/32.06 [380]P1510(x3803,x3802)+~E(x3801,x3802)+~P1510(x3803,x3801)
% 32.24/32.06 [381]P313(x3812,x3813)+~E(x3811,x3812)+~P313(x3811,x3813)
% 32.24/32.06 [382]P313(x3823,x3822)+~E(x3821,x3822)+~P313(x3823,x3821)
% 32.24/32.06 [383]~P559(x3831)+P559(x3832)+~E(x3831,x3832)
% 32.24/32.06 [384]~P1508(x3841)+P1508(x3842)+~E(x3841,x3842)
% 32.24/32.06 [385]~P2421(x3851)+P2421(x3852)+~E(x3851,x3852)
% 32.24/32.06 [386]~P545(x3861)+P545(x3862)+~E(x3861,x3862)
% 32.24/32.06 [387]P472(x3872,x3873)+~E(x3871,x3872)+~P472(x3871,x3873)
% 32.24/32.06 [388]P472(x3883,x3882)+~E(x3881,x3882)+~P472(x3883,x3881)
% 32.24/32.06 [389]P568(x3892,x3893)+~E(x3891,x3892)+~P568(x3891,x3893)
% 32.24/32.06 [390]P568(x3903,x3902)+~E(x3901,x3902)+~P568(x3903,x3901)
% 32.24/32.06 [391]~P529(x3911)+P529(x3912)+~E(x3911,x3912)
% 32.24/32.06 [392]~P2438(x3921)+P2438(x3922)+~E(x3921,x3922)
% 32.24/32.06 [393]~P62(x3931)+P62(x3932)+~E(x3931,x3932)
% 32.24/32.06 [394]~P2514(x3941)+P2514(x3942)+~E(x3941,x3942)
% 32.24/32.06 [395]~P2515(x3951)+P2515(x3952)+~E(x3951,x3952)
% 32.24/32.06 [396]~P2596(x3961)+P2596(x3962)+~E(x3961,x3962)
% 32.24/32.06 [397]~P2503(x3971)+P2503(x3972)+~E(x3971,x3972)
% 32.24/32.06 [398]~P162(x3981)+P162(x3982)+~E(x3981,x3982)
% 32.24/32.06 [399]P1170(x3992,x3993)+~E(x3991,x3992)+~P1170(x3991,x3993)
% 32.24/32.06 [400]P1170(x4003,x4002)+~E(x4001,x4002)+~P1170(x4003,x4001)
% 32.24/32.06 [401]~P2595(x4011)+P2595(x4012)+~E(x4011,x4012)
% 32.24/32.06 [402]~P2513(x4021)+P2513(x4022)+~E(x4021,x4022)
% 32.24/32.06 [403]~P2295(x4031)+P2295(x4032)+~E(x4031,x4032)
% 32.24/32.06 [404]P345(x4042,x4043)+~E(x4041,x4042)+~P345(x4041,x4043)
% 32.24/32.06 [405]P345(x4053,x4052)+~E(x4051,x4052)+~P345(x4053,x4051)
% 32.24/32.06 [406]~P2594(x4061)+P2594(x4062)+~E(x4061,x4062)
% 32.24/32.06 [407]P1915(x4072,x4073)+~E(x4071,x4072)+~P1915(x4071,x4073)
% 32.24/32.06 [408]P1915(x4083,x4082)+~E(x4081,x4082)+~P1915(x4083,x4081)
% 32.24/32.06 [409]~P2602(x4091)+P2602(x4092)+~E(x4091,x4092)
% 32.24/32.06 [410]~P485(x4101)+P485(x4102)+~E(x4101,x4102)
% 32.24/32.06 [411]~P166(x4111)+P166(x4112)+~E(x4111,x4112)
% 32.24/32.06 [412]~P36(x4121)+P36(x4122)+~E(x4121,x4122)
% 32.24/32.06 [413]~P38(x4131)+P38(x4132)+~E(x4131,x4132)
% 32.24/32.06 [414]~P45(x4141)+P45(x4142)+~E(x4141,x4142)
% 32.24/32.06 [415]~P15(x4151)+P15(x4152)+~E(x4151,x4152)
% 32.24/32.06 [416]~P157(x4161)+P157(x4162)+~E(x4161,x4162)
% 32.24/32.06 [417]P564(x4172,x4173)+~E(x4171,x4172)+~P564(x4171,x4173)
% 32.24/32.06 [418]P564(x4183,x4182)+~E(x4181,x4182)+~P564(x4183,x4181)
% 32.24/32.06 [419]P1962(x4192,x4193)+~E(x4191,x4192)+~P1962(x4191,x4193)
% 32.24/32.06 [420]P1962(x4203,x4202)+~E(x4201,x4202)+~P1962(x4203,x4201)
% 32.24/32.06 [421]~P540(x4211)+P540(x4212)+~E(x4211,x4212)
% 32.24/32.06 [422]P546(x4222,x4223)+~E(x4221,x4222)+~P546(x4221,x4223)
% 32.24/32.06 [423]P546(x4233,x4232)+~E(x4231,x4232)+~P546(x4233,x4231)
% 32.24/32.06 [424]P1184(x4242,x4243)+~E(x4241,x4242)+~P1184(x4241,x4243)
% 32.24/32.06 [425]P1184(x4253,x4252)+~E(x4251,x4252)+~P1184(x4253,x4251)
% 32.24/32.06 [426]~P311(x4261)+P311(x4262)+~E(x4261,x4262)
% 32.24/32.06 [427]~P16(x4271)+P16(x4272)+~E(x4271,x4272)
% 32.24/32.06 [428]~P512(x4281)+P512(x4282)+~E(x4281,x4282)
% 32.24/32.06 [429]~P1459(x4291)+P1459(x4292)+~E(x4291,x4292)
% 32.24/32.06 [430]~P815(x4301)+P815(x4302)+~E(x4301,x4302)
% 32.24/32.06 [431]~P511(x4311)+P511(x4312)+~E(x4311,x4312)
% 32.24/32.06 [432]~P1525(x4321)+P1525(x4322)+~E(x4321,x4322)
% 32.24/32.06 [433]P2511(x4332,x4333)+~E(x4331,x4332)+~P2511(x4331,x4333)
% 32.24/32.06 [434]P2511(x4343,x4342)+~E(x4341,x4342)+~P2511(x4343,x4341)
% 32.24/32.06 [435]~P155(x4351)+P155(x4352)+~E(x4351,x4352)
% 32.24/32.06 [436]~P32(x4361)+P32(x4362)+~E(x4361,x4362)
% 32.24/32.06 [437]~P866(x4371)+P866(x4372)+~E(x4371,x4372)
% 32.24/32.06 [438]~P935(x4381)+P935(x4382)+~E(x4381,x4382)
% 32.24/32.06 [439]P1331(x4392,x4393)+~E(x4391,x4392)+~P1331(x4391,x4393)
% 32.24/32.06 [440]P1331(x4403,x4402)+~E(x4401,x4402)+~P1331(x4403,x4401)
% 32.24/32.06 [441]~P960(x4411)+P960(x4412)+~E(x4411,x4412)
% 32.24/32.06 [442]~P52(x4421)+P52(x4422)+~E(x4421,x4422)
% 32.24/32.06 [443]P2445(x4432,x4433)+~E(x4431,x4432)+~P2445(x4431,x4433)
% 32.24/32.06 [444]P2445(x4443,x4442)+~E(x4441,x4442)+~P2445(x4443,x4441)
% 32.24/32.06 [445]~P54(x4451)+P54(x4452)+~E(x4451,x4452)
% 32.24/32.06 [446]~P2269(x4461)+P2269(x4462)+~E(x4461,x4462)
% 32.24/32.06 [447]~P2085(x4471)+P2085(x4472)+~E(x4471,x4472)
% 32.24/32.06 [448]~P35(x4481)+P35(x4482)+~E(x4481,x4482)
% 32.24/32.06 [449]~P2396(x4491)+P2396(x4492)+~E(x4491,x4492)
% 32.24/32.06 [450]~P40(x4501)+P40(x4502)+~E(x4501,x4502)
% 32.24/32.06 [451]P165(x4512,x4513)+~E(x4511,x4512)+~P165(x4511,x4513)
% 32.24/32.06 [452]P165(x4523,x4522)+~E(x4521,x4522)+~P165(x4523,x4521)
% 32.24/32.06 [453]~P33(x4531)+P33(x4532)+~E(x4531,x4532)
% 32.24/32.06 [454]~P41(x4541)+P41(x4542)+~E(x4541,x4542)
% 32.24/32.06 [455]P1235(x4552,x4553)+~E(x4551,x4552)+~P1235(x4551,x4553)
% 32.24/32.06 [456]P1235(x4563,x4562)+~E(x4561,x4562)+~P1235(x4563,x4561)
% 32.24/32.06 [457]P2018(x4572,x4573)+~E(x4571,x4572)+~P2018(x4571,x4573)
% 32.24/32.06 [458]P2018(x4583,x4582)+~E(x4581,x4582)+~P2018(x4583,x4581)
% 32.24/32.06 [459]P1190(x4592,x4593)+~E(x4591,x4592)+~P1190(x4591,x4593)
% 32.24/32.06 [460]P1190(x4603,x4602)+~E(x4601,x4602)+~P1190(x4603,x4601)
% 32.24/32.06 [461]P1216(x4612,x4613)+~E(x4611,x4612)+~P1216(x4611,x4613)
% 32.24/32.06 [462]P1216(x4623,x4622)+~E(x4621,x4622)+~P1216(x4623,x4621)
% 32.24/32.06 [463]P1202(x4632,x4633)+~E(x4631,x4632)+~P1202(x4631,x4633)
% 32.24/32.06 [464]P1202(x4643,x4642)+~E(x4641,x4642)+~P1202(x4643,x4641)
% 32.24/32.06 [465]P95(x4652,x4653)+~E(x4651,x4652)+~P95(x4651,x4653)
% 32.24/32.06 [466]P95(x4663,x4662)+~E(x4661,x4662)+~P95(x4663,x4661)
% 32.24/32.06 [467]P2131(x4672,x4673)+~E(x4671,x4672)+~P2131(x4671,x4673)
% 32.24/32.06 [468]P2131(x4683,x4682)+~E(x4681,x4682)+~P2131(x4683,x4681)
% 32.24/32.06 [469]~P133(x4691)+P133(x4692)+~E(x4691,x4692)
% 32.24/32.06 [470]P2536(x4702,x4703)+~E(x4701,x4702)+~P2536(x4701,x4703)
% 32.24/32.06 [471]P2536(x4713,x4712)+~E(x4711,x4712)+~P2536(x4713,x4711)
% 32.24/32.06 [472]P156(x4722,x4723)+~E(x4721,x4722)+~P156(x4721,x4723)
% 32.24/32.06 [473]P156(x4733,x4732)+~E(x4731,x4732)+~P156(x4733,x4731)
% 32.24/32.06 [474]P20(x4742,x4743)+~E(x4741,x4742)+~P20(x4741,x4743)
% 32.24/32.06 [475]P20(x4753,x4752)+~E(x4751,x4752)+~P20(x4753,x4751)
% 32.24/32.06 [476]P917(x4762,x4763)+~E(x4761,x4762)+~P917(x4761,x4763)
% 32.24/32.06 [477]P917(x4773,x4772)+~E(x4771,x4772)+~P917(x4773,x4771)
% 32.24/32.06 [478]~P2129(x4781)+P2129(x4782)+~E(x4781,x4782)
% 32.24/32.06 [479]P2462(x4792,x4793)+~E(x4791,x4792)+~P2462(x4791,x4793)
% 32.24/32.06 [480]P2462(x4803,x4802)+~E(x4801,x4802)+~P2462(x4803,x4801)
% 32.24/32.06 [481]~P2600(x4811)+P2600(x4812)+~E(x4811,x4812)
% 32.24/32.06 [482]P2464(x4822,x4823)+~E(x4821,x4822)+~P2464(x4821,x4823)
% 32.24/32.06 [483]P2464(x4833,x4832)+~E(x4831,x4832)+~P2464(x4833,x4831)
% 32.24/32.06 [484]~P328(x4841)+P328(x4842)+~E(x4841,x4842)
% 32.24/32.06 [485]P89(x4852,x4853)+~E(x4851,x4852)+~P89(x4851,x4853)
% 32.24/32.06 [486]P89(x4863,x4862)+~E(x4861,x4862)+~P89(x4863,x4861)
% 32.24/32.06 [487]~P331(x4871)+P331(x4872)+~E(x4871,x4872)
% 32.24/32.06 [488]P2465(x4882,x4883)+~E(x4881,x4882)+~P2465(x4881,x4883)
% 32.24/32.06 [489]P2465(x4893,x4892)+~E(x4891,x4892)+~P2465(x4893,x4891)
% 32.24/32.06 [490]P1227(x4902,x4903)+~E(x4901,x4902)+~P1227(x4901,x4903)
% 32.24/32.06 [491]P1227(x4913,x4912)+~E(x4911,x4912)+~P1227(x4913,x4911)
% 32.24/32.06 [492]P2313(x4922,x4923)+~E(x4921,x4922)+~P2313(x4921,x4923)
% 32.24/32.06 [493]P2313(x4933,x4932)+~E(x4931,x4932)+~P2313(x4933,x4931)
% 32.24/32.06 [494]P2199(x4942,x4943)+~E(x4941,x4942)+~P2199(x4941,x4943)
% 32.24/32.06 [495]P2199(x4953,x4952)+~E(x4951,x4952)+~P2199(x4953,x4951)
% 32.24/32.06 [496]P2453(x4962,x4963)+~E(x4961,x4962)+~P2453(x4961,x4963)
% 32.24/32.06 [497]P2453(x4973,x4972)+~E(x4971,x4972)+~P2453(x4973,x4971)
% 32.24/32.06 [498]~P31(x4981)+P31(x4982)+~E(x4981,x4982)
% 32.24/32.06 [499]P2200(x4992,x4993)+~E(x4991,x4992)+~P2200(x4991,x4993)
% 32.24/32.06 [500]P2200(x5003,x5002)+~E(x5001,x5002)+~P2200(x5003,x5001)
% 32.24/32.06 [501]P197(x5012,x5013)+~E(x5011,x5012)+~P197(x5011,x5013)
% 32.24/32.06 [502]P197(x5023,x5022)+~E(x5021,x5022)+~P197(x5023,x5021)
% 32.24/32.06 [503]~P2128(x5031)+P2128(x5032)+~E(x5031,x5032)
% 32.24/32.06 [504]~P1989(x5041)+P1989(x5042)+~E(x5041,x5042)
% 32.24/32.06 [505]~P173(x5051)+P173(x5052)+~E(x5051,x5052)
% 32.24/32.06 [506]P2516(x5062,x5063)+~E(x5061,x5062)+~P2516(x5061,x5063)
% 32.24/32.06 [507]P2516(x5073,x5072)+~E(x5071,x5072)+~P2516(x5073,x5071)
% 32.24/32.06 [508]P1177(x5082,x5083)+~E(x5081,x5082)+~P1177(x5081,x5083)
% 32.24/32.06 [509]P1177(x5093,x5092)+~E(x5091,x5092)+~P1177(x5093,x5091)
% 32.24/32.06 [510]P1158(x5102,x5103)+~E(x5101,x5102)+~P1158(x5101,x5103)
% 32.24/32.06 [511]P1158(x5113,x5112)+~E(x5111,x5112)+~P1158(x5113,x5111)
% 32.24/32.06 [512]P1213(x5122,x5123)+~E(x5121,x5122)+~P1213(x5121,x5123)
% 32.24/32.06 [513]P1213(x5133,x5132)+~E(x5131,x5132)+~P1213(x5133,x5131)
% 32.24/32.06 [514]P1169(x5142,x5143)+~E(x5141,x5142)+~P1169(x5141,x5143)
% 32.24/32.06 [515]P1169(x5153,x5152)+~E(x5151,x5152)+~P1169(x5153,x5151)
% 32.24/32.06 [516]P1214(x5162,x5163)+~E(x5161,x5162)+~P1214(x5161,x5163)
% 32.24/32.06 [517]P1214(x5173,x5172)+~E(x5171,x5172)+~P1214(x5173,x5171)
% 32.24/32.06 [518]P1208(x5182,x5183)+~E(x5181,x5182)+~P1208(x5181,x5183)
% 32.24/32.06 [519]P1208(x5193,x5192)+~E(x5191,x5192)+~P1208(x5193,x5191)
% 32.24/32.06 [520]P1222(x5202,x5203)+~E(x5201,x5202)+~P1222(x5201,x5203)
% 32.24/32.06 [521]P1222(x5213,x5212)+~E(x5211,x5212)+~P1222(x5213,x5211)
% 32.24/32.06 [522]~P128(x5221)+P128(x5222)+~E(x5221,x5222)
% 32.24/32.06 [523]P1223(x5232,x5233)+~E(x5231,x5232)+~P1223(x5231,x5233)
% 32.24/32.06 [524]P1223(x5243,x5242)+~E(x5241,x5242)+~P1223(x5243,x5241)
% 32.24/32.06 [525]P1221(x5252,x5253)+~E(x5251,x5252)+~P1221(x5251,x5253)
% 32.24/32.06 [526]P1221(x5263,x5262)+~E(x5261,x5262)+~P1221(x5263,x5261)
% 32.24/32.06 [527]P1211(x5272,x5273)+~E(x5271,x5272)+~P1211(x5271,x5273)
% 32.24/32.06 [528]P1211(x5283,x5282)+~E(x5281,x5282)+~P1211(x5283,x5281)
% 32.24/32.06 [529]P1645(x5292,x5293)+~E(x5291,x5292)+~P1645(x5291,x5293)
% 32.24/32.06 [530]P1645(x5303,x5302)+~E(x5301,x5302)+~P1645(x5303,x5301)
% 32.24/32.06 [531]P1321(x5312,x5313)+~E(x5311,x5312)+~P1321(x5311,x5313)
% 32.24/32.06 [532]P1321(x5323,x5322)+~E(x5321,x5322)+~P1321(x5323,x5321)
% 32.24/32.06 [533]P1212(x5332,x5333)+~E(x5331,x5332)+~P1212(x5331,x5333)
% 32.24/32.06 [534]P1212(x5343,x5342)+~E(x5341,x5342)+~P1212(x5343,x5341)
% 32.24/32.06 [535]P1236(x5352,x5353)+~E(x5351,x5352)+~P1236(x5351,x5353)
% 32.24/32.06 [536]P1236(x5363,x5362)+~E(x5361,x5362)+~P1236(x5363,x5361)
% 32.24/32.06 [537]~P124(x5371)+P124(x5372)+~E(x5371,x5372)
% 32.24/32.06 [538]P1237(x5382,x5383)+~E(x5381,x5382)+~P1237(x5381,x5383)
% 32.24/32.06 [539]P1237(x5393,x5392)+~E(x5391,x5392)+~P1237(x5393,x5391)
% 32.24/32.06 [540]P1233(x5402,x5403)+~E(x5401,x5402)+~P1233(x5401,x5403)
% 32.24/32.06 [541]P1233(x5413,x5412)+~E(x5411,x5412)+~P1233(x5413,x5411)
% 32.24/32.06 [542]P1244(x5422,x5423)+~E(x5421,x5422)+~P1244(x5421,x5423)
% 32.24/32.06 [543]P1244(x5433,x5432)+~E(x5431,x5432)+~P1244(x5433,x5431)
% 32.24/32.06 [544]~P125(x5441)+P125(x5442)+~E(x5441,x5442)
% 32.24/32.06 [545]P1245(x5452,x5453)+~E(x5451,x5452)+~P1245(x5451,x5453)
% 32.24/32.06 [546]P1245(x5463,x5462)+~E(x5461,x5462)+~P1245(x5463,x5461)
% 32.24/32.06 [547]P2017(x5472,x5473)+~E(x5471,x5472)+~P2017(x5471,x5473)
% 32.24/32.06 [548]P2017(x5483,x5482)+~E(x5481,x5482)+~P2017(x5483,x5481)
% 32.24/32.06 [549]~P961(x5491)+P961(x5492)+~E(x5491,x5492)
% 32.24/32.06 [550]P1146(x5502,x5503)+~E(x5501,x5502)+~P1146(x5501,x5503)
% 32.24/32.06 [551]P1146(x5513,x5512)+~E(x5511,x5512)+~P1146(x5513,x5511)
% 32.24/32.06 [552]P1188(x5522,x5523)+~E(x5521,x5522)+~P1188(x5521,x5523)
% 32.24/32.06 [553]P1188(x5533,x5532)+~E(x5531,x5532)+~P1188(x5533,x5531)
% 32.24/32.06 [554]P1273(x5542,x5543)+~E(x5541,x5542)+~P1273(x5541,x5543)
% 32.24/32.06 [555]P1273(x5553,x5552)+~E(x5551,x5552)+~P1273(x5553,x5551)
% 32.24/32.06 [556]P473(x5562,x5563)+~E(x5561,x5562)+~P473(x5561,x5563)
% 32.24/32.06 [557]P473(x5573,x5572)+~E(x5571,x5572)+~P473(x5573,x5571)
% 32.24/32.06 [558]P1279(x5582,x5583)+~E(x5581,x5582)+~P1279(x5581,x5583)
% 32.24/32.06 [559]P1279(x5593,x5592)+~E(x5591,x5592)+~P1279(x5593,x5591)
% 32.24/32.06 [560]~P2521(x5601)+P2521(x5602)+~E(x5601,x5602)
% 32.24/32.06 [561]P1281(x5612,x5613)+~E(x5611,x5612)+~P1281(x5611,x5613)
% 32.24/32.06 [562]P1281(x5623,x5622)+~E(x5621,x5622)+~P1281(x5623,x5621)
% 32.24/32.06 [563]P2522(x5632,x5633)+~E(x5631,x5632)+~P2522(x5631,x5633)
% 32.24/32.06 [564]P2522(x5643,x5642)+~E(x5641,x5642)+~P2522(x5643,x5641)
% 32.24/32.06 [565]P1293(x5652,x5653)+~E(x5651,x5652)+~P1293(x5651,x5653)
% 32.24/32.06 [566]P1293(x5663,x5662)+~E(x5661,x5662)+~P1293(x5663,x5661)
% 32.24/32.06 [567]~P2141(x5671)+P2141(x5672)+~E(x5671,x5672)
% 32.24/32.06 [568]P1284(x5682,x5683)+~E(x5681,x5682)+~P1284(x5681,x5683)
% 32.24/32.06 [569]P1284(x5693,x5692)+~E(x5691,x5692)+~P1284(x5693,x5691)
% 32.24/32.06 [570]~P114(x5701)+P114(x5702)+~E(x5701,x5702)
% 32.24/32.06 [571]P1302(x5712,x5713)+~E(x5711,x5712)+~P1302(x5711,x5713)
% 32.24/32.06 [572]P1302(x5723,x5722)+~E(x5721,x5722)+~P1302(x5723,x5721)
% 32.24/32.06 [573]~P759(x5731)+P759(x5732)+~E(x5731,x5732)
% 32.24/32.06 [574]~P567(x5741)+P567(x5742)+~E(x5741,x5742)
% 32.24/32.06 [575]P337(x5752,x5753)+~E(x5751,x5752)+~P337(x5751,x5753)
% 32.24/32.06 [576]P337(x5763,x5762)+~E(x5761,x5762)+~P337(x5763,x5761)
% 32.24/32.06 [577]P1274(x5772,x5773)+~E(x5771,x5772)+~P1274(x5771,x5773)
% 32.24/32.06 [578]P1274(x5783,x5782)+~E(x5781,x5782)+~P1274(x5783,x5781)
% 32.24/32.06 [579]P735(x5792,x5793)+~E(x5791,x5792)+~P735(x5791,x5793)
% 32.24/32.06 [580]P735(x5803,x5802)+~E(x5801,x5802)+~P735(x5803,x5801)
% 32.24/32.06 [581]P1295(x5812,x5813)+~E(x5811,x5812)+~P1295(x5811,x5813)
% 32.24/32.06 [582]P1295(x5823,x5822)+~E(x5821,x5822)+~P1295(x5823,x5821)
% 32.24/32.06 [583]P1662(x5832,x5833)+~E(x5831,x5832)+~P1662(x5831,x5833)
% 32.24/32.06 [584]P1662(x5843,x5842)+~E(x5841,x5842)+~P1662(x5843,x5841)
% 32.24/32.06 [585]P1104(x5852,x5853)+~E(x5851,x5852)+~P1104(x5851,x5853)
% 32.24/32.06 [586]P1104(x5863,x5862)+~E(x5861,x5862)+~P1104(x5863,x5861)
% 32.24/32.06 [587]~P2461(x5871)+P2461(x5872)+~E(x5871,x5872)
% 32.24/32.06 [588]P93(x5882,x5883)+~E(x5881,x5882)+~P93(x5881,x5883)
% 32.24/32.06 [589]P93(x5893,x5892)+~E(x5891,x5892)+~P93(x5893,x5891)
% 32.24/32.06 [590]P1103(x5902,x5903)+~E(x5901,x5902)+~P1103(x5901,x5903)
% 32.24/32.06 [591]P1103(x5913,x5912)+~E(x5911,x5912)+~P1103(x5913,x5911)
% 32.24/32.06 [592]P1165(x5922,x5923)+~E(x5921,x5922)+~P1165(x5921,x5923)
% 32.24/32.06 [593]P1165(x5933,x5932)+~E(x5931,x5932)+~P1165(x5933,x5931)
% 32.24/32.06 [594]P1110(x5942,x5943)+~E(x5941,x5942)+~P1110(x5941,x5943)
% 32.24/32.06 [595]P1110(x5953,x5952)+~E(x5951,x5952)+~P1110(x5953,x5951)
% 32.24/32.06 [596]P342(x5962,x5963)+~E(x5961,x5962)+~P342(x5961,x5963)
% 32.24/32.06 [597]P342(x5973,x5972)+~E(x5971,x5972)+~P342(x5973,x5971)
% 32.24/32.06 [598]P1162(x5982,x5983)+~E(x5981,x5982)+~P1162(x5981,x5983)
% 32.24/32.06 [599]P1162(x5993,x5992)+~E(x5991,x5992)+~P1162(x5993,x5991)
% 32.24/32.06 [600]P1147(x6002,x6003)+~E(x6001,x6002)+~P1147(x6001,x6003)
% 32.24/32.06 [601]P1147(x6013,x6012)+~E(x6011,x6012)+~P1147(x6013,x6011)
% 32.24/32.06 [602]P460(x6022,x6023)+~E(x6021,x6022)+~P460(x6021,x6023)
% 32.24/32.06 [603]P460(x6033,x6032)+~E(x6031,x6032)+~P460(x6033,x6031)
% 32.24/32.06 [604]P90(x6042,x6043)+~E(x6041,x6042)+~P90(x6041,x6043)
% 32.24/32.06 [605]P90(x6053,x6052)+~E(x6051,x6052)+~P90(x6053,x6051)
% 32.24/32.06 [606]P1157(x6062,x6063)+~E(x6061,x6062)+~P1157(x6061,x6063)
% 32.24/32.06 [607]P1157(x6073,x6072)+~E(x6071,x6072)+~P1157(x6073,x6071)
% 32.24/32.06 [608]P1175(x6082,x6083)+~E(x6081,x6082)+~P1175(x6081,x6083)
% 32.24/32.06 [609]P1175(x6093,x6092)+~E(x6091,x6092)+~P1175(x6093,x6091)
% 32.24/32.06 [610]P1167(x6102,x6103)+~E(x6101,x6102)+~P1167(x6101,x6103)
% 32.24/32.06 [611]P1167(x6113,x6112)+~E(x6111,x6112)+~P1167(x6113,x6111)
% 32.24/32.06 [612]~P135(x6121)+P135(x6122)+~E(x6121,x6122)
% 32.24/32.06 [613]P1172(x6132,x6133)+~E(x6131,x6132)+~P1172(x6131,x6133)
% 32.24/32.06 [614]P1172(x6143,x6142)+~E(x6141,x6142)+~P1172(x6143,x6141)
% 32.24/32.06 [615]P1176(x6152,x6153)+~E(x6151,x6152)+~P1176(x6151,x6153)
% 32.24/32.06 [616]P1176(x6163,x6162)+~E(x6161,x6162)+~P1176(x6163,x6161)
% 32.24/32.06 [617]P1109(x6172,x6173)+~E(x6171,x6172)+~P1109(x6171,x6173)
% 32.24/32.06 [618]P1109(x6183,x6182)+~E(x6181,x6182)+~P1109(x6183,x6181)
% 32.24/32.06 [619]~P870(x6191)+P870(x6192)+~E(x6191,x6192)
% 32.24/32.06 [620]P1166(x6202,x6203)+~E(x6201,x6202)+~P1166(x6201,x6203)
% 32.24/32.06 [621]P1166(x6213,x6212)+~E(x6211,x6212)+~P1166(x6213,x6211)
% 32.24/32.06 [622]P1164(x6222,x6223)+~E(x6221,x6222)+~P1164(x6221,x6223)
% 32.24/32.06 [623]P1164(x6233,x6232)+~E(x6231,x6232)+~P1164(x6233,x6231)
% 32.24/32.06 [624]P389(x6242,x6243)+~E(x6241,x6242)+~P389(x6241,x6243)
% 32.24/32.06 [625]P389(x6253,x6252)+~E(x6251,x6252)+~P389(x6253,x6251)
% 32.24/32.06 [626]P1740(x6262,x6263)+~E(x6261,x6262)+~P1740(x6261,x6263)
% 32.24/32.06 [627]P1740(x6273,x6272)+~E(x6271,x6272)+~P1740(x6273,x6271)
% 32.24/32.06 [628]P1240(x6282,x6283)+~E(x6281,x6282)+~P1240(x6281,x6283)
% 32.24/32.06 [629]P1240(x6293,x6292)+~E(x6291,x6292)+~P1240(x6293,x6291)
% 32.24/32.06 [630]P1814(x6302,x6303)+~E(x6301,x6302)+~P1814(x6301,x6303)
% 32.24/32.06 [631]P1814(x6313,x6312)+~E(x6311,x6312)+~P1814(x6313,x6311)
% 32.24/32.06 [632]~P1895(x6321)+P1895(x6322)+~E(x6321,x6322)
% 32.24/32.06 [633]P2020(x6332,x6333)+~E(x6331,x6332)+~P2020(x6331,x6333)
% 32.24/32.06 [634]P2020(x6343,x6342)+~E(x6341,x6342)+~P2020(x6343,x6341)
% 32.24/32.06 [635]P1336(x6352,x6353)+~E(x6351,x6352)+~P1336(x6351,x6353)
% 32.24/32.06 [636]P1336(x6363,x6362)+~E(x6361,x6362)+~P1336(x6363,x6361)
% 32.24/32.06 [637]P903(x6372,x6373)+~E(x6371,x6372)+~P903(x6371,x6373)
% 32.24/32.06 [638]P903(x6383,x6382)+~E(x6381,x6382)+~P903(x6383,x6381)
% 32.24/32.06 [639]P2321(x6392,x6393)+~E(x6391,x6392)+~P2321(x6391,x6393)
% 32.24/32.06 [640]P2321(x6403,x6402)+~E(x6401,x6402)+~P2321(x6403,x6401)
% 32.24/32.06 [641]P174(x6412,x6413)+~E(x6411,x6412)+~P174(x6411,x6413)
% 32.24/32.06 [642]P174(x6423,x6422)+~E(x6421,x6422)+~P174(x6423,x6421)
% 32.24/32.06 [643]P1360(x6432,x6433)+~E(x6431,x6432)+~P1360(x6431,x6433)
% 32.24/32.06 [644]P1360(x6443,x6442)+~E(x6441,x6442)+~P1360(x6443,x6441)
% 32.24/32.06 [645]P1435(x6452,x6453)+~E(x6451,x6452)+~P1435(x6451,x6453)
% 32.24/32.06 [646]P1435(x6463,x6462)+~E(x6461,x6462)+~P1435(x6463,x6461)
% 32.24/32.06 [647]~P708(x6471)+P708(x6472)+~E(x6471,x6472)
% 32.24/32.06 [648]P499(x6482,x6483)+~E(x6481,x6482)+~P499(x6481,x6483)
% 32.24/32.06 [649]P499(x6493,x6492)+~E(x6491,x6492)+~P499(x6493,x6491)
% 32.24/32.06 [650]~P2054(x6501)+P2054(x6502)+~E(x6501,x6502)
% 32.24/32.06 [651]~P2077(x6511)+P2077(x6512)+~E(x6511,x6512)
% 32.24/32.06 [652]~P872(x6521)+P872(x6522)+~E(x6521,x6522)
% 32.24/32.06 [653]~P1769(x6531)+P1769(x6532)+~E(x6531,x6532)
% 32.24/32.06 [654]~P107(x6541)+P107(x6542)+~E(x6541,x6542)
% 32.24/32.06 [655]P503(x6552,x6553)+~E(x6551,x6552)+~P503(x6551,x6553)
% 32.24/32.06 [656]P503(x6563,x6562)+~E(x6561,x6562)+~P503(x6563,x6561)
% 32.24/32.06 [657]P1344(x6572,x6573)+~E(x6571,x6572)+~P1344(x6571,x6573)
% 32.24/32.06 [658]P1344(x6583,x6582)+~E(x6581,x6582)+~P1344(x6583,x6581)
% 32.24/32.06 [659]~P2489(x6591)+P2489(x6592)+~E(x6591,x6592)
% 32.24/32.06 [660]~P1602(x6601)+P1602(x6602)+~E(x6601,x6602)
% 32.24/32.06 [661]P1275(x6612,x6613)+~E(x6611,x6612)+~P1275(x6611,x6613)
% 32.24/32.06 [662]P1275(x6623,x6622)+~E(x6621,x6622)+~P1275(x6623,x6621)
% 32.24/32.06 [663]~P1776(x6631)+P1776(x6632)+~E(x6631,x6632)
% 32.24/32.06 [664]~P1763(x6641)+P1763(x6642)+~E(x6641,x6642)
% 32.24/32.06 [665]~P1766(x6651)+P1766(x6652)+~E(x6651,x6652)
% 32.24/32.06 [666]~P2444(x6661)+P2444(x6662)+~E(x6661,x6662)
% 32.24/32.06 [667]P1256(x6672,x6673)+~E(x6671,x6672)+~P1256(x6671,x6673)
% 32.24/32.06 [668]P1256(x6683,x6682)+~E(x6681,x6682)+~P1256(x6683,x6681)
% 32.24/32.06 [669]~P2384(x6691)+P2384(x6692)+~E(x6691,x6692)
% 32.24/32.06 [670]P1659(x6702,x6703)+~E(x6701,x6702)+~P1659(x6701,x6703)
% 32.24/32.06 [671]P1659(x6713,x6712)+~E(x6711,x6712)+~P1659(x6713,x6711)
% 32.24/32.06 [672]P1242(x6722,x6723)+~E(x6721,x6722)+~P1242(x6721,x6723)
% 32.24/32.06 [673]P1242(x6733,x6732)+~E(x6731,x6732)+~P1242(x6733,x6731)
% 32.24/32.06 [674]~P2570(x6741)+P2570(x6742)+~E(x6741,x6742)
% 32.24/32.06 [675]~P1832(x6751)+P1832(x6752)+~E(x6751,x6752)
% 32.24/32.06 [676]~P1507(x6761)+P1507(x6762)+~E(x6761,x6762)
% 32.24/32.06 [677]~P2142(x6771)+P2142(x6772)+~E(x6771,x6772)
% 32.24/32.06 [678]~P319(x6781)+P319(x6782)+~E(x6781,x6782)
% 32.24/32.06 [679]~P495(x6791)+P495(x6792)+~E(x6791,x6792)
% 32.24/32.06 [680]P1232(x6802,x6803)+~E(x6801,x6802)+~P1232(x6801,x6803)
% 32.24/32.06 [681]P1232(x6813,x6812)+~E(x6811,x6812)+~P1232(x6813,x6811)
% 32.24/32.06 [682]~P795(x6821)+P795(x6822)+~E(x6821,x6822)
% 32.24/32.06 [683]P1219(x6832,x6833)+~E(x6831,x6832)+~P1219(x6831,x6833)
% 32.24/32.06 [684]P1219(x6843,x6842)+~E(x6841,x6842)+~P1219(x6843,x6841)
% 32.24/32.06 [685]P2099(x6852,x6853)+~E(x6851,x6852)+~P2099(x6851,x6853)
% 32.24/32.06 [686]P2099(x6863,x6862)+~E(x6861,x6862)+~P2099(x6863,x6861)
% 32.24/32.06 [687]~P180(x6871)+P180(x6872)+~E(x6871,x6872)
% 32.24/32.06 [688]~P904(x6881)+P904(x6882)+~E(x6881,x6882)
% 32.24/32.06 [689]~P2101(x6891)+P2101(x6892)+~E(x6891,x6892)
% 32.24/32.06 [690]~P2097(x6901)+P2097(x6902)+~E(x6901,x6902)
% 32.24/32.06 [691]~P1040(x6911)+P1040(x6912)+~E(x6911,x6912)
% 32.24/32.06 [692]~P1457(x6921)+P1457(x6922)+~E(x6921,x6922)
% 32.24/32.06 [693]~P475(x6931)+P475(x6932)+~E(x6931,x6932)
% 32.24/32.06 [694]P2095(x6942,x6943)+~E(x6941,x6942)+~P2095(x6941,x6943)
% 32.24/32.06 [695]P2095(x6953,x6952)+~E(x6951,x6952)+~P2095(x6953,x6951)
% 32.24/32.06 [696]P2119(x6962,x6963)+~E(x6961,x6962)+~P2119(x6961,x6963)
% 32.24/32.06 [697]P2119(x6973,x6972)+~E(x6971,x6972)+~P2119(x6973,x6971)
% 32.24/32.06 [698]P321(x6982,x6983)+~E(x6981,x6982)+~P321(x6981,x6983)
% 32.24/32.06 [699]P321(x6993,x6992)+~E(x6991,x6992)+~P321(x6993,x6991)
% 32.24/32.06 [700]~P2045(x7001)+P2045(x7002)+~E(x7001,x7002)
% 32.24/32.06 [701]~P1603(x7011)+P1603(x7012)+~E(x7011,x7012)
% 32.24/32.06 [702]P1310(x7022,x7023)+~E(x7021,x7022)+~P1310(x7021,x7023)
% 32.24/32.06 [703]P1310(x7033,x7032)+~E(x7031,x7032)+~P1310(x7033,x7031)
% 32.24/32.06 [704]P1230(x7042,x7043)+~E(x7041,x7042)+~P1230(x7041,x7043)
% 32.24/32.06 [705]P1230(x7053,x7052)+~E(x7051,x7052)+~P1230(x7053,x7051)
% 32.24/32.06 [706]P2352(x7062,x7063)+~E(x7061,x7062)+~P2352(x7061,x7063)
% 32.24/32.06 [707]P2352(x7073,x7072)+~E(x7071,x7072)+~P2352(x7073,x7071)
% 32.24/32.06 [708]~P874(x7081)+P874(x7082)+~E(x7081,x7082)
% 32.24/32.06 [709]~P17(x7091)+P17(x7092)+~E(x7091,x7092)
% 32.24/32.06 [710]P1195(x7102,x7103)+~E(x7101,x7102)+~P1195(x7101,x7103)
% 32.24/32.06 [711]P1195(x7113,x7112)+~E(x7111,x7112)+~P1195(x7113,x7111)
% 32.24/32.06 [712]P1343(x7122,x7123)+~E(x7121,x7122)+~P1343(x7121,x7123)
% 32.24/32.06 [713]P1343(x7133,x7132)+~E(x7131,x7132)+~P1343(x7133,x7131)
% 32.24/32.06 [714]P1193(x7142,x7143)+~E(x7141,x7142)+~P1193(x7141,x7143)
% 32.24/32.06 [715]P1193(x7153,x7152)+~E(x7151,x7152)+~P1193(x7153,x7151)
% 32.24/32.06 [716]~P2149(x7161)+P2149(x7162)+~E(x7161,x7162)
% 32.24/32.06 [717]~P18(x7171)+P18(x7172)+~E(x7171,x7172)
% 32.24/32.06 [718]P1249(x7182,x7183)+~E(x7181,x7182)+~P1249(x7181,x7183)
% 32.24/32.06 [719]P1249(x7193,x7192)+~E(x7191,x7192)+~P1249(x7193,x7191)
% 32.24/32.06 [720]P1252(x7202,x7203)+~E(x7201,x7202)+~P1252(x7201,x7203)
% 32.24/32.06 [721]P1252(x7213,x7212)+~E(x7211,x7212)+~P1252(x7213,x7211)
% 32.24/32.06 [722]P187(x7222,x7223)+~E(x7221,x7222)+~P187(x7221,x7223)
% 32.24/32.06 [723]P187(x7233,x7232)+~E(x7231,x7232)+~P187(x7233,x7231)
% 32.24/32.06 [724]P873(x7242,x7243)+~E(x7241,x7242)+~P873(x7241,x7243)
% 32.24/32.06 [725]P873(x7253,x7252)+~E(x7251,x7252)+~P873(x7253,x7251)
% 32.24/32.06 [726]~P2021(x7261)+P2021(x7262)+~E(x7261,x7262)
% 32.24/32.06 [727]~P64(x7271)+P64(x7272)+~E(x7271,x7272)
% 32.24/32.06 [728]~P1598(x7281)+P1598(x7282)+~E(x7281,x7282)
% 32.24/32.06 [729]~P713(x7291)+P713(x7292)+~E(x7291,x7292)
% 32.24/32.06 [730]~P711(x7301)+P711(x7302)+~E(x7301,x7302)
% 32.24/32.06 [731]~P1608(x7311)+P1608(x7312)+~E(x7311,x7312)
% 32.24/32.06 [732]~P1782(x7321)+P1782(x7322)+~E(x7321,x7322)
% 32.24/32.06 [733]P2597(x7332,x7333)+~E(x7331,x7332)+~P2597(x7331,x7333)
% 32.24/32.06 [734]P2597(x7343,x7342)+~E(x7341,x7342)+~P2597(x7343,x7341)
% 32.24/32.06 [735]~P73(x7351)+P73(x7352)+~E(x7351,x7352)
% 32.24/32.06 [736]~P2268(x7361)+P2268(x7362)+~E(x7361,x7362)
% 32.24/32.06 [737]~P1765(x7371)+P1765(x7372)+~E(x7371,x7372)
% 32.24/32.06 [738]~P1494(x7381)+P1494(x7382)+~E(x7381,x7382)
% 32.24/32.06 [739]~P69(x7391)+P69(x7392)+~E(x7391,x7392)
% 32.24/32.06 [740]~P2294(x7401)+P2294(x7402)+~E(x7401,x7402)
% 32.24/32.06 [741]~P483(x7411)+P483(x7412)+~E(x7411,x7412)
% 32.24/32.06 [742]~P756(x7421)+P756(x7422)+~E(x7421,x7422)
% 32.24/32.06 [743]P333(x7432,x7433)+~E(x7431,x7432)+~P333(x7431,x7433)
% 32.24/32.06 [744]P333(x7443,x7442)+~E(x7441,x7442)+~P333(x7443,x7441)
% 32.24/32.06 [745]~P496(x7451)+P496(x7452)+~E(x7451,x7452)
% 32.24/32.06 [746]~P1458(x7461)+P1458(x7462)+~E(x7461,x7462)
% 32.24/32.06 [747]P1905(x7472,x7473)+~E(x7471,x7472)+~P1905(x7471,x7473)
% 32.24/32.06 [748]P1905(x7483,x7482)+~E(x7481,x7482)+~P1905(x7483,x7481)
% 32.24/32.06 [749]~P1520(x7491)+P1520(x7492)+~E(x7491,x7492)
% 32.24/32.06 [750]~P1516(x7501)+P1516(x7502)+~E(x7501,x7502)
% 32.24/32.06 [751]P1309(x7512,x7513)+~E(x7511,x7512)+~P1309(x7511,x7513)
% 32.24/32.06 [752]P1309(x7523,x7522)+~E(x7521,x7522)+~P1309(x7523,x7521)
% 32.24/32.06 [753]P1286(x7532,x7533)+~E(x7531,x7532)+~P1286(x7531,x7533)
% 32.24/32.06 [754]P1286(x7543,x7542)+~E(x7541,x7542)+~P1286(x7543,x7541)
% 32.24/32.06 [755]~P864(x7551)+P864(x7552)+~E(x7551,x7552)
% 32.24/32.06 [756]~P1773(x7561)+P1773(x7562)+~E(x7561,x7562)
% 32.24/32.06 [757]P2310(x7572,x7573)+~E(x7571,x7572)+~P2310(x7571,x7573)
% 32.24/32.06 [758]P2310(x7583,x7582)+~E(x7581,x7582)+~P2310(x7583,x7581)
% 32.24/32.06 [759]~P2305(x7591)+P2305(x7592)+~E(x7591,x7592)
% 32.24/32.06 [760]~P1728(x7601)+P1728(x7602)+~E(x7601,x7602)
% 32.24/32.06 [761]P192(x7612,x7613)+~E(x7611,x7612)+~P192(x7611,x7613)
% 32.24/32.06 [762]P192(x7623,x7622)+~E(x7621,x7622)+~P192(x7623,x7621)
% 32.24/32.06 [763]~P2506(x7631)+P2506(x7632)+~E(x7631,x7632)
% 32.24/32.06 [764]~P2497(x7641)+P2497(x7642)+~E(x7641,x7642)
% 32.24/32.06 [765]P839(x7652,x7653)+~E(x7651,x7652)+~P839(x7651,x7653)
% 32.24/32.06 [766]P839(x7663,x7662)+~E(x7661,x7662)+~P839(x7663,x7661)
% 32.24/32.06 [767]~P2512(x7671)+P2512(x7672)+~E(x7671,x7672)
% 32.24/32.06 [768]P2314(x7682,x7683)+~E(x7681,x7682)+~P2314(x7681,x7683)
% 32.24/32.06 [769]P2314(x7693,x7692)+~E(x7691,x7692)+~P2314(x7693,x7691)
% 32.24/32.06 [770]P2454(x7702,x7703)+~E(x7701,x7702)+~P2454(x7701,x7703)
% 32.24/32.06 [771]P2454(x7713,x7712)+~E(x7711,x7712)+~P2454(x7713,x7711)
% 32.24/32.06 [772]~P1894(x7721)+P1894(x7722)+~E(x7721,x7722)
% 32.24/32.06 [773]P2277(x7732,x7733)+~E(x7731,x7732)+~P2277(x7731,x7733)
% 32.24/32.06 [774]P2277(x7743,x7742)+~E(x7741,x7742)+~P2277(x7743,x7741)
% 32.24/32.06 [775]~P2205(x7751)+P2205(x7752)+~E(x7751,x7752)
% 32.24/32.06 [776]~P2075(x7761)+P2075(x7762)+~E(x7761,x7762)
% 32.24/32.06 [777]P2387(x7772,x7773)+~E(x7771,x7772)+~P2387(x7771,x7773)
% 32.24/32.06 [778]P2387(x7783,x7782)+~E(x7781,x7782)+~P2387(x7783,x7781)
% 32.24/32.06 [779]~P980(x7791)+P980(x7792)+~E(x7791,x7792)
% 32.24/32.06 [780]~P710(x7801)+P710(x7802)+~E(x7801,x7802)
% 32.24/32.06 [781]P1287(x7812,x7813)+~E(x7811,x7812)+~P1287(x7811,x7813)
% 32.24/32.06 [782]P1287(x7823,x7822)+~E(x7821,x7822)+~P1287(x7823,x7821)
% 32.24/32.06 [783]~P203(x7831)+P203(x7832)+~E(x7831,x7832)
% 32.24/32.06 [784]~P2080(x7841)+P2080(x7842)+~E(x7841,x7842)
% 32.24/32.06 [785]P1548(x7852,x7853)+~E(x7851,x7852)+~P1548(x7851,x7853)
% 32.24/32.06 [786]P1548(x7863,x7862)+~E(x7861,x7862)+~P1548(x7863,x7861)
% 32.24/32.06 [787]~P22(x7871)+P22(x7872)+~E(x7871,x7872)
% 32.24/32.06 [788]P2196(x7882,x7883)+~E(x7881,x7882)+~P2196(x7881,x7883)
% 32.24/32.06 [789]P2196(x7893,x7892)+~E(x7891,x7892)+~P2196(x7893,x7891)
% 32.24/32.06 [790]P1220(x7902,x7903)+~E(x7901,x7902)+~P1220(x7901,x7903)
% 32.24/32.06 [791]P1220(x7913,x7912)+~E(x7911,x7912)+~P1220(x7913,x7911)
% 32.24/32.06 [792]P1346(x7922,x7923)+~E(x7921,x7922)+~P1346(x7921,x7923)
% 32.24/32.06 [793]P1346(x7933,x7932)+~E(x7931,x7932)+~P1346(x7933,x7931)
% 32.24/32.06 [794]P1315(x7942,x7943)+~E(x7941,x7942)+~P1315(x7941,x7943)
% 32.24/32.06 [795]P1315(x7953,x7952)+~E(x7951,x7952)+~P1315(x7953,x7951)
% 32.24/32.06 [796]P1260(x7962,x7963)+~E(x7961,x7962)+~P1260(x7961,x7963)
% 32.24/32.06 [797]P1260(x7973,x7972)+~E(x7971,x7972)+~P1260(x7973,x7971)
% 32.24/32.06 [798]~P335(x7981)+P335(x7982)+~E(x7981,x7982)
% 32.24/32.06 [799]P1033(x7992,x7993)+~E(x7991,x7992)+~P1033(x7991,x7993)
% 32.24/32.06 [800]P1033(x8003,x8002)+~E(x8001,x8002)+~P1033(x8003,x8001)
% 32.24/32.06 [801]P2278(x8012,x8013)+~E(x8011,x8012)+~P2278(x8011,x8013)
% 32.24/32.06 [802]P2278(x8023,x8022)+~E(x8021,x8022)+~P2278(x8023,x8021)
% 32.24/32.06 [803]P1207(x8032,x8033)+~E(x8031,x8032)+~P1207(x8031,x8033)
% 32.24/32.06 [804]P1207(x8043,x8042)+~E(x8041,x8042)+~P1207(x8043,x8041)
% 32.24/32.06 [805]P1432(x8052,x8053)+~E(x8051,x8052)+~P1432(x8051,x8053)
% 32.24/32.06 [806]P1432(x8063,x8062)+~E(x8061,x8062)+~P1432(x8063,x8061)
% 32.24/32.06 [807]P1824(x8072,x8073)+~E(x8071,x8072)+~P1824(x8071,x8073)
% 32.24/32.06 [808]P1824(x8083,x8082)+~E(x8081,x8082)+~P1824(x8083,x8081)
% 32.24/32.06 [809]P1257(x8092,x8093)+~E(x8091,x8092)+~P1257(x8091,x8093)
% 32.24/32.06 [810]P1257(x8103,x8102)+~E(x8101,x8102)+~P1257(x8103,x8101)
% 32.24/32.06 [811]P1261(x8112,x8113)+~E(x8111,x8112)+~P1261(x8111,x8113)
% 32.24/32.06 [812]P1261(x8123,x8122)+~E(x8121,x8122)+~P1261(x8123,x8121)
% 32.24/32.06 [813]P1323(x8132,x8133)+~E(x8131,x8132)+~P1323(x8131,x8133)
% 32.24/32.06 [814]P1323(x8143,x8142)+~E(x8141,x8142)+~P1323(x8143,x8141)
% 32.24/32.06 [815]P1205(x8152,x8153)+~E(x8151,x8152)+~P1205(x8151,x8153)
% 32.24/32.06 [816]P1205(x8163,x8162)+~E(x8161,x8162)+~P1205(x8163,x8161)
% 32.24/32.06 [817]~P23(x8171)+P23(x8172)+~E(x8171,x8172)
% 32.24/32.06 [818]P1356(x8182,x8183)+~E(x8181,x8182)+~P1356(x8181,x8183)
% 32.24/32.06 [819]P1356(x8193,x8192)+~E(x8191,x8192)+~P1356(x8193,x8191)
% 32.24/32.06 [820]P1357(x8202,x8203)+~E(x8201,x8202)+~P1357(x8201,x8203)
% 32.24/32.06 [821]P1357(x8213,x8212)+~E(x8211,x8212)+~P1357(x8213,x8211)
% 32.24/32.06 [822]P1549(x8222,x8223)+~E(x8221,x8222)+~P1549(x8221,x8223)
% 32.24/32.06 [823]P1549(x8233,x8232)+~E(x8231,x8232)+~P1549(x8233,x8231)
% 32.24/32.06 [824]P1250(x8242,x8243)+~E(x8241,x8242)+~P1250(x8241,x8243)
% 32.24/32.06 [825]P1250(x8253,x8252)+~E(x8251,x8252)+~P1250(x8253,x8251)
% 32.24/32.06 [826]P1241(x8262,x8263)+~E(x8261,x8262)+~P1241(x8261,x8263)
% 32.24/32.06 [827]P1241(x8273,x8272)+~E(x8271,x8272)+~P1241(x8273,x8271)
% 32.24/32.06 [828]P1243(x8282,x8283)+~E(x8281,x8282)+~P1243(x8281,x8283)
% 32.24/32.06 [829]P1243(x8293,x8292)+~E(x8291,x8292)+~P1243(x8293,x8291)
% 32.24/32.06 [830]P1144(x8302,x8303)+~E(x8301,x8302)+~P1144(x8301,x8303)
% 32.24/32.06 [831]P1144(x8313,x8312)+~E(x8311,x8312)+~P1144(x8313,x8311)
% 32.24/32.06 [832]~P65(x8321)+P65(x8322)+~E(x8321,x8322)
% 32.24/32.06 [833]P1329(x8332,x8333)+~E(x8331,x8332)+~P1329(x8331,x8333)
% 32.24/32.06 [834]P1329(x8343,x8342)+~E(x8341,x8342)+~P1329(x8343,x8341)
% 32.24/32.06 [835]P1424(x8352,x8353)+~E(x8351,x8352)+~P1424(x8351,x8353)
% 32.24/32.06 [836]P1424(x8363,x8362)+~E(x8361,x8362)+~P1424(x8363,x8361)
% 32.24/32.06 [837]~P425(x8371)+P425(x8372)+~E(x8371,x8372)
% 32.24/32.06 [838]P1303(x8382,x8383)+~E(x8381,x8382)+~P1303(x8381,x8383)
% 32.24/32.06 [839]P1303(x8393,x8392)+~E(x8391,x8392)+~P1303(x8393,x8391)
% 32.24/32.06 [840]P1314(x8402,x8403)+~E(x8401,x8402)+~P1314(x8401,x8403)
% 32.24/32.06 [841]P1314(x8413,x8412)+~E(x8411,x8412)+~P1314(x8413,x8411)
% 32.24/32.06 [842]P2061(x8422,x8423)+~E(x8421,x8422)+~P2061(x8421,x8423)
% 32.24/32.06 [843]P2061(x8433,x8432)+~E(x8431,x8432)+~P2061(x8433,x8431)
% 32.24/32.06 [844]P1304(x8442,x8443)+~E(x8441,x8442)+~P1304(x8441,x8443)
% 32.24/32.06 [845]P1304(x8453,x8452)+~E(x8451,x8452)+~P1304(x8453,x8451)
% 32.24/32.06 [846]~P1052(x8461)+P1052(x8462)+~E(x8461,x8462)
% 32.24/32.06 [847]~P1053(x8471)+P1053(x8472)+~E(x8471,x8472)
% 32.24/32.06 [848]~P1054(x8481)+P1054(x8482)+~E(x8481,x8482)
% 32.24/32.06 [849]~P566(x8491)+P566(x8492)+~E(x8491,x8492)
% 32.24/32.06 [850]~P334(x8501)+P334(x8502)+~E(x8501,x8502)
% 32.24/32.06 [851]P1426(x8512,x8513)+~E(x8511,x8512)+~P1426(x8511,x8513)
% 32.24/32.06 [852]P1426(x8523,x8522)+~E(x8521,x8522)+~P1426(x8523,x8521)
% 32.24/32.06 [853]P1624(x8532,x8533)+~E(x8531,x8532)+~P1624(x8531,x8533)
% 32.24/32.06 [854]P1624(x8543,x8542)+~E(x8541,x8542)+~P1624(x8543,x8541)
% 32.24/32.06 [855]P1325(x8552,x8553)+~E(x8551,x8552)+~P1325(x8551,x8553)
% 32.24/32.06 [856]P1325(x8563,x8562)+~E(x8561,x8562)+~P1325(x8563,x8561)
% 32.24/32.06 [857]P1359(x8572,x8573)+~E(x8571,x8572)+~P1359(x8571,x8573)
% 32.24/32.06 [858]P1359(x8583,x8582)+~E(x8581,x8582)+~P1359(x8583,x8581)
% 32.24/32.06 [859]P1225(x8592,x8593)+~E(x8591,x8592)+~P1225(x8591,x8593)
% 32.24/32.06 [860]P1225(x8603,x8602)+~E(x8601,x8602)+~P1225(x8603,x8601)
% 32.24/32.06 [861]~P945(x8611)+P945(x8612)+~E(x8611,x8612)
% 32.24/32.06 [862]P1201(x8622,x8623)+~E(x8621,x8622)+~P1201(x8621,x8623)
% 32.24/32.06 [863]P1201(x8633,x8632)+~E(x8631,x8632)+~P1201(x8633,x8631)
% 32.24/32.06 [864]~P888(x8641)+P888(x8642)+~E(x8641,x8642)
% 32.24/32.06 [865]P1268(x8652,x8653)+~E(x8651,x8652)+~P1268(x8651,x8653)
% 32.24/32.06 [866]P1268(x8663,x8662)+~E(x8661,x8662)+~P1268(x8663,x8661)
% 32.24/32.06 [867]~P532(x8671)+P532(x8672)+~E(x8671,x8672)
% 32.24/32.06 [868]~P536(x8681)+P536(x8682)+~E(x8681,x8682)
% 32.24/32.06 [869]P1369(x8692,x8693)+~E(x8691,x8692)+~P1369(x8691,x8693)
% 32.24/32.06 [870]P1369(x8703,x8702)+~E(x8701,x8702)+~P1369(x8703,x8701)
% 32.24/32.06 [871]~P538(x8711)+P538(x8712)+~E(x8711,x8712)
% 32.24/32.06 [872]P863(x8722,x8723)+~E(x8721,x8722)+~P863(x8721,x8723)
% 32.24/32.06 [873]P863(x8733,x8732)+~E(x8731,x8732)+~P863(x8733,x8731)
% 32.24/32.06 [874]P1747(x8742,x8743)+~E(x8741,x8742)+~P1747(x8741,x8743)
% 32.24/32.06 [875]P1747(x8753,x8752)+~E(x8751,x8752)+~P1747(x8753,x8751)
% 32.24/32.06 [876]P1366(x8762,x8763)+~E(x8761,x8762)+~P1366(x8761,x8763)
% 32.24/32.06 [877]P1366(x8773,x8772)+~E(x8771,x8772)+~P1366(x8773,x8771)
% 32.24/32.06 [878]P850(x8782,x8783)+~E(x8781,x8782)+~P850(x8781,x8783)
% 32.24/32.06 [879]P850(x8793,x8792)+~E(x8791,x8792)+~P850(x8793,x8791)
% 32.24/32.06 [880]~P684(x8801)+P684(x8802)+~E(x8801,x8802)
% 32.24/32.06 [881]~P613(x8811)+P613(x8812)+~E(x8811,x8812)
% 32.24/32.06 [882]P854(x8822,x8823)+~E(x8821,x8822)+~P854(x8821,x8823)
% 32.24/32.06 [883]P854(x8833,x8832)+~E(x8831,x8832)+~P854(x8833,x8831)
% 32.24/32.06 [884]P196(x8842,x8843)+~E(x8841,x8842)+~P196(x8841,x8843)
% 32.24/32.06 [885]P196(x8853,x8852)+~E(x8851,x8852)+~P196(x8853,x8851)
% 32.24/32.06 [886]P855(x8862,x8863)+~E(x8861,x8862)+~P855(x8861,x8863)
% 32.24/32.06 [887]P855(x8873,x8872)+~E(x8871,x8872)+~P855(x8873,x8871)
% 32.24/32.06 [888]P862(x8882,x8883)+~E(x8881,x8882)+~P862(x8881,x8883)
% 32.24/32.06 [889]P862(x8893,x8892)+~E(x8891,x8892)+~P862(x8893,x8891)
% 32.24/32.06 [890]~P687(x8901)+P687(x8902)+~E(x8901,x8902)
% 32.24/32.06 [891]P1828(x8912,x8913)+~E(x8911,x8912)+~P1828(x8911,x8913)
% 32.24/32.06 [892]P1828(x8923,x8922)+~E(x8921,x8922)+~P1828(x8923,x8921)
% 32.24/32.06 [893]~P612(x8931)+P612(x8932)+~E(x8931,x8932)
% 32.24/32.06 [894]~P555(x8941)+P555(x8942)+~E(x8941,x8942)
% 32.24/32.06 [895]~P513(x8951)+P513(x8952)+~E(x8951,x8952)
% 32.24/32.06 [896]~P1474(x8961)+P1474(x8962)+~E(x8961,x8962)
% 32.24/32.06 [897]P1239(x8972,x8973)+~E(x8971,x8972)+~P1239(x8971,x8973)
% 32.24/32.06 [898]P1239(x8983,x8982)+~E(x8981,x8982)+~P1239(x8983,x8981)
% 32.24/32.06 [899]~P1023(x8991)+P1023(x8992)+~E(x8991,x8992)
% 32.24/32.06 [900]~P85(x9001)+P85(x9002)+~E(x9001,x9002)
% 32.24/32.06 [901]~P1528(x9011)+P1528(x9012)+~E(x9011,x9012)
% 32.24/32.06 [902]~P2429(x9021)+P2429(x9022)+~E(x9021,x9022)
% 32.24/32.06 [903]~P1461(x9031)+P1461(x9032)+~E(x9031,x9032)
% 32.24/32.06 [904]~P1460(x9041)+P1460(x9042)+~E(x9041,x9042)
% 32.24/32.06 [905]~P1650(x9051)+P1650(x9052)+~E(x9051,x9052)
% 32.24/32.06 [906]P1423(x9062,x9063)+~E(x9061,x9062)+~P1423(x9061,x9063)
% 32.24/32.06 [907]P1423(x9073,x9072)+~E(x9071,x9072)+~P1423(x9073,x9071)
% 32.24/32.06 [908]~P936(x9081)+P936(x9082)+~E(x9081,x9082)
% 32.24/32.06 [909]~P1896(x9091)+P1896(x9092)+~E(x9091,x9092)
% 32.24/32.06 [910]~P730(x9101)+P730(x9102)+~E(x9101,x9102)
% 32.24/32.06 [911]P1827(x9112,x9113)+~E(x9111,x9112)+~P1827(x9111,x9113)
% 32.24/32.06 [912]P1827(x9123,x9122)+~E(x9121,x9122)+~P1827(x9123,x9121)
% 32.24/32.06 [913]~P2431(x9131)+P2431(x9132)+~E(x9131,x9132)
% 32.24/32.06 [914]~P774(x9141)+P774(x9142)+~E(x9141,x9142)
% 32.24/32.06 [915]~P1479(x9151)+P1479(x9152)+~E(x9151,x9152)
% 32.24/32.06 [916]P1484(x9162,x9163)+~E(x9161,x9162)+~P1484(x9161,x9163)
% 32.24/32.06 [917]P1484(x9173,x9172)+~E(x9171,x9172)+~P1484(x9173,x9171)
% 32.24/32.06 [918]P1960(x9182,x9183)+~E(x9181,x9182)+~P1960(x9181,x9183)
% 32.24/32.06 [919]P1960(x9193,x9192)+~E(x9191,x9192)+~P1960(x9193,x9191)
% 32.24/32.06 [920]~P27(x9201)+P27(x9202)+~E(x9201,x9202)
% 32.24/32.06 [921]~P1833(x9211)+P1833(x9212)+~E(x9211,x9212)
% 32.24/32.06 [922]~P1834(x9221)+P1834(x9222)+~E(x9221,x9222)
% 32.24/32.06 [923]~P1487(x9231)+P1487(x9232)+~E(x9231,x9232)
% 32.24/32.06 [924]~P2038(x9241)+P2038(x9242)+~E(x9241,x9242)
% 32.24/32.06 [925]~P2126(x9251)+P2126(x9252)+~E(x9251,x9252)
% 32.24/32.06 [926]P2127(x9262,x9263)+~E(x9261,x9262)+~P2127(x9261,x9263)
% 32.24/32.06 [927]P2127(x9273,x9272)+~E(x9271,x9272)+~P2127(x9273,x9271)
% 32.24/32.06 [928]~P1978(x9281)+P1978(x9282)+~E(x9281,x9282)
% 32.24/32.06 [929]~P1979(x9291)+P1979(x9292)+~E(x9291,x9292)
% 32.24/32.06 [930]~P116(x9301)+P116(x9302)+~E(x9301,x9302)
% 32.24/32.06 [931]~P1977(x9311)+P1977(x9312)+~E(x9311,x9312)
% 32.24/32.06 [932]~P1981(x9321)+P1981(x9322)+~E(x9321,x9322)
% 32.24/32.06 [933]P853(x9332,x9333)+~E(x9331,x9332)+~P853(x9331,x9333)
% 32.24/32.06 [934]P853(x9343,x9342)+~E(x9341,x9342)+~P853(x9343,x9341)
% 32.24/32.06 [935]~P1976(x9351)+P1976(x9352)+~E(x9351,x9352)
% 32.24/32.06 [936]~P1983(x9361)+P1983(x9362)+~E(x9361,x9362)
% 32.24/32.06 [937]P1337(x9372,x9373)+~E(x9371,x9372)+~P1337(x9371,x9373)
% 32.24/32.06 [938]P1337(x9383,x9382)+~E(x9381,x9382)+~P1337(x9383,x9381)
% 32.24/32.06 [939]~P2000(x9391)+P2000(x9392)+~E(x9391,x9392)
% 32.24/32.06 [940]~P1997(x9401)+P1997(x9402)+~E(x9401,x9402)
% 32.24/32.06 [941]P2150(x9412,x9413)+~E(x9411,x9412)+~P2150(x9411,x9413)
% 32.24/32.06 [942]P2150(x9423,x9422)+~E(x9421,x9422)+~P2150(x9423,x9421)
% 32.24/32.06 [943]~P2164(x9431)+P2164(x9432)+~E(x9431,x9432)
% 32.24/32.06 [944]~P2162(x9441)+P2162(x9442)+~E(x9441,x9442)
% 32.24/32.06 [945]~P1774(x9451)+P1774(x9452)+~E(x9451,x9452)
% 32.24/32.06 [946]~P2154(x9461)+P2154(x9462)+~E(x9461,x9462)
% 32.24/32.06 [947]~P2151(x9471)+P2151(x9472)+~E(x9471,x9472)
% 32.24/32.06 [948]~P1772(x9481)+P1772(x9482)+~E(x9481,x9482)
% 32.24/32.06 [949]~P341(x9491)+P341(x9492)+~E(x9491,x9492)
% 32.24/32.06 [950]~P2152(x9501)+P2152(x9502)+~E(x9501,x9502)
% 32.24/32.06 [951]~P29(x9511)+P29(x9512)+~E(x9511,x9512)
% 32.24/32.06 [952]~P117(x9521)+P117(x9522)+~E(x9521,x9522)
% 32.24/32.06 [953]~P388(x9531)+P388(x9532)+~E(x9531,x9532)
% 32.24/32.06 [954]P1271(x9542,x9543)+~E(x9541,x9542)+~P1271(x9541,x9543)
% 32.24/32.06 [955]P1271(x9553,x9552)+~E(x9551,x9552)+~P1271(x9553,x9551)
% 32.24/32.06 [956]~P2601(x9561)+P2601(x9562)+~E(x9561,x9562)
% 32.24/32.06 [957]P1251(x9572,x9573)+~E(x9571,x9572)+~P1251(x9571,x9573)
% 32.24/32.07 [958]P1251(x9583,x9582)+~E(x9581,x9582)+~P1251(x9583,x9581)
% 32.24/32.07 [959]~P461(x9591)+P461(x9592)+~E(x9591,x9592)
% 32.24/32.07 [960]~P146(x9601)+P146(x9602)+~E(x9601,x9602)
% 32.24/32.07 [961]~P268(x9611)+P268(x9612)+~E(x9611,x9612)
% 32.24/32.07 [962]P1296(x9622,x9623)+~E(x9621,x9622)+~P1296(x9621,x9623)
% 32.24/32.07 [963]P1296(x9633,x9632)+~E(x9631,x9632)+~P1296(x9633,x9631)
% 32.24/32.07 [964]P1332(x9642,x9643)+~E(x9641,x9642)+~P1332(x9641,x9643)
% 32.24/32.07 [965]P1332(x9653,x9652)+~E(x9651,x9652)+~P1332(x9653,x9651)
% 32.24/32.07 [966]P1434(x9662,x9663)+~E(x9661,x9662)+~P1434(x9661,x9663)
% 32.24/32.07 [967]P1434(x9673,x9672)+~E(x9671,x9672)+~P1434(x9673,x9671)
% 32.24/32.07 [968]~P707(x9681)+P707(x9682)+~E(x9681,x9682)
% 32.24/32.07 [969]P856(x9692,x9693)+~E(x9691,x9692)+~P856(x9691,x9693)
% 32.24/32.07 [970]P856(x9703,x9702)+~E(x9701,x9702)+~P856(x9703,x9701)
% 32.24/32.07 [971]~P1914(x9711)+P1914(x9712)+~E(x9711,x9712)
% 32.24/32.07 [972]P487(x9722,x9723)+~E(x9721,x9722)+~P487(x9721,x9723)
% 32.24/32.07 [973]P487(x9733,x9732)+~E(x9731,x9732)+~P487(x9733,x9731)
% 32.24/32.07 [974]~P1592(x9741)+P1592(x9742)+~E(x9741,x9742)
% 32.24/32.07 [975]~P1988(x9751)+P1988(x9752)+~E(x9751,x9752)
% 32.24/32.07 [976]P1649(x9762,x9763)+~E(x9761,x9762)+~P1649(x9761,x9763)
% 32.24/32.07 [977]P1649(x9773,x9772)+~E(x9771,x9772)+~P1649(x9773,x9771)
% 32.24/32.07 [978]~P267(x9781)+P267(x9782)+~E(x9781,x9782)
% 32.24/32.07 [979]P1764(x9792,x9793)+~E(x9791,x9792)+~P1764(x9791,x9793)
% 32.24/32.07 [980]P1764(x9803,x9802)+~E(x9801,x9802)+~P1764(x9803,x9801)
% 32.24/32.07 [981]P1065(x9812,x9813)+~E(x9811,x9812)+~P1065(x9811,x9813)
% 32.24/32.07 [982]P1065(x9823,x9822)+~E(x9821,x9822)+~P1065(x9823,x9821)
% 32.24/32.07 [983]P1143(x9832,x9833)+~E(x9831,x9832)+~P1143(x9831,x9833)
% 32.24/32.07 [984]P1143(x9843,x9842)+~E(x9841,x9842)+~P1143(x9843,x9841)
% 32.24/32.07 [985]P2185(x9852,x9853)+~E(x9851,x9852)+~P2185(x9851,x9853)
% 32.24/32.07 [986]P2185(x9863,x9862)+~E(x9861,x9862)+~P2185(x9863,x9861)
% 32.24/32.07 [987]~P1606(x9871)+P1606(x9872)+~E(x9871,x9872)
% 32.24/32.07 [988]P1290(x9882,x9883)+~E(x9881,x9882)+~P1290(x9881,x9883)
% 32.24/32.07 [989]P1290(x9893,x9892)+~E(x9891,x9892)+~P1290(x9893,x9891)
% 32.24/32.07 [990]P2577(x9902,x9903)+~E(x9901,x9902)+~P2577(x9901,x9903)
% 32.24/32.07 [991]P2577(x9913,x9912)+~E(x9911,x9912)+~P2577(x9913,x9911)
% 32.24/32.07 [992]P1328(x9922,x9923)+~E(x9921,x9922)+~P1328(x9921,x9923)
% 32.24/32.07 [993]P1328(x9933,x9932)+~E(x9931,x9932)+~P1328(x9933,x9931)
% 32.24/32.07 [994]P1335(x9942,x9943)+~E(x9941,x9942)+~P1335(x9941,x9943)
% 32.24/32.07 [995]P1335(x9953,x9952)+~E(x9951,x9952)+~P1335(x9953,x9951)
% 32.24/32.07 [996]P2083(x9962,x9963)+~E(x9961,x9962)+~P2083(x9961,x9963)
% 32.24/32.07 [997]P2083(x9973,x9972)+~E(x9971,x9972)+~P2083(x9973,x9971)
% 32.24/32.07 [998]~P1419(x9981)+P1419(x9982)+~E(x9981,x9982)
% 32.24/32.07 [999]~P2498(x9991)+P2498(x9992)+~E(x9991,x9992)
% 32.24/32.07 [1000]P992(x10002,x10003)+~E(x10001,x10002)+~P992(x10001,x10003)
% 32.24/32.07 [1001]P992(x10013,x10012)+~E(x10011,x10012)+~P992(x10013,x10011)
% 32.24/32.07 [1002]~P789(x10021)+P789(x10022)+~E(x10021,x10022)
% 32.24/32.07 [1003]~P1504(x10031)+P1504(x10032)+~E(x10031,x10032)
% 32.24/32.07 [1004]P2194(x10042,x10043)+~E(x10041,x10042)+~P2194(x10041,x10043)
% 32.24/32.07 [1005]P2194(x10053,x10052)+~E(x10051,x10052)+~P2194(x10053,x10051)
% 32.24/32.07 [1006]~P1019(x10061)+P1019(x10062)+~E(x10061,x10062)
% 32.24/32.07 [1007]P1209(x10072,x10073)+~E(x10071,x10072)+~P1209(x10071,x10073)
% 32.24/32.07 [1008]P1209(x10083,x10082)+~E(x10081,x10082)+~P1209(x10083,x10081)
% 32.24/32.07 [1009]P2308(x10092,x10093)+~E(x10091,x10092)+~P2308(x10091,x10093)
% 32.24/32.07 [1010]P2308(x10103,x10102)+~E(x10101,x10102)+~P2308(x10103,x10101)
% 32.24/32.07 [1011]P1255(x10112,x10113)+~E(x10111,x10112)+~P1255(x10111,x10113)
% 32.24/32.07 [1012]P1255(x10123,x10122)+~E(x10121,x10122)+~P1255(x10123,x10121)
% 32.24/32.07 [1013]~P1574(x10131)+P1574(x10132)+~E(x10131,x10132)
% 32.24/32.07 [1014]P189(x10142,x10143)+~E(x10141,x10142)+~P189(x10141,x10143)
% 32.24/32.07 [1015]P189(x10153,x10152)+~E(x10151,x10152)+~P189(x10153,x10151)
% 32.24/32.07 [1016]~P1030(x10161)+P1030(x10162)+~E(x10161,x10162)
% 32.24/32.07 [1017]P1347(x10172,x10173)+~E(x10171,x10172)+~P1347(x10171,x10173)
% 32.24/32.07 [1018]P1347(x10183,x10182)+~E(x10181,x10182)+~P1347(x10183,x10181)
% 32.24/32.07 [1019]P1105(x10192,x10193)+~E(x10191,x10192)+~P1105(x10191,x10193)
% 32.24/32.07 [1020]P1105(x10203,x10202)+~E(x10201,x10202)+~P1105(x10203,x10201)
% 32.24/32.07 [1021]~P360(x10211)+P360(x10212)+~E(x10211,x10212)
% 32.24/32.07 [1022]P1320(x10222,x10223)+~E(x10221,x10222)+~P1320(x10221,x10223)
% 32.24/32.07 [1023]P1320(x10233,x10232)+~E(x10231,x10232)+~P1320(x10233,x10231)
% 32.24/32.07 [1024]P1821(x10242,x10243)+~E(x10241,x10242)+~P1821(x10241,x10243)
% 32.24/32.07 [1025]P1821(x10253,x10252)+~E(x10251,x10252)+~P1821(x10253,x10251)
% 32.24/32.07 [1026]~P1498(x10261)+P1498(x10262)+~E(x10261,x10262)
% 32.24/32.07 [1027]~P1822(x10271)+P1822(x10272)+~E(x10271,x10272)
% 32.24/32.07 [1028]P2037(x10282,x10283)+~E(x10281,x10282)+~P2037(x10281,x10283)
% 32.24/32.07 [1029]P2037(x10293,x10292)+~E(x10291,x10292)+~P2037(x10293,x10291)
% 32.24/32.07 [1030]~P969(x10301)+P969(x10302)+~E(x10301,x10302)
% 32.24/32.07 [1031]~P2042(x10311)+P2042(x10312)+~E(x10311,x10312)
% 32.24/32.07 [1032]~P971(x10321)+P971(x10322)+~E(x10321,x10322)
% 32.24/32.07 [1033]~P1951(x10331)+P1951(x10332)+~E(x10331,x10332)
% 32.24/32.07 [1034]~P2060(x10341)+P2060(x10342)+~E(x10341,x10342)
% 32.24/32.07 [1035]P2068(x10352,x10353)+~E(x10351,x10352)+~P2068(x10351,x10353)
% 32.24/32.07 [1036]P2068(x10363,x10362)+~E(x10361,x10362)+~P2068(x10363,x10361)
% 32.24/32.07 [1037]P1179(x10372,x10373)+~E(x10371,x10372)+~P1179(x10371,x10373)
% 32.24/32.07 [1038]P1179(x10383,x10382)+~E(x10381,x10382)+~P1179(x10383,x10381)
% 32.24/32.07 [1039]~P2069(x10391)+P2069(x10392)+~E(x10391,x10392)
% 32.24/32.07 [1040]~P1627(x10401)+P1627(x10402)+~E(x10401,x10402)
% 32.24/32.07 [1041]~P68(x10411)+P68(x10412)+~E(x10411,x10412)
% 32.24/32.07 [1042]~P347(x10421)+P347(x10422)+~E(x10421,x10422)
% 32.24/32.07 [1043]~P141(x10431)+P141(x10432)+~E(x10431,x10432)
% 32.24/32.07 [1044]~P1438(x10441)+P1438(x10442)+~E(x10441,x10442)
% 32.24/32.07 [1045]~P66(x10451)+P66(x10452)+~E(x10451,x10452)
% 32.24/32.07 [1046]~P1080(x10461)+P1080(x10462)+~E(x10461,x10462)
% 32.24/32.07 [1047]~P67(x10471)+P67(x10472)+~E(x10471,x10472)
% 32.24/32.07 [1048]~P2374(x10481)+P2374(x10482)+~E(x10481,x10482)
% 32.24/32.07 [1049]~P2290(x10491)+P2290(x10492)+~E(x10491,x10492)
% 32.24/32.07 [1050]~P26(x10501)+P26(x10502)+~E(x10501,x10502)
% 32.24/32.07 [1051]P923(x10512,x10513)+~E(x10511,x10512)+~P923(x10511,x10513)
% 32.24/32.07 [1052]P923(x10523,x10522)+~E(x10521,x10522)+~P923(x10523,x10521)
% 32.24/32.07 [1053]~P1278(x10531)+P1278(x10532)+~E(x10531,x10532)
% 32.24/32.07 [1054]~P2426(x10541)+P2426(x10542)+~E(x10541,x10542)
% 32.24/32.07 [1055]~P1427(x10551)+P1427(x10552)+~E(x10551,x10552)
% 32.24/32.07 [1056]P2538(x10562,x10563)+~E(x10561,x10562)+~P2538(x10561,x10563)
% 32.24/32.07 [1057]P2538(x10573,x10572)+~E(x10571,x10572)+~P2538(x10573,x10571)
% 32.24/32.07 [1058]~P1468(x10581)+P1468(x10582)+~E(x10581,x10582)
% 32.24/32.07 [1059]~P1605(x10591)+P1605(x10592)+~E(x10591,x10592)
% 32.24/32.07 [1060]~P1503(x10601)+P1503(x10602)+~E(x10601,x10602)
% 32.24/32.07 [1061]P520(x10612,x10613)+~E(x10611,x10612)+~P520(x10611,x10613)
% 32.24/32.07 [1062]P520(x10623,x10622)+~E(x10621,x10622)+~P520(x10623,x10621)
% 32.24/32.07 [1063]~P964(x10631)+P964(x10632)+~E(x10631,x10632)
% 32.24/32.07 [1064]~P1016(x10641)+P1016(x10642)+~E(x10641,x10642)
% 32.24/32.07 [1065]~P1987(x10651)+P1987(x10652)+~E(x10651,x10652)
% 32.24/32.07 [1066]P849(x10662,x10663)+~E(x10661,x10662)+~P849(x10661,x10663)
% 32.24/32.07 [1067]P849(x10673,x10672)+~E(x10671,x10672)+~P849(x10673,x10671)
% 32.24/32.07 [1068]~P83(x10681)+P83(x10682)+~E(x10681,x10682)
% 32.24/32.07 [1069]~P28(x10691)+P28(x10692)+~E(x10691,x10692)
% 32.24/32.07 [1070]P239(x10702,x10703)+~E(x10701,x10702)+~P239(x10701,x10703)
% 32.24/32.07 [1071]P239(x10713,x10712)+~E(x10711,x10712)+~P239(x10713,x10711)
% 32.24/32.07 [1072]~P2175(x10721)+P2175(x10722)+~E(x10721,x10722)
% 32.24/32.07 [1073]P2270(x10732,x10733)+~E(x10731,x10732)+~P2270(x10731,x10733)
% 32.24/32.07 [1074]P2270(x10743,x10742)+~E(x10741,x10742)+~P2270(x10743,x10741)
% 32.24/32.07 [1075]P2184(x10752,x10753)+~E(x10751,x10752)+~P2184(x10751,x10753)
% 32.24/32.07 [1076]P2184(x10763,x10762)+~E(x10761,x10762)+~P2184(x10763,x10761)
% 32.24/32.07 [1077]~P2055(x10771)+P2055(x10772)+~E(x10771,x10772)
% 32.24/32.07 [1078]~P2189(x10781)+P2189(x10782)+~E(x10781,x10782)
% 32.24/32.07 [1079]P2192(x10792,x10793)+~E(x10791,x10792)+~P2192(x10791,x10793)
% 32.24/32.07 [1080]P2192(x10803,x10802)+~E(x10801,x10802)+~P2192(x10803,x10801)
% 32.24/32.07 [1081]~P2389(x10811)+P2389(x10812)+~E(x10811,x10812)
% 32.24/32.07 [1082]P1034(x10822,x10823)+~E(x10821,x10822)+~P1034(x10821,x10823)
% 32.24/32.07 [1083]P1034(x10833,x10832)+~E(x10831,x10832)+~P1034(x10833,x10831)
% 32.24/32.07 [1084]P1512(x10842,x10843)+~E(x10841,x10842)+~P1512(x10841,x10843)
% 32.24/32.07 [1085]P1512(x10853,x10852)+~E(x10851,x10852)+~P1512(x10853,x10851)
% 32.24/32.07 [1086]~P2312(x10861)+P2312(x10862)+~E(x10861,x10862)
% 32.24/32.07 [1087]~P2285(x10871)+P2285(x10872)+~E(x10871,x10872)
% 32.24/32.07 [1088]P1984(x10882,x10883)+~E(x10881,x10882)+~P1984(x10881,x10883)
% 32.24/32.07 [1089]P1984(x10893,x10892)+~E(x10891,x10892)+~P1984(x10893,x10891)
% 32.24/32.07 [1090]~P2280(x10901)+P2280(x10902)+~E(x10901,x10902)
% 32.24/32.07 [1091]P1306(x10912,x10913)+~E(x10911,x10912)+~P1306(x10911,x10913)
% 32.24/32.07 [1092]P1306(x10923,x10922)+~E(x10921,x10922)+~P1306(x10923,x10921)
% 32.24/32.07 [1093]~P2300(x10931)+P2300(x10932)+~E(x10931,x10932)
% 32.24/32.07 [1094]~P2348(x10941)+P2348(x10942)+~E(x10941,x10942)
% 32.24/32.07 [1095]~P355(x10951)+P355(x10952)+~E(x10951,x10952)
% 32.24/32.07 [1096]~P2266(x10961)+P2266(x10962)+~E(x10961,x10962)
% 32.24/32.07 [1097]~P2571(x10971)+P2571(x10972)+~E(x10971,x10972)
% 32.24/32.07 [1098]P709(x10982,x10983)+~E(x10981,x10982)+~P709(x10981,x10983)
% 32.24/32.07 [1099]P709(x10993,x10992)+~E(x10991,x10992)+~P709(x10993,x10991)
% 32.24/32.07 [1100]~P1640(x11001)+P1640(x11002)+~E(x11001,x11002)
% 32.24/32.07 [1101]P2551(x11012,x11013)+~E(x11011,x11012)+~P2551(x11011,x11013)
% 32.24/32.07 [1102]P2551(x11023,x11022)+~E(x11021,x11022)+~P2551(x11023,x11021)
% 32.24/32.07 [1103]P183(x11032,x11033)+~E(x11031,x11032)+~P183(x11031,x11033)
% 32.24/32.07 [1104]P183(x11043,x11042)+~E(x11041,x11042)+~P183(x11043,x11041)
% 32.24/32.07 [1105]P168(x11052,x11053)+~E(x11051,x11052)+~P168(x11051,x11053)
% 32.24/32.07 [1106]P168(x11063,x11062)+~E(x11061,x11062)+~P168(x11063,x11061)
% 32.24/32.07 [1107]P1297(x11072,x11073)+~E(x11071,x11072)+~P1297(x11071,x11073)
% 32.24/32.07 [1108]P1297(x11083,x11082)+~E(x11081,x11082)+~P1297(x11083,x11081)
% 32.24/32.07 [1109]P406(x11092,x11093)+~E(x11091,x11092)+~P406(x11091,x11093)
% 32.24/32.07 [1110]P406(x11103,x11102)+~E(x11101,x11102)+~P406(x11103,x11101)
% 32.24/32.07 [1111]~P217(x11111)+P217(x11112)+~E(x11111,x11112)
% 32.24/32.07 [1112]~P779(x11121)+P779(x11122)+~E(x11121,x11122)
% 32.24/32.07 [1113]~P218(x11131)+P218(x11132)+~E(x11131,x11132)
% 32.24/32.07 [1114]~P685(x11141)+P685(x11142)+~E(x11141,x11142)
% 32.24/32.07 [1115]P912(x11152,x11153)+~E(x11151,x11152)+~P912(x11151,x11153)
% 32.24/32.07 [1116]P912(x11163,x11162)+~E(x11161,x11162)+~P912(x11163,x11161)
% 32.24/32.07 [1117]P776(x11172,x11173)+~E(x11171,x11172)+~P776(x11171,x11173)
% 32.24/32.07 [1118]P776(x11183,x11182)+~E(x11181,x11182)+~P776(x11183,x11181)
% 32.24/32.07 [1119]~P1567(x11191)+P1567(x11192)+~E(x11191,x11192)
% 32.24/32.07 [1120]~P786(x11201)+P786(x11202)+~E(x11201,x11202)
% 32.24/32.07 [1121]~P205(x11211)+P205(x11212)+~E(x11211,x11212)
% 32.24/32.07 [1122]P775(x11222,x11223)+~E(x11221,x11222)+~P775(x11221,x11223)
% 32.24/32.07 [1123]P775(x11233,x11232)+~E(x11231,x11232)+~P775(x11233,x11231)
% 32.24/32.07 [1124]~P837(x11241)+P837(x11242)+~E(x11241,x11242)
% 32.24/32.07 [1125]P2550(x11252,x11253)+~E(x11251,x11252)+~P2550(x11251,x11253)
% 32.24/32.07 [1126]P2550(x11263,x11262)+~E(x11261,x11262)+~P2550(x11263,x11261)
% 32.24/32.07 [1127]~P206(x11271)+P206(x11272)+~E(x11271,x11272)
% 32.24/32.07 [1128]~P285(x11281)+P285(x11282)+~E(x11281,x11282)
% 32.24/32.07 [1129]P1591(x11292,x11293)+~E(x11291,x11292)+~P1591(x11291,x11293)
% 32.24/32.07 [1130]P1591(x11303,x11302)+~E(x11301,x11302)+~P1591(x11303,x11301)
% 32.24/32.07 [1131]~P1247(x11311)+P1247(x11312)+~E(x11311,x11312)
% 32.24/32.07 [1132]P277(x11322,x11323)+~E(x11321,x11322)+~P277(x11321,x11323)
% 32.24/32.07 [1133]P277(x11333,x11332)+~E(x11331,x11332)+~P277(x11333,x11331)
% 32.24/32.07 [1134]P1665(x11342,x11343)+~E(x11341,x11342)+~P1665(x11341,x11343)
% 32.24/32.07 [1135]P1665(x11353,x11352)+~E(x11351,x11352)+~P1665(x11353,x11351)
% 32.24/32.07 [1136]P2546(x11362,x11363)+~E(x11361,x11362)+~P2546(x11361,x11363)
% 32.24/32.07 [1137]P2546(x11373,x11372)+~E(x11371,x11372)+~P2546(x11373,x11371)
% 32.24/32.07 [1138]~P204(x11381)+P204(x11382)+~E(x11381,x11382)
% 32.24/32.07 [1139]~P1197(x11391)+P1197(x11392)+~E(x11391,x11392)
% 32.24/32.07 [1140]~P1636(x11401)+P1636(x11402)+~E(x11401,x11402)
% 32.24/32.07 [1141]~P720(x11411)+P720(x11412)+~E(x11411,x11412)
% 32.24/32.07 [1142]P1198(x11422,x11423)+~E(x11421,x11422)+~P1198(x11421,x11423)
% 32.24/32.07 [1143]P1198(x11433,x11432)+~E(x11431,x11432)+~P1198(x11433,x11431)
% 32.24/32.07 [1144]~P911(x11441)+P911(x11442)+~E(x11441,x11442)
% 32.24/32.07 [1145]P418(x11452,x11453)+~E(x11451,x11452)+~P418(x11451,x11453)
% 32.24/32.07 [1146]P418(x11463,x11462)+~E(x11461,x11462)+~P418(x11463,x11461)
% 32.24/32.07 [1147]P1248(x11472,x11473)+~E(x11471,x11472)+~P1248(x11471,x11473)
% 32.24/32.07 [1148]P1248(x11483,x11482)+~E(x11481,x11482)+~P1248(x11483,x11481)
% 32.24/32.07 [1149]~P320(x11491)+P320(x11492)+~E(x11491,x11492)
% 32.24/32.07 [1150]~P1173(x11501)+P1173(x11502)+~E(x11501,x11502)
% 32.24/32.07 [1151]~P2063(x11511)+P2063(x11512)+~E(x11511,x11512)
% 32.24/32.07 [1152]~P726(x11521)+P726(x11522)+~E(x11521,x11522)
% 32.24/32.07 [1153]~P429(x11531)+P429(x11532)+~E(x11531,x11532)
% 32.24/32.07 [1154]~P354(x11541)+P354(x11542)+~E(x11541,x11542)
% 32.24/32.07 [1155]~P1563(x11551)+P1563(x11552)+~E(x11551,x11552)
% 32.24/32.07 [1156]P1078(x11562,x11563)+~E(x11561,x11562)+~P1078(x11561,x11563)
% 32.24/32.07 [1157]P1078(x11573,x11572)+~E(x11571,x11572)+~P1078(x11573,x11571)
% 32.24/32.07 [1158]~P1163(x11581)+P1163(x11582)+~E(x11581,x11582)
% 32.24/32.07 [1159]P2549(x11592,x11593)+~E(x11591,x11592)+~P2549(x11591,x11593)
% 32.24/32.07 [1160]P2549(x11603,x11602)+~E(x11601,x11602)+~P2549(x11603,x11601)
% 32.24/32.07 [1161]P1174(x11612,x11613)+~E(x11611,x11612)+~P1174(x11611,x11613)
% 32.24/32.07 [1162]P1174(x11623,x11622)+~E(x11621,x11622)+~P1174(x11623,x11621)
% 32.24/32.07 [1163]P420(x11632,x11633)+~E(x11631,x11632)+~P420(x11631,x11633)
% 32.24/32.07 [1164]P420(x11643,x11642)+~E(x11641,x11642)+~P420(x11643,x11641)
% 32.24/32.07 [1165]P861(x11652,x11653)+~E(x11651,x11652)+~P861(x11651,x11653)
% 32.24/32.07 [1166]P861(x11663,x11662)+~E(x11661,x11662)+~P861(x11663,x11661)
% 32.24/32.07 [1167]~P1154(x11671)+P1154(x11672)+~E(x11671,x11672)
% 32.24/32.07 [1168]~P348(x11681)+P348(x11682)+~E(x11681,x11682)
% 32.24/32.07 [1169]~P346(x11691)+P346(x11692)+~E(x11691,x11692)
% 32.24/32.07 [1170]P1327(x11702,x11703)+~E(x11701,x11702)+~P1327(x11701,x11703)
% 32.24/32.07 [1171]P1327(x11713,x11712)+~E(x11711,x11712)+~P1327(x11713,x11711)
% 32.24/32.07 [1172]P2458(x11722,x11723)+~E(x11721,x11722)+~P2458(x11721,x11723)
% 32.24/32.07 [1173]P2458(x11733,x11732)+~E(x11731,x11732)+~P2458(x11733,x11731)
% 32.24/32.07 [1174]P2526(x11742,x11743)+~E(x11741,x11742)+~P2526(x11741,x11743)
% 32.24/32.07 [1175]P2526(x11753,x11752)+~E(x11751,x11752)+~P2526(x11753,x11751)
% 32.24/32.07 [1176]P1294(x11762,x11763)+~E(x11761,x11762)+~P1294(x11761,x11763)
% 32.24/32.07 [1177]P1294(x11773,x11772)+~E(x11771,x11772)+~P1294(x11773,x11771)
% 32.24/32.07 [1178]~P1727(x11781)+P1727(x11782)+~E(x11781,x11782)
% 32.24/32.07 [1179]~P1334(x11791)+P1334(x11792)+~E(x11791,x11792)
% 32.24/32.07 [1180]~P1036(x11801)+P1036(x11802)+~E(x11801,x11802)
% 32.24/32.07 [1181]~P250(x11811)+P250(x11812)+~E(x11811,x11812)
% 32.24/32.07 [1182]P1358(x11822,x11823)+~E(x11821,x11822)+~P1358(x11821,x11823)
% 32.24/32.07 [1183]P1358(x11833,x11832)+~E(x11831,x11832)+~P1358(x11833,x11831)
% 32.24/32.07 [1184]~P1738(x11841)+P1738(x11842)+~E(x11841,x11842)
% 32.24/32.07 [1185]P2481(x11852,x11853)+~E(x11851,x11852)+~P2481(x11851,x11853)
% 32.24/32.07 [1186]P2481(x11863,x11862)+~E(x11861,x11862)+~P2481(x11863,x11861)
% 32.24/32.07 [1187]~P2223(x11871)+P2223(x11872)+~E(x11871,x11872)
% 32.24/32.07 [1188]~P1122(x11881)+P1122(x11882)+~E(x11881,x11882)
% 32.24/32.07 [1189]~P959(x11891)+P959(x11892)+~E(x11891,x11892)
% 32.24/32.07 [1190]~P2181(x11901)+P2181(x11902)+~E(x11901,x11902)
% 32.24/32.07 [1191]P1322(x11912,x11913)+~E(x11911,x11912)+~P1322(x11911,x11913)
% 32.24/32.07 [1192]P1322(x11923,x11922)+~E(x11921,x11922)+~P1322(x11923,x11921)
% 32.24/32.07 [1193]~P30(x11931)+P30(x11932)+~E(x11931,x11932)
% 32.24/32.07 [1194]~P1085(x11941)+P1085(x11942)+~E(x11941,x11942)
% 32.24/32.07 [1195]P1086(x11952,x11953)+~E(x11951,x11952)+~P1086(x11951,x11953)
% 32.24/32.07 [1196]P1086(x11963,x11962)+~E(x11961,x11962)+~P1086(x11963,x11961)
% 32.24/32.07 [1197]~P1087(x11971)+P1087(x11972)+~E(x11971,x11972)
% 32.24/32.07 [1198]~P1084(x11981)+P1084(x11982)+~E(x11981,x11982)
% 32.24/32.07 [1199]~P1573(x11991)+P1573(x11992)+~E(x11991,x11992)
% 32.24/32.07 [1200]P484(x12002,x12003)+~E(x12001,x12002)+~P484(x12001,x12003)
% 32.24/32.07 [1201]P484(x12013,x12012)+~E(x12011,x12012)+~P484(x12013,x12011)
% 32.24/32.07 [1202]~P1380(x12021)+P1380(x12022)+~E(x12021,x12022)
% 32.24/32.07 [1203]P1355(x12032,x12033)+~E(x12031,x12032)+~P1355(x12031,x12033)
% 32.24/32.07 [1204]P1355(x12043,x12042)+~E(x12041,x12042)+~P1355(x12043,x12041)
% 32.24/32.07 [1205]~P1379(x12051)+P1379(x12052)+~E(x12051,x12052)
% 32.24/32.07 [1206]~P1389(x12061)+P1389(x12062)+~E(x12061,x12062)
% 32.24/32.07 [1207]~P1088(x12071)+P1088(x12072)+~E(x12071,x12072)
% 32.24/32.07 [1208]~P1388(x12081)+P1388(x12082)+~E(x12081,x12082)
% 32.24/32.07 [1209]~P1406(x12091)+P1406(x12092)+~E(x12091,x12092)
% 32.24/32.07 [1210]P1194(x12102,x12103)+~E(x12101,x12102)+~P1194(x12101,x12103)
% 32.24/32.07 [1211]P1194(x12113,x12112)+~E(x12111,x12112)+~P1194(x12113,x12111)
% 32.24/32.07 [1212]~P1349(x12121)+P1349(x12122)+~E(x12121,x12122)
% 32.24/32.07 [1213]~P1467(x12131)+P1467(x12132)+~E(x12131,x12132)
% 32.24/32.07 [1214]P1043(x12142,x12143)+~E(x12141,x12142)+~P1043(x12141,x12143)
% 32.24/32.07 [1215]P1043(x12153,x12152)+~E(x12151,x12152)+~P1043(x12153,x12151)
% 32.24/32.07 [1216]~P1469(x12161)+P1469(x12162)+~E(x12161,x12162)
% 32.24/32.07 [1217]~P1464(x12171)+P1464(x12172)+~E(x12171,x12172)
% 32.24/32.07 [1218]~P978(x12181)+P978(x12182)+~E(x12181,x12182)
% 32.24/32.07 [1219]~P1465(x12191)+P1465(x12192)+~E(x12191,x12192)
% 32.24/32.07 [1220]~P1556(x12201)+P1556(x12202)+~E(x12201,x12202)
% 32.24/32.07 [1221]P1217(x12212,x12213)+~E(x12211,x12212)+~P1217(x12211,x12213)
% 32.24/32.07 [1222]P1217(x12223,x12222)+~E(x12221,x12222)+~P1217(x12223,x12221)
% 32.24/32.07 [1223]~P1542(x12231)+P1542(x12232)+~E(x12231,x12232)
% 32.24/32.07 [1224]~P1560(x12241)+P1560(x12242)+~E(x12241,x12242)
% 32.24/32.07 [1225]P1200(x12252,x12253)+~E(x12251,x12252)+~P1200(x12251,x12253)
% 32.24/32.07 [1226]P1200(x12263,x12262)+~E(x12261,x12262)+~P1200(x12263,x12261)
% 32.24/32.07 [1227]~P1541(x12271)+P1541(x12272)+~E(x12271,x12272)
% 32.24/32.07 [1228]~P1566(x12281)+P1566(x12282)+~E(x12281,x12282)
% 32.24/32.07 [1229]~P209(x12291)+P209(x12292)+~E(x12291,x12292)
% 32.24/32.07 [1230]~P1540(x12301)+P1540(x12302)+~E(x12301,x12302)
% 32.24/32.07 [1231]~P1536(x12311)+P1536(x12312)+~E(x12311,x12312)
% 32.24/32.07 [1232]~P19(x12321)+P19(x12322)+~E(x12321,x12322)
% 32.24/32.07 [1233]P920(x12332,x12333)+~E(x12331,x12332)+~P920(x12331,x12333)
% 32.24/32.07 [1234]P920(x12343,x12342)+~E(x12341,x12342)+~P920(x12343,x12341)
% 32.24/32.07 [1235]P714(x12352,x12353)+~E(x12351,x12352)+~P714(x12351,x12353)
% 32.24/32.07 [1236]P714(x12363,x12362)+~E(x12361,x12362)+~P714(x12363,x12361)
% 32.24/32.07 [1237]~P768(x12371)+P768(x12372)+~E(x12371,x12372)
% 32.24/32.07 [1238]~P498(x12381)+P498(x12382)+~E(x12381,x12382)
% 32.24/32.07 [1239]~P2276(x12391)+P2276(x12392)+~E(x12391,x12392)
% 32.24/32.07 [1240]P1204(x12402,x12403)+~E(x12401,x12402)+~P1204(x12401,x12403)
% 32.24/32.07 [1241]P1204(x12413,x12412)+~E(x12411,x12412)+~P1204(x12413,x12411)
% 32.24/32.07 [1242]~P79(x12421)+P79(x12422)+~E(x12421,x12422)
% 32.24/32.07 [1243]P2145(x12432,x12433)+~E(x12431,x12432)+~P2145(x12431,x12433)
% 32.24/32.07 [1244]P2145(x12443,x12442)+~E(x12441,x12442)+~P2145(x12443,x12441)
% 32.24/32.07 [1245]P1473(x12452,x12453)+~E(x12451,x12452)+~P1473(x12451,x12453)
% 32.24/32.07 [1246]P1473(x12463,x12462)+~E(x12461,x12462)+~P1473(x12463,x12461)
% 32.24/32.07 [1247]~P108(x12471)+P108(x12472)+~E(x12471,x12472)
% 32.24/32.07 [1248]~P2102(x12481)+P2102(x12482)+~E(x12481,x12482)
% 32.24/32.07 [1249]~P2143(x12491)+P2143(x12492)+~E(x12491,x12492)
% 32.24/32.07 [1250]P2532(x12502,x12503)+~E(x12501,x12502)+~P2532(x12501,x12503)
% 32.24/32.07 [1251]P2532(x12513,x12512)+~E(x12511,x12512)+~P2532(x12513,x12511)
% 32.24/32.07 [1252]P1815(x12522,x12523)+~E(x12521,x12522)+~P1815(x12521,x12523)
% 32.24/32.07 [1253]P1815(x12533,x12532)+~E(x12531,x12532)+~P1815(x12533,x12531)
% 32.24/32.07 [1254]~P2329(x12541)+P2329(x12542)+~E(x12541,x12542)
% 32.24/32.07 [1255]P1514(x12552,x12553)+~E(x12551,x12552)+~P1514(x12551,x12553)
% 32.24/32.07 [1256]P1514(x12563,x12562)+~E(x12561,x12562)+~P1514(x12563,x12561)
% 32.24/32.07 [1257]P1517(x12572,x12573)+~E(x12571,x12572)+~P1517(x12571,x12573)
% 32.24/32.07 [1258]P1517(x12583,x12582)+~E(x12581,x12582)+~P1517(x12583,x12581)
% 32.24/32.07 [1259]~P1654(x12591)+P1654(x12592)+~E(x12591,x12592)
% 32.24/32.07 [1260]P842(x12602,x12603)+~E(x12601,x12602)+~P842(x12601,x12603)
% 32.24/32.07 [1261]P842(x12613,x12612)+~E(x12611,x12612)+~P842(x12613,x12611)
% 32.24/32.07 [1262]P1513(x12622,x12623)+~E(x12621,x12622)+~P1513(x12621,x12623)
% 32.24/32.07 [1263]P1513(x12633,x12632)+~E(x12631,x12632)+~P1513(x12633,x12631)
% 32.24/32.07 [1264]P1716(x12642,x12643)+~E(x12641,x12642)+~P1716(x12641,x12643)
% 32.24/32.07 [1265]P1716(x12653,x12652)+~E(x12651,x12652)+~P1716(x12653,x12651)
% 32.24/32.07 [1266]~P427(x12661)+P427(x12662)+~E(x12661,x12662)
% 32.24/32.07 [1267]P848(x12672,x12673)+~E(x12671,x12672)+~P848(x12671,x12673)
% 32.24/32.07 [1268]P848(x12683,x12682)+~E(x12681,x12682)+~P848(x12683,x12681)
% 32.24/32.07 [1269]~P24(x12691)+P24(x12692)+~E(x12691,x12692)
% 32.24/32.07 [1270]P1308(x12702,x12703)+~E(x12701,x12702)+~P1308(x12701,x12703)
% 32.24/32.07 [1271]P1308(x12713,x12712)+~E(x12711,x12712)+~P1308(x12713,x12711)
% 32.24/32.07 [1272]~P602(x12721)+P602(x12722)+~E(x12721,x12722)
% 32.24/32.07 [1273]~P1025(x12731)+P1025(x12732)+~E(x12731,x12732)
% 32.24/32.07 [1274]~P603(x12741)+P603(x12742)+~E(x12741,x12742)
% 32.24/32.07 [1275]P819(x12752,x12753)+~E(x12751,x12752)+~P819(x12751,x12753)
% 32.24/32.07 [1276]P819(x12763,x12762)+~E(x12761,x12762)+~P819(x12763,x12761)
% 32.24/32.07 [1277]P1160(x12772,x12773)+~E(x12771,x12772)+~P1160(x12771,x12773)
% 32.24/32.07 [1278]P1160(x12783,x12782)+~E(x12781,x12782)+~P1160(x12783,x12781)
% 32.24/32.07 [1279]~P25(x12791)+P25(x12792)+~E(x12791,x12792)
% 32.24/32.07 [1280]P1823(x12802,x12803)+~E(x12801,x12802)+~P1823(x12801,x12803)
% 32.24/32.07 [1281]P1823(x12813,x12812)+~E(x12811,x12812)+~P1823(x12813,x12811)
% 32.24/32.07 [1282]~P990(x12821)+P990(x12822)+~E(x12821,x12822)
% 32.24/32.07 [1283]~P1838(x12831)+P1838(x12832)+~E(x12831,x12832)
% 32.24/32.07 [1284]P1187(x12842,x12843)+~E(x12841,x12842)+~P1187(x12841,x12843)
% 32.24/32.07 [1285]P1187(x12853,x12852)+~E(x12851,x12852)+~P1187(x12853,x12851)
% 32.24/32.07 [1286]~P1742(x12861)+P1742(x12862)+~E(x12861,x12862)
% 32.24/32.07 [1287]~P1757(x12871)+P1757(x12872)+~E(x12871,x12872)
% 32.24/32.07 [1288]~P1758(x12881)+P1758(x12882)+~E(x12881,x12882)
% 32.24/32.07 [1289]~P1759(x12891)+P1759(x12892)+~E(x12891,x12892)
% 32.24/32.07 [1290]~P1760(x12901)+P1760(x12902)+~E(x12901,x12902)
% 32.24/32.07 [1291]~P522(x12911)+P522(x12912)+~E(x12911,x12912)
% 32.24/32.07 [1292]~P957(x12921)+P957(x12922)+~E(x12921,x12922)
% 32.24/32.07 [1293]~P836(x12931)+P836(x12932)+~E(x12931,x12932)
% 32.24/32.07 [1294]P821(x12942,x12943)+~E(x12941,x12942)+~P821(x12941,x12943)
% 32.24/32.07 [1295]P821(x12953,x12952)+~E(x12951,x12952)+~P821(x12953,x12951)
% 32.24/32.07 [1296]~P838(x12961)+P838(x12962)+~E(x12961,x12962)
% 32.24/32.07 [1297]~P523(x12971)+P523(x12972)+~E(x12971,x12972)
% 32.24/32.07 [1298]~P2182(x12981)+P2182(x12982)+~E(x12981,x12982)
% 32.24/32.07 [1299]~P2183(x12991)+P2183(x12992)+~E(x12991,x12992)
% 32.24/32.07 [1300]P847(x13002,x13003)+~E(x13001,x13002)+~P847(x13001,x13003)
% 32.24/32.07 [1301]P847(x13013,x13012)+~E(x13011,x13012)+~P847(x13013,x13011)
% 32.24/32.07 [1302]~P841(x13021)+P841(x13022)+~E(x13021,x13022)
% 32.24/32.07 [1303]~P558(x13031)+P558(x13032)+~E(x13031,x13032)
% 32.24/32.07 [1304]~P1661(x13041)+P1661(x13042)+~E(x13041,x13042)
% 32.24/32.07 [1305]P1317(x13052,x13053)+~E(x13051,x13052)+~P1317(x13051,x13053)
% 32.24/32.07 [1306]P1317(x13063,x13062)+~E(x13061,x13062)+~P1317(x13063,x13061)
% 32.24/32.07 [1307]~P1861(x13071)+P1861(x13072)+~E(x13071,x13072)
% 32.24/32.07 [1308]~P2319(x13081)+P2319(x13082)+~E(x13081,x13082)
% 32.24/32.07 [1309]~P421(x13091)+P421(x13092)+~E(x13091,x13092)
% 32.24/32.07 [1310]~P448(x13101)+P448(x13102)+~E(x13101,x13102)
% 32.24/32.07 [1311]~P2326(x13111)+P2326(x13112)+~E(x13111,x13112)
% 32.24/32.07 [1312]~P476(x13121)+P476(x13122)+~E(x13121,x13122)
% 32.24/32.07 [1313]~P431(x13131)+P431(x13132)+~E(x13131,x13132)
% 32.24/32.07 [1314]P820(x13142,x13143)+~E(x13141,x13142)+~P820(x13141,x13143)
% 32.24/32.07 [1315]P820(x13153,x13152)+~E(x13151,x13152)+~P820(x13153,x13151)
% 32.24/32.07 [1316]~P1008(x13161)+P1008(x13162)+~E(x13161,x13162)
% 32.24/32.07 [1317]~P537(x13171)+P537(x13172)+~E(x13171,x13172)
% 32.24/32.07 [1318]~P453(x13181)+P453(x13182)+~E(x13181,x13182)
% 32.24/32.07 [1319]P2246(x13192,x13193)+~E(x13191,x13192)+~P2246(x13191,x13193)
% 32.24/32.07 [1320]P2246(x13203,x13202)+~E(x13201,x13202)+~P2246(x13203,x13201)
% 32.24/32.07 [1321]P2029(x13212,x13213)+~E(x13211,x13212)+~P2029(x13211,x13213)
% 32.24/32.07 [1322]P2029(x13223,x13222)+~E(x13221,x13222)+~P2029(x13223,x13221)
% 32.24/32.07 [1323]~P553(x13231)+P553(x13232)+~E(x13231,x13232)
% 32.24/32.07 [1324]P1183(x13242,x13243)+~E(x13241,x13242)+~P1183(x13241,x13243)
% 32.24/32.07 [1325]P1183(x13253,x13252)+~E(x13251,x13252)+~P1183(x13253,x13251)
% 32.24/32.07 [1326]P2502(x13262,x13263)+~E(x13261,x13262)+~P2502(x13261,x13263)
% 32.24/32.07 [1327]P2502(x13273,x13272)+~E(x13271,x13272)+~P2502(x13273,x13271)
% 32.24/32.07 [1328]~P417(x13281)+P417(x13282)+~E(x13281,x13282)
% 32.24/32.07 [1329]~P222(x13291)+P222(x13292)+~E(x13291,x13292)
% 32.24/32.07 [1330]P2455(x13302,x13303)+~E(x13301,x13302)+~P2455(x13301,x13303)
% 32.24/32.07 [1331]P2455(x13313,x13312)+~E(x13311,x13312)+~P2455(x13313,x13311)
% 32.24/32.07 [1332]~P437(x13321)+P437(x13322)+~E(x13321,x13322)
% 32.24/32.07 [1333]~P1631(x13331)+P1631(x13332)+~E(x13331,x13332)
% 32.24/32.07 [1334]P1340(x13342,x13343)+~E(x13341,x13342)+~P1340(x13341,x13343)
% 32.24/32.07 [1335]P1340(x13353,x13352)+~E(x13351,x13352)+~P1340(x13353,x13351)
% 32.24/32.07 [1336]P1264(x13362,x13363)+~E(x13361,x13362)+~P1264(x13361,x13363)
% 32.24/32.07 [1337]P1264(x13373,x13372)+~E(x13371,x13372)+~P1264(x13373,x13371)
% 32.24/32.07 [1338]P1276(x13382,x13383)+~E(x13381,x13382)+~P1276(x13381,x13383)
% 32.24/32.07 [1339]P1276(x13393,x13392)+~E(x13391,x13392)+~P1276(x13393,x13391)
% 32.24/32.07 [1340]P1515(x13402,x13403)+~E(x13401,x13402)+~P1515(x13401,x13403)
% 32.24/32.07 [1341]P1515(x13413,x13412)+~E(x13411,x13412)+~P1515(x13413,x13411)
% 32.24/32.07 [1342]P916(x13422,x13423)+~E(x13421,x13422)+~P916(x13421,x13423)
% 32.24/32.07 [1343]P916(x13433,x13432)+~E(x13431,x13432)+~P916(x13433,x13431)
% 32.24/32.07 [1344]P860(x13442,x13443)+~E(x13441,x13442)+~P860(x13441,x13443)
% 32.24/32.07 [1345]P860(x13453,x13452)+~E(x13451,x13452)+~P860(x13453,x13451)
% 32.24/32.07 [1346]P1313(x13462,x13463)+~E(x13461,x13462)+~P1313(x13461,x13463)
% 32.24/32.07 [1347]P1313(x13473,x13472)+~E(x13471,x13472)+~P1313(x13473,x13471)
% 32.24/32.07 [1348]P264(x13482,x13483)+~E(x13481,x13482)+~P264(x13481,x13483)
% 32.24/32.07 [1349]P264(x13493,x13492)+~E(x13491,x13492)+~P264(x13493,x13491)
% 32.24/32.07 [1350]P1571(x13502,x13503)+~E(x13501,x13502)+~P1571(x13501,x13503)
% 32.24/32.07 [1351]P1571(x13513,x13512)+~E(x13511,x13512)+~P1571(x13513,x13511)
% 32.24/32.07 [1352]~P138(x13521)+P138(x13522)+~E(x13521,x13522)
% 32.24/32.07 [1353]~P516(x13531)+P516(x13532)+~E(x13531,x13532)
% 32.24/32.07 [1354]~P1533(x13541)+P1533(x13542)+~E(x13541,x13542)
% 32.24/32.07 [1355]~P1439(x13551)+P1439(x13552)+~E(x13551,x13552)
% 32.24/32.07 [1356]P1283(x13562,x13563)+~E(x13561,x13562)+~P1283(x13561,x13563)
% 32.24/32.07 [1357]P1283(x13573,x13572)+~E(x13571,x13572)+~P1283(x13573,x13571)
% 32.24/32.07 [1358]~P1028(x13581)+P1028(x13582)+~E(x13581,x13582)
% 32.24/32.07 [1359]~P731(x13591)+P731(x13592)+~E(x13591,x13592)
% 32.24/32.07 [1360]~P2369(x13601)+P2369(x13602)+~E(x13601,x13602)
% 32.24/32.07 [1361]~P2441(x13611)+P2441(x13612)+~E(x13611,x13612)
% 32.24/32.07 [1362]P2004(x13622,x13623)+~E(x13621,x13622)+~P2004(x13621,x13623)
% 32.24/32.07 [1363]P2004(x13633,x13632)+~E(x13631,x13632)+~P2004(x13633,x13631)
% 32.24/32.07 [1364]P419(x13642,x13643)+~E(x13641,x13642)+~P419(x13641,x13643)
% 32.24/32.07 [1365]P419(x13653,x13652)+~E(x13651,x13652)+~P419(x13653,x13651)
% 32.24/32.07 [1366]P1018(x13662,x13663)+~E(x13661,x13662)+~P1018(x13661,x13663)
% 32.24/32.07 [1367]P1018(x13673,x13672)+~E(x13671,x13672)+~P1018(x13673,x13671)
% 32.24/32.07 [1368]P2062(x13682,x13683)+~E(x13681,x13682)+~P2062(x13681,x13683)
% 32.24/32.07 [1369]P2062(x13693,x13692)+~E(x13691,x13692)+~P2062(x13693,x13691)
% 32.24/32.07 [1370]~P799(x13701)+P799(x13702)+~E(x13701,x13702)
% 32.24/32.07 [1371]~P159(x13711)+P159(x13712)+~E(x13711,x13712)
% 32.24/32.07 [1372]P2529(x13722,x13723)+~E(x13721,x13722)+~P2529(x13721,x13723)
% 32.24/32.07 [1373]P2529(x13733,x13732)+~E(x13731,x13732)+~P2529(x13733,x13731)
% 32.24/32.07 [1374]~P1883(x13741)+P1883(x13742)+~E(x13741,x13742)
% 32.24/32.07 [1375]P1106(x13752,x13753)+~E(x13751,x13752)+~P1106(x13751,x13753)
% 32.24/32.07 [1376]P1106(x13763,x13762)+~E(x13761,x13762)+~P1106(x13763,x13761)
% 32.24/32.07 [1377]~P109(x13771)+P109(x13772)+~E(x13771,x13772)
% 32.24/32.07 [1378]P1210(x13782,x13783)+~E(x13781,x13782)+~P1210(x13781,x13783)
% 32.24/32.07 [1379]P1210(x13793,x13792)+~E(x13791,x13792)+~P1210(x13793,x13791)
% 32.24/32.07 [1380]~P1890(x13801)+P1890(x13802)+~E(x13801,x13802)
% 32.24/32.07 [1381]P925(x13812,x13813)+~E(x13811,x13812)+~P925(x13811,x13813)
% 32.24/32.07 [1382]P925(x13823,x13822)+~E(x13821,x13822)+~P925(x13823,x13821)
% 32.24/32.07 [1383]~P2165(x13831)+P2165(x13832)+~E(x13831,x13832)
% 32.24/32.07 [1384]P1872(x13842,x13843)+~E(x13841,x13842)+~P1872(x13841,x13843)
% 32.24/32.07 [1385]P1872(x13853,x13852)+~E(x13851,x13852)+~P1872(x13853,x13851)
% 32.24/32.07 [1386]~P357(x13861)+P357(x13862)+~E(x13861,x13862)
% 32.24/32.07 [1387]~P1067(x13871)+P1067(x13872)+~E(x13871,x13872)
% 32.24/32.07 [1388]P2306(x13882,x13883)+~E(x13881,x13882)+~P2306(x13881,x13883)
% 32.24/32.07 [1389]P2306(x13893,x13892)+~E(x13891,x13892)+~P2306(x13893,x13891)
% 32.24/32.07 [1390]P1226(x13902,x13903)+~E(x13901,x13902)+~P1226(x13901,x13903)
% 32.24/32.07 [1391]P1226(x13913,x13912)+~E(x13911,x13912)+~P1226(x13913,x13911)
% 32.24/32.07 [1392]~P1954(x13921)+P1954(x13922)+~E(x13921,x13922)
% 32.24/32.07 [1393]~P1180(x13931)+P1180(x13932)+~E(x13931,x13932)
% 32.24/32.07 [1394]~P2052(x13941)+P2052(x13942)+~E(x13941,x13942)
% 32.24/32.07 [1395]P857(x13952,x13953)+~E(x13951,x13952)+~P857(x13951,x13953)
% 32.24/32.07 [1396]P857(x13963,x13962)+~E(x13961,x13962)+~P857(x13963,x13961)
% 32.24/32.07 [1397]~P2593(x13971)+P2593(x13972)+~E(x13971,x13972)
% 32.24/32.07 [1398]~P1401(x13981)+P1401(x13982)+~E(x13981,x13982)
% 32.24/32.07 [1399]~P391(x13991)+P391(x13992)+~E(x13991,x13992)
% 32.24/32.07 [1400]P858(x14002,x14003)+~E(x14001,x14002)+~P858(x14001,x14003)
% 32.24/32.07 [1401]P858(x14013,x14012)+~E(x14011,x14012)+~P858(x14013,x14011)
% 32.24/32.07 [1402]P1319(x14022,x14023)+~E(x14021,x14022)+~P1319(x14021,x14023)
% 32.24/32.07 [1403]P1319(x14033,x14032)+~E(x14031,x14032)+~P1319(x14033,x14031)
% 32.24/32.07 [1404]~P76(x14041)+P76(x14042)+~E(x14041,x14042)
% 32.24/32.07 [1405]~P2367(x14051)+P2367(x14052)+~E(x14051,x14052)
% 32.24/32.07 [1406]~P2092(x14061)+P2092(x14062)+~E(x14061,x14062)
% 32.24/32.07 [1407]~P1595(x14071)+P1595(x14072)+~E(x14071,x14072)
% 32.24/32.07 [1408]~P282(x14081)+P282(x14082)+~E(x14081,x14082)
% 32.24/32.07 [1409]P2548(x14092,x14093)+~E(x14091,x14092)+~P2548(x14091,x14093)
% 32.24/32.07 [1410]P2548(x14103,x14102)+~E(x14101,x14102)+~P2548(x14103,x14101)
% 32.24/32.07 [1411]~P288(x14111)+P288(x14112)+~E(x14111,x14112)
% 32.24/32.07 [1412]P292(x14122,x14123)+~E(x14121,x14122)+~P292(x14121,x14123)
% 32.24/32.07 [1413]P292(x14133,x14132)+~E(x14131,x14132)+~P292(x14133,x14131)
% 32.24/32.07 [1414]~P2499(x14141)+P2499(x14142)+~E(x14141,x14142)
% 32.24/32.07 [1415]~P2439(x14151)+P2439(x14152)+~E(x14151,x14152)
% 32.24/32.07 [1416]~P556(x14161)+P556(x14162)+~E(x14161,x14162)
% 32.24/32.07 [1417]~P101(x14171)+P101(x14172)+~E(x14171,x14172)
% 32.24/32.07 [1418]P1307(x14182,x14183)+~E(x14181,x14182)+~P1307(x14181,x14183)
% 32.24/32.07 [1419]P1307(x14193,x14192)+~E(x14191,x14192)+~P1307(x14193,x14191)
% 32.24/32.07 [1420]~P1492(x14201)+P1492(x14202)+~E(x14201,x14202)
% 32.24/32.07 [1421]~P2323(x14211)+P2323(x14212)+~E(x14211,x14212)
% 32.24/32.07 [1422]~P2139(x14221)+P2139(x14222)+~E(x14221,x14222)
% 32.24/32.07 [1423]~P1032(x14231)+P1032(x14232)+~E(x14231,x14232)
% 32.24/32.07 [1424]~P1947(x14241)+P1947(x14242)+~E(x14241,x14242)
% 32.24/32.07 [1425]P2578(x14252,x14253)+~E(x14251,x14252)+~P2578(x14251,x14253)
% 32.24/32.07 [1426]P2578(x14263,x14262)+~E(x14261,x14262)+~P2578(x14263,x14261)
% 32.24/32.07 [1427]~P565(x14271)+P565(x14272)+~E(x14271,x14272)
% 32.24/32.07 [1428]~P2273(x14281)+P2273(x14282)+~E(x14281,x14282)
% 32.24/32.07 [1429]P2558(x14292,x14293)+~E(x14291,x14292)+~P2558(x14291,x14293)
% 32.24/32.07 [1430]P2558(x14303,x14302)+~E(x14301,x14302)+~P2558(x14303,x14301)
% 32.24/32.07 [1431]~P315(x14311)+P315(x14312)+~E(x14311,x14312)
% 32.24/32.07 [1432]~P2053(x14321)+P2053(x14322)+~E(x14321,x14322)
% 32.24/32.07 [1433]P508(x14332,x14333)+~E(x14331,x14332)+~P508(x14331,x14333)
% 32.24/32.07 [1434]P508(x14343,x14342)+~E(x14341,x14342)+~P508(x14343,x14341)
% 32.24/32.07 [1435]~P2288(x14351)+P2288(x14352)+~E(x14351,x14352)
% 32.24/32.07 [1436]P569(x14362,x14363)+~E(x14361,x14362)+~P569(x14361,x14363)
% 32.24/32.07 [1437]P569(x14373,x14372)+~E(x14371,x14372)+~P569(x14373,x14371)
% 32.24/32.07 [1438]~P1726(x14381)+P1726(x14382)+~E(x14381,x14382)
% 32.24/32.07 [1439]P1107(x14392,x14393)+~E(x14391,x14392)+~P1107(x14391,x14393)
% 32.24/32.07 [1440]P1107(x14403,x14402)+~E(x14401,x14402)+~P1107(x14403,x14401)
% 32.24/32.07 [1441]~P672(x14411)+P672(x14412)+~E(x14411,x14412)
% 32.24/32.07 [1442]~P1938(x14421)+P1938(x14422)+~E(x14421,x14422)
% 32.24/32.07 [1443]~P2056(x14431)+P2056(x14432)+~E(x14431,x14432)
% 32.24/32.07 [1444]~P1586(x14441)+P1586(x14442)+~E(x14441,x14442)
% 32.24/32.07 [1445]P446(x14452,x14453)+~E(x14451,x14452)+~P446(x14451,x14453)
% 32.24/32.07 [1446]P446(x14463,x14462)+~E(x14461,x14462)+~P446(x14463,x14461)
% 32.24/32.07 [1447]~P1862(x14471)+P1862(x14472)+~E(x14471,x14472)
% 32.24/32.07 [1448]~P266(x14481)+P266(x14482)+~E(x14481,x14482)
% 32.24/32.07 [1449]P1203(x14492,x14493)+~E(x14491,x14492)+~P1203(x14491,x14493)
% 32.24/32.07 [1450]P1203(x14503,x14502)+~E(x14501,x14502)+~P1203(x14503,x14501)
% 32.24/32.07 [1451]~P1017(x14511)+P1017(x14512)+~E(x14511,x14512)
% 32.24/32.07 [1452]P1292(x14522,x14523)+~E(x14521,x14522)+~P1292(x14521,x14523)
% 32.24/32.07 [1453]P1292(x14533,x14532)+~E(x14531,x14532)+~P1292(x14533,x14531)
% 32.24/32.07 [1454]P1270(x14542,x14543)+~E(x14541,x14542)+~P1270(x14541,x14543)
% 32.24/32.07 [1455]P1270(x14553,x14552)+~E(x14551,x14552)+~P1270(x14553,x14551)
% 32.24/32.07 [1456]~P2311(x14561)+P2311(x14562)+~E(x14561,x14562)
% 32.24/32.07 [1457]~P1153(x14571)+P1153(x14572)+~E(x14571,x14572)
% 32.24/32.07 [1458]~P1523(x14581)+P1523(x14582)+~E(x14581,x14582)
% 32.24/32.07 [1459]P1345(x14592,x14593)+~E(x14591,x14592)+~P1345(x14591,x14593)
% 32.24/32.07 [1460]P1345(x14603,x14602)+~E(x14601,x14602)+~P1345(x14603,x14601)
% 32.24/32.07 [1461]~P2494(x14611)+P2494(x14612)+~E(x14611,x14612)
% 32.24/32.07 [1462]P2482(x14622,x14623)+~E(x14621,x14622)+~P2482(x14621,x14623)
% 32.24/32.07 [1463]P2482(x14633,x14632)+~E(x14631,x14632)+~P2482(x14633,x14631)
% 32.24/32.07 [1464]~P2487(x14641)+P2487(x14642)+~E(x14641,x14642)
% 32.24/32.07 [1465]~P548(x14651)+P548(x14652)+~E(x14651,x14652)
% 32.24/32.07 [1466]P1108(x14662,x14663)+~E(x14661,x14662)+~P1108(x14661,x14663)
% 32.24/32.07 [1467]P1108(x14673,x14672)+~E(x14671,x14672)+~P1108(x14673,x14671)
% 32.24/32.07 [1468]P1431(x14682,x14683)+~E(x14681,x14682)+~P1431(x14681,x14683)
% 32.24/32.07 [1469]P1431(x14693,x14692)+~E(x14691,x14692)+~P1431(x14693,x14691)
% 32.24/32.07 [1470]P2057(x14702,x14703)+~E(x14701,x14702)+~P2057(x14701,x14703)
% 32.24/32.07 [1471]P2057(x14713,x14712)+~E(x14711,x14712)+~P2057(x14713,x14711)
% 32.24/32.07 [1472]~P1428(x14721)+P1428(x14722)+~E(x14721,x14722)
% 32.24/32.07 [1473]P1178(x14732,x14733)+~E(x14731,x14732)+~P1178(x14731,x14733)
% 32.24/32.07 [1474]P1178(x14743,x14742)+~E(x14741,x14742)+~P1178(x14743,x14741)
% 32.24/32.07 [1475]~P226(x14751)+P226(x14752)+~E(x14751,x14752)
% 32.24/32.07 [1476]P1159(x14762,x14763)+~E(x14761,x14762)+~P1159(x14761,x14763)
% 32.24/32.07 [1477]P1159(x14773,x14772)+~E(x14771,x14772)+~P1159(x14773,x14771)
% 32.24/32.07 [1478]~P1739(x14781)+P1739(x14782)+~E(x14781,x14782)
% 32.24/32.07 [1479]P535(x14792,x14793)+~E(x14791,x14792)+~P535(x14791,x14793)
% 32.24/32.07 [1480]P535(x14803,x14802)+~E(x14801,x14802)+~P535(x14803,x14801)
% 32.24/32.07 [1481]P921(x14812,x14813)+~E(x14811,x14812)+~P921(x14811,x14813)
% 32.24/32.07 [1482]P921(x14823,x14822)+~E(x14821,x14822)+~P921(x14823,x14821)
% 32.24/32.07 [1483]P2377(x14832,x14833)+~E(x14831,x14832)+~P2377(x14831,x14833)
% 32.24/32.07 [1484]P2377(x14843,x14842)+~E(x14841,x14842)+~P2377(x14843,x14841)
% 32.24/32.07 [1485]~P474(x14851)+P474(x14852)+~E(x14851,x14852)
% 32.24/32.07 [1486]P1055(x14862,x14863)+~E(x14861,x14862)+~P1055(x14861,x14863)
% 32.24/32.07 [1487]P1055(x14873,x14872)+~E(x14871,x14872)+~P1055(x14873,x14871)
% 32.24/32.07 [1488]~P2474(x14881)+P2474(x14882)+~E(x14881,x14882)
% 32.24/32.07 [1489]~P2350(x14891)+P2350(x14892)+~E(x14891,x14892)
% 32.24/32.07 [1490]~P262(x14901)+P262(x14902)+~E(x14901,x14902)
% 32.24/32.07 [1491]P2408(x14912,x14913)+~E(x14911,x14912)+~P2408(x14911,x14913)
% 32.24/32.07 [1492]P2408(x14923,x14922)+~E(x14921,x14922)+~P2408(x14923,x14921)
% 32.24/32.07 [1493]P1151(x14932,x14933)+~E(x14931,x14932)+~P1151(x14931,x14933)
% 32.24/32.07 [1494]P1151(x14943,x14942)+~E(x14941,x14942)+~P1151(x14943,x14941)
% 32.24/32.07 [1495]P1267(x14952,x14953)+~E(x14951,x14952)+~P1267(x14951,x14953)
% 32.24/32.07 [1496]P1267(x14963,x14962)+~E(x14961,x14962)+~P1267(x14963,x14961)
% 32.24/32.07 [1497]P2070(x14972,x14973)+~E(x14971,x14972)+~P2070(x14971,x14973)
% 32.24/32.07 [1498]P2070(x14983,x14982)+~E(x14981,x14982)+~P2070(x14983,x14981)
% 32.24/32.07 [1499]~P456(x14991)+P456(x14992)+~E(x14991,x14992)
% 32.24/32.07 [1500]~P442(x15001)+P442(x15002)+~E(x15001,x15002)
% 32.24/32.07 [1501]~P2207(x15011)+P2207(x15012)+~E(x15011,x15012)
% 32.24/32.07 [1502]~P123(x15021)+P123(x15022)+~E(x15021,x15022)
% 32.24/32.07 [1503]P1277(x15032,x15033)+~E(x15031,x15032)+~P1277(x15031,x15033)
% 32.24/32.07 [1504]P1277(x15043,x15042)+~E(x15041,x15042)+~P1277(x15043,x15041)
% 32.24/32.07 [1505]P924(x15052,x15053)+~E(x15051,x15052)+~P924(x15051,x15053)
% 32.24/32.07 [1506]P924(x15063,x15062)+~E(x15061,x15062)+~P924(x15063,x15061)
% 32.24/32.07 [1507]P1898(x15072,x15073)+~E(x15071,x15072)+~P1898(x15071,x15073)
% 32.24/32.07 [1508]P1898(x15083,x15082)+~E(x15081,x15082)+~P1898(x15083,x15081)
% 32.24/32.07 [1509]~P2072(x15091)+P2072(x15092)+~E(x15091,x15092)
% 32.24/32.07 [1510]~P1936(x15101)+P1936(x15102)+~E(x15101,x15102)
% 32.24/32.07 [1511]~P145(x15111)+P145(x15112)+~E(x15111,x15112)
% 32.24/32.07 [1512]P1333(x15122,x15123)+~E(x15121,x15122)+~P1333(x15121,x15123)
% 32.24/32.07 [1513]P1333(x15133,x15132)+~E(x15131,x15132)+~P1333(x15133,x15131)
% 32.24/32.07 [1514]~P1664(x15141)+P1664(x15142)+~E(x15141,x15142)
% 32.24/32.07 [1515]P1288(x15152,x15153)+~E(x15151,x15152)+~P1288(x15151,x15153)
% 32.24/32.07 [1516]P1288(x15163,x15162)+~E(x15161,x15162)+~P1288(x15163,x15161)
% 32.24/32.07 [1517]~P102(x15171)+P102(x15172)+~E(x15171,x15172)
% 32.24/32.07 [1518]P1298(x15182,x15183)+~E(x15181,x15182)+~P1298(x15181,x15183)
% 32.24/32.07 [1519]P1298(x15193,x15192)+~E(x15191,x15192)+~P1298(x15193,x15191)
% 32.24/32.07 [1520]~P1014(x15201)+P1014(x15202)+~E(x15201,x15202)
% 32.24/32.07 [1521]P1299(x15212,x15213)+~E(x15211,x15212)+~P1299(x15211,x15213)
% 32.24/32.07 [1522]P1299(x15223,x15222)+~E(x15221,x15222)+~P1299(x15223,x15221)
% 32.24/32.07 [1523]~P930(x15231)+P930(x15232)+~E(x15231,x15232)
% 32.24/32.07 [1524]~P1127(x15241)+P1127(x15242)+~E(x15241,x15242)
% 32.24/32.07 [1525]P877(x15252,x15253)+~E(x15251,x15252)+~P877(x15251,x15253)
% 32.24/32.07 [1526]P877(x15263,x15262)+~E(x15261,x15262)+~P877(x15263,x15261)
% 32.24/32.07 [1527]~P2510(x15271)+P2510(x15272)+~E(x15271,x15272)
% 32.24/32.07 [1528]~P1818(x15281)+P1818(x15282)+~E(x15281,x15282)
% 32.24/32.07 [1529]P1263(x15292,x15293)+~E(x15291,x15292)+~P1263(x15291,x15293)
% 32.24/32.07 [1530]P1263(x15303,x15302)+~E(x15301,x15302)+~P1263(x15303,x15301)
% 32.24/32.07 [1531]~P2067(x15311)+P2067(x15312)+~E(x15311,x15312)
% 32.24/32.07 [1532]~P1420(x15321)+P1420(x15322)+~E(x15321,x15322)
% 32.24/32.07 [1533]~P1570(x15331)+P1570(x15332)+~E(x15331,x15332)
% 32.24/32.07 [1534]~P2486(x15341)+P2486(x15342)+~E(x15341,x15342)
% 32.24/32.07 [1535]P1711(x15352,x15353)+~E(x15351,x15352)+~P1711(x15351,x15353)
% 32.24/32.07 [1536]P1711(x15363,x15362)+~E(x15361,x15362)+~P1711(x15363,x15361)
% 32.24/32.07 [1537]~P781(x15371)+P781(x15372)+~E(x15371,x15372)
% 32.24/32.07 [1538]~P2437(x15381)+P2437(x15382)+~E(x15381,x15382)
% 32.24/32.07 [1539]~P1670(x15391)+P1670(x15392)+~E(x15391,x15392)
% 32.24/32.07 [1540]~P719(x15401)+P719(x15402)+~E(x15401,x15402)
% 32.24/32.07 [1541]P1326(x15412,x15413)+~E(x15411,x15412)+~P1326(x15411,x15413)
% 32.24/32.07 [1542]P1326(x15423,x15422)+~E(x15421,x15422)+~P1326(x15423,x15421)
% 32.24/32.07 [1543]~P228(x15431)+P228(x15432)+~E(x15431,x15432)
% 32.24/32.07 [1544]~P1946(x15441)+P1946(x15442)+~E(x15441,x15442)
% 32.24/32.07 [1545]~P1820(x15451)+P1820(x15452)+~E(x15451,x15452)
% 32.24/32.07 [1546]P1064(x15462,x15463)+~E(x15461,x15462)+~P1064(x15461,x15463)
% 32.24/32.07 [1547]P1064(x15473,x15472)+~E(x15471,x15472)+~P1064(x15473,x15471)
% 32.24/32.07 [1548]~P1269(x15481)+P1269(x15482)+~E(x15481,x15482)
% 32.24/32.07 [1549]~P2074(x15491)+P2074(x15492)+~E(x15491,x15492)
% 32.24/32.07 [1550]~P257(x15501)+P257(x15502)+~E(x15501,x15502)
% 32.24/32.07 [1551]P1339(x15512,x15513)+~E(x15511,x15512)+~P1339(x15511,x15513)
% 32.24/32.07 [1552]P1339(x15523,x15522)+~E(x15521,x15522)+~P1339(x15523,x15521)
% 32.24/32.07 [1553]~P1790(x15531)+P1790(x15532)+~E(x15531,x15532)
% 32.24/32.07 [1554]P505(x15542,x15543)+~E(x15541,x15542)+~P505(x15541,x15543)
% 32.24/32.07 [1555]P505(x15553,x15552)+~E(x15551,x15552)+~P505(x15553,x15551)
% 32.24/32.07 [1556]~P82(x15561)+P82(x15562)+~E(x15561,x15562)
% 32.24/32.07 [1557]P1348(x15572,x15573)+~E(x15571,x15572)+~P1348(x15571,x15573)
% 32.24/32.07 [1558]P1348(x15583,x15582)+~E(x15581,x15582)+~P1348(x15583,x15581)
% 32.24/32.07 [1559]~P2500(x15591)+P2500(x15592)+~E(x15591,x15592)
% 32.24/32.07 [1560]~P2134(x15601)+P2134(x15602)+~E(x15601,x15602)
% 32.24/32.07 [1561]~P97(x15611)+P97(x15612)+~E(x15611,x15612)
% 32.24/32.07 [1562]~P2485(x15621)+P2485(x15622)+~E(x15621,x15622)
% 32.24/32.07 [1563]~P1386(x15631)+P1386(x15632)+~E(x15631,x15632)
% 32.24/32.07 [1564]~P376(x15641)+P376(x15642)+~E(x15641,x15642)
% 32.24/32.07 [1565]P1181(x15652,x15653)+~E(x15651,x15652)+~P1181(x15651,x15653)
% 32.24/32.07 [1566]P1181(x15663,x15662)+~E(x15661,x15662)+~P1181(x15663,x15661)
% 32.24/32.07 [1567]~P549(x15671)+P549(x15672)+~E(x15671,x15672)
% 32.24/32.07 [1568]P926(x15682,x15683)+~E(x15681,x15682)+~P926(x15681,x15683)
% 32.24/32.07 [1569]P926(x15693,x15692)+~E(x15691,x15692)+~P926(x15693,x15691)
% 32.24/32.07 [1570]~P2322(x15701)+P2322(x15702)+~E(x15701,x15702)
% 32.24/32.07 [1571]~P962(x15711)+P962(x15712)+~E(x15711,x15712)
% 32.24/32.07 [1572]~P361(x15721)+P361(x15722)+~E(x15721,x15722)
% 32.24/32.07 [1573]~P2206(x15731)+P2206(x15732)+~E(x15731,x15732)
% 32.24/32.07 [1574]~P732(x15741)+P732(x15742)+~E(x15741,x15742)
% 32.24/32.07 [1575]P846(x15752,x15753)+~E(x15751,x15752)+~P846(x15751,x15753)
% 32.24/32.07 [1576]P846(x15763,x15762)+~E(x15761,x15762)+~P846(x15763,x15761)
% 32.24/32.07 [1577]P1238(x15772,x15773)+~E(x15771,x15772)+~P1238(x15771,x15773)
% 32.24/32.07 [1578]P1238(x15783,x15782)+~E(x15781,x15782)+~P1238(x15783,x15781)
% 32.24/32.07 [1579]~P237(x15791)+P237(x15792)+~E(x15791,x15792)
% 32.24/32.07 [1580]~P273(x15801)+P273(x15802)+~E(x15801,x15802)
% 32.24/32.07 [1581]P1652(x15812,x15813)+~E(x15811,x15812)+~P1652(x15811,x15813)
% 32.24/32.07 [1582]P1652(x15823,x15822)+~E(x15821,x15822)+~P1652(x15823,x15821)
% 32.24/32.07 [1583]~P103(x15831)+P103(x15832)+~E(x15831,x15832)
% 32.24/32.07 [1584]~P2432(x15841)+P2432(x15842)+~E(x15841,x15842)
% 32.24/32.07 [1585]~P2472(x15851)+P2472(x15852)+~E(x15851,x15852)
% 32.24/32.07 [1586]P1228(x15862,x15863)+~E(x15861,x15862)+~P1228(x15861,x15863)
% 32.24/32.07 [1587]P1228(x15873,x15872)+~E(x15871,x15872)+~P1228(x15873,x15871)
% 32.24/32.07 [1588]P1361(x15882,x15883)+~E(x15881,x15882)+~P1361(x15881,x15883)
% 32.24/32.07 [1589]P1361(x15893,x15892)+~E(x15891,x15892)+~P1361(x15893,x15891)
% 32.24/32.07 [1590]P450(x15902,x15903)+~E(x15901,x15902)+~P450(x15901,x15903)
% 32.24/32.07 [1591]P450(x15913,x15912)+~E(x15911,x15912)+~P450(x15913,x15911)
% 32.24/32.07 [1592]P1300(x15922,x15923)+~E(x15921,x15922)+~P1300(x15921,x15923)
% 32.24/32.07 [1593]P1300(x15933,x15932)+~E(x15931,x15932)+~P1300(x15933,x15931)
% 32.24/32.07 [1594]~P1939(x15941)+P1939(x15942)+~E(x15941,x15942)
% 32.24/32.07 [1595]~P818(x15951)+P818(x15952)+~E(x15951,x15952)
% 32.24/32.07 [1596]~P1590(x15961)+P1590(x15962)+~E(x15961,x15962)
% 32.24/32.07 [1597]~P1505(x15971)+P1505(x15972)+~E(x15971,x15972)
% 32.24/32.07 [1598]P1045(x15982,x15983)+~E(x15981,x15982)+~P1045(x15981,x15983)
% 32.24/32.07 [1599]P1045(x15993,x15992)+~E(x15991,x15992)+~P1045(x15993,x15991)
% 32.24/32.07 [1600]~P518(x16001)+P518(x16002)+~E(x16001,x16002)
% 32.24/32.07 [1601]P1152(x16012,x16013)+~E(x16011,x16012)+~P1152(x16011,x16013)
% 32.24/32.07 [1602]P1152(x16023,x16022)+~E(x16021,x16022)+~P1152(x16023,x16021)
% 32.24/32.07 [1603]~P452(x16031)+P452(x16032)+~E(x16031,x16032)
% 32.24/32.07 [1604]~P1916(x16041)+P1916(x16042)+~E(x16041,x16042)
% 32.24/32.07 [1605]~P2399(x16051)+P2399(x16052)+~E(x16051,x16052)
% 32.24/32.07 [1606]P1961(x16062,x16063)+~E(x16061,x16062)+~P1961(x16061,x16063)
% 32.24/32.07 [1607]P1961(x16073,x16072)+~E(x16071,x16072)+~P1961(x16073,x16071)
% 32.24/32.07 [1608]~P78(x16081)+P78(x16082)+~E(x16081,x16082)
% 32.24/32.07 [1609]P1430(x16092,x16093)+~E(x16091,x16092)+~P1430(x16091,x16093)
% 32.24/32.07 [1610]P1430(x16103,x16102)+~E(x16101,x16102)+~P1430(x16103,x16101)
% 32.24/32.07 [1611]P2064(x16112,x16113)+~E(x16111,x16112)+~P2064(x16111,x16113)
% 32.24/32.07 [1612]P2064(x16123,x16122)+~E(x16121,x16122)+~P2064(x16123,x16121)
% 32.24/32.07 [1613]~P1421(x16131)+P1421(x16132)+~E(x16131,x16132)
% 32.24/32.07 [1614]P1318(x16142,x16143)+~E(x16141,x16142)+~P1318(x16141,x16143)
% 32.24/32.07 [1615]P1318(x16153,x16152)+~E(x16151,x16152)+~P1318(x16153,x16151)
% 32.24/32.07 [1616]~P1800(x16161)+P1800(x16162)+~E(x16161,x16162)
% 32.24/32.07 [1617]~P75(x16171)+P75(x16172)+~E(x16171,x16172)
% 32.24/32.07 [1618]~P793(x16181)+P793(x16182)+~E(x16181,x16182)
% 32.24/32.07 [1619]~P1429(x16191)+P1429(x16192)+~E(x16191,x16192)
% 32.24/32.07 [1620]P1471(x16202,x16203)+~E(x16201,x16202)+~P1471(x16201,x16203)
% 32.24/32.07 [1621]P1471(x16213,x16212)+~E(x16211,x16212)+~P1471(x16213,x16211)
% 32.24/32.07 [1622]~P1906(x16221)+P1906(x16222)+~E(x16221,x16222)
% 32.24/32.07 [1623]~P140(x16231)+P140(x16232)+~E(x16231,x16232)
% 32.24/32.07 [1624]P1161(x16242,x16243)+~E(x16241,x16242)+~P1161(x16241,x16243)
% 32.24/32.07 [1625]P1161(x16253,x16252)+~E(x16251,x16252)+~P1161(x16253,x16251)
% 32.24/32.07 [1626]~P1950(x16261)+P1950(x16262)+~E(x16261,x16262)
% 32.24/32.07 [1627]~P72(x16271)+P72(x16272)+~E(x16271,x16272)
% 32.24/32.07 [1628]~P2435(x16281)+P2435(x16282)+~E(x16281,x16282)
% 32.24/32.07 [1629]~P875(x16291)+P875(x16292)+~E(x16291,x16292)
% 32.24/32.07 [1630]~P1031(x16301)+P1031(x16302)+~E(x16301,x16302)
% 32.24/32.07 [1631]P1330(x16312,x16313)+~E(x16311,x16312)+~P1330(x16311,x16313)
% 32.24/32.07 [1632]P1330(x16323,x16322)+~E(x16321,x16322)+~P1330(x16323,x16321)
% 32.24/32.07 [1633]~P390(x16331)+P390(x16332)+~E(x16331,x16332)
% 32.24/32.07 [1634]~P104(x16341)+P104(x16342)+~E(x16341,x16342)
% 32.24/32.07 [1635]~P98(x16351)+P98(x16352)+~E(x16351,x16352)
% 32.24/32.07 [1636]P2388(x16362,x16363)+~E(x16361,x16362)+~P2388(x16361,x16363)
% 32.24/32.07 [1637]P2388(x16373,x16372)+~E(x16371,x16372)+~P2388(x16373,x16371)
% 32.24/32.07 [1638]~P542(x16381)+P542(x16382)+~E(x16381,x16382)
% 32.24/32.07 [1639]~P867(x16391)+P867(x16392)+~E(x16391,x16392)
% 32.24/32.07 [1640]~P2301(x16401)+P2301(x16402)+~E(x16401,x16402)
% 32.24/32.07 [1641]~P1482(x16411)+P1482(x16412)+~E(x16411,x16412)
% 32.24/32.07 [1642]~P1519(x16421)+P1519(x16422)+~E(x16421,x16422)
% 32.24/32.07 [1643]~P2198(x16431)+P2198(x16432)+~E(x16431,x16432)
% 32.24/32.07 [1644]P2357(x16442,x16443)+~E(x16441,x16442)+~P2357(x16441,x16443)
% 32.24/32.07 [1645]P2357(x16453,x16452)+~E(x16451,x16452)+~P2357(x16453,x16451)
% 32.24/32.07 [1646]~P169(x16461)+P169(x16462)+~E(x16461,x16462)
% 32.24/32.07 [1647]~P1094(x16471)+P1094(x16472)+~E(x16471,x16472)
% 32.24/32.07 [1648]P2463(x16482,x16483)+~E(x16481,x16482)+~P2463(x16481,x16483)
% 32.24/32.07 [1649]P2463(x16493,x16492)+~E(x16491,x16492)+~P2463(x16493,x16491)
% 32.24/32.07 [1650]~P2225(x16501)+P2225(x16502)+~E(x16501,x16502)
% 32.24/32.07 [1651]~P2302(x16511)+P2302(x16512)+~E(x16511,x16512)
% 32.24/32.07 [1652]~P462(x16521)+P462(x16522)+~E(x16521,x16522)
% 32.24/32.07 [1653]~P2236(x16531)+P2236(x16532)+~E(x16531,x16532)
% 32.24/32.07 [1654]~P1496(x16541)+P1496(x16542)+~E(x16541,x16542)
% 32.24/32.07 [1655]~P1615(x16551)+P1615(x16552)+~E(x16551,x16552)
% 32.24/32.07 [1656]~P1952(x16561)+P1952(x16562)+~E(x16561,x16562)
% 32.24/32.07 [1657]~P2417(x16571)+P2417(x16572)+~E(x16571,x16572)
% 32.24/32.07 [1658]~P233(x16581)+P233(x16582)+~E(x16581,x16582)
% 32.24/32.07 [1659]~P663(x16591)+P663(x16592)+~E(x16591,x16592)
% 32.24/32.07 [1660]P1732(x16602,x16603)+~E(x16601,x16602)+~P1732(x16601,x16603)
% 32.24/32.07 [1661]P1732(x16613,x16612)+~E(x16611,x16612)+~P1732(x16613,x16611)
% 32.24/32.07 [1662]P1550(x16622,x16623)+~E(x16621,x16622)+~P1550(x16621,x16623)
% 32.24/32.07 [1663]P1550(x16633,x16632)+~E(x16631,x16632)+~P1550(x16633,x16631)
% 32.24/32.07 [1664]~P136(x16641)+P136(x16642)+~E(x16641,x16642)
% 32.24/32.07 [1665]P509(x16652,x16653)+~E(x16651,x16652)+~P509(x16651,x16653)
% 32.24/32.07 [1666]P509(x16663,x16662)+~E(x16661,x16662)+~P509(x16663,x16661)
% 32.24/32.07 [1667]~P2528(x16671)+P2528(x16672)+~E(x16671,x16672)
% 32.24/32.07 [1668]~P2509(x16681)+P2509(x16682)+~E(x16681,x16682)
% 32.24/32.07 [1669]~P551(x16691)+P551(x16692)+~E(x16691,x16692)
% 32.24/32.07 [1670]P2044(x16702,x16703)+~E(x16701,x16702)+~P2044(x16701,x16703)
% 32.24/32.07 [1671]P2044(x16713,x16712)+~E(x16711,x16712)+~P2044(x16713,x16711)
% 32.24/32.07 [1672]P1422(x16722,x16723)+~E(x16721,x16722)+~P1422(x16721,x16723)
% 32.24/32.07 [1673]P1422(x16733,x16732)+~E(x16731,x16732)+~P1422(x16733,x16731)
% 32.24/32.07 [1674]~P1714(x16741)+P1714(x16742)+~E(x16741,x16742)
% 32.24/32.07 [1675]~P221(x16751)+P221(x16752)+~E(x16751,x16752)
% 32.24/32.07 [1676]P241(x16762,x16763)+~E(x16761,x16762)+~P241(x16761,x16763)
% 32.24/32.07 [1677]P241(x16773,x16772)+~E(x16771,x16772)+~P241(x16773,x16771)
% 32.24/32.07 [1678]~P2385(x16781)+P2385(x16782)+~E(x16781,x16782)
% 32.24/32.07 [1679]~P651(x16791)+P651(x16792)+~E(x16791,x16792)
% 32.24/32.07 [1680]~P2261(x16801)+P2261(x16802)+~E(x16801,x16802)
% 32.24/32.07 [1681]P922(x16812,x16813)+~E(x16811,x16812)+~P922(x16811,x16813)
% 32.24/32.07 [1682]P922(x16823,x16822)+~E(x16821,x16822)+~P922(x16823,x16821)
% 32.24/32.07 [1683]P1660(x16832,x16833)+~E(x16831,x16832)+~P1660(x16831,x16833)
% 32.24/32.07 [1684]P1660(x16843,x16842)+~E(x16841,x16842)+~P1660(x16843,x16841)
% 32.24/32.07 [1685]~P1616(x16851)+P1616(x16852)+~E(x16851,x16852)
% 32.24/32.07 [1686]~P1722(x16861)+P1722(x16862)+~E(x16861,x16862)
% 32.24/32.07 [1687]~P1589(x16871)+P1589(x16872)+~E(x16871,x16872)
% 32.24/32.07 [1688]P1713(x16882,x16883)+~E(x16881,x16882)+~P1713(x16881,x16883)
% 32.24/32.07 [1689]P1713(x16893,x16892)+~E(x16891,x16892)+~P1713(x16893,x16891)
% 32.24/32.07 [1690]~P898(x16901)+P898(x16902)+~E(x16901,x16902)
% 32.24/32.07 [1691]~P1940(x16911)+P1940(x16912)+~E(x16911,x16912)
% 32.24/32.07 [1692]~P758(x16921)+P758(x16922)+~E(x16921,x16922)
% 32.24/32.07 [1693]~P343(x16931)+P343(x16932)+~E(x16931,x16932)
% 32.24/32.07 [1694]P1324(x16942,x16943)+~E(x16941,x16942)+~P1324(x16941,x16943)
% 32.24/32.07 [1695]P1324(x16953,x16952)+~E(x16951,x16952)+~P1324(x16953,x16951)
% 32.24/32.07 [1696]P2598(x16962,x16963)+~E(x16961,x16962)+~P2598(x16961,x16963)
% 32.24/32.07 [1697]P2598(x16973,x16972)+~E(x16971,x16972)+~P2598(x16973,x16971)
% 32.24/32.07 [1698]P2066(x16982,x16983)+~E(x16981,x16982)+~P2066(x16981,x16983)
% 32.24/32.07 [1699]P2066(x16993,x16992)+~E(x16991,x16992)+~P2066(x16993,x16991)
% 32.24/32.07 [1700]~P1996(x17001)+P1996(x17002)+~E(x17001,x17002)
% 32.24/32.07 [1701]~P1678(x17011)+P1678(x17012)+~E(x17011,x17012)
% 32.24/32.07 [1702]~P1949(x17021)+P1949(x17022)+~E(x17021,x17022)
% 32.24/32.07 [1703]P283(x17032,x17033)+~E(x17031,x17032)+~P283(x17031,x17033)
% 32.24/32.07 [1704]P283(x17043,x17042)+~E(x17041,x17042)+~P283(x17043,x17041)
% 32.24/32.07 [1705]~P1119(x17051)+P1119(x17052)+~E(x17051,x17052)
% 32.24/32.07 [1706]P507(x17062,x17063)+~E(x17061,x17062)+~P507(x17061,x17063)
% 32.24/32.07 [1707]P507(x17073,x17072)+~E(x17071,x17072)+~P507(x17073,x17071)
% 32.24/32.07 [1708]~P1123(x17081)+P1123(x17082)+~E(x17081,x17082)
% 32.24/32.07 [1709]~P186(x17091)+P186(x17092)+~E(x17091,x17092)
% 32.24/32.07 [1710]P1341(x17102,x17103)+~E(x17101,x17102)+~P1341(x17101,x17103)
% 32.24/32.07 [1711]P1341(x17113,x17112)+~E(x17111,x17112)+~P1341(x17113,x17111)
% 32.24/32.07 [1712]~P2543(x17121)+P2543(x17122)+~E(x17121,x17122)
% 32.24/32.07 [1713]P2557(x17132,x17133)+~E(x17131,x17132)+~P2557(x17131,x17133)
% 32.24/32.07 [1714]P2557(x17143,x17142)+~E(x17141,x17142)+~P2557(x17143,x17141)
% 32.24/32.07 [1715]~P1724(x17151)+P1724(x17152)+~E(x17151,x17152)
% 32.24/32.07 [1716]~P2333(x17161)+P2333(x17162)+~E(x17161,x17162)
% 32.24/32.07 [1717]P914(x17172,x17173)+~E(x17171,x17172)+~P914(x17171,x17173)
% 32.24/32.07 [1718]P914(x17183,x17182)+~E(x17181,x17182)+~P914(x17183,x17181)
% 32.24/32.07 [1719]~P131(x17191)+P131(x17192)+~E(x17191,x17192)
% 32.24/32.07 [1720]~P1470(x17201)+P1470(x17202)+~E(x17201,x17202)
% 32.24/32.07 [1721]~P134(x17211)+P134(x17212)+~E(x17211,x17212)
% 32.24/32.07 [1722]~P1091(x17221)+P1091(x17222)+~E(x17221,x17222)
% 32.24/32.07 [1723]~P1367(x17231)+P1367(x17232)+~E(x17231,x17232)
% 32.24/32.07 [1724]~P77(x17241)+P77(x17242)+~E(x17241,x17242)
% 32.24/32.07 [1725]~P2398(x17251)+P2398(x17252)+~E(x17251,x17252)
% 32.24/32.07 [1726]~P458(x17261)+P458(x17262)+~E(x17261,x17262)
% 32.24/32.07 [1727]~P769(x17271)+P769(x17272)+~E(x17271,x17272)
% 32.24/32.07 [1728]~P276(x17281)+P276(x17282)+~E(x17281,x17282)
% 32.24/32.07 [1729]~P639(x17291)+P639(x17292)+~E(x17291,x17292)
% 32.24/32.07 [1730]~P683(x17301)+P683(x17302)+~E(x17301,x17302)
% 32.24/32.07 [1731]~P1100(x17311)+P1100(x17312)+~E(x17311,x17312)
% 32.24/32.07 [1732]~P1585(x17321)+P1585(x17322)+~E(x17321,x17322)
% 32.24/32.07 [1733]~P2214(x17331)+P2214(x17332)+~E(x17331,x17332)
% 32.24/32.07 [1734]~P1095(x17341)+P1095(x17342)+~E(x17341,x17342)
% 32.24/32.07 [1735]P845(x17352,x17353)+~E(x17351,x17352)+~P845(x17351,x17353)
% 32.24/32.07 [1736]P845(x17363,x17362)+~E(x17361,x17362)+~P845(x17363,x17361)
% 32.24/32.07 [1737]~P477(x17371)+P477(x17372)+~E(x17371,x17372)
% 32.24/32.07 [1738]~P494(x17381)+P494(x17382)+~E(x17381,x17382)
% 32.24/32.07 [1739]~P2211(x17391)+P2211(x17392)+~E(x17391,x17392)
% 32.24/32.07 [1740]P1621(x17402,x17403)+~E(x17401,x17402)+~P1621(x17401,x17403)
% 32.24/32.07 [1741]P1621(x17413,x17412)+~E(x17411,x17412)+~P1621(x17413,x17411)
% 32.24/32.07 [1742]~P254(x17421)+P254(x17422)+~E(x17421,x17422)
% 32.24/32.07 [1743]P1150(x17432,x17433)+~E(x17431,x17432)+~P1150(x17431,x17433)
% 32.24/32.07 [1744]P1150(x17443,x17442)+~E(x17441,x17442)+~P1150(x17443,x17441)
% 32.24/32.07 [1745]~P2535(x17451)+P2535(x17452)+~E(x17451,x17452)
% 32.24/32.07 [1746]P766(x17462,x17463)+~E(x17461,x17462)+~P766(x17461,x17463)
% 32.24/32.07 [1747]P766(x17473,x17472)+~E(x17471,x17472)+~P766(x17473,x17471)
% 32.24/32.07 [1748]~P792(x17481)+P792(x17482)+~E(x17481,x17482)
% 32.24/32.07 [1749]~P160(x17491)+P160(x17492)+~E(x17491,x17492)
% 32.24/32.07 [1750]~P220(x17501)+P220(x17502)+~E(x17501,x17502)
% 32.24/32.07 [1751]P1648(x17512,x17513)+~E(x17511,x17512)+~P1648(x17511,x17513)
% 32.24/32.07 [1752]P1648(x17523,x17522)+~E(x17521,x17522)+~P1648(x17523,x17521)
% 32.24/32.07 [1753]~P1462(x17531)+P1462(x17532)+~E(x17531,x17532)
% 32.24/32.07 [1754]~P1785(x17541)+P1785(x17542)+~E(x17541,x17542)
% 32.24/32.07 [1755]~P2378(x17551)+P2378(x17552)+~E(x17551,x17552)
% 32.24/32.07 [1756]~P1690(x17561)+P1690(x17562)+~E(x17561,x17562)
% 32.24/32.07 [1757]~P1802(x17571)+P1802(x17572)+~E(x17571,x17572)
% 32.24/32.07 [1758]~P2220(x17581)+P2220(x17582)+~E(x17581,x17582)
% 32.24/32.07 [1759]~P2217(x17591)+P2217(x17592)+~E(x17591,x17592)
% 32.24/32.07 [1760]~P1546(x17601)+P1546(x17602)+~E(x17601,x17602)
% 32.24/32.07 [1761]P1731(x17612,x17613)+~E(x17611,x17612)+~P1731(x17611,x17613)
% 32.24/32.07 [1762]P1731(x17623,x17622)+~E(x17621,x17622)+~P1731(x17623,x17621)
% 32.24/32.07 [1763]~P470(x17631)+P470(x17632)+~E(x17631,x17632)
% 32.24/32.07 [1764]~P733(x17641)+P733(x17642)+~E(x17641,x17642)
% 32.24/32.07 [1765]~P1145(x17651)+P1145(x17652)+~E(x17651,x17652)
% 32.24/32.07 [1766]~P968(x17661)+P968(x17662)+~E(x17661,x17662)
% 32.24/32.07 [1767]~P164(x17671)+P164(x17672)+~E(x17671,x17672)
% 32.24/32.07 [1768]P1010(x17682,x17683)+~E(x17681,x17682)+~P1010(x17681,x17683)
% 32.24/32.07 [1769]P1010(x17693,x17692)+~E(x17691,x17692)+~P1010(x17693,x17691)
% 32.24/32.07 [1770]P1623(x17702,x17703)+~E(x17701,x17702)+~P1623(x17701,x17703)
% 32.24/32.07 [1771]P1623(x17713,x17712)+~E(x17711,x17712)+~P1623(x17713,x17711)
% 32.24/32.07 [1772]P2071(x17722,x17723)+~E(x17721,x17722)+~P2071(x17721,x17723)
% 32.24/32.07 [1773]P2071(x17733,x17732)+~E(x17731,x17732)+~P2071(x17733,x17731)
% 32.24/32.07 [1774]~P497(x17741)+P497(x17742)+~E(x17741,x17742)
% 32.24/32.07 [1775]P1368(x17752,x17753)+~E(x17751,x17752)+~P1368(x17751,x17753)
% 32.24/32.07 [1776]P1368(x17763,x17762)+~E(x17761,x17762)+~P1368(x17763,x17761)
% 32.24/32.07 [1777]P2466(x17772,x17773)+~E(x17771,x17772)+~P2466(x17771,x17773)
% 32.24/32.07 [1778]P2466(x17783,x17782)+~E(x17781,x17782)+~P2466(x17783,x17781)
% 32.24/32.07 [1779]~P2587(x17791)+P2587(x17792)+~E(x17791,x17792)
% 32.24/32.07 [1780]P1547(x17802,x17803)+~E(x17801,x17802)+~P1547(x17801,x17803)
% 32.24/32.07 [1781]P1547(x17813,x17812)+~E(x17811,x17812)+~P1547(x17813,x17811)
% 32.24/32.07 [1782]~P2442(x17821)+P2442(x17822)+~E(x17821,x17822)
% 32.24/32.07 [1783]~P286(x17831)+P286(x17832)+~E(x17831,x17832)
% 32.24/32.07 [1784]~P259(x17841)+P259(x17842)+~E(x17841,x17842)
% 32.24/32.07 [1785]P1189(x17852,x17853)+~E(x17851,x17852)+~P1189(x17851,x17853)
% 32.24/32.07 [1786]P1189(x17863,x17862)+~E(x17861,x17862)+~P1189(x17863,x17861)
% 32.24/32.07 [1787]~P1587(x17871)+P1587(x17872)+~E(x17871,x17872)
% 32.24/32.07 [1788]~P2186(x17881)+P2186(x17882)+~E(x17881,x17882)
% 32.24/32.07 [1789]~P2569(x17891)+P2569(x17892)+~E(x17891,x17892)
% 32.24/32.07 [1790]~P1693(x17901)+P1693(x17902)+~E(x17901,x17902)
% 32.24/32.07 [1791]~P2096(x17911)+P2096(x17912)+~E(x17911,x17912)
% 32.24/32.07 [1792]~P440(x17921)+P440(x17922)+~E(x17921,x17922)
% 32.24/32.07 [1793]~P563(x17931)+P563(x17932)+~E(x17931,x17932)
% 32.24/32.07 [1794]~P504(x17941)+P504(x17942)+~E(x17941,x17942)
% 32.24/32.07 [1795]~P2293(x17951)+P2293(x17952)+~E(x17951,x17952)
% 32.24/32.07 [1796]~P265(x17961)+P265(x17962)+~E(x17961,x17962)
% 32.24/32.07 [1797]P245(x17972,x17973)+~E(x17971,x17972)+~P245(x17971,x17973)
% 32.24/32.07 [1798]P245(x17983,x17982)+~E(x17981,x17982)+~P245(x17983,x17981)
% 32.24/32.07 [1799]~P1581(x17991)+P1581(x17992)+~E(x17991,x17992)
% 32.24/32.07 [1800]~P697(x18001)+P697(x18002)+~E(x18001,x18002)
% 32.24/32.07 [1801]~P434(x18011)+P434(x18012)+~E(x18011,x18012)
% 32.24/32.07 [1802]~P327(x18021)+P327(x18022)+~E(x18021,x18022)
% 32.24/32.07 [1803]~P686(x18031)+P686(x18032)+~E(x18031,x18032)
% 32.24/32.07 [1804]P822(x18042,x18043)+~E(x18041,x18042)+~P822(x18041,x18043)
% 32.24/32.07 [1805]P822(x18053,x18052)+~E(x18051,x18052)+~P822(x18053,x18051)
% 32.24/32.07 [1806]~P1502(x18061)+P1502(x18062)+~E(x18061,x18062)
% 32.24/32.07 [1807]~P1836(x18071)+P1836(x18072)+~E(x18071,x18072)
% 32.24/32.07 [1808]~P1925(x18081)+P1925(x18082)+~E(x18081,x18082)
% 32.24/32.07 [1809]~P468(x18091)+P468(x18092)+~E(x18091,x18092)
% 32.24/32.07 [1810]~P871(x18101)+P871(x18102)+~E(x18101,x18102)
% 32.24/32.07 [1811]~P753(x18111)+P753(x18112)+~E(x18111,x18112)
% 32.24/32.07 [1812]~P2338(x18121)+P2338(x18122)+~E(x18121,x18122)
% 32.24/32.07 [1813]~P467(x18131)+P467(x18132)+~E(x18131,x18132)
% 32.24/32.07 [1814]P1522(x18142,x18143)+~E(x18141,x18142)+~P1522(x18141,x18143)
% 32.24/32.07 [1815]P1522(x18153,x18152)+~E(x18151,x18152)+~P1522(x18153,x18151)
% 32.24/32.07 [1816]~P2291(x18161)+P2291(x18162)+~E(x18161,x18162)
% 32.24/32.07 [1817]~P80(x18171)+P80(x18172)+~E(x18171,x18172)
% 32.24/32.07 [1818]~P1737(x18181)+P1737(x18182)+~E(x18181,x18182)
% 32.24/32.07 [1819]~P631(x18191)+P631(x18192)+~E(x18191,x18192)
% 32.24/32.07 [1820]~P2555(x18201)+P2555(x18202)+~E(x18201,x18202)
% 32.24/32.07 [1821]~P633(x18211)+P633(x18212)+~E(x18211,x18212)
% 32.24/32.07 [1822]~P587(x18221)+P587(x18222)+~E(x18221,x18222)
% 32.24/32.07 [1823]~P1885(x18231)+P1885(x18232)+~E(x18231,x18232)
% 32.24/32.07 [1824]~P291(x18241)+P291(x18242)+~E(x18241,x18242)
% 32.24/32.07 [1825]~P2342(x18251)+P2342(x18252)+~E(x18251,x18252)
% 32.24/32.07 [1826]~P725(x18261)+P725(x18262)+~E(x18261,x18262)
% 32.24/32.07 [1827]~P2286(x18271)+P2286(x18272)+~E(x18271,x18272)
% 32.24/32.07 [1828]~P253(x18281)+P253(x18282)+~E(x18281,x18282)
% 32.24/32.07 [1829]~P2163(x18291)+P2163(x18292)+~E(x18291,x18292)
% 32.24/32.07 [1830]P1234(x18302,x18303)+~E(x18301,x18302)+~P1234(x18301,x18303)
% 32.24/32.07 [1831]P1234(x18313,x18312)+~E(x18311,x18312)+~P1234(x18313,x18311)
% 32.24/32.07 [1832]~P1118(x18321)+P1118(x18322)+~E(x18321,x18322)
% 32.24/32.07 [1833]~P2155(x18331)+P2155(x18332)+~E(x18331,x18332)
% 32.24/32.07 [1834]~P112(x18341)+P112(x18342)+~E(x18341,x18342)
% 32.24/32.07 [1835]~P407(x18351)+P407(x18352)+~E(x18351,x18352)
% 32.24/32.07 [1836]~P326(x18361)+P326(x18362)+~E(x18361,x18362)
% 32.24/32.07 [1837]~P1044(x18371)+P1044(x18372)+~E(x18371,x18372)
% 32.24/32.07 [1838]~P405(x18381)+P405(x18382)+~E(x18381,x18382)
% 32.24/32.07 [1839]~P755(x18391)+P755(x18392)+~E(x18391,x18392)
% 32.24/32.07 [1840]~P1538(x18401)+P1538(x18402)+~E(x18401,x18402)
% 32.24/32.07 [1841]P506(x18412,x18413)+~E(x18411,x18412)+~P506(x18411,x18413)
% 32.24/32.07 [1842]P506(x18423,x18422)+~E(x18421,x18422)+~P506(x18423,x18421)
% 32.24/32.07 [1843]P2447(x18432,x18433)+~E(x18431,x18432)+~P2447(x18431,x18433)
% 32.24/32.07 [1844]P2447(x18443,x18442)+~E(x18441,x18442)+~P2447(x18443,x18441)
% 32.24/32.07 [1845]~P2414(x18451)+P2414(x18452)+~E(x18451,x18452)
% 32.24/32.07 [1846]~P2232(x18461)+P2232(x18462)+~E(x18461,x18462)
% 32.24/32.07 [1847]~P351(x18471)+P351(x18472)+~E(x18471,x18472)
% 32.24/32.07 [1848]P510(x18482,x18483)+~E(x18481,x18482)+~P510(x18481,x18483)
% 32.24/32.07 [1849]P510(x18493,x18492)+~E(x18491,x18492)+~P510(x18493,x18491)
% 32.24/32.07 [1850]~P2366(x18501)+P2366(x18502)+~E(x18501,x18502)
% 32.24/32.07 [1851]~P1794(x18511)+P1794(x18512)+~E(x18511,x18512)
% 32.24/32.07 [1852]~P368(x18521)+P368(x18522)+~E(x18521,x18522)
% 32.24/32.07 [1853]~P2332(x18531)+P2332(x18532)+~E(x18531,x18532)
% 32.24/32.07 [1854]~P1577(x18541)+P1577(x18542)+~E(x18541,x18542)
% 32.24/32.07 [1855]~P2257(x18551)+P2257(x18552)+~E(x18551,x18552)
% 32.24/32.07 [1856]~P2574(x18561)+P2574(x18562)+~E(x18561,x18562)
% 32.24/32.07 [1857]P521(x18572,x18573)+~E(x18571,x18572)+~P521(x18571,x18573)
% 32.24/32.07 [1858]P521(x18583,x18582)+~E(x18581,x18582)+~P521(x18583,x18581)
% 32.24/32.07 [1859]~P1562(x18591)+P1562(x18592)+~E(x18591,x18592)
% 32.24/32.07 [1860]P2046(x18602,x18603)+~E(x18601,x18602)+~P2046(x18601,x18603)
% 32.24/32.07 [1861]P2046(x18613,x18612)+~E(x18611,x18612)+~P2046(x18613,x18611)
% 32.24/32.07 [1862]~P408(x18621)+P408(x18622)+~E(x18621,x18622)
% 32.24/32.07 [1863]~P480(x18631)+P480(x18632)+~E(x18631,x18632)
% 32.24/32.07 [1864]~P2589(x18641)+P2589(x18642)+~E(x18641,x18642)
% 32.24/32.07 [1865]P823(x18652,x18653)+~E(x18651,x18652)+~P823(x18651,x18653)
% 32.24/32.07 [1866]P823(x18663,x18662)+~E(x18661,x18662)+~P823(x18663,x18661)
% 32.24/32.07 [1867]~P2251(x18671)+P2251(x18672)+~E(x18671,x18672)
% 32.24/32.07 [1868]~P374(x18681)+P374(x18682)+~E(x18681,x18682)
% 32.24/32.07 [1869]~P1855(x18691)+P1855(x18692)+~E(x18691,x18692)
% 32.24/32.07 [1870]~P1137(x18701)+P1137(x18702)+~E(x18701,x18702)
% 32.24/32.07 [1871]~P1449(x18711)+P1449(x18712)+~E(x18711,x18712)
% 32.24/32.07 [1872]~P1395(x18721)+P1395(x18722)+~E(x18721,x18722)
% 32.24/32.07 [1873]~P1042(x18731)+P1042(x18732)+~E(x18731,x18732)
% 32.24/32.07 [1874]~P370(x18741)+P370(x18742)+~E(x18741,x18742)
% 32.24/32.07 [1875]~P1854(x18751)+P1854(x18752)+~E(x18751,x18752)
% 32.24/32.07 [1876]~P2473(x18761)+P2473(x18762)+~E(x18761,x18762)
% 32.24/32.07 [1877]~P1617(x18771)+P1617(x18772)+~E(x18771,x18772)
% 32.24/32.07 [1878]~P2051(x18781)+P2051(x18782)+~E(x18781,x18782)
% 32.24/32.07 [1879]~P1452(x18791)+P1452(x18792)+~E(x18791,x18792)
% 32.24/32.07 [1880]~P1418(x18801)+P1418(x18802)+~E(x18801,x18802)
% 32.24/32.07 [1881]~P698(x18811)+P698(x18812)+~E(x18811,x18812)
% 32.24/32.07 [1882]~P1633(x18821)+P1633(x18822)+~E(x18821,x18822)
% 32.24/32.07 [1883]~P1888(x18831)+P1888(x18832)+~E(x18831,x18832)
% 32.24/32.07 [1884]~P1005(x18841)+P1005(x18842)+~E(x18841,x18842)
% 32.24/32.07 [1885]~P2581(x18851)+P2581(x18852)+~E(x18851,x18852)
% 32.24/32.07 [1886]~P973(x18861)+P973(x18862)+~E(x18861,x18862)
% 32.24/32.07 [1887]~P2250(x18871)+P2250(x18872)+~E(x18871,x18872)
% 32.24/32.07 [1888]~P1599(x18881)+P1599(x18882)+~E(x18881,x18882)
% 32.24/32.07 [1889]~P71(x18891)+P71(x18892)+~E(x18891,x18892)
% 32.24/32.07 [1890]~P1846(x18901)+P1846(x18902)+~E(x18901,x18902)
% 32.24/32.07 [1891]~P410(x18911)+P410(x18912)+~E(x18911,x18912)
% 32.24/32.07 [1892]~P2519(x18921)+P2519(x18922)+~E(x18921,x18922)
% 32.24/32.07 [1893]~P1706(x18931)+P1706(x18932)+~E(x18931,x18932)
% 32.24/32.07 [1894]~P234(x18941)+P234(x18942)+~E(x18941,x18942)
% 32.24/32.07 [1895]~P1866(x18951)+P1866(x18952)+~E(x18951,x18952)
% 32.24/32.07 [1896]~P1509(x18961)+P1509(x18962)+~E(x18961,x18962)
% 32.24/32.07 [1897]~P1555(x18971)+P1555(x18972)+~E(x18971,x18972)
% 32.24/32.07 [1898]P2559(x18982,x18983)+~E(x18981,x18982)+~P2559(x18981,x18983)
% 32.24/32.07 [1899]P2559(x18993,x18992)+~E(x18991,x18992)+~P2559(x18993,x18991)
% 32.24/32.07 [1900]~P1568(x19001)+P1568(x19002)+~E(x19001,x19002)
% 32.24/32.07 [1901]P2243(x19012,x19013)+~E(x19011,x19012)+~P2243(x19011,x19013)
% 32.24/32.07 [1902]P2243(x19023,x19022)+~E(x19021,x19022)+~P2243(x19023,x19021)
% 32.24/32.07 [1903]~P650(x19031)+P650(x19032)+~E(x19031,x19032)
% 32.24/32.07 [1904]~P1781(x19041)+P1781(x19042)+~E(x19041,x19042)
% 32.24/32.07 [1905]~P1986(x19051)+P1986(x19052)+~E(x19051,x19052)
% 32.24/32.07 [1906]~P2390(x19061)+P2390(x19062)+~E(x19061,x19062)
% 32.24/32.07 [1907]~P1579(x19071)+P1579(x19072)+~E(x19071,x19072)
% 32.24/32.07 [1908]~P2430(x19081)+P2430(x19082)+~E(x19081,x19082)
% 32.24/32.07 [1909]~P1353(x19091)+P1353(x19092)+~E(x19091,x19092)
% 32.24/32.07 [1910]~P1683(x19101)+P1683(x19102)+~E(x19101,x19102)
% 32.24/32.07 [1911]~P230(x19111)+P230(x19112)+~E(x19111,x19112)
% 32.24/32.07 [1912]~P2330(x19121)+P2330(x19122)+~E(x19121,x19122)
% 32.24/32.07 [1913]~P1114(x19131)+P1114(x19132)+~E(x19131,x19132)
% 32.24/32.07 [1914]~P378(x19141)+P378(x19142)+~E(x19141,x19142)
% 32.24/32.07 [1915]~P359(x19151)+P359(x19152)+~E(x19151,x19152)
% 32.24/32.07 [1916]~P1804(x19161)+P1804(x19162)+~E(x19161,x19162)
% 32.24/32.07 [1917]~P788(x19171)+P788(x19172)+~E(x19171,x19172)
% 32.24/32.07 [1918]~P2245(x19181)+P2245(x19182)+~E(x19181,x19182)
% 32.24/32.07 [1919]~P352(x19191)+P352(x19192)+~E(x19191,x19192)
% 32.24/32.07 [1920]P2562(x19202,x19203)+~E(x19201,x19202)+~P2562(x19201,x19203)
% 32.24/32.07 [1921]P2562(x19213,x19212)+~E(x19211,x19212)+~P2562(x19213,x19211)
% 32.24/32.07 [1922]~P482(x19221)+P482(x19222)+~E(x19221,x19222)
% 32.24/32.07 [1923]~P517(x19231)+P517(x19232)+~E(x19231,x19232)
% 32.24/32.07 [1924]~P455(x19241)+P455(x19242)+~E(x19241,x19242)
% 32.24/32.07 [1925]P844(x19252,x19253)+~E(x19251,x19252)+~P844(x19251,x19253)
% 32.24/32.07 [1926]P844(x19263,x19262)+~E(x19261,x19262)+~P844(x19263,x19261)
% 32.24/32.07 [1927]~P2252(x19271)+P2252(x19272)+~E(x19271,x19272)
% 32.24/32.07 [1928]~P1734(x19281)+P1734(x19282)+~E(x19281,x19282)
% 32.24/32.07 [1929]P2563(x19292,x19293)+~E(x19291,x19292)+~P2563(x19291,x19293)
% 32.24/32.07 [1930]P2563(x19303,x19302)+~E(x19301,x19302)+~P2563(x19303,x19301)
% 32.24/32.07 [1931]~P2544(x19311)+P2544(x19312)+~E(x19311,x19312)
% 32.24/32.07 [1932]~P2404(x19321)+P2404(x19322)+~E(x19321,x19322)
% 32.24/32.07 [1933]~P1700(x19331)+P1700(x19332)+~E(x19331,x19332)
% 32.24/32.07 [1934]~P2212(x19341)+P2212(x19342)+~E(x19341,x19342)
% 32.24/32.07 [1935]~P2213(x19351)+P2213(x19352)+~E(x19351,x19352)
% 32.24/32.07 [1936]~P2226(x19361)+P2226(x19362)+~E(x19361,x19362)
% 32.24/32.07 [1937]~P2197(x19371)+P2197(x19372)+~E(x19371,x19372)
% 32.24/32.07 [1938]~P1797(x19381)+P1797(x19382)+~E(x19381,x19382)
% 32.24/32.07 [1939]~P2231(x19391)+P2231(x19392)+~E(x19391,x19392)
% 32.24/32.07 [1940]~P238(x19401)+P238(x19402)+~E(x19401,x19402)
% 32.24/32.07 [1941]~P2224(x19411)+P2224(x19412)+~E(x19411,x19412)
% 32.24/32.07 [1942]~P2235(x19421)+P2235(x19422)+~E(x19421,x19422)
% 32.24/32.07 [1943]~P463(x19431)+P463(x19432)+~E(x19431,x19432)
% 32.24/32.07 [1944]~P2492(x19441)+P2492(x19442)+~E(x19441,x19442)
% 32.24/32.07 [1945]~P1641(x19451)+P1641(x19452)+~E(x19451,x19452)
% 32.24/32.07 [1946]~P1558(x19461)+P1558(x19462)+~E(x19461,x19462)
% 32.24/32.07 [1947]~P665(x19471)+P665(x19472)+~E(x19471,x19472)
% 32.24/32.07 [1948]~P2583(x19481)+P2583(x19482)+~E(x19481,x19482)
% 32.24/32.07 [1949]~P723(x19491)+P723(x19492)+~E(x19491,x19492)
% 32.24/32.07 [1950]~P2234(x19501)+P2234(x19502)+~E(x19501,x19502)
% 32.24/32.07 [1951]P1666(x19512,x19513)+~E(x19511,x19512)+~P1666(x19511,x19513)
% 32.24/32.07 [1952]P1666(x19523,x19522)+~E(x19521,x19522)+~P1666(x19523,x19521)
% 32.24/32.07 [1953]~P2292(x19531)+P2292(x19532)+~E(x19531,x19532)
% 32.24/32.07 [1954]~P2221(x19541)+P2221(x19542)+~E(x19541,x19542)
% 32.24/32.07 [1955]~P1455(x19551)+P1455(x19552)+~E(x19551,x19552)
% 32.24/32.07 [1956]~P184(x19561)+P184(x19562)+~E(x19561,x19562)
% 32.24/32.07 [1957]~P1133(x19571)+P1133(x19572)+~E(x19571,x19572)
% 32.24/32.07 [1958]~P2523(x19581)+P2523(x19582)+~E(x19581,x19582)
% 32.24/32.07 [1959]~P1559(x19591)+P1559(x19592)+~E(x19591,x19592)
% 32.24/32.07 [1960]~P807(x19601)+P807(x19602)+~E(x19601,x19602)
% 32.24/32.07 [1961]~P2418(x19611)+P2418(x19612)+~E(x19611,x19612)
% 32.24/32.07 [1962]~P1703(x19621)+P1703(x19622)+~E(x19621,x19622)
% 32.24/32.07 [1963]P1171(x19632,x19633)+~E(x19631,x19632)+~P1171(x19631,x19633)
% 32.24/32.07 [1964]P1171(x19643,x19642)+~E(x19641,x19642)+~P1171(x19643,x19641)
% 32.24/32.07 [1965]~P2229(x19651)+P2229(x19652)+~E(x19651,x19652)
% 32.24/32.07 [1966]P1196(x19662,x19663)+~E(x19661,x19662)+~P1196(x19661,x19663)
% 32.24/32.07 [1967]P1196(x19673,x19672)+~E(x19671,x19672)+~P1196(x19673,x19671)
% 32.24/32.07 [1968]P2561(x19682,x19683)+~E(x19681,x19682)+~P2561(x19681,x19683)
% 32.24/32.07 [1969]P2561(x19693,x19692)+~E(x19691,x19692)+~P2561(x19693,x19691)
% 32.24/32.07 [1970]~P724(x19701)+P724(x19702)+~E(x19701,x19702)
% 32.24/32.07 [1971]~P2381(x19711)+P2381(x19712)+~E(x19711,x19712)
% 32.24/32.07 [1972]~P514(x19721)+P514(x19722)+~E(x19721,x19722)
% 32.24/32.07 [1973]~P1231(x19731)+P1231(x19732)+~E(x19731,x19732)
% 32.24/32.07 [1974]~P1696(x19741)+P1696(x19742)+~E(x19741,x19742)
% 32.24/32.07 [1975]~P99(x19751)+P99(x19752)+~E(x19751,x19752)
% 32.24/32.07 [1976]~P1001(x19761)+P1001(x19762)+~E(x19761,x19762)
% 32.24/32.07 [1977]~P436(x19771)+P436(x19772)+~E(x19771,x19772)
% 32.24/32.07 [1978]~P772(x19781)+P772(x19782)+~E(x19781,x19782)
% 32.24/32.07 [1979]P2560(x19792,x19793)+~E(x19791,x19792)+~P2560(x19791,x19793)
% 32.24/32.07 [1980]P2560(x19803,x19802)+~E(x19801,x19802)+~P2560(x19803,x19801)
% 32.24/32.07 [1981]~P2427(x19811)+P2427(x19812)+~E(x19811,x19812)
% 32.24/32.07 [1982]~P2383(x19821)+P2383(x19822)+~E(x19821,x19822)
% 32.24/32.07 [1983]~P2337(x19831)+P2337(x19832)+~E(x19831,x19832)
% 32.24/32.07 [1984]~P1847(x19841)+P1847(x19842)+~E(x19841,x19842)
% 32.24/32.07 [1985]~P2345(x19851)+P2345(x19852)+~E(x19851,x19852)
% 32.24/32.07 [1986]~P84(x19861)+P84(x19862)+~E(x19861,x19862)
% 32.24/32.07 [1987]~P557(x19871)+P557(x19872)+~E(x19871,x19872)
% 32.24/32.07 [1988]~P465(x19881)+P465(x19882)+~E(x19881,x19882)
% 32.24/32.07 [1989]~P635(x19891)+P635(x19892)+~E(x19891,x19892)
% 32.24/32.07 [1990]~P1565(x19901)+P1565(x19902)+~E(x19901,x19902)
% 32.24/32.07 [1991]~P2371(x19911)+P2371(x19912)+~E(x19911,x19912)
% 32.24/32.07 [1992]~P384(x19921)+P384(x19922)+~E(x19921,x19922)
% 32.24/32.07 [1993]~P2091(x19931)+P2091(x19932)+~E(x19931,x19932)
% 32.24/32.07 [1994]~P1111(x19941)+P1111(x19942)+~E(x19941,x19942)
% 32.24/32.07 [1995]~P110(x19951)+P110(x19952)+~E(x19951,x19952)
% 32.24/32.07 [1996]~P812(x19961)+P812(x19962)+~E(x19961,x19962)
% 32.24/32.07 [1997]~P1858(x19971)+P1858(x19972)+~E(x19971,x19972)
% 32.24/32.07 [1998]~P2237(x19981)+P2237(x19982)+~E(x19981,x19982)
% 32.24/32.07 [1999]~P1553(x19991)+P1553(x19992)+~E(x19991,x19992)
% 32.24/32.07 [2000]~P2255(x20001)+P2255(x20002)+~E(x20001,x20002)
% 32.24/32.07 [2001]~P261(x20011)+P261(x20012)+~E(x20011,x20012)
% 32.24/32.07 [2002]~P1139(x20021)+P1139(x20022)+~E(x20021,x20022)
% 32.24/32.07 [2003]~P701(x20031)+P701(x20032)+~E(x20031,x20032)
% 32.24/32.07 [2004]~P1941(x20041)+P1941(x20042)+~E(x20041,x20042)
% 32.24/32.07 [2005]~P2400(x20051)+P2400(x20052)+~E(x20051,x20052)
% 32.24/32.07 [2006]~P1656(x20061)+P1656(x20062)+~E(x20061,x20062)
% 32.24/32.07 [2007]~P1572(x20071)+P1572(x20072)+~E(x20071,x20072)
% 32.24/32.07 [2008]~P689(x20081)+P689(x20082)+~E(x20081,x20082)
% 32.24/32.07 [2009]~P2391(x20091)+P2391(x20092)+~E(x20091,x20092)
% 32.24/32.07 [2010]~P500(x20101)+P500(x20102)+~E(x20101,x20102)
% 32.24/32.07 [2011]~P100(x20111)+P100(x20112)+~E(x20111,x20112)
% 32.24/32.07 [2012]~P791(x20121)+P791(x20122)+~E(x20121,x20122)
% 32.24/32.07 [2013]~P2525(x20131)+P2525(x20132)+~E(x20131,x20132)
% 32.24/32.07 [2014]~P533(x20141)+P533(x20142)+~E(x20141,x20142)
% 32.24/32.07 [2015]~P2230(x20151)+P2230(x20152)+~E(x20151,x20152)
% 32.24/32.07 [2016]~P1837(x20161)+P1837(x20162)+~E(x20161,x20162)
% 32.24/32.07 [2017]P1472(x20172,x20173)+~E(x20171,x20172)+~P1472(x20171,x20173)
% 32.24/32.07 [2018]P1472(x20183,x20182)+~E(x20181,x20182)+~P1472(x20183,x20181)
% 32.24/32.07 [2019]~P1712(x20191)+P1712(x20192)+~E(x20191,x20192)
% 32.24/32.07 [2020]~P966(x20201)+P966(x20202)+~E(x20201,x20202)
% 32.24/32.07 [2021]~P466(x20211)+P466(x20212)+~E(x20211,x20212)
% 32.24/32.07 [2022]P1476(x20222,x20223)+~E(x20221,x20222)+~P1476(x20221,x20223)
% 32.24/32.07 [2023]P1476(x20233,x20232)+~E(x20231,x20232)+~P1476(x20233,x20231)
% 32.24/32.07 [2024]P543(x20242,x20243)+~E(x20241,x20242)+~P543(x20241,x20243)
% 32.24/32.07 [2025]P543(x20253,x20252)+~E(x20251,x20252)+~P543(x20253,x20251)
% 32.24/32.07 [2026]~P364(x20261)+P364(x20262)+~E(x20261,x20262)
% 32.24/32.07 [2027]~P2580(x20271)+P2580(x20272)+~E(x20271,x20272)
% 32.24/32.07 [2028]P715(x20282,x20283)+~E(x20281,x20282)+~P715(x20281,x20283)
% 32.24/32.07 [2029]P715(x20293,x20292)+~E(x20291,x20292)+~P715(x20293,x20291)
% 32.24/32.07 [2030]~P2590(x20301)+P2590(x20302)+~E(x20301,x20302)
% 32.24/32.07 [2031]~P2507(x20311)+P2507(x20312)+~E(x20311,x20312)
% 32.24/32.07 [2032]~P2210(x20321)+P2210(x20322)+~E(x20321,x20322)
% 32.24/32.07 [2033]~P1845(x20331)+P1845(x20332)+~E(x20331,x20332)
% 32.24/32.07 [2034]~P105(x20341)+P105(x20342)+~E(x20341,x20342)
% 32.24/32.07 [2035]~P2299(x20351)+P2299(x20352)+~E(x20351,x20352)
% 32.24/32.07 [2036]~P1394(x20361)+P1394(x20362)+~E(x20361,x20362)
% 32.24/32.07 [2037]~P2402(x20371)+P2402(x20372)+~E(x20371,x20372)
% 32.24/32.07 [2038]~P1718(x20381)+P1718(x20382)+~E(x20381,x20382)
% 32.24/32.07 [2039]~P1719(x20391)+P1719(x20392)+~E(x20391,x20392)
% 32.24/32.07 [2040]P859(x20402,x20403)+~E(x20401,x20402)+~P859(x20401,x20403)
% 32.24/32.07 [2041]P859(x20413,x20412)+~E(x20411,x20412)+~P859(x20413,x20411)
% 32.24/32.07 [2042]P2456(x20422,x20423)+~E(x20421,x20422)+~P2456(x20421,x20423)
% 32.24/32.07 [2043]P2456(x20433,x20432)+~E(x20431,x20432)+~P2456(x20433,x20431)
% 32.24/32.07 [2044]P797(x20442,x20443)+~E(x20441,x20442)+~P797(x20441,x20443)
% 32.24/32.07 [2045]P797(x20453,x20452)+~E(x20451,x20452)+~P797(x20453,x20451)
% 32.24/32.07 [2046]~P1411(x20461)+P1411(x20462)+~E(x20461,x20462)
% 32.24/32.07 [2047]~P74(x20471)+P74(x20472)+~E(x20471,x20472)
% 32.24/32.07 [2048]~P2124(x20481)+P2124(x20482)+~E(x20481,x20482)
% 32.24/32.07 [2049]~P2009(x20491)+P2009(x20492)+~E(x20491,x20492)
% 32.24/32.07 [2050]~P790(x20501)+P790(x20502)+~E(x20501,x20502)
% 32.24/32.07 [2051]~P937(x20511)+P937(x20512)+~E(x20511,x20512)
% 32.24/32.07 [2052]~P167(x20521)+P167(x20522)+~E(x20521,x20522)
% 32.24/32.07 [2053]~P2304(x20531)+P2304(x20532)+~E(x20531,x20532)
% 32.24/32.07 [2054]~P2341(x20541)+P2341(x20542)+~E(x20541,x20542)
% 32.24/32.07 [2055]~P1454(x20551)+P1454(x20552)+~E(x20551,x20552)
% 32.24/32.07 [2056]~P526(x20561)+P526(x20562)+~E(x20561,x20562)
% 32.24/32.07 [2057]~P2073(x20571)+P2073(x20572)+~E(x20571,x20572)
% 32.24/32.07 [2058]~P395(x20581)+P395(x20582)+~E(x20581,x20582)
% 32.24/32.07 [2059]~P2146(x20591)+P2146(x20592)+~E(x20591,x20592)
% 32.24/32.07 [2060]~P2147(x20601)+P2147(x20602)+~E(x20601,x20602)
% 32.24/32.07 [2061]~P2148(x20611)+P2148(x20612)+~E(x20611,x20612)
% 32.24/32.07 [2062]~P1501(x20621)+P1501(x20622)+~E(x20621,x20622)
% 32.24/32.07 [2063]~P158(x20631)+P158(x20632)+~E(x20631,x20632)
% 32.24/32.07 [2064]~P1881(x20641)+P1881(x20642)+~E(x20641,x20642)
% 32.24/32.07 [2065]~P2324(x20651)+P2324(x20652)+~E(x20651,x20652)
% 32.24/32.07 [2066]~P810(x20661)+P810(x20662)+~E(x20661,x20662)
% 32.24/32.07 [2067]~P2076(x20671)+P2076(x20672)+~E(x20671,x20672)
% 32.24/32.07 [2068]~P198(x20681)+P198(x20682)+~E(x20681,x20682)
% 32.24/32.07 [2069]~P293(x20691)+P293(x20692)+~E(x20691,x20692)
% 32.24/32.07 [2070]~P479(x20701)+P479(x20702)+~E(x20701,x20702)
% 32.24/32.07 [2071]~P294(x20711)+P294(x20712)+~E(x20711,x20712)
% 32.24/32.07 [2072]~P501(x20721)+P501(x20722)+~E(x20721,x20722)
% 32.24/32.07 [2073]~P295(x20731)+P295(x20732)+~E(x20731,x20732)
% 32.24/32.07 [2074]~P363(x20741)+P363(x20742)+~E(x20741,x20742)
% 32.24/32.07 [2075]~P782(x20751)+P782(x20752)+~E(x20751,x20752)
% 32.24/32.07 [2076]~P2534(x20761)+P2534(x20762)+~E(x20761,x20762)
% 32.24/32.07 [2077]~P2349(x20771)+P2349(x20772)+~E(x20771,x20772)
% 32.24/32.07 [2078]~P1491(x20781)+P1491(x20782)+~E(x20781,x20782)
% 32.24/32.07 [2079]~P1923(x20791)+P1923(x20792)+~E(x20791,x20792)
% 32.24/32.07 [2080]~P2318(x20801)+P2318(x20802)+~E(x20801,x20802)
% 32.24/32.07 [2081]~P524(x20811)+P524(x20812)+~E(x20811,x20812)
% 32.24/32.07 [2082]P824(x20822,x20823)+~E(x20821,x20822)+~P824(x20821,x20823)
% 32.24/32.07 [2083]P824(x20833,x20832)+~E(x20831,x20832)+~P824(x20833,x20831)
% 32.24/32.07 [2084]~P2315(x20841)+P2315(x20842)+~E(x20841,x20842)
% 32.24/32.07 [2085]~P605(x20851)+P605(x20852)+~E(x20851,x20852)
% 32.24/32.07 [2086]~P1676(x20861)+P1676(x20862)+~E(x20861,x20862)
% 32.24/32.07 [2087]~P580(x20871)+P580(x20872)+~E(x20871,x20872)
% 32.24/32.07 [2088]~P2340(x20881)+P2340(x20882)+~E(x20881,x20882)
% 32.24/32.07 [2089]~P2039(x20891)+P2039(x20892)+~E(x20891,x20892)
% 32.24/32.07 [2090]~P2048(x20901)+P2048(x20902)+~E(x20901,x20902)
% 32.24/32.07 [2091]~P2040(x20911)+P2040(x20912)+~E(x20911,x20912)
% 32.24/32.07 [2092]~P1974(x20921)+P1974(x20922)+~E(x20921,x20922)
% 32.24/32.07 [2093]~P1975(x20931)+P1975(x20932)+~E(x20931,x20932)
% 32.24/32.07 [2094]~P1830(x20941)+P1830(x20942)+~E(x20941,x20942)
% 32.24/32.07 [2095]~P647(x20951)+P647(x20952)+~E(x20951,x20952)
% 32.24/32.07 [2096]~P660(x20961)+P660(x20962)+~E(x20961,x20962)
% 32.24/32.07 [2097]~P1805(x20971)+P1805(x20972)+~E(x20971,x20972)
% 32.24/32.07 [2098]~P1985(x20981)+P1985(x20982)+~E(x20981,x20982)
% 32.24/32.07 [2099]~P802(x20991)+P802(x20992)+~E(x20991,x20992)
% 32.24/32.07 [2100]~P1982(x21001)+P1982(x21002)+~E(x21001,x21002)
% 32.24/32.07 [2101]~P2275(x21011)+P2275(x21012)+~E(x21011,x21012)
% 32.24/32.07 [2102]~P1980(x21021)+P1980(x21022)+~E(x21021,x21022)
% 32.24/32.07 [2103]~P525(x21031)+P525(x21032)+~E(x21031,x21032)
% 32.24/32.07 [2104]~P2542(x21041)+P2542(x21042)+~E(x21041,x21042)
% 32.24/32.07 [2105]~P2518(x21051)+P2518(x21052)+~E(x21051,x21052)
% 32.24/32.07 [2106]~P365(x21061)+P365(x21062)+~E(x21061,x21062)
% 32.24/32.07 [2107]~P2553(x21071)+P2553(x21072)+~E(x21071,x21072)
% 32.24/32.07 [2108]~P1924(x21081)+P1924(x21082)+~E(x21081,x21082)
% 32.24/32.07 [2109]~P1756(x21091)+P1756(x21092)+~E(x21091,x21092)
% 32.24/32.07 [2110]~P1955(x21101)+P1955(x21102)+~E(x21101,x21102)
% 32.24/32.07 [2111]~P2123(x21111)+P2123(x21112)+~E(x21111,x21112)
% 32.24/32.07 [2112]~P1899(x21121)+P1899(x21122)+~E(x21121,x21122)
% 32.24/32.07 [2113]~P1412(x21131)+P1412(x21132)+~E(x21131,x21132)
% 32.24/32.07 [2114]~P1956(x21141)+P1956(x21142)+~E(x21141,x21142)
% 32.24/32.07 [2115]~P1926(x21151)+P1926(x21152)+~E(x21151,x21152)
% 32.24/32.07 [2116]~P1907(x21161)+P1907(x21162)+~E(x21161,x21162)
% 32.24/32.07 [2117]~P976(x21171)+P976(x21172)+~E(x21171,x21172)
% 32.24/32.07 [2118]~P1927(x21181)+P1927(x21182)+~E(x21181,x21182)
% 32.24/32.07 [2119]~P199(x21191)+P199(x21192)+~E(x21191,x21192)
% 32.24/32.07 [2120]~P367(x21201)+P367(x21202)+~E(x21201,x21202)
% 32.24/32.07 [2121]~P296(x21211)+P296(x21212)+~E(x21211,x21212)
% 32.24/32.07 [2122]~P1669(x21221)+P1669(x21222)+~E(x21221,x21222)
% 32.24/32.07 [2123]~P996(x21231)+P996(x21232)+~E(x21231,x21232)
% 32.24/32.07 [2124]~P1409(x21241)+P1409(x21242)+~E(x21241,x21242)
% 32.24/32.07 [2125]~P975(x21251)+P975(x21252)+~E(x21251,x21252)
% 32.24/32.07 [2126]~P1410(x21261)+P1410(x21262)+~E(x21261,x21262)
% 32.24/32.07 [2127]~P1002(x21271)+P1002(x21272)+~E(x21271,x21272)
% 32.24/32.07 [2128]~P767(x21281)+P767(x21282)+~E(x21281,x21282)
% 32.24/32.07 [2129]~P1900(x21291)+P1900(x21292)+~E(x21291,x21292)
% 32.24/32.07 [2130]~P171(x21301)+P171(x21302)+~E(x21301,x21302)
% 32.24/32.07 [2131]~P1390(x21311)+P1390(x21312)+~E(x21311,x21312)
% 32.24/32.07 [2132]~P200(x21321)+P200(x21322)+~E(x21321,x21322)
% 32.24/32.07 [2133]~P1384(x21331)+P1384(x21332)+~E(x21331,x21332)
% 32.24/32.07 [2134]~P201(x21341)+P201(x21342)+~E(x21341,x21342)
% 32.24/32.07 [2135]~P1743(x21351)+P1743(x21352)+~E(x21351,x21352)
% 32.24/32.07 [2136]~P1744(x21361)+P1744(x21362)+~E(x21361,x21362)
% 32.24/32.07 [2137]~P1886(x21371)+P1886(x21372)+~E(x21371,x21372)
% 32.24/32.07 [2138]~P2449(x21381)+P2449(x21382)+~E(x21381,x21382)
% 32.24/32.07 [2139]~P1463(x21391)+P1463(x21392)+~E(x21391,x21392)
% 32.24/32.07 [2140]~P332(x21401)+P332(x21402)+~E(x21401,x21402)
% 32.24/32.07 [2141]~P1414(x21411)+P1414(x21412)+~E(x21411,x21412)
% 32.24/32.07 [2142]~P1415(x21421)+P1415(x21422)+~E(x21421,x21422)
% 32.24/32.07 [2143]~P809(x21431)+P809(x21432)+~E(x21431,x21432)
% 32.24/32.07 [2144]~P1874(x21441)+P1874(x21442)+~E(x21441,x21442)
% 32.24/32.07 [2145]~P997(x21451)+P997(x21452)+~E(x21451,x21452)
% 32.24/32.07 [2146]~P1875(x21461)+P1875(x21462)+~E(x21461,x21462)
% 32.24/32.07 [2147]~P2104(x21471)+P2104(x21472)+~E(x21471,x21472)
% 32.24/32.07 [2148]~P1835(x21481)+P1835(x21482)+~E(x21481,x21482)
% 32.24/32.07 [2149]~P677(x21491)+P677(x21492)+~E(x21491,x21492)
% 32.24/32.07 [2150]~P1842(x21501)+P1842(x21502)+~E(x21501,x21502)
% 32.24/32.07 [2151]~P1972(x21511)+P1972(x21512)+~E(x21511,x21512)
% 32.24/32.07 [2152]~P1843(x21521)+P1843(x21522)+~E(x21521,x21522)
% 32.24/32.07 [2153]~P634(x21531)+P634(x21532)+~E(x21531,x21532)
% 32.24/32.07 [2154]~P1844(x21541)+P1844(x21542)+~E(x21541,x21542)
% 32.24/32.07 [2155]~P1816(x21551)+P1816(x21552)+~E(x21551,x21552)
% 32.24/32.07 [2156]~P1817(x21561)+P1817(x21562)+~E(x21561,x21562)
% 32.24/32.07 [2157]~P1795(x21571)+P1795(x21572)+~E(x21571,x21572)
% 32.24/32.07 [2158]~P678(x21581)+P678(x21582)+~E(x21581,x21582)
% 32.24/32.07 [2159]P2082(x21592,x21593)+~E(x21591,x21592)+~P2082(x21591,x21593)
% 32.24/32.07 [2160]P2082(x21603,x21602)+~E(x21601,x21602)+~P2082(x21603,x21601)
% 32.24/32.07 [2161]~P1733(x21611)+P1733(x21612)+~E(x21611,x21612)
% 32.24/32.07 [2162]~P2169(x21621)+P2169(x21622)+~E(x21621,x21622)
% 32.24/32.07 [2163]~P1609(x21631)+P1609(x21632)+~E(x21631,x21632)
% 32.24/32.07 [2164]P1521(x21642,x21643)+~E(x21641,x21642)+~P1521(x21641,x21643)
% 32.24/32.07 [2165]P1521(x21653,x21652)+~E(x21651,x21652)+~P1521(x21653,x21651)
% 32.24/32.07 [2166]~P1535(x21661)+P1535(x21662)+~E(x21661,x21662)
% 32.24/32.07 [2167]~P804(x21671)+P804(x21672)+~E(x21671,x21672)
% 32.24/32.07 [2168]~P1796(x21681)+P1796(x21682)+~E(x21681,x21682)
% 32.24/32.07 [2169]~P1783(x21691)+P1783(x21692)+~E(x21691,x21692)
% 32.24/32.07 [2170]~P1792(x21701)+P1792(x21702)+~E(x21701,x21702)
% 32.24/32.07 [2171]~P1784(x21711)+P1784(x21712)+~E(x21711,x21712)
% 32.24/32.07 [2172]~P1787(x21721)+P1787(x21722)+~E(x21721,x21722)
% 32.24/32.07 [2173]~P2027(x21731)+P2027(x21732)+~E(x21731,x21732)
% 32.24/32.07 [2174]~P1767(x21741)+P1767(x21742)+~E(x21741,x21742)
% 32.24/32.07 [2175]~P811(x21751)+P811(x21752)+~E(x21751,x21752)
% 32.24/32.07 [2176]~P826(x21761)+P826(x21762)+~E(x21761,x21762)
% 32.24/32.07 [2177]~P654(x21771)+P654(x21772)+~E(x21771,x21772)
% 32.24/32.07 [2178]~P1672(x21781)+P1672(x21782)+~E(x21781,x21782)
% 32.24/32.07 [2179]~P1673(x21791)+P1673(x21792)+~E(x21791,x21792)
% 32.24/32.07 [2180]~P1702(x21801)+P1702(x21802)+~E(x21801,x21802)
% 32.24/32.07 [2181]~P1610(x21811)+P1610(x21812)+~E(x21811,x21812)
% 32.24/32.07 [2182]~P1674(x21821)+P1674(x21822)+~E(x21821,x21822)
% 32.24/32.07 [2183]~P1675(x21831)+P1675(x21832)+~E(x21831,x21832)
% 32.24/32.07 [2184]~P1698(x21841)+P1698(x21842)+~E(x21841,x21842)
% 32.24/32.07 [2185]~P1611(x21851)+P1611(x21852)+~E(x21851,x21852)
% 32.24/32.07 [2186]~P1679(x21861)+P1679(x21862)+~E(x21861,x21862)
% 32.24/32.07 [2187]~P1680(x21871)+P1680(x21872)+~E(x21871,x21872)
% 32.24/32.07 [2188]~P1694(x21881)+P1694(x21882)+~E(x21881,x21882)
% 32.24/32.07 [2189]~P1612(x21891)+P1612(x21892)+~E(x21891,x21892)
% 32.24/32.07 [2190]~P1613(x21901)+P1613(x21902)+~E(x21901,x21902)
% 32.24/32.07 [2191]~P1684(x21911)+P1684(x21912)+~E(x21911,x21912)
% 32.24/32.07 [2192]~P1685(x21921)+P1685(x21922)+~E(x21921,x21922)
% 32.24/32.07 [2193]~P1810(x21931)+P1810(x21932)+~E(x21931,x21932)
% 32.24/32.07 [2194]~P808(x21941)+P808(x21942)+~E(x21941,x21942)
% 32.24/32.07 [2195]~P1614(x21951)+P1614(x21952)+~E(x21951,x21952)
% 32.24/32.07 [2196]~P1653(x21961)+P1653(x21962)+~E(x21961,x21962)
% 32.24/32.07 [2197]~P981(x21971)+P981(x21972)+~E(x21971,x21972)
% 32.24/32.07 [2198]~P2572(x21981)+P2572(x21982)+~E(x21981,x21982)
% 32.24/32.07 [2199]~P798(x21991)+P798(x21992)+~E(x21991,x21992)
% 32.24/32.07 [2200]~P1625(x22001)+P1625(x22002)+~E(x22001,x22002)
% 32.24/32.07 [2201]P2089(x22012,x22013)+~E(x22011,x22012)+~P2089(x22011,x22013)
% 32.24/32.07 [2202]P2089(x22023,x22022)+~E(x22021,x22022)+~P2089(x22023,x22021)
% 32.24/32.07 [2203]~P1626(x22031)+P1626(x22032)+~E(x22031,x22032)
% 32.24/32.07 [2204]~P1639(x22041)+P1639(x22042)+~E(x22041,x22042)
% 32.24/32.07 [2205]~P1618(x22051)+P1618(x22052)+~E(x22051,x22052)
% 32.24/32.07 [2206]~P1089(x22061)+P1089(x22062)+~E(x22061,x22062)
% 32.24/32.07 [2207]~P1575(x22071)+P1575(x22072)+~E(x22071,x22072)
% 32.24/32.07 [2208]~P1537(x22081)+P1537(x22082)+~E(x22081,x22082)
% 32.24/32.07 [2209]~P1576(x22091)+P1576(x22092)+~E(x22091,x22092)
% 32.24/32.07 [2210]P843(x22102,x22103)+~E(x22101,x22102)+~P843(x22101,x22103)
% 32.24/32.07 [2211]P843(x22113,x22112)+~E(x22111,x22112)+~P843(x22113,x22111)
% 32.24/32.07 [2212]~P1539(x22121)+P1539(x22122)+~E(x22121,x22122)
% 32.24/32.07 [2213]~P1933(x22131)+P1933(x22132)+~E(x22131,x22132)
% 32.24/32.07 [2214]~P1551(x22141)+P1551(x22142)+~E(x22141,x22142)
% 32.24/32.07 [2215]~P1691(x22151)+P1691(x22152)+~E(x22151,x22152)
% 32.24/32.07 [2216]~P1552(x22161)+P1552(x22162)+~E(x22161,x22162)
% 32.24/32.07 [2217]~P2263(x22171)+P2263(x22172)+~E(x22171,x22172)
% 32.24/32.07 [2218]~P1543(x22181)+P1543(x22182)+~E(x22181,x22182)
% 32.24/32.07 [2219]~P1532(x22191)+P1532(x22192)+~E(x22191,x22192)
% 32.24/32.07 [2220]~P1020(x22201)+P1020(x22202)+~E(x22201,x22202)
% 32.24/32.07 [2221]~P918(x22211)+P918(x22212)+~E(x22211,x22212)
% 32.24/32.07 [2222]~P1413(x22221)+P1413(x22222)+~E(x22221,x22222)
% 32.24/32.07 [2223]~P1497(x22231)+P1497(x22232)+~E(x22231,x22232)
% 32.24/32.07 [2224]~P307(x22241)+P307(x22242)+~E(x22241,x22242)
% 32.24/32.07 [2225]~P2405(x22251)+P2405(x22252)+~E(x22251,x22252)
% 32.24/32.07 [2226]~P905(x22261)+P905(x22262)+~E(x22261,x22262)
% 32.24/32.07 [2227]~P1518(x22271)+P1518(x22272)+~E(x22271,x22272)
% 32.24/32.07 [2228]~P1096(x22281)+P1096(x22282)+~E(x22281,x22282)
% 32.24/32.07 [2229]~P806(x22291)+P806(x22292)+~E(x22291,x22292)
% 32.24/32.07 [2230]~P214(x22301)+P214(x22302)+~E(x22301,x22302)
% 32.24/32.07 [2231]~P1826(x22311)+P1826(x22312)+~E(x22311,x22312)
% 32.24/32.07 [2232]~P1112(x22321)+P1112(x22322)+~E(x22321,x22322)
% 32.24/32.07 [2233]~P1416(x22331)+P1416(x22332)+~E(x22331,x22332)
% 32.24/32.07 [2234]~P1124(x22341)+P1124(x22342)+~E(x22341,x22342)
% 32.24/32.07 [2235]~P2274(x22351)+P2274(x22352)+~E(x22351,x22352)
% 32.24/32.07 [2236]~P1391(x22361)+P1391(x22362)+~E(x22361,x22362)
% 32.24/32.07 [2237]~P1350(x22371)+P1350(x22372)+~E(x22371,x22372)
% 32.24/32.07 [2238]~P1392(x22381)+P1392(x22382)+~E(x22381,x22382)
% 32.24/32.07 [2239]~P1387(x22391)+P1387(x22392)+~E(x22391,x22392)
% 32.24/32.07 [2240]~P1400(x22401)+P1400(x22402)+~E(x22401,x22402)
% 32.24/32.07 [2241]~P1393(x22411)+P1393(x22412)+~E(x22411,x22412)
% 32.24/32.07 [2242]~P1351(x22421)+P1351(x22422)+~E(x22421,x22422)
% 32.24/32.07 [2243]~P1375(x22431)+P1375(x22432)+~E(x22431,x22432)
% 32.24/32.07 [2244]~P1376(x22441)+P1376(x22442)+~E(x22441,x22442)
% 32.24/32.07 [2245]~P1377(x22451)+P1377(x22452)+~E(x22451,x22452)
% 32.24/32.07 [2246]~P2161(x22461)+P2161(x22462)+~E(x22461,x22462)
% 32.24/32.07 [2247]~P1378(x22471)+P1378(x22472)+~E(x22471,x22472)
% 32.24/32.07 [2248]~P397(x22481)+P397(x22482)+~E(x22481,x22482)
% 32.24/32.07 [2249]~P1079(x22491)+P1079(x22492)+~E(x22491,x22492)
% 32.24/32.07 [2250]~P1035(x22501)+P1035(x22502)+~E(x22501,x22502)
% 32.24/32.07 [2251]~P528(x22511)+P528(x22512)+~E(x22511,x22512)
% 32.24/32.07 [2252]~P1056(x22521)+P1056(x22522)+~E(x22521,x22522)
% 32.24/32.07 [2253]~P1062(x22531)+P1062(x22532)+~E(x22531,x22532)
% 32.24/32.07 [2254]~P1047(x22541)+P1047(x22542)+~E(x22541,x22542)
% 32.24/32.07 [2255]~P1057(x22551)+P1057(x22552)+~E(x22551,x22552)
% 32.24/32.07 [2256]~P350(x22561)+P350(x22562)+~E(x22561,x22562)
% 32.24/32.07 [2257]~P2356(x22571)+P2356(x22572)+~E(x22571,x22572)
% 32.24/32.07 [2258]~P1879(x22581)+P1879(x22582)+~E(x22581,x22582)
% 32.24/32.07 [2259]~P1058(x22591)+P1058(x22592)+~E(x22591,x22592)
% 32.24/32.07 [2260]~P1928(x22601)+P1928(x22602)+~E(x22601,x22602)
% 32.24/32.07 [2261]~P813(x22611)+P813(x22612)+~E(x22611,x22612)
% 32.24/32.07 [2262]~P982(x22621)+P982(x22622)+~E(x22621,x22622)
% 32.24/32.07 [2263]~P983(x22631)+P983(x22632)+~E(x22631,x22632)
% 32.24/32.07 [2264]~P993(x22641)+P993(x22642)+~E(x22641,x22642)
% 32.24/32.07 [2265]~P984(x22651)+P984(x22652)+~E(x22651,x22652)
% 32.24/32.07 [2266]~P987(x22661)+P987(x22662)+~E(x22661,x22662)
% 32.24/32.07 [2267]~P995(x22671)+P995(x22672)+~E(x22671,x22672)
% 32.24/32.07 [2268]~P878(x22681)+P878(x22682)+~E(x22681,x22682)
% 32.24/32.07 [2269]~P2015(x22691)+P2015(x22692)+~E(x22691,x22692)
% 32.24/32.07 [2270]~P851(x22701)+P851(x22702)+~E(x22701,x22702)
% 32.24/32.07 [2271]~P1445(x22711)+P1445(x22712)+~E(x22711,x22712)
% 32.24/32.07 [2272]~P2249(x22721)+P2249(x22722)+~E(x22721,x22722)
% 32.24/32.07 [2273]~P919(x22731)+P919(x22732)+~E(x22731,x22732)
% 32.24/32.07 [2274]~P889(x22741)+P889(x22742)+~E(x22741,x22742)
% 32.24/32.07 [2275]~P927(x22751)+P927(x22752)+~E(x22751,x22752)
% 32.24/32.07 [2276]~P906(x22761)+P906(x22762)+~E(x22761,x22762)
% 32.24/32.07 [2277]~P402(x22771)+P402(x22772)+~E(x22771,x22772)
% 32.24/32.07 [2278]~P777(x22781)+P777(x22782)+~E(x22781,x22782)
% 32.24/32.07 [2279]~P1545(x22791)+P1545(x22792)+~E(x22791,x22792)
% 32.24/32.07 [2280]~P770(x22801)+P770(x22802)+~E(x22801,x22802)
% 32.24/32.07 [2281]~P637(x22811)+P637(x22812)+~E(x22811,x22812)
% 32.24/32.07 [2282]~P297(x22821)+P297(x22822)+~E(x22821,x22822)
% 32.24/32.07 [2283]~P278(x22831)+P278(x22832)+~E(x22831,x22832)
% 32.24/32.07 [2284]~P284(x22841)+P284(x22842)+~E(x22841,x22842)
% 32.24/32.07 [2285]~P638(x22851)+P638(x22852)+~E(x22851,x22852)
% 32.24/32.07 [2286]~P202(x22861)+P202(x22862)+~E(x22861,x22862)
% 32.24/32.07 [2287]~P1801(x22871)+P1801(x22872)+~E(x22871,x22872)
% 32.24/32.07 [2288]~P2554(x22881)+P2554(x22882)+~E(x22881,x22882)
% 32.24/32.07 [2289]~P2376(x22891)+P2376(x22892)+~E(x22891,x22892)
% 32.24/32.07 [2290]~P716(x22901)+P716(x22902)+~E(x22901,x22902)
% 32.24/32.07 [2291]~P640(x22911)+P640(x22912)+~E(x22911,x22912)
% 32.24/32.07 [2292]~P641(x22921)+P641(x22922)+~E(x22921,x22922)
% 32.24/32.07 [2293]~P970(x22931)+P970(x22932)+~E(x22931,x22932)
% 32.24/32.07 [2294]~P2505(x22941)+P2505(x22942)+~E(x22941,x22942)
% 32.24/32.07 [2295]~P527(x22951)+P527(x22952)+~E(x22951,x22952)
% 32.24/32.07 [2296]~P2156(x22961)+P2156(x22962)+~E(x22961,x22962)
% 32.24/32.07 [2297]~P441(x22971)+P441(x22972)+~E(x22971,x22972)
% 32.24/32.07 [2298]~P422(x22981)+P422(x22982)+~E(x22981,x22982)
% 32.24/32.07 [2299]~P2103(x22991)+P2103(x22992)+~E(x22991,x22992)
% 32.24/32.07 [2300]~P423(x23001)+P423(x23002)+~E(x23001,x23002)
% 32.24/32.07 [2301]~P577(x23011)+P577(x23012)+~E(x23011,x23012)
% 32.24/32.07 [2302]~P300(x23021)+P300(x23022)+~E(x23021,x23022)
% 32.24/32.07 [2303]~P595(x23031)+P595(x23032)+~E(x23031,x23032)
% 32.24/32.07 [2304]~P2204(x23041)+P2204(x23042)+~E(x23041,x23042)
% 32.24/32.07 [2305]~P586(x23051)+P586(x23052)+~E(x23051,x23052)
% 32.24/32.07 [2306]~P530(x23061)+P530(x23062)+~E(x23061,x23062)
% 32.24/32.07 [2307]~P570(x23071)+P570(x23072)+~E(x23071,x23072)
% 32.24/32.07 [2308]~P2222(x23081)+P2222(x23082)+~E(x23081,x23082)
% 32.24/32.07 [2309]~P366(x23091)+P366(x23092)+~E(x23091,x23092)
% 32.24/32.07 [2310]~P599(x23101)+P599(x23102)+~E(x23101,x23102)
% 32.24/32.07 [2311]~P2317(x23111)+P2317(x23112)+~E(x23111,x23112)
% 32.24/32.07 [2312]~P572(x23121)+P572(x23122)+~E(x23121,x23122)
% 32.24/32.07 [2313]~P2579(x23131)+P2579(x23132)+~E(x23131,x23132)
% 32.24/32.07 [2314]~P1215(x23141)+P1215(x23142)+~E(x23141,x23142)
% 32.24/32.07 [2315]~P447(x23151)+P447(x23152)+~E(x23151,x23152)
% 32.24/32.07 [2316]~P2202(x23161)+P2202(x23162)+~E(x23161,x23162)
% 32.24/32.07 [2317]~P852(x23171)+P852(x23172)+~E(x23171,x23172)
% 32.24/32.07 [2318]~P308(x23181)+P308(x23182)+~E(x23181,x23182)
% 32.24/32.07 [2319]~P2284(x23191)+P2284(x23192)+~E(x23191,x23192)
% 32.24/32.07 [2320]~P616(x23201)+P616(x23202)+~E(x23201,x23202)
% 32.24/32.07 [2321]~P1704(x23211)+P1704(x23212)+~E(x23211,x23212)
% 32.24/32.07 [2322]~P194(x23221)+P194(x23222)+~E(x23221,x23222)
% 32.24/32.07 [2323]~P404(x23231)+P404(x23232)+~E(x23231,x23232)
% 32.24/32.07 [2324]~P1141(x23241)+P1141(x23242)+~E(x23241,x23242)
% 32.24/32.07 [2325]~P2343(x23251)+P2343(x23252)+~E(x23251,x23252)
% 32.24/32.07 [2326]~P481(x23261)+P481(x23262)+~E(x23261,x23262)
% 32.24/32.07 [2327]~P2140(x23271)+P2140(x23272)+~E(x23271,x23272)
% 32.24/32.07 [2328]~P1022(x23281)+P1022(x23282)+~E(x23281,x23282)
% 32.24/32.07 [2329]~P2496(x23291)+P2496(x23292)+~E(x23291,x23292)
% 32.24/32.07 [2330]~P225(x23301)+P225(x23302)+~E(x23301,x23302)
% 32.24/32.07 [2331]~P231(x23311)+P231(x23312)+~E(x23311,x23312)
% 32.24/32.07 [2332]~P246(x23321)+P246(x23322)+~E(x23321,x23322)
% 32.24/32.07 [2333]~P1970(x23331)+P1970(x23332)+~E(x23331,x23332)
% 32.24/32.07 [2334]~P247(x23341)+P247(x23342)+~E(x23341,x23342)
% 32.24/32.07 [2335]~P2297(x23351)+P2297(x23352)+~E(x23351,x23352)
% 32.24/32.07 [2336]~P207(x23361)+P207(x23362)+~E(x23361,x23362)
% 32.24/32.07 [2337]~P208(x23371)+P208(x23372)+~E(x23371,x23372)
% 32.24/32.07 [2338]~P1943(x23381)+P1943(x23382)+~E(x23381,x23382)
% 32.24/32.07 [2339]~P339(x23391)+P339(x23392)+~E(x23391,x23392)
% 32.24/32.07 [2340]~P215(x23401)+P215(x23402)+~E(x23401,x23402)
% 32.24/32.07 [2341]~P210(x23411)+P210(x23412)+~E(x23411,x23412)
% 32.24/32.07 [2342]~P216(x23421)+P216(x23422)+~E(x23421,x23422)
% 32.24/32.07 [2343]~P627(x23431)+P627(x23432)+~E(x23431,x23432)
% 32.24/32.07 [2344]~P185(x23441)+P185(x23442)+~E(x23441,x23442)
% 32.24/32.07 [2345]~P435(x23451)+P435(x23452)+~E(x23451,x23452)
% 32.24/32.07 [2346]~P1113(x23461)+P1113(x23462)+~E(x23461,x23462)
% 32.24/32.07 [2347]~P1853(x23471)+P1853(x23472)+~E(x23471,x23472)
% 32.24/32.07 [2348]~P1450(x23481)+P1450(x23482)+~E(x23481,x23482)
% 32.24/32.07 [2349]P1869(x23492,x23493)+~E(x23491,x23492)+~P1869(x23491,x23493)
% 32.24/32.07 [2350]P1869(x23503,x23502)+~E(x23501,x23502)+~P1869(x23503,x23501)
% 32.24/32.07 [2351]~P1932(x23511)+P1932(x23512)+~E(x23511,x23512)
% 32.24/32.07 [2352]~P539(x23521)+P539(x23522)+~E(x23521,x23522)
% 32.24/32.07 [2353]~P2504(x23531)+P2504(x23532)+~E(x23531,x23532)
% 32.24/32.07 [2354]~P1593(x23541)+P1593(x23542)+~E(x23541,x23542)
% 32.24/32.07 [2355]~P2483(x23551)+P2483(x23552)+~E(x23551,x23552)
% 32.24/32.07 [2356]~P1493(x23561)+P1493(x23562)+~E(x23561,x23562)
% 32.24/32.07 [2357]~P2475(x23571)+P2475(x23572)+~E(x23571,x23572)
% 32.24/32.07 [2358]~P2413(x23581)+P2413(x23582)+~E(x23581,x23582)
% 32.24/32.07 [2359]~P2379(x23591)+P2379(x23592)+~E(x23591,x23592)
% 32.24/32.07 [2360]~P2443(x23601)+P2443(x23602)+~E(x23601,x23602)
% 32.24/32.07 [2361]~P2409(x23611)+P2409(x23612)+~E(x23611,x23612)
% 32.24/32.07 [2362]~P1102(x23621)+P1102(x23622)+~E(x23621,x23622)
% 32.24/32.07 [2363]~P2415(x23631)+P2415(x23632)+~E(x23631,x23632)
% 32.24/32.07 [2364]~P2433(x23641)+P2433(x23642)+~E(x23641,x23642)
% 32.24/32.07 [2365]~P2416(x23651)+P2416(x23652)+~E(x23651,x23652)
% 32.24/32.07 [2366]~P676(x23661)+P676(x23662)+~E(x23661,x23662)
% 32.24/32.07 [2367]~P2171(x23671)+P2171(x23672)+~E(x23671,x23672)
% 32.24/32.07 [2368]~P1754(x23681)+P1754(x23682)+~E(x23681,x23682)
% 32.24/32.07 [2369]~P2203(x23691)+P2203(x23692)+~E(x23691,x23692)
% 32.24/32.07 [2370]~P2283(x23701)+P2283(x23702)+~E(x23701,x23702)
% 32.24/32.07 [2371]~P1991(x23711)+P1991(x23712)+~E(x23711,x23712)
% 32.24/32.07 [2372]~P628(x23721)+P628(x23722)+~E(x23721,x23722)
% 32.24/32.07 [2373]~P2395(x23731)+P2395(x23732)+~E(x23731,x23732)
% 32.24/32.07 [2374]~P401(x23741)+P401(x23742)+~E(x23741,x23742)
% 32.24/32.07 [2375]~P2380(x23751)+P2380(x23752)+~E(x23751,x23752)
% 32.24/32.07 [2376]~P396(x23761)+P396(x23762)+~E(x23761,x23762)
% 32.24/32.07 [2377]~P2281(x23771)+P2281(x23772)+~E(x23771,x23772)
% 32.24/32.07 [2378]~P2287(x23781)+P2287(x23782)+~E(x23781,x23782)
% 32.24/32.07 [2379]~P1840(x23791)+P1840(x23792)+~E(x23791,x23792)
% 32.24/32.07 [2380]~P787(x23801)+P787(x23802)+~E(x23801,x23802)
% 32.24/32.07 [2381]~P2168(x23811)+P2168(x23812)+~E(x23811,x23812)
% 32.24/32.07 [2382]~P1596(x23821)+P1596(x23822)+~E(x23821,x23822)
% 32.24/32.07 [2383]~P1066(x23831)+P1066(x23832)+~E(x23831,x23832)
% 32.24/32.07 [2384]~P2180(x23841)+P2180(x23842)+~E(x23841,x23842)
% 32.24/32.07 [2385]~P2325(x23851)+P2325(x23852)+~E(x23851,x23852)
% 32.24/32.07 [2386]~P1534(x23861)+P1534(x23862)+~E(x23861,x23862)
% 32.24/32.07 [2387]~P2022(x23871)+P2022(x23872)+~E(x23871,x23872)
% 32.24/32.07 [2388]~P324(x23881)+P324(x23882)+~E(x23881,x23882)
% 32.24/32.07 [2389]~P2358(x23891)+P2358(x23892)+~E(x23891,x23892)
% 32.24/32.07 [2390]~P763(x23901)+P763(x23902)+~E(x23901,x23902)
% 32.24/32.07 [2391]~P2359(x23911)+P2359(x23912)+~E(x23911,x23912)
% 32.24/32.07 [2392]~P688(x23921)+P688(x23922)+~E(x23921,x23922)
% 32.24/32.07 [2393]~P2344(x23931)+P2344(x23932)+~E(x23931,x23932)
% 32.24/32.07 [2394]~P2316(x23941)+P2316(x23942)+~E(x23941,x23942)
% 32.24/32.07 [2395]~P502(x23951)+P502(x23952)+~E(x23951,x23952)
% 32.24/32.07 [2396]~P778(x23961)+P778(x23962)+~E(x23961,x23962)
% 32.24/32.07 [2397]~P1798(x23971)+P1798(x23972)+~E(x23971,x23972)
% 32.24/32.07 [2398]~P607(x23981)+P607(x23982)+~E(x23981,x23982)
% 32.24/32.07 [2399]~P1959(x23991)+P1959(x23992)+~E(x23991,x23992)
% 32.24/32.07 [2400]~P1131(x24001)+P1131(x24002)+~E(x24001,x24002)
% 32.24/32.07 [2401]~P2133(x24011)+P2133(x24012)+~E(x24011,x24012)
% 32.24/32.07 [2402]~P1000(x24021)+P1000(x24022)+~E(x24021,x24022)
% 32.24/32.07 [2403]~P2172(x24031)+P2172(x24032)+~E(x24031,x24032)
% 32.24/32.07 [2404]~P232(x24041)+P232(x24042)+~E(x24041,x24042)
% 32.24/32.07 [2405]~P2248(x24051)+P2248(x24052)+~E(x24051,x24052)
% 32.24/32.07 [2406]~P2267(x24061)+P2267(x24062)+~E(x24061,x24062)
% 32.24/32.07 [2407]~P349(x24071)+P349(x24072)+~E(x24071,x24072)
% 32.24/32.07 [2408]~P2208(x24081)+P2208(x24082)+~E(x24081,x24082)
% 32.24/32.07 [2409]~P2209(x24091)+P2209(x24092)+~E(x24091,x24092)
% 32.24/32.07 [2410]~P1945(x24101)+P1945(x24102)+~E(x24101,x24102)
% 32.24/32.07 [2411]~P2216(x24111)+P2216(x24112)+~E(x24111,x24112)
% 32.24/32.07 [2412]~P1582(x24121)+P1582(x24122)+~E(x24121,x24122)
% 32.24/32.07 [2413]~P1135(x24131)+P1135(x24132)+~E(x24131,x24132)
% 32.24/32.07 [2414]~P1973(x24141)+P1973(x24142)+~E(x24141,x24142)
% 32.24/32.07 [2415]~P2218(x24151)+P2218(x24152)+~E(x24151,x24152)
% 32.24/32.07 [2416]~P432(x24161)+P432(x24162)+~E(x24161,x24162)
% 32.24/32.07 [2417]~P2187(x24171)+P2187(x24172)+~E(x24171,x24172)
% 32.24/32.07 [2418]~P163(x24181)+P163(x24182)+~E(x24181,x24182)
% 32.24/32.07 [2419]~P172(x24191)+P172(x24192)+~E(x24191,x24192)
% 32.24/32.07 [2420]~P2137(x24201)+P2137(x24202)+~E(x24201,x24202)
% 32.24/32.07 [2421]~P932(x24211)+P932(x24212)+~E(x24211,x24212)
% 32.24/32.07 [2422]~P1964(x24221)+P1964(x24222)+~E(x24221,x24222)
% 32.24/32.07 [2423]~P1381(x24231)+P1381(x24232)+~E(x24231,x24232)
% 32.24/32.07 [2424]~P2328(x24241)+P2328(x24242)+~E(x24241,x24242)
% 32.24/32.07 [2425]~P2375(x24251)+P2375(x24252)+~E(x24251,x24252)
% 32.24/32.07 [2426]~P1399(x24261)+P1399(x24262)+~E(x24261,x24262)
% 32.24/32.07 [2427]~P1191(x24271)+P1191(x24272)+~E(x24271,x24272)
% 32.24/32.07 [2428]~P1687(x24281)+P1687(x24282)+~E(x24281,x24282)
% 32.24/32.07 [2429]~P1762(x24291)+P1762(x24292)+~E(x24291,x24292)
% 32.24/32.07 [2430]~P1224(x24301)+P1224(x24302)+~E(x24301,x24302)
% 32.24/32.07 [2431]~P1628(x24311)+P1628(x24312)+~E(x24311,x24312)
% 32.24/32.07 [2432]~P2331(x24321)+P2331(x24322)+~E(x24321,x24322)
% 32.24/32.07 [2433]~P610(x24331)+P610(x24332)+~E(x24331,x24332)
% 32.24/32.07 [2434]~P2049(x24341)+P2049(x24342)+~E(x24341,x24342)
% 32.24/32.07 [2435]~P1026(x24351)+P1026(x24352)+~E(x24351,x24352)
% 32.24/32.07 [2436]~P865(x24361)+P865(x24362)+~E(x24361,x24362)
% 32.24/32.07 [2437]~P614(x24371)+P614(x24372)+~E(x24371,x24372)
% 32.24/32.07 [2438]~P531(x24381)+P531(x24382)+~E(x24381,x24382)
% 32.24/32.07 [2439]~P2107(x24391)+P2107(x24392)+~E(x24391,x24392)
% 32.24/32.07 [2440]~P2258(x24401)+P2258(x24402)+~E(x24401,x24402)
% 32.24/32.07 [2441]~P2334(x24411)+P2334(x24412)+~E(x24411,x24412)
% 32.24/32.07 [2442]~P840(x24421)+P840(x24422)+~E(x24421,x24422)
% 32.24/32.07 [2443]~P393(x24431)+P393(x24432)+~E(x24431,x24432)
% 32.24/32.07 [2444]~P2363(x24441)+P2363(x24442)+~E(x24441,x24442)
% 32.24/32.07 [2445]~P1168(x24451)+P1168(x24452)+~E(x24451,x24452)
% 32.24/32.07 [2446]~P394(x24461)+P394(x24462)+~E(x24461,x24462)
% 32.24/32.07 [2447]~P1887(x24471)+P1887(x24472)+~E(x24471,x24472)
% 32.24/32.07 [2448]~P2008(x24481)+P2008(x24482)+~E(x24481,x24482)
% 32.24/32.07 [2449]~P682(x24491)+P682(x24492)+~E(x24491,x24492)
% 32.24/32.07 [2450]~P457(x24501)+P457(x24502)+~E(x24501,x24502)
% 32.24/32.07 [2451]~P1499(x24511)+P1499(x24512)+~E(x24511,x24512)
% 32.24/32.07 [2452]~P2157(x24521)+P2157(x24522)+~E(x24521,x24522)
% 32.24/32.07 [2453]~P2158(x24531)+P2158(x24532)+~E(x24531,x24532)
% 32.24/32.07 [2454]~P2599(x24541)+P2599(x24542)+~E(x24541,x24542)
% 32.24/32.07 [2455]~P2166(x24551)+P2166(x24552)+~E(x24551,x24552)
% 32.24/32.07 [2456]~P2159(x24561)+P2159(x24562)+~E(x24561,x24562)
% 32.24/32.07 [2457]~P2160(x24571)+P2160(x24572)+~E(x24571,x24572)
% 32.24/32.07 [2458]~P2279(x24581)+P2279(x24582)+~E(x24581,x24582)
% 32.24/32.07 [2459]~P1580(x24591)+P1580(x24592)+~E(x24591,x24592)
% 32.24/32.07 [2460]~P2336(x24601)+P2336(x24602)+~E(x24601,x24602)
% 32.24/32.07 [2461]~P290(x24611)+P290(x24612)+~E(x24611,x24612)
% 32.24/32.07 [2462]~P702(x24621)+P702(x24622)+~E(x24621,x24622)
% 32.24/32.07 [2463]~P718(x24631)+P718(x24632)+~E(x24631,x24632)
% 32.24/32.07 [2464]~P2179(x24641)+P2179(x24642)+~E(x24641,x24642)
% 32.24/32.07 [2465]~P491(x24651)+P491(x24652)+~E(x24651,x24652)
% 32.24/32.07 [2466]~P534(x24661)+P534(x24662)+~E(x24661,x24662)
% 32.24/32.07 [2467]~P464(x24671)+P464(x24672)+~E(x24671,x24672)
% 32.24/32.07 [2468]~P2424(x24681)+P2424(x24682)+~E(x24681,x24682)
% 32.24/32.07 [2469]~P1856(x24691)+P1856(x24692)+~E(x24691,x24692)
% 32.24/32.07 [2470]~P2264(x24701)+P2264(x24702)+~E(x24701,x24702)
% 32.24/32.07 [2471]~P212(x24711)+P212(x24712)+~E(x24711,x24712)
% 32.24/32.07 [2472]~P1192(x24721)+P1192(x24722)+~E(x24721,x24722)
% 32.24/32.07 [2473]~P2177(x24731)+P2177(x24732)+~E(x24731,x24732)
% 32.24/32.07 [2474]~P1561(x24741)+P1561(x24742)+~E(x24741,x24742)
% 32.24/32.07 [2475]~P1775(x24751)+P1775(x24752)+~E(x24751,x24752)
% 32.24/32.07 [2476]~P1942(x24761)+P1942(x24762)+~E(x24761,x24762)
% 32.24/32.07 [2477]~P1913(x24771)+P1913(x24772)+~E(x24771,x24772)
% 32.24/32.07 [2478]~P2138(x24781)+P2138(x24782)+~E(x24781,x24782)
% 32.24/32.07 [2479]~P235(x24791)+P235(x24792)+~E(x24791,x24792)
% 32.24/32.07 [2480]~P386(x24801)+P386(x24802)+~E(x24801,x24802)
% 32.24/32.07 [2481]~P2090(x24811)+P2090(x24812)+~E(x24811,x24812)
% 32.24/32.07 [2482]~P2428(x24821)+P2428(x24822)+~E(x24821,x24822)
% 32.24/32.07 [2483]~P2469(x24831)+P2469(x24832)+~E(x24831,x24832)
% 32.24/32.07 [2484]~P488(x24841)+P488(x24842)+~E(x24841,x24842)
% 32.24/32.07 [2485]~P2468(x24851)+P2468(x24852)+~E(x24851,x24852)
% 32.24/32.07 [2486]~P2135(x24861)+P2135(x24862)+~E(x24861,x24862)
% 32.24/32.07 [2487]~P2136(x24871)+P2136(x24872)+~E(x24871,x24872)
% 32.24/32.07 [2488]~P1531(x24881)+P1531(x24882)+~E(x24881,x24882)
% 32.24/32.07 [2489]~P2484(x24891)+P2484(x24892)+~E(x24891,x24892)
% 32.24/32.07 [2490]~P1839(x24901)+P1839(x24902)+~E(x24901,x24902)
% 32.24/32.07 [2491]~P255(x24911)+P255(x24912)+~E(x24911,x24912)
% 32.24/32.07 [2492]~P2362(x24921)+P2362(x24922)+~E(x24921,x24922)
% 32.24/32.07 [2493]~P2411(x24931)+P2411(x24932)+~E(x24931,x24932)
% 32.24/32.07 [2494]~P1402(x24941)+P1402(x24942)+~E(x24941,x24942)
% 32.24/32.07 [2495]~P2564(x24951)+P2564(x24952)+~E(x24951,x24952)
% 32.24/32.07 [2496]~P2410(x24961)+P2410(x24962)+~E(x24961,x24962)
% 32.24/32.07 [2497]~P2565(x24971)+P2565(x24972)+~E(x24971,x24972)
% 32.24/32.07 [2498]~P1859(x24981)+P1859(x24982)+~E(x24981,x24982)
% 32.24/32.07 [2499]~P2420(x24991)+P2420(x24992)+~E(x24991,x24992)
% 32.24/32.07 [2500]~P2121(x25001)+P2121(x25002)+~E(x25001,x25002)
% 32.24/32.07 [2501]~P1688(x25011)+P1688(x25012)+~E(x25011,x25012)
% 32.24/32.07 [2502]~P728(x25021)+P728(x25022)+~E(x25021,x25022)
% 32.24/32.07 [2503]~P1130(x25031)+P1130(x25032)+~E(x25031,x25032)
% 32.24/32.07 [2504]~P590(x25041)+P590(x25042)+~E(x25041,x25042)
% 32.24/32.07 [2505]~P1600(x25051)+P1600(x25052)+~E(x25051,x25052)
% 32.24/32.07 [2506]~P433(x25061)+P433(x25062)+~E(x25061,x25062)
% 32.24/32.07 [2507]~P1770(x25071)+P1770(x25072)+~E(x25071,x25072)
% 32.24/32.07 [2508]~P2105(x25081)+P2105(x25082)+~E(x25081,x25082)
% 32.24/32.07 [2509]~P591(x25091)+P591(x25092)+~E(x25091,x25092)
% 32.24/32.07 [2510]~P2106(x25101)+P2106(x25102)+~E(x25101,x25102)
% 32.24/32.07 [2511]~P1093(x25111)+P1093(x25112)+~E(x25111,x25112)
% 32.24/32.07 [2512]~P958(x25121)+P958(x25122)+~E(x25121,x25122)
% 32.24/32.07 [2513]~P2495(x25131)+P2495(x25132)+~E(x25131,x25132)
% 32.24/32.07 [2514]~P2253(x25141)+P2253(x25142)+~E(x25141,x25142)
% 32.24/32.07 [2515]~P2007(x25151)+P2007(x25152)+~E(x25151,x25152)
% 32.24/32.07 [2516]~P2238(x25161)+P2238(x25162)+~E(x25161,x25162)
% 32.24/32.07 [2517]~P1142(x25171)+P1142(x25172)+~E(x25171,x25172)
% 32.24/32.07 [2518]~P1857(x25181)+P1857(x25182)+~E(x25181,x25182)
% 32.24/32.07 [2519]~P1930(x25191)+P1930(x25192)+~E(x25191,x25192)
% 32.24/32.07 [2520]~P743(x25201)+P743(x25202)+~E(x25201,x25202)
% 32.24/32.07 [2521]~P1901(x25211)+P1901(x25212)+~E(x25211,x25212)
% 32.24/32.07 [2522]~P642(x25221)+P642(x25222)+~E(x25221,x25222)
% 32.24/32.07 [2523]~P1099(x25231)+P1099(x25232)+~E(x25231,x25232)
% 32.24/32.07 [2524]~P643(x25241)+P643(x25242)+~E(x25241,x25242)
% 32.24/32.07 [2525]~P576(x25251)+P576(x25252)+~E(x25251,x25252)
% 32.24/32.07 [2526]~P400(x25261)+P400(x25262)+~E(x25261,x25262)
% 32.24/32.07 [2527]~P179(x25271)+P179(x25272)+~E(x25271,x25272)
% 32.24/32.07 [2528]~P999(x25281)+P999(x25282)+~E(x25281,x25282)
% 32.24/32.07 [2529]~P358(x25291)+P358(x25292)+~E(x25291,x25292)
% 32.24/32.07 [2530]~P227(x25301)+P227(x25302)+~E(x25301,x25302)
% 32.24/32.07 [2531]~P645(x25311)+P645(x25312)+~E(x25311,x25312)
% 32.24/32.07 [2532]~P928(x25321)+P928(x25322)+~E(x25321,x25322)
% 32.24/32.07 [2533]~P2373(x25331)+P2373(x25332)+~E(x25331,x25332)
% 32.24/32.07 [2534]~P2113(x25341)+P2113(x25342)+~E(x25341,x25342)
% 32.24/32.07 [2535]~P1443(x25351)+P1443(x25352)+~E(x25351,x25352)
% 32.24/32.07 [2536]~P2114(x25361)+P2114(x25362)+~E(x25361,x25362)
% 32.24/32.07 [2537]~P251(x25371)+P251(x25372)+~E(x25371,x25372)
% 32.24/32.07 [2538]~P2115(x25381)+P2115(x25382)+~E(x25381,x25382)
% 32.24/32.07 [2539]~P2372(x25391)+P2372(x25392)+~E(x25391,x25392)
% 32.24/32.07 [2540]~P2116(x25401)+P2116(x25402)+~E(x25401,x25402)
% 32.24/32.07 [2541]~P223(x25411)+P223(x25412)+~E(x25411,x25412)
% 32.24/32.07 [2542]~P2108(x25421)+P2108(x25422)+~E(x25421,x25422)
% 32.24/32.07 [2543]~P229(x25431)+P229(x25432)+~E(x25431,x25432)
% 32.24/32.07 [2544]~P2122(x25441)+P2122(x25442)+~E(x25441,x25442)
% 32.24/32.07 [2545]~P1374(x25451)+P1374(x25452)+~E(x25451,x25452)
% 32.24/32.07 [2546]~P1935(x25461)+P1935(x25462)+~E(x25461,x25462)
% 32.24/32.07 [2547]~P2170(x25471)+P2170(x25472)+~E(x25471,x25472)
% 32.24/32.07 [2548]~P2190(x25481)+P2190(x25482)+~E(x25481,x25482)
% 32.24/32.07 [2549]~P1081(x25491)+P1081(x25492)+~E(x25491,x25492)
% 32.24/32.07 [2550]~P1929(x25501)+P1929(x25502)+~E(x25501,x25502)
% 32.24/32.07 [2551]~P1136(x25511)+P1136(x25512)+~E(x25511,x25512)
% 32.24/32.07 [2552]~P744(x25521)+P744(x25522)+~E(x25521,x25522)
% 32.24/32.07 [2553]~P2320(x25531)+P2320(x25532)+~E(x25531,x25532)
% 32.24/32.07 [2554]~P673(x25541)+P673(x25542)+~E(x25541,x25542)
% 32.24/32.07 [2555]~P2118(x25551)+P2118(x25552)+~E(x25551,x25552)
% 32.24/32.07 [2556]~P644(x25561)+P644(x25562)+~E(x25561,x25562)
% 32.24/32.07 [2557]~P1911(x25571)+P1911(x25572)+~E(x25571,x25572)
% 32.24/32.07 [2558]~P2566(x25581)+P2566(x25582)+~E(x25581,x25582)
% 32.24/32.07 [2559]~P1383(x25591)+P1383(x25592)+~E(x25591,x25592)
% 32.24/32.07 [2560]~P369(x25601)+P369(x25602)+~E(x25601,x25602)
% 32.24/32.07 [2561]~P1382(x25611)+P1382(x25612)+~E(x25611,x25612)
% 32.24/32.07 [2562]~P258(x25621)+P258(x25622)+~E(x25621,x25622)
% 32.24/32.07 [2563]~P589(x25631)+P589(x25632)+~E(x25631,x25632)
% 32.24/32.07 [2564]~P2588(x25641)+P2588(x25642)+~E(x25641,x25642)
% 32.24/32.07 [2565]~P2477(x25651)+P2477(x25652)+~E(x25651,x25652)
% 32.24/32.07 [2566]~P275(x25661)+P275(x25662)+~E(x25661,x25662)
% 32.24/32.07 [2567]~P1850(x25671)+P1850(x25672)+~E(x25671,x25672)
% 32.24/32.07 [2568]~P2393(x25681)+P2393(x25682)+~E(x25681,x25682)
% 32.24/32.07 [2569]~P515(x25691)+P515(x25692)+~E(x25691,x25692)
% 32.24/32.07 [2570]~P2298(x25701)+P2298(x25702)+~E(x25701,x25702)
% 32.24/32.07 [2571]~P329(x25711)+P329(x25712)+~E(x25711,x25712)
% 32.24/32.07 [2572]~P1912(x25721)+P1912(x25722)+~E(x25721,x25722)
% 32.24/32.07 [2573]~P2110(x25731)+P2110(x25732)+~E(x25731,x25732)
% 32.24/32.07 [2574]~P669(x25741)+P669(x25742)+~E(x25741,x25742)
% 32.24/32.07 [2575]~P382(x25751)+P382(x25752)+~E(x25751,x25752)
% 32.24/32.07 [2576]~P652(x25761)+P652(x25762)+~E(x25761,x25762)
% 32.24/32.07 [2577]~P2028(x25771)+P2028(x25772)+~E(x25771,x25772)
% 32.24/32.07 [2578]~P646(x25781)+P646(x25782)+~E(x25781,x25782)
% 32.24/32.07 [2579]~P584(x25791)+P584(x25792)+~E(x25791,x25792)
% 32.24/32.07 [2580]~P298(x25801)+P298(x25802)+~E(x25801,x25802)
% 32.24/32.07 [2581]~P585(x25811)+P585(x25812)+~E(x25811,x25812)
% 32.24/32.07 [2582]~P1934(x25821)+P1934(x25822)+~E(x25821,x25822)
% 32.24/32.07 [2583]~P409(x25831)+P409(x25832)+~E(x25831,x25832)
% 32.24/32.07 [2584]~P571(x25841)+P571(x25842)+~E(x25841,x25842)
% 32.24/32.07 [2585]~P550(x25851)+P550(x25852)+~E(x25851,x25852)
% 32.24/32.07 [2586]~P371(x25861)+P371(x25862)+~E(x25861,x25862)
% 32.24/32.07 [2587]~P287(x25871)+P287(x25872)+~E(x25871,x25872)
% 32.24/32.07 [2588]~P2109(x25881)+P2109(x25882)+~E(x25881,x25882)
% 32.24/32.07 [2589]~P2476(x25891)+P2476(x25892)+~E(x25891,x25892)
% 32.24/32.07 [2590]~P1206(x25901)+P1206(x25902)+~E(x25901,x25902)
% 32.24/32.07 [2591]~P178(x25911)+P178(x25912)+~E(x25911,x25912)
% 32.24/32.07 [2592]~P2365(x25921)+P2365(x25922)+~E(x25921,x25922)
% 32.24/32.07 [2593]~P1931(x25931)+P1931(x25932)+~E(x25931,x25932)
% 32.24/32.07 [2594]~P762(x25941)+P762(x25942)+~E(x25941,x25942)
% 32.24/32.07 [2595]~P988(x25951)+P988(x25952)+~E(x25951,x25952)
% 32.24/32.07 [2596]~P289(x25961)+P289(x25962)+~E(x25961,x25962)
% 32.24/32.07 [2597]~P1405(x25971)+P1405(x25972)+~E(x25971,x25972)
% 32.24/32.07 [2598]~P1963(x25981)+P1963(x25982)+~E(x25981,x25982)
% 32.24/32.07 [2599]~P621(x25991)+P621(x25992)+~E(x25991,x25992)
% 32.24/32.07 [2600]~P748(x26001)+P748(x26002)+~E(x26001,x26002)
% 32.24/32.07 [2601]~P994(x26011)+P994(x26012)+~E(x26011,x26012)
% 32.24/32.07 [2602]~P674(x26021)+P674(x26022)+~E(x26021,x26022)
% 32.24/32.07 [2603]~P280(x26031)+P280(x26032)+~E(x26031,x26032)
% 32.24/32.07 [2604]~P661(x26041)+P661(x26042)+~E(x26041,x26042)
% 32.24/32.07 [2605]~P991(x26051)+P991(x26052)+~E(x26051,x26052)
% 32.24/32.07 [2606]~P2167(x26061)+P2167(x26062)+~E(x26061,x26062)
% 32.24/32.07 [2607]~P700(x26071)+P700(x26072)+~E(x26071,x26072)
% 32.24/32.07 [2608]~P1354(x26081)+P1354(x26082)+~E(x26081,x26082)
% 32.24/32.07 [2609]~P493(x26091)+P493(x26092)+~E(x26091,x26092)
% 32.24/32.07 [2610]~P2120(x26101)+P2120(x26102)+~E(x26101,x26102)
% 32.24/32.07 [2611]~P271(x26111)+P271(x26112)+~E(x26111,x26112)
% 32.24/32.07 [2612]~P2493(x26121)+P2493(x26122)+~E(x26121,x26122)
% 32.24/32.07 [2613]~P1638(x26131)+P1638(x26132)+~E(x26131,x26132)
% 32.24/32.07 [2614]~P582(x26141)+P582(x26142)+~E(x26141,x26142)
% 32.24/32.07 [2615]~P1059(x26151)+P1059(x26152)+~E(x26151,x26152)
% 32.24/32.07 [2616]~P1908(x26161)+P1908(x26162)+~E(x26161,x26162)
% 32.24/32.07 [2617]~P1786(x26171)+P1786(x26172)+~E(x26171,x26172)
% 32.24/32.07 [2618]~P745(x26181)+P745(x26182)+~E(x26181,x26182)
% 32.24/32.07 [2619]~P399(x26191)+P399(x26192)+~E(x26191,x26192)
% 32.24/32.07 [2620]~P675(x26201)+P675(x26202)+~E(x26201,x26202)
% 32.24/32.07 [2621]~P1060(x26211)+P1060(x26212)+~E(x26211,x26212)
% 32.24/32.07 [2622]~P653(x26221)+P653(x26222)+~E(x26221,x26222)
% 32.24/32.07 [2623]~P193(x26231)+P193(x26232)+~E(x26231,x26232)
% 32.24/32.07 [2624]~P2339(x26241)+P2339(x26242)+~E(x26241,x26242)
% 32.24/32.07 [2625]~P1865(x26251)+P1865(x26252)+~E(x26251,x26252)
% 32.24/32.07 [2626]~P381(x26261)+P381(x26262)+~E(x26261,x26262)
% 32.24/32.07 [2627]~P2440(x26271)+P2440(x26272)+~E(x26271,x26272)
% 32.24/32.07 [2628]~P338(x26281)+P338(x26282)+~E(x26281,x26282)
% 32.24/32.07 [2629]~P489(x26291)+P489(x26292)+~E(x26291,x26292)
% 32.24/32.07 [2630]~P2111(x26301)+P2111(x26302)+~E(x26301,x26302)
% 32.24/32.07 [2631]~P256(x26311)+P256(x26312)+~E(x26311,x26312)
% 32.24/32.07 [2632]~P2117(x26321)+P2117(x26322)+~E(x26321,x26322)
% 32.24/32.07 [2633]~P274(x26331)+P274(x26332)+~E(x26331,x26332)
% 32.24/32.07 [2634]~P649(x26341)+P649(x26342)+~E(x26341,x26342)
% 32.24/32.07 [2635]~P780(x26351)+P780(x26352)+~E(x26351,x26352)
% 32.24/32.07 [2636]~P583(x26361)+P583(x26362)+~E(x26361,x26362)
% 32.24/32.07 [2637]~P1707(x26371)+P1707(x26372)+~E(x26371,x26372)
% 32.24/32.07 [2638]~P1097(x26381)+P1097(x26382)+~E(x26381,x26382)
% 32.24/32.07 [2639]~P1699(x26391)+P1699(x26392)+~E(x26391,x26392)
% 32.24/32.07 [2640]~P1398(x26401)+P1398(x26402)+~E(x26401,x26402)
% 32.24/32.07 [2641]~P426(x26411)+P426(x26412)+~E(x26411,x26412)
% 32.24/32.07 [2642]~P749(x26421)+P749(x26422)+~E(x26421,x26422)
% 32.24/32.07 [2643]~P1708(x26431)+P1708(x26432)+~E(x26431,x26432)
% 32.24/32.07 [2644]~P385(x26441)+P385(x26442)+~E(x26441,x26442)
% 32.24/32.07 [2645]~P1705(x26451)+P1705(x26452)+~E(x26451,x26452)
% 32.24/32.07 [2646]~P722(x26461)+P722(x26462)+~E(x26461,x26462)
% 32.24/32.07 [2647]~P454(x26471)+P454(x26472)+~E(x26471,x26472)
% 32.24/32.07 [2648]~P411(x26481)+P411(x26482)+~E(x26481,x26482)
% 32.24/32.07 [2649]~P1478(x26491)+P1478(x26492)+~E(x26491,x26492)
% 32.24/32.07 [2650]~P2425(x26501)+P2425(x26502)+~E(x26501,x26502)
% 32.24/32.07 [2651]~P671(x26511)+P671(x26512)+~E(x26511,x26512)
% 32.24/32.07 [2652]~P547(x26521)+P547(x26522)+~E(x26521,x26522)
% 32.24/32.07 [2653]~P439(x26531)+P439(x26532)+~E(x26531,x26532)
% 32.24/32.07 [2654]~P1909(x26541)+P1909(x26542)+~E(x26541,x26542)
% 32.24/32.07 [2655]~P177(x26551)+P177(x26552)+~E(x26551,x26552)
% 32.24/32.07 [2656]~P737(x26561)+P737(x26562)+~E(x26561,x26562)
% 32.24/32.07 [2657]~P428(x26571)+P428(x26572)+~E(x26571,x26572)
% 32.24/32.07 [2658]~P1697(x26581)+P1697(x26582)+~E(x26581,x26582)
% 32.24/32.07 [2659]~P1481(x26591)+P1481(x26592)+~E(x26591,x26592)
% 32.24/32.07 [2660]~P656(x26601)+P656(x26602)+~E(x26601,x26602)
% 32.24/32.07 [2661]~P430(x26611)+P430(x26612)+~E(x26611,x26612)
% 32.24/32.07 [2662]~P403(x26621)+P403(x26622)+~E(x26621,x26622)
% 32.24/32.07 [2663]~P325(x26631)+P325(x26632)+~E(x26631,x26632)
% 32.24/32.07 [2664]~P372(x26641)+P372(x26642)+~E(x26641,x26642)
% 32.24/32.07 [2665]~P492(x26651)+P492(x26652)+~E(x26651,x26652)
% 32.24/32.07 [2666]~P2240(x26661)+P2240(x26662)+~E(x26661,x26662)
% 32.24/32.07 [2667]~P738(x26671)+P738(x26672)+~E(x26671,x26672)
% 32.24/32.07 [2668]~P2368(x26681)+P2368(x26682)+~E(x26681,x26682)
% 32.24/32.07 [2669]~P398(x26691)+P398(x26692)+~E(x26691,x26692)
% 32.24/32.07 [2670]~P2112(x26701)+P2112(x26702)+~E(x26701,x26702)
% 32.24/32.07 [2671]~P414(x26711)+P414(x26712)+~E(x26711,x26712)
% 32.24/32.07 [2672]~P750(x26721)+P750(x26722)+~E(x26721,x26722)
% 32.24/32.07 [2673]~P469(x26731)+P469(x26732)+~E(x26731,x26732)
% 32.24/32.07 [2674]~P662(x26741)+P662(x26742)+~E(x26741,x26742)
% 32.24/32.07 [2675]~P1686(x26751)+P1686(x26752)+~E(x26751,x26752)
% 32.24/32.07 [2676]~P2403(x26761)+P2403(x26762)+~E(x26761,x26762)
% 32.24/32.07 [2677]~P299(x26771)+P299(x26772)+~E(x26771,x26772)
% 32.24/32.07 [2678]~P1851(x26781)+P1851(x26782)+~E(x26781,x26782)
% 32.24/32.07 [2679]~P544(x26791)+P544(x26792)+~E(x26791,x26792)
% 32.24/32.07 [2680]~P615(x26801)+P615(x26802)+~E(x26801,x26802)
% 32.24/32.07 [2681]~P705(x26811)+P705(x26812)+~E(x26811,x26812)
% 32.24/32.07 [2682]~P330(x26821)+P330(x26822)+~E(x26821,x26822)
% 32.24/32.07 [2683]~P664(x26831)+P664(x26832)+~E(x26831,x26832)
% 32.24/32.07 [2684]~P1825(x26841)+P1825(x26842)+~E(x26841,x26842)
% 32.24/32.07 [2685]~P604(x26851)+P604(x26852)+~E(x26851,x26852)
% 32.24/32.07 [2686]~P601(x26861)+P601(x26862)+~E(x26861,x26862)
% 32.24/32.07 [2687]~P490(x26871)+P490(x26872)+~E(x26871,x26872)
% 32.24/32.07 [2688]~P1965(x26881)+P1965(x26882)+~E(x26881,x26882)
% 32.24/32.07 [2689]~P600(x26891)+P600(x26892)+~E(x26891,x26892)
% 32.24/32.07 [2690]~P624(x26901)+P624(x26902)+~E(x26901,x26902)
% 32.24/32.07 [2691]~P1968(x26911)+P1968(x26912)+~E(x26911,x26912)
% 32.24/32.07 [2692]~P694(x26921)+P694(x26922)+~E(x26921,x26922)
% 32.24/32.07 [2693]~P387(x26931)+P387(x26932)+~E(x26931,x26932)
% 32.24/32.07 [2694]~P617(x26941)+P617(x26942)+~E(x26941,x26942)
% 32.24/32.07 [2695]~P373(x26951)+P373(x26952)+~E(x26951,x26952)
% 32.24/32.07 [2696]P2540(x26962,x26963)+~E(x26961,x26962)+~P2540(x26961,x26963)
% 32.24/32.07 [2697]P2540(x26973,x26972)+~E(x26971,x26972)+~P2540(x26973,x26971)
% 32.24/32.07 [2698]~P629(x26981)+P629(x26982)+~E(x26981,x26982)
% 32.24/32.07 [2699]~P596(x26991)+P596(x26992)+~E(x26991,x26992)
% 32.24/32.07 [2700]~P679(x27001)+P679(x27002)+~E(x27001,x27002)
% 32.24/32.07 [2701]~P630(x27011)+P630(x27012)+~E(x27011,x27012)
% 32.24/32.07 [2702]~P1564(x27021)+P1564(x27022)+~E(x27021,x27022)
% 32.24/32.07 [2703]~P657(x27031)+P657(x27032)+~E(x27031,x27032)
% 32.24/32.07 [2704]~P2219(x27041)+P2219(x27042)+~E(x27041,x27042)
% 32.24/32.07 [2705]~P1061(x27051)+P1061(x27052)+~E(x27051,x27052)
% 32.24/32.07 [2706]~P2303(x27061)+P2303(x27062)+~E(x27061,x27062)
% 32.24/32.07 [2707]~P2188(x27071)+P2188(x27072)+~E(x27071,x27072)
% 32.24/32.07 [2708]~P1993(x27081)+P1993(x27082)+~E(x27081,x27082)
% 32.24/32.07 [2709]~P2347(x27091)+P2347(x27092)+~E(x27091,x27092)
% 32.24/32.07 [2710]~P1948(x27101)+P1948(x27102)+~E(x27101,x27102)
% 32.24/32.07 [2711]~P751(x27111)+P751(x27112)+~E(x27111,x27112)
% 32.24/32.07 [2712]P2100(x27122,x27123)+~E(x27121,x27122)+~P2100(x27121,x27123)
% 32.24/32.07 [2713]P2100(x27133,x27132)+~E(x27131,x27132)+~P2100(x27133,x27131)
% 32.24/32.07 [2714]~P620(x27141)+P620(x27142)+~E(x27141,x27142)
% 32.24/32.07 [2715]~P929(x27151)+P929(x27152)+~E(x27151,x27152)
% 32.24/32.07 [2716]~P655(x27161)+P655(x27162)+~E(x27161,x27162)
% 32.24/32.07 [2717]~P1990(x27171)+P1990(x27172)+~E(x27171,x27172)
% 32.24/32.07 [2718]~P625(x27181)+P625(x27182)+~E(x27181,x27182)
% 32.24/32.07 [2719]~P931(x27191)+P931(x27192)+~E(x27191,x27192)
% 32.24/32.07 [2720]~P383(x27201)+P383(x27202)+~E(x27201,x27202)
% 32.24/32.07 [2721]~P2545(x27211)+P2545(x27212)+~E(x27211,x27212)
% 32.24/32.07 [2722]~P1829(x27221)+P1829(x27222)+~E(x27221,x27222)
% 32.24/32.07 [2723]~P2370(x27231)+P2370(x27232)+~E(x27231,x27232)
% 32.24/32.07 [2724]~P1597(x27241)+P1597(x27242)+~E(x27241,x27242)
% 32.24/32.07 [2725]~P2327(x27251)+P2327(x27252)+~E(x27251,x27252)
% 32.24/32.07 [2726]~P1063(x27261)+P1063(x27262)+~E(x27261,x27262)
% 32.24/32.07 [2727]~P985(x27271)+P985(x27272)+~E(x27271,x27272)
% 32.24/32.07 [2728]~P451(x27281)+P451(x27282)+~E(x27281,x27282)
% 32.24/32.07 [2729]~P1995(x27291)+P1995(x27292)+~E(x27291,x27292)
% 32.24/32.07 [2730]~P2201(x27301)+P2201(x27302)+~E(x27301,x27302)
% 32.24/32.07 [2731]~P1651(x27311)+P1651(x27312)+~E(x27311,x27312)
% 32.24/32.07 [2732]~P619(x27321)+P619(x27322)+~E(x27321,x27322)
% 32.24/32.07 [2733]~P2041(x27331)+P2041(x27332)+~E(x27331,x27332)
% 32.24/32.07 [2734]~P2228(x27341)+P2228(x27342)+~E(x27341,x27342)
% 32.24/32.07 [2735]~P739(x27351)+P739(x27352)+~E(x27351,x27352)
% 32.24/32.07 [2736]~P747(x27361)+P747(x27362)+~E(x27361,x27362)
% 32.24/32.07 [2737]~P740(x27371)+P740(x27372)+~E(x27371,x27372)
% 32.24/32.07 [2738]~P2247(x27381)+P2247(x27382)+~E(x27381,x27382)
% 32.24/32.07 [2739]~P2520(x27391)+P2520(x27392)+~E(x27391,x27392)
% 32.24/32.07 [2740]~P717(x27401)+P717(x27402)+~E(x27401,x27402)
% 32.24/32.07 [2741]~P2360(x27411)+P2360(x27412)+~E(x27411,x27412)
% 32.24/32.07 [2742]~P2259(x27421)+P2259(x27422)+~E(x27421,x27422)
% 32.24/32.07 [2743]~P706(x27431)+P706(x27432)+~E(x27431,x27432)
% 32.24/32.07 [2744]~P752(x27441)+P752(x27442)+~E(x27441,x27442)
% 32.24/32.07 [2745]~P416(x27451)+P416(x27452)+~E(x27451,x27452)
% 32.24/32.07 [2746]~P2272(x27461)+P2272(x27462)+~E(x27461,x27462)
% 32.24/32.07 [2747]~P618(x27471)+P618(x27472)+~E(x27471,x27472)
% 32.24/32.07 [2748]~P2436(x27481)+P2436(x27482)+~E(x27481,x27482)
% 32.24/32.07 [2749]~P761(x27491)+P761(x27492)+~E(x27491,x27492)
% 32.24/32.07 [2750]~P2289(x27501)+P2289(x27502)+~E(x27501,x27502)
% 32.24/32.07 [2751]~P760(x27511)+P760(x27512)+~E(x27511,x27512)
% 32.24/32.07 [2752]~P681(x27521)+P681(x27522)+~E(x27521,x27522)
% 32.24/32.07 [2753]~P754(x27531)+P754(x27532)+~E(x27531,x27532)
% 32.24/32.07 [2754]~P2335(x27541)+P2335(x27542)+~E(x27541,x27542)
% 32.24/32.07 [2755]~P1746(x27551)+P1746(x27552)+~E(x27551,x27552)
% 32.24/32.07 [2756]~P773(x27561)+P773(x27562)+~E(x27561,x27562)
% 32.24/32.07 [2757]~P2254(x27571)+P2254(x27572)+~E(x27571,x27572)
% 32.24/32.07 [2758]~P2081(x27581)+P2081(x27582)+~E(x27581,x27582)
% 32.24/32.07 [2759]~P2215(x27591)+P2215(x27592)+~E(x27591,x27592)
% 32.24/32.07 [2760]~P412(x27601)+P412(x27602)+~E(x27601,x27602)
% 32.24/32.07 [2761]~P2355(x27611)+P2355(x27612)+~E(x27611,x27612)
% 32.24/32.07 [2762]~P1440(x27621)+P1440(x27622)+~E(x27621,x27622)
% 32.24/32.07 [2763]~P560(x27631)+P560(x27632)+~E(x27631,x27632)
% 32.24/32.07 [2764]~P2050(x27641)+P2050(x27642)+~E(x27641,x27642)
% 32.24/32.07 [2765]~P783(x27651)+P783(x27652)+~E(x27651,x27652)
% 32.24/32.07 [2766]~P263(x27661)+P263(x27662)+~E(x27661,x27662)
% 32.24/32.07 [2767]~P721(x27671)+P721(x27672)+~E(x27671,x27672)
% 32.24/32.07 [2768]~P249(x27681)+P249(x27682)+~E(x27681,x27682)
% 32.24/32.07 [2769]~P1723(x27691)+P1723(x27692)+~E(x27691,x27692)
% 32.24/32.07 [2770]~P2001(x27701)+P2001(x27702)+~E(x27701,x27702)
% 32.24/32.07 [2771]~P302(x27711)+P302(x27712)+~E(x27711,x27712)
% 32.24/32.07 [2772]~P2419(x27721)+P2419(x27722)+~E(x27721,x27722)
% 32.24/32.07 [2773]~P829(x27731)+P829(x27732)+~E(x27731,x27732)
% 32.24/32.07 [2774]~P2282(x27741)+P2282(x27742)+~E(x27741,x27742)
% 32.24/32.07 [2775]~P832(x27751)+P832(x27752)+~E(x27751,x27752)
% 32.24/32.07 [2776]~P2002(x27761)+P2002(x27762)+~E(x27761,x27762)
% 32.24/32.07 [2777]~P834(x27771)+P834(x27772)+~E(x27771,x27772)
% 32.24/32.07 [2778]~P833(x27781)+P833(x27782)+~E(x27781,x27782)
% 32.24/32.07 [2779]~P828(x27791)+P828(x27792)+~E(x27791,x27792)
% 32.24/32.07 [2780]~P2059(x27801)+P2059(x27802)+~E(x27801,x27802)
% 32.24/32.07 [2781]~P2351(x27811)+P2351(x27812)+~E(x27811,x27812)
% 32.24/32.07 [2782]~P2592(x27821)+P2592(x27822)+~E(x27821,x27822)
% 32.24/32.07 [2783]~P597(x27831)+P597(x27832)+~E(x27831,x27832)
% 32.24/32.07 [2784]~P2392(x27841)+P2392(x27842)+~E(x27841,x27842)
% 32.24/32.07 [2785]~P2361(x27851)+P2361(x27852)+~E(x27851,x27852)
% 32.24/32.07 [2786]~P2585(x27861)+P2585(x27862)+~E(x27861,x27862)
% 32.24/32.07 [2787]~P784(x27871)+P784(x27872)+~E(x27871,x27872)
% 32.24/32.07 [2788]~P690(x27881)+P690(x27882)+~E(x27881,x27882)
% 32.24/32.07 [2789]~P742(x27891)+P742(x27892)+~E(x27891,x27892)
% 32.24/32.07 [2790]~P636(x27901)+P636(x27902)+~E(x27901,x27902)
% 32.24/32.07 [2791]~P1404(x27911)+P1404(x27912)+~E(x27911,x27912)
% 32.24/32.07 [2792]~P2047(x27921)+P2047(x27922)+~E(x27921,x27922)
% 32.24/32.07 [2793]~P693(x27931)+P693(x27932)+~E(x27931,x27932)
% 32.24/32.07 [2794]~P1486(x27941)+P1486(x27942)+~E(x27941,x27942)
% 32.24/32.07 [2795]~P310(x27951)+P310(x27952)+~E(x27951,x27952)
% 32.24/32.07 [2796]~P2030(x27961)+P2030(x27962)+~E(x27961,x27962)
% 32.24/32.07 [2797]~P1967(x27971)+P1967(x27972)+~E(x27971,x27972)
% 32.24/32.07 [2798]~P2031(x27981)+P2031(x27982)+~E(x27981,x27982)
% 32.24/32.07 [2799]~P908(x27991)+P908(x27992)+~E(x27991,x27992)
% 32.24/32.07 [2800]~P2524(x28001)+P2524(x28002)+~E(x28001,x28002)
% 32.24/32.07 [2801]~P909(x28011)+P909(x28012)+~E(x28011,x28012)
% 32.24/32.07 [2802]~P895(x28021)+P895(x28022)+~E(x28021,x28022)
% 32.24/32.07 [2803]~P887(x28031)+P887(x28032)+~E(x28031,x28032)
% 32.24/32.07 [2804]~P1717(x28041)+P1717(x28042)+~E(x28041,x28042)
% 32.24/32.07 [2805]~P712(x28051)+P712(x28052)+~E(x28051,x28052)
% 32.24/32.07 [2806]~P741(x28061)+P741(x28062)+~E(x28061,x28062)
% 32.24/32.07 [2807]~P626(x28071)+P626(x28072)+~E(x28071,x28072)
% 32.24/32.07 [2808]~P2005(x28081)+P2005(x28082)+~E(x28081,x28082)
% 32.24/32.07 [2809]~P219(x28091)+P219(x28092)+~E(x28091,x28092)
% 32.24/32.07 [2810]~P1619(x28101)+P1619(x28102)+~E(x28101,x28102)
% 32.24/32.07 [2811]~P938(x28111)+P938(x28112)+~E(x28111,x28112)
% 32.24/32.07 [2812]~P2032(x28121)+P2032(x28122)+~E(x28121,x28122)
% 32.24/32.07 [2813]~P950(x28131)+P950(x28132)+~E(x28131,x28132)
% 32.24/32.07 [2814]~P939(x28141)+P939(x28142)+~E(x28141,x28142)
% 32.24/32.07 [2815]~P948(x28151)+P948(x28152)+~E(x28151,x28152)
% 32.24/32.07 [2816]~P2033(x28161)+P2033(x28162)+~E(x28161,x28162)
% 32.24/32.07 [2817]~P947(x28171)+P947(x28172)+~E(x28171,x28172)
% 32.24/32.07 [2818]~P949(x28181)+P949(x28182)+~E(x28181,x28182)
% 32.24/32.07 [2819]~P946(x28191)+P946(x28192)+~E(x28191,x28192)
% 32.24/32.07 [2820]~P2034(x28201)+P2034(x28202)+~E(x28201,x28202)
% 32.24/32.07 [2821]~P943(x28211)+P943(x28212)+~E(x28211,x28212)
% 32.24/32.07 [2822]~P944(x28221)+P944(x28222)+~E(x28221,x28222)
% 32.24/32.07 [2823]~P942(x28231)+P942(x28232)+~E(x28231,x28232)
% 32.24/32.07 [2824]~P2035(x28241)+P2035(x28242)+~E(x28241,x28242)
% 32.24/32.07 [2825]~P940(x28251)+P940(x28252)+~E(x28251,x28252)
% 32.24/32.07 [2826]~P941(x28261)+P941(x28262)+~E(x28261,x28262)
% 32.24/32.07 [2827]~P248(x28271)+P248(x28272)+~E(x28271,x28272)
% 32.24/32.07 [2828]~P2036(x28281)+P2036(x28282)+~E(x28281,x28282)
% 32.24/32.07 [2829]~P881(x28291)+P881(x28292)+~E(x28291,x28292)
% 32.24/32.07 [2830]~P882(x28301)+P882(x28302)+~E(x28301,x28302)
% 32.24/32.07 [2831]~P954(x28311)+P954(x28312)+~E(x28311,x28312)
% 32.24/32.07 [2832]~P632(x28321)+P632(x28322)+~E(x28321,x28322)
% 32.24/32.07 [2833]~P2023(x28331)+P2023(x28332)+~E(x28331,x28332)
% 32.24/32.07 [2834]~P967(x28341)+P967(x28342)+~E(x28341,x28342)
% 32.24/32.07 [2835]~P1604(x28351)+P1604(x28352)+~E(x28351,x28352)
% 32.24/32.07 [2836]~P953(x28361)+P953(x28362)+~E(x28361,x28362)
% 32.24/32.07 [2837]~P623(x28371)+P623(x28372)+~E(x28371,x28372)
% 32.24/32.07 [2838]~P1024(x28381)+P1024(x28382)+~E(x28381,x28382)
% 32.24/32.07 [2839]~P2024(x28391)+P2024(x28392)+~E(x28391,x28392)
% 32.24/32.07 [2840]~P316(x28401)+P316(x28402)+~E(x28401,x28402)
% 32.24/32.07 [2841]~P2014(x28411)+P2014(x28412)+~E(x28411,x28412)
% 32.24/32.07 [2842]~P1919(x28421)+P1919(x28422)+~E(x28421,x28422)
% 32.24/32.07 [2843]~P252(x28431)+P252(x28432)+~E(x28431,x28432)
% 32.24/32.07 [2844]~P1709(x28441)+P1709(x28442)+~E(x28441,x28442)
% 32.24/32.07 [2845]~P2025(x28451)+P2025(x28452)+~E(x28451,x28452)
% 32.24/32.07 [2846]~P322(x28461)+P322(x28462)+~E(x28461,x28462)
% 32.24/32.07 [2847]~P2012(x28471)+P2012(x28472)+~E(x28471,x28472)
% 32.24/32.07 [2848]~P977(x28481)+P977(x28482)+~E(x28481,x28482)
% 32.24/32.07 [2849]~P974(x28491)+P974(x28492)+~E(x28491,x28492)
% 32.24/32.07 [2850]~P362(x28501)+P362(x28502)+~E(x28501,x28502)
% 32.24/32.07 [2851]~P2026(x28511)+P2026(x28512)+~E(x28511,x28512)
% 32.24/32.07 [2852]~P972(x28521)+P972(x28522)+~E(x28521,x28522)
% 32.24/32.07 [2853]~P2011(x28531)+P2011(x28532)+~E(x28531,x28532)
% 32.24/32.07 [2854]~P1791(x28541)+P1791(x28542)+~E(x28541,x28542)
% 32.24/32.07 [2855]~P392(x28551)+P392(x28552)+~E(x28551,x28552)
% 32.24/32.07 [2856]~P377(x28561)+P377(x28562)+~E(x28561,x28562)
% 32.24/32.07 [2857]~P1701(x28571)+P1701(x28572)+~E(x28571,x28572)
% 32.24/32.07 [2858]~P1006(x28581)+P1006(x28582)+~E(x28581,x28582)
% 32.24/32.07 [2859]~P2010(x28591)+P2010(x28592)+~E(x28591,x28592)
% 32.24/32.07 [2860]~P658(x28601)+P658(x28602)+~E(x28601,x28602)
% 32.24/32.07 [2861]~P1013(x28611)+P1013(x28612)+~E(x28611,x28612)
% 32.24/32.07 [2862]~P2386(x28621)+P2386(x28622)+~E(x28621,x28622)
% 32.24/32.07 [2863]~P1768(x28631)+P1768(x28632)+~E(x28631,x28632)
% 32.24/32.07 [2864]~P1793(x28641)+P1793(x28642)+~E(x28641,x28642)
% 32.24/32.07 [2865]~P890(x28651)+P890(x28652)+~E(x28651,x28652)
% 32.24/32.07 [2866]~P272(x28661)+P272(x28662)+~E(x28661,x28662)
% 32.24/32.07 [2867]~P236(x28671)+P236(x28672)+~E(x28671,x28672)
% 32.24/32.07 [2868]~P1115(x28681)+P1115(x28682)+~E(x28681,x28682)
% 32.24/32.07 [2869]~P2006(x28691)+P2006(x28692)+~E(x28691,x28692)
% 32.24/32.07 [2870]~P2422(x28701)+P2422(x28702)+~E(x28701,x28702)
% 32.24/32.07 [2871]~P443(x28711)+P443(x28712)+~E(x28711,x28712)
% 32.24/32.07 [2872]~P827(x28721)+P827(x28722)+~E(x28721,x28722)
% 32.24/32.07 [2873]~P1807(x28731)+P1807(x28732)+~E(x28731,x28732)
% 32.24/32.07 [2874]~P835(x28741)+P835(x28742)+~E(x28741,x28742)
% 32.24/32.07 [2875]~P986(x28751)+P986(x28752)+~E(x28751,x28752)
% 32.24/32.07 [2876]P2144(x28762,x28763)+~E(x28761,x28762)+~P2144(x28761,x28763)
% 32.24/32.07 [2877]P2144(x28773,x28772)+~E(x28771,x28772)+~P2144(x28773,x28771)
% 32.24/32.07 [2878]~P574(x28781)+P574(x28782)+~E(x28781,x28782)
% 32.24/32.07 [2879]~P413(x28791)+P413(x28792)+~E(x28791,x28792)
% 32.24/32.07 [2880]~P899(x28801)+P899(x28802)+~E(x28801,x28802)
% 32.24/32.07 [2881]~P1027(x28811)+P1027(x28812)+~E(x28811,x28812)
% 32.24/32.07 [2882]~P578(x28821)+P578(x28822)+~E(x28821,x28822)
% 32.24/32.07 [2883]~P1485(x28831)+P1485(x28832)+~E(x28831,x28832)
% 32.24/32.07 [2884]~P415(x28841)+P415(x28842)+~E(x28841,x28842)
% 32.24/32.07 [2885]~P955(x28851)+P955(x28852)+~E(x28851,x28852)
% 32.24/32.07 [2886]~P1789(x28861)+P1789(x28862)+~E(x28861,x28862)
% 32.24/32.07 [2887]~P1015(x28871)+P1015(x28872)+~E(x28871,x28872)
% 32.24/32.07 [2888]~P2173(x28881)+P2173(x28882)+~E(x28881,x28882)
% 32.24/32.07 [2889]~P989(x28891)+P989(x28892)+~E(x28891,x28892)
% 32.24/32.07 [2890]~P2406(x28901)+P2406(x28902)+~E(x28901,x28902)
% 32.24/32.07 [2891]~P830(x28911)+P830(x28912)+~E(x28911,x28912)
% 32.24/32.07 [2892]~P471(x28921)+P471(x28922)+~E(x28921,x28922)
% 32.24/32.07 [2893]~P1021(x28931)+P1021(x28932)+~E(x28931,x28932)
% 32.24/32.07 [2894]~P1285(x28941)+P1285(x28942)+~E(x28941,x28942)
% 32.24/32.07 [2895]~P176(x28951)+P176(x28952)+~E(x28951,x28952)
% 32.24/32.07 [2896]~P831(x28961)+P831(x28962)+~E(x28961,x28962)
% 32.24/32.07 [2897]~P2434(x28971)+P2434(x28972)+~E(x28971,x28972)
% 32.24/32.07 [2898]~P1083(x28981)+P1083(x28982)+~E(x28981,x28982)
% 32.24/32.07 [2899]~P1448(x28991)+P1448(x28992)+~E(x28991,x28992)
% 32.24/32.07 [2900]~P648(x29001)+P648(x29002)+~E(x29001,x29002)
% 32.24/32.07 [2901]~P2450(x29011)+P2450(x29012)+~E(x29011,x29012)
% 32.24/32.07 [2902]~P1121(x29021)+P1121(x29022)+~E(x29021,x29022)
% 32.24/32.07 [2903]~P1069(x29031)+P1069(x29032)+~E(x29031,x29032)
% 32.24/32.07 [2904]~P1117(x29041)+P1117(x29042)+~E(x29041,x29042)
% 32.24/32.07 [2905]~P2452(x29051)+P2452(x29052)+~E(x29051,x29052)
% 32.24/32.07 [2906]~P1134(x29061)+P1134(x29062)+~E(x29061,x29062)
% 32.24/32.07 [2907]~P1116(x29071)+P1116(x29072)+~E(x29071,x29072)
% 32.24/32.07 [2908]~P1132(x29081)+P1132(x29082)+~E(x29081,x29082)
% 32.24/32.07 [2909]~P2460(x29091)+P2460(x29092)+~E(x29091,x29092)
% 32.24/32.07 [2910]~P211(x29101)+P211(x29102)+~E(x29101,x29102)
% 32.24/32.07 [2911]~P2260(x29111)+P2260(x29112)+~E(x29111,x29112)
% 32.24/32.07 [2912]~P891(x29121)+P891(x29122)+~E(x29121,x29122)
% 32.24/32.07 [2913]~P2488(x29131)+P2488(x29132)+~E(x29131,x29132)
% 32.24/32.07 [2914]~P1051(x29141)+P1051(x29142)+~E(x29141,x29142)
% 32.24/32.07 [2915]~P380(x29151)+P380(x29152)+~E(x29151,x29152)
% 32.24/32.07 [2916]~P1635(x29161)+P1635(x29162)+~E(x29161,x29162)
% 32.24/32.07 [2917]~P907(x29171)+P907(x29172)+~E(x29171,x29172)
% 32.24/32.07 [2918]~P1715(x29181)+P1715(x29182)+~E(x29181,x29182)
% 32.24/32.07 [2919]~P1971(x29191)+P1971(x29192)+~E(x29191,x29192)
% 32.24/32.07 [2920]~P1992(x29201)+P1992(x29202)+~E(x29201,x29202)
% 32.24/32.07 [2921]~P704(x29211)+P704(x29212)+~E(x29211,x29212)
% 32.24/32.07 [2922]~P771(x29221)+P771(x29222)+~E(x29221,x29222)
% 32.24/32.07 [2923]~P2262(x29231)+P2262(x29232)+~E(x29231,x29232)
% 32.24/32.07 [2924]~P1077(x29241)+P1077(x29242)+~E(x29241,x29242)
% 32.24/32.07 [2925]~P1994(x29251)+P1994(x29252)+~E(x29251,x29252)
% 32.24/32.07 [2926]~P680(x29261)+P680(x29262)+~E(x29261,x29262)
% 32.24/32.07 [2927]~P2256(x29271)+P2256(x29272)+~E(x29271,x29272)
% 32.24/32.07 [2928]~P868(x29281)+P868(x29282)+~E(x29281,x29282)
% 32.24/32.07 [2929]~P1864(x29291)+P1864(x29292)+~E(x29291,x29292)
% 32.24/32.07 [2930]~P1352(x29301)+P1352(x29302)+~E(x29301,x29302)
% 32.24/32.07 [2931]~P668(x29311)+P668(x29312)+~E(x29311,x29312)
% 32.24/32.07 [2932]~P764(x29321)+P764(x29322)+~E(x29321,x29322)
% 32.24/32.07 [2933]~P814(x29331)+P814(x29332)+~E(x29331,x29332)
% 32.24/32.07 [2934]~P746(x29341)+P746(x29342)+~E(x29341,x29342)
% 32.24/32.07 [2935]~P1998(x29351)+P1998(x29352)+~E(x29351,x29352)
% 32.24/32.07 [2936]~P1488(x29361)+P1488(x29362)+~E(x29361,x29362)
% 32.24/32.07 [2937]~P1891(x29371)+P1891(x29372)+~E(x29371,x29372)
% 32.24/32.07 [2938]~P1441(x29381)+P1441(x29382)+~E(x29381,x29382)
% 32.24/32.07 [2939]~P1999(x29391)+P1999(x29392)+~E(x29391,x29392)
% 32.24/32.07 [2940]~P1442(x29401)+P1442(x29402)+~E(x29401,x29402)
% 32.24/32.07 [2941]~P1725(x29411)+P1725(x29412)+~E(x29411,x29412)
% 32.24/32.07 [2942]~P1140(x29421)+P1140(x29422)+~E(x29421,x29422)
% 32.24/32.07 [2943]~P1969(x29431)+P1969(x29432)+~E(x29431,x29432)
% 32.24/32.07 [2944]~P1138(x29441)+P1138(x29442)+~E(x29441,x29442)
% 32.24/32.07 [2945]~P1451(x29451)+P1451(x29452)+~E(x29451,x29452)
% 32.24/32.07 [2946]~P317(x29461)+P317(x29462)+~E(x29461,x29462)
% 32.24/32.07 [2947]~P1029(x29471)+P1029(x29472)+~E(x29471,x29472)
% 32.24/32.07 [2948]~P1944(x29481)+P1944(x29482)+~E(x29481,x29482)
% 32.24/32.07 [2949]~P1918(x29491)+P1918(x29492)+~E(x29491,x29492)
% 32.24/32.07 [2950]~P1073(x29501)+P1073(x29502)+~E(x29501,x29502)
% 32.24/32.07 [2951]~P1657(x29511)+P1657(x29512)+~E(x29511,x29512)
% 32.24/32.07 [2952]~P934(x29521)+P934(x29522)+~E(x29521,x29522)
% 32.24/32.07 [2953]P2058(x29532,x29533)+~E(x29531,x29532)+~P2058(x29531,x29533)
% 32.24/32.07 [2954]P2058(x29543,x29542)+~E(x29541,x29542)+~P2058(x29543,x29541)
% 32.24/32.07 [2955]~P1966(x29551)+P1966(x29552)+~E(x29551,x29552)
% 32.24/32.07 [2956]~P951(x29561)+P951(x29562)+~E(x29561,x29562)
% 32.24/32.07 [2957]~P1048(x29571)+P1048(x29572)+~E(x29571,x29572)
% 32.24/32.07 [2958]~P816(x29581)+P816(x29582)+~E(x29581,x29582)
% 32.24/32.07 [2959]~P670(x29591)+P670(x29592)+~E(x29591,x29592)
% 32.24/32.07 [2960]~P2178(x29601)+P2178(x29602)+~E(x29601,x29602)
% 32.24/32.07 [2961]~P195(x29611)+P195(x29612)+~E(x29611,x29612)
% 32.24/32.07 [2962]~P765(x29621)+P765(x29622)+~E(x29621,x29622)
% 32.24/32.07 [2963]~P1072(x29631)+P1072(x29632)+~E(x29631,x29632)
% 32.24/32.07 [2964]~P1594(x29641)+P1594(x29642)+~E(x29641,x29642)
% 32.24/32.07 [2965]~P2239(x29651)+P2239(x29652)+~E(x29651,x29652)
% 32.24/32.07 [2966]~P1584(x29661)+P1584(x29662)+~E(x29661,x29662)
% 32.24/32.07 [2967]~P1681(x29671)+P1681(x29672)+~E(x29671,x29672)
% 32.24/32.07 [2968]~P703(x29681)+P703(x29682)+~E(x29681,x29682)
% 32.24/32.07 [2969]~P301(x29691)+P301(x29692)+~E(x29691,x29692)
% 32.24/32.07 [2970]~P1101(x29701)+P1101(x29702)+~E(x29701,x29702)
% 32.24/32.07 [2971]~P1878(x29711)+P1878(x29712)+~E(x29711,x29712)
% 32.24/32.07 [2972]~P1877(x29721)+P1877(x29722)+~E(x29721,x29722)
% 32.24/32.07 [2973]~P1860(x29731)+P1860(x29732)+~E(x29731,x29732)
% 32.24/32.07 [2974]~P1588(x29741)+P1588(x29742)+~E(x29741,x29742)
% 32.24/32.07 [2975]~P1068(x29751)+P1068(x29752)+~E(x29751,x29752)
% 32.24/32.07 [2976]~P1038(x29761)+P1038(x29762)+~E(x29761,x29762)
% 32.24/32.07 [2977]~P1417(x29771)+P1417(x29772)+~E(x29771,x29772)
% 32.24/32.07 [2978]~P1745(x29781)+P1745(x29782)+~E(x29781,x29782)
% 32.24/32.07 [2979]~P2547(x29791)+P2547(x29792)+~E(x29791,x29792)
% 32.24/32.07 [2980]~P1620(x29801)+P1620(x29802)+~E(x29801,x29802)
% 32.24/32.07 [2981]~P609(x29811)+P609(x29812)+~E(x29811,x29812)
% 32.24/32.07 [2982]~P1557(x29821)+P1557(x29822)+~E(x29821,x29822)
% 32.24/32.07 [2983]~P1953(x29831)+P1953(x29832)+~E(x29831,x29832)
% 32.24/32.07 [2984]~P1475(x29841)+P1475(x29842)+~E(x29841,x29842)
% 32.24/32.07 [2985]~P243(x29851)+P243(x29852)+~E(x29851,x29852)
% 32.24/32.07 [2986]~P1937(x29861)+P1937(x29862)+~E(x29861,x29862)
% 32.24/32.07 [2987]~P692(x29871)+P692(x29872)+~E(x29871,x29872)
% 32.24/32.07 [2988]~P309(x29881)+P309(x29882)+~E(x29881,x29882)
% 32.24/32.07 [2989]~P608(x29891)+P608(x29892)+~E(x29891,x29892)
% 32.24/32.07 [2990]~P459(x29901)+P459(x29902)+~E(x29901,x29902)
% 32.24/32.07 [2991]~P303(x29911)+P303(x29912)+~E(x29911,x29912)
% 32.24/32.07 [2992]~P1489(x29921)+P1489(x29922)+~E(x29921,x29922)
% 32.24/32.07 [2993]~P691(x29931)+P691(x29932)+~E(x29931,x29932)
% 32.24/32.07 [2994]~P2401(x29941)+P2401(x29942)+~E(x29941,x29942)
% 32.24/32.07 [2995]~P666(x29951)+P666(x29952)+~E(x29951,x29952)
% 32.24/32.07 [2996]~P1921(x29961)+P1921(x29962)+~E(x29961,x29962)
% 32.24/32.07 [2997]~P1749(x29971)+P1749(x29972)+~E(x29971,x29972)
% 32.24/32.07 [2998]~P161(x29981)+P161(x29982)+~E(x29981,x29982)
% 32.24/32.07 [2999]~P894(x29991)+P894(x29992)+~E(x29991,x29992)
% 32.24/32.07 [3000]~P699(x30001)+P699(x30002)+~E(x30001,x30002)
% 32.24/32.07 [3001]~P379(x30011)+P379(x30012)+~E(x30011,x30012)
% 32.24/32.07 [3002]~P667(x30021)+P667(x30022)+~E(x30021,x30022)
% 32.24/32.07 [3003]~P575(x30031)+P575(x30032)+~E(x30031,x30032)
% 32.24/32.07 [3004]~P1529(x30041)+P1529(x30042)+~E(x30041,x30042)
% 32.24/32.07 [3005]~P279(x30051)+P279(x30052)+~E(x30051,x30052)
% 32.24/32.07 [3006]~P1721(x30061)+P1721(x30062)+~E(x30061,x30062)
% 32.24/32.07 [3007]~P1098(x30071)+P1098(x30072)+~E(x30071,x30072)
% 32.24/32.07 [3008]~P581(x30081)+P581(x30082)+~E(x30081,x30082)
% 32.24/32.07 [3009]~P893(x30091)+P893(x30092)+~E(x30091,x30092)
% 32.24/32.07 [3010]~P963(x30101)+P963(x30102)+~E(x30101,x30102)
% 32.24/32.07 [3011]~P445(x30111)+P445(x30112)+~E(x30111,x30112)
% 32.24/32.07 [3012]~P1120(x30121)+P1120(x30122)+~E(x30121,x30122)
% 32.24/32.07 [3013]~P736(x30131)+P736(x30132)+~E(x30131,x30132)
% 32.24/32.07 [3014]~P2582(x30141)+P2582(x30142)+~E(x30141,x30142)
% 32.24/32.07 [3015]~P438(x30151)+P438(x30152)+~E(x30151,x30152)
% 32.24/32.07 [3016]~P892(x30161)+P892(x30162)+~E(x30161,x30162)
% 32.24/32.07 [3017]~P2153(x30171)+P2153(x30172)+~E(x30171,x30172)
% 32.24/32.07 [3018]~P2586(x30181)+P2586(x30182)+~E(x30181,x30182)
% 32.24/32.07 [3019]~P1889(x30191)+P1889(x30192)+~E(x30191,x30192)
% 32.24/32.07 [3020]~P1692(x30201)+P1692(x30202)+~E(x30201,x30202)
% 32.24/32.07 [3021]~P785(x30211)+P785(x30212)+~E(x30211,x30212)
% 32.24/32.07 [3022]~P1902(x30221)+P1902(x30222)+~E(x30221,x30222)
% 32.24/32.07 [3023]~P304(x30231)+P304(x30232)+~E(x30231,x30232)
% 32.24/32.07 [3024]~P1039(x30241)+P1039(x30242)+~E(x30241,x30242)
% 32.24/32.07 [3025]~P588(x30251)+P588(x30252)+~E(x30251,x30252)
% 32.24/32.07 [3026]~P696(x30261)+P696(x30262)+~E(x30261,x30262)
% 32.24/32.07 [3027]~P1403(x30271)+P1403(x30272)+~E(x30271,x30272)
% 32.24/32.07 [3028]~P1957(x30281)+P1957(x30282)+~E(x30281,x30282)
% 32.24/32.07 [3029]~P1958(x30291)+P1958(x30292)+~E(x30291,x30292)
% 32.24/32.07 [3030]~P340(x30301)+P340(x30302)+~E(x30301,x30302)
% 32.24/32.07 [3031]~P1447(x30311)+P1447(x30312)+~E(x30311,x30312)
% 32.24/32.07 [3032]~P1630(x30321)+P1630(x30322)+~E(x30321,x30322)
% 32.24/32.07 [3033]~P224(x30331)+P224(x30332)+~E(x30331,x30332)
% 32.24/32.07 [3034]~P1634(x30341)+P1634(x30342)+~E(x30341,x30342)
% 32.24/32.07 [3035]~P175(x30351)+P175(x30352)+~E(x30351,x30352)
% 32.24/32.07 [3036]~P1071(x30361)+P1071(x30362)+~E(x30361,x30362)
% 32.24/32.07 [3037]~P1129(x30371)+P1129(x30372)+~E(x30371,x30372)
% 32.24/32.07 [3038]~P1808(x30381)+P1808(x30382)+~E(x30381,x30382)
% 32.24/32.07 [3039]~P593(x30391)+P593(x30392)+~E(x30391,x30392)
% 32.24/32.07 [3040]~P1397(x30401)+P1397(x30402)+~E(x30401,x30402)
% 32.24/32.07 [3041]~P1870(x30411)+P1870(x30412)+~E(x30411,x30412)
% 32.24/32.07 [3042]~P1922(x30421)+P1922(x30422)+~E(x30421,x30422)
% 32.24/32.07 [3043]~P1480(x30431)+P1480(x30432)+~E(x30431,x30432)
% 32.24/32.07 [3044]~P1569(x30441)+P1569(x30442)+~E(x30441,x30442)
% 32.24/32.07 [3045]~P1453(x30451)+P1453(x30452)+~E(x30451,x30452)
% 32.24/32.07 [3046]~P622(x30461)+P622(x30462)+~E(x30461,x30462)
% 32.24/32.07 [3047]~P1012(x30471)+P1012(x30472)+~E(x30471,x30472)
% 32.24/32.07 [3048]P2446(x30482,x30483)+~E(x30481,x30482)+~P2446(x30481,x30483)
% 32.24/32.07 [3049]P2446(x30493,x30492)+~E(x30491,x30492)+~P2446(x30493,x30491)
% 32.24/32.07 [3050]~P2491(x30501)+P2491(x30502)+~E(x30501,x30502)
% 32.24/32.07 [3051]~P1396(x30511)+P1396(x30512)+~E(x30511,x30512)
% 32.24/32.07 [3052]~P817(x30521)+P817(x30522)+~E(x30521,x30522)
% 32.24/32.07 [3053]~P1466(x30531)+P1466(x30532)+~E(x30531,x30532)
% 32.24/32.07 [3054]P2457(x30542,x30543)+~E(x30541,x30542)+~P2457(x30541,x30543)
% 32.24/32.07 [3055]P2457(x30553,x30552)+~E(x30551,x30552)+~P2457(x30553,x30551)
% 32.24/32.07 [3056]~P1490(x30561)+P1490(x30562)+~E(x30561,x30562)
% 32.24/32.07 [3057]~P2364(x30571)+P2364(x30572)+~E(x30571,x30572)
% 32.24/32.07 [3058]~P2573(x30581)+P2573(x30582)+~E(x30581,x30582)
% 32.24/32.07 [3059]~P1090(x30591)+P1090(x30592)+~E(x30591,x30592)
% 32.24/32.07 [3060]~P323(x30601)+P323(x30602)+~E(x30601,x30602)
% 32.24/32.07 [3061]~P901(x30611)+P901(x30612)+~E(x30611,x30612)
% 32.24/32.07 [3062]~P886(x30621)+P886(x30622)+~E(x30621,x30622)
% 32.24/32.07 [3063]~P2394(x30631)+P2394(x30632)+~E(x30631,x30632)
% 32.24/32.07 [3064]~P1446(x30641)+P1446(x30642)+~E(x30641,x30642)
% 32.24/32.07 [3065]~P314(x30651)+P314(x30652)+~E(x30651,x30652)
% 32.24/32.07 [3066]~P883(x30661)+P883(x30662)+~E(x30661,x30662)
% 32.24/32.07 [3067]~P1126(x30671)+P1126(x30672)+~E(x30671,x30672)
% 32.24/32.07 [3068]~P1642(x30681)+P1642(x30682)+~E(x30681,x30682)
% 32.24/32.07 [3069]~P242(x30691)+P242(x30692)+~E(x30691,x30692)
% 32.24/32.07 [3070]~P1910(x30701)+P1910(x30702)+~E(x30701,x30702)
% 32.24/32.07 [3071]~P1050(x30711)+P1050(x30712)+~E(x30711,x30712)
% 32.24/32.07 [3072]~P1920(x30721)+P1920(x30722)+~E(x30721,x30722)
% 32.24/32.07 [3073]~P1477(x30731)+P1477(x30732)+~E(x30731,x30732)
% 32.24/32.07 [3074]~P1125(x30741)+P1125(x30742)+~E(x30741,x30742)
% 32.24/32.07 [3075]P2459(x30752,x30753)+~E(x30751,x30752)+~P2459(x30751,x30753)
% 32.24/32.07 [3076]P2459(x30763,x30762)+~E(x30761,x30762)+~P2459(x30763,x30761)
% 32.24/32.07 [3077]~P1871(x30771)+P1871(x30772)+~E(x30771,x30772)
% 32.24/32.07 [3078]~P659(x30781)+P659(x30782)+~E(x30781,x30782)
% 32.24/32.07 [3079]~P1007(x30791)+P1007(x30792)+~E(x30791,x30792)
% 32.24/32.07 [3080]~P1779(x30801)+P1779(x30802)+~E(x30801,x30802)
% 32.24/32.07 [3081]~P579(x30811)+P579(x30812)+~E(x30811,x30812)
% 32.24/32.07 [3082]~P1735(x30821)+P1735(x30822)+~E(x30821,x30822)
% 32.24/32.07 [3083]~P1076(x30831)+P1076(x30832)+~E(x30831,x30832)
% 32.24/32.07 [3084]~P1778(x30841)+P1778(x30842)+~E(x30841,x30842)
% 32.24/32.07 [3085]~P1671(x30851)+P1671(x30852)+~E(x30851,x30852)
% 32.24/32.07 [3086]~P305(x30861)+P305(x30862)+~E(x30861,x30862)
% 32.24/32.07 [3087]~P1632(x30871)+P1632(x30872)+~E(x30871,x30872)
% 32.24/32.07 [3088]~P1863(x30881)+P1863(x30882)+~E(x30881,x30882)
% 32.24/32.07 [3089]~P1524(x30891)+P1524(x30892)+~E(x30891,x30892)
% 32.24/32.07 [3090]~P1128(x30901)+P1128(x30902)+~E(x30901,x30902)
% 32.24/32.07 [3091]~P1246(x30911)+P1246(x30912)+~E(x30911,x30912)
% 32.24/32.07 [3092]~P2271(x30921)+P2271(x30922)+~E(x30921,x30922)
% 32.24/32.07 [3093]~P2065(x30931)+P2065(x30932)+~E(x30931,x30932)
% 32.24/32.07 [3094]~P1037(x30941)+P1037(x30942)+~E(x30941,x30942)
% 32.24/32.07 [3095]~P598(x30951)+P598(x30952)+~E(x30951,x30952)
% 32.24/32.07 [3096]~P727(x30961)+P727(x30962)+~E(x30961,x30962)
% 32.24/32.07 [3097]~P1880(x30971)+P1880(x30972)+~E(x30971,x30972)
% 32.24/32.07 [3098]~P2296(x30981)+P2296(x30982)+~E(x30981,x30982)
% 32.24/32.07 [3099]~P1811(x30991)+P1811(x30992)+~E(x30991,x30992)
% 32.24/32.07 [3100]~P900(x31001)+P900(x31002)+~E(x31001,x31002)
% 32.24/32.07 [3101]~P880(x31011)+P880(x31012)+~E(x31011,x31012)
% 32.24/32.07 [3102]~P2423(x31021)+P2423(x31022)+~E(x31021,x31022)
% 32.24/32.07 [3103]~P1092(x31031)+P1092(x31032)+~E(x31031,x31032)
% 32.24/32.07 [3104]~P2233(x31041)+P2233(x31042)+~E(x31041,x31042)
% 32.24/32.07 [3105]~P1668(x31051)+P1668(x31052)+~E(x31051,x31052)
% 32.24/32.07 [3106]~P1667(x31061)+P1667(x31062)+~E(x31061,x31062)
% 32.24/32.07 [3107]~P1788(x31071)+P1788(x31072)+~E(x31071,x31072)
% 32.24/32.07 [3108]~P952(x31081)+P952(x31082)+~E(x31081,x31082)
% 32.24/32.07 [3109]~P1385(x31091)+P1385(x31092)+~E(x31091,x31092)
% 32.24/32.07 [3110]~P2244(x31101)+P2244(x31102)+~E(x31101,x31102)
% 32.24/32.07 [3111]~P1578(x31111)+P1578(x31112)+~E(x31111,x31112)
% 32.24/32.07 [3112]~P1629(x31121)+P1629(x31122)+~E(x31121,x31122)
% 32.24/32.07 [3113]~P1655(x31131)+P1655(x31132)+~E(x31131,x31132)
% 32.24/32.07 [3114]~P2591(x31141)+P2591(x31142)+~E(x31141,x31142)
% 32.24/32.07 [3115]~P897(x31151)+P897(x31152)+~E(x31151,x31152)
% 32.24/32.07 [3116]~P1583(x31161)+P1583(x31162)+~E(x31161,x31162)
% 32.24/32.07 [3117]~P1780(x31171)+P1780(x31172)+~E(x31171,x31172)
% 32.24/32.07 [3118]~P1506(x31181)+P1506(x31182)+~E(x31181,x31182)
% 32.24/32.07 [3119]~P281(x31191)+P281(x31192)+~E(x31191,x31192)
% 32.24/32.07 [3120]~P1852(x31201)+P1852(x31202)+~E(x31201,x31202)
% 32.24/32.07 [3121]~P2227(x31211)+P2227(x31212)+~E(x31211,x31212)
% 32.24/32.07 [3122]~P1736(x31221)+P1736(x31222)+~E(x31221,x31222)
% 32.24/32.07 [3123]~P1082(x31231)+P1082(x31232)+~E(x31231,x31232)
% 32.24/32.07 [3124]~P1663(x31241)+P1663(x31242)+~E(x31241,x31242)
% 32.24/32.07 [3125]~P1075(x31251)+P1075(x31252)+~E(x31251,x31252)
% 32.24/32.07 [3126]~P318(x31261)+P318(x31262)+~E(x31261,x31262)
% 32.24/32.07 [3127]~P1074(x31271)+P1074(x31272)+~E(x31271,x31272)
% 32.24/32.07 [3128]~P1803(x31281)+P1803(x31282)+~E(x31281,x31282)
% 32.24/32.07 [3129]~P1682(x31291)+P1682(x31292)+~E(x31291,x31292)
% 32.24/32.07 [3130]~P885(x31301)+P885(x31302)+~E(x31301,x31302)
% 32.24/32.07 [3131]~P213(x31311)+P213(x31312)+~E(x31311,x31312)
% 32.24/32.07 [3132]~P1003(x31321)+P1003(x31322)+~E(x31321,x31322)
% 32.24/32.07 [3133]~P2470(x31331)+P2470(x31332)+~E(x31331,x31332)
% 32.24/32.07 [3134]~P1677(x31341)+P1677(x31342)+~E(x31341,x31342)
% 32.24/32.07 [3135]~P1812(x31351)+P1812(x31352)+~E(x31351,x31352)
% 32.24/32.07 [3136]~P594(x31361)+P594(x31362)+~E(x31361,x31362)
% 32.24/32.07 [3137]~P2490(x31371)+P2490(x31372)+~E(x31371,x31372)
% 32.24/32.07 [3138]P2467(x31382,x31383)+~E(x31381,x31382)+~P2467(x31381,x31383)
% 32.24/32.07 [3139]P2467(x31393,x31392)+~E(x31391,x31392)+~P2467(x31393,x31391)
% 32.24/32.07 [3140]~P1809(x31401)+P1809(x31402)+~E(x31401,x31402)
% 32.24/32.07 [3141]~P695(x31411)+P695(x31412)+~E(x31411,x31412)
% 32.24/32.07 [3142]~P561(x31421)+P561(x31422)+~E(x31421,x31422)
% 32.24/32.07 [3143]~P606(x31431)+P606(x31432)+~E(x31431,x31432)
% 32.24/32.07 [3144]~P1637(x31441)+P1637(x31442)+~E(x31441,x31442)
% 32.24/32.07 [3145]~P1070(x31451)+P1070(x31452)+~E(x31451,x31452)
% 32.24/32.07 [3146]~P1777(x31461)+P1777(x31462)+~E(x31461,x31462)
% 32.24/32.07 [3147]~P1799(x31471)+P1799(x31472)+~E(x31471,x31472)
% 32.24/32.07 [3148]~P1873(x31481)+P1873(x31482)+~E(x31481,x31482)
% 32.24/32.07 [3149]~P884(x31491)+P884(x31492)+~E(x31491,x31492)
% 32.24/32.07 [3150]~P1849(x31501)+P1849(x31502)+~E(x31501,x31502)
% 32.24/32.07 [3151]~P1848(x31511)+P1848(x31512)+~E(x31511,x31512)
% 32.24/32.07 [3152]~P1456(x31521)+P1456(x31522)+~E(x31521,x31522)
% 32.24/32.07 [3153]~P1753(x31531)+P1753(x31532)+~E(x31531,x31532)
% 32.24/32.07 [3154]~P729(x31541)+P729(x31542)+~E(x31541,x31542)
% 32.24/32.07 [3155]~P1841(x31551)+P1841(x31552)+~E(x31551,x31552)
% 32.24/32.07 [3156]~P1258(x31561)+P1258(x31562)+~E(x31561,x31562)
% 32.24/32.07 [3157]~P1689(x31571)+P1689(x31572)+~E(x31571,x31572)
% 32.24/32.07 [3158]~P1903(x31581)+P1903(x31582)+~E(x31581,x31582)
% 32.24/32.07 [3159]~P1751(x31591)+P1751(x31592)+~E(x31591,x31592)
% 32.24/32.07 [3160]~P1876(x31601)+P1876(x31602)+~E(x31601,x31602)
% 32.24/32.07 [3161]P2130(x31612,x31613)+~E(x31611,x31612)+~P2130(x31611,x31613)
% 32.24/32.07 [3162]P2130(x31623,x31622)+~E(x31621,x31622)+~P2130(x31623,x31621)
% 32.24/32.07 [3163]~P1720(x31631)+P1720(x31632)+~E(x31631,x31632)
% 32.24/32.07 [3164]~P1748(x31641)+P1748(x31642)+~E(x31641,x31642)
% 32.24/32.07 [3165]~P869(x31651)+P869(x31652)+~E(x31651,x31652)
% 32.24/32.07 [3166]~P998(x31661)+P998(x31662)+~E(x31661,x31662)
% 32.24/32.07 [3167]~P1554(x31671)+P1554(x31672)+~E(x31671,x31672)
% 32.24/32.07 [3168]~P1904(x31681)+P1904(x31682)+~E(x31681,x31682)
% 32.24/32.07 [3169]~P2265(x31691)+P2265(x31692)+~E(x31691,x31692)
% 32.24/32.07 [3170]~P1882(x31701)+P1882(x31702)+~E(x31701,x31702)
% 32.24/32.07 [3171]~P1049(x31711)+P1049(x31712)+~E(x31711,x31712)
% 32.24/32.07 [3172]~P1444(x31721)+P1444(x31722)+~E(x31721,x31722)
% 32.24/32.07 [3173]~P1695(x31731)+P1695(x31732)+~E(x31731,x31732)
% 32.24/32.07 [3174]~P1884(x31741)+P1884(x31742)+~E(x31741,x31742)
% 32.24/32.07 [3175]~P1806(x31751)+P1806(x31752)+~E(x31751,x31752)
% 32.24/32.07 [3176]~P956(x31761)+P956(x31762)+~E(x31761,x31762)
% 32.24/32.07 [3177]~P1752(x31771)+P1752(x31772)+~E(x31771,x31772)
% 32.24/32.07 [3178]~P592(x31781)+P592(x31782)+~E(x31781,x31782)
% 32.24/32.07 [3179]~P1813(x31791)+P1813(x31792)+~E(x31791,x31792)
% 32.24/32.07 [3180]~P1761(x31801)+P1761(x31802)+~E(x31801,x31802)
% 32.24/32.07 [3181]~P965(x31811)+P965(x31812)+~E(x31811,x31812)
% 32.24/32.07 [3182]~P896(x31821)+P896(x31822)+~E(x31821,x31822)
% 32.24/32.07 [3183]~P1750(x31831)+P1750(x31832)+~E(x31831,x31832)
% 32.24/32.07 [3184]~P910(x31841)+P910(x31842)+~E(x31841,x31842)
% 32.24/32.07
% 32.24/32.07 %-------------------------------------------
% 32.37/32.08 cnf(18052,plain,
% 32.37/32.08 (P2496(a9)),
% 32.37/32.08 inference(scs_inference,[],[3597,3598,3526,3569,3592,3593,3594,4069,4072,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4091,4092,4093,4094,4103,4104,4105,4106,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732])).
% 32.37/32.08 cnf(18054,plain,
% 32.37/32.08 (P2592(a9)),
% 32.37/32.08 inference(scs_inference,[],[3597,3598,3526,3569,3592,3593,3594,4069,4072,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4091,4092,4093,4094,4103,4104,4105,4106,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719])).
% 32.37/32.08 cnf(18056,plain,
% 32.37/32.08 (P263(a9)),
% 32.37/32.08 inference(scs_inference,[],[3597,3598,3526,3569,3592,3593,3594,4069,4072,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4091,4092,4093,4094,4103,4104,4105,4106,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694])).
% 32.37/32.08 cnf(18058,plain,
% 32.37/32.08 (P1890(a9)),
% 32.37/32.08 inference(scs_inference,[],[3597,3598,3526,3569,3592,3593,3594,4069,4072,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4091,4092,4093,4094,4103,4104,4105,4106,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603])).
% 32.37/32.08 cnf(18062,plain,
% 32.37/32.08 (P2156(x180621)),
% 32.37/32.08 inference(scs_inference,[],[3595,3597,3598,3526,3569,3591,3592,3593,3594,4069,4072,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4091,4092,4093,4094,4103,4104,4105,4106,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528])).
% 32.37/32.08 cnf(18672,plain,
% 32.37/32.08 (P2490(a9)),
% 32.37/32.08 inference(scs_inference,[],[4058,4059,4060,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3329,3333,3337,3339,3345,3347,3351,3353,3357,3359,3360,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3665,3700,3738,3747,3748,3749,3750,3986,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542])).
% 32.37/32.08 cnf(18678,plain,
% 32.37/32.08 (P2586(a9)),
% 32.37/32.08 inference(scs_inference,[],[4058,4059,4060,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3329,3333,3337,3339,3345,3347,3351,3353,3357,3359,3360,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3665,3700,3738,3747,3748,3749,3750,3986,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517])).
% 32.37/32.08 cnf(18688,plain,
% 32.37/32.08 (P256(a9)),
% 32.37/32.08 inference(scs_inference,[],[4058,4059,4060,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3329,3333,3337,3339,3345,3347,3351,3353,3357,3359,3360,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3665,3700,3738,3747,3748,3749,3750,3986,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459])).
% 32.37/32.08 cnf(18710,plain,
% 32.37/32.08 (P889(a9)),
% 32.37/32.08 inference(scs_inference,[],[4058,4059,4060,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3329,3333,3337,3339,3345,3347,3351,3353,3357,3359,3360,3479,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3665,3700,3738,3747,3748,3749,3750,3986,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929])).
% 32.37/32.08 cnf(18720,plain,
% 32.37/32.08 (P1884(a9)),
% 32.37/32.08 inference(scs_inference,[],[4058,4059,4060,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3329,3333,3337,3339,3345,3347,3351,3353,3357,3359,3360,3479,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3665,3700,3738,3747,3748,3749,3750,3986,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252])).
% 32.37/32.08 cnf(18722,plain,
% 32.37/32.08 (P2008(a9)),
% 32.37/32.08 inference(scs_inference,[],[4058,4059,4060,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3329,3333,3337,3339,3345,3347,3351,3353,3357,3359,3360,3371,3479,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3665,3700,3738,3747,3748,3749,3750,3986,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080])).
% 32.37/32.08 cnf(18724,plain,
% 32.37/32.08 (P2006(a9)),
% 32.37/32.08 inference(scs_inference,[],[4058,4059,4060,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3329,3333,3337,3339,3345,3347,3351,3353,3357,3359,3360,3371,3372,3479,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3665,3700,3738,3747,3748,3749,3750,3986,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078])).
% 32.37/32.08 cnf(18726,plain,
% 32.37/32.08 (P2009(a9)),
% 32.37/32.08 inference(scs_inference,[],[4058,4059,4060,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3329,3333,3337,3339,3345,3347,3351,3353,3357,3359,3360,3370,3371,3372,3479,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3665,3700,3738,3747,3748,3749,3750,3986,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076])).
% 32.37/32.08 cnf(18728,plain,
% 32.37/32.08 (P2010(a9)),
% 32.37/32.08 inference(scs_inference,[],[4058,4059,4060,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3329,3333,3337,3339,3345,3347,3351,3353,3357,3359,3360,3369,3370,3371,3372,3479,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3665,3700,3738,3747,3748,3749,3750,3986,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073])).
% 32.37/32.08 cnf(18730,plain,
% 32.37/32.08 (P2011(a9)),
% 32.37/32.08 inference(scs_inference,[],[4058,4059,4060,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3329,3333,3337,3339,3345,3347,3351,3353,3357,3359,3360,3368,3369,3370,3371,3372,3479,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3665,3700,3738,3747,3748,3749,3750,3986,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070])).
% 32.37/32.08 cnf(18732,plain,
% 32.37/32.08 (P2012(a9)),
% 32.37/32.08 inference(scs_inference,[],[4058,4059,4060,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3329,3333,3337,3339,3345,3347,3351,3353,3357,3359,3360,3367,3368,3369,3370,3371,3372,3479,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3665,3700,3738,3747,3748,3749,3750,3986,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067])).
% 32.37/32.08 cnf(18734,plain,
% 32.37/32.08 (P2014(a9)),
% 32.37/32.08 inference(scs_inference,[],[4058,4059,4060,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3329,3333,3337,3339,3345,3347,3351,3353,3357,3359,3360,3366,3367,3368,3369,3370,3371,3372,3479,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3665,3700,3738,3747,3748,3749,3750,3986,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064])).
% 32.37/32.08 cnf(18736,plain,
% 32.37/32.08 (P2015(a9)),
% 32.37/32.08 inference(scs_inference,[],[4058,4059,4060,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3329,3333,3337,3339,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3479,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3665,3700,3738,3747,3748,3749,3750,3986,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061])).
% 32.37/32.08 cnf(18738,plain,
% 32.37/32.08 (P2433(x187381)),
% 32.37/32.08 inference(scs_inference,[],[4058,4059,4060,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3329,3333,3337,3339,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3479,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3665,3700,3738,3747,3748,3749,3750,3986,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824])).
% 32.37/32.08 cnf(18740,plain,
% 32.37/32.08 (P2414(x187401)),
% 32.37/32.08 inference(scs_inference,[],[4058,4059,4060,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3329,3333,3337,3339,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3479,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3665,3700,3738,3747,3748,3749,3750,3986,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823])).
% 32.37/32.08 cnf(18742,plain,
% 32.37/32.08 (P2443(x187421)),
% 32.37/32.08 inference(scs_inference,[],[4058,4059,4060,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3329,3333,3337,3339,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3479,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3665,3700,3738,3747,3748,3749,3750,3986,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822])).
% 32.37/32.08 cnf(18744,plain,
% 32.37/32.08 (P2413(x187441)),
% 32.37/32.08 inference(scs_inference,[],[4058,4059,4060,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3329,3333,3337,3339,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3479,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3665,3700,3738,3747,3748,3749,3750,3986,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821])).
% 32.37/32.08 cnf(18785,plain,
% 32.37/32.08 (~P325(a9)),
% 32.37/32.08 inference(scs_inference,[],[4058,4059,4060,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3665,3685,3694,3700,3701,3738,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399])).
% 32.37/32.08 cnf(18787,plain,
% 32.37/32.08 (~P339(a9)),
% 32.37/32.08 inference(scs_inference,[],[4058,4059,4060,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3665,3685,3694,3700,3701,3738,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398])).
% 32.37/32.08 cnf(18789,plain,
% 32.37/32.08 (~P359(a9)),
% 32.37/32.08 inference(scs_inference,[],[4058,4059,4060,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3665,3685,3694,3700,3701,3738,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397])).
% 32.37/32.08 cnf(18795,plain,
% 32.37/32.08 (~P378(a9)),
% 32.37/32.08 inference(scs_inference,[],[4058,4059,4060,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3665,3685,3694,3700,3701,3738,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394])).
% 32.37/32.08 cnf(18797,plain,
% 32.37/32.08 (~P452(a9)),
% 32.37/32.08 inference(scs_inference,[],[4058,4059,4060,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3665,3685,3694,3700,3701,3738,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385])).
% 32.37/32.08 cnf(18799,plain,
% 32.37/32.08 (~P470(a9)),
% 32.37/32.08 inference(scs_inference,[],[4058,4059,4060,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3665,3685,3694,3700,3701,3738,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382])).
% 32.37/32.08 cnf(18807,plain,
% 32.37/32.08 (~P738(a9)),
% 32.37/32.08 inference(scs_inference,[],[4058,4059,4060,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3665,3685,3694,3700,3701,3738,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306])).
% 32.37/32.08 cnf(18817,plain,
% 32.37/32.08 (~P1047(a9)),
% 32.37/32.08 inference(scs_inference,[],[4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266])).
% 32.37/32.08 cnf(18837,plain,
% 32.37/32.08 (~P1912(a9)),
% 32.37/32.08 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166])).
% 32.37/32.08 cnf(18841,plain,
% 32.37/32.08 (~P2048(a9)),
% 32.37/32.08 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150])).
% 32.37/32.08 cnf(18847,plain,
% 32.37/32.08 (P978(x188471)),
% 32.37/32.08 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820])).
% 32.37/32.08 cnf(18849,plain,
% 32.37/32.08 (P1781(x188491)),
% 32.37/32.08 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816])).
% 32.37/32.08 cnf(18857,plain,
% 32.37/32.08 (~P2148(x188571)),
% 32.37/32.08 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816,6936,9373,9356,8015])).
% 32.37/32.08 cnf(18859,plain,
% 32.37/32.08 (~P2146(a105)),
% 32.37/32.08 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816,6936,9373,9356,8015,6941])).
% 32.37/32.08 cnf(18863,plain,
% 32.37/32.08 (~P1544(a9)),
% 32.37/32.08 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816,6936,9373,9356,8015,6941,6806,6805])).
% 32.37/32.08 cnf(18867,plain,
% 32.37/32.08 (~P2268(a9)),
% 32.37/32.08 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816,6936,9373,9356,8015,6941,6806,6805,6714,6711])).
% 32.37/32.08 cnf(18869,plain,
% 32.37/32.08 (~P2269(a9)),
% 32.37/32.08 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816,6936,9373,9356,8015,6941,6806,6805,6714,6711,6621])).
% 32.37/32.08 cnf(18871,plain,
% 32.37/32.08 (~P2369(a9)),
% 32.37/32.08 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816,6936,9373,9356,8015,6941,6806,6805,6714,6711,6621,6620])).
% 32.37/32.08 cnf(18873,plain,
% 32.37/32.08 (~P2477(a9)),
% 32.37/32.08 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816,6936,9373,9356,8015,6941,6806,6805,6714,6711,6621,6620,6553])).
% 32.37/32.08 cnf(18875,plain,
% 32.37/32.08 (~P2485(a9)),
% 32.37/32.08 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816,6936,9373,9356,8015,6941,6806,6805,6714,6711,6621,6620,6553,6547])).
% 32.37/32.08 cnf(18877,plain,
% 32.37/32.08 (~P2574(a9)),
% 32.37/32.08 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816,6936,9373,9356,8015,6941,6806,6805,6714,6711,6621,6620,6553,6547,6528])).
% 32.37/32.08 cnf(18879,plain,
% 32.37/32.08 (~P2581(a9)),
% 32.37/32.08 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816,6936,9373,9356,8015,6941,6806,6805,6714,6711,6621,6620,6553,6547,6528,6522])).
% 32.37/32.08 cnf(18881,plain,
% 32.37/32.08 (~P243(a9)),
% 32.37/32.08 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816,6936,9373,9356,8015,6941,6806,6805,6714,6711,6621,6620,6553,6547,6528,6522,6476])).
% 32.37/32.08 cnf(18883,plain,
% 32.37/32.08 (~P249(a9)),
% 32.37/32.08 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816,6936,9373,9356,8015,6941,6806,6805,6714,6711,6621,6620,6553,6547,6528,6522,6476,6470])).
% 32.37/32.08 cnf(18885,plain,
% 32.37/32.08 (~P253(a9)),
% 32.37/32.08 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816,6936,9373,9356,8015,6941,6806,6805,6714,6711,6621,6620,6553,6547,6528,6522,6476,6470,6464])).
% 32.37/32.08 cnf(18887,plain,
% 32.37/32.08 (~P532(a9)),
% 32.37/32.08 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816,6936,9373,9356,8015,6941,6806,6805,6714,6711,6621,6620,6553,6547,6528,6522,6476,6470,6464,6307])).
% 32.37/32.08 cnf(18901,plain,
% 32.37/32.08 (~P866(a9)),
% 32.37/32.08 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816,6936,9373,9356,8015,6941,6806,6805,6714,6711,6621,6620,6553,6547,6528,6522,6476,6470,6464,6307,6212,6206,6204,5962,5959,5870,5869])).
% 32.37/32.08 cnf(18909,plain,
% 32.37/32.08 (~P815(a9)),
% 32.37/32.08 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816,6936,9373,9356,8015,6941,6806,6805,6714,6711,6621,6620,6553,6547,6528,6522,6476,6470,6464,6307,6212,6206,6204,5962,5959,5870,5869,5867,5865,5848,5580])).
% 32.37/32.08 cnf(18911,plain,
% 32.37/32.08 (~P1474(a9)),
% 32.37/32.08 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816,6936,9373,9356,8015,6941,6806,6805,6714,6711,6621,6620,6553,6547,6528,6522,6476,6470,6464,6307,6212,6206,6204,5962,5959,5870,5869,5867,5865,5848,5580,5579])).
% 32.37/32.08 cnf(18913,plain,
% 32.37/32.08 (~P964(a9)),
% 32.37/32.09 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816,6936,9373,9356,8015,6941,6806,6805,6714,6711,6621,6620,6553,6547,6528,6522,6476,6470,6464,6307,6212,6206,6204,5962,5959,5870,5869,5867,5865,5848,5580,5579,5368])).
% 32.37/32.09 cnf(18915,plain,
% 32.37/32.09 (~P1770(a9)),
% 32.37/32.09 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816,6936,9373,9356,8015,6941,6806,6805,6714,6711,6621,6620,6553,6547,6528,6522,6476,6470,6464,6307,6212,6206,6204,5962,5959,5870,5869,5867,5865,5848,5580,5579,5368,5367])).
% 32.37/32.09 cnf(18919,plain,
% 32.37/32.09 (~P1871(a9)),
% 32.37/32.09 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816,6936,9373,9356,8015,6941,6806,6805,6714,6711,6621,6620,6553,6547,6528,6522,6476,6470,6464,6307,6212,6206,6204,5962,5959,5870,5869,5867,5865,5848,5580,5579,5368,5367,5342,5269])).
% 32.37/32.09 cnf(18921,plain,
% 32.37/32.09 (~P1877(a9)),
% 32.37/32.09 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816,6936,9373,9356,8015,6941,6806,6805,6714,6711,6621,6620,6553,6547,6528,6522,6476,6470,6464,6307,6212,6206,6204,5962,5959,5870,5869,5867,5865,5848,5580,5579,5368,5367,5342,5269,5263])).
% 32.37/32.09 cnf(18923,plain,
% 32.37/32.09 (~P1881(a9)),
% 32.37/32.09 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816,6936,9373,9356,8015,6941,6806,6805,6714,6711,6621,6620,6553,6547,6528,6522,6476,6470,6464,6307,6212,6206,6204,5962,5959,5870,5869,5867,5865,5848,5580,5579,5368,5367,5342,5269,5263,5257])).
% 32.37/32.09 cnf(18927,plain,
% 32.37/32.09 (~P425(a9)),
% 32.37/32.09 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816,6936,9373,9356,8015,6941,6806,6805,6714,6711,6621,6620,6553,6547,6528,6522,6476,6470,6464,6307,6212,6206,6204,5962,5959,5870,5869,5867,5865,5848,5580,5579,5368,5367,5342,5269,5263,5257,5170,5169])).
% 32.37/32.09 cnf(18929,plain,
% 32.37/32.09 (~P2555(a9)),
% 32.37/32.09 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816,6936,9373,9356,8015,6941,6806,6805,6714,6711,6621,6620,6553,6547,6528,6522,6476,6470,6464,6307,6212,6206,6204,5962,5959,5870,5869,5867,5865,5848,5580,5579,5368,5367,5342,5269,5263,5257,5170,5169,5168])).
% 32.37/32.09 cnf(18931,plain,
% 32.37/32.09 (~P2451(a9)),
% 32.37/32.09 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816,6936,9373,9356,8015,6941,6806,6805,6714,6711,6621,6620,6553,6547,6528,6522,6476,6470,6464,6307,6212,6206,6204,5962,5959,5870,5869,5867,5865,5848,5580,5579,5368,5367,5342,5269,5263,5257,5170,5169,5168,5167])).
% 32.37/32.09 cnf(18933,plain,
% 32.37/32.09 (~P1948(a9)),
% 32.37/32.09 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816,6936,9373,9356,8015,6941,6806,6805,6714,6711,6621,6620,6553,6547,6528,6522,6476,6470,6464,6307,6212,6206,6204,5962,5959,5870,5869,5867,5865,5848,5580,5579,5368,5367,5342,5269,5263,5257,5170,5169,5168,5167,5166])).
% 32.37/32.09 cnf(18935,plain,
% 32.37/32.09 (~P328(a9)),
% 32.37/32.09 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816,6936,9373,9356,8015,6941,6806,6805,6714,6711,6621,6620,6553,6547,6528,6522,6476,6470,6464,6307,6212,6206,6204,5962,5959,5870,5869,5867,5865,5848,5580,5579,5368,5367,5342,5269,5263,5257,5170,5169,5168,5167,5166,5165])).
% 32.37/32.09 cnf(18937,plain,
% 32.37/32.09 (~P1523(a9)),
% 32.37/32.09 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816,6936,9373,9356,8015,6941,6806,6805,6714,6711,6621,6620,6553,6547,6528,6522,6476,6470,6464,6307,6212,6206,6204,5962,5959,5870,5869,5867,5865,5848,5580,5579,5368,5367,5342,5269,5263,5257,5170,5169,5168,5167,5166,5165,5164])).
% 32.37/32.09 cnf(18941,plain,
% 32.37/32.09 (~P2050(a9)),
% 32.37/32.09 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816,6936,9373,9356,8015,6941,6806,6805,6714,6711,6621,6620,6553,6547,6528,6522,6476,6470,6464,6307,6212,6206,6204,5962,5959,5870,5869,5867,5865,5848,5580,5579,5368,5367,5342,5269,5263,5257,5170,5169,5168,5167,5166,5165,5164,5042,5036])).
% 32.37/32.09 cnf(18945,plain,
% 32.37/32.09 (~P2078(a9)),
% 32.37/32.09 inference(scs_inference,[],[4057,4058,4059,4060,4062,4063,4064,4065,4066,4067,4068,3595,3597,3598,4112,4113,4114,4119,4202,4203,4204,4205,3653,3307,3313,3319,3323,3327,3329,3333,3337,3339,3341,3345,3347,3351,3353,3357,3359,3360,3365,3366,3367,3368,3369,3370,3371,3372,3398,3402,3404,3466,3473,3479,3481,3491,3493,3495,3504,3526,3569,3591,3592,3593,3594,3599,3600,3602,3604,3608,3610,3614,3618,3624,3626,3632,3636,3642,3644,3647,3649,3659,3665,3685,3694,3700,3701,3738,3739,3740,3747,3748,3749,3750,3751,3770,3885,3986,3987,4022,4027,4038,4069,4070,4071,4072,4073,4074,4075,4076,4077,4078,4079,4080,4081,4082,4083,4084,4085,4086,4087,4088,4089,4090,4091,4092,4093,4094,4096,4097,4101,4102,4103,4104,4105,4106,4107,4108,4109,4110,4111,15665,15623,15148,15147,15146,15145,11615,11614,11612,11610,11608,11606,11604,11602,11600,11598,11596,11594,11592,11590,11588,11586,11584,11582,11580,11578,11576,11574,11570,11569,11568,11567,11565,11563,11561,11559,11557,11555,11553,11551,11549,11547,11545,11543,11541,11539,11409,11408,11407,11406,11405,11404,11403,11402,11401,11400,11399,11188,11183,11118,11113,11048,11044,11033,10983,10981,10900,10898,10884,10736,10732,10719,10694,9603,9551,9528,9285,9247,9246,9245,9204,9203,9202,9201,8236,8235,8234,8233,8122,8121,8086,8085,8084,8076,8046,8045,8044,8043,8042,8041,8040,8039,8038,8037,8036,8035,8034,8033,8032,8031,8030,8029,8020,8019,8014,8013,8011,8000,7999,7997,7578,7568,7557,7546,7545,7544,7542,7541,7540,7538,7532,7531,7530,7529,7483,7477,7476,7475,7474,7466,6923,6922,6921,6892,6891,6890,6618,6617,6591,6590,6589,6588,6574,6572,6451,6449,6342,6341,6340,6339,6335,6334,6333,6332,6251,6018,6017,5924,5921,5920,5918,5916,5914,5912,5911,5909,5907,5905,5903,5901,5899,5897,5895,5893,5891,5889,5887,5885,5883,5881,5879,5877,5874,5872,5862,5857,5845,5844,5843,5836,5835,5834,5832,5783,5781,5779,5777,5775,5773,5771,5769,5767,5765,5742,5740,5739,5656,5642,5371,5370,5364,5359,5349,5347,5346,5345,5338,5337,5336,5334,5318,5314,5242,5125,5124,5057,5055,5053,5051,5049,5047,4976,4975,4974,4973,4972,4971,4970,4969,4967,4966,4965,4964,4963,4962,4957,4956,4955,4954,4953,4952,4951,4950,4946,4945,4944,4943,4942,4941,4924,4923,4922,4921,4920,4919,4918,4917,4907,4906,4905,4904,4903,4902,4901,4893,4891,4889,4864,4863,4862,4861,4860,4820,4819,4817,4816,4810,4809,4808,4775,4774,4758,4757,4729,4728,4718,4717,4716,4711,4710,4673,631,11391,11253,9487,9486,9485,9484,9473,9472,9471,9420,9419,9418,2,15592,15550,10851,10850,10849,10848,10846,10845,10844,10843,10842,10841,10840,10839,10838,10837,10836,10728,10715,10689,10626,10625,10602,10600,10598,9694,9628,9627,9598,9536,9535,9534,9533,9529,9391,9390,9389,9388,9387,9386,9385,9384,9383,9382,9381,9380,9379,9378,9377,6848,6773,6693,6690,6605,6552,6546,6542,6527,6521,6517,6512,6475,6469,6463,6459,5957,5955,5953,5951,5949,5947,5945,5943,5941,5939,5929,5306,5268,5262,5256,5252,5080,5078,5076,5073,5070,5067,5064,5061,4824,4823,4822,4821,4799,4798,4797,4776,4772,4756,4730,4709,3182,638,627,475,474,458,454,450,448,427,415,333,332,326,260,244,241,74,9,11388,9446,7399,7398,7397,7396,7395,7394,7385,7382,7309,7308,7307,7306,7287,7286,7282,7281,7266,7194,7193,7189,7188,7187,7186,7170,7169,7167,7166,7151,7150,4858,4857,16820,16816,6936,9373,9356,8015,6941,6806,6805,6714,6711,6621,6620,6553,6547,6528,6522,6476,6470,6464,6307,6212,6206,6204,5962,5959,5870,5869,5867,5865,5848,5580,5579,5368,5367,5342,5269,5263,5257,5170,5169,5168,5167,5166,5165,5164,5042,5036,5025,5023])).
% 32.37/32.09 cnf(19227,plain,
% 32.37/32.09 ($false),
% 32.37/32.09 inference(scs_inference,[],[3648,3663,3669,3676,3678,3691,4037,3361,3373,3380,3388,3391,3400,3494,3504,18062,18738,18740,18742,18744,18847,18849,18857,18052,18054,18056,18058,18672,18678,18688,18710,18720,18722,18724,18726,18728,18730,18732,18734,18736,18785,18787,18789,18795,18797,18799,18807,18817,18837,18841,18859,18863,18867,18869,18871,18873,18875,18877,18879,18881,18883,18885,18887,18901,18909,18911,18913,18915,18919,18921,18923,18927,18929,18931,18933,18935,18937,18941,18945,10731,10730,10718,10717,10693,10692,10691,10679,10677,10675,10674,10664,10661,10638,9602,9601,9600,9586,7054,5852,5850,5354,5352,4769,4689,4675,453,330,319,315,307,297,282,16003,15992,15985,15889,15868,15848,15816,15805,15795,15771,15765,15751,15740,15737,15721,15710,15692,15685,11311,11310,11309,11308,11305,11304,11303,11302,11301,11300,11299,11298,11297,11296,11295,11294,11293,11292,11291,11290,11289,11288,11287,11286,11285,11284,11283,11282,11281,11280,11279,11278,11277,11276,11275,11274,11273,11272,11271,11270,11269,11268,11267,11266,11265,11264,11263,11262,11261,11260,11259,11258,11257,11256,11255,11254,7932,7927,7921,7917,7904,7636,7607,7606,7605,7604,7603,7602,7601,7582]),
% 32.37/32.09 ['proof']).
% 32.37/32.09 % SZS output end Proof
% 32.37/32.09 % Total time :28.140000s
%------------------------------------------------------------------------------