TSTP Solution File: SYO078^5 by cvc5---1.0.5

View Problem - Process Solution

%------------------------------------------------------------------------------
% File     : cvc5---1.0.5
% Problem  : SYO078^5 : TPTP v8.2.0. Released v4.0.0.
% Transfm  : none
% Format   : tptp:raw
% Command  : do_cvc5 %s %d

% Computer : n002.cluster.edu
% Model    : x86_64 x86_64
% CPU      : Intel(R) Xeon(R) CPU E5-2620 v4 2.10GHz
% Memory   : 8042.1875MB
% OS       : Linux 3.10.0-693.el7.x86_64
% CPULimit : 300s
% WCLimit  : 300s
% DateTime : Wed May 29 18:30:13 EDT 2024

% Result   : Theorem 0.20s 0.50s
% Output   : Proof 0.20s
% Verified : 
% SZS Type : -

% Comments : 
%------------------------------------------------------------------------------
%----WARNING: Could not form TPTP format derivation
%------------------------------------------------------------------------------
%----ORIGINAL SYSTEM OUTPUT
% 0.02/0.13  % Problem    : SYO078^5 : TPTP v8.2.0. Released v4.0.0.
% 0.02/0.14  % Command    : do_cvc5 %s %d
% 0.14/0.34  % Computer : n002.cluster.edu
% 0.14/0.34  % Model    : x86_64 x86_64
% 0.14/0.34  % CPU      : Intel(R) Xeon(R) CPU E5-2620 v4 @ 2.10GHz
% 0.14/0.34  % Memory   : 8042.1875MB
% 0.14/0.34  % OS       : Linux 3.10.0-693.el7.x86_64
% 0.14/0.34  % CPULimit   : 300
% 0.14/0.34  % WCLimit    : 300
% 0.14/0.34  % DateTime   : Tue May 28 08:04:23 EDT 2024
% 0.14/0.35  % CPUTime    : 
% 0.20/0.48  %----Proving TH0
% 0.20/0.50  --- Run --ho-elim --full-saturate-quant at 10...
% 0.20/0.50  % SZS status Theorem for /export/starexec/sandbox/tmp/tmp.ORkvULITNB/cvc5---1.0.5_22742.smt2
% 0.20/0.50  % SZS output start Proof for /export/starexec/sandbox/tmp/tmp.ORkvULITNB/cvc5---1.0.5_22742.smt2
% 0.20/0.50  (assume a0 (not (or (= tptp.cP tptp.cQ) (= tptp.cQ tptp.cR) (= tptp.cP tptp.cR))))
% 0.20/0.50  (assume a1 true)
% 0.20/0.50  (step t1 (cl (not (= (not (= tptp.cR tptp.cP)) false)) (not (not (= tptp.cR tptp.cP))) false) :rule equiv_pos2)
% 0.20/0.50  (step t2 (cl (and (= tptp.cR (not tptp.cQ)) (= tptp.cP (not tptp.cQ))) (not (= tptp.cR (not tptp.cQ))) (not (= tptp.cP (not tptp.cQ)))) :rule and_neg)
% 0.20/0.50  (step t3 (cl (not (= (not (or (= tptp.cP tptp.cQ) (= tptp.cQ tptp.cR) (= tptp.cP tptp.cR))) (not (or (= tptp.cP tptp.cQ) (= tptp.cR tptp.cQ) (= tptp.cR tptp.cP))))) (not (not (or (= tptp.cP tptp.cQ) (= tptp.cQ tptp.cR) (= tptp.cP tptp.cR)))) (not (or (= tptp.cP tptp.cQ) (= tptp.cR tptp.cQ) (= tptp.cR tptp.cP)))) :rule equiv_pos2)
% 0.20/0.50  (step t4 (cl (= (= tptp.cP tptp.cQ) (= tptp.cP tptp.cQ))) :rule refl)
% 0.20/0.50  (step t5 (cl (= (= tptp.cQ tptp.cR) (= tptp.cR tptp.cQ))) :rule all_simplify)
% 0.20/0.50  (step t6 (cl (= (= tptp.cP tptp.cR) (= tptp.cR tptp.cP))) :rule all_simplify)
% 0.20/0.50  (step t7 (cl (= (or (= tptp.cP tptp.cQ) (= tptp.cQ tptp.cR) (= tptp.cP tptp.cR)) (or (= tptp.cP tptp.cQ) (= tptp.cR tptp.cQ) (= tptp.cR tptp.cP)))) :rule cong :premises (t4 t5 t6))
% 0.20/0.50  (step t8 (cl (= (not (or (= tptp.cP tptp.cQ) (= tptp.cQ tptp.cR) (= tptp.cP tptp.cR))) (not (or (= tptp.cP tptp.cQ) (= tptp.cR tptp.cQ) (= tptp.cR tptp.cP))))) :rule cong :premises (t7))
% 0.20/0.50  (step t9 (cl (not (or (= tptp.cP tptp.cQ) (= tptp.cR tptp.cQ) (= tptp.cR tptp.cP)))) :rule resolution :premises (t3 t8 a0))
% 0.20/0.50  (step t10 (cl (not (= tptp.cR tptp.cQ))) :rule not_or :premises (t9))
% 0.20/0.50  (step t11 (cl (= tptp.cR (not tptp.cQ))) :rule hole :premises (t10) :args ((= tptp.cR (not tptp.cQ))))
% 0.20/0.50  (step t12 (cl (not (= (not (or (= tptp.cP tptp.cQ) (= tptp.cQ tptp.cR) (= tptp.cP tptp.cR))) (not (or (= tptp.cP tptp.cQ) (= tptp.cR tptp.cQ) (= tptp.cR tptp.cP))))) (not (not (or (= tptp.cP tptp.cQ) (= tptp.cQ tptp.cR) (= tptp.cP tptp.cR)))) (not (or (= tptp.cP tptp.cQ) (= tptp.cR tptp.cQ) (= tptp.cR tptp.cP)))) :rule equiv_pos2)
% 0.20/0.50  (step t13 (cl (not (or (= tptp.cP tptp.cQ) (= tptp.cR tptp.cQ) (= tptp.cR tptp.cP)))) :rule resolution :premises (t12 t8 a0))
% 0.20/0.50  (step t14 (cl (not (= tptp.cP tptp.cQ))) :rule not_or :premises (t13))
% 0.20/0.50  (step t15 (cl (= tptp.cP (not tptp.cQ))) :rule hole :premises (t14) :args ((= tptp.cP (not tptp.cQ))))
% 0.20/0.50  (step t16 (cl (and (= tptp.cR (not tptp.cQ)) (= tptp.cP (not tptp.cQ)))) :rule resolution :premises (t2 t11 t15))
% 0.20/0.50  (step t17 (cl (= tptp.cR (not tptp.cQ))) :rule and :premises (t16))
% 0.20/0.50  (step t18 (cl (= tptp.cP (not tptp.cQ))) :rule and :premises (t16))
% 0.20/0.50  (step t19 (cl (= (= tptp.cR tptp.cP) (= (not tptp.cQ) (not tptp.cQ)))) :rule cong :premises (t17 t18))
% 0.20/0.50  (step t20 (cl (= (not (= tptp.cR tptp.cP)) (not (= (not tptp.cQ) (not tptp.cQ))))) :rule cong :premises (t19))
% 0.20/0.50  (step t21 (cl (= (= (not tptp.cQ) (not tptp.cQ)) true)) :rule all_simplify)
% 0.20/0.50  (step t22 (cl (= (not (= (not tptp.cQ) (not tptp.cQ))) (not true))) :rule cong :premises (t21))
% 0.20/0.50  (step t23 (cl (= (not true) false)) :rule all_simplify)
% 0.20/0.50  (step t24 (cl (= (not (= (not tptp.cQ) (not tptp.cQ))) false)) :rule trans :premises (t22 t23))
% 0.20/0.50  (step t25 (cl (= (not (= tptp.cR tptp.cP)) false)) :rule trans :premises (t20 t24))
% 0.20/0.50  (step t26 (cl (not (= (not (or (= tptp.cP tptp.cQ) (= tptp.cQ tptp.cR) (= tptp.cP tptp.cR))) (not (or (= tptp.cP tptp.cQ) (= tptp.cR tptp.cQ) (= tptp.cR tptp.cP))))) (not (not (or (= tptp.cP tptp.cQ) (= tptp.cQ tptp.cR) (= tptp.cP tptp.cR)))) (not (or (= tptp.cP tptp.cQ) (= tptp.cR tptp.cQ) (= tptp.cR tptp.cP)))) :rule equiv_pos2)
% 0.20/0.50  (step t27 (cl (not (or (= tptp.cP tptp.cQ) (= tptp.cR tptp.cQ) (= tptp.cR tptp.cP)))) :rule resolution :premises (t26 t8 a0))
% 0.20/0.50  (step t28 (cl (not (= tptp.cR tptp.cP))) :rule not_or :premises (t27))
% 0.20/0.50  (step t29 (cl false) :rule resolution :premises (t1 t25 t28))
% 0.20/0.50  (step t30 (cl (not false)) :rule false)
% 0.20/0.50  (step t31 (cl) :rule resolution :premises (t29 t30))
% 0.20/0.50  
% 0.20/0.50  % SZS output end Proof for /export/starexec/sandbox/tmp/tmp.ORkvULITNB/cvc5---1.0.5_22742.smt2
% 0.20/0.51  % cvc5---1.0.5 exiting
% 0.20/0.51  % cvc5---1.0.5 exiting
%------------------------------------------------------------------------------