TSTP Solution File: SYN515+1 by Refute---2015
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%------------------------------------------------------------------------------
% File : Refute---2015
% Problem : SYN515+1 : TPTP v6.4.0. Released v2.1.0.
% Transfm : none
% Format : tptp:raw
% Command : isabelle tptp_refute %d %s
% Computer : n121.star.cs.uiowa.edu
% Model : x86_64 x86_64
% CPU : Intel(R) Xeon(R) CPU E5-2609 0 2.40GHz
% Memory : 32218.75MB
% OS : Linux 3.10.0-327.10.1.el7.x86_64
% CPULimit : 300s
% DateTime : Thu Apr 14 06:42:11 EDT 2016
% Result : CounterSatisfiable 16.81s
% Output : Assurance 0s
% Verified :
% SZS Type : None (Parsing solution fails)
% Syntax : Number of formulae : 0
% Comments :
%------------------------------------------------------------------------------
%----No solution output by system
%------------------------------------------------------------------------------
%----ORIGINAL SYSTEM OUTPUT
% 0.00/0.03 % Problem : SYN515+1 : TPTP v6.4.0. Released v2.1.0.
% 0.00/0.04 % Command : isabelle tptp_refute %d %s
% 0.02/0.23 % Computer : n121.star.cs.uiowa.edu
% 0.02/0.23 % Model : x86_64 x86_64
% 0.02/0.23 % CPU : Intel(R) Xeon(R) CPU E5-2609 0 @ 2.40GHz
% 0.02/0.23 % Memory : 32218.75MB
% 0.02/0.23 % OS : Linux 3.10.0-327.10.1.el7.x86_64
% 0.02/0.23 % CPULimit : 300
% 0.02/0.23 % DateTime : Sat Apr 9 00:11:39 CDT 2016
% 0.02/0.23 % CPUTime:
% 6.30/5.83 > val it = (): unit
% 6.59/6.12 Trying to find a model that refutes: ~ ((((((((((((((ALL U.
% 6.59/6.12 bnd_ndr1_0 -->
% 6.59/6.12 (((bnd_ndr1_1 U & ~ bnd_c3_2 U bnd_a1) &
% 6.59/6.12 bnd_c5_2 U bnd_a1) &
% 6.59/6.12 ~ bnd_c1_2 U bnd_a1 |
% 6.59/6.12 (bnd_ndr1_1 U & bnd_c3_2 U bnd_a2) &
% 6.59/6.12 ~ bnd_c5_2 U bnd_a2) |
% 6.59/6.12 ~ bnd_c1_1 U) |
% 6.59/6.12 ~ bnd_c3_0) |
% 6.59/6.12 bnd_c5_0) &
% 6.59/6.12 ((((bnd_ndr1_0 &
% 6.59/6.12 (ALL V.
% 6.59/6.12 bnd_ndr1_1 bnd_a3 -->
% 6.59/6.12 (~ bnd_c5_2 bnd_a3 V | ~ bnd_c1_2 bnd_a3 V) |
% 6.59/6.12 bnd_c3_2 bnd_a3 V)) &
% 6.59/6.12 ~ bnd_c5_1 bnd_a3) &
% 6.59/6.12 ~ bnd_c3_1 bnd_a3 |
% 6.59/6.12 bnd_c1_0) |
% 6.59/6.12 (ALL W.
% 6.59/6.12 bnd_ndr1_0 -->
% 6.59/6.12 (~ bnd_c3_1 W | ~ bnd_c5_1 W) |
% 6.59/6.12 (ALL X.
% 6.59/6.12 bnd_ndr1_1 W -->
% 6.59/6.12 (~ bnd_c5_2 W X | ~ bnd_c3_2 W X) |
% 6.59/6.12 ~ bnd_c4_2 W X)))) &
% 6.59/6.12 ((bnd_c4_0 |
% 6.59/6.12 ((bnd_ndr1_0 &
% 6.59/6.12 (ALL Y.
% 6.59/6.12 bnd_ndr1_1 bnd_a4 -->
% 6.59/6.12 (~ bnd_c4_2 bnd_a4 Y | ~ bnd_c5_2 bnd_a4 Y) |
% 6.59/6.12 bnd_c3_2 bnd_a4 Y)) &
% 6.59/6.12 (ALL Z.
% 6.59/6.12 bnd_ndr1_1 bnd_a4 -->
% 6.59/6.12 bnd_c3_2 bnd_a4 Z | ~ bnd_c2_2 bnd_a4 Z)) &
% 6.59/6.12 (ALL X1.
% 6.59/6.12 bnd_ndr1_1 bnd_a4 -->
% 6.59/6.12 (bnd_c4_2 bnd_a4 X1 | ~ bnd_c3_2 bnd_a4 X1) |
% 6.59/6.12 ~ bnd_c5_2 bnd_a4 X1)) |
% 6.59/6.12 (ALL X2.
% 6.59/6.12 bnd_ndr1_0 -->
% 6.59/6.12 (~ bnd_c3_1 X2 |
% 6.59/6.12 ((bnd_ndr1_1 X2 & ~ bnd_c5_2 X2 bnd_a5) &
% 6.59/6.12 bnd_c4_2 X2 bnd_a5) &
% 6.59/6.12 ~ bnd_c1_2 X2 bnd_a5) |
% 6.59/6.12 ((bnd_ndr1_1 X2 & bnd_c3_2 X2 bnd_a6) &
% 6.59/6.12 bnd_c2_2 X2 bnd_a6) &
% 6.59/6.12 ~ bnd_c5_2 X2 bnd_a6))) &
% 6.59/6.12 ((~ bnd_c4_0 | ~ bnd_c1_0) | bnd_c5_0)) &
% 6.59/6.12 ((~ bnd_c1_0 |
% 6.59/6.12 ((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a7) & ~ bnd_c3_1 bnd_a7) &
% 6.59/6.12 bnd_c4_1 bnd_a7) |
% 6.59/6.12 bnd_c2_0)) &
% 6.59/6.12 (((((((bnd_ndr1_0 & ~ bnd_c3_1 bnd_a8) & bnd_c1_1 bnd_a8) &
% 6.59/6.12 bnd_ndr1_1 bnd_a8) &
% 6.59/6.12 ~ bnd_c2_2 bnd_a8 bnd_a9) &
% 6.59/6.12 bnd_c3_2 bnd_a8 bnd_a9) &
% 6.59/6.12 bnd_c1_2 bnd_a8 bnd_a9 |
% 6.59/6.12 (((((bnd_ndr1_0 & bnd_c5_1 bnd_a10) & bnd_ndr1_1 bnd_a10) &
% 6.59/6.12 bnd_c5_2 bnd_a10 bnd_a11) &
% 6.59/6.12 bnd_c2_2 bnd_a10 bnd_a11) &
% 6.59/6.12 ~ bnd_c1_2 bnd_a10 bnd_a11) &
% 6.59/6.12 bnd_c1_1 bnd_a10) |
% 6.59/6.12 ~ bnd_c4_0)) &
% 6.59/6.12 ((bnd_c4_0 |
% 6.59/6.12 ((bnd_ndr1_0 & bnd_c4_1 bnd_a12) & bnd_c3_1 bnd_a12) &
% 6.59/6.12 ~ bnd_c5_1 bnd_a12) |
% 6.59/6.12 ((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a13) &
% 6.59/6.12 (ALL X3.
% 6.59/6.12 bnd_ndr1_1 bnd_a13 -->
% 6.59/6.12 (bnd_c1_2 bnd_a13 X3 | bnd_c3_2 bnd_a13 X3) |
% 6.59/6.12 ~ bnd_c5_2 bnd_a13 X3)) &
% 6.59/6.12 (ALL X4.
% 6.59/6.12 bnd_ndr1_1 bnd_a13 -->
% 6.59/6.12 bnd_c4_2 bnd_a13 X4 | bnd_c3_2 bnd_a13 X4))) &
% 6.59/6.12 (((ALL X5. bnd_ndr1_0 --> bnd_c2_1 X5 | bnd_c5_1 X5) |
% 6.59/6.12 (((((bnd_ndr1_0 &
% 6.59/6.12 (ALL X6.
% 6.59/6.12 bnd_ndr1_1 bnd_a14 -->
% 6.59/6.12 bnd_c5_2 bnd_a14 X6 | ~ bnd_c3_2 bnd_a14 X6)) &
% 6.59/6.12 bnd_c5_1 bnd_a14) &
% 6.59/6.12 bnd_ndr1_1 bnd_a14) &
% 6.59/6.12 ~ bnd_c3_2 bnd_a14 bnd_a15) &
% 6.59/6.12 bnd_c1_2 bnd_a14 bnd_a15) &
% 6.59/6.12 ~ bnd_c2_2 bnd_a14 bnd_a15) |
% 6.59/6.12 ((bnd_ndr1_0 &
% 6.59/6.12 (ALL X7.
% 6.59/6.12 bnd_ndr1_1 bnd_a16 -->
% 6.59/6.12 (~ bnd_c4_2 bnd_a16 X7 | ~ bnd_c1_2 bnd_a16 X7) |
% 6.59/6.12 ~ bnd_c3_2 bnd_a16 X7)) &
% 6.59/6.12 ~ bnd_c3_1 bnd_a16) &
% 6.59/6.12 ~ bnd_c5_1 bnd_a16)) &
% 6.59/6.12 (((ALL X8.
% 6.59/6.12 bnd_ndr1_0 -->
% 6.59/6.12 (~ bnd_c5_1 X8 | ~ bnd_c2_1 X8) |
% 6.59/6.12 ((bnd_ndr1_1 X8 & bnd_c5_2 X8 bnd_a17) & bnd_c1_2 X8 bnd_a17) &
% 6.59/6.12 ~ bnd_c4_2 X8 bnd_a17) |
% 6.59/6.12 ~ bnd_c5_0) |
% 6.59/6.12 (ALL X9.
% 6.59/6.12 bnd_ndr1_0 -->
% 6.59/6.12 ((bnd_ndr1_1 X9 & bnd_c2_2 X9 bnd_a18) & bnd_c3_2 X9 bnd_a18 |
% 6.59/6.12 bnd_c1_1 X9) |
% 6.59/6.12 (ALL X10.
% 6.59/6.12 bnd_ndr1_1 X9 -->
% 6.59/6.12 (~ bnd_c4_2 X9 X10 | bnd_c3_2 X9 X10) | bnd_c1_2 X9 X10)))) &
% 6.59/6.12 ((~ bnd_c4_0 |
% 6.59/6.12 (ALL X11.
% 6.59/6.12 bnd_ndr1_0 -->
% 6.59/6.12 (~ bnd_c4_1 X11 | ~ bnd_c3_1 X11) | ~ bnd_c2_1 X11)) |
% 6.59/6.12 ((((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a19) & bnd_ndr1_1 bnd_a19) &
% 6.59/6.12 bnd_c3_2 bnd_a19 bnd_a20) &
% 6.59/6.12 ~ bnd_c4_2 bnd_a19 bnd_a20) &
% 6.59/6.12 (ALL X12.
% 6.59/6.12 bnd_ndr1_1 bnd_a19 -->
% 6.59/6.12 ~ bnd_c3_2 bnd_a19 X12 | ~ bnd_c4_2 bnd_a19 X12))) &
% 6.59/6.12 ((~ bnd_c3_0 |
% 6.59/6.12 (ALL X13.
% 6.59/6.12 bnd_ndr1_0 -->
% 6.59/6.12 (~ bnd_c5_1 X13 |
% 6.59/6.12 ((bnd_ndr1_1 X13 & ~ bnd_c1_2 X13 bnd_a21) &
% 6.59/6.12 ~ bnd_c4_2 X13 bnd_a21) &
% 6.59/6.12 bnd_c5_2 X13 bnd_a21) |
% 6.59/6.12 (ALL X14.
% 6.59/6.12 bnd_ndr1_1 X13 -->
% 6.59/6.12 (~ bnd_c2_2 X13 X14 | ~ bnd_c4_2 X13 X14) |
% 6.59/6.12 ~ bnd_c1_2 X13 X14))) |
% 6.59/6.12 bnd_c4_0)) &
% 6.59/6.12 (((ALL X15.
% 6.59/6.12 bnd_ndr1_0 -->
% 6.59/6.12 (((bnd_ndr1_1 X15 & bnd_c4_2 X15 bnd_a22) & bnd_c5_2 X15 bnd_a22) &
% 6.59/6.12 bnd_c2_2 X15 bnd_a22 |
% 6.59/6.12 ((bnd_ndr1_1 X15 & bnd_c2_2 X15 bnd_a23) & bnd_c4_2 X15 bnd_a23) &
% 6.59/6.12 ~ bnd_c5_2 X15 bnd_a23) |
% 6.59/6.12 (ALL X16.
% 6.59/6.12 bnd_ndr1_1 X15 --> bnd_c5_2 X15 X16 | bnd_c4_2 X15 X16)) |
% 6.59/6.12 ((((bnd_ndr1_0 &
% 6.59/6.12 (ALL X17.
% 6.59/6.12 bnd_ndr1_1 bnd_a24 -->
% 6.59/6.12 (~ bnd_c1_2 bnd_a24 X17 | ~ bnd_c2_2 bnd_a24 X17) |
% 6.59/6.12 bnd_c4_2 bnd_a24 X17)) &
% 6.59/6.12 bnd_ndr1_1 bnd_a24) &
% 6.59/6.12 bnd_c1_2 bnd_a24 bnd_a25) &
% 6.59/6.12 bnd_c3_2 bnd_a24 bnd_a25) &
% 6.59/6.12 (ALL X18.
% 6.59/6.12 bnd_ndr1_1 bnd_a24 -->
% 6.59/6.12 (~ bnd_c4_2 bnd_a24 X18 | bnd_c1_2 bnd_a24 X18) |
% 6.59/6.12 ~ bnd_c3_2 bnd_a24 X18)) |
% 6.59/6.12 (bnd_ndr1_0 & ~ bnd_c5_1 bnd_a26) &
% 6.59/6.12 (ALL X19.
% 6.59/6.12 bnd_ndr1_1 bnd_a26 -->
% 6.59/6.12 (bnd_c2_2 bnd_a26 X19 | bnd_c4_2 bnd_a26 X19) |
% 6.59/6.12 ~ bnd_c1_2 bnd_a26 X19)))
% 8.11/7.66 Unfolded term: ~ ((((((((((((((ALL U.
% 8.11/7.66 bnd_ndr1_0 -->
% 8.11/7.66 (((bnd_ndr1_1 U & ~ bnd_c3_2 U bnd_a1) &
% 8.11/7.66 bnd_c5_2 U bnd_a1) &
% 8.11/7.66 ~ bnd_c1_2 U bnd_a1 |
% 8.11/7.66 (bnd_ndr1_1 U & bnd_c3_2 U bnd_a2) &
% 8.11/7.66 ~ bnd_c5_2 U bnd_a2) |
% 8.11/7.66 ~ bnd_c1_1 U) |
% 8.11/7.66 ~ bnd_c3_0) |
% 8.11/7.66 bnd_c5_0) &
% 8.11/7.66 ((((bnd_ndr1_0 &
% 8.11/7.66 (ALL V.
% 8.11/7.66 bnd_ndr1_1 bnd_a3 -->
% 8.11/7.66 (~ bnd_c5_2 bnd_a3 V | ~ bnd_c1_2 bnd_a3 V) |
% 8.11/7.66 bnd_c3_2 bnd_a3 V)) &
% 8.11/7.66 ~ bnd_c5_1 bnd_a3) &
% 8.11/7.66 ~ bnd_c3_1 bnd_a3 |
% 8.11/7.66 bnd_c1_0) |
% 8.11/7.66 (ALL W.
% 8.11/7.66 bnd_ndr1_0 -->
% 8.11/7.66 (~ bnd_c3_1 W | ~ bnd_c5_1 W) |
% 8.11/7.66 (ALL X.
% 8.11/7.66 bnd_ndr1_1 W -->
% 8.11/7.66 (~ bnd_c5_2 W X | ~ bnd_c3_2 W X) |
% 8.11/7.66 ~ bnd_c4_2 W X)))) &
% 8.11/7.66 ((bnd_c4_0 |
% 8.11/7.66 ((bnd_ndr1_0 &
% 8.11/7.66 (ALL Y.
% 8.11/7.66 bnd_ndr1_1 bnd_a4 -->
% 8.11/7.66 (~ bnd_c4_2 bnd_a4 Y | ~ bnd_c5_2 bnd_a4 Y) |
% 8.11/7.66 bnd_c3_2 bnd_a4 Y)) &
% 8.11/7.66 (ALL Z.
% 8.11/7.66 bnd_ndr1_1 bnd_a4 -->
% 8.11/7.66 bnd_c3_2 bnd_a4 Z | ~ bnd_c2_2 bnd_a4 Z)) &
% 8.11/7.66 (ALL X1.
% 8.11/7.66 bnd_ndr1_1 bnd_a4 -->
% 8.11/7.66 (bnd_c4_2 bnd_a4 X1 | ~ bnd_c3_2 bnd_a4 X1) |
% 8.11/7.66 ~ bnd_c5_2 bnd_a4 X1)) |
% 8.11/7.66 (ALL X2.
% 8.11/7.66 bnd_ndr1_0 -->
% 8.11/7.66 (~ bnd_c3_1 X2 |
% 8.11/7.66 ((bnd_ndr1_1 X2 & ~ bnd_c5_2 X2 bnd_a5) &
% 8.11/7.66 bnd_c4_2 X2 bnd_a5) &
% 8.11/7.66 ~ bnd_c1_2 X2 bnd_a5) |
% 8.11/7.66 ((bnd_ndr1_1 X2 & bnd_c3_2 X2 bnd_a6) &
% 8.11/7.66 bnd_c2_2 X2 bnd_a6) &
% 8.11/7.66 ~ bnd_c5_2 X2 bnd_a6))) &
% 8.11/7.66 ((~ bnd_c4_0 | ~ bnd_c1_0) | bnd_c5_0)) &
% 8.11/7.66 ((~ bnd_c1_0 |
% 8.11/7.66 ((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a7) & ~ bnd_c3_1 bnd_a7) &
% 8.11/7.66 bnd_c4_1 bnd_a7) |
% 8.11/7.66 bnd_c2_0)) &
% 8.11/7.66 (((((((bnd_ndr1_0 & ~ bnd_c3_1 bnd_a8) & bnd_c1_1 bnd_a8) &
% 8.11/7.66 bnd_ndr1_1 bnd_a8) &
% 8.11/7.66 ~ bnd_c2_2 bnd_a8 bnd_a9) &
% 8.11/7.66 bnd_c3_2 bnd_a8 bnd_a9) &
% 8.11/7.66 bnd_c1_2 bnd_a8 bnd_a9 |
% 8.11/7.66 (((((bnd_ndr1_0 & bnd_c5_1 bnd_a10) & bnd_ndr1_1 bnd_a10) &
% 8.11/7.66 bnd_c5_2 bnd_a10 bnd_a11) &
% 8.11/7.66 bnd_c2_2 bnd_a10 bnd_a11) &
% 8.11/7.66 ~ bnd_c1_2 bnd_a10 bnd_a11) &
% 8.11/7.66 bnd_c1_1 bnd_a10) |
% 8.11/7.66 ~ bnd_c4_0)) &
% 8.11/7.66 ((bnd_c4_0 |
% 8.11/7.66 ((bnd_ndr1_0 & bnd_c4_1 bnd_a12) & bnd_c3_1 bnd_a12) &
% 8.11/7.66 ~ bnd_c5_1 bnd_a12) |
% 8.11/7.66 ((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a13) &
% 8.11/7.66 (ALL X3.
% 8.11/7.66 bnd_ndr1_1 bnd_a13 -->
% 8.11/7.66 (bnd_c1_2 bnd_a13 X3 | bnd_c3_2 bnd_a13 X3) |
% 8.11/7.66 ~ bnd_c5_2 bnd_a13 X3)) &
% 8.11/7.66 (ALL X4.
% 8.11/7.66 bnd_ndr1_1 bnd_a13 -->
% 8.11/7.66 bnd_c4_2 bnd_a13 X4 | bnd_c3_2 bnd_a13 X4))) &
% 8.11/7.66 (((ALL X5. bnd_ndr1_0 --> bnd_c2_1 X5 | bnd_c5_1 X5) |
% 8.11/7.66 (((((bnd_ndr1_0 &
% 8.11/7.66 (ALL X6.
% 8.11/7.66 bnd_ndr1_1 bnd_a14 -->
% 8.11/7.66 bnd_c5_2 bnd_a14 X6 | ~ bnd_c3_2 bnd_a14 X6)) &
% 8.11/7.66 bnd_c5_1 bnd_a14) &
% 8.11/7.66 bnd_ndr1_1 bnd_a14) &
% 8.11/7.66 ~ bnd_c3_2 bnd_a14 bnd_a15) &
% 8.11/7.66 bnd_c1_2 bnd_a14 bnd_a15) &
% 8.11/7.66 ~ bnd_c2_2 bnd_a14 bnd_a15) |
% 8.11/7.66 ((bnd_ndr1_0 &
% 8.11/7.66 (ALL X7.
% 8.11/7.66 bnd_ndr1_1 bnd_a16 -->
% 8.11/7.66 (~ bnd_c4_2 bnd_a16 X7 | ~ bnd_c1_2 bnd_a16 X7) |
% 8.11/7.66 ~ bnd_c3_2 bnd_a16 X7)) &
% 8.11/7.66 ~ bnd_c3_1 bnd_a16) &
% 8.11/7.66 ~ bnd_c5_1 bnd_a16)) &
% 8.11/7.66 (((ALL X8.
% 8.11/7.66 bnd_ndr1_0 -->
% 8.11/7.66 (~ bnd_c5_1 X8 | ~ bnd_c2_1 X8) |
% 8.11/7.66 ((bnd_ndr1_1 X8 & bnd_c5_2 X8 bnd_a17) & bnd_c1_2 X8 bnd_a17) &
% 8.11/7.66 ~ bnd_c4_2 X8 bnd_a17) |
% 8.11/7.66 ~ bnd_c5_0) |
% 8.11/7.66 (ALL X9.
% 8.11/7.66 bnd_ndr1_0 -->
% 8.11/7.66 ((bnd_ndr1_1 X9 & bnd_c2_2 X9 bnd_a18) & bnd_c3_2 X9 bnd_a18 |
% 8.11/7.66 bnd_c1_1 X9) |
% 8.11/7.66 (ALL X10.
% 8.11/7.66 bnd_ndr1_1 X9 -->
% 8.11/7.66 (~ bnd_c4_2 X9 X10 | bnd_c3_2 X9 X10) | bnd_c1_2 X9 X10)))) &
% 8.11/7.66 ((~ bnd_c4_0 |
% 8.11/7.66 (ALL X11.
% 8.11/7.66 bnd_ndr1_0 -->
% 8.11/7.66 (~ bnd_c4_1 X11 | ~ bnd_c3_1 X11) | ~ bnd_c2_1 X11)) |
% 8.11/7.66 ((((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a19) & bnd_ndr1_1 bnd_a19) &
% 8.11/7.66 bnd_c3_2 bnd_a19 bnd_a20) &
% 8.11/7.66 ~ bnd_c4_2 bnd_a19 bnd_a20) &
% 8.11/7.66 (ALL X12.
% 8.11/7.66 bnd_ndr1_1 bnd_a19 -->
% 8.11/7.66 ~ bnd_c3_2 bnd_a19 X12 | ~ bnd_c4_2 bnd_a19 X12))) &
% 8.11/7.66 ((~ bnd_c3_0 |
% 8.11/7.66 (ALL X13.
% 8.11/7.66 bnd_ndr1_0 -->
% 8.11/7.66 (~ bnd_c5_1 X13 |
% 8.11/7.66 ((bnd_ndr1_1 X13 & ~ bnd_c1_2 X13 bnd_a21) &
% 8.11/7.66 ~ bnd_c4_2 X13 bnd_a21) &
% 8.11/7.66 bnd_c5_2 X13 bnd_a21) |
% 8.11/7.66 (ALL X14.
% 8.11/7.66 bnd_ndr1_1 X13 -->
% 8.11/7.66 (~ bnd_c2_2 X13 X14 | ~ bnd_c4_2 X13 X14) |
% 8.11/7.66 ~ bnd_c1_2 X13 X14))) |
% 8.11/7.66 bnd_c4_0)) &
% 8.11/7.66 (((ALL X15.
% 8.11/7.66 bnd_ndr1_0 -->
% 8.11/7.66 (((bnd_ndr1_1 X15 & bnd_c4_2 X15 bnd_a22) & bnd_c5_2 X15 bnd_a22) &
% 8.11/7.66 bnd_c2_2 X15 bnd_a22 |
% 8.11/7.66 ((bnd_ndr1_1 X15 & bnd_c2_2 X15 bnd_a23) & bnd_c4_2 X15 bnd_a23) &
% 8.11/7.66 ~ bnd_c5_2 X15 bnd_a23) |
% 8.11/7.66 (ALL X16.
% 8.11/7.66 bnd_ndr1_1 X15 --> bnd_c5_2 X15 X16 | bnd_c4_2 X15 X16)) |
% 8.11/7.66 ((((bnd_ndr1_0 &
% 8.11/7.66 (ALL X17.
% 8.11/7.66 bnd_ndr1_1 bnd_a24 -->
% 8.11/7.66 (~ bnd_c1_2 bnd_a24 X17 | ~ bnd_c2_2 bnd_a24 X17) |
% 8.11/7.66 bnd_c4_2 bnd_a24 X17)) &
% 8.11/7.66 bnd_ndr1_1 bnd_a24) &
% 8.11/7.66 bnd_c1_2 bnd_a24 bnd_a25) &
% 8.11/7.66 bnd_c3_2 bnd_a24 bnd_a25) &
% 8.11/7.66 (ALL X18.
% 8.11/7.66 bnd_ndr1_1 bnd_a24 -->
% 8.11/7.66 (~ bnd_c4_2 bnd_a24 X18 | bnd_c1_2 bnd_a24 X18) |
% 8.11/7.66 ~ bnd_c3_2 bnd_a24 X18)) |
% 8.11/7.66 (bnd_ndr1_0 & ~ bnd_c5_1 bnd_a26) &
% 8.11/7.66 (ALL X19.
% 8.11/7.66 bnd_ndr1_1 bnd_a26 -->
% 8.11/7.66 (bnd_c2_2 bnd_a26 X19 | bnd_c4_2 bnd_a26 X19) |
% 8.11/7.66 ~ bnd_c1_2 bnd_a26 X19)))
% 8.11/7.66 Adding axioms...
% 8.11/7.66 Typedef.type_definition_def
% 12.91/12.40 ...done.
% 12.91/12.41 Ground types: ?'b, TPTP_Interpret.ind
% 12.91/12.41 Translating term (sizes: 1, 1) ...
% 16.71/16.24 Invoking SAT solver...
% 16.81/16.38 Model found:
% 16.81/16.38 Size of types: ?'b: 1, TPTP_Interpret.ind: 1
% 16.81/16.38 bnd_a26: ??.TPTP_Interpret.ind0
% 16.81/16.38 bnd_a25: ??.TPTP_Interpret.ind0
% 16.81/16.38 bnd_a24: ??.TPTP_Interpret.ind0
% 16.81/16.38 bnd_a23: ??.TPTP_Interpret.ind0
% 16.81/16.38 bnd_a22: ??.TPTP_Interpret.ind0
% 16.81/16.38 bnd_a21: ??.TPTP_Interpret.ind0
% 16.81/16.38 bnd_a20: ??.TPTP_Interpret.ind0
% 16.81/16.38 bnd_a19: ??.TPTP_Interpret.ind0
% 16.81/16.38 bnd_a18: ??.TPTP_Interpret.ind0
% 16.81/16.38 bnd_a17: ??.TPTP_Interpret.ind0
% 16.81/16.38 bnd_a16: ??.TPTP_Interpret.ind0
% 16.81/16.38 bnd_a15: ??.TPTP_Interpret.ind0
% 16.81/16.38 bnd_a14: ??.TPTP_Interpret.ind0
% 16.81/16.38 bnd_c2_1: {(??.TPTP_Interpret.ind0, False)}
% 16.81/16.38 bnd_a13: ??.TPTP_Interpret.ind0
% 16.81/16.38 bnd_a12: ??.TPTP_Interpret.ind0
% 16.81/16.38 bnd_a11: ??.TPTP_Interpret.ind0
% 16.81/16.38 bnd_a10: ??.TPTP_Interpret.ind0
% 16.81/16.38 bnd_a9: ??.TPTP_Interpret.ind0
% 16.81/16.38 bnd_a8: ??.TPTP_Interpret.ind0
% 16.81/16.38 bnd_c2_0: True
% 16.81/16.38 bnd_c4_1: {(??.TPTP_Interpret.ind0, False)}
% 16.81/16.38 bnd_a7: ??.TPTP_Interpret.ind0
% 16.81/16.38 bnd_a6: ??.TPTP_Interpret.ind0
% 16.81/16.38 bnd_a5: ??.TPTP_Interpret.ind0
% 16.81/16.38 bnd_c2_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, True)})}
% 16.81/16.38 bnd_a4: ??.TPTP_Interpret.ind0
% 16.81/16.38 bnd_c4_0: False
% 16.81/16.38 bnd_c4_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, False)})}
% 16.81/16.38 bnd_c1_0: False
% 16.81/16.38 bnd_c3_1: {(??.TPTP_Interpret.ind0, False)}
% 16.81/16.38 bnd_c5_1: {(??.TPTP_Interpret.ind0, False)}
% 16.81/16.38 bnd_a3: ??.TPTP_Interpret.ind0
% 16.81/16.38 bnd_c5_0: True
% 16.81/16.38 bnd_c3_0: False
% 16.81/16.38 bnd_c1_1: {(??.TPTP_Interpret.ind0, True)}
% 16.81/16.38 bnd_a2: ??.TPTP_Interpret.ind0
% 16.81/16.38 bnd_c1_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, False)})}
% 16.81/16.38 bnd_c5_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, False)})}
% 16.81/16.38 bnd_a1: ??.TPTP_Interpret.ind0
% 16.81/16.38 bnd_c3_2: {(??.TPTP_Interpret.ind0, {(??.TPTP_Interpret.ind0, True)})}
% 16.81/16.38 bnd_ndr1_1: {(??.TPTP_Interpret.ind0, False)}
% 16.81/16.38 bnd_ndr1_0: True
% 16.81/16.38
% 16.81/16.38 % SZS status CounterSatisfiable
%------------------------------------------------------------------------------