TSTP Solution File: SYN429+1 by Refute---2015
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%------------------------------------------------------------------------------
% File : Refute---2015
% Problem : SYN429+1 : TPTP v6.4.0. Released v2.1.0.
% Transfm : none
% Format : tptp:raw
% Command : isabelle tptp_refute %d %s
% Computer : n067.star.cs.uiowa.edu
% Model : x86_64 x86_64
% CPU : Intel(R) Xeon(R) CPU E5-2609 0 2.40GHz
% Memory : 32218.75MB
% OS : Linux 3.10.0-327.10.1.el7.x86_64
% CPULimit : 300s
% DateTime : Thu Apr 14 06:41:46 EDT 2016
% Result : CounterSatisfiable 179.05s
% Output : Assurance 0s
% Verified :
% SZS Type : None (Parsing solution fails)
% Syntax : Number of formulae : 0
% Comments :
%------------------------------------------------------------------------------
%----No solution output by system
%------------------------------------------------------------------------------
%----ORIGINAL SYSTEM OUTPUT
% 0.00/0.03 % Problem : SYN429+1 : TPTP v6.4.0. Released v2.1.0.
% 0.00/0.04 % Command : isabelle tptp_refute %d %s
% 0.03/0.23 % Computer : n067.star.cs.uiowa.edu
% 0.03/0.23 % Model : x86_64 x86_64
% 0.03/0.23 % CPU : Intel(R) Xeon(R) CPU E5-2609 0 @ 2.40GHz
% 0.03/0.23 % Memory : 32218.75MB
% 0.03/0.23 % OS : Linux 3.10.0-327.10.1.el7.x86_64
% 0.03/0.23 % CPULimit : 300
% 0.03/0.23 % DateTime : Fri Apr 8 23:51:09 CDT 2016
% 0.03/0.23 % CPUTime:
% 6.28/5.84 > val it = (): unit
% 7.28/6.87 Trying to find a model that refutes: ~ ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((bnd_c1_0 |
% 7.28/6.87 bnd_c2_0) |
% 7.28/6.87 bnd_c9_0) &
% 7.28/6.87 ((bnd_c1_0 | bnd_c4_0) |
% 7.28/6.87 (ALL U.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 ((ALL V.
% 7.28/6.87 bnd_ndr1_1 U --> bnd_c10_2 U V | ~ bnd_c2_2 U V) |
% 7.28/6.87 (ALL W.
% 7.28/6.87 bnd_ndr1_1 U -->
% 7.28/6.87 (bnd_c7_2 U W | ~ bnd_c5_2 U W) |
% 7.28/6.87 ~ bnd_c9_2 U W)) |
% 7.28/6.87 (ALL X.
% 7.28/6.87 bnd_ndr1_1 U -->
% 7.28/6.87 ~ bnd_c4_2 U X | ~ bnd_c9_2 U X)))) &
% 7.28/6.87 ((bnd_c1_0 | bnd_c4_0) |
% 7.28/6.87 (((((((bnd_ndr1_0 &
% 7.28/6.87 (ALL Y.
% 7.28/6.87 bnd_ndr1_1 bnd_a1 -->
% 7.28/6.87 (bnd_c7_2 bnd_a1 Y | ~ bnd_c3_2 bnd_a1 Y) |
% 7.28/6.87 ~ bnd_c6_2 bnd_a1 Y)) &
% 7.28/6.87 bnd_ndr1_1 bnd_a1) &
% 7.28/6.87 bnd_c6_2 bnd_a1 bnd_a2) &
% 7.28/6.87 bnd_c9_2 bnd_a1 bnd_a2) &
% 7.28/6.87 ~ bnd_c4_2 bnd_a1 bnd_a2) &
% 7.28/6.87 bnd_ndr1_1 bnd_a1) &
% 7.28/6.87 ~ bnd_c10_2 bnd_a1 bnd_a3) &
% 7.28/6.87 ~ bnd_c7_2 bnd_a1 bnd_a3)) &
% 7.28/6.87 ((bnd_c1_0 | bnd_c6_0) | bnd_c9_0)) &
% 7.28/6.87 ((bnd_c1_0 | bnd_c6_0) |
% 7.28/6.87 ((((((((bnd_ndr1_0 & bnd_c4_1 bnd_a4) & bnd_ndr1_1 bnd_a4) &
% 7.28/6.87 bnd_c6_2 bnd_a4 bnd_a5) &
% 7.28/6.87 bnd_c7_2 bnd_a4 bnd_a5) &
% 7.28/6.87 ~ bnd_c8_2 bnd_a4 bnd_a5) &
% 7.28/6.87 bnd_ndr1_1 bnd_a4) &
% 7.28/6.87 bnd_c6_2 bnd_a4 bnd_a6) &
% 7.28/6.87 ~ bnd_c2_2 bnd_a4 bnd_a6) &
% 7.28/6.87 ~ bnd_c9_2 bnd_a4 bnd_a6)) &
% 7.28/6.87 ((bnd_c1_0 | bnd_c6_0) |
% 7.28/6.87 (((((bnd_ndr1_0 &
% 7.28/6.87 (ALL Z.
% 7.28/6.87 bnd_ndr1_1 bnd_a7 -->
% 7.28/6.87 (bnd_c1_2 bnd_a7 Z | bnd_c7_2 bnd_a7 Z) |
% 7.28/6.87 ~ bnd_c3_2 bnd_a7 Z)) &
% 7.28/6.87 (ALL X1.
% 7.28/6.87 bnd_ndr1_1 bnd_a7 -->
% 7.28/6.87 (bnd_c4_2 bnd_a7 X1 | ~ bnd_c1_2 bnd_a7 X1) |
% 7.28/6.87 ~ bnd_c5_2 bnd_a7 X1)) &
% 7.28/6.87 bnd_ndr1_1 bnd_a7) &
% 7.28/6.87 bnd_c7_2 bnd_a7 bnd_a8) &
% 7.28/6.87 ~ bnd_c10_2 bnd_a7 bnd_a8) &
% 7.28/6.87 ~ bnd_c3_2 bnd_a7 bnd_a8)) &
% 7.28/6.87 ((bnd_c1_0 | ~ bnd_c10_0) | ~ bnd_c4_0)) &
% 7.28/6.87 ((bnd_c1_0 | ~ bnd_c4_0) | ~ bnd_c9_0)) &
% 7.28/6.87 ((bnd_c1_0 | ~ bnd_c5_0) |
% 7.28/6.87 (ALL X2.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 bnd_c3_1 X2 |
% 7.28/6.87 ((bnd_ndr1_1 X2 & bnd_c2_2 X2 bnd_a9) & bnd_c3_2 X2 bnd_a9) &
% 7.28/6.87 ~ bnd_c8_2 X2 bnd_a9))) &
% 7.28/6.87 ((bnd_c1_0 | ~ bnd_c7_0) |
% 7.28/6.87 (ALL X3.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (~ bnd_c1_1 X3 | ~ bnd_c9_1 X3) |
% 7.28/6.87 (ALL X4.
% 7.28/6.87 bnd_ndr1_1 X3 -->
% 7.28/6.87 ~ bnd_c10_2 X3 X4 | ~ bnd_c3_2 X3 X4)))) &
% 7.28/6.87 ((bnd_c1_0 | ~ bnd_c9_0) |
% 7.28/6.87 (ALL X5.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c8_1 X5 |
% 7.28/6.87 (ALL X6.
% 7.28/6.87 bnd_ndr1_1 X5 -->
% 7.28/6.87 (bnd_c4_2 X5 X6 | bnd_c9_2 X5 X6) | ~ bnd_c8_2 X5 X6)) |
% 7.28/6.87 (ALL X7.
% 7.28/6.87 bnd_ndr1_1 X5 -->
% 7.28/6.87 (bnd_c5_2 X5 X7 | bnd_c8_2 X5 X7) | ~ bnd_c10_2 X5 X7)))) &
% 7.28/6.87 ((bnd_c1_0 | ~ bnd_c9_0) |
% 7.28/6.87 (ALL X8.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (~ bnd_c3_1 X8 |
% 7.28/6.87 ((bnd_ndr1_1 X8 & bnd_c1_2 X8 bnd_a10) & bnd_c2_2 X8 bnd_a10) &
% 7.28/6.87 bnd_c9_2 X8 bnd_a10) |
% 7.28/6.87 ((bnd_ndr1_1 X8 & bnd_c1_2 X8 bnd_a11) & ~ bnd_c4_2 X8 bnd_a11) &
% 7.28/6.87 ~ bnd_c6_2 X8 bnd_a11))) &
% 7.28/6.87 ((bnd_c10_0 | bnd_c3_0) |
% 7.28/6.87 ((((((((bnd_ndr1_0 & ~ bnd_c9_1 bnd_a12) & bnd_ndr1_1 bnd_a12) &
% 7.28/6.87 bnd_c10_2 bnd_a12 bnd_a13) &
% 7.28/6.87 bnd_c3_2 bnd_a12 bnd_a13) &
% 7.28/6.87 ~ bnd_c1_2 bnd_a12 bnd_a13) &
% 7.28/6.87 bnd_ndr1_1 bnd_a12) &
% 7.28/6.87 bnd_c3_2 bnd_a12 bnd_a14) &
% 7.28/6.87 bnd_c5_2 bnd_a12 bnd_a14) &
% 7.28/6.87 ~ bnd_c1_2 bnd_a12 bnd_a14)) &
% 7.28/6.87 ((bnd_c10_0 | ~ bnd_c1_0) |
% 7.28/6.87 (((((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a15) & ~ bnd_c5_1 bnd_a15) &
% 7.28/6.87 bnd_ndr1_1 bnd_a15) &
% 7.28/6.87 bnd_c1_2 bnd_a15 bnd_a16) &
% 7.28/6.87 bnd_c8_2 bnd_a15 bnd_a16) &
% 7.28/6.87 ~ bnd_c5_2 bnd_a15 bnd_a16)) &
% 7.28/6.87 ((bnd_c10_0 | ~ bnd_c4_0) |
% 7.28/6.87 (ALL X9.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 ((ALL X10.
% 7.28/6.87 bnd_ndr1_1 X9 -->
% 7.28/6.87 (bnd_c10_2 X9 X10 | ~ bnd_c2_2 X9 X10) | ~ bnd_c9_2 X9 X10) |
% 7.28/6.87 ((bnd_ndr1_1 X9 & bnd_c1_2 X9 bnd_a17) & bnd_c2_2 X9 bnd_a17) &
% 7.28/6.87 bnd_c6_2 X9 bnd_a17) |
% 7.28/6.87 ((bnd_ndr1_1 X9 & bnd_c1_2 X9 bnd_a18) & ~ bnd_c5_2 X9 bnd_a18) &
% 7.28/6.87 ~ bnd_c9_2 X9 bnd_a18))) &
% 7.28/6.87 ((bnd_c10_0 | ~ bnd_c9_0) |
% 7.28/6.87 ((bnd_ndr1_0 & bnd_c4_1 bnd_a19) & ~ bnd_c6_1 bnd_a19) &
% 7.28/6.87 (ALL X11.
% 7.28/6.87 bnd_ndr1_1 bnd_a19 -->
% 7.28/6.87 (bnd_c10_2 bnd_a19 X11 | bnd_c5_2 bnd_a19 X11) |
% 7.28/6.87 bnd_c8_2 bnd_a19 X11))) &
% 7.28/6.87 ((bnd_c10_0 |
% 7.28/6.87 (ALL X12.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c10_1 X12 | ~ bnd_c2_1 X12) |
% 7.28/6.87 (ALL X13.
% 7.28/6.87 bnd_ndr1_1 X12 -->
% 7.28/6.87 (bnd_c4_2 X12 X13 | bnd_c8_2 X12 X13) | bnd_c9_2 X12 X13))) |
% 7.28/6.87 (ALL X14.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (~ bnd_c2_1 X14 |
% 7.28/6.87 (ALL X15.
% 7.28/6.87 bnd_ndr1_1 X14 -->
% 7.28/6.87 (bnd_c5_2 X14 X15 | bnd_c6_2 X14 X15) | ~ bnd_c2_2 X14 X15)) |
% 7.28/6.87 ((bnd_ndr1_1 X14 & bnd_c2_2 X14 bnd_a20) & bnd_c5_2 X14 bnd_a20) &
% 7.28/6.87 bnd_c7_2 X14 bnd_a20))) &
% 7.28/6.87 ((bnd_c10_0 |
% 7.28/6.87 (ALL X16.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c2_1 X16 | ~ bnd_c3_1 X16) |
% 7.28/6.87 (ALL X17.
% 7.28/6.87 bnd_ndr1_1 X16 -->
% 7.28/6.87 (bnd_c1_2 X16 X17 | ~ bnd_c3_2 X16 X17) | ~ bnd_c7_2 X16 X17))) |
% 7.28/6.87 (ALL X18.
% 7.28/6.87 bnd_ndr1_0 --> (bnd_c7_1 X18 | ~ bnd_c2_1 X18) | ~ bnd_c6_1 X18))) &
% 7.28/6.87 ((bnd_c10_0 |
% 7.28/6.87 (ALL X19.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c4_1 X19 | ~ bnd_c2_1 X19) |
% 7.28/6.87 (bnd_ndr1_1 X19 & bnd_c4_2 X19 bnd_a21) & ~ bnd_c8_2 X19 bnd_a21)) |
% 7.28/6.87 (ALL X20.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 ((ALL X21.
% 7.28/6.87 bnd_ndr1_1 X20 -->
% 7.28/6.87 (bnd_c5_2 X20 X21 | ~ bnd_c4_2 X20 X21) | ~ bnd_c6_2 X20 X21) |
% 7.28/6.87 ((bnd_ndr1_1 X20 & bnd_c7_2 X20 bnd_a22) & bnd_c9_2 X20 bnd_a22) &
% 7.28/6.87 ~ bnd_c5_2 X20 bnd_a22) |
% 7.28/6.87 ((bnd_ndr1_1 X20 & bnd_c8_2 X20 bnd_a23) & ~ bnd_c2_2 X20 bnd_a23) &
% 7.28/6.87 ~ bnd_c7_2 X20 bnd_a23))) &
% 7.28/6.87 ((bnd_c10_0 |
% 7.28/6.87 (ALL X22.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (ALL X23.
% 7.28/6.87 bnd_ndr1_1 X22 -->
% 7.28/6.87 (bnd_c10_2 X22 X23 | bnd_c6_2 X22 X23) | bnd_c8_2 X22 X23) |
% 7.28/6.87 (ALL X24.
% 7.28/6.87 bnd_ndr1_1 X22 -->
% 7.28/6.87 (bnd_c6_2 X22 X24 | bnd_c7_2 X22 X24) | ~ bnd_c3_2 X22 X24))) |
% 7.28/6.87 (ALL X25.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (((bnd_ndr1_1 X25 & bnd_c1_2 X25 bnd_a24) & ~ bnd_c10_2 X25 bnd_a24) &
% 7.28/6.87 ~ bnd_c4_2 X25 bnd_a24 |
% 7.28/6.87 ((bnd_ndr1_1 X25 & bnd_c1_2 X25 bnd_a25) & ~ bnd_c2_2 X25 bnd_a25) &
% 7.28/6.87 ~ bnd_c6_2 X25 bnd_a25) |
% 7.28/6.87 ((bnd_ndr1_1 X25 & bnd_c6_2 X25 bnd_a26) & bnd_c7_2 X25 bnd_a26) &
% 7.28/6.87 ~ bnd_c1_2 X25 bnd_a26))) &
% 7.28/6.87 ((bnd_c10_0 |
% 7.28/6.87 (((((bnd_ndr1_0 & bnd_c2_1 bnd_a27) &
% 7.28/6.87 ~ bnd_c10_1 bnd_a27) &
% 7.28/6.87 bnd_ndr1_1 bnd_a27) &
% 7.28/6.87 ~ bnd_c3_2 bnd_a27 bnd_a28) &
% 7.28/6.87 ~ bnd_c5_2 bnd_a27 bnd_a28) &
% 7.28/6.87 ~ bnd_c9_2 bnd_a27 bnd_a28) |
% 7.28/6.87 ((((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a29) &
% 7.28/6.87 bnd_ndr1_1 bnd_a29) &
% 7.28/6.87 bnd_c2_2 bnd_a29 bnd_a30) &
% 7.28/6.87 bnd_c7_2 bnd_a29 bnd_a30) &
% 7.28/6.87 ~ bnd_c8_2 bnd_a29 bnd_a30)) &
% 7.28/6.87 ((bnd_c2_0 | bnd_c6_0) |
% 7.28/6.87 (bnd_ndr1_0 & bnd_c2_1 bnd_a31) &
% 7.28/6.87 (ALL X26.
% 7.28/6.87 bnd_ndr1_1 bnd_a31 -->
% 7.28/6.87 (bnd_c2_2 bnd_a31 X26 | bnd_c4_2 bnd_a31 X26) | bnd_c6_2 bnd_a31 X26))) &
% 7.28/6.87 ((bnd_c2_0 | bnd_c8_0) | ~ bnd_c9_0)) &
% 7.28/6.87 ((bnd_c2_0 | ~ bnd_c1_0) | ~ bnd_c8_0)) &
% 7.28/6.87 ((bnd_c2_0 | ~ bnd_c1_0) |
% 7.28/6.87 (((((bnd_ndr1_0 & ~ bnd_c6_1 bnd_a32) &
% 7.28/6.87 ~ bnd_c9_1 bnd_a32) &
% 7.28/6.87 bnd_ndr1_1 bnd_a32) &
% 7.28/6.87 bnd_c3_2 bnd_a32 bnd_a33) &
% 7.28/6.87 bnd_c6_2 bnd_a32 bnd_a33) &
% 7.28/6.87 ~ bnd_c4_2 bnd_a32 bnd_a33)) &
% 7.28/6.87 ((bnd_c2_0 |
% 7.28/6.87 (ALL X27.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (~ bnd_c5_1 X27 |
% 7.28/6.87 (ALL X28.
% 7.28/6.87 bnd_ndr1_1 X27 -->
% 7.28/6.87 (bnd_c10_2 X27 X28 | bnd_c3_2 X27 X28) | ~ bnd_c4_2 X27 X28)) |
% 7.28/6.87 ((bnd_ndr1_1 X27 &
% 7.28/6.87 bnd_c1_2 X27 bnd_a34) &
% 7.28/6.87 bnd_c4_2 X27 bnd_a34) &
% 7.28/6.87 ~ bnd_c7_2 X27 bnd_a34)) |
% 7.28/6.87 (((((bnd_ndr1_0 & ~ bnd_c9_1 bnd_a35) &
% 7.28/6.87 (ALL X29.
% 7.28/6.87 bnd_ndr1_1 bnd_a35 -->
% 7.28/6.87 (bnd_c10_2 bnd_a35 X29 | ~ bnd_c3_2 bnd_a35 X29) |
% 7.28/6.87 ~ bnd_c4_2 bnd_a35 X29)) &
% 7.28/6.87 bnd_ndr1_1 bnd_a35) &
% 7.28/6.87 bnd_c2_2 bnd_a35 bnd_a36) &
% 7.28/6.87 ~ bnd_c10_2 bnd_a35 bnd_a36) &
% 7.28/6.87 ~ bnd_c7_2 bnd_a35 bnd_a36)) &
% 7.28/6.87 ((bnd_c3_0 | bnd_c4_0) |
% 7.28/6.87 ((bnd_ndr1_0 & ~ bnd_c3_1 bnd_a37) &
% 7.28/6.87 (ALL X30.
% 7.28/6.87 bnd_ndr1_1 bnd_a37 -->
% 7.28/6.87 (bnd_c7_2 bnd_a37 X30 |
% 7.28/6.87 ~ bnd_c4_2 bnd_a37 X30) |
% 7.28/6.87 ~ bnd_c5_2 bnd_a37 X30)) &
% 7.28/6.87 (ALL X31.
% 7.28/6.87 bnd_ndr1_1 bnd_a37 -->
% 7.28/6.87 (~ bnd_c1_2 bnd_a37 X31 |
% 7.28/6.87 ~ bnd_c7_2 bnd_a37 X31) |
% 7.28/6.87 ~ bnd_c8_2 bnd_a37 X31))) &
% 7.28/6.87 ((bnd_c3_0 | bnd_c5_0) | ~ bnd_c9_0)) &
% 7.28/6.87 ((bnd_c3_0 | ~ bnd_c1_0) | ~ bnd_c4_0)) &
% 7.28/6.87 ((bnd_c3_0 | ~ bnd_c1_0) |
% 7.28/6.87 (ALL X32.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c3_1 X32 | bnd_c4_1 X32) |
% 7.28/6.87 ~ bnd_c5_1 X32))) &
% 7.28/6.87 ((bnd_c3_0 | ~ bnd_c10_0) |
% 7.28/6.87 ((bnd_ndr1_0 & ~ bnd_c5_1 bnd_a38) &
% 7.28/6.87 ~ bnd_c7_1 bnd_a38) &
% 7.28/6.87 (ALL X33.
% 7.28/6.87 bnd_ndr1_1 bnd_a38 -->
% 7.28/6.87 (bnd_c2_2 bnd_a38 X33 |
% 7.28/6.87 bnd_c4_2 bnd_a38 X33) |
% 7.28/6.87 ~ bnd_c8_2 bnd_a38 X33))) &
% 7.28/6.87 ((bnd_c3_0 | ~ bnd_c2_0) |
% 7.28/6.87 ((bnd_ndr1_0 & bnd_c1_1 bnd_a39) &
% 7.28/6.87 bnd_c5_1 bnd_a39) &
% 7.28/6.87 (ALL X34.
% 7.28/6.87 bnd_ndr1_1 bnd_a39 -->
% 7.28/6.87 bnd_c3_2 bnd_a39 X34 |
% 7.28/6.87 ~ bnd_c7_2 bnd_a39 X34))) &
% 7.28/6.87 ((bnd_c3_0 | ~ bnd_c5_0) |
% 7.28/6.87 (ALL X35.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (((bnd_ndr1_1 X35 & bnd_c3_2 X35 bnd_a40) &
% 7.28/6.87 bnd_c5_2 X35 bnd_a40) &
% 7.28/6.87 ~ bnd_c1_2 X35 bnd_a40 |
% 7.28/6.87 ((bnd_ndr1_1 X35 & bnd_c6_2 X35 bnd_a41) &
% 7.28/6.87 ~ bnd_c4_2 X35 bnd_a41) &
% 7.28/6.87 ~ bnd_c9_2 X35 bnd_a41) |
% 7.28/6.87 ((bnd_ndr1_1 X35 & ~ bnd_c2_2 X35 bnd_a42) &
% 7.28/6.87 ~ bnd_c6_2 X35 bnd_a42) &
% 7.28/6.87 ~ bnd_c8_2 X35 bnd_a42))) &
% 7.28/6.87 ((bnd_c3_0 | ~ bnd_c6_0) |
% 7.28/6.87 (((((bnd_ndr1_0 &
% 7.28/6.87 (ALL X36.
% 7.28/6.87 bnd_ndr1_1 bnd_a43 -->
% 7.28/6.87 bnd_c1_2 bnd_a43 X36 |
% 7.28/6.87 ~ bnd_c3_2 bnd_a43 X36)) &
% 7.28/6.87 (ALL X37.
% 7.28/6.87 bnd_ndr1_1 bnd_a43 -->
% 7.28/6.87 (bnd_c3_2 bnd_a43 X37 |
% 7.28/6.87 bnd_c6_2 bnd_a43 X37) |
% 7.28/6.87 ~ bnd_c2_2 bnd_a43 X37)) &
% 7.28/6.87 bnd_ndr1_1 bnd_a43) &
% 7.28/6.87 bnd_c4_2 bnd_a43 bnd_a44) &
% 7.28/6.87 bnd_c5_2 bnd_a43 bnd_a44) &
% 7.28/6.87 bnd_c8_2 bnd_a43 bnd_a44)) &
% 7.28/6.87 ((bnd_c3_0 | ~ bnd_c7_0) |
% 7.28/6.87 (((((bnd_ndr1_0 & bnd_c7_1 bnd_a45) &
% 7.28/6.87 ~ bnd_c4_1 bnd_a45) &
% 7.28/6.87 bnd_ndr1_1 bnd_a45) &
% 7.28/6.87 bnd_c5_2 bnd_a45 bnd_a46) &
% 7.28/6.87 ~ bnd_c10_2 bnd_a45 bnd_a46) &
% 7.28/6.87 ~ bnd_c4_2 bnd_a45 bnd_a46)) &
% 7.28/6.87 ((bnd_c3_0 |
% 7.28/6.87 (ALL X38.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c5_1 X38 |
% 7.28/6.87 (ALL X39.
% 7.28/6.87 bnd_ndr1_1 X38 -->
% 7.28/6.87 (bnd_c3_2 X38 X39 | bnd_c8_2 X38 X39) |
% 7.28/6.87 ~ bnd_c10_2 X38 X39)) |
% 7.28/6.87 (ALL X40.
% 7.28/6.87 bnd_ndr1_1 X38 -->
% 7.28/6.87 (bnd_c3_2 X38 X40 | bnd_c9_2 X38 X40) |
% 7.28/6.87 ~ bnd_c6_2 X38 X40))) |
% 7.28/6.87 (ALL X41.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (~ bnd_c2_1 X41 | ~ bnd_c8_1 X41) |
% 7.28/6.87 bnd_ndr1_1 X41 & ~ bnd_c1_2 X41 bnd_a47))) &
% 7.28/6.87 ((bnd_c3_0 |
% 7.28/6.87 (ALL X42.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c9_1 X42 | ~ bnd_c7_1 X42) |
% 7.28/6.87 ((bnd_ndr1_1 X42 & bnd_c10_2 X42 bnd_a48) &
% 7.28/6.87 bnd_c8_2 X42 bnd_a48) &
% 7.28/6.87 ~ bnd_c5_2 X42 bnd_a48)) |
% 7.28/6.87 (((((bnd_ndr1_0 &
% 7.28/6.87 (ALL X43.
% 7.28/6.87 bnd_ndr1_1 bnd_a49 -->
% 7.28/6.87 (bnd_c10_2 bnd_a49 X43 |
% 7.28/6.87 bnd_c4_2 bnd_a49 X43) |
% 7.28/6.87 ~ bnd_c6_2 bnd_a49 X43)) &
% 7.28/6.87 (ALL X44.
% 7.28/6.87 bnd_ndr1_1 bnd_a49 -->
% 7.28/6.87 bnd_c3_2 bnd_a49 X44 |
% 7.28/6.87 ~ bnd_c4_2 bnd_a49 X44)) &
% 7.28/6.87 bnd_ndr1_1 bnd_a49) &
% 7.28/6.87 bnd_c2_2 bnd_a49 bnd_a50) &
% 7.28/6.87 bnd_c3_2 bnd_a49 bnd_a50) &
% 7.28/6.87 ~ bnd_c10_2 bnd_a49 bnd_a50)) &
% 7.28/6.87 ((bnd_c4_0 | bnd_c7_0) |
% 7.28/6.87 (ALL X45.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c2_1 X45 | bnd_c6_1 X45) | ~ bnd_c7_1 X45))) &
% 7.28/6.87 ((bnd_c4_0 | bnd_c8_0) |
% 7.28/6.87 ((bnd_ndr1_0 & bnd_c6_1 bnd_a51) &
% 7.28/6.87 (ALL X46.
% 7.28/6.87 bnd_ndr1_1 bnd_a51 -->
% 7.28/6.87 bnd_c10_2 bnd_a51 X46 | ~ bnd_c8_2 bnd_a51 X46)) &
% 7.28/6.87 (ALL X47.
% 7.28/6.87 bnd_ndr1_1 bnd_a51 -->
% 7.28/6.87 (~ bnd_c2_2 bnd_a51 X47 | ~ bnd_c5_2 bnd_a51 X47) |
% 7.28/6.87 ~ bnd_c8_2 bnd_a51 X47))) &
% 7.28/6.87 ((bnd_c4_0 | ~ bnd_c8_0) |
% 7.28/6.87 (ALL X48.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c7_1 X48 |
% 7.28/6.87 (ALL X49.
% 7.28/6.87 bnd_ndr1_1 X48 -->
% 7.28/6.87 (bnd_c7_2 X48 X49 | ~ bnd_c1_2 X48 X49) |
% 7.28/6.87 ~ bnd_c4_2 X48 X49)) |
% 7.28/6.87 (bnd_ndr1_1 X48 & bnd_c2_2 X48 bnd_a52) &
% 7.28/6.87 ~ bnd_c6_2 X48 bnd_a52))) &
% 7.28/6.87 ((bnd_c4_0 |
% 7.28/6.87 (ALL X50.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c9_1 X50 |
% 7.28/6.87 ((bnd_ndr1_1 X50 & bnd_c1_2 X50 bnd_a53) &
% 7.28/6.87 bnd_c3_2 X50 bnd_a53) &
% 7.28/6.87 ~ bnd_c6_2 X50 bnd_a53) |
% 7.28/6.87 ((bnd_ndr1_1 X50 & bnd_c8_2 X50 bnd_a54) &
% 7.28/6.87 ~ bnd_c10_2 X50 bnd_a54) &
% 7.28/6.87 ~ bnd_c6_2 X50 bnd_a54)) |
% 7.28/6.87 (ALL X51.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (~ bnd_c4_1 X51 |
% 7.28/6.87 (ALL X52.
% 7.28/6.87 bnd_ndr1_1 X51 -->
% 7.28/6.87 (bnd_c2_2 X51 X52 | bnd_c8_2 X51 X52) |
% 7.28/6.87 ~ bnd_c6_2 X51 X52)) |
% 7.28/6.87 (bnd_ndr1_1 X51 & ~ bnd_c7_2 X51 bnd_a55) &
% 7.28/6.87 ~ bnd_c8_2 X51 bnd_a55))) &
% 7.28/6.87 ((bnd_c5_0 | bnd_c7_0) |
% 7.28/6.87 ((bnd_ndr1_0 & bnd_c4_1 bnd_a56) & ~ bnd_c10_1 bnd_a56) &
% 7.28/6.87 (ALL X53.
% 7.28/6.87 bnd_ndr1_1 bnd_a56 -->
% 7.28/6.87 (~ bnd_c3_2 bnd_a56 X53 | ~ bnd_c6_2 bnd_a56 X53) |
% 7.28/6.87 ~ bnd_c9_2 bnd_a56 X53))) &
% 7.28/6.87 ((bnd_c5_0 | bnd_c8_0) | bnd_c9_0)) &
% 7.28/6.87 (bnd_c5_0 | ~ bnd_c10_0)) &
% 7.28/6.87 ((bnd_c5_0 | ~ bnd_c4_0) |
% 7.28/6.87 (ALL X54.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c4_1 X54 |
% 7.28/6.87 ((bnd_ndr1_1 X54 & bnd_c4_2 X54 bnd_a57) &
% 7.28/6.87 ~ bnd_c5_2 X54 bnd_a57) &
% 7.28/6.87 ~ bnd_c9_2 X54 bnd_a57) |
% 7.28/6.87 ((bnd_ndr1_1 X54 & ~ bnd_c2_2 X54 bnd_a58) &
% 7.28/6.87 ~ bnd_c3_2 X54 bnd_a58) &
% 7.28/6.87 ~ bnd_c9_2 X54 bnd_a58))) &
% 7.28/6.87 ((bnd_c5_0 | ~ bnd_c8_0) |
% 7.28/6.87 (((((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a59) &
% 7.28/6.87 (ALL X55.
% 7.28/6.87 bnd_ndr1_1 bnd_a59 -->
% 7.28/6.87 (bnd_c3_2 bnd_a59 X55 | bnd_c9_2 bnd_a59 X55) |
% 7.28/6.87 ~ bnd_c10_2 bnd_a59 X55)) &
% 7.28/6.87 bnd_ndr1_1 bnd_a59) &
% 7.28/6.87 bnd_c1_2 bnd_a59 bnd_a60) &
% 7.28/6.87 ~ bnd_c3_2 bnd_a59 bnd_a60) &
% 7.28/6.87 ~ bnd_c5_2 bnd_a59 bnd_a60)) &
% 7.28/6.87 ((bnd_c5_0 | ~ bnd_c9_0) |
% 7.28/6.87 ((((((bnd_ndr1_0 & ~ bnd_c6_1 bnd_a61) & bnd_ndr1_1 bnd_a61) &
% 7.28/6.87 bnd_c3_2 bnd_a61 bnd_a62) &
% 7.28/6.87 ~ bnd_c1_2 bnd_a61 bnd_a62) &
% 7.28/6.87 bnd_ndr1_1 bnd_a61) &
% 7.28/6.87 ~ bnd_c10_2 bnd_a61 bnd_a63) &
% 7.28/6.87 ~ bnd_c5_2 bnd_a61 bnd_a63)) &
% 7.28/6.87 ((bnd_c5_0 |
% 7.28/6.87 (ALL X56.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c10_1 X56 | bnd_c6_1 X56) | ~ bnd_c1_1 X56)) |
% 7.28/6.87 (ALL X57.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (~ bnd_c6_1 X57 |
% 7.28/6.87 ((bnd_ndr1_1 X57 & bnd_c10_2 X57 bnd_a64) &
% 7.28/6.87 ~ bnd_c1_2 X57 bnd_a64) &
% 7.28/6.87 ~ bnd_c9_2 X57 bnd_a64) |
% 7.28/6.87 ((bnd_ndr1_1 X57 & bnd_c2_2 X57 bnd_a65) &
% 7.28/6.87 bnd_c4_2 X57 bnd_a65) &
% 7.28/6.87 ~ bnd_c7_2 X57 bnd_a65))) &
% 7.28/6.87 ((bnd_c5_0 |
% 7.28/6.87 (ALL X58.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c2_1 X58 | bnd_c6_1 X58) |
% 7.28/6.87 ((bnd_ndr1_1 X58 & ~ bnd_c1_2 X58 bnd_a66) &
% 7.28/6.87 ~ bnd_c5_2 X58 bnd_a66) &
% 7.28/6.87 ~ bnd_c7_2 X58 bnd_a66)) |
% 7.28/6.87 (bnd_ndr1_0 & bnd_c5_1 bnd_a67) &
% 7.28/6.87 (ALL X59.
% 7.28/6.87 bnd_ndr1_1 bnd_a67 -->
% 7.28/6.87 ~ bnd_c10_2 bnd_a67 X59 | ~ bnd_c9_2 bnd_a67 X59))) &
% 7.28/6.87 ((bnd_c5_0 |
% 7.28/6.87 (ALL X60.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c5_1 X60 | ~ bnd_c10_1 X60) |
% 7.28/6.87 ((bnd_ndr1_1 X60 & bnd_c10_2 X60 bnd_a68) &
% 7.28/6.87 bnd_c3_2 X60 bnd_a68) &
% 7.28/6.87 bnd_c7_2 X60 bnd_a68)) |
% 7.28/6.87 ((bnd_ndr1_0 & bnd_c9_1 bnd_a69) & ~ bnd_c4_1 bnd_a69) &
% 7.28/6.87 (ALL X61.
% 7.28/6.87 bnd_ndr1_1 bnd_a69 -->
% 7.28/6.87 (bnd_c2_2 bnd_a69 X61 | bnd_c5_2 bnd_a69 X61) |
% 7.28/6.87 ~ bnd_c6_2 bnd_a69 X61))) &
% 7.28/6.87 ((bnd_c5_0 |
% 7.28/6.87 (ALL X62.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (~ bnd_c9_1 X62 |
% 7.28/6.87 (ALL X63.
% 7.28/6.87 bnd_ndr1_1 X62 -->
% 7.28/6.87 (bnd_c10_2 X62 X63 | bnd_c4_2 X62 X63) |
% 7.28/6.87 bnd_c9_2 X62 X63)) |
% 7.28/6.87 ((bnd_ndr1_1 X62 & bnd_c8_2 X62 bnd_a70) &
% 7.28/6.87 ~ bnd_c10_2 X62 bnd_a70) &
% 7.28/6.87 ~ bnd_c6_2 X62 bnd_a70)) |
% 7.28/6.87 ((bnd_ndr1_0 &
% 7.28/6.87 (ALL X64.
% 7.28/6.87 bnd_ndr1_1 bnd_a71 -->
% 7.28/6.87 (bnd_c1_2 bnd_a71 X64 | ~ bnd_c4_2 bnd_a71 X64) |
% 7.28/6.87 ~ bnd_c8_2 bnd_a71 X64)) &
% 7.28/6.87 (ALL X65.
% 7.28/6.87 bnd_ndr1_1 bnd_a71 -->
% 7.28/6.87 (bnd_c2_2 bnd_a71 X65 | bnd_c7_2 bnd_a71 X65) |
% 7.28/6.87 ~ bnd_c10_2 bnd_a71 X65)) &
% 7.28/6.87 (ALL X66.
% 7.28/6.87 bnd_ndr1_1 bnd_a71 -->
% 7.28/6.87 (bnd_c5_2 bnd_a71 X66 | ~ bnd_c4_2 bnd_a71 X66) |
% 7.28/6.87 ~ bnd_c6_2 bnd_a71 X66))) &
% 7.28/6.87 ((bnd_c5_0 |
% 7.28/6.87 ((bnd_ndr1_0 & bnd_c1_1 bnd_a72) & ~ bnd_c3_1 bnd_a72) &
% 7.28/6.87 (ALL X67.
% 7.28/6.87 bnd_ndr1_1 bnd_a72 -->
% 7.28/6.87 (bnd_c10_2 bnd_a72 X67 | bnd_c5_2 bnd_a72 X67) |
% 7.28/6.87 ~ bnd_c3_2 bnd_a72 X67)) |
% 7.28/6.87 ((bnd_ndr1_0 & bnd_c4_1 bnd_a73) & ~ bnd_c6_1 bnd_a73) &
% 7.28/6.87 (ALL X68.
% 7.28/6.87 bnd_ndr1_1 bnd_a73 -->
% 7.28/6.87 bnd_c8_2 bnd_a73 X68 | ~ bnd_c10_2 bnd_a73 X68))) &
% 7.28/6.87 ((bnd_c6_0 | bnd_c7_0) |
% 7.28/6.87 (((((bnd_ndr1_0 & bnd_c4_1 bnd_a74) & bnd_c6_1 bnd_a74) &
% 7.28/6.87 bnd_ndr1_1 bnd_a74) &
% 7.28/6.87 bnd_c10_2 bnd_a74 bnd_a75) &
% 7.28/6.87 ~ bnd_c1_2 bnd_a74 bnd_a75) &
% 7.28/6.87 ~ bnd_c2_2 bnd_a74 bnd_a75)) &
% 7.28/6.87 ((bnd_c6_0 | bnd_c9_0) |
% 7.28/6.87 (ALL X69.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c4_1 X69 | bnd_c5_1 X69) |
% 7.28/6.87 ((bnd_ndr1_1 X69 & bnd_c1_2 X69 bnd_a76) & bnd_c4_2 X69 bnd_a76) &
% 7.28/6.87 ~ bnd_c5_2 X69 bnd_a76))) &
% 7.28/6.87 ((bnd_c6_0 | ~ bnd_c3_0) |
% 7.28/6.87 (ALL X70.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c8_1 X70 | ~ bnd_c2_1 X70) |
% 7.28/6.87 (ALL X71.
% 7.28/6.87 bnd_ndr1_1 X70 -->
% 7.28/6.87 (bnd_c9_2 X70 X71 | ~ bnd_c10_2 X70 X71) |
% 7.28/6.87 ~ bnd_c3_2 X70 X71)))) &
% 7.28/6.87 ((bnd_c6_0 | ~ bnd_c3_0) |
% 7.28/6.87 (ALL X72.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (~ bnd_c6_1 X72 |
% 7.28/6.87 (ALL X73.
% 7.28/6.87 bnd_ndr1_1 X72 -->
% 7.28/6.87 (bnd_c7_2 X72 X73 | ~ bnd_c2_2 X72 X73) | ~ bnd_c5_2 X72 X73)) |
% 7.28/6.87 ((bnd_ndr1_1 X72 & bnd_c1_2 X72 bnd_a77) & bnd_c3_2 X72 bnd_a77) &
% 7.28/6.87 ~ bnd_c9_2 X72 bnd_a77))) &
% 7.28/6.87 ((bnd_c6_0 |
% 7.28/6.87 (ALL X74.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (~ bnd_c6_1 X74 |
% 7.28/6.87 (ALL X75. bnd_ndr1_1 X74 --> bnd_c2_2 X74 X75 | ~ bnd_c9_2 X74 X75)) |
% 7.28/6.87 ((bnd_ndr1_1 X74 & ~ bnd_c3_2 X74 bnd_a78) & ~ bnd_c7_2 X74 bnd_a78) &
% 7.28/6.87 ~ bnd_c9_2 X74 bnd_a78)) |
% 7.28/6.87 ((bnd_ndr1_0 & ~ bnd_c3_1 bnd_a79) &
% 7.28/6.87 (ALL X76.
% 7.28/6.87 bnd_ndr1_1 bnd_a79 -->
% 7.28/6.87 (bnd_c1_2 bnd_a79 X76 | bnd_c6_2 bnd_a79 X76) |
% 7.28/6.87 ~ bnd_c10_2 bnd_a79 X76)) &
% 7.28/6.87 (ALL X77.
% 7.28/6.87 bnd_ndr1_1 bnd_a79 -->
% 7.28/6.87 (bnd_c4_2 bnd_a79 X77 | bnd_c7_2 bnd_a79 X77) |
% 7.28/6.87 bnd_c8_2 bnd_a79 X77))) &
% 7.28/6.87 ((bnd_c6_0 |
% 7.28/6.87 (ALL X78.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 ((ALL X79.
% 7.28/6.87 bnd_ndr1_1 X78 -->
% 7.28/6.87 (bnd_c1_2 X78 X79 | bnd_c5_2 X78 X79) | bnd_c6_2 X78 X79) |
% 7.28/6.87 (ALL X80.
% 7.28/6.87 bnd_ndr1_1 X78 -->
% 7.28/6.87 (bnd_c10_2 X78 X80 | bnd_c5_2 X78 X80) | ~ bnd_c9_2 X78 X80)) |
% 7.28/6.87 (ALL X81. bnd_ndr1_1 X78 --> bnd_c4_2 X78 X81 | bnd_c6_2 X78 X81))) |
% 7.28/6.87 ((bnd_ndr1_0 & bnd_c3_1 bnd_a80) &
% 7.28/6.87 bnd_c7_1 bnd_a80) &
% 7.28/6.87 ~ bnd_c5_1 bnd_a80)) &
% 7.28/6.87 ((bnd_c7_0 | bnd_c9_0) |
% 7.28/6.87 (ALL X82.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c8_1 X82 |
% 7.28/6.87 (ALL X83.
% 7.28/6.87 bnd_ndr1_1 X82 -->
% 7.28/6.87 (bnd_c5_2 X82 X83 | ~ bnd_c10_2 X82 X83) | ~ bnd_c8_2 X82 X83)) |
% 7.28/6.87 (ALL X84.
% 7.28/6.87 bnd_ndr1_1 X82 -->
% 7.28/6.87 (bnd_c7_2 X82 X84 | bnd_c9_2 X82 X84) | ~ bnd_c8_2 X82 X84)))) &
% 7.28/6.87 ((bnd_c7_0 | ~ bnd_c1_0) |
% 7.28/6.87 (ALL X85.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c10_1 X85 | ~ bnd_c5_1 X85) |
% 7.28/6.87 ((bnd_ndr1_1 X85 & bnd_c6_2 X85 bnd_a81) & bnd_c8_2 X85 bnd_a81) &
% 7.28/6.87 ~ bnd_c5_2 X85 bnd_a81))) &
% 7.28/6.87 ((bnd_c7_0 | ~ bnd_c6_0) |
% 7.28/6.87 (ALL X86.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c1_1 X86 | ~ bnd_c7_1 X86) |
% 7.28/6.87 ((bnd_ndr1_1 X86 & ~ bnd_c10_2 X86 bnd_a82) & ~ bnd_c2_2 X86 bnd_a82) &
% 7.28/6.87 ~ bnd_c6_2 X86 bnd_a82))) &
% 7.28/6.87 ((bnd_c7_0 | ~ bnd_c9_0) |
% 7.28/6.87 ((((bnd_ndr1_0 & bnd_c5_1 bnd_a83) &
% 7.28/6.87 ~ bnd_c2_1 bnd_a83) &
% 7.28/6.87 bnd_ndr1_1 bnd_a83) &
% 7.28/6.87 ~ bnd_c1_2 bnd_a83 bnd_a84) &
% 7.28/6.87 ~ bnd_c2_2 bnd_a83 bnd_a84)) &
% 7.28/6.87 ((bnd_c7_0 |
% 7.28/6.87 (ALL X87.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (~ bnd_c7_1 X87 | ~ bnd_c8_1 X87) |
% 7.28/6.87 (ALL X88.
% 7.28/6.87 bnd_ndr1_1 X87 -->
% 7.28/6.87 (bnd_c1_2 X87 X88 | bnd_c7_2 X87 X88) | bnd_c9_2 X87 X88))) |
% 7.28/6.87 (ALL X89.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 ((ALL X90.
% 7.28/6.87 bnd_ndr1_1 X89 -->
% 7.28/6.87 (bnd_c10_2 X89 X90 | bnd_c4_2 X89 X90) | bnd_c7_2 X89 X90) |
% 7.28/6.87 (ALL X91.
% 7.28/6.87 bnd_ndr1_1 X89 -->
% 7.28/6.87 (bnd_c4_2 X89 X91 | ~ bnd_c3_2 X89 X91) | ~ bnd_c5_2 X89 X91)) |
% 7.28/6.87 bnd_ndr1_1 X89 &
% 7.28/6.87 ~ bnd_c6_2 X89 bnd_a85))) &
% 7.28/6.87 ((bnd_c8_0 | ~ bnd_c10_0) |
% 7.28/6.87 ((bnd_ndr1_0 & bnd_c7_1 bnd_a86) &
% 7.28/6.87 ~ bnd_c1_1 bnd_a86) &
% 7.28/6.87 ~ bnd_c5_1 bnd_a86)) &
% 7.28/6.87 (bnd_c8_0 |
% 7.28/6.87 (ALL X92.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c1_1 X92 | ~ bnd_c9_1 X92) |
% 7.28/6.87 ((bnd_ndr1_1 X92 &
% 7.28/6.87 ~ bnd_c2_2 X92 bnd_a87) &
% 7.28/6.87 ~ bnd_c3_2 X92 bnd_a87) &
% 7.28/6.87 ~ bnd_c7_2 X92 bnd_a87))) &
% 7.28/6.87 (bnd_c9_0 | ~ bnd_c10_0)) &
% 7.28/6.87 ((bnd_c9_0 | ~ bnd_c3_0) |
% 7.28/6.87 (ALL X93.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (ALL X94.
% 7.28/6.87 bnd_ndr1_1 X93 -->
% 7.28/6.87 (bnd_c9_2 X93 X94 |
% 7.28/6.87 ~ bnd_c3_2 X93 X94) |
% 7.28/6.87 ~ bnd_c5_2 X93 X94) |
% 7.28/6.87 ((bnd_ndr1_1 X93 & bnd_c1_2 X93 bnd_a88) &
% 7.28/6.87 bnd_c2_2 X93 bnd_a88) &
% 7.28/6.87 ~ bnd_c4_2 X93 bnd_a88))) &
% 7.28/6.87 ((bnd_c9_0 | ~ bnd_c4_0) |
% 7.28/6.87 (ALL X95.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c7_1 X95 | bnd_c9_1 X95) |
% 7.28/6.87 ((bnd_ndr1_1 X95 & bnd_c1_2 X95 bnd_a89) &
% 7.28/6.87 ~ bnd_c3_2 X95 bnd_a89) &
% 7.28/6.87 ~ bnd_c4_2 X95 bnd_a89))) &
% 7.28/6.87 ((bnd_c9_0 | ~ bnd_c5_0) |
% 7.28/6.87 ((bnd_ndr1_0 & bnd_ndr1_1 bnd_a90) &
% 7.28/6.87 ~ bnd_c3_2 bnd_a90 bnd_a91) &
% 7.28/6.87 ~ bnd_c9_2 bnd_a90 bnd_a91)) &
% 7.28/6.87 ((bnd_c9_0 |
% 7.28/6.87 (ALL X96.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c6_1 X96 | ~ bnd_c10_1 X96) |
% 7.28/6.87 (ALL X97.
% 7.28/6.87 bnd_ndr1_1 X96 -->
% 7.28/6.87 (bnd_c3_2 X96 X97 | bnd_c9_2 X96 X97) |
% 7.28/6.87 ~ bnd_c8_2 X96 X97))) |
% 7.28/6.87 (bnd_ndr1_0 & ~ bnd_c6_1 bnd_a92) &
% 7.28/6.87 (ALL X98.
% 7.28/6.87 bnd_ndr1_1 bnd_a92 -->
% 7.28/6.87 (bnd_c10_2 bnd_a92 X98 |
% 7.28/6.87 bnd_c3_2 bnd_a92 X98) |
% 7.28/6.87 ~ bnd_c6_2 bnd_a92 X98))) &
% 7.28/6.87 (~ bnd_c1_0 | ~ bnd_c4_0)) &
% 7.28/6.87 ((~ bnd_c1_0 | ~ bnd_c9_0) |
% 7.28/6.87 (ALL X99.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c5_1 X99 |
% 7.28/6.87 (bnd_ndr1_1 X99 & bnd_c1_2 X99 bnd_a93) &
% 7.28/6.87 bnd_c6_2 X99 bnd_a93) |
% 7.28/6.87 (bnd_ndr1_1 X99 & ~ bnd_c3_2 X99 bnd_a94) &
% 7.28/6.87 ~ bnd_c6_2 X99 bnd_a94))) &
% 7.28/6.87 (~ bnd_c1_0 |
% 7.28/6.87 (ALL X100.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c2_1 X100 | bnd_c5_1 X100) |
% 7.28/6.87 bnd_c7_1 X100))) &
% 7.28/6.87 ((~ bnd_c1_0 |
% 7.28/6.87 (ALL X101.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c2_1 X101 | ~ bnd_c10_1 X101) |
% 7.28/6.87 ~ bnd_c9_1 X101)) |
% 7.28/6.87 ((((bnd_ndr1_0 & bnd_c9_1 bnd_a95) &
% 7.28/6.87 bnd_ndr1_1 bnd_a95) &
% 7.28/6.87 bnd_c1_2 bnd_a95 bnd_a96) &
% 7.28/6.87 bnd_c2_2 bnd_a95 bnd_a96) &
% 7.28/6.87 ~ bnd_c5_2 bnd_a95 bnd_a96)) &
% 7.28/6.87 ((~ bnd_c1_0 |
% 7.28/6.87 (ALL X102.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c4_1 X102 | ~ bnd_c7_1 X102) |
% 7.28/6.87 ~ bnd_c8_1 X102)) |
% 7.28/6.87 (bnd_ndr1_0 & bnd_c9_1 bnd_a97) &
% 7.28/6.87 (ALL X103.
% 7.28/6.87 bnd_ndr1_1 bnd_a97 -->
% 7.28/6.87 (bnd_c10_2 bnd_a97 X103 | bnd_c2_2 bnd_a97 X103) |
% 7.28/6.87 bnd_c9_2 bnd_a97 X103))) &
% 7.28/6.87 ((~ bnd_c1_0 |
% 7.28/6.87 (ALL X104.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c4_1 X104 |
% 7.28/6.87 (ALL X105.
% 7.28/6.87 bnd_ndr1_1 X104 -->
% 7.28/6.87 (bnd_c3_2 X104 X105 | bnd_c5_2 X104 X105) |
% 7.28/6.87 ~ bnd_c7_2 X104 X105)) |
% 7.28/6.87 (ALL X106.
% 7.28/6.87 bnd_ndr1_1 X104 -->
% 7.28/6.87 bnd_c8_2 X104 X106 | ~ bnd_c3_2 X104 X106))) |
% 7.28/6.87 (ALL X107.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (~ bnd_c1_1 X107 | ~ bnd_c7_1 X107) |
% 7.28/6.87 (ALL X108.
% 7.28/6.87 bnd_ndr1_1 X107 -->
% 7.28/6.87 (bnd_c1_2 X107 X108 | bnd_c5_2 X107 X108) |
% 7.28/6.87 ~ bnd_c2_2 X107 X108)))) &
% 7.28/6.87 ((~ bnd_c1_0 |
% 7.28/6.87 (ALL X109.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 ~ bnd_c2_1 X109 |
% 7.28/6.87 (ALL X110.
% 7.28/6.87 bnd_ndr1_1 X109 -->
% 7.28/6.87 (bnd_c2_2 X109 X110 | ~ bnd_c7_2 X109 X110) |
% 7.28/6.87 ~ bnd_c9_2 X109 X110))) |
% 7.28/6.87 (((((bnd_ndr1_0 & ~ bnd_c8_1 bnd_a98) &
% 7.28/6.87 (ALL X111.
% 7.28/6.87 bnd_ndr1_1 bnd_a98 -->
% 7.28/6.87 bnd_c5_2 bnd_a98 X111 |
% 7.28/6.87 ~ bnd_c7_2 bnd_a98 X111)) &
% 7.28/6.87 bnd_ndr1_1 bnd_a98) &
% 7.28/6.87 bnd_c7_2 bnd_a98 bnd_a99) &
% 7.28/6.87 bnd_c8_2 bnd_a98 bnd_a99) &
% 7.28/6.87 ~ bnd_c1_2 bnd_a98 bnd_a99)) &
% 7.28/6.87 ((~ bnd_c1_0 |
% 7.28/6.87 (ALL X112.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 ~ bnd_c5_1 X112 |
% 7.28/6.87 ((bnd_ndr1_1 X112 & bnd_c3_2 X112 bnd_a100) &
% 7.28/6.87 ~ bnd_c1_2 X112 bnd_a100) &
% 7.28/6.87 ~ bnd_c8_2 X112 bnd_a100)) |
% 7.28/6.87 (((((((bnd_ndr1_0 &
% 7.28/6.87 (ALL X113.
% 7.28/6.87 bnd_ndr1_1 bnd_a101 -->
% 7.28/6.87 bnd_c2_2 bnd_a101 X113 |
% 7.28/6.87 ~ bnd_c5_2 bnd_a101 X113)) &
% 7.28/6.87 bnd_ndr1_1 bnd_a101) &
% 7.28/6.87 bnd_c7_2 bnd_a101 bnd_a102) &
% 7.28/6.87 ~ bnd_c3_2 bnd_a101 bnd_a102) &
% 7.28/6.87 bnd_ndr1_1 bnd_a101) &
% 7.28/6.87 ~ bnd_c3_2 bnd_a101 bnd_a103) &
% 7.28/6.87 ~ bnd_c4_2 bnd_a101 bnd_a103) &
% 7.28/6.87 ~ bnd_c9_2 bnd_a101 bnd_a103)) &
% 7.28/6.87 (~ bnd_c1_0 |
% 7.28/6.87 ((((((((bnd_ndr1_0 & bnd_c1_1 bnd_a104) &
% 7.28/6.87 bnd_ndr1_1 bnd_a104) &
% 7.28/6.87 bnd_c1_2 bnd_a104 bnd_a105) &
% 7.28/6.87 bnd_c8_2 bnd_a104 bnd_a105) &
% 7.28/6.87 ~ bnd_c2_2 bnd_a104 bnd_a105) &
% 7.28/6.87 bnd_ndr1_1 bnd_a104) &
% 7.28/6.87 bnd_c4_2 bnd_a104 bnd_a106) &
% 7.28/6.87 ~ bnd_c2_2 bnd_a104 bnd_a106) &
% 7.28/6.87 ~ bnd_c5_2 bnd_a104 bnd_a106)) &
% 7.28/6.87 ((~ bnd_c10_0 | ~ bnd_c2_0) |
% 7.28/6.87 (((((bnd_ndr1_0 & bnd_c1_1 bnd_a107) &
% 7.28/6.87 (ALL X114.
% 7.28/6.87 bnd_ndr1_1 bnd_a107 -->
% 7.28/6.87 (bnd_c10_2 bnd_a107 X114 | bnd_c3_2 bnd_a107 X114) |
% 7.28/6.87 ~ bnd_c7_2 bnd_a107 X114)) &
% 7.28/6.87 bnd_ndr1_1 bnd_a107) &
% 7.28/6.87 bnd_c5_2 bnd_a107 bnd_a108) &
% 7.28/6.87 bnd_c8_2 bnd_a107 bnd_a108) &
% 7.28/6.87 ~ bnd_c6_2 bnd_a107 bnd_a108)) &
% 7.28/6.87 ((~ bnd_c10_0 | ~ bnd_c3_0) |
% 7.28/6.87 (ALL X115.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c7_1 X115 |
% 7.28/6.87 ((bnd_ndr1_1 X115 & bnd_c5_2 X115 bnd_a109) &
% 7.28/6.87 ~ bnd_c10_2 X115 bnd_a109) &
% 7.28/6.87 ~ bnd_c3_2 X115 bnd_a109) |
% 7.28/6.87 ((bnd_ndr1_1 X115 & bnd_c9_2 X115 bnd_a110) &
% 7.28/6.87 ~ bnd_c1_2 X115 bnd_a110) &
% 7.28/6.87 ~ bnd_c7_2 X115 bnd_a110))) &
% 7.28/6.87 ((~ bnd_c10_0 | ~ bnd_c6_0) |
% 7.28/6.87 (ALL X116.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (~ bnd_c3_1 X116 | ~ bnd_c4_1 X116) |
% 7.28/6.87 (ALL X117.
% 7.28/6.87 bnd_ndr1_1 X116 -->
% 7.28/6.87 (bnd_c1_2 X116 X117 | bnd_c7_2 X116 X117) |
% 7.28/6.87 ~ bnd_c9_2 X116 X117)))) &
% 7.28/6.87 ((~ bnd_c10_0 | ~ bnd_c7_0) |
% 7.28/6.87 (((((((bnd_ndr1_0 &
% 7.28/6.87 (ALL X118.
% 7.28/6.87 bnd_ndr1_1 bnd_a111 -->
% 7.28/6.87 (bnd_c6_2 bnd_a111 X118 | bnd_c9_2 bnd_a111 X118) |
% 7.28/6.87 ~ bnd_c7_2 bnd_a111 X118)) &
% 7.28/6.87 bnd_ndr1_1 bnd_a111) &
% 7.28/6.87 bnd_c6_2 bnd_a111 bnd_a112) &
% 7.28/6.87 bnd_c8_2 bnd_a111 bnd_a112) &
% 7.28/6.87 ~ bnd_c4_2 bnd_a111 bnd_a112) &
% 7.28/6.87 bnd_ndr1_1 bnd_a111) &
% 7.28/6.87 bnd_c7_2 bnd_a111 bnd_a113) &
% 7.28/6.87 ~ bnd_c10_2 bnd_a111 bnd_a113)) &
% 7.28/6.87 ((~ bnd_c10_0 | ~ bnd_c8_0) | ~ bnd_c9_0)) &
% 7.28/6.87 ((~ bnd_c10_0 |
% 7.28/6.87 (ALL X119.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c1_1 X119 | bnd_c9_1 X119) | ~ bnd_c10_1 X119)) |
% 7.28/6.87 (((((bnd_ndr1_0 & ~ bnd_c5_1 bnd_a114) &
% 7.28/6.87 (ALL X120.
% 7.28/6.87 bnd_ndr1_1 bnd_a114 -->
% 7.28/6.87 (bnd_c1_2 bnd_a114 X120 | bnd_c3_2 bnd_a114 X120) |
% 7.28/6.87 bnd_c5_2 bnd_a114 X120)) &
% 7.28/6.87 bnd_ndr1_1 bnd_a114) &
% 7.28/6.87 bnd_c3_2 bnd_a114 bnd_a115) &
% 7.28/6.87 ~ bnd_c2_2 bnd_a114 bnd_a115) &
% 7.28/6.87 ~ bnd_c9_2 bnd_a114 bnd_a115)) &
% 7.28/6.87 ((~ bnd_c10_0 |
% 7.28/6.87 (ALL X121.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c9_1 X121 | ~ bnd_c1_1 X121) |
% 7.28/6.87 ((bnd_ndr1_1 X121 & bnd_c7_2 X121 bnd_a116) &
% 7.28/6.87 ~ bnd_c3_2 X121 bnd_a116) &
% 7.28/6.87 ~ bnd_c4_2 X121 bnd_a116)) |
% 7.28/6.87 (((((bnd_ndr1_0 & bnd_c9_1 bnd_a117) & ~ bnd_c5_1 bnd_a117) &
% 7.28/6.87 bnd_ndr1_1 bnd_a117) &
% 7.28/6.87 bnd_c10_2 bnd_a117 bnd_a118) &
% 7.28/6.87 bnd_c5_2 bnd_a117 bnd_a118) &
% 7.28/6.87 ~ bnd_c3_2 bnd_a117 bnd_a118)) &
% 7.28/6.87 ((~ bnd_c10_0 |
% 7.28/6.87 (((((bnd_ndr1_0 & bnd_c5_1 bnd_a119) & bnd_c9_1 bnd_a119) &
% 7.28/6.87 bnd_ndr1_1 bnd_a119) &
% 7.28/6.87 bnd_c1_2 bnd_a119 bnd_a120) &
% 7.28/6.87 ~ bnd_c10_2 bnd_a119 bnd_a120) &
% 7.28/6.87 ~ bnd_c4_2 bnd_a119 bnd_a120) |
% 7.28/6.87 (((((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a121) &
% 7.28/6.87 (ALL X122.
% 7.28/6.87 bnd_ndr1_1 bnd_a121 -->
% 7.28/6.87 (bnd_c1_2 bnd_a121 X122 | ~ bnd_c10_2 bnd_a121 X122) |
% 7.28/6.87 ~ bnd_c7_2 bnd_a121 X122)) &
% 7.28/6.87 bnd_ndr1_1 bnd_a121) &
% 7.28/6.87 bnd_c2_2 bnd_a121 bnd_a122) &
% 7.28/6.87 ~ bnd_c8_2 bnd_a121 bnd_a122) &
% 7.28/6.87 ~ bnd_c9_2 bnd_a121 bnd_a122)) &
% 7.28/6.87 (~ bnd_c2_0 | ~ bnd_c6_0)) &
% 7.28/6.87 ((~ bnd_c2_0 | ~ bnd_c9_0) |
% 7.28/6.87 (ALL X123.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (~ bnd_c5_1 X123 | ~ bnd_c9_1 X123) |
% 7.28/6.87 (ALL X124.
% 7.28/6.87 bnd_ndr1_1 X123 -->
% 7.28/6.87 (bnd_c2_2 X123 X124 | ~ bnd_c10_2 X123 X124) |
% 7.28/6.87 ~ bnd_c7_2 X123 X124)))) &
% 7.28/6.87 ((~ bnd_c3_0 | ~ bnd_c4_0) | ~ bnd_c5_0)) &
% 7.28/6.87 ((~ bnd_c3_0 | ~ bnd_c6_0) | ~ bnd_c8_0)) &
% 7.28/6.87 (~ bnd_c3_0 |
% 7.28/6.87 (ALL X125.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c4_1 X125 | bnd_c9_1 X125) |
% 7.28/6.87 (ALL X126.
% 7.28/6.87 bnd_ndr1_1 X125 -->
% 7.28/6.87 (~ bnd_c1_2 X125 X126 | ~ bnd_c10_2 X125 X126) |
% 7.28/6.87 ~ bnd_c5_2 X125 X126)))) &
% 7.28/6.87 ((~ bnd_c3_0 |
% 7.28/6.87 (ALL X127.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c8_1 X127 |
% 7.28/6.87 (ALL X128.
% 7.28/6.87 bnd_ndr1_1 X127 -->
% 7.28/6.87 (bnd_c7_2 X127 X128 | bnd_c8_2 X127 X128) |
% 7.28/6.87 ~ bnd_c5_2 X127 X128)) |
% 7.28/6.87 (ALL X129.
% 7.28/6.87 bnd_ndr1_1 X127 -->
% 7.28/6.87 (~ bnd_c2_2 X127 X129 | ~ bnd_c6_2 X127 X129) |
% 7.28/6.87 ~ bnd_c9_2 X127 X129))) |
% 7.28/6.87 (ALL X130.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c9_1 X130 |
% 7.28/6.87 ((bnd_ndr1_1 X130 & bnd_c1_2 X130 bnd_a123) &
% 7.28/6.87 bnd_c7_2 X130 bnd_a123) &
% 7.28/6.87 ~ bnd_c4_2 X130 bnd_a123) |
% 7.28/6.87 ((bnd_ndr1_1 X130 & bnd_c3_2 X130 bnd_a124) &
% 7.28/6.87 ~ bnd_c4_2 X130 bnd_a124) &
% 7.28/6.87 ~ bnd_c6_2 X130 bnd_a124))) &
% 7.28/6.87 ((~ bnd_c3_0 |
% 7.28/6.87 (ALL X131.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c9_1 X131 |
% 7.28/6.87 ((bnd_ndr1_1 X131 & bnd_c1_2 X131 bnd_a125) &
% 7.28/6.87 bnd_c4_2 X131 bnd_a125) &
% 7.28/6.87 ~ bnd_c8_2 X131 bnd_a125) |
% 7.28/6.87 (bnd_ndr1_1 X131 & bnd_c4_2 X131 bnd_a126) &
% 7.28/6.87 ~ bnd_c10_2 X131 bnd_a126)) |
% 7.28/6.87 (((((bnd_ndr1_0 & ~ bnd_c6_1 bnd_a127) & ~ bnd_c9_1 bnd_a127) &
% 7.28/6.87 bnd_ndr1_1 bnd_a127) &
% 7.28/6.87 bnd_c1_2 bnd_a127 bnd_a128) &
% 7.28/6.87 bnd_c10_2 bnd_a127 bnd_a128) &
% 7.28/6.87 bnd_c7_2 bnd_a127 bnd_a128)) &
% 7.28/6.87 ((~ bnd_c3_0 |
% 7.28/6.87 (ALL X132. bnd_ndr1_0 --> ~ bnd_c10_1 X132 | ~ bnd_c3_1 X132)) |
% 7.28/6.87 (ALL X133.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (~ bnd_c7_1 X133 |
% 7.28/6.87 (ALL X134.
% 7.28/6.87 bnd_ndr1_1 X133 -->
% 7.28/6.87 (bnd_c1_2 X133 X134 | ~ bnd_c8_2 X133 X134) |
% 7.28/6.87 ~ bnd_c9_2 X133 X134)) |
% 7.28/6.87 (ALL X135.
% 7.28/6.87 bnd_ndr1_1 X133 -->
% 7.28/6.87 (bnd_c3_2 X133 X135 | bnd_c6_2 X133 X135) |
% 7.28/6.87 ~ bnd_c2_2 X133 X135)))) &
% 7.28/6.87 ((~ bnd_c4_0 |
% 7.28/6.87 ((bnd_ndr1_0 & bnd_c2_1 bnd_a129) & ~ bnd_c6_1 bnd_a129) &
% 7.28/6.87 (ALL X136.
% 7.28/6.87 bnd_ndr1_1 bnd_a129 -->
% 7.28/6.87 (bnd_c6_2 bnd_a129 X136 | ~ bnd_c8_2 bnd_a129 X136) |
% 7.28/6.87 ~ bnd_c9_2 bnd_a129 X136)) |
% 7.28/6.87 ((((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a130) &
% 7.28/6.87 ~ bnd_c3_1 bnd_a130) &
% 7.28/6.87 bnd_ndr1_1 bnd_a130) &
% 7.28/6.87 ~ bnd_c3_2 bnd_a130 bnd_a131) &
% 7.28/6.87 ~ bnd_c6_2 bnd_a130 bnd_a131)) &
% 7.28/6.87 (~ bnd_c4_0 |
% 7.28/6.87 (((((bnd_ndr1_0 & bnd_c4_1 bnd_a132) &
% 7.28/6.87 bnd_c6_1 bnd_a132) &
% 7.28/6.87 bnd_ndr1_1 bnd_a132) &
% 7.28/6.87 bnd_c2_2 bnd_a132 bnd_a133) &
% 7.28/6.87 bnd_c8_2 bnd_a132 bnd_a133) &
% 7.28/6.87 ~ bnd_c4_2 bnd_a132 bnd_a133)) &
% 7.28/6.87 ((~ bnd_c4_0 |
% 7.28/6.87 ((((((((bnd_ndr1_0 &
% 7.28/6.87 bnd_c7_1 bnd_a134) &
% 7.28/6.87 bnd_ndr1_1 bnd_a134) &
% 7.28/6.87 bnd_c1_2 bnd_a134 bnd_a135) &
% 7.28/6.87 ~ bnd_c10_2 bnd_a134 bnd_a135) &
% 7.28/6.87 ~ bnd_c6_2 bnd_a134 bnd_a135) &
% 7.28/6.87 bnd_ndr1_1 bnd_a134) &
% 7.28/6.87 bnd_c2_2 bnd_a134 bnd_a136) &
% 7.28/6.87 bnd_c8_2 bnd_a134 bnd_a136) &
% 7.28/6.87 ~ bnd_c10_2 bnd_a134 bnd_a136) |
% 7.28/6.87 (((((bnd_ndr1_0 & ~ bnd_c5_1 bnd_a137) &
% 7.28/6.87 ~ bnd_c8_1 bnd_a137) &
% 7.28/6.87 bnd_ndr1_1 bnd_a137) &
% 7.28/6.87 bnd_c10_2 bnd_a137 bnd_a138) &
% 7.28/6.87 bnd_c5_2 bnd_a137 bnd_a138) &
% 7.28/6.87 ~ bnd_c6_2 bnd_a137 bnd_a138)) &
% 7.28/6.87 ((~ bnd_c5_0 | ~ bnd_c6_0) |
% 7.28/6.87 ((((bnd_ndr1_0 & bnd_c6_1 bnd_a139) &
% 7.28/6.87 ~ bnd_c2_1 bnd_a139) &
% 7.28/6.87 bnd_ndr1_1 bnd_a139) &
% 7.28/6.87 bnd_c6_2 bnd_a139 bnd_a140) &
% 7.28/6.87 ~ bnd_c1_2 bnd_a139 bnd_a140)) &
% 7.28/6.87 ((~ bnd_c5_0 | ~ bnd_c9_0) |
% 7.28/6.87 (((((bnd_ndr1_0 & ~ bnd_c9_1 bnd_a141) &
% 7.28/6.87 (ALL X137.
% 7.28/6.87 bnd_ndr1_1 bnd_a141 -->
% 7.28/6.87 (bnd_c10_2 bnd_a141 X137 | bnd_c6_2 bnd_a141 X137) |
% 7.28/6.87 ~ bnd_c8_2 bnd_a141 X137)) &
% 7.28/6.87 bnd_ndr1_1 bnd_a141) &
% 7.28/6.87 ~ bnd_c10_2 bnd_a141 bnd_a142) &
% 7.28/6.87 ~ bnd_c3_2 bnd_a141 bnd_a142) &
% 7.28/6.87 ~ bnd_c7_2 bnd_a141 bnd_a142)) &
% 7.28/6.87 ((~ bnd_c5_0 |
% 7.28/6.87 (ALL X138.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (~ bnd_c8_1 X138 |
% 7.28/6.87 (ALL X139. bnd_ndr1_1 X138 --> bnd_c6_2 X138 X139 | bnd_c7_2 X138 X139)) |
% 7.28/6.87 (bnd_ndr1_1 X138 &
% 7.28/6.87 bnd_c10_2 X138 bnd_a143) &
% 7.28/6.87 bnd_c5_2 X138 bnd_a143)) |
% 7.28/6.87 (ALL X140.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 ((ALL X141.
% 7.28/6.87 bnd_ndr1_1 X140 --> bnd_c3_2 X140 X141 | ~ bnd_c1_2 X140 X141) |
% 7.28/6.87 (ALL X142.
% 7.28/6.87 bnd_ndr1_1 X140 -->
% 7.28/6.87 (bnd_c7_2 X140 X142 | ~ bnd_c2_2 X140 X142) | ~ bnd_c3_2 X140 X142)) |
% 7.28/6.87 ((bnd_ndr1_1 X140 &
% 7.28/6.87 bnd_c10_2 X140 bnd_a144) &
% 7.28/6.87 bnd_c6_2 X140 bnd_a144) &
% 7.28/6.87 ~ bnd_c8_2 X140 bnd_a144))) &
% 7.28/6.87 ((~ bnd_c5_0 |
% 7.28/6.87 ((bnd_ndr1_0 & bnd_c1_1 bnd_a145) &
% 7.28/6.87 ~ bnd_c8_1 bnd_a145) &
% 7.28/6.87 (ALL X143.
% 7.28/6.87 bnd_ndr1_1 bnd_a145 -->
% 7.28/6.87 (bnd_c2_2 bnd_a145 X143 |
% 7.28/6.87 bnd_c9_2 bnd_a145 X143) |
% 7.28/6.87 ~ bnd_c10_2 bnd_a145 X143)) |
% 7.28/6.87 ((((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a146) &
% 7.28/6.87 bnd_ndr1_1 bnd_a146) &
% 7.28/6.87 bnd_c10_2 bnd_a146 bnd_a147) &
% 7.28/6.87 bnd_c3_2 bnd_a146 bnd_a147) &
% 7.28/6.87 ~ bnd_c5_2 bnd_a146 bnd_a147)) &
% 7.28/6.87 ((~ bnd_c6_0 |
% 7.28/6.87 (ALL X144.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c1_1 X144 | bnd_c4_1 X144) |
% 7.28/6.87 ~ bnd_c5_1 X144)) |
% 7.28/6.87 ((((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a148) &
% 7.28/6.87 bnd_ndr1_1 bnd_a148) &
% 7.28/6.87 bnd_c7_2 bnd_a148 bnd_a149) &
% 7.28/6.87 bnd_c9_2 bnd_a148 bnd_a149) &
% 7.28/6.87 ~ bnd_c3_2 bnd_a148 bnd_a149)) &
% 7.28/6.87 ((~ bnd_c6_0 |
% 7.28/6.87 (ALL X145.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c2_1 X145 | ~ bnd_c9_1 X145) |
% 7.28/6.87 ((bnd_ndr1_1 X145 &
% 7.28/6.87 ~ bnd_c10_2 X145 bnd_a150) &
% 7.28/6.87 ~ bnd_c7_2 X145 bnd_a150) &
% 7.28/6.87 ~ bnd_c8_2 X145 bnd_a150)) |
% 7.28/6.87 (ALL X146.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 ((ALL X147.
% 7.28/6.87 bnd_ndr1_1 X146 -->
% 7.28/6.87 (bnd_c10_2 X146 X147 | bnd_c5_2 X146 X147) | ~ bnd_c6_2 X146 X147) |
% 7.28/6.87 (ALL X148.
% 7.28/6.87 bnd_ndr1_1 X146 -->
% 7.28/6.87 (bnd_c5_2 X146 X148 | bnd_c6_2 X146 X148) | ~ bnd_c3_2 X146 X148)) |
% 7.28/6.87 (ALL X149.
% 7.28/6.87 bnd_ndr1_1 X146 -->
% 7.28/6.87 (~ bnd_c1_2 X146 X149 |
% 7.28/6.87 ~ bnd_c10_2 X146 X149) |
% 7.28/6.87 ~ bnd_c9_2 X146 X149)))) &
% 7.28/6.87 ((~ bnd_c7_0 | ~ bnd_c8_0) |
% 7.28/6.87 (ALL X150.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c2_1 X150 | bnd_c3_1 X150) |
% 7.28/6.87 ~ bnd_c9_1 X150))) &
% 7.28/6.87 ((~ bnd_c7_0 | ~ bnd_c8_0) |
% 7.28/6.87 (ALL X151.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 ~ bnd_c2_1 X151 |
% 7.28/6.87 ((bnd_ndr1_1 X151 & bnd_c4_2 X151 bnd_a151) &
% 7.28/6.87 ~ bnd_c6_2 X151 bnd_a151) &
% 7.28/6.87 ~ bnd_c9_2 X151 bnd_a151))) &
% 7.28/6.87 ((~ bnd_c7_0 | ~ bnd_c8_0) |
% 7.28/6.87 (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a152) &
% 7.28/6.87 bnd_c10_2 bnd_a152 bnd_a153) &
% 7.28/6.87 bnd_c6_2 bnd_a152 bnd_a153) &
% 7.28/6.87 bnd_c7_2 bnd_a152 bnd_a153) &
% 7.28/6.87 bnd_ndr1_1 bnd_a152) &
% 7.28/6.87 bnd_c3_2 bnd_a152 bnd_a154) &
% 7.28/6.87 bnd_c8_2 bnd_a152 bnd_a154) &
% 7.28/6.87 ~ bnd_c1_2 bnd_a152 bnd_a154)) &
% 7.28/6.87 ((~ bnd_c7_0 |
% 7.28/6.87 (ALL X152.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (~ bnd_c6_1 X152 | ~ bnd_c8_1 X152) |
% 7.28/6.87 ((bnd_ndr1_1 X152 &
% 7.28/6.87 ~ bnd_c1_2 X152 bnd_a155) &
% 7.28/6.87 ~ bnd_c7_2 X152 bnd_a155) &
% 7.28/6.87 ~ bnd_c9_2 X152 bnd_a155)) |
% 7.28/6.87 (ALL X153.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (~ bnd_c6_1 X153 |
% 7.28/6.87 ((bnd_ndr1_1 X153 & bnd_c10_2 X153 bnd_a156) &
% 7.28/6.87 bnd_c3_2 X153 bnd_a156) &
% 7.28/6.87 ~ bnd_c2_2 X153 bnd_a156) |
% 7.28/6.87 ((bnd_ndr1_1 X153 & bnd_c6_2 X153 bnd_a157) &
% 7.28/6.87 bnd_c8_2 X153 bnd_a157) &
% 7.28/6.87 ~ bnd_c1_2 X153 bnd_a157))) &
% 7.28/6.87 ((~ bnd_c7_0 |
% 7.28/6.87 (((((bnd_ndr1_0 & bnd_c1_1 bnd_a158) &
% 7.28/6.87 ~ bnd_c6_1 bnd_a158) &
% 7.28/6.87 bnd_ndr1_1 bnd_a158) &
% 7.28/6.87 bnd_c1_2 bnd_a158 bnd_a159) &
% 7.28/6.87 bnd_c10_2 bnd_a158 bnd_a159) &
% 7.28/6.87 ~ bnd_c9_2 bnd_a158 bnd_a159) |
% 7.28/6.87 ((bnd_ndr1_0 & ~ bnd_c10_1 bnd_a160) &
% 7.28/6.87 (ALL X154.
% 7.28/6.87 bnd_ndr1_1 bnd_a160 -->
% 7.28/6.87 (bnd_c1_2 bnd_a160 X154 |
% 7.28/6.87 bnd_c2_2 bnd_a160 X154) |
% 7.28/6.87 bnd_c9_2 bnd_a160 X154)) &
% 7.28/6.87 (ALL X155.
% 7.28/6.87 bnd_ndr1_1 bnd_a160 -->
% 7.28/6.87 (bnd_c2_2 bnd_a160 X155 |
% 7.28/6.87 bnd_c6_2 bnd_a160 X155) |
% 7.28/6.87 ~ bnd_c4_2 bnd_a160 X155))) &
% 7.28/6.87 ((~ bnd_c8_0 | ~ bnd_c9_0) |
% 7.28/6.87 (ALL X156.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 bnd_c10_1 X156 |
% 7.28/6.87 ((bnd_ndr1_1 X156 & bnd_c4_2 X156 bnd_a161) &
% 7.28/6.87 bnd_c5_2 X156 bnd_a161) &
% 7.28/6.87 bnd_c6_2 X156 bnd_a161))) &
% 7.28/6.87 ((~ bnd_c8_0 | ~ bnd_c9_0) |
% 7.28/6.87 (((((bnd_ndr1_0 & ~ bnd_c10_1 bnd_a162) &
% 7.28/6.87 ~ bnd_c9_1 bnd_a162) &
% 7.28/6.87 bnd_ndr1_1 bnd_a162) &
% 7.28/6.87 bnd_c2_2 bnd_a162 bnd_a163) &
% 7.28/6.87 bnd_c5_2 bnd_a162 bnd_a163) &
% 7.28/6.87 bnd_c9_2 bnd_a162 bnd_a163)) &
% 7.28/6.87 ((~ bnd_c8_0 |
% 7.28/6.87 (ALL X157.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 bnd_c3_1 X157 |
% 7.28/6.87 (ALL X158.
% 7.28/6.87 bnd_ndr1_1 X157 -->
% 7.28/6.87 (bnd_c6_2 X157 X158 | ~ bnd_c4_2 X157 X158) |
% 7.28/6.87 ~ bnd_c9_2 X157 X158))) |
% 7.28/6.87 ((bnd_ndr1_0 & ~ bnd_c3_1 bnd_a164) &
% 7.28/6.87 (ALL X159.
% 7.28/6.87 bnd_ndr1_1 bnd_a164 -->
% 7.28/6.87 (bnd_c5_2 bnd_a164 X159 |
% 7.28/6.87 bnd_c7_2 bnd_a164 X159) |
% 7.28/6.87 bnd_c9_2 bnd_a164 X159)) &
% 7.28/6.87 (ALL X160.
% 7.28/6.87 bnd_ndr1_1 bnd_a164 -->
% 7.28/6.87 bnd_c8_2 bnd_a164 X160 |
% 7.28/6.87 ~ bnd_c6_2 bnd_a164 X160))) &
% 7.28/6.87 ((~ bnd_c8_0 |
% 7.28/6.87 (ALL X161.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c6_1 X161 |
% 7.28/6.87 (ALL X162.
% 7.28/6.87 bnd_ndr1_1 X161 -->
% 7.28/6.87 (bnd_c6_2 X161 X162 | ~ bnd_c2_2 X161 X162) |
% 7.28/6.87 ~ bnd_c4_2 X161 X162)) |
% 7.28/6.87 (ALL X163.
% 7.28/6.87 bnd_ndr1_1 X161 -->
% 7.28/6.87 (bnd_c9_2 X161 X163 | ~ bnd_c2_2 X161 X163) |
% 7.28/6.87 ~ bnd_c3_2 X161 X163))) |
% 7.28/6.87 ((((bnd_ndr1_0 & bnd_c4_1 bnd_a165) &
% 7.28/6.87 bnd_ndr1_1 bnd_a165) &
% 7.28/6.87 bnd_c10_2 bnd_a165 bnd_a166) &
% 7.28/6.87 bnd_c5_2 bnd_a165 bnd_a166) &
% 7.28/6.87 bnd_c9_2 bnd_a165 bnd_a166)) &
% 7.28/6.87 ((~ bnd_c8_0 |
% 7.28/6.87 (ALL X164.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (~ bnd_c1_1 X164 |
% 7.28/6.87 ((bnd_ndr1_1 X164 & bnd_c1_2 X164 bnd_a167) &
% 7.28/6.87 bnd_c10_2 X164 bnd_a167) &
% 7.28/6.87 bnd_c8_2 X164 bnd_a167) |
% 7.28/6.87 ((bnd_ndr1_1 X164 & bnd_c1_2 X164 bnd_a168) &
% 7.28/6.87 bnd_c5_2 X164 bnd_a168) &
% 7.28/6.87 ~ bnd_c6_2 X164 bnd_a168)) |
% 7.28/6.87 (((((bnd_ndr1_0 &
% 7.28/6.87 (ALL X165.
% 7.28/6.87 bnd_ndr1_1 bnd_a169 -->
% 7.28/6.87 (bnd_c1_2 bnd_a169 X165 |
% 7.28/6.87 bnd_c3_2 bnd_a169 X165) |
% 7.28/6.87 bnd_c8_2 bnd_a169 X165)) &
% 7.28/6.87 (ALL X166.
% 7.28/6.87 bnd_ndr1_1 bnd_a169 -->
% 7.28/6.87 (bnd_c2_2 bnd_a169 X166 |
% 7.28/6.87 ~ bnd_c1_2 bnd_a169 X166) |
% 7.28/6.87 ~ bnd_c9_2 bnd_a169 X166)) &
% 7.28/6.87 bnd_ndr1_1 bnd_a169) &
% 7.28/6.87 bnd_c5_2 bnd_a169 bnd_a170) &
% 7.28/6.87 bnd_c6_2 bnd_a169 bnd_a170) &
% 7.28/6.87 ~ bnd_c9_2 bnd_a169 bnd_a170)) &
% 7.28/6.87 ((~ bnd_c8_0 |
% 7.28/6.87 (ALL X167.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (~ bnd_c2_1 X167 | ~ bnd_c7_1 X167) |
% 7.28/6.87 (ALL X168.
% 7.28/6.87 bnd_ndr1_1 X167 -->
% 7.28/6.87 (bnd_c10_2 X167 X168 | bnd_c4_2 X167 X168) |
% 7.28/6.87 ~ bnd_c6_2 X167 X168))) |
% 7.28/6.87 ((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a171) &
% 7.28/6.87 ~ bnd_c4_1 bnd_a171) &
% 7.28/6.87 ~ bnd_c8_1 bnd_a171)) &
% 7.28/6.87 ((~ bnd_c8_0 |
% 7.28/6.87 ((((bnd_ndr1_0 & bnd_c5_1 bnd_a172) &
% 7.28/6.87 ~ bnd_c7_1 bnd_a172) &
% 7.28/6.87 bnd_ndr1_1 bnd_a172) &
% 7.28/6.87 ~ bnd_c10_2 bnd_a172 bnd_a173) &
% 7.28/6.87 ~ bnd_c6_2 bnd_a172 bnd_a173) |
% 7.28/6.87 (bnd_ndr1_0 & ~ bnd_c3_1 bnd_a174) &
% 7.28/6.87 ~ bnd_c5_1 bnd_a174)) &
% 7.28/6.87 ((~ bnd_c9_0 |
% 7.28/6.87 (ALL X169.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c3_1 X169 | bnd_c9_1 X169) |
% 7.28/6.87 ((bnd_ndr1_1 X169 & bnd_c4_2 X169 bnd_a175) &
% 7.28/6.87 bnd_c7_2 X169 bnd_a175) &
% 7.28/6.87 bnd_c9_2 X169 bnd_a175)) |
% 7.28/6.87 (ALL X170.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 ((ALL X171.
% 7.28/6.87 bnd_ndr1_1 X170 -->
% 7.28/6.87 (bnd_c1_2 X170 X171 | ~ bnd_c2_2 X170 X171) |
% 7.28/6.87 ~ bnd_c8_2 X170 X171) |
% 7.28/6.87 ((bnd_ndr1_1 X170 & bnd_c6_2 X170 bnd_a176) &
% 7.28/6.87 ~ bnd_c7_2 X170 bnd_a176) &
% 7.28/6.87 ~ bnd_c8_2 X170 bnd_a176) |
% 7.28/6.87 ((bnd_ndr1_1 X170 & bnd_c8_2 X170 bnd_a177) &
% 7.28/6.87 ~ bnd_c2_2 X170 bnd_a177) &
% 7.28/6.87 ~ bnd_c3_2 X170 bnd_a177))) &
% 7.28/6.87 ((~ bnd_c9_0 |
% 7.28/6.87 (ALL X172.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c7_1 X172 |
% 7.28/6.87 (ALL X173.
% 7.28/6.87 bnd_ndr1_1 X172 -->
% 7.28/6.87 (bnd_c10_2 X172 X173 | bnd_c9_2 X172 X173) |
% 7.28/6.87 ~ bnd_c2_2 X172 X173)) |
% 7.28/6.87 (bnd_ndr1_1 X172 & bnd_c5_2 X172 bnd_a178) &
% 7.28/6.87 bnd_c8_2 X172 bnd_a178)) |
% 7.28/6.87 (ALL X174.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 ~ bnd_c2_1 X174 |
% 7.28/6.87 ((bnd_ndr1_1 X174 & bnd_c10_2 X174 bnd_a179) &
% 7.28/6.87 ~ bnd_c1_2 X174 bnd_a179) &
% 7.28/6.87 ~ bnd_c3_2 X174 bnd_a179))) &
% 7.28/6.87 ((~ bnd_c9_0 |
% 7.28/6.87 (ALL X175.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 ((ALL X176.
% 7.28/6.87 bnd_ndr1_1 X175 -->
% 7.28/6.87 (bnd_c4_2 X175 X176 | ~ bnd_c3_2 X175 X176) |
% 7.28/6.87 ~ bnd_c7_2 X175 X176) |
% 7.28/6.87 (ALL X177.
% 7.28/6.87 bnd_ndr1_1 X175 -->
% 7.28/6.87 (bnd_c5_2 X175 X177 | ~ bnd_c1_2 X175 X177) |
% 7.28/6.87 ~ bnd_c7_2 X175 X177)) |
% 7.28/6.87 (ALL X178.
% 7.28/6.87 bnd_ndr1_1 X175 -->
% 7.28/6.87 (~ bnd_c10_2 X175 X178 | ~ bnd_c5_2 X175 X178) |
% 7.28/6.87 ~ bnd_c6_2 X175 X178))) |
% 7.28/6.87 (((((bnd_ndr1_0 & bnd_c5_1 bnd_a180) &
% 7.28/6.87 (ALL X179.
% 7.28/6.87 bnd_ndr1_1 bnd_a180 -->
% 7.28/6.87 (bnd_c1_2 bnd_a180 X179 | bnd_c2_2 bnd_a180 X179) |
% 7.28/6.87 bnd_c6_2 bnd_a180 X179)) &
% 7.28/6.87 bnd_ndr1_1 bnd_a180) &
% 7.28/6.87 bnd_c10_2 bnd_a180 bnd_a181) &
% 7.28/6.87 bnd_c7_2 bnd_a180 bnd_a181) &
% 7.28/6.87 bnd_c9_2 bnd_a180 bnd_a181)) &
% 7.28/6.87 ((~ bnd_c9_0 |
% 7.28/6.87 (bnd_ndr1_0 & bnd_c10_1 bnd_a182) & bnd_c8_1 bnd_a182) |
% 7.28/6.87 (((((bnd_ndr1_0 & ~ bnd_c6_1 bnd_a183) &
% 7.28/6.87 (ALL X180.
% 7.28/6.87 bnd_ndr1_1 bnd_a183 -->
% 7.28/6.87 bnd_c1_2 bnd_a183 X180 | ~ bnd_c4_2 bnd_a183 X180)) &
% 7.28/6.87 bnd_ndr1_1 bnd_a183) &
% 7.28/6.87 bnd_c1_2 bnd_a183 bnd_a184) &
% 7.28/6.87 ~ bnd_c6_2 bnd_a183 bnd_a184) &
% 7.28/6.87 ~ bnd_c8_2 bnd_a183 bnd_a184)) &
% 7.28/6.87 (((ALL X181. bnd_ndr1_0 --> bnd_c10_1 X181 | bnd_c2_1 X181) |
% 7.28/6.87 (ALL X182.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 ((ALL X183.
% 7.28/6.87 bnd_ndr1_1 X182 -->
% 7.28/6.87 bnd_c1_2 X182 X183 | ~ bnd_c10_2 X182 X183) |
% 7.28/6.87 (ALL X184.
% 7.28/6.87 bnd_ndr1_1 X182 -->
% 7.28/6.87 (bnd_c4_2 X182 X184 | bnd_c5_2 X182 X184) |
% 7.28/6.87 bnd_c7_2 X182 X184)) |
% 7.28/6.87 ((bnd_ndr1_1 X182 & ~ bnd_c3_2 X182 bnd_a185) &
% 7.28/6.87 ~ bnd_c5_2 X182 bnd_a185) &
% 7.28/6.87 ~ bnd_c6_2 X182 bnd_a185)) |
% 7.28/6.87 ((bnd_ndr1_0 & bnd_c3_1 bnd_a186) & ~ bnd_c2_1 bnd_a186) &
% 7.28/6.87 ~ bnd_c9_1 bnd_a186)) &
% 7.28/6.87 (((ALL X185.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c3_1 X185 | bnd_c5_1 X185) |
% 7.28/6.87 (ALL X186.
% 7.28/6.87 bnd_ndr1_1 X185 -->
% 7.28/6.87 (bnd_c5_2 X185 X186 | ~ bnd_c6_2 X185 X186) |
% 7.28/6.87 ~ bnd_c9_2 X185 X186)) |
% 7.28/6.87 ((bnd_ndr1_0 & bnd_c3_1 bnd_a187) & ~ bnd_c1_1 bnd_a187) &
% 7.28/6.87 ~ bnd_c8_1 bnd_a187) |
% 7.28/6.87 ((bnd_ndr1_0 & ~ bnd_c3_1 bnd_a188) & ~ bnd_c9_1 bnd_a188) &
% 7.28/6.87 (ALL X187.
% 7.28/6.87 bnd_ndr1_1 bnd_a188 -->
% 7.28/6.87 (bnd_c7_2 bnd_a188 X187 | ~ bnd_c2_2 bnd_a188 X187) |
% 7.28/6.87 ~ bnd_c8_2 bnd_a188 X187))) &
% 7.28/6.87 (((ALL X188.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (bnd_c3_1 X188 |
% 7.28/6.87 (ALL X189.
% 7.28/6.87 bnd_ndr1_1 X188 -->
% 7.28/6.87 (bnd_c5_2 X188 X189 | ~ bnd_c2_2 X188 X189) |
% 7.28/6.87 ~ bnd_c9_2 X188 X189)) |
% 7.28/6.87 (ALL X190.
% 7.28/6.87 bnd_ndr1_1 X188 -->
% 7.28/6.87 (bnd_c9_2 X188 X190 | ~ bnd_c4_2 X188 X190) |
% 7.28/6.87 ~ bnd_c6_2 X188 X190)) |
% 7.28/6.87 ((((((((bnd_ndr1_0 & bnd_c2_1 bnd_a189) & bnd_ndr1_1 bnd_a189) &
% 7.28/6.87 bnd_c2_2 bnd_a189 bnd_a190) &
% 7.28/6.87 bnd_c4_2 bnd_a189 bnd_a190) &
% 7.28/6.87 ~ bnd_c1_2 bnd_a189 bnd_a190) &
% 7.28/6.87 bnd_ndr1_1 bnd_a189) &
% 7.28/6.87 bnd_c2_2 bnd_a189 bnd_a191) &
% 7.28/6.87 bnd_c8_2 bnd_a189 bnd_a191) &
% 7.28/6.87 ~ bnd_c1_2 bnd_a189 bnd_a191) |
% 7.28/6.87 (((((bnd_ndr1_0 & bnd_c3_1 bnd_a192) & bnd_c7_1 bnd_a192) &
% 7.28/6.87 bnd_ndr1_1 bnd_a192) &
% 7.28/6.87 bnd_c9_2 bnd_a192 bnd_a193) &
% 7.28/6.87 ~ bnd_c3_2 bnd_a192 bnd_a193) &
% 7.28/6.87 ~ bnd_c7_2 bnd_a192 bnd_a193)) &
% 7.28/6.87 (((ALL X191.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 bnd_c6_1 X191 |
% 7.28/6.87 (ALL X192.
% 7.28/6.87 bnd_ndr1_1 X191 -->
% 7.28/6.87 (bnd_c1_2 X191 X192 | bnd_c5_2 X191 X192) |
% 7.28/6.87 ~ bnd_c10_2 X191 X192)) |
% 7.28/6.87 ((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a194) & ~ bnd_c9_1 bnd_a194) &
% 7.28/6.87 (ALL X193.
% 7.28/6.87 bnd_ndr1_1 bnd_a194 -->
% 7.28/6.87 (bnd_c8_2 bnd_a194 X193 | ~ bnd_c1_2 bnd_a194 X193) |
% 7.28/6.87 ~ bnd_c7_2 bnd_a194 X193)) |
% 7.28/6.87 (((((((bnd_ndr1_0 &
% 7.28/6.87 (ALL X194.
% 7.28/6.87 bnd_ndr1_1 bnd_a195 -->
% 7.28/6.87 (~ bnd_c1_2 bnd_a195 X194 | ~ bnd_c2_2 bnd_a195 X194) |
% 7.28/6.87 ~ bnd_c4_2 bnd_a195 X194)) &
% 7.28/6.87 bnd_ndr1_1 bnd_a195) &
% 7.28/6.87 ~ bnd_c2_2 bnd_a195 bnd_a196) &
% 7.28/6.87 ~ bnd_c8_2 bnd_a195 bnd_a196) &
% 7.28/6.87 bnd_ndr1_1 bnd_a195) &
% 7.28/6.87 ~ bnd_c4_2 bnd_a195 bnd_a197) &
% 7.28/6.87 ~ bnd_c7_2 bnd_a195 bnd_a197) &
% 7.28/6.87 ~ bnd_c9_2 bnd_a195 bnd_a197)) &
% 7.28/6.87 (((ALL X195.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (~ bnd_c1_1 X195 |
% 7.28/6.87 (ALL X196.
% 7.28/6.87 bnd_ndr1_1 X195 -->
% 7.28/6.87 (bnd_c8_2 X195 X196 | ~ bnd_c5_2 X195 X196) |
% 7.28/6.87 ~ bnd_c7_2 X195 X196)) |
% 7.28/6.87 ((bnd_ndr1_1 X195 & bnd_c1_2 X195 bnd_a198) &
% 7.28/6.87 bnd_c4_2 X195 bnd_a198) &
% 7.28/6.87 ~ bnd_c2_2 X195 bnd_a198) |
% 7.28/6.87 ((bnd_ndr1_0 & bnd_c4_1 bnd_a199) & ~ bnd_c9_1 bnd_a199) &
% 7.28/6.87 (ALL X197.
% 7.28/6.87 bnd_ndr1_1 bnd_a199 -->
% 7.28/6.87 (bnd_c7_2 bnd_a199 X197 | ~ bnd_c3_2 bnd_a199 X197) |
% 7.28/6.87 ~ bnd_c4_2 bnd_a199 X197)) |
% 7.28/6.87 ((bnd_ndr1_0 & bnd_c8_1 bnd_a200) &
% 7.28/6.87 (ALL X198.
% 7.28/6.87 bnd_ndr1_1 bnd_a200 -->
% 7.28/6.87 (bnd_c5_2 bnd_a200 X198 | ~ bnd_c3_2 bnd_a200 X198) |
% 7.28/6.87 ~ bnd_c9_2 bnd_a200 X198)) &
% 7.28/6.87 (ALL X199.
% 7.28/6.87 bnd_ndr1_1 bnd_a200 -->
% 7.28/6.87 (bnd_c7_2 bnd_a200 X199 | bnd_c9_2 bnd_a200 X199) |
% 7.28/6.87 ~ bnd_c3_2 bnd_a200 X199))) &
% 7.28/6.87 (((ALL X200.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (~ bnd_c5_1 X200 | ~ bnd_c9_1 X200) |
% 7.28/6.87 (ALL X201.
% 7.28/6.87 bnd_ndr1_1 X200 -->
% 7.28/6.87 (bnd_c5_2 X200 X201 | ~ bnd_c10_2 X200 X201) |
% 7.28/6.87 ~ bnd_c8_2 X200 X201)) |
% 7.28/6.87 (ALL X202.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (~ bnd_c9_1 X202 |
% 7.28/6.87 (ALL X203.
% 7.28/6.87 bnd_ndr1_1 X202 -->
% 7.28/6.87 bnd_c2_2 X202 X203 | bnd_c5_2 X202 X203)) |
% 7.28/6.87 (ALL X204.
% 7.28/6.87 bnd_ndr1_1 X202 -->
% 7.28/6.87 (bnd_c2_2 X202 X204 | ~ bnd_c10_2 X202 X204) |
% 7.28/6.87 ~ bnd_c6_2 X202 X204))) |
% 7.28/6.87 (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a201) &
% 7.28/6.87 bnd_c1_2 bnd_a201 bnd_a202) &
% 7.28/6.87 ~ bnd_c3_2 bnd_a201 bnd_a202) &
% 7.28/6.87 ~ bnd_c9_2 bnd_a201 bnd_a202) &
% 7.28/6.87 bnd_ndr1_1 bnd_a201) &
% 7.28/6.87 bnd_c3_2 bnd_a201 bnd_a203) &
% 7.28/6.87 bnd_c9_2 bnd_a201 bnd_a203) &
% 7.28/6.87 ~ bnd_c7_2 bnd_a201 bnd_a203)) &
% 7.28/6.87 (((ALL X205.
% 7.28/6.87 bnd_ndr1_0 -->
% 7.28/6.87 (~ bnd_c7_1 X205 |
% 7.28/6.87 (ALL X206.
% 7.28/6.87 bnd_ndr1_1 X205 -->
% 7.28/6.87 (bnd_c1_2 X205 X206 | ~ bnd_c3_2 X205 X206) |
% 7.28/6.87 ~ bnd_c4_2 X205 X206)) |
% 7.28/6.87 (bnd_ndr1_1 X205 & bnd_c4_2 X205 bnd_a204) &
% 7.28/6.87 bnd_c8_2 X205 bnd_a204) |
% 7.28/6.87 (bnd_ndr1_0 & bnd_c10_1 bnd_a205) & bnd_c2_1 bnd_a205) |
% 7.28/6.88 ((((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a206) &
% 7.28/6.88 (ALL X207.
% 7.28/6.88 bnd_ndr1_1 bnd_a206 -->
% 7.28/6.88 (bnd_c1_2 bnd_a206 X207 | bnd_c3_2 bnd_a206 X207) |
% 7.28/6.88 ~ bnd_c7_2 bnd_a206 X207)) &
% 7.28/6.88 bnd_ndr1_1 bnd_a206) &
% 7.28/6.88 bnd_c6_2 bnd_a206 bnd_a207) &
% 7.28/6.88 ~ bnd_c8_2 bnd_a206 bnd_a207)) &
% 7.28/6.88 ((ALL X208.
% 7.28/6.88 bnd_ndr1_0 -->
% 7.28/6.88 ((ALL X209.
% 7.28/6.88 bnd_ndr1_1 X208 -->
% 7.28/6.88 (bnd_c9_2 X208 X209 | ~ bnd_c6_2 X208 X209) |
% 7.28/6.88 ~ bnd_c8_2 X208 X209) |
% 7.28/6.88 ((bnd_ndr1_1 X208 & bnd_c2_2 X208 bnd_a208) &
% 7.28/6.88 bnd_c4_2 X208 bnd_a208) &
% 7.28/6.88 bnd_c9_2 X208 bnd_a208) |
% 7.28/6.88 ((bnd_ndr1_1 X208 & bnd_c3_2 X208 bnd_a209) &
% 7.28/6.88 bnd_c5_2 X208 bnd_a209) &
% 7.28/6.88 ~ bnd_c10_2 X208 bnd_a209) |
% 7.28/6.88 ((((((((bnd_ndr1_0 & bnd_c9_1 bnd_a210) & bnd_ndr1_1 bnd_a210) &
% 7.28/6.88 bnd_c10_2 bnd_a210 bnd_a211) &
% 7.28/6.88 bnd_c5_2 bnd_a210 bnd_a211) &
% 7.28/6.88 ~ bnd_c3_2 bnd_a210 bnd_a211) &
% 7.28/6.88 bnd_ndr1_1 bnd_a210) &
% 7.28/6.88 bnd_c8_2 bnd_a210 bnd_a212) &
% 7.28/6.88 ~ bnd_c10_2 bnd_a210 bnd_a212) &
% 7.28/6.88 ~ bnd_c4_2 bnd_a210 bnd_a212)) &
% 7.28/6.88 ((((((bnd_ndr1_0 & bnd_c8_1 bnd_a213) &
% 7.28/6.88 (ALL X210.
% 7.28/6.88 bnd_ndr1_1 bnd_a213 -->
% 7.28/6.88 (bnd_c7_2 bnd_a213 X210 | ~ bnd_c2_2 bnd_a213 X210) |
% 7.28/6.88 ~ bnd_c8_2 bnd_a213 X210)) &
% 7.28/6.88 bnd_ndr1_1 bnd_a213) &
% 7.28/6.88 ~ bnd_c1_2 bnd_a213 bnd_a214) &
% 7.28/6.88 ~ bnd_c6_2 bnd_a213 bnd_a214) &
% 7.28/6.88 ~ bnd_c8_2 bnd_a213 bnd_a214 |
% 7.28/6.88 (((((((bnd_ndr1_0 & ~ bnd_c9_1 bnd_a215) & bnd_ndr1_1 bnd_a215) &
% 7.28/6.88 ~ bnd_c1_2 bnd_a215 bnd_a216) &
% 7.28/6.88 ~ bnd_c5_2 bnd_a215 bnd_a216) &
% 7.28/6.88 ~ bnd_c9_2 bnd_a215 bnd_a216) &
% 7.28/6.88 bnd_ndr1_1 bnd_a215) &
% 7.28/6.88 ~ bnd_c6_2 bnd_a215 bnd_a217) &
% 7.28/6.88 ~ bnd_c7_2 bnd_a215 bnd_a217))
% 19.21/18.73 Unfolded term: ~ ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((bnd_c1_0 |
% 19.21/18.73 bnd_c2_0) |
% 19.21/18.73 bnd_c9_0) &
% 19.21/18.73 ((bnd_c1_0 | bnd_c4_0) |
% 19.21/18.73 (ALL U.
% 19.21/18.73 bnd_ndr1_0 -->
% 19.21/18.73 ((ALL V.
% 19.21/18.73 bnd_ndr1_1 U --> bnd_c10_2 U V | ~ bnd_c2_2 U V) |
% 19.21/18.73 (ALL W.
% 19.21/18.73 bnd_ndr1_1 U -->
% 19.21/18.73 (bnd_c7_2 U W | ~ bnd_c5_2 U W) |
% 19.21/18.73 ~ bnd_c9_2 U W)) |
% 19.21/18.73 (ALL X.
% 19.21/18.73 bnd_ndr1_1 U -->
% 19.21/18.73 ~ bnd_c4_2 U X | ~ bnd_c9_2 U X)))) &
% 19.21/18.73 ((bnd_c1_0 | bnd_c4_0) |
% 19.21/18.73 (((((((bnd_ndr1_0 &
% 19.21/18.73 (ALL Y.
% 19.21/18.73 bnd_ndr1_1 bnd_a1 -->
% 19.21/18.73 (bnd_c7_2 bnd_a1 Y | ~ bnd_c3_2 bnd_a1 Y) |
% 19.21/18.73 ~ bnd_c6_2 bnd_a1 Y)) &
% 19.21/18.73 bnd_ndr1_1 bnd_a1) &
% 19.21/18.73 bnd_c6_2 bnd_a1 bnd_a2) &
% 19.21/18.73 bnd_c9_2 bnd_a1 bnd_a2) &
% 19.21/18.73 ~ bnd_c4_2 bnd_a1 bnd_a2) &
% 19.21/18.73 bnd_ndr1_1 bnd_a1) &
% 19.21/18.73 ~ bnd_c10_2 bnd_a1 bnd_a3) &
% 19.21/18.73 ~ bnd_c7_2 bnd_a1 bnd_a3)) &
% 19.21/18.73 ((bnd_c1_0 | bnd_c6_0) | bnd_c9_0)) &
% 19.21/18.73 ((bnd_c1_0 | bnd_c6_0) |
% 19.21/18.73 ((((((((bnd_ndr1_0 & bnd_c4_1 bnd_a4) & bnd_ndr1_1 bnd_a4) &
% 19.21/18.73 bnd_c6_2 bnd_a4 bnd_a5) &
% 19.21/18.73 bnd_c7_2 bnd_a4 bnd_a5) &
% 19.21/18.73 ~ bnd_c8_2 bnd_a4 bnd_a5) &
% 19.21/18.73 bnd_ndr1_1 bnd_a4) &
% 19.21/18.73 bnd_c6_2 bnd_a4 bnd_a6) &
% 19.21/18.73 ~ bnd_c2_2 bnd_a4 bnd_a6) &
% 19.21/18.73 ~ bnd_c9_2 bnd_a4 bnd_a6)) &
% 19.21/18.73 ((bnd_c1_0 | bnd_c6_0) |
% 19.21/18.73 (((((bnd_ndr1_0 &
% 19.21/18.73 (ALL Z.
% 19.21/18.73 bnd_ndr1_1 bnd_a7 -->
% 19.21/18.73 (bnd_c1_2 bnd_a7 Z | bnd_c7_2 bnd_a7 Z) |
% 19.21/18.73 ~ bnd_c3_2 bnd_a7 Z)) &
% 19.21/18.73 (ALL X1.
% 19.21/18.73 bnd_ndr1_1 bnd_a7 -->
% 19.21/18.73 (bnd_c4_2 bnd_a7 X1 | ~ bnd_c1_2 bnd_a7 X1) |
% 19.21/18.73 ~ bnd_c5_2 bnd_a7 X1)) &
% 19.21/18.73 bnd_ndr1_1 bnd_a7) &
% 19.21/18.73 bnd_c7_2 bnd_a7 bnd_a8) &
% 19.21/18.73 ~ bnd_c10_2 bnd_a7 bnd_a8) &
% 19.21/18.73 ~ bnd_c3_2 bnd_a7 bnd_a8)) &
% 19.21/18.73 ((bnd_c1_0 | ~ bnd_c10_0) | ~ bnd_c4_0)) &
% 19.21/18.73 ((bnd_c1_0 | ~ bnd_c4_0) | ~ bnd_c9_0)) &
% 19.21/18.73 ((bnd_c1_0 | ~ bnd_c5_0) |
% 19.21/18.73 (ALL X2.
% 19.21/18.73 bnd_ndr1_0 -->
% 19.21/18.73 bnd_c3_1 X2 |
% 19.21/18.73 ((bnd_ndr1_1 X2 & bnd_c2_2 X2 bnd_a9) & bnd_c3_2 X2 bnd_a9) &
% 19.21/18.73 ~ bnd_c8_2 X2 bnd_a9))) &
% 19.21/18.73 ((bnd_c1_0 | ~ bnd_c7_0) |
% 19.21/18.73 (ALL X3.
% 19.21/18.73 bnd_ndr1_0 -->
% 19.21/18.73 (~ bnd_c1_1 X3 | ~ bnd_c9_1 X3) |
% 19.21/18.73 (ALL X4.
% 19.21/18.73 bnd_ndr1_1 X3 -->
% 19.21/18.73 ~ bnd_c10_2 X3 X4 | ~ bnd_c3_2 X3 X4)))) &
% 19.21/18.73 ((bnd_c1_0 | ~ bnd_c9_0) |
% 19.21/18.73 (ALL X5.
% 19.21/18.73 bnd_ndr1_0 -->
% 19.21/18.73 (bnd_c8_1 X5 |
% 19.21/18.73 (ALL X6.
% 19.21/18.73 bnd_ndr1_1 X5 -->
% 19.21/18.73 (bnd_c4_2 X5 X6 | bnd_c9_2 X5 X6) | ~ bnd_c8_2 X5 X6)) |
% 19.21/18.73 (ALL X7.
% 19.21/18.73 bnd_ndr1_1 X5 -->
% 19.21/18.73 (bnd_c5_2 X5 X7 | bnd_c8_2 X5 X7) | ~ bnd_c10_2 X5 X7)))) &
% 19.21/18.73 ((bnd_c1_0 | ~ bnd_c9_0) |
% 19.21/18.73 (ALL X8.
% 19.21/18.73 bnd_ndr1_0 -->
% 19.21/18.73 (~ bnd_c3_1 X8 |
% 19.21/18.73 ((bnd_ndr1_1 X8 & bnd_c1_2 X8 bnd_a10) & bnd_c2_2 X8 bnd_a10) &
% 19.21/18.73 bnd_c9_2 X8 bnd_a10) |
% 19.21/18.73 ((bnd_ndr1_1 X8 & bnd_c1_2 X8 bnd_a11) & ~ bnd_c4_2 X8 bnd_a11) &
% 19.21/18.73 ~ bnd_c6_2 X8 bnd_a11))) &
% 19.21/18.73 ((bnd_c10_0 | bnd_c3_0) |
% 19.21/18.73 ((((((((bnd_ndr1_0 & ~ bnd_c9_1 bnd_a12) & bnd_ndr1_1 bnd_a12) &
% 19.21/18.73 bnd_c10_2 bnd_a12 bnd_a13) &
% 19.21/18.73 bnd_c3_2 bnd_a12 bnd_a13) &
% 19.21/18.73 ~ bnd_c1_2 bnd_a12 bnd_a13) &
% 19.21/18.73 bnd_ndr1_1 bnd_a12) &
% 19.21/18.73 bnd_c3_2 bnd_a12 bnd_a14) &
% 19.21/18.73 bnd_c5_2 bnd_a12 bnd_a14) &
% 19.21/18.73 ~ bnd_c1_2 bnd_a12 bnd_a14)) &
% 19.21/18.73 ((bnd_c10_0 | ~ bnd_c1_0) |
% 19.21/18.73 (((((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a15) & ~ bnd_c5_1 bnd_a15) &
% 19.21/18.73 bnd_ndr1_1 bnd_a15) &
% 19.21/18.73 bnd_c1_2 bnd_a15 bnd_a16) &
% 19.21/18.73 bnd_c8_2 bnd_a15 bnd_a16) &
% 19.21/18.73 ~ bnd_c5_2 bnd_a15 bnd_a16)) &
% 19.21/18.73 ((bnd_c10_0 | ~ bnd_c4_0) |
% 19.21/18.73 (ALL X9.
% 19.21/18.73 bnd_ndr1_0 -->
% 19.21/18.73 ((ALL X10.
% 19.21/18.73 bnd_ndr1_1 X9 -->
% 19.21/18.73 (bnd_c10_2 X9 X10 | ~ bnd_c2_2 X9 X10) | ~ bnd_c9_2 X9 X10) |
% 19.21/18.73 ((bnd_ndr1_1 X9 & bnd_c1_2 X9 bnd_a17) & bnd_c2_2 X9 bnd_a17) &
% 19.21/18.73 bnd_c6_2 X9 bnd_a17) |
% 19.21/18.73 ((bnd_ndr1_1 X9 & bnd_c1_2 X9 bnd_a18) & ~ bnd_c5_2 X9 bnd_a18) &
% 19.21/18.73 ~ bnd_c9_2 X9 bnd_a18))) &
% 19.21/18.73 ((bnd_c10_0 | ~ bnd_c9_0) |
% 19.21/18.73 ((bnd_ndr1_0 & bnd_c4_1 bnd_a19) & ~ bnd_c6_1 bnd_a19) &
% 19.21/18.73 (ALL X11.
% 19.21/18.73 bnd_ndr1_1 bnd_a19 -->
% 19.21/18.73 (bnd_c10_2 bnd_a19 X11 | bnd_c5_2 bnd_a19 X11) |
% 19.21/18.73 bnd_c8_2 bnd_a19 X11))) &
% 19.21/18.73 ((bnd_c10_0 |
% 19.21/18.73 (ALL X12.
% 19.21/18.73 bnd_ndr1_0 -->
% 19.21/18.73 (bnd_c10_1 X12 | ~ bnd_c2_1 X12) |
% 19.21/18.73 (ALL X13.
% 19.21/18.73 bnd_ndr1_1 X12 -->
% 19.21/18.73 (bnd_c4_2 X12 X13 | bnd_c8_2 X12 X13) | bnd_c9_2 X12 X13))) |
% 19.21/18.73 (ALL X14.
% 19.21/18.73 bnd_ndr1_0 -->
% 19.21/18.73 (~ bnd_c2_1 X14 |
% 19.21/18.73 (ALL X15.
% 19.21/18.73 bnd_ndr1_1 X14 -->
% 19.21/18.73 (bnd_c5_2 X14 X15 | bnd_c6_2 X14 X15) | ~ bnd_c2_2 X14 X15)) |
% 19.21/18.73 ((bnd_ndr1_1 X14 & bnd_c2_2 X14 bnd_a20) & bnd_c5_2 X14 bnd_a20) &
% 19.21/18.73 bnd_c7_2 X14 bnd_a20))) &
% 19.21/18.73 ((bnd_c10_0 |
% 19.21/18.73 (ALL X16.
% 19.21/18.73 bnd_ndr1_0 -->
% 19.21/18.73 (bnd_c2_1 X16 | ~ bnd_c3_1 X16) |
% 19.21/18.73 (ALL X17.
% 19.21/18.73 bnd_ndr1_1 X16 -->
% 19.21/18.73 (bnd_c1_2 X16 X17 | ~ bnd_c3_2 X16 X17) | ~ bnd_c7_2 X16 X17))) |
% 19.21/18.73 (ALL X18.
% 19.21/18.73 bnd_ndr1_0 --> (bnd_c7_1 X18 | ~ bnd_c2_1 X18) | ~ bnd_c6_1 X18))) &
% 19.21/18.73 ((bnd_c10_0 |
% 19.21/18.73 (ALL X19.
% 19.21/18.73 bnd_ndr1_0 -->
% 19.21/18.73 (bnd_c4_1 X19 | ~ bnd_c2_1 X19) |
% 19.21/18.73 (bnd_ndr1_1 X19 & bnd_c4_2 X19 bnd_a21) & ~ bnd_c8_2 X19 bnd_a21)) |
% 19.21/18.73 (ALL X20.
% 19.21/18.73 bnd_ndr1_0 -->
% 19.21/18.73 ((ALL X21.
% 19.21/18.73 bnd_ndr1_1 X20 -->
% 19.21/18.73 (bnd_c5_2 X20 X21 | ~ bnd_c4_2 X20 X21) | ~ bnd_c6_2 X20 X21) |
% 19.21/18.73 ((bnd_ndr1_1 X20 & bnd_c7_2 X20 bnd_a22) & bnd_c9_2 X20 bnd_a22) &
% 19.21/18.73 ~ bnd_c5_2 X20 bnd_a22) |
% 19.21/18.73 ((bnd_ndr1_1 X20 & bnd_c8_2 X20 bnd_a23) & ~ bnd_c2_2 X20 bnd_a23) &
% 19.21/18.73 ~ bnd_c7_2 X20 bnd_a23))) &
% 19.21/18.73 ((bnd_c10_0 |
% 19.21/18.73 (ALL X22.
% 19.21/18.73 bnd_ndr1_0 -->
% 19.21/18.73 (ALL X23.
% 19.21/18.73 bnd_ndr1_1 X22 -->
% 19.21/18.73 (bnd_c10_2 X22 X23 | bnd_c6_2 X22 X23) | bnd_c8_2 X22 X23) |
% 19.21/18.73 (ALL X24.
% 19.21/18.73 bnd_ndr1_1 X22 -->
% 19.21/18.73 (bnd_c6_2 X22 X24 | bnd_c7_2 X22 X24) | ~ bnd_c3_2 X22 X24))) |
% 19.21/18.73 (ALL X25.
% 19.21/18.73 bnd_ndr1_0 -->
% 19.21/18.73 (((bnd_ndr1_1 X25 & bnd_c1_2 X25 bnd_a24) & ~ bnd_c10_2 X25 bnd_a24) &
% 19.21/18.73 ~ bnd_c4_2 X25 bnd_a24 |
% 19.21/18.73 ((bnd_ndr1_1 X25 & bnd_c1_2 X25 bnd_a25) & ~ bnd_c2_2 X25 bnd_a25) &
% 19.21/18.73 ~ bnd_c6_2 X25 bnd_a25) |
% 19.21/18.73 ((bnd_ndr1_1 X25 & bnd_c6_2 X25 bnd_a26) & bnd_c7_2 X25 bnd_a26) &
% 19.21/18.73 ~ bnd_c1_2 X25 bnd_a26))) &
% 19.21/18.73 ((bnd_c10_0 |
% 19.21/18.73 (((((bnd_ndr1_0 & bnd_c2_1 bnd_a27) &
% 19.21/18.73 ~ bnd_c10_1 bnd_a27) &
% 19.21/18.73 bnd_ndr1_1 bnd_a27) &
% 19.21/18.73 ~ bnd_c3_2 bnd_a27 bnd_a28) &
% 19.21/18.73 ~ bnd_c5_2 bnd_a27 bnd_a28) &
% 19.21/18.73 ~ bnd_c9_2 bnd_a27 bnd_a28) |
% 19.21/18.73 ((((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a29) &
% 19.21/18.73 bnd_ndr1_1 bnd_a29) &
% 19.21/18.73 bnd_c2_2 bnd_a29 bnd_a30) &
% 19.21/18.73 bnd_c7_2 bnd_a29 bnd_a30) &
% 19.21/18.73 ~ bnd_c8_2 bnd_a29 bnd_a30)) &
% 19.21/18.73 ((bnd_c2_0 | bnd_c6_0) |
% 19.21/18.73 (bnd_ndr1_0 & bnd_c2_1 bnd_a31) &
% 19.21/18.73 (ALL X26.
% 19.21/18.73 bnd_ndr1_1 bnd_a31 -->
% 19.21/18.73 (bnd_c2_2 bnd_a31 X26 | bnd_c4_2 bnd_a31 X26) | bnd_c6_2 bnd_a31 X26))) &
% 19.21/18.73 ((bnd_c2_0 | bnd_c8_0) | ~ bnd_c9_0)) &
% 19.21/18.73 ((bnd_c2_0 | ~ bnd_c1_0) | ~ bnd_c8_0)) &
% 19.21/18.73 ((bnd_c2_0 | ~ bnd_c1_0) |
% 19.21/18.73 (((((bnd_ndr1_0 & ~ bnd_c6_1 bnd_a32) &
% 19.21/18.73 ~ bnd_c9_1 bnd_a32) &
% 19.21/18.73 bnd_ndr1_1 bnd_a32) &
% 19.21/18.73 bnd_c3_2 bnd_a32 bnd_a33) &
% 19.21/18.73 bnd_c6_2 bnd_a32 bnd_a33) &
% 19.21/18.73 ~ bnd_c4_2 bnd_a32 bnd_a33)) &
% 19.21/18.73 ((bnd_c2_0 |
% 19.21/18.73 (ALL X27.
% 19.21/18.73 bnd_ndr1_0 -->
% 19.21/18.73 (~ bnd_c5_1 X27 |
% 19.21/18.73 (ALL X28.
% 19.21/18.73 bnd_ndr1_1 X27 -->
% 19.21/18.73 (bnd_c10_2 X27 X28 | bnd_c3_2 X27 X28) | ~ bnd_c4_2 X27 X28)) |
% 19.21/18.73 ((bnd_ndr1_1 X27 &
% 19.21/18.73 bnd_c1_2 X27 bnd_a34) &
% 19.21/18.73 bnd_c4_2 X27 bnd_a34) &
% 19.21/18.73 ~ bnd_c7_2 X27 bnd_a34)) |
% 19.21/18.73 (((((bnd_ndr1_0 & ~ bnd_c9_1 bnd_a35) &
% 19.21/18.73 (ALL X29.
% 19.21/18.73 bnd_ndr1_1 bnd_a35 -->
% 19.21/18.73 (bnd_c10_2 bnd_a35 X29 | ~ bnd_c3_2 bnd_a35 X29) |
% 19.21/18.73 ~ bnd_c4_2 bnd_a35 X29)) &
% 19.21/18.73 bnd_ndr1_1 bnd_a35) &
% 19.21/18.73 bnd_c2_2 bnd_a35 bnd_a36) &
% 19.21/18.73 ~ bnd_c10_2 bnd_a35 bnd_a36) &
% 19.21/18.73 ~ bnd_c7_2 bnd_a35 bnd_a36)) &
% 19.21/18.73 ((bnd_c3_0 | bnd_c4_0) |
% 19.21/18.73 ((bnd_ndr1_0 & ~ bnd_c3_1 bnd_a37) &
% 19.21/18.73 (ALL X30.
% 19.21/18.73 bnd_ndr1_1 bnd_a37 -->
% 19.21/18.73 (bnd_c7_2 bnd_a37 X30 |
% 19.21/18.73 ~ bnd_c4_2 bnd_a37 X30) |
% 19.21/18.73 ~ bnd_c5_2 bnd_a37 X30)) &
% 19.21/18.73 (ALL X31.
% 19.21/18.73 bnd_ndr1_1 bnd_a37 -->
% 19.21/18.73 (~ bnd_c1_2 bnd_a37 X31 |
% 19.21/18.73 ~ bnd_c7_2 bnd_a37 X31) |
% 19.21/18.73 ~ bnd_c8_2 bnd_a37 X31))) &
% 19.21/18.73 ((bnd_c3_0 | bnd_c5_0) | ~ bnd_c9_0)) &
% 19.21/18.73 ((bnd_c3_0 | ~ bnd_c1_0) | ~ bnd_c4_0)) &
% 19.21/18.73 ((bnd_c3_0 | ~ bnd_c1_0) |
% 19.21/18.73 (ALL X32.
% 19.21/18.73 bnd_ndr1_0 -->
% 19.21/18.73 (bnd_c3_1 X32 | bnd_c4_1 X32) |
% 19.21/18.73 ~ bnd_c5_1 X32))) &
% 19.21/18.73 ((bnd_c3_0 | ~ bnd_c10_0) |
% 19.21/18.73 ((bnd_ndr1_0 & ~ bnd_c5_1 bnd_a38) &
% 19.21/18.73 ~ bnd_c7_1 bnd_a38) &
% 19.21/18.73 (ALL X33.
% 19.21/18.73 bnd_ndr1_1 bnd_a38 -->
% 19.21/18.73 (bnd_c2_2 bnd_a38 X33 |
% 19.21/18.73 bnd_c4_2 bnd_a38 X33) |
% 19.21/18.73 ~ bnd_c8_2 bnd_a38 X33))) &
% 19.21/18.73 ((bnd_c3_0 | ~ bnd_c2_0) |
% 19.21/18.73 ((bnd_ndr1_0 & bnd_c1_1 bnd_a39) &
% 19.21/18.73 bnd_c5_1 bnd_a39) &
% 19.21/18.73 (ALL X34.
% 19.21/18.73 bnd_ndr1_1 bnd_a39 -->
% 19.21/18.73 bnd_c3_2 bnd_a39 X34 |
% 19.21/18.73 ~ bnd_c7_2 bnd_a39 X34))) &
% 19.21/18.73 ((bnd_c3_0 | ~ bnd_c5_0) |
% 19.21/18.73 (ALL X35.
% 19.21/18.73 bnd_ndr1_0 -->
% 19.21/18.73 (((bnd_ndr1_1 X35 & bnd_c3_2 X35 bnd_a40) &
% 19.21/18.73 bnd_c5_2 X35 bnd_a40) &
% 19.21/18.73 ~ bnd_c1_2 X35 bnd_a40 |
% 19.21/18.73 ((bnd_ndr1_1 X35 & bnd_c6_2 X35 bnd_a41) &
% 19.21/18.73 ~ bnd_c4_2 X35 bnd_a41) &
% 19.21/18.73 ~ bnd_c9_2 X35 bnd_a41) |
% 19.21/18.73 ((bnd_ndr1_1 X35 & ~ bnd_c2_2 X35 bnd_a42) &
% 19.21/18.73 ~ bnd_c6_2 X35 bnd_a42) &
% 19.21/18.73 ~ bnd_c8_2 X35 bnd_a42))) &
% 19.21/18.73 ((bnd_c3_0 | ~ bnd_c6_0) |
% 19.21/18.73 (((((bnd_ndr1_0 &
% 19.21/18.73 (ALL X36.
% 19.21/18.73 bnd_ndr1_1 bnd_a43 -->
% 19.21/18.73 bnd_c1_2 bnd_a43 X36 |
% 19.21/18.73 ~ bnd_c3_2 bnd_a43 X36)) &
% 19.21/18.73 (ALL X37.
% 19.21/18.73 bnd_ndr1_1 bnd_a43 -->
% 19.21/18.73 (bnd_c3_2 bnd_a43 X37 |
% 19.21/18.73 bnd_c6_2 bnd_a43 X37) |
% 19.21/18.73 ~ bnd_c2_2 bnd_a43 X37)) &
% 19.21/18.73 bnd_ndr1_1 bnd_a43) &
% 19.21/18.73 bnd_c4_2 bnd_a43 bnd_a44) &
% 19.21/18.73 bnd_c5_2 bnd_a43 bnd_a44) &
% 19.21/18.73 bnd_c8_2 bnd_a43 bnd_a44)) &
% 19.21/18.73 ((bnd_c3_0 | ~ bnd_c7_0) |
% 19.21/18.73 (((((bnd_ndr1_0 & bnd_c7_1 bnd_a45) &
% 19.21/18.73 ~ bnd_c4_1 bnd_a45) &
% 19.21/18.73 bnd_ndr1_1 bnd_a45) &
% 19.21/18.73 bnd_c5_2 bnd_a45 bnd_a46) &
% 19.21/18.73 ~ bnd_c10_2 bnd_a45 bnd_a46) &
% 19.21/18.73 ~ bnd_c4_2 bnd_a45 bnd_a46)) &
% 19.21/18.73 ((bnd_c3_0 |
% 19.21/18.73 (ALL X38.
% 19.21/18.73 bnd_ndr1_0 -->
% 19.21/18.73 (bnd_c5_1 X38 |
% 19.21/18.73 (ALL X39.
% 19.21/18.73 bnd_ndr1_1 X38 -->
% 19.21/18.73 (bnd_c3_2 X38 X39 | bnd_c8_2 X38 X39) |
% 19.21/18.73 ~ bnd_c10_2 X38 X39)) |
% 19.21/18.73 (ALL X40.
% 19.21/18.73 bnd_ndr1_1 X38 -->
% 19.21/18.73 (bnd_c3_2 X38 X40 | bnd_c9_2 X38 X40) |
% 19.21/18.73 ~ bnd_c6_2 X38 X40))) |
% 19.21/18.73 (ALL X41.
% 19.21/18.73 bnd_ndr1_0 -->
% 19.21/18.73 (~ bnd_c2_1 X41 | ~ bnd_c8_1 X41) |
% 19.21/18.73 bnd_ndr1_1 X41 & ~ bnd_c1_2 X41 bnd_a47))) &
% 19.21/18.73 ((bnd_c3_0 |
% 19.21/18.73 (ALL X42.
% 19.21/18.73 bnd_ndr1_0 -->
% 19.21/18.73 (bnd_c9_1 X42 | ~ bnd_c7_1 X42) |
% 19.21/18.73 ((bnd_ndr1_1 X42 & bnd_c10_2 X42 bnd_a48) &
% 19.21/18.73 bnd_c8_2 X42 bnd_a48) &
% 19.21/18.73 ~ bnd_c5_2 X42 bnd_a48)) |
% 19.21/18.73 (((((bnd_ndr1_0 &
% 19.21/18.73 (ALL X43.
% 19.21/18.73 bnd_ndr1_1 bnd_a49 -->
% 19.21/18.73 (bnd_c10_2 bnd_a49 X43 |
% 19.21/18.73 bnd_c4_2 bnd_a49 X43) |
% 19.21/18.73 ~ bnd_c6_2 bnd_a49 X43)) &
% 19.21/18.73 (ALL X44.
% 19.21/18.73 bnd_ndr1_1 bnd_a49 -->
% 19.21/18.73 bnd_c3_2 bnd_a49 X44 |
% 19.21/18.73 ~ bnd_c4_2 bnd_a49 X44)) &
% 19.21/18.73 bnd_ndr1_1 bnd_a49) &
% 19.21/18.73 bnd_c2_2 bnd_a49 bnd_a50) &
% 19.21/18.73 bnd_c3_2 bnd_a49 bnd_a50) &
% 19.21/18.73 ~ bnd_c10_2 bnd_a49 bnd_a50)) &
% 19.21/18.73 ((bnd_c4_0 | bnd_c7_0) |
% 19.21/18.73 (ALL X45.
% 19.21/18.73 bnd_ndr1_0 -->
% 19.21/18.73 (bnd_c2_1 X45 | bnd_c6_1 X45) | ~ bnd_c7_1 X45))) &
% 19.21/18.73 ((bnd_c4_0 | bnd_c8_0) |
% 19.21/18.73 ((bnd_ndr1_0 & bnd_c6_1 bnd_a51) &
% 19.21/18.73 (ALL X46.
% 19.21/18.73 bnd_ndr1_1 bnd_a51 -->
% 19.21/18.73 bnd_c10_2 bnd_a51 X46 | ~ bnd_c8_2 bnd_a51 X46)) &
% 19.21/18.73 (ALL X47.
% 19.21/18.73 bnd_ndr1_1 bnd_a51 -->
% 19.21/18.73 (~ bnd_c2_2 bnd_a51 X47 | ~ bnd_c5_2 bnd_a51 X47) |
% 19.21/18.73 ~ bnd_c8_2 bnd_a51 X47))) &
% 19.21/18.73 ((bnd_c4_0 | ~ bnd_c8_0) |
% 19.21/18.73 (ALL X48.
% 19.21/18.73 bnd_ndr1_0 -->
% 19.21/18.73 (bnd_c7_1 X48 |
% 19.21/18.73 (ALL X49.
% 19.21/18.73 bnd_ndr1_1 X48 -->
% 19.21/18.73 (bnd_c7_2 X48 X49 | ~ bnd_c1_2 X48 X49) |
% 19.21/18.73 ~ bnd_c4_2 X48 X49)) |
% 19.21/18.73 (bnd_ndr1_1 X48 & bnd_c2_2 X48 bnd_a52) &
% 19.21/18.73 ~ bnd_c6_2 X48 bnd_a52))) &
% 19.21/18.73 ((bnd_c4_0 |
% 19.21/18.73 (ALL X50.
% 19.21/18.73 bnd_ndr1_0 -->
% 19.21/18.73 (bnd_c9_1 X50 |
% 19.21/18.73 ((bnd_ndr1_1 X50 & bnd_c1_2 X50 bnd_a53) &
% 19.21/18.73 bnd_c3_2 X50 bnd_a53) &
% 19.21/18.73 ~ bnd_c6_2 X50 bnd_a53) |
% 19.21/18.73 ((bnd_ndr1_1 X50 & bnd_c8_2 X50 bnd_a54) &
% 19.21/18.73 ~ bnd_c10_2 X50 bnd_a54) &
% 19.21/18.73 ~ bnd_c6_2 X50 bnd_a54)) |
% 19.21/18.73 (ALL X51.
% 19.21/18.73 bnd_ndr1_0 -->
% 19.21/18.73 (~ bnd_c4_1 X51 |
% 19.21/18.73 (ALL X52.
% 19.21/18.73 bnd_ndr1_1 X51 -->
% 19.21/18.74 (bnd_c2_2 X51 X52 | bnd_c8_2 X51 X52) |
% 19.21/18.74 ~ bnd_c6_2 X51 X52)) |
% 19.21/18.74 (bnd_ndr1_1 X51 & ~ bnd_c7_2 X51 bnd_a55) &
% 19.21/18.74 ~ bnd_c8_2 X51 bnd_a55))) &
% 19.21/18.74 ((bnd_c5_0 | bnd_c7_0) |
% 19.21/18.74 ((bnd_ndr1_0 & bnd_c4_1 bnd_a56) & ~ bnd_c10_1 bnd_a56) &
% 19.21/18.74 (ALL X53.
% 19.21/18.74 bnd_ndr1_1 bnd_a56 -->
% 19.21/18.74 (~ bnd_c3_2 bnd_a56 X53 | ~ bnd_c6_2 bnd_a56 X53) |
% 19.21/18.74 ~ bnd_c9_2 bnd_a56 X53))) &
% 19.21/18.74 ((bnd_c5_0 | bnd_c8_0) | bnd_c9_0)) &
% 19.21/18.74 (bnd_c5_0 | ~ bnd_c10_0)) &
% 19.21/18.74 ((bnd_c5_0 | ~ bnd_c4_0) |
% 19.21/18.74 (ALL X54.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c4_1 X54 |
% 19.21/18.74 ((bnd_ndr1_1 X54 & bnd_c4_2 X54 bnd_a57) &
% 19.21/18.74 ~ bnd_c5_2 X54 bnd_a57) &
% 19.21/18.74 ~ bnd_c9_2 X54 bnd_a57) |
% 19.21/18.74 ((bnd_ndr1_1 X54 & ~ bnd_c2_2 X54 bnd_a58) &
% 19.21/18.74 ~ bnd_c3_2 X54 bnd_a58) &
% 19.21/18.74 ~ bnd_c9_2 X54 bnd_a58))) &
% 19.21/18.74 ((bnd_c5_0 | ~ bnd_c8_0) |
% 19.21/18.74 (((((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a59) &
% 19.21/18.74 (ALL X55.
% 19.21/18.74 bnd_ndr1_1 bnd_a59 -->
% 19.21/18.74 (bnd_c3_2 bnd_a59 X55 | bnd_c9_2 bnd_a59 X55) |
% 19.21/18.74 ~ bnd_c10_2 bnd_a59 X55)) &
% 19.21/18.74 bnd_ndr1_1 bnd_a59) &
% 19.21/18.74 bnd_c1_2 bnd_a59 bnd_a60) &
% 19.21/18.74 ~ bnd_c3_2 bnd_a59 bnd_a60) &
% 19.21/18.74 ~ bnd_c5_2 bnd_a59 bnd_a60)) &
% 19.21/18.74 ((bnd_c5_0 | ~ bnd_c9_0) |
% 19.21/18.74 ((((((bnd_ndr1_0 & ~ bnd_c6_1 bnd_a61) & bnd_ndr1_1 bnd_a61) &
% 19.21/18.74 bnd_c3_2 bnd_a61 bnd_a62) &
% 19.21/18.74 ~ bnd_c1_2 bnd_a61 bnd_a62) &
% 19.21/18.74 bnd_ndr1_1 bnd_a61) &
% 19.21/18.74 ~ bnd_c10_2 bnd_a61 bnd_a63) &
% 19.21/18.74 ~ bnd_c5_2 bnd_a61 bnd_a63)) &
% 19.21/18.74 ((bnd_c5_0 |
% 19.21/18.74 (ALL X56.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c10_1 X56 | bnd_c6_1 X56) | ~ bnd_c1_1 X56)) |
% 19.21/18.74 (ALL X57.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (~ bnd_c6_1 X57 |
% 19.21/18.74 ((bnd_ndr1_1 X57 & bnd_c10_2 X57 bnd_a64) &
% 19.21/18.74 ~ bnd_c1_2 X57 bnd_a64) &
% 19.21/18.74 ~ bnd_c9_2 X57 bnd_a64) |
% 19.21/18.74 ((bnd_ndr1_1 X57 & bnd_c2_2 X57 bnd_a65) &
% 19.21/18.74 bnd_c4_2 X57 bnd_a65) &
% 19.21/18.74 ~ bnd_c7_2 X57 bnd_a65))) &
% 19.21/18.74 ((bnd_c5_0 |
% 19.21/18.74 (ALL X58.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c2_1 X58 | bnd_c6_1 X58) |
% 19.21/18.74 ((bnd_ndr1_1 X58 & ~ bnd_c1_2 X58 bnd_a66) &
% 19.21/18.74 ~ bnd_c5_2 X58 bnd_a66) &
% 19.21/18.74 ~ bnd_c7_2 X58 bnd_a66)) |
% 19.21/18.74 (bnd_ndr1_0 & bnd_c5_1 bnd_a67) &
% 19.21/18.74 (ALL X59.
% 19.21/18.74 bnd_ndr1_1 bnd_a67 -->
% 19.21/18.74 ~ bnd_c10_2 bnd_a67 X59 | ~ bnd_c9_2 bnd_a67 X59))) &
% 19.21/18.74 ((bnd_c5_0 |
% 19.21/18.74 (ALL X60.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c5_1 X60 | ~ bnd_c10_1 X60) |
% 19.21/18.74 ((bnd_ndr1_1 X60 & bnd_c10_2 X60 bnd_a68) &
% 19.21/18.74 bnd_c3_2 X60 bnd_a68) &
% 19.21/18.74 bnd_c7_2 X60 bnd_a68)) |
% 19.21/18.74 ((bnd_ndr1_0 & bnd_c9_1 bnd_a69) & ~ bnd_c4_1 bnd_a69) &
% 19.21/18.74 (ALL X61.
% 19.21/18.74 bnd_ndr1_1 bnd_a69 -->
% 19.21/18.74 (bnd_c2_2 bnd_a69 X61 | bnd_c5_2 bnd_a69 X61) |
% 19.21/18.74 ~ bnd_c6_2 bnd_a69 X61))) &
% 19.21/18.74 ((bnd_c5_0 |
% 19.21/18.74 (ALL X62.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (~ bnd_c9_1 X62 |
% 19.21/18.74 (ALL X63.
% 19.21/18.74 bnd_ndr1_1 X62 -->
% 19.21/18.74 (bnd_c10_2 X62 X63 | bnd_c4_2 X62 X63) |
% 19.21/18.74 bnd_c9_2 X62 X63)) |
% 19.21/18.74 ((bnd_ndr1_1 X62 & bnd_c8_2 X62 bnd_a70) &
% 19.21/18.74 ~ bnd_c10_2 X62 bnd_a70) &
% 19.21/18.74 ~ bnd_c6_2 X62 bnd_a70)) |
% 19.21/18.74 ((bnd_ndr1_0 &
% 19.21/18.74 (ALL X64.
% 19.21/18.74 bnd_ndr1_1 bnd_a71 -->
% 19.21/18.74 (bnd_c1_2 bnd_a71 X64 | ~ bnd_c4_2 bnd_a71 X64) |
% 19.21/18.74 ~ bnd_c8_2 bnd_a71 X64)) &
% 19.21/18.74 (ALL X65.
% 19.21/18.74 bnd_ndr1_1 bnd_a71 -->
% 19.21/18.74 (bnd_c2_2 bnd_a71 X65 | bnd_c7_2 bnd_a71 X65) |
% 19.21/18.74 ~ bnd_c10_2 bnd_a71 X65)) &
% 19.21/18.74 (ALL X66.
% 19.21/18.74 bnd_ndr1_1 bnd_a71 -->
% 19.21/18.74 (bnd_c5_2 bnd_a71 X66 | ~ bnd_c4_2 bnd_a71 X66) |
% 19.21/18.74 ~ bnd_c6_2 bnd_a71 X66))) &
% 19.21/18.74 ((bnd_c5_0 |
% 19.21/18.74 ((bnd_ndr1_0 & bnd_c1_1 bnd_a72) & ~ bnd_c3_1 bnd_a72) &
% 19.21/18.74 (ALL X67.
% 19.21/18.74 bnd_ndr1_1 bnd_a72 -->
% 19.21/18.74 (bnd_c10_2 bnd_a72 X67 | bnd_c5_2 bnd_a72 X67) |
% 19.21/18.74 ~ bnd_c3_2 bnd_a72 X67)) |
% 19.21/18.74 ((bnd_ndr1_0 & bnd_c4_1 bnd_a73) & ~ bnd_c6_1 bnd_a73) &
% 19.21/18.74 (ALL X68.
% 19.21/18.74 bnd_ndr1_1 bnd_a73 -->
% 19.21/18.74 bnd_c8_2 bnd_a73 X68 | ~ bnd_c10_2 bnd_a73 X68))) &
% 19.21/18.74 ((bnd_c6_0 | bnd_c7_0) |
% 19.21/18.74 (((((bnd_ndr1_0 & bnd_c4_1 bnd_a74) & bnd_c6_1 bnd_a74) &
% 19.21/18.74 bnd_ndr1_1 bnd_a74) &
% 19.21/18.74 bnd_c10_2 bnd_a74 bnd_a75) &
% 19.21/18.74 ~ bnd_c1_2 bnd_a74 bnd_a75) &
% 19.21/18.74 ~ bnd_c2_2 bnd_a74 bnd_a75)) &
% 19.21/18.74 ((bnd_c6_0 | bnd_c9_0) |
% 19.21/18.74 (ALL X69.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c4_1 X69 | bnd_c5_1 X69) |
% 19.21/18.74 ((bnd_ndr1_1 X69 & bnd_c1_2 X69 bnd_a76) & bnd_c4_2 X69 bnd_a76) &
% 19.21/18.74 ~ bnd_c5_2 X69 bnd_a76))) &
% 19.21/18.74 ((bnd_c6_0 | ~ bnd_c3_0) |
% 19.21/18.74 (ALL X70.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c8_1 X70 | ~ bnd_c2_1 X70) |
% 19.21/18.74 (ALL X71.
% 19.21/18.74 bnd_ndr1_1 X70 -->
% 19.21/18.74 (bnd_c9_2 X70 X71 | ~ bnd_c10_2 X70 X71) |
% 19.21/18.74 ~ bnd_c3_2 X70 X71)))) &
% 19.21/18.74 ((bnd_c6_0 | ~ bnd_c3_0) |
% 19.21/18.74 (ALL X72.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (~ bnd_c6_1 X72 |
% 19.21/18.74 (ALL X73.
% 19.21/18.74 bnd_ndr1_1 X72 -->
% 19.21/18.74 (bnd_c7_2 X72 X73 | ~ bnd_c2_2 X72 X73) | ~ bnd_c5_2 X72 X73)) |
% 19.21/18.74 ((bnd_ndr1_1 X72 & bnd_c1_2 X72 bnd_a77) & bnd_c3_2 X72 bnd_a77) &
% 19.21/18.74 ~ bnd_c9_2 X72 bnd_a77))) &
% 19.21/18.74 ((bnd_c6_0 |
% 19.21/18.74 (ALL X74.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (~ bnd_c6_1 X74 |
% 19.21/18.74 (ALL X75. bnd_ndr1_1 X74 --> bnd_c2_2 X74 X75 | ~ bnd_c9_2 X74 X75)) |
% 19.21/18.74 ((bnd_ndr1_1 X74 & ~ bnd_c3_2 X74 bnd_a78) & ~ bnd_c7_2 X74 bnd_a78) &
% 19.21/18.74 ~ bnd_c9_2 X74 bnd_a78)) |
% 19.21/18.74 ((bnd_ndr1_0 & ~ bnd_c3_1 bnd_a79) &
% 19.21/18.74 (ALL X76.
% 19.21/18.74 bnd_ndr1_1 bnd_a79 -->
% 19.21/18.74 (bnd_c1_2 bnd_a79 X76 | bnd_c6_2 bnd_a79 X76) |
% 19.21/18.74 ~ bnd_c10_2 bnd_a79 X76)) &
% 19.21/18.74 (ALL X77.
% 19.21/18.74 bnd_ndr1_1 bnd_a79 -->
% 19.21/18.74 (bnd_c4_2 bnd_a79 X77 | bnd_c7_2 bnd_a79 X77) |
% 19.21/18.74 bnd_c8_2 bnd_a79 X77))) &
% 19.21/18.74 ((bnd_c6_0 |
% 19.21/18.74 (ALL X78.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 ((ALL X79.
% 19.21/18.74 bnd_ndr1_1 X78 -->
% 19.21/18.74 (bnd_c1_2 X78 X79 | bnd_c5_2 X78 X79) | bnd_c6_2 X78 X79) |
% 19.21/18.74 (ALL X80.
% 19.21/18.74 bnd_ndr1_1 X78 -->
% 19.21/18.74 (bnd_c10_2 X78 X80 | bnd_c5_2 X78 X80) | ~ bnd_c9_2 X78 X80)) |
% 19.21/18.74 (ALL X81. bnd_ndr1_1 X78 --> bnd_c4_2 X78 X81 | bnd_c6_2 X78 X81))) |
% 19.21/18.74 ((bnd_ndr1_0 & bnd_c3_1 bnd_a80) &
% 19.21/18.74 bnd_c7_1 bnd_a80) &
% 19.21/18.74 ~ bnd_c5_1 bnd_a80)) &
% 19.21/18.74 ((bnd_c7_0 | bnd_c9_0) |
% 19.21/18.74 (ALL X82.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c8_1 X82 |
% 19.21/18.74 (ALL X83.
% 19.21/18.74 bnd_ndr1_1 X82 -->
% 19.21/18.74 (bnd_c5_2 X82 X83 | ~ bnd_c10_2 X82 X83) | ~ bnd_c8_2 X82 X83)) |
% 19.21/18.74 (ALL X84.
% 19.21/18.74 bnd_ndr1_1 X82 -->
% 19.21/18.74 (bnd_c7_2 X82 X84 | bnd_c9_2 X82 X84) | ~ bnd_c8_2 X82 X84)))) &
% 19.21/18.74 ((bnd_c7_0 | ~ bnd_c1_0) |
% 19.21/18.74 (ALL X85.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c10_1 X85 | ~ bnd_c5_1 X85) |
% 19.21/18.74 ((bnd_ndr1_1 X85 & bnd_c6_2 X85 bnd_a81) & bnd_c8_2 X85 bnd_a81) &
% 19.21/18.74 ~ bnd_c5_2 X85 bnd_a81))) &
% 19.21/18.74 ((bnd_c7_0 | ~ bnd_c6_0) |
% 19.21/18.74 (ALL X86.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c1_1 X86 | ~ bnd_c7_1 X86) |
% 19.21/18.74 ((bnd_ndr1_1 X86 & ~ bnd_c10_2 X86 bnd_a82) & ~ bnd_c2_2 X86 bnd_a82) &
% 19.21/18.74 ~ bnd_c6_2 X86 bnd_a82))) &
% 19.21/18.74 ((bnd_c7_0 | ~ bnd_c9_0) |
% 19.21/18.74 ((((bnd_ndr1_0 & bnd_c5_1 bnd_a83) &
% 19.21/18.74 ~ bnd_c2_1 bnd_a83) &
% 19.21/18.74 bnd_ndr1_1 bnd_a83) &
% 19.21/18.74 ~ bnd_c1_2 bnd_a83 bnd_a84) &
% 19.21/18.74 ~ bnd_c2_2 bnd_a83 bnd_a84)) &
% 19.21/18.74 ((bnd_c7_0 |
% 19.21/18.74 (ALL X87.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (~ bnd_c7_1 X87 | ~ bnd_c8_1 X87) |
% 19.21/18.74 (ALL X88.
% 19.21/18.74 bnd_ndr1_1 X87 -->
% 19.21/18.74 (bnd_c1_2 X87 X88 | bnd_c7_2 X87 X88) | bnd_c9_2 X87 X88))) |
% 19.21/18.74 (ALL X89.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 ((ALL X90.
% 19.21/18.74 bnd_ndr1_1 X89 -->
% 19.21/18.74 (bnd_c10_2 X89 X90 | bnd_c4_2 X89 X90) | bnd_c7_2 X89 X90) |
% 19.21/18.74 (ALL X91.
% 19.21/18.74 bnd_ndr1_1 X89 -->
% 19.21/18.74 (bnd_c4_2 X89 X91 | ~ bnd_c3_2 X89 X91) | ~ bnd_c5_2 X89 X91)) |
% 19.21/18.74 bnd_ndr1_1 X89 &
% 19.21/18.74 ~ bnd_c6_2 X89 bnd_a85))) &
% 19.21/18.74 ((bnd_c8_0 | ~ bnd_c10_0) |
% 19.21/18.74 ((bnd_ndr1_0 & bnd_c7_1 bnd_a86) &
% 19.21/18.74 ~ bnd_c1_1 bnd_a86) &
% 19.21/18.74 ~ bnd_c5_1 bnd_a86)) &
% 19.21/18.74 (bnd_c8_0 |
% 19.21/18.74 (ALL X92.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c1_1 X92 | ~ bnd_c9_1 X92) |
% 19.21/18.74 ((bnd_ndr1_1 X92 &
% 19.21/18.74 ~ bnd_c2_2 X92 bnd_a87) &
% 19.21/18.74 ~ bnd_c3_2 X92 bnd_a87) &
% 19.21/18.74 ~ bnd_c7_2 X92 bnd_a87))) &
% 19.21/18.74 (bnd_c9_0 | ~ bnd_c10_0)) &
% 19.21/18.74 ((bnd_c9_0 | ~ bnd_c3_0) |
% 19.21/18.74 (ALL X93.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (ALL X94.
% 19.21/18.74 bnd_ndr1_1 X93 -->
% 19.21/18.74 (bnd_c9_2 X93 X94 |
% 19.21/18.74 ~ bnd_c3_2 X93 X94) |
% 19.21/18.74 ~ bnd_c5_2 X93 X94) |
% 19.21/18.74 ((bnd_ndr1_1 X93 & bnd_c1_2 X93 bnd_a88) &
% 19.21/18.74 bnd_c2_2 X93 bnd_a88) &
% 19.21/18.74 ~ bnd_c4_2 X93 bnd_a88))) &
% 19.21/18.74 ((bnd_c9_0 | ~ bnd_c4_0) |
% 19.21/18.74 (ALL X95.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c7_1 X95 | bnd_c9_1 X95) |
% 19.21/18.74 ((bnd_ndr1_1 X95 & bnd_c1_2 X95 bnd_a89) &
% 19.21/18.74 ~ bnd_c3_2 X95 bnd_a89) &
% 19.21/18.74 ~ bnd_c4_2 X95 bnd_a89))) &
% 19.21/18.74 ((bnd_c9_0 | ~ bnd_c5_0) |
% 19.21/18.74 ((bnd_ndr1_0 & bnd_ndr1_1 bnd_a90) &
% 19.21/18.74 ~ bnd_c3_2 bnd_a90 bnd_a91) &
% 19.21/18.74 ~ bnd_c9_2 bnd_a90 bnd_a91)) &
% 19.21/18.74 ((bnd_c9_0 |
% 19.21/18.74 (ALL X96.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c6_1 X96 | ~ bnd_c10_1 X96) |
% 19.21/18.74 (ALL X97.
% 19.21/18.74 bnd_ndr1_1 X96 -->
% 19.21/18.74 (bnd_c3_2 X96 X97 | bnd_c9_2 X96 X97) |
% 19.21/18.74 ~ bnd_c8_2 X96 X97))) |
% 19.21/18.74 (bnd_ndr1_0 & ~ bnd_c6_1 bnd_a92) &
% 19.21/18.74 (ALL X98.
% 19.21/18.74 bnd_ndr1_1 bnd_a92 -->
% 19.21/18.74 (bnd_c10_2 bnd_a92 X98 |
% 19.21/18.74 bnd_c3_2 bnd_a92 X98) |
% 19.21/18.74 ~ bnd_c6_2 bnd_a92 X98))) &
% 19.21/18.74 (~ bnd_c1_0 | ~ bnd_c4_0)) &
% 19.21/18.74 ((~ bnd_c1_0 | ~ bnd_c9_0) |
% 19.21/18.74 (ALL X99.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c5_1 X99 |
% 19.21/18.74 (bnd_ndr1_1 X99 & bnd_c1_2 X99 bnd_a93) &
% 19.21/18.74 bnd_c6_2 X99 bnd_a93) |
% 19.21/18.74 (bnd_ndr1_1 X99 & ~ bnd_c3_2 X99 bnd_a94) &
% 19.21/18.74 ~ bnd_c6_2 X99 bnd_a94))) &
% 19.21/18.74 (~ bnd_c1_0 |
% 19.21/18.74 (ALL X100.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c2_1 X100 | bnd_c5_1 X100) |
% 19.21/18.74 bnd_c7_1 X100))) &
% 19.21/18.74 ((~ bnd_c1_0 |
% 19.21/18.74 (ALL X101.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c2_1 X101 | ~ bnd_c10_1 X101) |
% 19.21/18.74 ~ bnd_c9_1 X101)) |
% 19.21/18.74 ((((bnd_ndr1_0 & bnd_c9_1 bnd_a95) &
% 19.21/18.74 bnd_ndr1_1 bnd_a95) &
% 19.21/18.74 bnd_c1_2 bnd_a95 bnd_a96) &
% 19.21/18.74 bnd_c2_2 bnd_a95 bnd_a96) &
% 19.21/18.74 ~ bnd_c5_2 bnd_a95 bnd_a96)) &
% 19.21/18.74 ((~ bnd_c1_0 |
% 19.21/18.74 (ALL X102.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c4_1 X102 | ~ bnd_c7_1 X102) |
% 19.21/18.74 ~ bnd_c8_1 X102)) |
% 19.21/18.74 (bnd_ndr1_0 & bnd_c9_1 bnd_a97) &
% 19.21/18.74 (ALL X103.
% 19.21/18.74 bnd_ndr1_1 bnd_a97 -->
% 19.21/18.74 (bnd_c10_2 bnd_a97 X103 | bnd_c2_2 bnd_a97 X103) |
% 19.21/18.74 bnd_c9_2 bnd_a97 X103))) &
% 19.21/18.74 ((~ bnd_c1_0 |
% 19.21/18.74 (ALL X104.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c4_1 X104 |
% 19.21/18.74 (ALL X105.
% 19.21/18.74 bnd_ndr1_1 X104 -->
% 19.21/18.74 (bnd_c3_2 X104 X105 | bnd_c5_2 X104 X105) |
% 19.21/18.74 ~ bnd_c7_2 X104 X105)) |
% 19.21/18.74 (ALL X106.
% 19.21/18.74 bnd_ndr1_1 X104 -->
% 19.21/18.74 bnd_c8_2 X104 X106 | ~ bnd_c3_2 X104 X106))) |
% 19.21/18.74 (ALL X107.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (~ bnd_c1_1 X107 | ~ bnd_c7_1 X107) |
% 19.21/18.74 (ALL X108.
% 19.21/18.74 bnd_ndr1_1 X107 -->
% 19.21/18.74 (bnd_c1_2 X107 X108 | bnd_c5_2 X107 X108) |
% 19.21/18.74 ~ bnd_c2_2 X107 X108)))) &
% 19.21/18.74 ((~ bnd_c1_0 |
% 19.21/18.74 (ALL X109.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 ~ bnd_c2_1 X109 |
% 19.21/18.74 (ALL X110.
% 19.21/18.74 bnd_ndr1_1 X109 -->
% 19.21/18.74 (bnd_c2_2 X109 X110 | ~ bnd_c7_2 X109 X110) |
% 19.21/18.74 ~ bnd_c9_2 X109 X110))) |
% 19.21/18.74 (((((bnd_ndr1_0 & ~ bnd_c8_1 bnd_a98) &
% 19.21/18.74 (ALL X111.
% 19.21/18.74 bnd_ndr1_1 bnd_a98 -->
% 19.21/18.74 bnd_c5_2 bnd_a98 X111 |
% 19.21/18.74 ~ bnd_c7_2 bnd_a98 X111)) &
% 19.21/18.74 bnd_ndr1_1 bnd_a98) &
% 19.21/18.74 bnd_c7_2 bnd_a98 bnd_a99) &
% 19.21/18.74 bnd_c8_2 bnd_a98 bnd_a99) &
% 19.21/18.74 ~ bnd_c1_2 bnd_a98 bnd_a99)) &
% 19.21/18.74 ((~ bnd_c1_0 |
% 19.21/18.74 (ALL X112.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 ~ bnd_c5_1 X112 |
% 19.21/18.74 ((bnd_ndr1_1 X112 & bnd_c3_2 X112 bnd_a100) &
% 19.21/18.74 ~ bnd_c1_2 X112 bnd_a100) &
% 19.21/18.74 ~ bnd_c8_2 X112 bnd_a100)) |
% 19.21/18.74 (((((((bnd_ndr1_0 &
% 19.21/18.74 (ALL X113.
% 19.21/18.74 bnd_ndr1_1 bnd_a101 -->
% 19.21/18.74 bnd_c2_2 bnd_a101 X113 |
% 19.21/18.74 ~ bnd_c5_2 bnd_a101 X113)) &
% 19.21/18.74 bnd_ndr1_1 bnd_a101) &
% 19.21/18.74 bnd_c7_2 bnd_a101 bnd_a102) &
% 19.21/18.74 ~ bnd_c3_2 bnd_a101 bnd_a102) &
% 19.21/18.74 bnd_ndr1_1 bnd_a101) &
% 19.21/18.74 ~ bnd_c3_2 bnd_a101 bnd_a103) &
% 19.21/18.74 ~ bnd_c4_2 bnd_a101 bnd_a103) &
% 19.21/18.74 ~ bnd_c9_2 bnd_a101 bnd_a103)) &
% 19.21/18.74 (~ bnd_c1_0 |
% 19.21/18.74 ((((((((bnd_ndr1_0 & bnd_c1_1 bnd_a104) &
% 19.21/18.74 bnd_ndr1_1 bnd_a104) &
% 19.21/18.74 bnd_c1_2 bnd_a104 bnd_a105) &
% 19.21/18.74 bnd_c8_2 bnd_a104 bnd_a105) &
% 19.21/18.74 ~ bnd_c2_2 bnd_a104 bnd_a105) &
% 19.21/18.74 bnd_ndr1_1 bnd_a104) &
% 19.21/18.74 bnd_c4_2 bnd_a104 bnd_a106) &
% 19.21/18.74 ~ bnd_c2_2 bnd_a104 bnd_a106) &
% 19.21/18.74 ~ bnd_c5_2 bnd_a104 bnd_a106)) &
% 19.21/18.74 ((~ bnd_c10_0 | ~ bnd_c2_0) |
% 19.21/18.74 (((((bnd_ndr1_0 & bnd_c1_1 bnd_a107) &
% 19.21/18.74 (ALL X114.
% 19.21/18.74 bnd_ndr1_1 bnd_a107 -->
% 19.21/18.74 (bnd_c10_2 bnd_a107 X114 | bnd_c3_2 bnd_a107 X114) |
% 19.21/18.74 ~ bnd_c7_2 bnd_a107 X114)) &
% 19.21/18.74 bnd_ndr1_1 bnd_a107) &
% 19.21/18.74 bnd_c5_2 bnd_a107 bnd_a108) &
% 19.21/18.74 bnd_c8_2 bnd_a107 bnd_a108) &
% 19.21/18.74 ~ bnd_c6_2 bnd_a107 bnd_a108)) &
% 19.21/18.74 ((~ bnd_c10_0 | ~ bnd_c3_0) |
% 19.21/18.74 (ALL X115.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c7_1 X115 |
% 19.21/18.74 ((bnd_ndr1_1 X115 & bnd_c5_2 X115 bnd_a109) &
% 19.21/18.74 ~ bnd_c10_2 X115 bnd_a109) &
% 19.21/18.74 ~ bnd_c3_2 X115 bnd_a109) |
% 19.21/18.74 ((bnd_ndr1_1 X115 & bnd_c9_2 X115 bnd_a110) &
% 19.21/18.74 ~ bnd_c1_2 X115 bnd_a110) &
% 19.21/18.74 ~ bnd_c7_2 X115 bnd_a110))) &
% 19.21/18.74 ((~ bnd_c10_0 | ~ bnd_c6_0) |
% 19.21/18.74 (ALL X116.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (~ bnd_c3_1 X116 | ~ bnd_c4_1 X116) |
% 19.21/18.74 (ALL X117.
% 19.21/18.74 bnd_ndr1_1 X116 -->
% 19.21/18.74 (bnd_c1_2 X116 X117 | bnd_c7_2 X116 X117) |
% 19.21/18.74 ~ bnd_c9_2 X116 X117)))) &
% 19.21/18.74 ((~ bnd_c10_0 | ~ bnd_c7_0) |
% 19.21/18.74 (((((((bnd_ndr1_0 &
% 19.21/18.74 (ALL X118.
% 19.21/18.74 bnd_ndr1_1 bnd_a111 -->
% 19.21/18.74 (bnd_c6_2 bnd_a111 X118 | bnd_c9_2 bnd_a111 X118) |
% 19.21/18.74 ~ bnd_c7_2 bnd_a111 X118)) &
% 19.21/18.74 bnd_ndr1_1 bnd_a111) &
% 19.21/18.74 bnd_c6_2 bnd_a111 bnd_a112) &
% 19.21/18.74 bnd_c8_2 bnd_a111 bnd_a112) &
% 19.21/18.74 ~ bnd_c4_2 bnd_a111 bnd_a112) &
% 19.21/18.74 bnd_ndr1_1 bnd_a111) &
% 19.21/18.74 bnd_c7_2 bnd_a111 bnd_a113) &
% 19.21/18.74 ~ bnd_c10_2 bnd_a111 bnd_a113)) &
% 19.21/18.74 ((~ bnd_c10_0 | ~ bnd_c8_0) | ~ bnd_c9_0)) &
% 19.21/18.74 ((~ bnd_c10_0 |
% 19.21/18.74 (ALL X119.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c1_1 X119 | bnd_c9_1 X119) | ~ bnd_c10_1 X119)) |
% 19.21/18.74 (((((bnd_ndr1_0 & ~ bnd_c5_1 bnd_a114) &
% 19.21/18.74 (ALL X120.
% 19.21/18.74 bnd_ndr1_1 bnd_a114 -->
% 19.21/18.74 (bnd_c1_2 bnd_a114 X120 | bnd_c3_2 bnd_a114 X120) |
% 19.21/18.74 bnd_c5_2 bnd_a114 X120)) &
% 19.21/18.74 bnd_ndr1_1 bnd_a114) &
% 19.21/18.74 bnd_c3_2 bnd_a114 bnd_a115) &
% 19.21/18.74 ~ bnd_c2_2 bnd_a114 bnd_a115) &
% 19.21/18.74 ~ bnd_c9_2 bnd_a114 bnd_a115)) &
% 19.21/18.74 ((~ bnd_c10_0 |
% 19.21/18.74 (ALL X121.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c9_1 X121 | ~ bnd_c1_1 X121) |
% 19.21/18.74 ((bnd_ndr1_1 X121 & bnd_c7_2 X121 bnd_a116) &
% 19.21/18.74 ~ bnd_c3_2 X121 bnd_a116) &
% 19.21/18.74 ~ bnd_c4_2 X121 bnd_a116)) |
% 19.21/18.74 (((((bnd_ndr1_0 & bnd_c9_1 bnd_a117) & ~ bnd_c5_1 bnd_a117) &
% 19.21/18.74 bnd_ndr1_1 bnd_a117) &
% 19.21/18.74 bnd_c10_2 bnd_a117 bnd_a118) &
% 19.21/18.74 bnd_c5_2 bnd_a117 bnd_a118) &
% 19.21/18.74 ~ bnd_c3_2 bnd_a117 bnd_a118)) &
% 19.21/18.74 ((~ bnd_c10_0 |
% 19.21/18.74 (((((bnd_ndr1_0 & bnd_c5_1 bnd_a119) & bnd_c9_1 bnd_a119) &
% 19.21/18.74 bnd_ndr1_1 bnd_a119) &
% 19.21/18.74 bnd_c1_2 bnd_a119 bnd_a120) &
% 19.21/18.74 ~ bnd_c10_2 bnd_a119 bnd_a120) &
% 19.21/18.74 ~ bnd_c4_2 bnd_a119 bnd_a120) |
% 19.21/18.74 (((((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a121) &
% 19.21/18.74 (ALL X122.
% 19.21/18.74 bnd_ndr1_1 bnd_a121 -->
% 19.21/18.74 (bnd_c1_2 bnd_a121 X122 | ~ bnd_c10_2 bnd_a121 X122) |
% 19.21/18.74 ~ bnd_c7_2 bnd_a121 X122)) &
% 19.21/18.74 bnd_ndr1_1 bnd_a121) &
% 19.21/18.74 bnd_c2_2 bnd_a121 bnd_a122) &
% 19.21/18.74 ~ bnd_c8_2 bnd_a121 bnd_a122) &
% 19.21/18.74 ~ bnd_c9_2 bnd_a121 bnd_a122)) &
% 19.21/18.74 (~ bnd_c2_0 | ~ bnd_c6_0)) &
% 19.21/18.74 ((~ bnd_c2_0 | ~ bnd_c9_0) |
% 19.21/18.74 (ALL X123.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (~ bnd_c5_1 X123 | ~ bnd_c9_1 X123) |
% 19.21/18.74 (ALL X124.
% 19.21/18.74 bnd_ndr1_1 X123 -->
% 19.21/18.74 (bnd_c2_2 X123 X124 | ~ bnd_c10_2 X123 X124) |
% 19.21/18.74 ~ bnd_c7_2 X123 X124)))) &
% 19.21/18.74 ((~ bnd_c3_0 | ~ bnd_c4_0) | ~ bnd_c5_0)) &
% 19.21/18.74 ((~ bnd_c3_0 | ~ bnd_c6_0) | ~ bnd_c8_0)) &
% 19.21/18.74 (~ bnd_c3_0 |
% 19.21/18.74 (ALL X125.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c4_1 X125 | bnd_c9_1 X125) |
% 19.21/18.74 (ALL X126.
% 19.21/18.74 bnd_ndr1_1 X125 -->
% 19.21/18.74 (~ bnd_c1_2 X125 X126 | ~ bnd_c10_2 X125 X126) |
% 19.21/18.74 ~ bnd_c5_2 X125 X126)))) &
% 19.21/18.74 ((~ bnd_c3_0 |
% 19.21/18.74 (ALL X127.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c8_1 X127 |
% 19.21/18.74 (ALL X128.
% 19.21/18.74 bnd_ndr1_1 X127 -->
% 19.21/18.74 (bnd_c7_2 X127 X128 | bnd_c8_2 X127 X128) |
% 19.21/18.74 ~ bnd_c5_2 X127 X128)) |
% 19.21/18.74 (ALL X129.
% 19.21/18.74 bnd_ndr1_1 X127 -->
% 19.21/18.74 (~ bnd_c2_2 X127 X129 | ~ bnd_c6_2 X127 X129) |
% 19.21/18.74 ~ bnd_c9_2 X127 X129))) |
% 19.21/18.74 (ALL X130.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c9_1 X130 |
% 19.21/18.74 ((bnd_ndr1_1 X130 & bnd_c1_2 X130 bnd_a123) &
% 19.21/18.74 bnd_c7_2 X130 bnd_a123) &
% 19.21/18.74 ~ bnd_c4_2 X130 bnd_a123) |
% 19.21/18.74 ((bnd_ndr1_1 X130 & bnd_c3_2 X130 bnd_a124) &
% 19.21/18.74 ~ bnd_c4_2 X130 bnd_a124) &
% 19.21/18.74 ~ bnd_c6_2 X130 bnd_a124))) &
% 19.21/18.74 ((~ bnd_c3_0 |
% 19.21/18.74 (ALL X131.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c9_1 X131 |
% 19.21/18.74 ((bnd_ndr1_1 X131 & bnd_c1_2 X131 bnd_a125) &
% 19.21/18.74 bnd_c4_2 X131 bnd_a125) &
% 19.21/18.74 ~ bnd_c8_2 X131 bnd_a125) |
% 19.21/18.74 (bnd_ndr1_1 X131 & bnd_c4_2 X131 bnd_a126) &
% 19.21/18.74 ~ bnd_c10_2 X131 bnd_a126)) |
% 19.21/18.74 (((((bnd_ndr1_0 & ~ bnd_c6_1 bnd_a127) & ~ bnd_c9_1 bnd_a127) &
% 19.21/18.74 bnd_ndr1_1 bnd_a127) &
% 19.21/18.74 bnd_c1_2 bnd_a127 bnd_a128) &
% 19.21/18.74 bnd_c10_2 bnd_a127 bnd_a128) &
% 19.21/18.74 bnd_c7_2 bnd_a127 bnd_a128)) &
% 19.21/18.74 ((~ bnd_c3_0 |
% 19.21/18.74 (ALL X132. bnd_ndr1_0 --> ~ bnd_c10_1 X132 | ~ bnd_c3_1 X132)) |
% 19.21/18.74 (ALL X133.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (~ bnd_c7_1 X133 |
% 19.21/18.74 (ALL X134.
% 19.21/18.74 bnd_ndr1_1 X133 -->
% 19.21/18.74 (bnd_c1_2 X133 X134 | ~ bnd_c8_2 X133 X134) |
% 19.21/18.74 ~ bnd_c9_2 X133 X134)) |
% 19.21/18.74 (ALL X135.
% 19.21/18.74 bnd_ndr1_1 X133 -->
% 19.21/18.74 (bnd_c3_2 X133 X135 | bnd_c6_2 X133 X135) |
% 19.21/18.74 ~ bnd_c2_2 X133 X135)))) &
% 19.21/18.74 ((~ bnd_c4_0 |
% 19.21/18.74 ((bnd_ndr1_0 & bnd_c2_1 bnd_a129) & ~ bnd_c6_1 bnd_a129) &
% 19.21/18.74 (ALL X136.
% 19.21/18.74 bnd_ndr1_1 bnd_a129 -->
% 19.21/18.74 (bnd_c6_2 bnd_a129 X136 | ~ bnd_c8_2 bnd_a129 X136) |
% 19.21/18.74 ~ bnd_c9_2 bnd_a129 X136)) |
% 19.21/18.74 ((((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a130) &
% 19.21/18.74 ~ bnd_c3_1 bnd_a130) &
% 19.21/18.74 bnd_ndr1_1 bnd_a130) &
% 19.21/18.74 ~ bnd_c3_2 bnd_a130 bnd_a131) &
% 19.21/18.74 ~ bnd_c6_2 bnd_a130 bnd_a131)) &
% 19.21/18.74 (~ bnd_c4_0 |
% 19.21/18.74 (((((bnd_ndr1_0 & bnd_c4_1 bnd_a132) &
% 19.21/18.74 bnd_c6_1 bnd_a132) &
% 19.21/18.74 bnd_ndr1_1 bnd_a132) &
% 19.21/18.74 bnd_c2_2 bnd_a132 bnd_a133) &
% 19.21/18.74 bnd_c8_2 bnd_a132 bnd_a133) &
% 19.21/18.74 ~ bnd_c4_2 bnd_a132 bnd_a133)) &
% 19.21/18.74 ((~ bnd_c4_0 |
% 19.21/18.74 ((((((((bnd_ndr1_0 &
% 19.21/18.74 bnd_c7_1 bnd_a134) &
% 19.21/18.74 bnd_ndr1_1 bnd_a134) &
% 19.21/18.74 bnd_c1_2 bnd_a134 bnd_a135) &
% 19.21/18.74 ~ bnd_c10_2 bnd_a134 bnd_a135) &
% 19.21/18.74 ~ bnd_c6_2 bnd_a134 bnd_a135) &
% 19.21/18.74 bnd_ndr1_1 bnd_a134) &
% 19.21/18.74 bnd_c2_2 bnd_a134 bnd_a136) &
% 19.21/18.74 bnd_c8_2 bnd_a134 bnd_a136) &
% 19.21/18.74 ~ bnd_c10_2 bnd_a134 bnd_a136) |
% 19.21/18.74 (((((bnd_ndr1_0 & ~ bnd_c5_1 bnd_a137) &
% 19.21/18.74 ~ bnd_c8_1 bnd_a137) &
% 19.21/18.74 bnd_ndr1_1 bnd_a137) &
% 19.21/18.74 bnd_c10_2 bnd_a137 bnd_a138) &
% 19.21/18.74 bnd_c5_2 bnd_a137 bnd_a138) &
% 19.21/18.74 ~ bnd_c6_2 bnd_a137 bnd_a138)) &
% 19.21/18.74 ((~ bnd_c5_0 | ~ bnd_c6_0) |
% 19.21/18.74 ((((bnd_ndr1_0 & bnd_c6_1 bnd_a139) &
% 19.21/18.74 ~ bnd_c2_1 bnd_a139) &
% 19.21/18.74 bnd_ndr1_1 bnd_a139) &
% 19.21/18.74 bnd_c6_2 bnd_a139 bnd_a140) &
% 19.21/18.74 ~ bnd_c1_2 bnd_a139 bnd_a140)) &
% 19.21/18.74 ((~ bnd_c5_0 | ~ bnd_c9_0) |
% 19.21/18.74 (((((bnd_ndr1_0 & ~ bnd_c9_1 bnd_a141) &
% 19.21/18.74 (ALL X137.
% 19.21/18.74 bnd_ndr1_1 bnd_a141 -->
% 19.21/18.74 (bnd_c10_2 bnd_a141 X137 | bnd_c6_2 bnd_a141 X137) |
% 19.21/18.74 ~ bnd_c8_2 bnd_a141 X137)) &
% 19.21/18.74 bnd_ndr1_1 bnd_a141) &
% 19.21/18.74 ~ bnd_c10_2 bnd_a141 bnd_a142) &
% 19.21/18.74 ~ bnd_c3_2 bnd_a141 bnd_a142) &
% 19.21/18.74 ~ bnd_c7_2 bnd_a141 bnd_a142)) &
% 19.21/18.74 ((~ bnd_c5_0 |
% 19.21/18.74 (ALL X138.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (~ bnd_c8_1 X138 |
% 19.21/18.74 (ALL X139. bnd_ndr1_1 X138 --> bnd_c6_2 X138 X139 | bnd_c7_2 X138 X139)) |
% 19.21/18.74 (bnd_ndr1_1 X138 &
% 19.21/18.74 bnd_c10_2 X138 bnd_a143) &
% 19.21/18.74 bnd_c5_2 X138 bnd_a143)) |
% 19.21/18.74 (ALL X140.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 ((ALL X141.
% 19.21/18.74 bnd_ndr1_1 X140 --> bnd_c3_2 X140 X141 | ~ bnd_c1_2 X140 X141) |
% 19.21/18.74 (ALL X142.
% 19.21/18.74 bnd_ndr1_1 X140 -->
% 19.21/18.74 (bnd_c7_2 X140 X142 | ~ bnd_c2_2 X140 X142) | ~ bnd_c3_2 X140 X142)) |
% 19.21/18.74 ((bnd_ndr1_1 X140 &
% 19.21/18.74 bnd_c10_2 X140 bnd_a144) &
% 19.21/18.74 bnd_c6_2 X140 bnd_a144) &
% 19.21/18.74 ~ bnd_c8_2 X140 bnd_a144))) &
% 19.21/18.74 ((~ bnd_c5_0 |
% 19.21/18.74 ((bnd_ndr1_0 & bnd_c1_1 bnd_a145) &
% 19.21/18.74 ~ bnd_c8_1 bnd_a145) &
% 19.21/18.74 (ALL X143.
% 19.21/18.74 bnd_ndr1_1 bnd_a145 -->
% 19.21/18.74 (bnd_c2_2 bnd_a145 X143 |
% 19.21/18.74 bnd_c9_2 bnd_a145 X143) |
% 19.21/18.74 ~ bnd_c10_2 bnd_a145 X143)) |
% 19.21/18.74 ((((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a146) &
% 19.21/18.74 bnd_ndr1_1 bnd_a146) &
% 19.21/18.74 bnd_c10_2 bnd_a146 bnd_a147) &
% 19.21/18.74 bnd_c3_2 bnd_a146 bnd_a147) &
% 19.21/18.74 ~ bnd_c5_2 bnd_a146 bnd_a147)) &
% 19.21/18.74 ((~ bnd_c6_0 |
% 19.21/18.74 (ALL X144.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c1_1 X144 | bnd_c4_1 X144) |
% 19.21/18.74 ~ bnd_c5_1 X144)) |
% 19.21/18.74 ((((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a148) &
% 19.21/18.74 bnd_ndr1_1 bnd_a148) &
% 19.21/18.74 bnd_c7_2 bnd_a148 bnd_a149) &
% 19.21/18.74 bnd_c9_2 bnd_a148 bnd_a149) &
% 19.21/18.74 ~ bnd_c3_2 bnd_a148 bnd_a149)) &
% 19.21/18.74 ((~ bnd_c6_0 |
% 19.21/18.74 (ALL X145.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c2_1 X145 | ~ bnd_c9_1 X145) |
% 19.21/18.74 ((bnd_ndr1_1 X145 &
% 19.21/18.74 ~ bnd_c10_2 X145 bnd_a150) &
% 19.21/18.74 ~ bnd_c7_2 X145 bnd_a150) &
% 19.21/18.74 ~ bnd_c8_2 X145 bnd_a150)) |
% 19.21/18.74 (ALL X146.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 ((ALL X147.
% 19.21/18.74 bnd_ndr1_1 X146 -->
% 19.21/18.74 (bnd_c10_2 X146 X147 | bnd_c5_2 X146 X147) | ~ bnd_c6_2 X146 X147) |
% 19.21/18.74 (ALL X148.
% 19.21/18.74 bnd_ndr1_1 X146 -->
% 19.21/18.74 (bnd_c5_2 X146 X148 | bnd_c6_2 X146 X148) | ~ bnd_c3_2 X146 X148)) |
% 19.21/18.74 (ALL X149.
% 19.21/18.74 bnd_ndr1_1 X146 -->
% 19.21/18.74 (~ bnd_c1_2 X146 X149 |
% 19.21/18.74 ~ bnd_c10_2 X146 X149) |
% 19.21/18.74 ~ bnd_c9_2 X146 X149)))) &
% 19.21/18.74 ((~ bnd_c7_0 | ~ bnd_c8_0) |
% 19.21/18.74 (ALL X150.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c2_1 X150 | bnd_c3_1 X150) |
% 19.21/18.74 ~ bnd_c9_1 X150))) &
% 19.21/18.74 ((~ bnd_c7_0 | ~ bnd_c8_0) |
% 19.21/18.74 (ALL X151.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 ~ bnd_c2_1 X151 |
% 19.21/18.74 ((bnd_ndr1_1 X151 & bnd_c4_2 X151 bnd_a151) &
% 19.21/18.74 ~ bnd_c6_2 X151 bnd_a151) &
% 19.21/18.74 ~ bnd_c9_2 X151 bnd_a151))) &
% 19.21/18.74 ((~ bnd_c7_0 | ~ bnd_c8_0) |
% 19.21/18.74 (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a152) &
% 19.21/18.74 bnd_c10_2 bnd_a152 bnd_a153) &
% 19.21/18.74 bnd_c6_2 bnd_a152 bnd_a153) &
% 19.21/18.74 bnd_c7_2 bnd_a152 bnd_a153) &
% 19.21/18.74 bnd_ndr1_1 bnd_a152) &
% 19.21/18.74 bnd_c3_2 bnd_a152 bnd_a154) &
% 19.21/18.74 bnd_c8_2 bnd_a152 bnd_a154) &
% 19.21/18.74 ~ bnd_c1_2 bnd_a152 bnd_a154)) &
% 19.21/18.74 ((~ bnd_c7_0 |
% 19.21/18.74 (ALL X152.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (~ bnd_c6_1 X152 | ~ bnd_c8_1 X152) |
% 19.21/18.74 ((bnd_ndr1_1 X152 &
% 19.21/18.74 ~ bnd_c1_2 X152 bnd_a155) &
% 19.21/18.74 ~ bnd_c7_2 X152 bnd_a155) &
% 19.21/18.74 ~ bnd_c9_2 X152 bnd_a155)) |
% 19.21/18.74 (ALL X153.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (~ bnd_c6_1 X153 |
% 19.21/18.74 ((bnd_ndr1_1 X153 & bnd_c10_2 X153 bnd_a156) &
% 19.21/18.74 bnd_c3_2 X153 bnd_a156) &
% 19.21/18.74 ~ bnd_c2_2 X153 bnd_a156) |
% 19.21/18.74 ((bnd_ndr1_1 X153 & bnd_c6_2 X153 bnd_a157) &
% 19.21/18.74 bnd_c8_2 X153 bnd_a157) &
% 19.21/18.74 ~ bnd_c1_2 X153 bnd_a157))) &
% 19.21/18.74 ((~ bnd_c7_0 |
% 19.21/18.74 (((((bnd_ndr1_0 & bnd_c1_1 bnd_a158) &
% 19.21/18.74 ~ bnd_c6_1 bnd_a158) &
% 19.21/18.74 bnd_ndr1_1 bnd_a158) &
% 19.21/18.74 bnd_c1_2 bnd_a158 bnd_a159) &
% 19.21/18.74 bnd_c10_2 bnd_a158 bnd_a159) &
% 19.21/18.74 ~ bnd_c9_2 bnd_a158 bnd_a159) |
% 19.21/18.74 ((bnd_ndr1_0 & ~ bnd_c10_1 bnd_a160) &
% 19.21/18.74 (ALL X154.
% 19.21/18.74 bnd_ndr1_1 bnd_a160 -->
% 19.21/18.74 (bnd_c1_2 bnd_a160 X154 |
% 19.21/18.74 bnd_c2_2 bnd_a160 X154) |
% 19.21/18.74 bnd_c9_2 bnd_a160 X154)) &
% 19.21/18.74 (ALL X155.
% 19.21/18.74 bnd_ndr1_1 bnd_a160 -->
% 19.21/18.74 (bnd_c2_2 bnd_a160 X155 |
% 19.21/18.74 bnd_c6_2 bnd_a160 X155) |
% 19.21/18.74 ~ bnd_c4_2 bnd_a160 X155))) &
% 19.21/18.74 ((~ bnd_c8_0 | ~ bnd_c9_0) |
% 19.21/18.74 (ALL X156.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 bnd_c10_1 X156 |
% 19.21/18.74 ((bnd_ndr1_1 X156 & bnd_c4_2 X156 bnd_a161) &
% 19.21/18.74 bnd_c5_2 X156 bnd_a161) &
% 19.21/18.74 bnd_c6_2 X156 bnd_a161))) &
% 19.21/18.74 ((~ bnd_c8_0 | ~ bnd_c9_0) |
% 19.21/18.74 (((((bnd_ndr1_0 & ~ bnd_c10_1 bnd_a162) &
% 19.21/18.74 ~ bnd_c9_1 bnd_a162) &
% 19.21/18.74 bnd_ndr1_1 bnd_a162) &
% 19.21/18.74 bnd_c2_2 bnd_a162 bnd_a163) &
% 19.21/18.74 bnd_c5_2 bnd_a162 bnd_a163) &
% 19.21/18.74 bnd_c9_2 bnd_a162 bnd_a163)) &
% 19.21/18.74 ((~ bnd_c8_0 |
% 19.21/18.74 (ALL X157.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 bnd_c3_1 X157 |
% 19.21/18.74 (ALL X158.
% 19.21/18.74 bnd_ndr1_1 X157 -->
% 19.21/18.74 (bnd_c6_2 X157 X158 | ~ bnd_c4_2 X157 X158) |
% 19.21/18.74 ~ bnd_c9_2 X157 X158))) |
% 19.21/18.74 ((bnd_ndr1_0 & ~ bnd_c3_1 bnd_a164) &
% 19.21/18.74 (ALL X159.
% 19.21/18.74 bnd_ndr1_1 bnd_a164 -->
% 19.21/18.74 (bnd_c5_2 bnd_a164 X159 |
% 19.21/18.74 bnd_c7_2 bnd_a164 X159) |
% 19.21/18.74 bnd_c9_2 bnd_a164 X159)) &
% 19.21/18.74 (ALL X160.
% 19.21/18.74 bnd_ndr1_1 bnd_a164 -->
% 19.21/18.74 bnd_c8_2 bnd_a164 X160 |
% 19.21/18.74 ~ bnd_c6_2 bnd_a164 X160))) &
% 19.21/18.74 ((~ bnd_c8_0 |
% 19.21/18.74 (ALL X161.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c6_1 X161 |
% 19.21/18.74 (ALL X162.
% 19.21/18.74 bnd_ndr1_1 X161 -->
% 19.21/18.74 (bnd_c6_2 X161 X162 | ~ bnd_c2_2 X161 X162) |
% 19.21/18.74 ~ bnd_c4_2 X161 X162)) |
% 19.21/18.74 (ALL X163.
% 19.21/18.74 bnd_ndr1_1 X161 -->
% 19.21/18.74 (bnd_c9_2 X161 X163 | ~ bnd_c2_2 X161 X163) |
% 19.21/18.74 ~ bnd_c3_2 X161 X163))) |
% 19.21/18.74 ((((bnd_ndr1_0 & bnd_c4_1 bnd_a165) &
% 19.21/18.74 bnd_ndr1_1 bnd_a165) &
% 19.21/18.74 bnd_c10_2 bnd_a165 bnd_a166) &
% 19.21/18.74 bnd_c5_2 bnd_a165 bnd_a166) &
% 19.21/18.74 bnd_c9_2 bnd_a165 bnd_a166)) &
% 19.21/18.74 ((~ bnd_c8_0 |
% 19.21/18.74 (ALL X164.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (~ bnd_c1_1 X164 |
% 19.21/18.74 ((bnd_ndr1_1 X164 & bnd_c1_2 X164 bnd_a167) &
% 19.21/18.74 bnd_c10_2 X164 bnd_a167) &
% 19.21/18.74 bnd_c8_2 X164 bnd_a167) |
% 19.21/18.74 ((bnd_ndr1_1 X164 & bnd_c1_2 X164 bnd_a168) &
% 19.21/18.74 bnd_c5_2 X164 bnd_a168) &
% 19.21/18.74 ~ bnd_c6_2 X164 bnd_a168)) |
% 19.21/18.74 (((((bnd_ndr1_0 &
% 19.21/18.74 (ALL X165.
% 19.21/18.74 bnd_ndr1_1 bnd_a169 -->
% 19.21/18.74 (bnd_c1_2 bnd_a169 X165 |
% 19.21/18.74 bnd_c3_2 bnd_a169 X165) |
% 19.21/18.74 bnd_c8_2 bnd_a169 X165)) &
% 19.21/18.74 (ALL X166.
% 19.21/18.74 bnd_ndr1_1 bnd_a169 -->
% 19.21/18.74 (bnd_c2_2 bnd_a169 X166 |
% 19.21/18.74 ~ bnd_c1_2 bnd_a169 X166) |
% 19.21/18.74 ~ bnd_c9_2 bnd_a169 X166)) &
% 19.21/18.74 bnd_ndr1_1 bnd_a169) &
% 19.21/18.74 bnd_c5_2 bnd_a169 bnd_a170) &
% 19.21/18.74 bnd_c6_2 bnd_a169 bnd_a170) &
% 19.21/18.74 ~ bnd_c9_2 bnd_a169 bnd_a170)) &
% 19.21/18.74 ((~ bnd_c8_0 |
% 19.21/18.74 (ALL X167.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (~ bnd_c2_1 X167 | ~ bnd_c7_1 X167) |
% 19.21/18.74 (ALL X168.
% 19.21/18.74 bnd_ndr1_1 X167 -->
% 19.21/18.74 (bnd_c10_2 X167 X168 | bnd_c4_2 X167 X168) |
% 19.21/18.74 ~ bnd_c6_2 X167 X168))) |
% 19.21/18.74 ((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a171) &
% 19.21/18.74 ~ bnd_c4_1 bnd_a171) &
% 19.21/18.74 ~ bnd_c8_1 bnd_a171)) &
% 19.21/18.74 ((~ bnd_c8_0 |
% 19.21/18.74 ((((bnd_ndr1_0 & bnd_c5_1 bnd_a172) &
% 19.21/18.74 ~ bnd_c7_1 bnd_a172) &
% 19.21/18.74 bnd_ndr1_1 bnd_a172) &
% 19.21/18.74 ~ bnd_c10_2 bnd_a172 bnd_a173) &
% 19.21/18.74 ~ bnd_c6_2 bnd_a172 bnd_a173) |
% 19.21/18.74 (bnd_ndr1_0 & ~ bnd_c3_1 bnd_a174) &
% 19.21/18.74 ~ bnd_c5_1 bnd_a174)) &
% 19.21/18.74 ((~ bnd_c9_0 |
% 19.21/18.74 (ALL X169.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c3_1 X169 | bnd_c9_1 X169) |
% 19.21/18.74 ((bnd_ndr1_1 X169 & bnd_c4_2 X169 bnd_a175) &
% 19.21/18.74 bnd_c7_2 X169 bnd_a175) &
% 19.21/18.74 bnd_c9_2 X169 bnd_a175)) |
% 19.21/18.74 (ALL X170.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 ((ALL X171.
% 19.21/18.74 bnd_ndr1_1 X170 -->
% 19.21/18.74 (bnd_c1_2 X170 X171 | ~ bnd_c2_2 X170 X171) |
% 19.21/18.74 ~ bnd_c8_2 X170 X171) |
% 19.21/18.74 ((bnd_ndr1_1 X170 & bnd_c6_2 X170 bnd_a176) &
% 19.21/18.74 ~ bnd_c7_2 X170 bnd_a176) &
% 19.21/18.74 ~ bnd_c8_2 X170 bnd_a176) |
% 19.21/18.74 ((bnd_ndr1_1 X170 & bnd_c8_2 X170 bnd_a177) &
% 19.21/18.74 ~ bnd_c2_2 X170 bnd_a177) &
% 19.21/18.74 ~ bnd_c3_2 X170 bnd_a177))) &
% 19.21/18.74 ((~ bnd_c9_0 |
% 19.21/18.74 (ALL X172.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c7_1 X172 |
% 19.21/18.74 (ALL X173.
% 19.21/18.74 bnd_ndr1_1 X172 -->
% 19.21/18.74 (bnd_c10_2 X172 X173 | bnd_c9_2 X172 X173) |
% 19.21/18.74 ~ bnd_c2_2 X172 X173)) |
% 19.21/18.74 (bnd_ndr1_1 X172 & bnd_c5_2 X172 bnd_a178) &
% 19.21/18.74 bnd_c8_2 X172 bnd_a178)) |
% 19.21/18.74 (ALL X174.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 ~ bnd_c2_1 X174 |
% 19.21/18.74 ((bnd_ndr1_1 X174 & bnd_c10_2 X174 bnd_a179) &
% 19.21/18.74 ~ bnd_c1_2 X174 bnd_a179) &
% 19.21/18.74 ~ bnd_c3_2 X174 bnd_a179))) &
% 19.21/18.74 ((~ bnd_c9_0 |
% 19.21/18.74 (ALL X175.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 ((ALL X176.
% 19.21/18.74 bnd_ndr1_1 X175 -->
% 19.21/18.74 (bnd_c4_2 X175 X176 | ~ bnd_c3_2 X175 X176) |
% 19.21/18.74 ~ bnd_c7_2 X175 X176) |
% 19.21/18.74 (ALL X177.
% 19.21/18.74 bnd_ndr1_1 X175 -->
% 19.21/18.74 (bnd_c5_2 X175 X177 | ~ bnd_c1_2 X175 X177) |
% 19.21/18.74 ~ bnd_c7_2 X175 X177)) |
% 19.21/18.74 (ALL X178.
% 19.21/18.74 bnd_ndr1_1 X175 -->
% 19.21/18.74 (~ bnd_c10_2 X175 X178 | ~ bnd_c5_2 X175 X178) |
% 19.21/18.74 ~ bnd_c6_2 X175 X178))) |
% 19.21/18.74 (((((bnd_ndr1_0 & bnd_c5_1 bnd_a180) &
% 19.21/18.74 (ALL X179.
% 19.21/18.74 bnd_ndr1_1 bnd_a180 -->
% 19.21/18.74 (bnd_c1_2 bnd_a180 X179 | bnd_c2_2 bnd_a180 X179) |
% 19.21/18.74 bnd_c6_2 bnd_a180 X179)) &
% 19.21/18.74 bnd_ndr1_1 bnd_a180) &
% 19.21/18.74 bnd_c10_2 bnd_a180 bnd_a181) &
% 19.21/18.74 bnd_c7_2 bnd_a180 bnd_a181) &
% 19.21/18.74 bnd_c9_2 bnd_a180 bnd_a181)) &
% 19.21/18.74 ((~ bnd_c9_0 |
% 19.21/18.74 (bnd_ndr1_0 & bnd_c10_1 bnd_a182) & bnd_c8_1 bnd_a182) |
% 19.21/18.74 (((((bnd_ndr1_0 & ~ bnd_c6_1 bnd_a183) &
% 19.21/18.74 (ALL X180.
% 19.21/18.74 bnd_ndr1_1 bnd_a183 -->
% 19.21/18.74 bnd_c1_2 bnd_a183 X180 | ~ bnd_c4_2 bnd_a183 X180)) &
% 19.21/18.74 bnd_ndr1_1 bnd_a183) &
% 19.21/18.74 bnd_c1_2 bnd_a183 bnd_a184) &
% 19.21/18.74 ~ bnd_c6_2 bnd_a183 bnd_a184) &
% 19.21/18.74 ~ bnd_c8_2 bnd_a183 bnd_a184)) &
% 19.21/18.74 (((ALL X181. bnd_ndr1_0 --> bnd_c10_1 X181 | bnd_c2_1 X181) |
% 19.21/18.74 (ALL X182.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 ((ALL X183.
% 19.21/18.74 bnd_ndr1_1 X182 -->
% 19.21/18.74 bnd_c1_2 X182 X183 | ~ bnd_c10_2 X182 X183) |
% 19.21/18.74 (ALL X184.
% 19.21/18.74 bnd_ndr1_1 X182 -->
% 19.21/18.74 (bnd_c4_2 X182 X184 | bnd_c5_2 X182 X184) |
% 19.21/18.74 bnd_c7_2 X182 X184)) |
% 19.21/18.74 ((bnd_ndr1_1 X182 & ~ bnd_c3_2 X182 bnd_a185) &
% 19.21/18.74 ~ bnd_c5_2 X182 bnd_a185) &
% 19.21/18.74 ~ bnd_c6_2 X182 bnd_a185)) |
% 19.21/18.74 ((bnd_ndr1_0 & bnd_c3_1 bnd_a186) & ~ bnd_c2_1 bnd_a186) &
% 19.21/18.74 ~ bnd_c9_1 bnd_a186)) &
% 19.21/18.74 (((ALL X185.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c3_1 X185 | bnd_c5_1 X185) |
% 19.21/18.74 (ALL X186.
% 19.21/18.74 bnd_ndr1_1 X185 -->
% 19.21/18.74 (bnd_c5_2 X185 X186 | ~ bnd_c6_2 X185 X186) |
% 19.21/18.74 ~ bnd_c9_2 X185 X186)) |
% 19.21/18.74 ((bnd_ndr1_0 & bnd_c3_1 bnd_a187) & ~ bnd_c1_1 bnd_a187) &
% 19.21/18.74 ~ bnd_c8_1 bnd_a187) |
% 19.21/18.74 ((bnd_ndr1_0 & ~ bnd_c3_1 bnd_a188) & ~ bnd_c9_1 bnd_a188) &
% 19.21/18.74 (ALL X187.
% 19.21/18.74 bnd_ndr1_1 bnd_a188 -->
% 19.21/18.74 (bnd_c7_2 bnd_a188 X187 | ~ bnd_c2_2 bnd_a188 X187) |
% 19.21/18.74 ~ bnd_c8_2 bnd_a188 X187))) &
% 19.21/18.74 (((ALL X188.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (bnd_c3_1 X188 |
% 19.21/18.74 (ALL X189.
% 19.21/18.74 bnd_ndr1_1 X188 -->
% 19.21/18.74 (bnd_c5_2 X188 X189 | ~ bnd_c2_2 X188 X189) |
% 19.21/18.74 ~ bnd_c9_2 X188 X189)) |
% 19.21/18.74 (ALL X190.
% 19.21/18.74 bnd_ndr1_1 X188 -->
% 19.21/18.74 (bnd_c9_2 X188 X190 | ~ bnd_c4_2 X188 X190) |
% 19.21/18.74 ~ bnd_c6_2 X188 X190)) |
% 19.21/18.74 ((((((((bnd_ndr1_0 & bnd_c2_1 bnd_a189) & bnd_ndr1_1 bnd_a189) &
% 19.21/18.74 bnd_c2_2 bnd_a189 bnd_a190) &
% 19.21/18.74 bnd_c4_2 bnd_a189 bnd_a190) &
% 19.21/18.74 ~ bnd_c1_2 bnd_a189 bnd_a190) &
% 19.21/18.74 bnd_ndr1_1 bnd_a189) &
% 19.21/18.74 bnd_c2_2 bnd_a189 bnd_a191) &
% 19.21/18.74 bnd_c8_2 bnd_a189 bnd_a191) &
% 19.21/18.74 ~ bnd_c1_2 bnd_a189 bnd_a191) |
% 19.21/18.74 (((((bnd_ndr1_0 & bnd_c3_1 bnd_a192) & bnd_c7_1 bnd_a192) &
% 19.21/18.74 bnd_ndr1_1 bnd_a192) &
% 19.21/18.74 bnd_c9_2 bnd_a192 bnd_a193) &
% 19.21/18.74 ~ bnd_c3_2 bnd_a192 bnd_a193) &
% 19.21/18.74 ~ bnd_c7_2 bnd_a192 bnd_a193)) &
% 19.21/18.74 (((ALL X191.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 bnd_c6_1 X191 |
% 19.21/18.74 (ALL X192.
% 19.21/18.74 bnd_ndr1_1 X191 -->
% 19.21/18.74 (bnd_c1_2 X191 X192 | bnd_c5_2 X191 X192) |
% 19.21/18.74 ~ bnd_c10_2 X191 X192)) |
% 19.21/18.74 ((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a194) & ~ bnd_c9_1 bnd_a194) &
% 19.21/18.74 (ALL X193.
% 19.21/18.74 bnd_ndr1_1 bnd_a194 -->
% 19.21/18.74 (bnd_c8_2 bnd_a194 X193 | ~ bnd_c1_2 bnd_a194 X193) |
% 19.21/18.74 ~ bnd_c7_2 bnd_a194 X193)) |
% 19.21/18.74 (((((((bnd_ndr1_0 &
% 19.21/18.74 (ALL X194.
% 19.21/18.74 bnd_ndr1_1 bnd_a195 -->
% 19.21/18.74 (~ bnd_c1_2 bnd_a195 X194 | ~ bnd_c2_2 bnd_a195 X194) |
% 19.21/18.74 ~ bnd_c4_2 bnd_a195 X194)) &
% 19.21/18.74 bnd_ndr1_1 bnd_a195) &
% 19.21/18.74 ~ bnd_c2_2 bnd_a195 bnd_a196) &
% 19.21/18.74 ~ bnd_c8_2 bnd_a195 bnd_a196) &
% 19.21/18.74 bnd_ndr1_1 bnd_a195) &
% 19.21/18.74 ~ bnd_c4_2 bnd_a195 bnd_a197) &
% 19.21/18.74 ~ bnd_c7_2 bnd_a195 bnd_a197) &
% 19.21/18.74 ~ bnd_c9_2 bnd_a195 bnd_a197)) &
% 19.21/18.74 (((ALL X195.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (~ bnd_c1_1 X195 |
% 19.21/18.74 (ALL X196.
% 19.21/18.74 bnd_ndr1_1 X195 -->
% 19.21/18.74 (bnd_c8_2 X195 X196 | ~ bnd_c5_2 X195 X196) |
% 19.21/18.74 ~ bnd_c7_2 X195 X196)) |
% 19.21/18.74 ((bnd_ndr1_1 X195 & bnd_c1_2 X195 bnd_a198) &
% 19.21/18.74 bnd_c4_2 X195 bnd_a198) &
% 19.21/18.74 ~ bnd_c2_2 X195 bnd_a198) |
% 19.21/18.74 ((bnd_ndr1_0 & bnd_c4_1 bnd_a199) & ~ bnd_c9_1 bnd_a199) &
% 19.21/18.74 (ALL X197.
% 19.21/18.74 bnd_ndr1_1 bnd_a199 -->
% 19.21/18.74 (bnd_c7_2 bnd_a199 X197 | ~ bnd_c3_2 bnd_a199 X197) |
% 19.21/18.74 ~ bnd_c4_2 bnd_a199 X197)) |
% 19.21/18.74 ((bnd_ndr1_0 & bnd_c8_1 bnd_a200) &
% 19.21/18.74 (ALL X198.
% 19.21/18.74 bnd_ndr1_1 bnd_a200 -->
% 19.21/18.74 (bnd_c5_2 bnd_a200 X198 | ~ bnd_c3_2 bnd_a200 X198) |
% 19.21/18.74 ~ bnd_c9_2 bnd_a200 X198)) &
% 19.21/18.74 (ALL X199.
% 19.21/18.74 bnd_ndr1_1 bnd_a200 -->
% 19.21/18.74 (bnd_c7_2 bnd_a200 X199 | bnd_c9_2 bnd_a200 X199) |
% 19.21/18.74 ~ bnd_c3_2 bnd_a200 X199))) &
% 19.21/18.74 (((ALL X200.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (~ bnd_c5_1 X200 | ~ bnd_c9_1 X200) |
% 19.21/18.74 (ALL X201.
% 19.21/18.74 bnd_ndr1_1 X200 -->
% 19.21/18.74 (bnd_c5_2 X200 X201 | ~ bnd_c10_2 X200 X201) |
% 19.21/18.74 ~ bnd_c8_2 X200 X201)) |
% 19.21/18.74 (ALL X202.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (~ bnd_c9_1 X202 |
% 19.21/18.74 (ALL X203.
% 19.21/18.74 bnd_ndr1_1 X202 -->
% 19.21/18.74 bnd_c2_2 X202 X203 | bnd_c5_2 X202 X203)) |
% 19.21/18.74 (ALL X204.
% 19.21/18.74 bnd_ndr1_1 X202 -->
% 19.21/18.74 (bnd_c2_2 X202 X204 | ~ bnd_c10_2 X202 X204) |
% 19.21/18.74 ~ bnd_c6_2 X202 X204))) |
% 19.21/18.74 (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a201) &
% 19.21/18.74 bnd_c1_2 bnd_a201 bnd_a202) &
% 19.21/18.74 ~ bnd_c3_2 bnd_a201 bnd_a202) &
% 19.21/18.74 ~ bnd_c9_2 bnd_a201 bnd_a202) &
% 19.21/18.74 bnd_ndr1_1 bnd_a201) &
% 19.21/18.74 bnd_c3_2 bnd_a201 bnd_a203) &
% 19.21/18.74 bnd_c9_2 bnd_a201 bnd_a203) &
% 19.21/18.74 ~ bnd_c7_2 bnd_a201 bnd_a203)) &
% 19.21/18.74 (((ALL X205.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 (~ bnd_c7_1 X205 |
% 19.21/18.74 (ALL X206.
% 19.21/18.74 bnd_ndr1_1 X205 -->
% 19.21/18.74 (bnd_c1_2 X205 X206 | ~ bnd_c3_2 X205 X206) |
% 19.21/18.74 ~ bnd_c4_2 X205 X206)) |
% 19.21/18.74 (bnd_ndr1_1 X205 & bnd_c4_2 X205 bnd_a204) &
% 19.21/18.74 bnd_c8_2 X205 bnd_a204) |
% 19.21/18.74 (bnd_ndr1_0 & bnd_c10_1 bnd_a205) & bnd_c2_1 bnd_a205) |
% 19.21/18.74 ((((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a206) &
% 19.21/18.74 (ALL X207.
% 19.21/18.74 bnd_ndr1_1 bnd_a206 -->
% 19.21/18.74 (bnd_c1_2 bnd_a206 X207 | bnd_c3_2 bnd_a206 X207) |
% 19.21/18.74 ~ bnd_c7_2 bnd_a206 X207)) &
% 19.21/18.74 bnd_ndr1_1 bnd_a206) &
% 19.21/18.74 bnd_c6_2 bnd_a206 bnd_a207) &
% 19.21/18.74 ~ bnd_c8_2 bnd_a206 bnd_a207)) &
% 19.21/18.74 ((ALL X208.
% 19.21/18.74 bnd_ndr1_0 -->
% 19.21/18.74 ((ALL X209.
% 19.21/18.74 bnd_ndr1_1 X208 -->
% 19.21/18.74 (bnd_c9_2 X208 X209 | ~ bnd_c6_2 X208 X209) |
% 19.21/18.74 ~ bnd_c8_2 X208 X209) |
% 19.21/18.74 ((bnd_ndr1_1 X208 & bnd_c2_2 X208 bnd_a208) &
% 19.21/18.74 bnd_c4_2 X208 bnd_a208) &
% 19.21/18.74 bnd_c9_2 X208 bnd_a208) |
% 19.21/18.74 ((bnd_ndr1_1 X208 & bnd_c3_2 X208 bnd_a209) &
% 19.21/18.74 bnd_c5_2 X208 bnd_a209) &
% 19.21/18.74 ~ bnd_c10_2 X208 bnd_a209) |
% 19.21/18.74 ((((((((bnd_ndr1_0 & bnd_c9_1 bnd_a210) & bnd_ndr1_1 bnd_a210) &
% 19.21/18.74 bnd_c10_2 bnd_a210 bnd_a211) &
% 19.21/18.74 bnd_c5_2 bnd_a210 bnd_a211) &
% 19.21/18.74 ~ bnd_c3_2 bnd_a210 bnd_a211) &
% 19.21/18.74 bnd_ndr1_1 bnd_a210) &
% 19.21/18.74 bnd_c8_2 bnd_a210 bnd_a212) &
% 19.21/18.74 ~ bnd_c10_2 bnd_a210 bnd_a212) &
% 19.21/18.74 ~ bnd_c4_2 bnd_a210 bnd_a212)) &
% 19.21/18.74 ((((((bnd_ndr1_0 & bnd_c8_1 bnd_a213) &
% 19.21/18.74 (ALL X210.
% 19.21/18.74 bnd_ndr1_1 bnd_a213 -->
% 19.21/18.74 (bnd_c7_2 bnd_a213 X210 | ~ bnd_c2_2 bnd_a213 X210) |
% 19.21/18.74 ~ bnd_c8_2 bnd_a213 X210)) &
% 19.21/18.74 bnd_ndr1_1 bnd_a213) &
% 19.21/18.74 ~ bnd_c1_2 bnd_a213 bnd_a214) &
% 19.21/18.74 ~ bnd_c6_2 bnd_a213 bnd_a214) &
% 19.21/18.74 ~ bnd_c8_2 bnd_a213 bnd_a214 |
% 19.21/18.74 (((((((bnd_ndr1_0 & ~ bnd_c9_1 bnd_a215) & bnd_ndr1_1 bnd_a215) &
% 19.21/18.74 ~ bnd_c1_2 bnd_a215 bnd_a216) &
% 19.21/18.74 ~ bnd_c5_2 bnd_a215 bnd_a216) &
% 19.21/18.74 ~ bnd_c9_2 bnd_a215 bnd_a216) &
% 19.21/18.74 bnd_ndr1_1 bnd_a215) &
% 19.21/18.74 ~ bnd_c6_2 bnd_a215 bnd_a217) &
% 19.21/18.74 ~ bnd_c7_2 bnd_a215 bnd_a217))
% 19.21/18.74 Adding axioms...
% 19.21/18.77 Typedef.type_definition_def
% 56.97/56.45 ...done.
% 56.97/56.49 Ground types: ?'b, TPTP_Interpret.ind
% 56.97/56.49 Translating term (sizes: 1, 1) ...
% 88.24/87.64 Invoking SAT solver...
% 88.24/87.65 No model exists.
% 88.24/87.65 Translating term (sizes: 2, 1) ...
% 120.06/119.37 Invoking SAT solver...
% 120.06/119.38 No model exists.
% 120.06/119.38 Translating term (sizes: 1, 2) ...
% 178.35/177.38 Invoking SAT solver...
% 179.05/178.01 Model found:
% 179.05/178.01 Size of types: ?'b: 1, TPTP_Interpret.ind: 2
% 179.05/178.01 bnd_a217: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a216: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a215: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a214: ??.TPTP_Interpret.ind1
% 179.05/178.01 bnd_a213: ??.TPTP_Interpret.ind1
% 179.05/178.01 bnd_a212: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a211: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a210: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a209: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a208: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a207: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a206: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a205: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a204: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a203: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a202: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a201: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a200: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a199: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a198: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a197: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a196: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a195: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a194: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a193: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a192: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a191: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a190: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a189: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a188: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a187: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a186: ??.TPTP_Interpret.ind1
% 179.05/178.01 bnd_a185: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a184: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a183: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a182: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a181: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a180: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a179: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a178: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a177: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a176: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a175: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a174: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a173: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a172: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a171: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a170: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a169: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a168: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a167: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a166: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a165: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a164: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a163: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a162: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a161: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a160: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a159: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a158: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a157: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a156: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a155: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a154: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a153: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a152: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a151: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a150: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a149: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a148: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a147: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a146: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a145: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a144: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a143: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a142: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a141: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a140: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a139: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a138: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a137: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a136: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a135: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a134: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a133: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a132: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a131: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a130: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a129: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a128: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a127: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a126: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a125: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a124: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a123: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a122: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a121: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a120: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a119: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a118: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a117: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a116: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a115: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a114: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a113: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a112: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a111: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a110: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a109: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a108: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a107: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a106: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a105: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a104: ??.TPTP_Interpret.ind1
% 179.05/178.01 bnd_a103: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a102: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a101: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a100: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a99: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a98: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a97: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a96: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a95: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a94: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a93: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a92: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a91: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a90: ??.TPTP_Interpret.ind1
% 179.05/178.01 bnd_a89: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a88: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a87: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a86: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a85: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a84: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a83: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a82: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a81: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a80: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a79: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a78: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a77: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a76: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a75: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a74: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a73: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a72: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a71: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a70: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a69: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a68: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a67: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a66: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a65: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a64: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a63: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a62: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a61: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a60: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a59: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a58: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a57: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a56: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a55: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a54: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a53: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a52: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a51: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a50: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a49: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a48: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a47: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a46: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a45: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a44: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a43: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a42: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a41: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a40: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a39: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a38: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a37: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a36: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a35: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a34: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a33: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a32: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_c8_0: False
% 179.05/178.01 bnd_a31: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a30: ??.TPTP_Interpret.ind1
% 179.05/178.01 bnd_a29: ??.TPTP_Interpret.ind1
% 179.05/178.01 bnd_a28: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a27: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a26: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a25: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a24: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a23: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a22: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a21: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_c7_1: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}
% 179.05/178.01 bnd_a20: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_c2_1: {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)}
% 179.05/178.01 bnd_c10_1: {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)}
% 179.05/178.01 bnd_c6_1: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)}
% 179.05/178.01 bnd_a19: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a18: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a17: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a16: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_c5_1: {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)}
% 179.05/178.01 bnd_a15: ??.TPTP_Interpret.ind1
% 179.05/178.01 bnd_a14: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a13: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a12: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_c3_0: True
% 179.05/178.01 bnd_a11: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a10: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_c8_1: {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, True)}
% 179.05/178.01 bnd_c9_1: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)}
% 179.05/178.01 bnd_c1_1: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}
% 179.05/178.01 bnd_c7_0: True
% 179.05/178.01 bnd_a9: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_c3_1: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}
% 179.05/178.01 bnd_c5_0: True
% 179.05/178.01 bnd_c10_0: False
% 179.05/178.01 bnd_a8: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_c1_2: {(??.TPTP_Interpret.ind0,
% 179.05/178.01 {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}),
% 179.05/178.01 (??.TPTP_Interpret.ind1,
% 179.05/178.01 {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)})}
% 179.05/178.01 bnd_a7: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a6: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_c8_2: {(??.TPTP_Interpret.ind0,
% 179.05/178.01 {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}),
% 179.05/178.01 (??.TPTP_Interpret.ind1,
% 179.05/178.01 {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)})}
% 179.05/178.01 bnd_a5: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a4: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_c4_1: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)}
% 179.05/178.01 bnd_c6_0: False
% 179.05/178.01 bnd_a3: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_a2: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_c6_2: {(??.TPTP_Interpret.ind0,
% 179.05/178.01 {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)}),
% 179.05/178.01 (??.TPTP_Interpret.ind1,
% 179.05/178.01 {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)})}
% 179.05/178.01 bnd_c3_2: {(??.TPTP_Interpret.ind0,
% 179.05/178.01 {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)}),
% 179.05/178.01 (??.TPTP_Interpret.ind1,
% 179.05/178.01 {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)})}
% 179.05/178.01 bnd_a1: ??.TPTP_Interpret.ind0
% 179.05/178.01 bnd_c4_2: {(??.TPTP_Interpret.ind0,
% 179.05/178.01 {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)}),
% 179.05/178.01 (??.TPTP_Interpret.ind1,
% 179.05/178.01 {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)})}
% 179.05/178.01 bnd_c9_2: {(??.TPTP_Interpret.ind0,
% 179.05/178.01 {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)}),
% 179.05/178.01 (??.TPTP_Interpret.ind1,
% 179.05/178.01 {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)})}
% 179.05/178.01 bnd_c5_2: {(??.TPTP_Interpret.ind0,
% 179.05/178.01 {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}),
% 179.05/178.01 (??.TPTP_Interpret.ind1,
% 179.05/178.01 {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, True)})}
% 179.05/178.01 bnd_c7_2: {(??.TPTP_Interpret.ind0,
% 179.05/178.01 {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}),
% 179.05/178.01 (??.TPTP_Interpret.ind1,
% 179.05/178.01 {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)})}
% 179.05/178.01 bnd_c2_2: {(??.TPTP_Interpret.ind0,
% 179.05/178.01 {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}),
% 179.05/178.01 (??.TPTP_Interpret.ind1,
% 179.05/178.01 {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, True)})}
% 179.05/178.01 bnd_c10_2: {(??.TPTP_Interpret.ind0,
% 179.05/178.01 {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)}),
% 179.05/178.01 (??.TPTP_Interpret.ind1,
% 179.05/178.01 {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)})}
% 179.05/178.01 bnd_ndr1_1: {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, True)}
% 179.05/178.01 bnd_ndr1_0: True
% 179.05/178.01 bnd_c4_0: False
% 179.05/178.01 bnd_c9_0: False
% 179.05/178.01 bnd_c2_0: True
% 179.05/178.01 bnd_c1_0: True
% 179.05/178.01
% 179.05/178.01 % SZS status CounterSatisfiable
%------------------------------------------------------------------------------