TSTP Solution File: SYN420+1 by Refute---2015

View Problem - Process Solution

%------------------------------------------------------------------------------
% File     : Refute---2015
% Problem  : SYN420+1 : TPTP v6.4.0. Released v2.1.0.
% Transfm  : none
% Format   : tptp:raw
% Command  : isabelle tptp_refute %d %s

% Computer : n058.star.cs.uiowa.edu
% Model    : x86_64 x86_64
% CPU      : Intel(R) Xeon(R) CPU E5-2609 0 2.40GHz
% Memory   : 32218.75MB
% OS       : Linux 3.10.0-327.10.1.el7.x86_64
% CPULimit : 300s
% DateTime : Thu Apr 14 06:41:41 EDT 2016

% Result   : CounterSatisfiable 150.28s
% Output   : Assurance 0s
% Verified : 
% SZS Type : None (Parsing solution fails)
% Syntax   : Number of formulae    : 0

% Comments : 
%------------------------------------------------------------------------------
%----No solution output by system
%------------------------------------------------------------------------------
%----ORIGINAL SYSTEM OUTPUT
% 0.00/0.03  % Problem  : SYN420+1 : TPTP v6.4.0. Released v2.1.0.
% 0.00/0.04  % Command  : isabelle tptp_refute %d %s
% 0.03/0.23  % Computer : n058.star.cs.uiowa.edu
% 0.03/0.23  % Model    : x86_64 x86_64
% 0.03/0.23  % CPU      : Intel(R) Xeon(R) CPU E5-2609 0 @ 2.40GHz
% 0.03/0.23  % Memory   : 32218.75MB
% 0.03/0.23  % OS       : Linux 3.10.0-327.10.1.el7.x86_64
% 0.03/0.23  % CPULimit : 300
% 0.03/0.23  % DateTime : Fri Apr  8 23:49:24 CDT 2016
% 0.03/0.23  % CPUTime: 
% 6.29/5.84  > val it = (): unit
% 7.19/6.73  Trying to find a model that refutes: ~ (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((~ bnd_c1_0 |
% 7.19/6.73                           (ALL U.
% 7.19/6.73                               bnd_ndr1_0 -->
% 7.19/6.73                               (~ bnd_c9_1 U | ~ bnd_c10_1 U) | bnd_c7_1 U)) |
% 7.19/6.73                          bnd_c3_0) &
% 7.19/6.73                         (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a269) &
% 7.19/6.73                               bnd_c9_2 bnd_a269 bnd_a270) &
% 7.19/6.73                              ~ bnd_c3_2 bnd_a269 bnd_a270) &
% 7.19/6.73                             ~ bnd_c7_2 bnd_a269 bnd_a270) &
% 7.19/6.73                            bnd_c2_1 bnd_a269) &
% 7.19/6.73                           bnd_c4_1 bnd_a269 |
% 7.19/6.73                           bnd_c9_0) |
% 7.19/6.73                          (ALL V.
% 7.19/6.73                              bnd_ndr1_0 -->
% 7.19/6.73                              ((ALL W.
% 7.19/6.73                                   bnd_ndr1_1 V -->
% 7.19/6.73                                   (~ bnd_c10_2 V W | bnd_c3_2 V W) |
% 7.19/6.73                                   ~ bnd_c7_2 V W) |
% 7.19/6.73                               (ALL X.
% 7.19/6.73                                   bnd_ndr1_1 V -->
% 7.19/6.73                                   (~ bnd_c7_2 V X | ~ bnd_c2_2 V X) |
% 7.19/6.73                                   ~ bnd_c1_2 V X)) |
% 7.19/6.73                              bnd_c6_1 V))) &
% 7.19/6.73                        ((~ bnd_c4_0 | ~ bnd_c6_0) |
% 7.19/6.73                         (bnd_ndr1_0 & bnd_c4_1 bnd_a271) &
% 7.19/6.73                         bnd_c3_1 bnd_a271)) &
% 7.19/6.73                       ((((((bnd_ndr1_0 &
% 7.19/6.73                             (ALL Y.
% 7.19/6.73                                 bnd_ndr1_1 bnd_a272 -->
% 7.19/6.73                                 bnd_c1_2 bnd_a272 Y |
% 7.19/6.73                                 ~ bnd_c6_2 bnd_a272 Y)) &
% 7.19/6.73                            bnd_ndr1_1 bnd_a272) &
% 7.19/6.73                           ~ bnd_c2_2 bnd_a272 bnd_a273) &
% 7.19/6.73                          ~ bnd_c4_2 bnd_a272 bnd_a273) &
% 7.19/6.73                         bnd_c1_2 bnd_a272 bnd_a273) &
% 7.19/6.73                        bnd_c5_1 bnd_a272 |
% 7.19/6.73                        bnd_c4_0)) &
% 7.19/6.73                      ((~ bnd_c1_0 |
% 7.19/6.73                        (ALL Z.
% 7.19/6.73                            bnd_ndr1_0 -->
% 7.19/6.73                            (bnd_c1_1 Z |
% 7.19/6.73                             ((bnd_ndr1_1 Z & ~ bnd_c8_2 Z bnd_a274) &
% 7.19/6.73                              ~ bnd_c3_2 Z bnd_a274) &
% 7.19/6.73                             ~ bnd_c5_2 Z bnd_a274) |
% 7.19/6.73                            ((bnd_ndr1_1 Z & ~ bnd_c2_2 Z bnd_a275) &
% 7.19/6.73                             ~ bnd_c10_2 Z bnd_a275) &
% 7.19/6.73                            ~ bnd_c6_2 Z bnd_a275)) |
% 7.19/6.73                       bnd_c7_0)) &
% 7.19/6.73                     ((~ bnd_c5_0 |
% 7.19/6.73                       (ALL X1.
% 7.19/6.73                           bnd_ndr1_0 -->
% 7.19/6.73                           (((bnd_ndr1_1 X1 & bnd_c2_2 X1 bnd_a276) &
% 7.19/6.73                             bnd_c8_2 X1 bnd_a276) &
% 7.19/6.73                            ~ bnd_c4_2 X1 bnd_a276 |
% 7.19/6.73                            (ALL X2.
% 7.19/6.73                                bnd_ndr1_1 X1 -->
% 7.19/6.73                                bnd_c3_2 X1 X2 | bnd_c5_2 X1 X2)) |
% 7.19/6.73                           bnd_c6_1 X1)) |
% 7.19/6.73                      ~ bnd_c4_0)) &
% 7.19/6.73                    (~ bnd_c6_0 | ~ bnd_c1_0)) &
% 7.19/6.73                   (((bnd_ndr1_0 & ~ bnd_c5_1 bnd_a277) &
% 7.19/6.73                     (ALL X3.
% 7.19/6.73                         bnd_ndr1_1 bnd_a277 -->
% 7.19/6.73                         (bnd_c10_2 bnd_a277 X3 | ~ bnd_c3_2 bnd_a277 X3) |
% 7.19/6.73                         ~ bnd_c4_2 bnd_a277 X3)) &
% 7.19/6.73                    (ALL X4.
% 7.19/6.73                        bnd_ndr1_1 bnd_a277 -->
% 7.19/6.73                        (bnd_c4_2 bnd_a277 X4 | ~ bnd_c6_2 bnd_a277 X4) |
% 7.19/6.73                        bnd_c7_2 bnd_a277 X4) |
% 7.19/6.73                    ~ bnd_c8_0)) &
% 7.19/6.73                  ((bnd_c6_0 | ~ bnd_c7_0) |
% 7.19/6.73                   (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a278) &
% 7.19/6.73                       bnd_c4_2 bnd_a278 bnd_a279) &
% 7.19/6.73                      bnd_c3_2 bnd_a278 bnd_a279) &
% 7.19/6.73                     bnd_c8_2 bnd_a278 bnd_a279) &
% 7.19/6.73                    (ALL X5.
% 7.19/6.73                        bnd_ndr1_1 bnd_a278 -->
% 7.19/6.73                        (~ bnd_c7_2 bnd_a278 X5 | bnd_c4_2 bnd_a278 X5) |
% 7.19/6.73                        ~ bnd_c2_2 bnd_a278 X5)) &
% 7.19/6.73                   ~ bnd_c4_1 bnd_a278)) &
% 7.19/6.73                 (~ bnd_c10_0 |
% 7.19/6.73                  (ALL X6. bnd_ndr1_0 --> bnd_c7_1 X6 | bnd_c4_1 X6))) &
% 7.19/6.73                ((~ bnd_c3_0 | bnd_c8_0) |
% 7.19/6.73                 ((bnd_ndr1_0 &
% 7.19/6.73                   (ALL X7.
% 7.19/6.73                       bnd_ndr1_1 bnd_a280 -->
% 7.19/6.73                       (~ bnd_c10_2 bnd_a280 X7 | bnd_c9_2 bnd_a280 X7) |
% 7.19/6.73                       bnd_c6_2 bnd_a280 X7)) &
% 7.19/6.73                  (ALL X8.
% 7.19/6.73                      bnd_ndr1_1 bnd_a280 -->
% 7.19/6.73                      (bnd_c7_2 bnd_a280 X8 | bnd_c6_2 bnd_a280 X8) |
% 7.19/6.73                      bnd_c4_2 bnd_a280 X8)) &
% 7.19/6.73                 (ALL X9.
% 7.19/6.73                     bnd_ndr1_1 bnd_a280 -->
% 7.19/6.73                     (~ bnd_c2_2 bnd_a280 X9 | bnd_c1_2 bnd_a280 X9) |
% 7.19/6.73                     bnd_c3_2 bnd_a280 X9))) &
% 7.19/6.73               ((bnd_c4_0 |
% 7.19/6.73                 (bnd_ndr1_0 & ~ bnd_c10_1 bnd_a281) &
% 7.19/6.73                 (ALL X10.
% 7.19/6.73                     bnd_ndr1_1 bnd_a281 -->
% 7.19/6.73                     (~ bnd_c8_2 bnd_a281 X10 | ~ bnd_c2_2 bnd_a281 X10) |
% 7.19/6.73                     bnd_c1_2 bnd_a281 X10)) |
% 7.19/6.73                ((bnd_ndr1_0 &
% 7.19/6.73                  (ALL X11.
% 7.19/6.73                      bnd_ndr1_1 bnd_a282 -->
% 7.19/6.73                      bnd_c3_2 bnd_a282 X11 | ~ bnd_c7_2 bnd_a282 X11)) &
% 7.19/6.73                 bnd_c4_1 bnd_a282) &
% 7.19/6.73                ~ bnd_c6_1 bnd_a282)) &
% 7.19/6.73              ((((((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a283) & bnd_c4_1 bnd_a283) &
% 7.19/6.73                  bnd_ndr1_1 bnd_a283) &
% 7.19/6.73                 ~ bnd_c8_2 bnd_a283 bnd_a284) &
% 7.19/6.73                ~ bnd_c3_2 bnd_a283 bnd_a284 |
% 7.19/6.73                (ALL X12.
% 7.19/6.73                    bnd_ndr1_0 -->
% 7.19/6.73                    (~ bnd_c1_1 X12 | bnd_c7_1 X12) | ~ bnd_c4_1 X12)) |
% 7.19/6.73               (ALL X13.
% 7.19/6.73                   bnd_ndr1_0 -->
% 7.19/6.73                   (((bnd_ndr1_1 X13 & bnd_c7_2 X13 bnd_a285) &
% 7.19/6.73                     bnd_c6_2 X13 bnd_a285) &
% 7.19/6.73                    bnd_c1_2 X13 bnd_a285 |
% 7.19/6.73                    bnd_c9_1 X13) |
% 7.19/6.73                   ((bnd_ndr1_1 X13 & ~ bnd_c8_2 X13 bnd_a286) &
% 7.19/6.73                    ~ bnd_c7_2 X13 bnd_a286) &
% 7.19/6.73                   bnd_c6_2 X13 bnd_a286))) &
% 7.19/6.73             ((bnd_c2_0 |
% 7.19/6.73               (ALL X14. bnd_ndr1_0 --> bnd_c8_1 X14 | ~ bnd_c2_1 X14)) |
% 7.19/6.73              (((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a287) &
% 7.19/6.73                      ~ bnd_c6_2 bnd_a287 bnd_a288) &
% 7.19/6.73                     bnd_c4_2 bnd_a287 bnd_a288) &
% 7.19/6.73                    bnd_ndr1_1 bnd_a287) &
% 7.19/6.73                   ~ bnd_c6_2 bnd_a287 bnd_a289) &
% 7.19/6.73                  bnd_c8_2 bnd_a287 bnd_a289) &
% 7.19/6.73                 bnd_ndr1_1 bnd_a287) &
% 7.19/6.73                ~ bnd_c3_2 bnd_a287 bnd_a290) &
% 7.19/6.73               bnd_c5_2 bnd_a287 bnd_a290) &
% 7.19/6.73              ~ bnd_c9_2 bnd_a287 bnd_a290)) &
% 7.19/6.73            ((~ bnd_c7_0 |
% 7.19/6.73              (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a291) &
% 7.19/6.73                    bnd_c10_2 bnd_a291 bnd_a292) &
% 7.19/6.73                   bnd_c8_2 bnd_a291 bnd_a292) &
% 7.19/6.73                  ~ bnd_c5_2 bnd_a291 bnd_a292) &
% 7.19/6.73                 bnd_ndr1_1 bnd_a291) &
% 7.19/6.73                ~ bnd_c5_2 bnd_a291 bnd_a293) &
% 7.19/6.73               bnd_c3_2 bnd_a291 bnd_a293) &
% 7.19/6.73              ~ bnd_c1_2 bnd_a291 bnd_a293) |
% 7.19/6.73             bnd_c5_0)) &
% 7.19/6.73           (((ALL X15.
% 7.19/6.73                 bnd_ndr1_0 -->
% 7.19/6.73                 (bnd_c3_1 X15 | ~ bnd_c2_1 X15) | bnd_c8_1 X15) |
% 7.19/6.73             bnd_c6_0) |
% 7.19/6.73            (((((bnd_ndr1_0 &
% 7.19/6.73                 (ALL X16. bnd_ndr1_1 bnd_a294 --> bnd_c7_2 bnd_a294 X16)) &
% 7.19/6.73                bnd_ndr1_1 bnd_a294) &
% 7.19/6.73               bnd_c3_2 bnd_a294 bnd_a295) &
% 7.19/6.73              ~ bnd_c2_2 bnd_a294 bnd_a295) &
% 7.19/6.73             ~ bnd_c1_2 bnd_a294 bnd_a295) &
% 7.19/6.73            ~ bnd_c4_1 bnd_a294)) &
% 7.19/6.73          ((((bnd_ndr1_0 & bnd_c6_1 bnd_a296) & ~ bnd_c7_1 bnd_a296) &
% 7.19/6.73            bnd_c10_1 bnd_a296 |
% 7.19/6.73            (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a297) &
% 7.19/6.73                ~ bnd_c5_2 bnd_a297 bnd_a298) &
% 7.19/6.73               bnd_c8_2 bnd_a297 bnd_a298) &
% 7.19/6.73              ~ bnd_c4_2 bnd_a297 bnd_a298) &
% 7.19/6.73             ~ bnd_c7_1 bnd_a297) &
% 7.19/6.73            ~ bnd_c4_1 bnd_a297) |
% 7.19/6.73           (ALL X17.
% 7.19/6.73               bnd_ndr1_0 -->
% 7.19/6.73               (bnd_c9_1 X17 | bnd_c8_1 X17) |
% 7.19/6.73               ((bnd_ndr1_1 X17 & bnd_c9_2 X17 bnd_a299) &
% 7.19/6.73                bnd_c8_2 X17 bnd_a299) &
% 7.19/6.73               ~ bnd_c3_2 X17 bnd_a299))) &
% 7.19/6.73         (((ALL X18.
% 7.19/6.73               bnd_ndr1_0 -->
% 7.19/6.73               (~ bnd_c1_1 X18 |
% 7.19/6.73                (ALL X19.
% 7.19/6.73                    bnd_ndr1_1 X18 -->
% 7.19/6.73                    (bnd_c9_2 X18 X19 | ~ bnd_c8_2 X18 X19) |
% 7.19/6.73                    ~ bnd_c5_2 X18 X19)) |
% 7.19/6.73               ~ bnd_c4_1 X18) |
% 7.19/6.73           (((((bnd_ndr1_0 & ~ bnd_c8_1 bnd_a300) &
% 7.19/6.73               (ALL X20.
% 7.19/6.73                   bnd_ndr1_1 bnd_a300 -->
% 7.19/6.73                   (~ bnd_c2_2 bnd_a300 X20 | ~ bnd_c7_2 bnd_a300 X20) |
% 7.19/6.73                   bnd_c4_2 bnd_a300 X20)) &
% 7.19/6.73              bnd_ndr1_1 bnd_a300) &
% 7.19/6.73             ~ bnd_c5_2 bnd_a300 bnd_a301) &
% 7.19/6.73            bnd_c4_2 bnd_a300 bnd_a301) &
% 7.19/6.73           bnd_c6_2 bnd_a300 bnd_a301) |
% 7.19/6.73          ((((bnd_ndr1_0 & ~ bnd_c7_1 bnd_a302) & bnd_ndr1_1 bnd_a302) &
% 7.19/6.73            bnd_c6_2 bnd_a302 bnd_a303) &
% 7.19/6.73           ~ bnd_c5_2 bnd_a302 bnd_a303) &
% 7.19/6.73          bnd_c10_1 bnd_a302)) &
% 7.19/6.73        ((~ bnd_c10_0 | bnd_c9_0) | ~ bnd_c6_0)) &
% 7.19/6.73       (((ALL X21.
% 7.19/6.73             bnd_ndr1_0 -->
% 7.19/6.73             (~ bnd_c8_1 X21 | ~ bnd_c1_1 X21) |
% 7.19/6.73             (ALL X22.
% 7.19/6.73                 bnd_ndr1_1 X21 -->
% 7.19/6.73                 (~ bnd_c9_2 X21 X22 | bnd_c5_2 X21 X22) |
% 7.19/6.73                 bnd_c3_2 X21 X22)) |
% 7.19/6.73         (ALL X23.
% 7.19/6.73             bnd_ndr1_0 -->
% 7.19/6.73             (bnd_c10_1 X23 | ~ bnd_c5_1 X23) |
% 7.19/6.73             ((bnd_ndr1_1 X23 & bnd_c2_2 X23 bnd_a304) &
% 7.19/6.73              bnd_c6_2 X23 bnd_a304) &
% 7.19/6.73             ~ bnd_c4_2 X23 bnd_a304)) |
% 7.19/6.73        ~ bnd_c1_0)) &
% 7.19/6.73      ((~ bnd_c1_0 | ~ bnd_c9_0) |
% 7.19/6.73       (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a305) &
% 7.19/6.73           ~ bnd_c5_2 bnd_a305 bnd_a306) &
% 7.19/6.73          bnd_c3_2 bnd_a305 bnd_a306) &
% 7.19/6.73         bnd_c1_2 bnd_a305 bnd_a306) &
% 7.19/6.73        bnd_c3_1 bnd_a305) &
% 7.19/6.73       (ALL X24.
% 7.19/6.73           bnd_ndr1_1 bnd_a305 -->
% 7.19/6.73           (~ bnd_c8_2 bnd_a305 X24 | ~ bnd_c4_2 bnd_a305 X24) |
% 7.19/6.73           ~ bnd_c10_2 bnd_a305 X24))) &
% 7.19/6.73     (((ALL X25.
% 7.19/6.73           bnd_ndr1_0 -->
% 7.19/6.73           ((ALL X26.
% 7.19/6.73                bnd_ndr1_1 X25 -->
% 7.19/6.73                (~ bnd_c3_2 X25 X26 | ~ bnd_c10_2 X25 X26) |
% 7.19/6.73                ~ bnd_c2_2 X25 X26) |
% 7.19/6.73            ~ bnd_c10_1 X25) |
% 7.19/6.73           ~ bnd_c4_1 X25) |
% 7.19/6.73       bnd_c1_0) |
% 7.19/6.73      (ALL X27.
% 7.19/6.73          bnd_ndr1_0 -->
% 7.19/6.73          bnd_c4_1 X27 |
% 7.19/6.73          (ALL X28.
% 7.19/6.73              bnd_ndr1_1 X27 -->
% 7.19/6.73              (~ bnd_c3_2 X27 X28 | bnd_c7_2 X27 X28) | bnd_c6_2 X27 X28)))) &
% 7.19/6.73    (((ALL X29.
% 7.19/6.73          bnd_ndr1_0 -->
% 7.19/6.73          (~ bnd_c9_1 X29 | ~ bnd_c6_1 X29) |
% 7.19/6.73          (ALL X30.
% 7.19/6.73              bnd_ndr1_1 X29 -->
% 7.19/6.73              (bnd_c1_2 X29 X30 | bnd_c6_2 X29 X30) | ~ bnd_c4_2 X29 X30)) |
% 7.19/6.73      bnd_c1_0) |
% 7.19/6.73     (ALL X31. bnd_ndr1_0 --> ~ bnd_c4_1 X31 | ~ bnd_c8_1 X31))) &
% 7.19/6.73   (((bnd_ndr1_0 &
% 7.19/6.73      (ALL X32.
% 7.19/6.73          bnd_ndr1_1 bnd_a307 -->
% 7.19/6.73          (bnd_c6_2 bnd_a307 X32 | ~ bnd_c7_2 bnd_a307 X32) |
% 7.19/6.73          ~ bnd_c5_2 bnd_a307 X32)) &
% 7.19/6.73     ~ bnd_c9_1 bnd_a307) &
% 7.19/6.73    bnd_c8_1 bnd_a307 |
% 7.19/6.73    bnd_c5_0)) &
% 7.19/6.73  (((((((bnd_ndr1_0 & ~ bnd_c5_1 bnd_a308) & ~ bnd_c10_1 bnd_a308) &
% 7.19/6.73       bnd_ndr1_1 bnd_a308) &
% 7.19/6.73      ~ bnd_c7_2 bnd_a308 bnd_a309) &
% 7.19/6.73     bnd_c8_2 bnd_a308 bnd_a309) &
% 7.19/6.73    bnd_c1_2 bnd_a308 bnd_a309 |
% 7.19/6.73    (((((bnd_ndr1_0 & ~ bnd_c5_1 bnd_a310) & ~ bnd_c2_1 bnd_a310) &
% 7.19/6.73       bnd_ndr1_1 bnd_a310) &
% 7.19/6.73      ~ bnd_c2_2 bnd_a310 bnd_a311) &
% 7.19/6.73     bnd_c4_2 bnd_a310 bnd_a311) &
% 7.19/6.73    ~ bnd_c6_2 bnd_a310 bnd_a311) |
% 7.19/6.73   (ALL X33.
% 7.19/6.73       bnd_ndr1_0 -->
% 7.19/6.73       (bnd_c3_1 X33 |
% 7.19/6.73        ((bnd_ndr1_1 X33 & bnd_c5_2 X33 bnd_a312) & ~ bnd_c4_2 X33 bnd_a312) &
% 7.19/6.73        bnd_c2_2 X33 bnd_a312) |
% 7.19/6.73       bnd_c7_1 X33))) &
% 7.19/6.73                                       (((ALL X34.
% 7.19/6.73       bnd_ndr1_0 -->
% 7.19/6.73       ((ALL X35.
% 7.19/6.73            bnd_ndr1_1 X34 -->
% 7.19/6.73            (~ bnd_c7_2 X34 X35 | bnd_c9_2 X34 X35) | ~ bnd_c2_2 X34 X35) |
% 7.19/6.73        bnd_c3_1 X34) |
% 7.19/6.73       bnd_c9_1 X34) |
% 7.19/6.73   bnd_c1_0) |
% 7.19/6.73  ~ bnd_c9_0)) &
% 7.19/6.73                                      ((bnd_c7_0 |
% 7.19/6.73  ((((bnd_ndr1_0 &
% 7.19/6.73      (ALL X36.
% 7.19/6.73          bnd_ndr1_1 bnd_a313 -->
% 7.19/6.73          (~ bnd_c7_2 bnd_a313 X36 | ~ bnd_c4_2 bnd_a313 X36) |
% 7.19/6.73          ~ bnd_c3_2 bnd_a313 X36)) &
% 7.19/6.73     bnd_ndr1_1 bnd_a313) &
% 7.19/6.73    ~ bnd_c9_2 bnd_a313 bnd_a314) &
% 7.19/6.73   ~ bnd_c4_2 bnd_a313 bnd_a314) &
% 7.19/6.73  ~ bnd_c2_2 bnd_a313 bnd_a314) |
% 7.19/6.73                                       ((bnd_ndr1_0 & bnd_c5_1 bnd_a315) &
% 7.19/6.73  (ALL X37.
% 7.19/6.73      bnd_ndr1_1 bnd_a315 -->
% 7.19/6.73      (bnd_c1_2 bnd_a315 X37 | bnd_c10_2 bnd_a315 X37) |
% 7.19/6.73      bnd_c5_2 bnd_a315 X37)) &
% 7.19/6.73                                       (ALL X38.
% 7.19/6.73     bnd_ndr1_1 bnd_a315 -->
% 7.19/6.73     (bnd_c9_2 bnd_a315 X38 | bnd_c3_2 bnd_a315 X38) |
% 7.19/6.73     ~ bnd_c7_2 bnd_a315 X38))) &
% 7.19/6.73                                     ((~ bnd_c7_0 |
% 7.19/6.73                                       (ALL X39.
% 7.19/6.73     bnd_ndr1_0 -->
% 7.19/6.73     (((bnd_ndr1_1 X39 & ~ bnd_c3_2 X39 bnd_a316) & ~ bnd_c5_2 X39 bnd_a316) &
% 7.19/6.73      bnd_c8_2 X39 bnd_a316 |
% 7.19/6.73      (ALL X40.
% 7.19/6.73          bnd_ndr1_1 X39 -->
% 7.19/6.73          (~ bnd_c1_2 X39 X40 | bnd_c7_2 X39 X40) | bnd_c6_2 X39 X40)) |
% 7.19/6.73     ~ bnd_c3_1 X39)) |
% 7.19/6.73                                      bnd_c3_0)) &
% 7.19/6.73                                    (((ALL X41.
% 7.19/6.73    bnd_ndr1_0 -->
% 7.19/6.73    (bnd_c3_1 X41 |
% 7.19/6.73     (ALL X42. bnd_ndr1_1 X41 --> ~ bnd_c10_2 X41 X42 | bnd_c4_2 X41 X42)) |
% 7.19/6.73    (ALL X43.
% 7.19/6.73        bnd_ndr1_1 X41 -->
% 7.19/6.73        (bnd_c9_2 X41 X43 | bnd_c7_2 X41 X43) | bnd_c4_2 X41 X43)) |
% 7.19/6.73                                      ((bnd_ndr1_0 & bnd_c5_1 bnd_a317) &
% 7.19/6.73                                       bnd_c4_1 bnd_a317) &
% 7.19/6.73                                      (ALL X44.
% 7.19/6.73    bnd_ndr1_1 bnd_a317 -->
% 7.19/6.73    (~ bnd_c2_2 bnd_a317 X44 | bnd_c6_2 bnd_a317 X44) |
% 7.19/6.73    bnd_c10_2 bnd_a317 X44)) |
% 7.19/6.73                                     bnd_c8_0)) &
% 7.19/6.73                                   (((ALL X45.
% 7.19/6.73   bnd_ndr1_0 -->
% 7.19/6.73   ((bnd_ndr1_1 X45 & bnd_c10_2 X45 bnd_a318) & bnd_c7_2 X45 bnd_a318) &
% 7.19/6.73   bnd_c3_2 X45 bnd_a318 |
% 7.19/6.73   bnd_c5_1 X45) |
% 7.19/6.73                                     bnd_c9_0) |
% 7.19/6.73                                    ((bnd_ndr1_0 & ~ bnd_c9_1 bnd_a319) &
% 7.19/6.73                                     ~ bnd_c10_1 bnd_a319) &
% 7.19/6.73                                    (ALL X46.
% 7.19/6.73  bnd_ndr1_1 bnd_a319 -->
% 7.19/6.73  ~ bnd_c10_2 bnd_a319 X46 | bnd_c3_2 bnd_a319 X46))) &
% 7.19/6.73                                  (((ALL X47.
% 7.19/6.73  bnd_ndr1_0 -->
% 7.19/6.73  (~ bnd_c9_1 X47 |
% 7.19/6.73   (ALL X48.
% 7.19/6.73       bnd_ndr1_1 X47 -->
% 7.19/6.73       (~ bnd_c4_2 X47 X48 | ~ bnd_c8_2 X47 X48) | bnd_c5_2 X47 X48)) |
% 7.19/6.73  ~ bnd_c10_1 X47) |
% 7.19/6.73                                    ((((((bnd_ndr1_0 & bnd_c6_1 bnd_a320) &
% 7.19/6.73   bnd_ndr1_1 bnd_a320) &
% 7.19/6.73  ~ bnd_c6_2 bnd_a320 bnd_a321) &
% 7.19/6.73                                       bnd_c2_2 bnd_a320 bnd_a321) &
% 7.19/6.73                                      bnd_ndr1_1 bnd_a320) &
% 7.19/6.73                                     ~ bnd_c7_2 bnd_a320 bnd_a322) &
% 7.19/6.73                                    ~ bnd_c2_2 bnd_a320 bnd_a322) |
% 7.19/6.73                                   (ALL X49.
% 7.19/6.73                                       bnd_ndr1_0 -->
% 7.19/6.73                                       (ALL X50.
% 7.19/6.73     bnd_ndr1_1 X49 -->
% 7.19/6.73     (bnd_c1_2 X49 X50 | bnd_c8_2 X49 X50) | ~ bnd_c5_2 X49 X50) |
% 7.19/6.73                                       ~ bnd_c1_1 X49))) &
% 7.19/6.73                                 ((~ bnd_c5_0 |
% 7.19/6.73                                   (((((bnd_ndr1_0 & ~ bnd_c10_1 bnd_a323) &
% 7.19/6.73                                       bnd_ndr1_1 bnd_a323) &
% 7.19/6.73                                      ~ bnd_c9_2 bnd_a323 bnd_a324) &
% 7.19/6.73                                     bnd_c7_2 bnd_a323 bnd_a324) &
% 7.19/6.73                                    bnd_c4_2 bnd_a323 bnd_a324) &
% 7.19/6.73                                   ~ bnd_c3_1 bnd_a323) |
% 7.19/6.73                                  (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a325) &
% 7.19/6.73                                      bnd_c5_2 bnd_a325 bnd_a326) &
% 7.19/6.73                                     bnd_c7_2 bnd_a325 bnd_a326) &
% 7.19/6.73                                    ~ bnd_c4_2 bnd_a325 bnd_a326) &
% 7.19/6.73                                   (ALL X51.
% 7.19/6.73                                       bnd_ndr1_1 bnd_a325 -->
% 7.19/6.73                                       (~ bnd_c6_2 bnd_a325 X51 |
% 7.19/6.73  bnd_c4_2 bnd_a325 X51) |
% 7.19/6.73                                       ~ bnd_c2_2 bnd_a325 X51)) &
% 7.19/6.73                                  ~ bnd_c1_1 bnd_a325)) &
% 7.19/6.73                                (((ALL X52.
% 7.19/6.73                                      bnd_ndr1_0 -->
% 7.19/6.73                                      (bnd_c3_1 X52 | ~ bnd_c10_1 X52) |
% 7.19/6.73                                      ~ bnd_c2_1 X52) |
% 7.19/6.73                                  (ALL X53.
% 7.19/6.73                                      bnd_ndr1_0 -->
% 7.19/6.73                                      (bnd_c10_1 X53 | ~ bnd_c7_1 X53) |
% 7.19/6.73                                      ~ bnd_c9_1 X53)) |
% 7.19/6.73                                 ~ bnd_c4_0)) &
% 7.19/6.73                               ((((bnd_ndr1_0 & bnd_c2_1 bnd_a327) &
% 7.19/6.73                                  (ALL X54.
% 7.19/6.73                                      bnd_ndr1_1 bnd_a327 -->
% 7.19/6.73                                      (bnd_c7_2 bnd_a327 X54 |
% 7.19/6.73                                       bnd_c6_2 bnd_a327 X54) |
% 7.19/6.73                                      ~ bnd_c5_2 bnd_a327 X54)) &
% 7.19/6.73                                 ~ bnd_c5_1 bnd_a327 |
% 7.19/6.73                                 (ALL X55.
% 7.19/6.73                                     bnd_ndr1_0 -->
% 7.19/6.73                                     (~ bnd_c4_1 X55 | ~ bnd_c2_1 X55) |
% 7.19/6.73                                     (ALL X56.
% 7.19/6.73   bnd_ndr1_1 X55 -->
% 7.19/6.73   (~ bnd_c2_2 X55 X56 | ~ bnd_c5_2 X55 X56) | ~ bnd_c1_2 X55 X56))) |
% 7.19/6.73                                bnd_c5_0)) &
% 7.19/6.73                              (bnd_c9_0 | bnd_c6_0)) &
% 7.19/6.73                             (((ALL X57.
% 7.19/6.73                                   bnd_ndr1_0 -->
% 7.19/6.73                                   (((bnd_ndr1_1 X57 &
% 7.19/6.73                                      bnd_c8_2 X57 bnd_a328) &
% 7.19/6.73                                     ~ bnd_c1_2 X57 bnd_a328) &
% 7.19/6.73                                    bnd_c2_2 X57 bnd_a328 |
% 7.19/6.73                                    bnd_c3_1 X57) |
% 7.19/6.73                                   bnd_c6_1 X57) |
% 7.19/6.73                               ~ bnd_c7_0) |
% 7.19/6.73                              ~ bnd_c4_0)) &
% 7.19/6.73                            (~ bnd_c6_0 |
% 7.19/6.73                             ((bnd_ndr1_0 &
% 7.19/6.73                               (ALL X58.
% 7.19/6.73                                   bnd_ndr1_1 bnd_a329 -->
% 7.19/6.73                                   (bnd_c2_2 bnd_a329 X58 |
% 7.19/6.73                                    ~ bnd_c3_2 bnd_a329 X58) |
% 7.19/6.73                                   ~ bnd_c7_2 bnd_a329 X58)) &
% 7.19/6.73                              bnd_c1_1 bnd_a329) &
% 7.19/6.73                             bnd_c3_1 bnd_a329)) &
% 7.19/6.73                           ((((((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a330) &
% 7.19/6.73                                bnd_ndr1_1 bnd_a330) &
% 7.19/6.73                               bnd_c1_2 bnd_a330 bnd_a331) &
% 7.19/6.73                              ~ bnd_c10_2 bnd_a330 bnd_a331) &
% 7.19/6.73                             bnd_c6_2 bnd_a330 bnd_a331) &
% 7.19/6.73                            (ALL X59.
% 7.19/6.73                                bnd_ndr1_1 bnd_a330 -->
% 7.19/6.73                                (bnd_c3_2 bnd_a330 X59 |
% 7.19/6.73                                 ~ bnd_c1_2 bnd_a330 X59) |
% 7.19/6.73                                bnd_c2_2 bnd_a330 X59) |
% 7.19/6.73                            ((bnd_ndr1_0 & ~ bnd_c6_1 bnd_a332) &
% 7.19/6.73                             (ALL X60.
% 7.19/6.73                                 bnd_ndr1_1 bnd_a332 -->
% 7.19/6.73                                 ~ bnd_c3_2 bnd_a332 X60 |
% 7.19/6.73                                 ~ bnd_c10_2 bnd_a332 X60)) &
% 7.19/6.73                            ~ bnd_c10_1 bnd_a332)) &
% 7.19/6.73                          (((ALL X61.
% 7.19/6.73                                bnd_ndr1_0 -->
% 7.19/6.73                                ((ALL X62.
% 7.19/6.73                                     bnd_ndr1_1 X61 -->
% 7.19/6.73                                     (~ bnd_c2_2 X61 X62 | bnd_c8_2 X61 X62) |
% 7.19/6.73                                     bnd_c1_2 X61 X62) |
% 7.19/6.73                                 ~ bnd_c9_1 X61) |
% 7.19/6.73                                (ALL X63.
% 7.19/6.73                                    bnd_ndr1_1 X61 -->
% 7.19/6.73                                    (bnd_c10_2 X61 X63 | bnd_c4_2 X61 X63) |
% 7.19/6.73                                    bnd_c3_2 X61 X63)) |
% 7.19/6.73                            bnd_c2_0) |
% 7.19/6.73                           (ALL X64.
% 7.19/6.73                               bnd_ndr1_0 -->
% 7.19/6.73                               ((ALL X65.
% 7.19/6.73                                    bnd_ndr1_1 X64 -->
% 7.19/6.73                                    (~ bnd_c5_2 X64 X65 |
% 7.19/6.73                                     ~ bnd_c4_2 X64 X65) |
% 7.19/6.73                                    ~ bnd_c6_2 X64 X65) |
% 7.19/6.73                                ~ bnd_c4_1 X64) |
% 7.19/6.73                               ~ bnd_c1_1 X64))) &
% 7.19/6.73                         ((~ bnd_c10_0 |
% 7.19/6.73                           (ALL X66.
% 7.19/6.73                               bnd_ndr1_0 -->
% 7.19/6.73                               (ALL X67.
% 7.19/6.73                                   bnd_ndr1_1 X66 -->
% 7.19/6.73                                   (bnd_c4_2 X66 X67 | ~ bnd_c10_2 X66 X67) |
% 7.19/6.73                                   ~ bnd_c3_2 X66 X67) |
% 7.19/6.73                               bnd_c9_1 X66)) |
% 7.19/6.73                          ~ bnd_c4_0)) &
% 7.19/6.73                        ((((((((((bnd_ndr1_0 & bnd_c8_1 bnd_a333) &
% 7.19/6.73                                 bnd_ndr1_1 bnd_a333) &
% 7.19/6.73                                bnd_c8_2 bnd_a333 bnd_a334) &
% 7.19/6.73                               ~ bnd_c7_2 bnd_a333 bnd_a334) &
% 7.19/6.73                              bnd_c9_2 bnd_a333 bnd_a334) &
% 7.19/6.73                             bnd_ndr1_1 bnd_a333) &
% 7.19/6.73                            ~ bnd_c7_2 bnd_a333 bnd_a335) &
% 7.19/6.73                           bnd_c5_2 bnd_a333 bnd_a335) &
% 7.19/6.73                          ~ bnd_c9_2 bnd_a333 bnd_a335 |
% 7.19/6.73                          bnd_c7_0) |
% 7.19/6.73                         (ALL X68.
% 7.19/6.73                             bnd_ndr1_0 -->
% 7.19/6.73                             ((bnd_ndr1_1 X68 & ~ bnd_c1_2 X68 bnd_a336) &
% 7.19/6.73                              bnd_c8_2 X68 bnd_a336 |
% 7.19/6.73                              ~ bnd_c10_1 X68) |
% 7.19/6.73                             ~ bnd_c1_1 X68))) &
% 7.19/6.73                       (((ALL X69.
% 7.19/6.73                             bnd_ndr1_0 -->
% 7.19/6.73                             (bnd_c8_1 X69 | bnd_c7_1 X69) |
% 7.19/6.73                             (bnd_ndr1_1 X69 & ~ bnd_c8_2 X69 bnd_a337) &
% 7.19/6.73                             ~ bnd_c4_2 X69 bnd_a337) |
% 7.19/6.73                         bnd_c10_0) |
% 7.19/6.73                        (ALL X70.
% 7.19/6.73                            bnd_ndr1_0 -->
% 7.19/6.73                            (~ bnd_c4_1 X70 |
% 7.19/6.73                             ((bnd_ndr1_1 X70 & ~ bnd_c7_2 X70 bnd_a338) &
% 7.19/6.73                              ~ bnd_c8_2 X70 bnd_a338) &
% 7.19/6.73                             ~ bnd_c10_2 X70 bnd_a338) |
% 7.19/6.73                            ~ bnd_c10_1 X70))) &
% 7.19/6.73                      ((~ bnd_c6_0 |
% 7.19/6.73                        ((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a339) &
% 7.19/6.73                               ~ bnd_c3_2 bnd_a339 bnd_a340) &
% 7.19/6.73                              bnd_c9_2 bnd_a339 bnd_a340) &
% 7.19/6.73                             ~ bnd_c7_2 bnd_a339 bnd_a340) &
% 7.19/6.73                            ~ bnd_c6_1 bnd_a339) &
% 7.19/6.73                           bnd_ndr1_1 bnd_a339) &
% 7.19/6.73                          bnd_c4_2 bnd_a339 bnd_a341) &
% 7.19/6.73                         ~ bnd_c9_2 bnd_a339 bnd_a341) &
% 7.19/6.73                        ~ bnd_c5_2 bnd_a339 bnd_a341) |
% 7.19/6.73                       (ALL X71.
% 7.19/6.73                           bnd_ndr1_0 -->
% 7.19/6.73                           (bnd_c9_1 X71 |
% 7.19/6.73                            ((bnd_ndr1_1 X71 & bnd_c1_2 X71 bnd_a342) &
% 7.19/6.73                             bnd_c7_2 X71 bnd_a342) &
% 7.19/6.73                            ~ bnd_c2_2 X71 bnd_a342) |
% 7.19/6.73                           ~ bnd_c7_1 X71))) &
% 7.19/6.73                     ((bnd_c8_0 | bnd_c5_0) |
% 7.19/6.73                      (((((bnd_ndr1_0 & ~ bnd_c8_1 bnd_a343) &
% 7.19/6.73                          bnd_c5_1 bnd_a343) &
% 7.19/6.73                         bnd_ndr1_1 bnd_a343) &
% 7.19/6.73                        ~ bnd_c4_2 bnd_a343 bnd_a344) &
% 7.19/6.73                       bnd_c10_2 bnd_a343 bnd_a344) &
% 7.19/6.73                      bnd_c2_2 bnd_a343 bnd_a344)) &
% 7.19/6.73                    (((ALL X72.
% 7.19/6.73                          bnd_ndr1_0 -->
% 7.19/6.73                          (bnd_c9_1 X72 |
% 7.19/6.73                           (ALL X73.
% 7.19/6.73                               bnd_ndr1_1 X72 -->
% 7.19/6.73                               (bnd_c5_2 X72 X73 | bnd_c1_2 X72 X73) |
% 7.19/6.73                               bnd_c8_2 X72 X73)) |
% 7.19/6.73                          (ALL X74.
% 7.19/6.73                              bnd_ndr1_1 X72 -->
% 7.19/6.73                              ~ bnd_c6_2 X72 X74 | ~ bnd_c4_2 X72 X74)) |
% 7.19/6.73                      (((((bnd_ndr1_0 &
% 7.19/6.73                           (ALL X75.
% 7.19/6.73                               bnd_ndr1_1 bnd_a345 -->
% 7.19/6.73                               (bnd_c6_2 bnd_a345 X75 |
% 7.19/6.73                                ~ bnd_c2_2 bnd_a345 X75) |
% 7.19/6.73                               ~ bnd_c4_2 bnd_a345 X75)) &
% 7.19/6.73                          bnd_c1_1 bnd_a345) &
% 7.19/6.73                         bnd_ndr1_1 bnd_a345) &
% 7.19/6.73                        bnd_c2_2 bnd_a345 bnd_a346) &
% 7.19/6.73                       ~ bnd_c10_2 bnd_a345 bnd_a346) &
% 7.19/6.73                      bnd_c8_2 bnd_a345 bnd_a346) |
% 7.19/6.73                     (ALL X76.
% 7.19/6.73                         bnd_ndr1_0 -->
% 7.19/6.73                         ((bnd_ndr1_1 X76 & ~ bnd_c1_2 X76 bnd_a347) &
% 7.19/6.73                          bnd_c10_2 X76 bnd_a347) &
% 7.19/6.73                         bnd_c7_2 X76 bnd_a347 |
% 7.19/6.73                         ~ bnd_c4_1 X76))) &
% 7.19/6.73                   (bnd_c3_0 |
% 7.19/6.73                    ((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a348) &
% 7.19/6.73                       ~ bnd_c3_2 bnd_a348 bnd_a349) &
% 7.19/6.73                      bnd_c6_2 bnd_a348 bnd_a349) &
% 7.19/6.73                     bnd_c7_2 bnd_a348 bnd_a349) &
% 7.19/6.73                    ~ bnd_c6_1 bnd_a348)) &
% 7.19/6.73                  ((((((bnd_ndr1_0 & ~ bnd_c3_1 bnd_a350) &
% 7.19/6.73                       bnd_c2_1 bnd_a350) &
% 7.19/6.73                      bnd_ndr1_1 bnd_a350) &
% 7.19/6.73                     bnd_c7_2 bnd_a350 bnd_a351) &
% 7.19/6.73                    ~ bnd_c8_2 bnd_a350 bnd_a351) &
% 7.19/6.73                   bnd_c2_2 bnd_a350 bnd_a351 |
% 7.19/6.73                   bnd_c7_0)) &
% 7.19/6.73                 (~ bnd_c1_0 | ~ bnd_c6_0)) &
% 7.19/6.73                ((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a352) &
% 7.19/6.73                     ~ bnd_c2_2 bnd_a352 bnd_a353) &
% 7.19/6.73                    ~ bnd_c5_2 bnd_a352 bnd_a353) &
% 7.19/6.73                   bnd_c6_2 bnd_a352 bnd_a353) &
% 7.19/6.73                  bnd_c10_1 bnd_a352) &
% 7.19/6.73                 ~ bnd_c8_1 bnd_a352 |
% 7.19/6.73                 bnd_c10_0)) &
% 7.19/6.73               ((~ bnd_c2_0 |
% 7.19/6.73                 (ALL X77.
% 7.19/6.73                     bnd_ndr1_0 -->
% 7.19/6.73                     (~ bnd_c1_1 X77 |
% 7.19/6.73                      ((bnd_ndr1_1 X77 & bnd_c5_2 X77 bnd_a354) &
% 7.19/6.73                       bnd_c9_2 X77 bnd_a354) &
% 7.19/6.73                      bnd_c4_2 X77 bnd_a354) |
% 7.19/6.73                     bnd_c7_1 X77)) |
% 7.19/6.73                ((bnd_ndr1_0 & ~ bnd_c7_1 bnd_a355) & ~ bnd_c4_1 bnd_a355) &
% 7.19/6.73                ~ bnd_c6_1 bnd_a355)) &
% 7.19/6.73              (((((((bnd_ndr1_0 & bnd_c8_1 bnd_a356) & bnd_ndr1_1 bnd_a356) &
% 7.19/6.73                   bnd_c1_2 bnd_a356 bnd_a357) &
% 7.19/6.73                  ~ bnd_c6_2 bnd_a356 bnd_a357) &
% 7.19/6.73                 ~ bnd_c5_2 bnd_a356 bnd_a357) &
% 7.19/6.73                ~ bnd_c2_1 bnd_a356 |
% 7.19/6.73                (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a358) &
% 7.19/6.73                    ~ bnd_c2_2 bnd_a358 bnd_a359) &
% 7.19/6.73                   bnd_c5_2 bnd_a358 bnd_a359) &
% 7.19/6.73                  bnd_c10_2 bnd_a358 bnd_a359) &
% 7.19/6.73                 ~ bnd_c3_1 bnd_a358) &
% 7.19/6.73                ~ bnd_c8_1 bnd_a358) |
% 7.19/6.73               (ALL X78.
% 7.19/6.73                   bnd_ndr1_0 -->
% 7.19/6.73                   (bnd_c10_1 X78 |
% 7.19/6.73                    (ALL X79.
% 7.19/6.73                        bnd_ndr1_1 X78 -->
% 7.19/6.73                        (bnd_c3_2 X78 X79 | bnd_c7_2 X78 X79) |
% 7.19/6.73                        ~ bnd_c1_2 X78 X79)) |
% 7.19/6.73                   (ALL X80.
% 7.19/6.73                       bnd_ndr1_1 X78 -->
% 7.19/6.73                       (bnd_c6_2 X78 X80 | ~ bnd_c8_2 X78 X80) |
% 7.19/6.73                       bnd_c5_2 X78 X80)))) &
% 7.19/6.73             ((((bnd_ndr1_0 & ~ bnd_c7_1 bnd_a360) & ~ bnd_c6_1 bnd_a360) &
% 7.19/6.73               ~ bnd_c5_1 bnd_a360 |
% 7.19/6.73               bnd_c9_0) |
% 7.19/6.73              ((bnd_ndr1_0 & bnd_c3_1 bnd_a361) & bnd_c4_1 bnd_a361) &
% 7.19/6.73              ~ bnd_c1_1 bnd_a361)) &
% 7.19/6.73            (((ALL X81.
% 7.19/6.73                  bnd_ndr1_0 -->
% 7.19/6.73                  ((ALL X82.
% 7.19/6.73                       bnd_ndr1_1 X81 -->
% 7.19/6.73                       (bnd_c2_2 X81 X82 | bnd_c7_2 X81 X82) |
% 7.19/6.73                       bnd_c10_2 X81 X82) |
% 7.19/6.73                   bnd_c2_1 X81) |
% 7.19/6.73                  bnd_c5_1 X81) |
% 7.19/6.73              ((bnd_ndr1_0 &
% 7.19/6.73                (ALL X83.
% 7.19/6.73                    bnd_ndr1_1 bnd_a362 -->
% 7.19/6.73                    (~ bnd_c10_2 bnd_a362 X83 | ~ bnd_c4_2 bnd_a362 X83) |
% 7.19/6.73                    bnd_c7_2 bnd_a362 X83)) &
% 7.19/6.73               ~ bnd_c10_1 bnd_a362) &
% 7.19/6.73              (ALL X84.
% 7.19/6.73                  bnd_ndr1_1 bnd_a362 -->
% 7.19/6.73                  (~ bnd_c7_2 bnd_a362 X84 | bnd_c4_2 bnd_a362 X84) |
% 7.19/6.73                  ~ bnd_c5_2 bnd_a362 X84)) |
% 7.19/6.73             (ALL X85.
% 7.19/6.73                 bnd_ndr1_0 -->
% 7.19/6.73                 ((bnd_ndr1_1 X85 & bnd_c5_2 X85 bnd_a363) &
% 7.19/6.73                  bnd_c4_2 X85 bnd_a363 |
% 7.19/6.73                  bnd_c6_1 X85) |
% 7.19/6.73                 ~ bnd_c10_1 X85))) &
% 7.19/6.73           ((~ bnd_c10_0 | ~ bnd_c1_0) | bnd_c5_0)) &
% 7.19/6.73          ((~ bnd_c6_0 |
% 7.19/6.73            ((bnd_ndr1_0 & bnd_c8_1 bnd_a364) & bnd_c9_1 bnd_a364) &
% 7.19/6.73            (ALL X86.
% 7.19/6.73                bnd_ndr1_1 bnd_a364 -->
% 7.19/6.73                bnd_c4_2 bnd_a364 X86 | bnd_c2_2 bnd_a364 X86)) |
% 7.19/6.73           (ALL X87.
% 7.19/6.73               bnd_ndr1_0 -->
% 7.19/6.73               ~ bnd_c3_1 X87 |
% 7.19/6.73               (ALL X88.
% 7.19/6.73                   bnd_ndr1_1 X87 -->
% 7.19/6.73                   (~ bnd_c4_2 X87 X88 | bnd_c7_2 X87 X88) |
% 7.19/6.73                   bnd_c6_2 X87 X88)))) &
% 7.19/6.73         (((ALL X89.
% 7.19/6.73               bnd_ndr1_0 -->
% 7.19/6.73               (bnd_c3_1 X89 |
% 7.19/6.73                (ALL X90.
% 7.19/6.73                    bnd_ndr1_1 X89 -->
% 7.19/6.73                    (bnd_c5_2 X89 X90 | ~ bnd_c2_2 X89 X90) |
% 7.19/6.73                    bnd_c3_2 X89 X90)) |
% 7.19/6.73               bnd_c1_1 X89) |
% 7.19/6.73           (((((bnd_ndr1_0 & bnd_c7_1 bnd_a365) & bnd_c3_1 bnd_a365) &
% 7.19/6.73              bnd_ndr1_1 bnd_a365) &
% 7.19/6.73             ~ bnd_c8_2 bnd_a365 bnd_a366) &
% 7.19/6.73            bnd_c1_2 bnd_a365 bnd_a366) &
% 7.19/6.73           bnd_c4_2 bnd_a365 bnd_a366) |
% 7.19/6.73          (ALL X91. bnd_ndr1_0 --> bnd_c3_1 X91 | ~ bnd_c5_1 X91))) &
% 7.19/6.73        ((~ bnd_c6_0 | ~ bnd_c1_0) | ~ bnd_c9_0)) &
% 7.19/6.73       ((((((bnd_ndr1_0 &
% 7.19/6.73             (ALL X92.
% 7.19/6.73                 bnd_ndr1_1 bnd_a367 -->
% 7.19/6.73                 (bnd_c10_2 bnd_a367 X92 | ~ bnd_c7_2 bnd_a367 X92) |
% 7.19/6.73                 ~ bnd_c1_2 bnd_a367 X92)) &
% 7.19/6.73            bnd_ndr1_1 bnd_a367) &
% 7.19/6.73           bnd_c2_2 bnd_a367 bnd_a368) &
% 7.19/6.73          bnd_c7_2 bnd_a367 bnd_a368) &
% 7.19/6.73         bnd_c10_2 bnd_a367 bnd_a368 |
% 7.19/6.73         (ALL X93.
% 7.19/6.73             bnd_ndr1_0 -->
% 7.19/6.73             ((ALL X94.
% 7.19/6.73                  bnd_ndr1_1 X93 -->
% 7.19/6.73                  (~ bnd_c7_2 X93 X94 | bnd_c4_2 X93 X94) |
% 7.19/6.73                  bnd_c5_2 X93 X94) |
% 7.19/6.73              (ALL X95.
% 7.19/6.73                  bnd_ndr1_1 X93 -->
% 7.19/6.73                  (~ bnd_c6_2 X93 X95 | ~ bnd_c3_2 X93 X95) |
% 7.19/6.73                  bnd_c1_2 X93 X95)) |
% 7.19/6.73             bnd_c6_1 X93)) |
% 7.19/6.73        (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a369) &
% 7.19/6.73            ~ bnd_c4_2 bnd_a369 bnd_a370) &
% 7.19/6.73           ~ bnd_c9_2 bnd_a369 bnd_a370) &
% 7.19/6.73          bnd_c3_2 bnd_a369 bnd_a370) &
% 7.19/6.73         ~ bnd_c2_1 bnd_a369) &
% 7.19/6.73        ~ bnd_c1_1 bnd_a369)) &
% 7.19/6.73      ((bnd_c7_0 |
% 7.19/6.73        (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a371) &
% 7.19/6.73              ~ bnd_c2_2 bnd_a371 bnd_a372) &
% 7.19/6.73             ~ bnd_c1_2 bnd_a371 bnd_a372) &
% 7.19/6.73            bnd_c6_1 bnd_a371) &
% 7.19/6.73           bnd_ndr1_1 bnd_a371) &
% 7.19/6.73          ~ bnd_c9_2 bnd_a371 bnd_a373) &
% 7.19/6.73         ~ bnd_c1_2 bnd_a371 bnd_a373) &
% 7.19/6.73        ~ bnd_c6_2 bnd_a371 bnd_a373) |
% 7.19/6.73       ((bnd_ndr1_0 & ~ bnd_c9_1 bnd_a374) & bnd_c8_1 bnd_a374) &
% 7.19/6.73       bnd_c10_1 bnd_a374)) &
% 7.19/6.73     ((~ bnd_c6_0 | ~ bnd_c4_0) |
% 7.19/6.73      (ALL X96.
% 7.19/6.73          bnd_ndr1_0 -->
% 7.19/6.73          (bnd_c8_1 X96 |
% 7.19/6.73           (ALL X97.
% 7.19/6.73               bnd_ndr1_1 X96 -->
% 7.19/6.73               (bnd_c7_2 X96 X97 | bnd_c10_2 X96 X97) | bnd_c2_2 X96 X97)) |
% 7.19/6.73          (ALL X98.
% 7.19/6.73              bnd_ndr1_1 X96 -->
% 7.19/6.73              (~ bnd_c10_2 X96 X98 | bnd_c3_2 X96 X98) |
% 7.19/6.73              ~ bnd_c4_2 X96 X98)))) &
% 7.19/6.73    (((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a375) & bnd_c7_2 bnd_a375 bnd_a376) &
% 7.19/6.73           ~ bnd_c2_2 bnd_a375 bnd_a376) &
% 7.19/6.73          bnd_c1_2 bnd_a375 bnd_a376) &
% 7.19/6.73         bnd_c8_1 bnd_a375) &
% 7.19/6.73        bnd_ndr1_1 bnd_a375) &
% 7.19/6.73       ~ bnd_c8_2 bnd_a375 bnd_a377) &
% 7.19/6.73      ~ bnd_c6_2 bnd_a375 bnd_a377 |
% 7.19/6.73      (ALL X99.
% 7.19/6.73          bnd_ndr1_0 -->
% 7.19/6.73          ((ALL X100.
% 7.19/6.73               bnd_ndr1_1 X99 -->
% 7.19/6.73               (bnd_c9_2 X99 X100 | bnd_c3_2 X99 X100) | bnd_c5_2 X99 X100) |
% 7.19/6.73           ~ bnd_c1_1 X99) |
% 7.19/6.73          ~ bnd_c3_1 X99)) |
% 7.19/6.73     (ALL X101.
% 7.19/6.73         bnd_ndr1_0 -->
% 7.19/6.73         (bnd_c3_1 X101 |
% 7.19/6.73          (ALL X102.
% 7.19/6.73              bnd_ndr1_1 X101 -->
% 7.19/6.73              (~ bnd_c6_2 X101 X102 | bnd_c9_2 X101 X102) |
% 7.19/6.73              bnd_c2_2 X101 X102)) |
% 7.19/6.73         ~ bnd_c9_1 X101))) &
% 7.19/6.73   ((bnd_c6_0 | bnd_c9_0) |
% 7.19/6.73    ((bnd_ndr1_0 &
% 7.19/6.73      (ALL X103.
% 7.19/6.73          bnd_ndr1_1 bnd_a378 -->
% 7.19/6.73          (~ bnd_c4_2 bnd_a378 X103 | ~ bnd_c9_2 bnd_a378 X103) |
% 7.19/6.73          ~ bnd_c2_2 bnd_a378 X103)) &
% 7.19/6.73     (ALL X104.
% 7.19/6.73         bnd_ndr1_1 bnd_a378 -->
% 7.19/6.73         (bnd_c5_2 bnd_a378 X104 | bnd_c8_2 bnd_a378 X104) |
% 7.19/6.73         ~ bnd_c9_2 bnd_a378 X104)) &
% 7.19/6.73    bnd_c2_1 bnd_a378)) &
% 7.19/6.73  ((~ bnd_c4_0 | bnd_c8_0) |
% 7.19/6.73   (ALL X105.
% 7.19/6.73       bnd_ndr1_0 -->
% 7.19/6.73       ((bnd_ndr1_1 X105 & bnd_c6_2 X105 bnd_a379) & bnd_c7_2 X105 bnd_a379) &
% 7.19/6.73       ~ bnd_c4_2 X105 bnd_a379 |
% 7.19/6.73       ((bnd_ndr1_1 X105 & ~ bnd_c2_2 X105 bnd_a380) &
% 7.19/6.73        ~ bnd_c1_2 X105 bnd_a380) &
% 7.19/6.73       ~ bnd_c4_2 X105 bnd_a380))) &
% 7.19/6.73                                       ((~ bnd_c4_0 |
% 7.19/6.73   (((((bnd_ndr1_0 & bnd_c1_1 bnd_a381) & bnd_ndr1_1 bnd_a381) &
% 7.19/6.73      ~ bnd_c2_2 bnd_a381 bnd_a382) &
% 7.19/6.73     ~ bnd_c5_2 bnd_a381 bnd_a382) &
% 7.19/6.73    bnd_c8_2 bnd_a381 bnd_a382) &
% 7.19/6.73   (ALL X106.
% 7.19/6.73       bnd_ndr1_1 bnd_a381 -->
% 7.19/6.73       (~ bnd_c9_2 bnd_a381 X106 | ~ bnd_c10_2 bnd_a381 X106) |
% 7.19/6.73       bnd_c8_2 bnd_a381 X106)) |
% 7.19/6.73  ~ bnd_c5_0)) &
% 7.19/6.73                                      ((bnd_c9_0 | bnd_c3_0) |
% 7.19/6.73                                       (ALL X107.
% 7.19/6.73     bnd_ndr1_0 -->
% 7.19/6.73     (((bnd_ndr1_1 X107 & bnd_c8_2 X107 bnd_a383) &
% 7.19/6.73       ~ bnd_c3_2 X107 bnd_a383) &
% 7.19/6.73      ~ bnd_c9_2 X107 bnd_a383 |
% 7.19/6.73      (ALL X108.
% 7.19/6.73          bnd_ndr1_1 X107 -->
% 7.19/6.73          (~ bnd_c3_2 X107 X108 | bnd_c9_2 X107 X108) |
% 7.19/6.73          ~ bnd_c6_2 X107 X108)) |
% 7.19/6.73     (ALL X109.
% 7.19/6.73         bnd_ndr1_1 X107 -->
% 7.19/6.73         ~ bnd_c2_2 X107 X109 | ~ bnd_c10_2 X107 X109)))) &
% 7.19/6.73                                     ((~ bnd_c9_0 | bnd_c4_0) |
% 7.19/6.73                                      (((((bnd_ndr1_0 &
% 7.19/6.73     (ALL X110.
% 7.19/6.73         bnd_ndr1_1 bnd_a384 -->
% 7.19/6.73         (~ bnd_c5_2 bnd_a384 X110 | bnd_c2_2 bnd_a384 X110) |
% 7.19/6.73         bnd_c6_2 bnd_a384 X110)) &
% 7.19/6.73    (ALL X111.
% 7.19/6.73        bnd_ndr1_1 bnd_a384 -->
% 7.19/6.73        (bnd_c4_2 bnd_a384 X111 | bnd_c8_2 bnd_a384 X111) |
% 7.19/6.73        bnd_c3_2 bnd_a384 X111)) &
% 7.19/6.73   bnd_ndr1_1 bnd_a384) &
% 7.19/6.73  ~ bnd_c5_2 bnd_a384 bnd_a385) &
% 7.19/6.73                                       bnd_c9_2 bnd_a384 bnd_a385) &
% 7.19/6.73                                      ~ bnd_c6_2 bnd_a384 bnd_a385)) &
% 7.19/6.73                                    ((((bnd_ndr1_0 & ~ bnd_c7_1 bnd_a386) &
% 7.19/6.73                                       bnd_c9_1 bnd_a386) &
% 7.19/6.73                                      bnd_c2_1 bnd_a386 |
% 7.19/6.73                                      ~ bnd_c2_0) |
% 7.19/6.73                                     (ALL X112.
% 7.19/6.73   bnd_ndr1_0 -->
% 7.19/6.73   (((bnd_ndr1_1 X112 & bnd_c2_2 X112 bnd_a387) & ~ bnd_c6_2 X112 bnd_a387) &
% 7.19/6.73    ~ bnd_c1_2 X112 bnd_a387 |
% 7.19/6.73    ~ bnd_c10_1 X112) |
% 7.19/6.73   bnd_c5_1 X112))) &
% 7.19/6.73                                   ((~ bnd_c4_0 |
% 7.19/6.73                                     (ALL X113.
% 7.19/6.73   bnd_ndr1_0 -->
% 7.19/6.73   (bnd_c3_1 X113 |
% 7.19/6.73    ((bnd_ndr1_1 X113 & ~ bnd_c7_2 X113 bnd_a388) &
% 7.19/6.73     ~ bnd_c9_2 X113 bnd_a388) &
% 7.19/6.73    ~ bnd_c4_2 X113 bnd_a388) |
% 7.19/6.73   ~ bnd_c9_1 X113)) |
% 7.19/6.73                                    (ALL X114.
% 7.19/6.73  bnd_ndr1_0 -->
% 7.19/6.73  (((bnd_ndr1_1 X114 & ~ bnd_c2_2 X114 bnd_a389) & bnd_c4_2 X114 bnd_a389) &
% 7.19/6.73   bnd_c5_2 X114 bnd_a389 |
% 7.19/6.73   ((bnd_ndr1_1 X114 & ~ bnd_c5_2 X114 bnd_a390) & bnd_c9_2 X114 bnd_a390) &
% 7.19/6.73   ~ bnd_c1_2 X114 bnd_a390) |
% 7.19/6.73  ~ bnd_c6_1 X114))) &
% 7.19/6.73                                  (((ALL X115.
% 7.19/6.73  bnd_ndr1_0 -->
% 7.19/6.73  (((bnd_ndr1_1 X115 & ~ bnd_c1_2 X115 bnd_a391) & ~ bnd_c9_2 X115 bnd_a391) &
% 7.19/6.73   ~ bnd_c2_2 X115 bnd_a391 |
% 7.19/6.73   ((bnd_ndr1_1 X115 & bnd_c1_2 X115 bnd_a392) & ~ bnd_c2_2 X115 bnd_a392) &
% 7.19/6.73   ~ bnd_c6_2 X115 bnd_a392) |
% 7.19/6.73  ((bnd_ndr1_1 X115 & ~ bnd_c8_2 X115 bnd_a393) & ~ bnd_c3_2 X115 bnd_a393) &
% 7.19/6.73  bnd_c6_2 X115 bnd_a393) |
% 7.19/6.73                                    ((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a394) &
% 7.19/6.73                                     bnd_c1_1 bnd_a394) &
% 7.19/6.73                                    bnd_c3_1 bnd_a394) |
% 7.19/6.73                                   (((((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a395) &
% 7.19/6.73                                       bnd_c7_1 bnd_a395) &
% 7.19/6.73                                      bnd_ndr1_1 bnd_a395) &
% 7.19/6.73                                     bnd_c9_2 bnd_a395 bnd_a396) &
% 7.19/6.73                                    bnd_c3_2 bnd_a395 bnd_a396) &
% 7.19/6.73                                   bnd_c6_2 bnd_a395 bnd_a396)) &
% 7.19/6.73                                 ((bnd_c9_0 |
% 7.19/6.73                                   (bnd_ndr1_0 & ~ bnd_c6_1 bnd_a397) &
% 7.19/6.73                                   (ALL X116.
% 7.19/6.73                                       bnd_ndr1_1 bnd_a397 -->
% 7.19/6.73                                       (~ bnd_c7_2 bnd_a397 X116 |
% 7.19/6.73  bnd_c1_2 bnd_a397 X116) |
% 7.19/6.73                                       bnd_c10_2 bnd_a397 X116)) |
% 7.19/6.73                                  bnd_c6_0)) &
% 7.19/6.73                                (((bnd_ndr1_0 & bnd_c8_1 bnd_a398) &
% 7.19/6.73                                  (ALL X117.
% 7.19/6.73                                      bnd_ndr1_1 bnd_a398 -->
% 7.19/6.73                                      (bnd_c1_2 bnd_a398 X117 |
% 7.19/6.73                                       bnd_c2_2 bnd_a398 X117) |
% 7.19/6.73                                      ~ bnd_c3_2 bnd_a398 X117)) &
% 7.19/6.73                                 bnd_c7_1 bnd_a398 |
% 7.19/6.73                                 ~ bnd_c6_0)) &
% 7.19/6.73                               (((ALL X118.
% 7.19/6.73                                     bnd_ndr1_0 -->
% 7.19/6.73                                     (bnd_c9_1 X118 |
% 7.19/6.73                                      ((bnd_ndr1_1 X118 &
% 7.19/6.73  bnd_c8_2 X118 bnd_a399) &
% 7.19/6.73                                       ~ bnd_c9_2 X118 bnd_a399) &
% 7.19/6.73                                      bnd_c3_2 X118 bnd_a399) |
% 7.19/6.73                                     bnd_c3_1 X118) |
% 7.19/6.73                                 (ALL X119.
% 7.19/6.73                                     bnd_ndr1_0 -->
% 7.19/6.73                                     (~ bnd_c3_1 X119 |
% 7.19/6.73                                      (ALL X120.
% 7.19/6.73    bnd_ndr1_1 X119 -->
% 7.19/6.73    (bnd_c5_2 X119 X120 | ~ bnd_c7_2 X119 X120) | bnd_c2_2 X119 X120)) |
% 7.19/6.73                                     ((bnd_ndr1_1 X119 &
% 7.19/6.73                                       ~ bnd_c8_2 X119 bnd_a400) &
% 7.19/6.73                                      bnd_c2_2 X119 bnd_a400) &
% 7.19/6.73                                     ~ bnd_c7_2 X119 bnd_a400)) |
% 7.19/6.73                                ~ bnd_c7_0)) &
% 7.19/6.73                              (((ALL X121.
% 7.19/6.73                                    bnd_ndr1_0 -->
% 7.19/6.73                                    (~ bnd_c4_1 X121 |
% 7.19/6.73                                     (ALL X122.
% 7.19/6.73   bnd_ndr1_1 X121 -->
% 7.19/6.73   (~ bnd_c6_2 X121 X122 | bnd_c1_2 X121 X122) | ~ bnd_c9_2 X121 X122)) |
% 7.19/6.73                                    (ALL X123.
% 7.19/6.73  bnd_ndr1_1 X121 --> bnd_c6_2 X121 X123 | ~ bnd_c10_2 X121 X123)) |
% 7.19/6.73                                bnd_c4_0) |
% 7.19/6.73                               (bnd_ndr1_0 & ~ bnd_c6_1 bnd_a401) &
% 7.19/6.73                               bnd_c1_1 bnd_a401)) &
% 7.19/6.73                             (((ALL X124.
% 7.19/6.73                                   bnd_ndr1_0 -->
% 7.19/6.73                                   (((bnd_ndr1_1 X124 &
% 7.19/6.73                                      ~ bnd_c9_2 X124 bnd_a402) &
% 7.19/6.73                                     bnd_c7_2 X124 bnd_a402) &
% 7.19/6.73                                    ~ bnd_c2_2 X124 bnd_a402 |
% 7.19/6.73                                    ~ bnd_c10_1 X124) |
% 7.19/6.73                                   ~ bnd_c2_1 X124) |
% 7.19/6.73                               (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a403) &
% 7.19/6.73                                   bnd_c5_2 bnd_a403 bnd_a404) &
% 7.19/6.73                                  bnd_c3_2 bnd_a403 bnd_a404) &
% 7.19/6.73                                 ~ bnd_c7_2 bnd_a403 bnd_a404) &
% 7.19/6.73                                (ALL X125.
% 7.19/6.73                                    bnd_ndr1_1 bnd_a403 -->
% 7.19/6.73                                    (~ bnd_c10_2 bnd_a403 X125 |
% 7.19/6.73                                     ~ bnd_c6_2 bnd_a403 X125) |
% 7.19/6.73                                    ~ bnd_c4_2 bnd_a403 X125)) &
% 7.19/6.73                               ~ bnd_c3_1 bnd_a403) |
% 7.19/6.73                              (bnd_ndr1_0 & bnd_c8_1 bnd_a405) &
% 7.19/6.73                              (ALL X126.
% 7.19/6.73                                  bnd_ndr1_1 bnd_a405 -->
% 7.19/6.73                                  bnd_c1_2 bnd_a405 X126 |
% 7.19/6.73                                  ~ bnd_c10_2 bnd_a405 X126))) &
% 7.19/6.73                            (((bnd_ndr1_0 &
% 7.19/6.73                               (ALL X127.
% 7.19/6.73                                   bnd_ndr1_1 bnd_a406 -->
% 7.19/6.73                                   (~ bnd_c2_2 bnd_a406 X127 |
% 7.19/6.73                                    bnd_c1_2 bnd_a406 X127) |
% 7.19/6.73                                   bnd_c9_2 bnd_a406 X127)) &
% 7.19/6.73                              ~ bnd_c3_1 bnd_a406 |
% 7.19/6.73                              (ALL X128.
% 7.19/6.73                                  bnd_ndr1_0 -->
% 7.19/6.73                                  (~ bnd_c2_1 X128 |
% 7.19/6.73                                   ((bnd_ndr1_1 X128 &
% 7.19/6.73                                     bnd_c10_2 X128 bnd_a407) &
% 7.19/6.73                                    bnd_c5_2 X128 bnd_a407) &
% 7.19/6.73                                   ~ bnd_c2_2 X128 bnd_a407) |
% 7.19/6.73                                  bnd_c9_1 X128)) |
% 7.19/6.73                             ((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a408) &
% 7.19/6.73                                    bnd_c10_2 bnd_a408 bnd_a409) &
% 7.19/6.73                                   bnd_c2_2 bnd_a408 bnd_a409) &
% 7.19/6.73                                  ~ bnd_c5_2 bnd_a408 bnd_a409) &
% 7.19/6.73                                 (ALL X129.
% 7.19/6.73                                     bnd_ndr1_1 bnd_a408 -->
% 7.19/6.73                                     (~ bnd_c7_2 bnd_a408 X129 |
% 7.19/6.73                                      bnd_c8_2 bnd_a408 X129) |
% 7.19/6.73                                     bnd_c3_2 bnd_a408 X129)) &
% 7.19/6.73                                bnd_ndr1_1 bnd_a408) &
% 7.19/6.73                               bnd_c2_2 bnd_a408 bnd_a410) &
% 7.19/6.73                              bnd_c10_2 bnd_a408 bnd_a410) &
% 7.19/6.73                             ~ bnd_c4_2 bnd_a408 bnd_a410)) &
% 7.19/6.73                           (((ALL X130.
% 7.19/6.73                                 bnd_ndr1_0 -->
% 7.19/6.73                                 ((ALL X131.
% 7.19/6.73                                      bnd_ndr1_1 X130 -->
% 7.19/6.73                                      (~ bnd_c5_2 X130 X131 |
% 7.19/6.73                                       bnd_c2_2 X130 X131) |
% 7.19/6.73                                      bnd_c9_2 X130 X131) |
% 7.19/6.73                                  (ALL X132.
% 7.19/6.73                                      bnd_ndr1_1 X130 -->
% 7.19/6.73                                      (bnd_c10_2 X130 X132 |
% 7.19/6.73                                       bnd_c2_2 X130 X132) |
% 7.19/6.73                                      ~ bnd_c7_2 X130 X132)) |
% 7.19/6.73                                 ~ bnd_c8_1 X130) |
% 7.19/6.73                             ~ bnd_c6_0) |
% 7.19/6.73                            ~ bnd_c8_0)) &
% 7.19/6.73                          (((ALL X133.
% 7.19/6.73                                bnd_ndr1_0 -->
% 7.19/6.73                                (~ bnd_c1_1 X133 |
% 7.19/6.73                                 (ALL X134.
% 7.19/6.73                                     bnd_ndr1_1 X133 -->
% 7.19/6.73                                     (~ bnd_c10_2 X133 X134 |
% 7.19/6.73                                      bnd_c6_2 X133 X134) |
% 7.19/6.73                                     bnd_c4_2 X133 X134)) |
% 7.19/6.73                                ((bnd_ndr1_1 X133 &
% 7.19/6.73                                  ~ bnd_c7_2 X133 bnd_a411) &
% 7.19/6.73                                 bnd_c3_2 X133 bnd_a411) &
% 7.19/6.73                                ~ bnd_c2_2 X133 bnd_a411) |
% 7.19/6.73                            (ALL X135.
% 7.19/6.73                                bnd_ndr1_0 -->
% 7.19/6.73                                (((bnd_ndr1_1 X135 & bnd_c3_2 X135 bnd_a412) &
% 7.19/6.73                                  bnd_c5_2 X135 bnd_a412) &
% 7.19/6.73                                 ~ bnd_c4_2 X135 bnd_a412 |
% 7.19/6.73                                 ((bnd_ndr1_1 X135 &
% 7.19/6.73                                   ~ bnd_c4_2 X135 bnd_a413) &
% 7.19/6.73                                  ~ bnd_c1_2 X135 bnd_a413) &
% 7.19/6.73                                 bnd_c3_2 X135 bnd_a413) |
% 7.19/6.73                                ~ bnd_c5_1 X135)) |
% 7.19/6.73                           ~ bnd_c10_0)) &
% 7.19/6.73                         (((ALL X136.
% 7.19/6.73                               bnd_ndr1_0 -->
% 7.19/6.73                               (~ bnd_c10_1 X136 | ~ bnd_c2_1 X136) |
% 7.19/6.73                               (ALL X137.
% 7.19/6.73                                   bnd_ndr1_1 X136 -->
% 7.19/6.73                                   (bnd_c10_2 X136 X137 |
% 7.19/6.73                                    bnd_c6_2 X136 X137) |
% 7.19/6.73                                   ~ bnd_c2_2 X136 X137)) |
% 7.19/6.73                           ~ bnd_c8_0) |
% 7.19/6.73                          bnd_c7_0)) &
% 7.19/6.73                        (((((((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a414) &
% 7.19/6.73                              bnd_ndr1_1 bnd_a414) &
% 7.19/6.73                             bnd_c6_2 bnd_a414 bnd_a415) &
% 7.19/6.73                            ~ bnd_c8_2 bnd_a414 bnd_a415) &
% 7.19/6.73                           bnd_c2_2 bnd_a414 bnd_a415) &
% 7.19/6.73                          (ALL X138.
% 7.19/6.73                              bnd_ndr1_1 bnd_a414 -->
% 7.19/6.73                              (bnd_c7_2 bnd_a414 X138 |
% 7.19/6.73                               ~ bnd_c3_2 bnd_a414 X138) |
% 7.19/6.73                              bnd_c1_2 bnd_a414 X138) |
% 7.19/6.73                          ~ bnd_c3_0) |
% 7.19/6.73                         (((((((bnd_ndr1_0 &
% 7.19/6.73                                (ALL X139.
% 7.19/6.73                                    bnd_ndr1_1 bnd_a416 -->
% 7.19/6.73                                    (bnd_c4_2 bnd_a416 X139 |
% 7.19/6.73                                     ~ bnd_c1_2 bnd_a416 X139) |
% 7.19/6.73                                    ~ bnd_c5_2 bnd_a416 X139)) &
% 7.19/6.73                               bnd_ndr1_1 bnd_a416) &
% 7.19/6.73                              ~ bnd_c4_2 bnd_a416 bnd_a417) &
% 7.19/6.73                             bnd_c7_2 bnd_a416 bnd_a417) &
% 7.19/6.73                            bnd_c5_2 bnd_a416 bnd_a417) &
% 7.19/6.73                           bnd_ndr1_1 bnd_a416) &
% 7.19/6.73                          bnd_c8_2 bnd_a416 bnd_a418) &
% 7.19/6.73                         bnd_c6_2 bnd_a416 bnd_a418)) &
% 7.19/6.73                       ((~ bnd_c8_0 |
% 7.19/6.73                         (ALL X140.
% 7.19/6.73                             bnd_ndr1_0 -->
% 7.19/6.73                             ((ALL X141.
% 7.19/6.73                                  bnd_ndr1_1 X140 -->
% 7.19/6.73                                  (~ bnd_c5_2 X140 X141 |
% 7.19/6.73                                   bnd_c1_2 X140 X141) |
% 7.19/6.73                                  bnd_c6_2 X140 X141) |
% 7.19/6.73                              (bnd_ndr1_1 X140 & ~ bnd_c5_2 X140 bnd_a419) &
% 7.19/6.73                              ~ bnd_c1_2 X140 bnd_a419) |
% 7.19/6.73                             ~ bnd_c9_1 X140)) |
% 7.19/6.73                        ~ bnd_c4_0)) &
% 7.19/6.73                      ((~ bnd_c10_0 |
% 7.19/6.73                        (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a420) &
% 7.19/6.73                            bnd_c7_2 bnd_a420 bnd_a421) &
% 7.19/6.73                           ~ bnd_c3_2 bnd_a420 bnd_a421) &
% 7.19/6.73                          bnd_c10_2 bnd_a420 bnd_a421) &
% 7.19/6.73                         ~ bnd_c8_1 bnd_a420) &
% 7.19/6.73                        bnd_c7_1 bnd_a420) |
% 7.19/6.73                       ~ bnd_c9_0)) &
% 7.19/6.73                     (((((((bnd_ndr1_0 &
% 7.19/6.73                            (ALL X142.
% 7.19/6.73                                bnd_ndr1_1 bnd_a422 -->
% 7.19/6.73                                (~ bnd_c9_2 bnd_a422 X142 |
% 7.19/6.73                                 bnd_c5_2 bnd_a422 X142) |
% 7.19/6.73                                ~ bnd_c7_2 bnd_a422 X142)) &
% 7.19/6.73                           bnd_c1_1 bnd_a422) &
% 7.19/6.73                          bnd_ndr1_1 bnd_a422) &
% 7.19/6.73                         ~ bnd_c10_2 bnd_a422 bnd_a423) &
% 7.19/6.73                        ~ bnd_c6_2 bnd_a422 bnd_a423) &
% 7.19/6.73                       ~ bnd_c8_2 bnd_a422 bnd_a423 |
% 7.19/6.73                       (((bnd_ndr1_0 & ~ bnd_c5_1 bnd_a424) &
% 7.19/6.73                         bnd_ndr1_1 bnd_a424) &
% 7.19/6.73                        ~ bnd_c5_2 bnd_a424 bnd_a425) &
% 7.19/6.73                       bnd_c7_2 bnd_a424 bnd_a425) |
% 7.19/6.73                      ~ bnd_c3_0)) &
% 7.19/6.73                    ((~ bnd_c2_0 |
% 7.19/6.73                      (ALL X143.
% 7.19/6.73                          bnd_ndr1_0 -->
% 7.19/6.73                          ~ bnd_c3_1 X143 |
% 7.19/6.73                          ((bnd_ndr1_1 X143 & ~ bnd_c3_2 X143 bnd_a426) &
% 7.19/6.73                           bnd_c9_2 X143 bnd_a426) &
% 7.19/6.73                          bnd_c4_2 X143 bnd_a426)) |
% 7.19/6.73                     ~ bnd_c8_0)) &
% 7.19/6.73                   ((((bnd_ndr1_0 & ~ bnd_c7_1 bnd_a427) &
% 7.19/6.73                      (ALL X144.
% 7.19/6.73                          bnd_ndr1_1 bnd_a427 -->
% 7.19/6.73                          (bnd_c10_2 bnd_a427 X144 |
% 7.19/6.73                           ~ bnd_c6_2 bnd_a427 X144) |
% 7.19/6.73                          ~ bnd_c8_2 bnd_a427 X144)) &
% 7.19/6.73                     (ALL X145.
% 7.19/6.73                         bnd_ndr1_1 bnd_a427 -->
% 7.19/6.73                         (bnd_c3_2 bnd_a427 X145 | ~ bnd_c1_2 bnd_a427 X145) |
% 7.19/6.73                         ~ bnd_c10_2 bnd_a427 X145) |
% 7.19/6.73                     (ALL X146.
% 7.19/6.73                         bnd_ndr1_0 -->
% 7.19/6.73                         ((ALL X147.
% 7.19/6.73                              bnd_ndr1_1 X146 -->
% 7.19/6.73                              (bnd_c7_2 X146 X147 | bnd_c1_2 X146 X147) |
% 7.19/6.73                              ~ bnd_c2_2 X146 X147) |
% 7.19/6.73                          bnd_c6_1 X146) |
% 7.19/6.73                         ((bnd_ndr1_1 X146 & ~ bnd_c10_2 X146 bnd_a428) &
% 7.19/6.73                          ~ bnd_c1_2 X146 bnd_a428) &
% 7.19/6.73                         ~ bnd_c8_2 X146 bnd_a428)) |
% 7.19/6.73                    (ALL X148.
% 7.19/6.73                        bnd_ndr1_0 -->
% 7.19/6.73                        (((bnd_ndr1_1 X148 & bnd_c7_2 X148 bnd_a429) &
% 7.19/6.73                          ~ bnd_c8_2 X148 bnd_a429) &
% 7.19/6.73                         ~ bnd_c5_2 X148 bnd_a429 |
% 7.19/6.73                         ~ bnd_c9_1 X148) |
% 7.19/6.73                        bnd_c1_1 X148))) &
% 7.19/6.73                  ((bnd_c7_0 | bnd_c3_0) | ~ bnd_c8_0)) &
% 7.19/6.73                 (((ALL X149. bnd_ndr1_0 --> ~ bnd_c10_1 X149) |
% 7.19/6.73                   (ALL X150.
% 7.19/6.73                       bnd_ndr1_0 -->
% 7.19/6.73                       (((bnd_ndr1_1 X150 & bnd_c6_2 X150 bnd_a430) &
% 7.19/6.73                         bnd_c2_2 X150 bnd_a430) &
% 7.19/6.73                        ~ bnd_c10_2 X150 bnd_a430 |
% 7.19/6.73                        bnd_c5_1 X150) |
% 7.19/6.73                       ~ bnd_c4_1 X150)) |
% 7.19/6.73                  ((bnd_ndr1_0 & bnd_c2_1 bnd_a431) & ~ bnd_c4_1 bnd_a431) &
% 7.19/6.73                  bnd_c6_1 bnd_a431)) &
% 7.19/6.73                ((bnd_c9_0 | ~ bnd_c10_0) |
% 7.19/6.73                 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a432) &
% 7.19/6.73                     ~ bnd_c2_2 bnd_a432 bnd_a433) &
% 7.19/6.73                    ~ bnd_c8_2 bnd_a432 bnd_a433) &
% 7.19/6.73                   ~ bnd_c9_2 bnd_a432 bnd_a433) &
% 7.19/6.73                  ~ bnd_c5_1 bnd_a432) &
% 7.19/6.73                 bnd_c3_1 bnd_a432)) &
% 7.19/6.73               (((ALL X151.
% 7.19/6.73                     bnd_ndr1_0 -->
% 7.19/6.73                     (bnd_c4_1 X151 |
% 7.19/6.73                      (ALL X152.
% 7.19/6.73                          bnd_ndr1_1 X151 -->
% 7.19/6.73                          (bnd_c7_2 X151 X152 | ~ bnd_c8_2 X151 X152) |
% 7.19/6.73                          ~ bnd_c2_2 X151 X152)) |
% 7.19/6.73                     (ALL X153.
% 7.19/6.73                         bnd_ndr1_1 X151 -->
% 7.19/6.73                         (~ bnd_c5_2 X151 X153 | ~ bnd_c6_2 X151 X153) |
% 7.19/6.73                         ~ bnd_c9_2 X151 X153)) |
% 7.19/6.73                 (ALL X154.
% 7.19/6.73                     bnd_ndr1_0 -->
% 7.19/6.73                     (~ bnd_c10_1 X154 |
% 7.19/6.73                      (ALL X155.
% 7.19/6.73                          bnd_ndr1_1 X154 -->
% 7.19/6.73                          (~ bnd_c2_2 X154 X155 | ~ bnd_c7_2 X154 X155) |
% 7.19/6.73                          bnd_c10_2 X154 X155)) |
% 7.19/6.73                     ~ bnd_c1_1 X154)) |
% 7.19/6.73                bnd_c3_0)) &
% 7.19/6.73              (((((((bnd_ndr1_0 & bnd_c7_1 bnd_a434) & bnd_ndr1_1 bnd_a434) &
% 7.19/6.73                   bnd_c9_2 bnd_a434 bnd_a435) &
% 7.19/6.73                  bnd_c4_2 bnd_a434 bnd_a435) &
% 7.19/6.73                 ~ bnd_c1_2 bnd_a434 bnd_a435) &
% 7.19/6.73                ~ bnd_c6_1 bnd_a434 |
% 7.19/6.73                (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a436) &
% 7.19/6.73                    bnd_c8_2 bnd_a436 bnd_a437) &
% 7.19/6.73                   bnd_c3_2 bnd_a436 bnd_a437) &
% 7.19/6.73                  bnd_c4_2 bnd_a436 bnd_a437) &
% 7.19/6.73                 (ALL X156.
% 7.19/6.73                     bnd_ndr1_1 bnd_a436 -->
% 7.19/6.73                     (bnd_c1_2 bnd_a436 X156 | ~ bnd_c9_2 bnd_a436 X156) |
% 7.19/6.73                     ~ bnd_c3_2 bnd_a436 X156)) &
% 7.19/6.73                ~ bnd_c2_1 bnd_a436) |
% 7.19/6.73               bnd_c8_0)) &
% 7.19/6.73             ((bnd_c5_0 |
% 7.19/6.73               ((bnd_ndr1_0 &
% 7.19/6.73                 (ALL X157.
% 7.19/6.73                     bnd_ndr1_1 bnd_a438 -->
% 7.19/6.73                     (~ bnd_c10_2 bnd_a438 X157 | bnd_c3_2 bnd_a438 X157) |
% 7.19/6.73                     bnd_c9_2 bnd_a438 X157)) &
% 7.19/6.73                (ALL X158.
% 7.19/6.73                    bnd_ndr1_1 bnd_a438 -->
% 7.19/6.73                    (bnd_c7_2 bnd_a438 X158 | ~ bnd_c6_2 bnd_a438 X158) |
% 7.19/6.73                    bnd_c1_2 bnd_a438 X158)) &
% 7.19/6.73               (ALL X159.
% 7.19/6.73                   bnd_ndr1_1 bnd_a438 -->
% 7.19/6.73                   (bnd_c6_2 bnd_a438 X159 | ~ bnd_c2_2 bnd_a438 X159) |
% 7.19/6.73                   bnd_c10_2 bnd_a438 X159)) |
% 7.19/6.73              ~ bnd_c2_0)) &
% 7.19/6.73            (((ALL X160.
% 7.19/6.73                  bnd_ndr1_0 -->
% 7.19/6.73                  ((ALL X161.
% 7.19/6.73                       bnd_ndr1_1 X160 -->
% 7.19/6.73                       (~ bnd_c1_2 X160 X161 | bnd_c4_2 X160 X161) |
% 7.19/6.73                       ~ bnd_c10_2 X160 X161) |
% 7.19/6.73                   bnd_c1_1 X160) |
% 7.19/6.73                  ~ bnd_c4_1 X160) |
% 7.19/6.73              (ALL X162.
% 7.19/6.73                  bnd_ndr1_0 -->
% 7.19/6.73                  (~ bnd_c9_1 X162 | bnd_c1_1 X162) |
% 7.19/6.73                  (bnd_ndr1_1 X162 & ~ bnd_c5_2 X162 bnd_a439) &
% 7.19/6.73                  bnd_c7_2 X162 bnd_a439)) |
% 7.19/6.73             bnd_c6_0)) &
% 7.19/6.73           (~ bnd_c7_0 |
% 7.19/6.73            (ALL X163.
% 7.19/6.73                bnd_ndr1_0 -->
% 7.19/6.73                (bnd_c10_1 X163 | ~ bnd_c9_1 X163) |
% 7.19/6.73                ((bnd_ndr1_1 X163 & ~ bnd_c5_2 X163 bnd_a440) &
% 7.19/6.73                 bnd_c1_2 X163 bnd_a440) &
% 7.19/6.73                bnd_c6_2 X163 bnd_a440))) &
% 7.19/6.73          (((bnd_ndr1_0 &
% 7.19/6.73             (ALL X164.
% 7.19/6.73                 bnd_ndr1_1 bnd_a441 -->
% 7.19/6.73                 (bnd_c7_2 bnd_a441 X164 | ~ bnd_c5_2 bnd_a441 X164) |
% 7.19/6.73                 ~ bnd_c8_2 bnd_a441 X164)) &
% 7.19/6.73            (ALL X165.
% 7.19/6.73                bnd_ndr1_1 bnd_a441 -->
% 7.19/6.73                (bnd_c5_2 bnd_a441 X165 | bnd_c2_2 bnd_a441 X165) |
% 7.19/6.73                ~ bnd_c4_2 bnd_a441 X165) |
% 7.19/6.73            ((bnd_ndr1_0 & bnd_c8_1 bnd_a442) &
% 7.19/6.73             (ALL X166.
% 7.19/6.73                 bnd_ndr1_1 bnd_a442 -->
% 7.19/6.73                 (bnd_c5_2 bnd_a442 X166 | ~ bnd_c3_2 bnd_a442 X166) |
% 7.19/6.73                 ~ bnd_c10_2 bnd_a442 X166)) &
% 7.19/6.73            (ALL X167.
% 7.19/6.73                bnd_ndr1_1 bnd_a442 -->
% 7.19/6.73                (bnd_c2_2 bnd_a442 X167 | ~ bnd_c1_2 bnd_a442 X167) |
% 7.19/6.73                bnd_c7_2 bnd_a442 X167)) |
% 7.19/6.73           ((bnd_ndr1_0 &
% 7.19/6.73             (ALL X168.
% 7.19/6.73                 bnd_ndr1_1 bnd_a443 -->
% 7.19/6.73                 (bnd_c3_2 bnd_a443 X168 | bnd_c10_2 bnd_a443 X168) |
% 7.19/6.73                 ~ bnd_c5_2 bnd_a443 X168)) &
% 7.19/6.73            (ALL X169.
% 7.19/6.73                bnd_ndr1_1 bnd_a443 -->
% 7.19/6.73                (bnd_c8_2 bnd_a443 X169 | bnd_c6_2 bnd_a443 X169) |
% 7.19/6.73                ~ bnd_c5_2 bnd_a443 X169)) &
% 7.19/6.73           (ALL X170.
% 7.19/6.73               bnd_ndr1_1 bnd_a443 -->
% 7.19/6.73               ~ bnd_c3_2 bnd_a443 X170 | ~ bnd_c9_2 bnd_a443 X170))) &
% 7.19/6.73         ((bnd_c8_0 |
% 7.19/6.73           (ALL X171.
% 7.19/6.73               bnd_ndr1_0 -->
% 7.19/6.73               (~ bnd_c1_1 X171 | bnd_c8_1 X171) | ~ bnd_c7_1 X171)) |
% 7.19/6.73          ((bnd_ndr1_0 &
% 7.19/6.73            (ALL X172.
% 7.19/6.73                bnd_ndr1_1 bnd_a444 -->
% 7.19/6.73                (bnd_c10_2 bnd_a444 X172 | bnd_c4_2 bnd_a444 X172) |
% 7.19/6.73                bnd_c2_2 bnd_a444 X172)) &
% 7.19/6.73           bnd_c8_1 bnd_a444) &
% 7.19/6.73          (ALL X173.
% 7.19/6.73              bnd_ndr1_1 bnd_a444 -->
% 7.19/6.73              (~ bnd_c5_2 bnd_a444 X173 | ~ bnd_c10_2 bnd_a444 X173) |
% 7.19/6.73              bnd_c9_2 bnd_a444 X173))) &
% 7.19/6.73        ((~ bnd_c7_0 | (bnd_ndr1_0 & bnd_c1_1 bnd_a445) & bnd_c6_1 bnd_a445) |
% 7.19/6.73         bnd_c3_0)) &
% 7.19/6.73       ((bnd_c4_0 |
% 7.19/6.73         (ALL X174.
% 7.19/6.73             bnd_ndr1_0 -->
% 7.19/6.73             (((bnd_ndr1_1 X174 & ~ bnd_c8_2 X174 bnd_a446) &
% 7.19/6.73               bnd_c10_2 X174 bnd_a446) &
% 7.19/6.73              bnd_c1_2 X174 bnd_a446 |
% 7.19/6.73              ((bnd_ndr1_1 X174 & ~ bnd_c10_2 X174 bnd_a447) &
% 7.19/6.73               bnd_c7_2 X174 bnd_a447) &
% 7.19/6.73              bnd_c3_2 X174 bnd_a447) |
% 7.19/6.73             (ALL X175.
% 7.19/6.73                 bnd_ndr1_1 X174 -->
% 7.19/6.73                 (bnd_c10_2 X174 X175 | ~ bnd_c3_2 X174 X175) |
% 7.19/6.73                 ~ bnd_c4_2 X174 X175))) |
% 7.19/6.73        ~ bnd_c5_0)) &
% 7.19/6.73      ((~ bnd_c5_0 | bnd_c6_0) | bnd_c4_0)) &
% 7.19/6.73     ((((bnd_ndr1_0 & bnd_c10_1 bnd_a448) & ~ bnd_c2_1 bnd_a448) &
% 7.19/6.73       (ALL X176.
% 7.19/6.73           bnd_ndr1_1 bnd_a448 -->
% 7.19/6.73           (~ bnd_c4_2 bnd_a448 X176 | bnd_c7_2 bnd_a448 X176) |
% 7.19/6.73           bnd_c6_2 bnd_a448 X176) |
% 7.19/6.73       bnd_c8_0) |
% 7.19/6.73      bnd_c2_0))
% 17.51/17.09  Unfolded term: ~ (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((~ bnd_c1_0 |
% 17.51/17.09                           (ALL U.
% 17.51/17.09                               bnd_ndr1_0 -->
% 17.51/17.09                               (~ bnd_c9_1 U | ~ bnd_c10_1 U) | bnd_c7_1 U)) |
% 17.51/17.09                          bnd_c3_0) &
% 17.51/17.09                         (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a269) &
% 17.51/17.09                               bnd_c9_2 bnd_a269 bnd_a270) &
% 17.51/17.09                              ~ bnd_c3_2 bnd_a269 bnd_a270) &
% 17.51/17.09                             ~ bnd_c7_2 bnd_a269 bnd_a270) &
% 17.51/17.09                            bnd_c2_1 bnd_a269) &
% 17.51/17.09                           bnd_c4_1 bnd_a269 |
% 17.51/17.09                           bnd_c9_0) |
% 17.51/17.09                          (ALL V.
% 17.51/17.09                              bnd_ndr1_0 -->
% 17.51/17.09                              ((ALL W.
% 17.51/17.09                                   bnd_ndr1_1 V -->
% 17.51/17.09                                   (~ bnd_c10_2 V W | bnd_c3_2 V W) |
% 17.51/17.09                                   ~ bnd_c7_2 V W) |
% 17.51/17.09                               (ALL X.
% 17.51/17.09                                   bnd_ndr1_1 V -->
% 17.51/17.09                                   (~ bnd_c7_2 V X | ~ bnd_c2_2 V X) |
% 17.51/17.09                                   ~ bnd_c1_2 V X)) |
% 17.51/17.09                              bnd_c6_1 V))) &
% 17.51/17.09                        ((~ bnd_c4_0 | ~ bnd_c6_0) |
% 17.51/17.09                         (bnd_ndr1_0 & bnd_c4_1 bnd_a271) &
% 17.51/17.09                         bnd_c3_1 bnd_a271)) &
% 17.51/17.09                       ((((((bnd_ndr1_0 &
% 17.51/17.09                             (ALL Y.
% 17.51/17.09                                 bnd_ndr1_1 bnd_a272 -->
% 17.51/17.09                                 bnd_c1_2 bnd_a272 Y |
% 17.51/17.09                                 ~ bnd_c6_2 bnd_a272 Y)) &
% 17.51/17.09                            bnd_ndr1_1 bnd_a272) &
% 17.51/17.09                           ~ bnd_c2_2 bnd_a272 bnd_a273) &
% 17.51/17.09                          ~ bnd_c4_2 bnd_a272 bnd_a273) &
% 17.51/17.09                         bnd_c1_2 bnd_a272 bnd_a273) &
% 17.51/17.09                        bnd_c5_1 bnd_a272 |
% 17.51/17.09                        bnd_c4_0)) &
% 17.51/17.09                      ((~ bnd_c1_0 |
% 17.51/17.09                        (ALL Z.
% 17.51/17.09                            bnd_ndr1_0 -->
% 17.51/17.09                            (bnd_c1_1 Z |
% 17.51/17.09                             ((bnd_ndr1_1 Z & ~ bnd_c8_2 Z bnd_a274) &
% 17.51/17.09                              ~ bnd_c3_2 Z bnd_a274) &
% 17.51/17.09                             ~ bnd_c5_2 Z bnd_a274) |
% 17.51/17.09                            ((bnd_ndr1_1 Z & ~ bnd_c2_2 Z bnd_a275) &
% 17.51/17.09                             ~ bnd_c10_2 Z bnd_a275) &
% 17.51/17.09                            ~ bnd_c6_2 Z bnd_a275)) |
% 17.51/17.09                       bnd_c7_0)) &
% 17.51/17.09                     ((~ bnd_c5_0 |
% 17.51/17.09                       (ALL X1.
% 17.51/17.09                           bnd_ndr1_0 -->
% 17.51/17.09                           (((bnd_ndr1_1 X1 & bnd_c2_2 X1 bnd_a276) &
% 17.51/17.09                             bnd_c8_2 X1 bnd_a276) &
% 17.51/17.09                            ~ bnd_c4_2 X1 bnd_a276 |
% 17.51/17.09                            (ALL X2.
% 17.51/17.09                                bnd_ndr1_1 X1 -->
% 17.51/17.09                                bnd_c3_2 X1 X2 | bnd_c5_2 X1 X2)) |
% 17.51/17.09                           bnd_c6_1 X1)) |
% 17.51/17.09                      ~ bnd_c4_0)) &
% 17.51/17.09                    (~ bnd_c6_0 | ~ bnd_c1_0)) &
% 17.51/17.09                   (((bnd_ndr1_0 & ~ bnd_c5_1 bnd_a277) &
% 17.51/17.09                     (ALL X3.
% 17.51/17.09                         bnd_ndr1_1 bnd_a277 -->
% 17.51/17.09                         (bnd_c10_2 bnd_a277 X3 | ~ bnd_c3_2 bnd_a277 X3) |
% 17.51/17.09                         ~ bnd_c4_2 bnd_a277 X3)) &
% 17.51/17.09                    (ALL X4.
% 17.51/17.09                        bnd_ndr1_1 bnd_a277 -->
% 17.51/17.09                        (bnd_c4_2 bnd_a277 X4 | ~ bnd_c6_2 bnd_a277 X4) |
% 17.51/17.09                        bnd_c7_2 bnd_a277 X4) |
% 17.51/17.09                    ~ bnd_c8_0)) &
% 17.51/17.09                  ((bnd_c6_0 | ~ bnd_c7_0) |
% 17.51/17.09                   (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a278) &
% 17.51/17.09                       bnd_c4_2 bnd_a278 bnd_a279) &
% 17.51/17.09                      bnd_c3_2 bnd_a278 bnd_a279) &
% 17.51/17.09                     bnd_c8_2 bnd_a278 bnd_a279) &
% 17.51/17.09                    (ALL X5.
% 17.51/17.09                        bnd_ndr1_1 bnd_a278 -->
% 17.51/17.09                        (~ bnd_c7_2 bnd_a278 X5 | bnd_c4_2 bnd_a278 X5) |
% 17.51/17.09                        ~ bnd_c2_2 bnd_a278 X5)) &
% 17.51/17.09                   ~ bnd_c4_1 bnd_a278)) &
% 17.51/17.09                 (~ bnd_c10_0 |
% 17.51/17.09                  (ALL X6. bnd_ndr1_0 --> bnd_c7_1 X6 | bnd_c4_1 X6))) &
% 17.51/17.09                ((~ bnd_c3_0 | bnd_c8_0) |
% 17.51/17.09                 ((bnd_ndr1_0 &
% 17.51/17.09                   (ALL X7.
% 17.51/17.09                       bnd_ndr1_1 bnd_a280 -->
% 17.51/17.09                       (~ bnd_c10_2 bnd_a280 X7 | bnd_c9_2 bnd_a280 X7) |
% 17.51/17.09                       bnd_c6_2 bnd_a280 X7)) &
% 17.51/17.09                  (ALL X8.
% 17.51/17.09                      bnd_ndr1_1 bnd_a280 -->
% 17.51/17.09                      (bnd_c7_2 bnd_a280 X8 | bnd_c6_2 bnd_a280 X8) |
% 17.51/17.09                      bnd_c4_2 bnd_a280 X8)) &
% 17.51/17.09                 (ALL X9.
% 17.51/17.09                     bnd_ndr1_1 bnd_a280 -->
% 17.51/17.09                     (~ bnd_c2_2 bnd_a280 X9 | bnd_c1_2 bnd_a280 X9) |
% 17.51/17.09                     bnd_c3_2 bnd_a280 X9))) &
% 17.51/17.09               ((bnd_c4_0 |
% 17.51/17.09                 (bnd_ndr1_0 & ~ bnd_c10_1 bnd_a281) &
% 17.51/17.09                 (ALL X10.
% 17.51/17.09                     bnd_ndr1_1 bnd_a281 -->
% 17.51/17.09                     (~ bnd_c8_2 bnd_a281 X10 | ~ bnd_c2_2 bnd_a281 X10) |
% 17.51/17.09                     bnd_c1_2 bnd_a281 X10)) |
% 17.51/17.09                ((bnd_ndr1_0 &
% 17.51/17.09                  (ALL X11.
% 17.51/17.09                      bnd_ndr1_1 bnd_a282 -->
% 17.51/17.09                      bnd_c3_2 bnd_a282 X11 | ~ bnd_c7_2 bnd_a282 X11)) &
% 17.51/17.09                 bnd_c4_1 bnd_a282) &
% 17.51/17.09                ~ bnd_c6_1 bnd_a282)) &
% 17.51/17.09              ((((((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a283) & bnd_c4_1 bnd_a283) &
% 17.51/17.09                  bnd_ndr1_1 bnd_a283) &
% 17.51/17.09                 ~ bnd_c8_2 bnd_a283 bnd_a284) &
% 17.51/17.09                ~ bnd_c3_2 bnd_a283 bnd_a284 |
% 17.51/17.09                (ALL X12.
% 17.51/17.09                    bnd_ndr1_0 -->
% 17.51/17.09                    (~ bnd_c1_1 X12 | bnd_c7_1 X12) | ~ bnd_c4_1 X12)) |
% 17.51/17.09               (ALL X13.
% 17.51/17.09                   bnd_ndr1_0 -->
% 17.51/17.09                   (((bnd_ndr1_1 X13 & bnd_c7_2 X13 bnd_a285) &
% 17.51/17.09                     bnd_c6_2 X13 bnd_a285) &
% 17.51/17.09                    bnd_c1_2 X13 bnd_a285 |
% 17.51/17.09                    bnd_c9_1 X13) |
% 17.51/17.09                   ((bnd_ndr1_1 X13 & ~ bnd_c8_2 X13 bnd_a286) &
% 17.51/17.09                    ~ bnd_c7_2 X13 bnd_a286) &
% 17.51/17.09                   bnd_c6_2 X13 bnd_a286))) &
% 17.51/17.09             ((bnd_c2_0 |
% 17.51/17.09               (ALL X14. bnd_ndr1_0 --> bnd_c8_1 X14 | ~ bnd_c2_1 X14)) |
% 17.51/17.09              (((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a287) &
% 17.51/17.09                      ~ bnd_c6_2 bnd_a287 bnd_a288) &
% 17.51/17.09                     bnd_c4_2 bnd_a287 bnd_a288) &
% 17.51/17.09                    bnd_ndr1_1 bnd_a287) &
% 17.51/17.09                   ~ bnd_c6_2 bnd_a287 bnd_a289) &
% 17.51/17.09                  bnd_c8_2 bnd_a287 bnd_a289) &
% 17.51/17.09                 bnd_ndr1_1 bnd_a287) &
% 17.51/17.09                ~ bnd_c3_2 bnd_a287 bnd_a290) &
% 17.51/17.09               bnd_c5_2 bnd_a287 bnd_a290) &
% 17.51/17.09              ~ bnd_c9_2 bnd_a287 bnd_a290)) &
% 17.51/17.09            ((~ bnd_c7_0 |
% 17.51/17.09              (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a291) &
% 17.51/17.09                    bnd_c10_2 bnd_a291 bnd_a292) &
% 17.51/17.09                   bnd_c8_2 bnd_a291 bnd_a292) &
% 17.51/17.09                  ~ bnd_c5_2 bnd_a291 bnd_a292) &
% 17.51/17.09                 bnd_ndr1_1 bnd_a291) &
% 17.51/17.09                ~ bnd_c5_2 bnd_a291 bnd_a293) &
% 17.51/17.09               bnd_c3_2 bnd_a291 bnd_a293) &
% 17.51/17.09              ~ bnd_c1_2 bnd_a291 bnd_a293) |
% 17.51/17.09             bnd_c5_0)) &
% 17.51/17.09           (((ALL X15.
% 17.51/17.09                 bnd_ndr1_0 -->
% 17.51/17.09                 (bnd_c3_1 X15 | ~ bnd_c2_1 X15) | bnd_c8_1 X15) |
% 17.51/17.09             bnd_c6_0) |
% 17.51/17.09            (((((bnd_ndr1_0 &
% 17.51/17.09                 (ALL X16. bnd_ndr1_1 bnd_a294 --> bnd_c7_2 bnd_a294 X16)) &
% 17.51/17.09                bnd_ndr1_1 bnd_a294) &
% 17.51/17.09               bnd_c3_2 bnd_a294 bnd_a295) &
% 17.51/17.09              ~ bnd_c2_2 bnd_a294 bnd_a295) &
% 17.51/17.09             ~ bnd_c1_2 bnd_a294 bnd_a295) &
% 17.51/17.09            ~ bnd_c4_1 bnd_a294)) &
% 17.51/17.09          ((((bnd_ndr1_0 & bnd_c6_1 bnd_a296) & ~ bnd_c7_1 bnd_a296) &
% 17.51/17.09            bnd_c10_1 bnd_a296 |
% 17.51/17.09            (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a297) &
% 17.51/17.09                ~ bnd_c5_2 bnd_a297 bnd_a298) &
% 17.51/17.09               bnd_c8_2 bnd_a297 bnd_a298) &
% 17.51/17.09              ~ bnd_c4_2 bnd_a297 bnd_a298) &
% 17.51/17.09             ~ bnd_c7_1 bnd_a297) &
% 17.51/17.09            ~ bnd_c4_1 bnd_a297) |
% 17.51/17.09           (ALL X17.
% 17.51/17.09               bnd_ndr1_0 -->
% 17.51/17.09               (bnd_c9_1 X17 | bnd_c8_1 X17) |
% 17.51/17.09               ((bnd_ndr1_1 X17 & bnd_c9_2 X17 bnd_a299) &
% 17.51/17.09                bnd_c8_2 X17 bnd_a299) &
% 17.51/17.09               ~ bnd_c3_2 X17 bnd_a299))) &
% 17.51/17.09         (((ALL X18.
% 17.51/17.09               bnd_ndr1_0 -->
% 17.51/17.09               (~ bnd_c1_1 X18 |
% 17.51/17.09                (ALL X19.
% 17.51/17.09                    bnd_ndr1_1 X18 -->
% 17.51/17.09                    (bnd_c9_2 X18 X19 | ~ bnd_c8_2 X18 X19) |
% 17.51/17.09                    ~ bnd_c5_2 X18 X19)) |
% 17.51/17.09               ~ bnd_c4_1 X18) |
% 17.51/17.09           (((((bnd_ndr1_0 & ~ bnd_c8_1 bnd_a300) &
% 17.51/17.09               (ALL X20.
% 17.51/17.09                   bnd_ndr1_1 bnd_a300 -->
% 17.51/17.09                   (~ bnd_c2_2 bnd_a300 X20 | ~ bnd_c7_2 bnd_a300 X20) |
% 17.51/17.09                   bnd_c4_2 bnd_a300 X20)) &
% 17.51/17.09              bnd_ndr1_1 bnd_a300) &
% 17.51/17.09             ~ bnd_c5_2 bnd_a300 bnd_a301) &
% 17.51/17.09            bnd_c4_2 bnd_a300 bnd_a301) &
% 17.51/17.09           bnd_c6_2 bnd_a300 bnd_a301) |
% 17.51/17.09          ((((bnd_ndr1_0 & ~ bnd_c7_1 bnd_a302) & bnd_ndr1_1 bnd_a302) &
% 17.51/17.09            bnd_c6_2 bnd_a302 bnd_a303) &
% 17.51/17.09           ~ bnd_c5_2 bnd_a302 bnd_a303) &
% 17.51/17.09          bnd_c10_1 bnd_a302)) &
% 17.51/17.09        ((~ bnd_c10_0 | bnd_c9_0) | ~ bnd_c6_0)) &
% 17.51/17.09       (((ALL X21.
% 17.51/17.09             bnd_ndr1_0 -->
% 17.51/17.09             (~ bnd_c8_1 X21 | ~ bnd_c1_1 X21) |
% 17.51/17.09             (ALL X22.
% 17.51/17.09                 bnd_ndr1_1 X21 -->
% 17.51/17.09                 (~ bnd_c9_2 X21 X22 | bnd_c5_2 X21 X22) |
% 17.51/17.09                 bnd_c3_2 X21 X22)) |
% 17.51/17.09         (ALL X23.
% 17.51/17.09             bnd_ndr1_0 -->
% 17.51/17.09             (bnd_c10_1 X23 | ~ bnd_c5_1 X23) |
% 17.51/17.09             ((bnd_ndr1_1 X23 & bnd_c2_2 X23 bnd_a304) &
% 17.51/17.09              bnd_c6_2 X23 bnd_a304) &
% 17.51/17.09             ~ bnd_c4_2 X23 bnd_a304)) |
% 17.51/17.09        ~ bnd_c1_0)) &
% 17.51/17.09      ((~ bnd_c1_0 | ~ bnd_c9_0) |
% 17.51/17.09       (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a305) &
% 17.51/17.09           ~ bnd_c5_2 bnd_a305 bnd_a306) &
% 17.51/17.09          bnd_c3_2 bnd_a305 bnd_a306) &
% 17.51/17.09         bnd_c1_2 bnd_a305 bnd_a306) &
% 17.51/17.09        bnd_c3_1 bnd_a305) &
% 17.51/17.09       (ALL X24.
% 17.51/17.09           bnd_ndr1_1 bnd_a305 -->
% 17.51/17.09           (~ bnd_c8_2 bnd_a305 X24 | ~ bnd_c4_2 bnd_a305 X24) |
% 17.51/17.09           ~ bnd_c10_2 bnd_a305 X24))) &
% 17.51/17.09     (((ALL X25.
% 17.51/17.09           bnd_ndr1_0 -->
% 17.51/17.09           ((ALL X26.
% 17.51/17.09                bnd_ndr1_1 X25 -->
% 17.51/17.09                (~ bnd_c3_2 X25 X26 | ~ bnd_c10_2 X25 X26) |
% 17.51/17.09                ~ bnd_c2_2 X25 X26) |
% 17.51/17.09            ~ bnd_c10_1 X25) |
% 17.51/17.09           ~ bnd_c4_1 X25) |
% 17.51/17.09       bnd_c1_0) |
% 17.51/17.09      (ALL X27.
% 17.51/17.09          bnd_ndr1_0 -->
% 17.51/17.09          bnd_c4_1 X27 |
% 17.51/17.09          (ALL X28.
% 17.51/17.09              bnd_ndr1_1 X27 -->
% 17.51/17.09              (~ bnd_c3_2 X27 X28 | bnd_c7_2 X27 X28) | bnd_c6_2 X27 X28)))) &
% 17.51/17.09    (((ALL X29.
% 17.51/17.09          bnd_ndr1_0 -->
% 17.51/17.09          (~ bnd_c9_1 X29 | ~ bnd_c6_1 X29) |
% 17.51/17.09          (ALL X30.
% 17.51/17.09              bnd_ndr1_1 X29 -->
% 17.51/17.09              (bnd_c1_2 X29 X30 | bnd_c6_2 X29 X30) | ~ bnd_c4_2 X29 X30)) |
% 17.51/17.09      bnd_c1_0) |
% 17.51/17.09     (ALL X31. bnd_ndr1_0 --> ~ bnd_c4_1 X31 | ~ bnd_c8_1 X31))) &
% 17.51/17.09   (((bnd_ndr1_0 &
% 17.51/17.09      (ALL X32.
% 17.51/17.09          bnd_ndr1_1 bnd_a307 -->
% 17.51/17.09          (bnd_c6_2 bnd_a307 X32 | ~ bnd_c7_2 bnd_a307 X32) |
% 17.51/17.09          ~ bnd_c5_2 bnd_a307 X32)) &
% 17.51/17.09     ~ bnd_c9_1 bnd_a307) &
% 17.51/17.09    bnd_c8_1 bnd_a307 |
% 17.51/17.09    bnd_c5_0)) &
% 17.51/17.09  (((((((bnd_ndr1_0 & ~ bnd_c5_1 bnd_a308) & ~ bnd_c10_1 bnd_a308) &
% 17.51/17.09       bnd_ndr1_1 bnd_a308) &
% 17.51/17.09      ~ bnd_c7_2 bnd_a308 bnd_a309) &
% 17.51/17.09     bnd_c8_2 bnd_a308 bnd_a309) &
% 17.51/17.09    bnd_c1_2 bnd_a308 bnd_a309 |
% 17.51/17.09    (((((bnd_ndr1_0 & ~ bnd_c5_1 bnd_a310) & ~ bnd_c2_1 bnd_a310) &
% 17.51/17.09       bnd_ndr1_1 bnd_a310) &
% 17.51/17.09      ~ bnd_c2_2 bnd_a310 bnd_a311) &
% 17.51/17.09     bnd_c4_2 bnd_a310 bnd_a311) &
% 17.51/17.09    ~ bnd_c6_2 bnd_a310 bnd_a311) |
% 17.51/17.09   (ALL X33.
% 17.51/17.09       bnd_ndr1_0 -->
% 17.51/17.09       (bnd_c3_1 X33 |
% 17.51/17.09        ((bnd_ndr1_1 X33 & bnd_c5_2 X33 bnd_a312) & ~ bnd_c4_2 X33 bnd_a312) &
% 17.51/17.09        bnd_c2_2 X33 bnd_a312) |
% 17.51/17.09       bnd_c7_1 X33))) &
% 17.51/17.09                                       (((ALL X34.
% 17.51/17.09       bnd_ndr1_0 -->
% 17.51/17.09       ((ALL X35.
% 17.51/17.09            bnd_ndr1_1 X34 -->
% 17.51/17.09            (~ bnd_c7_2 X34 X35 | bnd_c9_2 X34 X35) | ~ bnd_c2_2 X34 X35) |
% 17.51/17.09        bnd_c3_1 X34) |
% 17.51/17.09       bnd_c9_1 X34) |
% 17.51/17.09   bnd_c1_0) |
% 17.51/17.09  ~ bnd_c9_0)) &
% 17.51/17.09                                      ((bnd_c7_0 |
% 17.51/17.09  ((((bnd_ndr1_0 &
% 17.51/17.09      (ALL X36.
% 17.51/17.09          bnd_ndr1_1 bnd_a313 -->
% 17.51/17.09          (~ bnd_c7_2 bnd_a313 X36 | ~ bnd_c4_2 bnd_a313 X36) |
% 17.51/17.09          ~ bnd_c3_2 bnd_a313 X36)) &
% 17.51/17.09     bnd_ndr1_1 bnd_a313) &
% 17.51/17.09    ~ bnd_c9_2 bnd_a313 bnd_a314) &
% 17.51/17.09   ~ bnd_c4_2 bnd_a313 bnd_a314) &
% 17.51/17.09  ~ bnd_c2_2 bnd_a313 bnd_a314) |
% 17.51/17.09                                       ((bnd_ndr1_0 & bnd_c5_1 bnd_a315) &
% 17.51/17.09  (ALL X37.
% 17.51/17.09      bnd_ndr1_1 bnd_a315 -->
% 17.51/17.09      (bnd_c1_2 bnd_a315 X37 | bnd_c10_2 bnd_a315 X37) |
% 17.51/17.09      bnd_c5_2 bnd_a315 X37)) &
% 17.51/17.09                                       (ALL X38.
% 17.51/17.09     bnd_ndr1_1 bnd_a315 -->
% 17.51/17.09     (bnd_c9_2 bnd_a315 X38 | bnd_c3_2 bnd_a315 X38) |
% 17.51/17.09     ~ bnd_c7_2 bnd_a315 X38))) &
% 17.51/17.09                                     ((~ bnd_c7_0 |
% 17.51/17.09                                       (ALL X39.
% 17.51/17.09     bnd_ndr1_0 -->
% 17.51/17.09     (((bnd_ndr1_1 X39 & ~ bnd_c3_2 X39 bnd_a316) & ~ bnd_c5_2 X39 bnd_a316) &
% 17.51/17.09      bnd_c8_2 X39 bnd_a316 |
% 17.51/17.09      (ALL X40.
% 17.51/17.09          bnd_ndr1_1 X39 -->
% 17.51/17.09          (~ bnd_c1_2 X39 X40 | bnd_c7_2 X39 X40) | bnd_c6_2 X39 X40)) |
% 17.51/17.09     ~ bnd_c3_1 X39)) |
% 17.51/17.09                                      bnd_c3_0)) &
% 17.51/17.09                                    (((ALL X41.
% 17.51/17.09    bnd_ndr1_0 -->
% 17.51/17.09    (bnd_c3_1 X41 |
% 17.51/17.09     (ALL X42. bnd_ndr1_1 X41 --> ~ bnd_c10_2 X41 X42 | bnd_c4_2 X41 X42)) |
% 17.51/17.09    (ALL X43.
% 17.51/17.09        bnd_ndr1_1 X41 -->
% 17.51/17.09        (bnd_c9_2 X41 X43 | bnd_c7_2 X41 X43) | bnd_c4_2 X41 X43)) |
% 17.51/17.09                                      ((bnd_ndr1_0 & bnd_c5_1 bnd_a317) &
% 17.51/17.09                                       bnd_c4_1 bnd_a317) &
% 17.51/17.09                                      (ALL X44.
% 17.51/17.09    bnd_ndr1_1 bnd_a317 -->
% 17.51/17.09    (~ bnd_c2_2 bnd_a317 X44 | bnd_c6_2 bnd_a317 X44) |
% 17.51/17.09    bnd_c10_2 bnd_a317 X44)) |
% 17.51/17.09                                     bnd_c8_0)) &
% 17.51/17.09                                   (((ALL X45.
% 17.51/17.09   bnd_ndr1_0 -->
% 17.51/17.09   ((bnd_ndr1_1 X45 & bnd_c10_2 X45 bnd_a318) & bnd_c7_2 X45 bnd_a318) &
% 17.51/17.09   bnd_c3_2 X45 bnd_a318 |
% 17.51/17.09   bnd_c5_1 X45) |
% 17.51/17.09                                     bnd_c9_0) |
% 17.51/17.09                                    ((bnd_ndr1_0 & ~ bnd_c9_1 bnd_a319) &
% 17.51/17.09                                     ~ bnd_c10_1 bnd_a319) &
% 17.51/17.09                                    (ALL X46.
% 17.51/17.09  bnd_ndr1_1 bnd_a319 -->
% 17.51/17.09  ~ bnd_c10_2 bnd_a319 X46 | bnd_c3_2 bnd_a319 X46))) &
% 17.51/17.09                                  (((ALL X47.
% 17.51/17.09  bnd_ndr1_0 -->
% 17.51/17.09  (~ bnd_c9_1 X47 |
% 17.51/17.09   (ALL X48.
% 17.51/17.09       bnd_ndr1_1 X47 -->
% 17.51/17.09       (~ bnd_c4_2 X47 X48 | ~ bnd_c8_2 X47 X48) | bnd_c5_2 X47 X48)) |
% 17.51/17.09  ~ bnd_c10_1 X47) |
% 17.51/17.09                                    ((((((bnd_ndr1_0 & bnd_c6_1 bnd_a320) &
% 17.51/17.09   bnd_ndr1_1 bnd_a320) &
% 17.51/17.09  ~ bnd_c6_2 bnd_a320 bnd_a321) &
% 17.51/17.09                                       bnd_c2_2 bnd_a320 bnd_a321) &
% 17.51/17.09                                      bnd_ndr1_1 bnd_a320) &
% 17.51/17.09                                     ~ bnd_c7_2 bnd_a320 bnd_a322) &
% 17.51/17.09                                    ~ bnd_c2_2 bnd_a320 bnd_a322) |
% 17.51/17.09                                   (ALL X49.
% 17.51/17.09                                       bnd_ndr1_0 -->
% 17.51/17.09                                       (ALL X50.
% 17.51/17.09     bnd_ndr1_1 X49 -->
% 17.51/17.09     (bnd_c1_2 X49 X50 | bnd_c8_2 X49 X50) | ~ bnd_c5_2 X49 X50) |
% 17.51/17.09                                       ~ bnd_c1_1 X49))) &
% 17.51/17.09                                 ((~ bnd_c5_0 |
% 17.51/17.09                                   (((((bnd_ndr1_0 & ~ bnd_c10_1 bnd_a323) &
% 17.51/17.09                                       bnd_ndr1_1 bnd_a323) &
% 17.51/17.09                                      ~ bnd_c9_2 bnd_a323 bnd_a324) &
% 17.51/17.09                                     bnd_c7_2 bnd_a323 bnd_a324) &
% 17.51/17.09                                    bnd_c4_2 bnd_a323 bnd_a324) &
% 17.51/17.09                                   ~ bnd_c3_1 bnd_a323) |
% 17.51/17.09                                  (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a325) &
% 17.51/17.09                                      bnd_c5_2 bnd_a325 bnd_a326) &
% 17.51/17.09                                     bnd_c7_2 bnd_a325 bnd_a326) &
% 17.51/17.09                                    ~ bnd_c4_2 bnd_a325 bnd_a326) &
% 17.51/17.09                                   (ALL X51.
% 17.51/17.09                                       bnd_ndr1_1 bnd_a325 -->
% 17.51/17.09                                       (~ bnd_c6_2 bnd_a325 X51 |
% 17.51/17.09  bnd_c4_2 bnd_a325 X51) |
% 17.51/17.09                                       ~ bnd_c2_2 bnd_a325 X51)) &
% 17.51/17.09                                  ~ bnd_c1_1 bnd_a325)) &
% 17.51/17.09                                (((ALL X52.
% 17.51/17.09                                      bnd_ndr1_0 -->
% 17.51/17.09                                      (bnd_c3_1 X52 | ~ bnd_c10_1 X52) |
% 17.51/17.09                                      ~ bnd_c2_1 X52) |
% 17.51/17.09                                  (ALL X53.
% 17.51/17.09                                      bnd_ndr1_0 -->
% 17.51/17.09                                      (bnd_c10_1 X53 | ~ bnd_c7_1 X53) |
% 17.51/17.09                                      ~ bnd_c9_1 X53)) |
% 17.51/17.09                                 ~ bnd_c4_0)) &
% 17.51/17.09                               ((((bnd_ndr1_0 & bnd_c2_1 bnd_a327) &
% 17.51/17.09                                  (ALL X54.
% 17.51/17.09                                      bnd_ndr1_1 bnd_a327 -->
% 17.51/17.09                                      (bnd_c7_2 bnd_a327 X54 |
% 17.51/17.09                                       bnd_c6_2 bnd_a327 X54) |
% 17.51/17.09                                      ~ bnd_c5_2 bnd_a327 X54)) &
% 17.51/17.09                                 ~ bnd_c5_1 bnd_a327 |
% 17.51/17.09                                 (ALL X55.
% 17.51/17.09                                     bnd_ndr1_0 -->
% 17.51/17.09                                     (~ bnd_c4_1 X55 | ~ bnd_c2_1 X55) |
% 17.51/17.09                                     (ALL X56.
% 17.51/17.09   bnd_ndr1_1 X55 -->
% 17.51/17.09   (~ bnd_c2_2 X55 X56 | ~ bnd_c5_2 X55 X56) | ~ bnd_c1_2 X55 X56))) |
% 17.51/17.09                                bnd_c5_0)) &
% 17.51/17.09                              (bnd_c9_0 | bnd_c6_0)) &
% 17.51/17.09                             (((ALL X57.
% 17.51/17.09                                   bnd_ndr1_0 -->
% 17.51/17.09                                   (((bnd_ndr1_1 X57 &
% 17.51/17.09                                      bnd_c8_2 X57 bnd_a328) &
% 17.51/17.09                                     ~ bnd_c1_2 X57 bnd_a328) &
% 17.51/17.09                                    bnd_c2_2 X57 bnd_a328 |
% 17.51/17.09                                    bnd_c3_1 X57) |
% 17.51/17.09                                   bnd_c6_1 X57) |
% 17.51/17.09                               ~ bnd_c7_0) |
% 17.51/17.09                              ~ bnd_c4_0)) &
% 17.51/17.09                            (~ bnd_c6_0 |
% 17.51/17.09                             ((bnd_ndr1_0 &
% 17.51/17.09                               (ALL X58.
% 17.51/17.09                                   bnd_ndr1_1 bnd_a329 -->
% 17.51/17.09                                   (bnd_c2_2 bnd_a329 X58 |
% 17.51/17.09                                    ~ bnd_c3_2 bnd_a329 X58) |
% 17.51/17.09                                   ~ bnd_c7_2 bnd_a329 X58)) &
% 17.51/17.09                              bnd_c1_1 bnd_a329) &
% 17.51/17.09                             bnd_c3_1 bnd_a329)) &
% 17.51/17.09                           ((((((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a330) &
% 17.51/17.09                                bnd_ndr1_1 bnd_a330) &
% 17.51/17.09                               bnd_c1_2 bnd_a330 bnd_a331) &
% 17.51/17.09                              ~ bnd_c10_2 bnd_a330 bnd_a331) &
% 17.51/17.09                             bnd_c6_2 bnd_a330 bnd_a331) &
% 17.51/17.09                            (ALL X59.
% 17.51/17.09                                bnd_ndr1_1 bnd_a330 -->
% 17.51/17.09                                (bnd_c3_2 bnd_a330 X59 |
% 17.51/17.09                                 ~ bnd_c1_2 bnd_a330 X59) |
% 17.51/17.09                                bnd_c2_2 bnd_a330 X59) |
% 17.51/17.09                            ((bnd_ndr1_0 & ~ bnd_c6_1 bnd_a332) &
% 17.51/17.09                             (ALL X60.
% 17.51/17.09                                 bnd_ndr1_1 bnd_a332 -->
% 17.51/17.09                                 ~ bnd_c3_2 bnd_a332 X60 |
% 17.51/17.09                                 ~ bnd_c10_2 bnd_a332 X60)) &
% 17.51/17.09                            ~ bnd_c10_1 bnd_a332)) &
% 17.51/17.09                          (((ALL X61.
% 17.51/17.09                                bnd_ndr1_0 -->
% 17.51/17.09                                ((ALL X62.
% 17.51/17.09                                     bnd_ndr1_1 X61 -->
% 17.51/17.09                                     (~ bnd_c2_2 X61 X62 | bnd_c8_2 X61 X62) |
% 17.51/17.09                                     bnd_c1_2 X61 X62) |
% 17.51/17.09                                 ~ bnd_c9_1 X61) |
% 17.51/17.09                                (ALL X63.
% 17.51/17.09                                    bnd_ndr1_1 X61 -->
% 17.51/17.09                                    (bnd_c10_2 X61 X63 | bnd_c4_2 X61 X63) |
% 17.51/17.09                                    bnd_c3_2 X61 X63)) |
% 17.51/17.09                            bnd_c2_0) |
% 17.51/17.09                           (ALL X64.
% 17.51/17.09                               bnd_ndr1_0 -->
% 17.51/17.09                               ((ALL X65.
% 17.51/17.09                                    bnd_ndr1_1 X64 -->
% 17.51/17.09                                    (~ bnd_c5_2 X64 X65 |
% 17.51/17.09                                     ~ bnd_c4_2 X64 X65) |
% 17.51/17.09                                    ~ bnd_c6_2 X64 X65) |
% 17.51/17.09                                ~ bnd_c4_1 X64) |
% 17.51/17.09                               ~ bnd_c1_1 X64))) &
% 17.51/17.09                         ((~ bnd_c10_0 |
% 17.51/17.09                           (ALL X66.
% 17.51/17.09                               bnd_ndr1_0 -->
% 17.51/17.09                               (ALL X67.
% 17.51/17.09                                   bnd_ndr1_1 X66 -->
% 17.51/17.09                                   (bnd_c4_2 X66 X67 | ~ bnd_c10_2 X66 X67) |
% 17.51/17.09                                   ~ bnd_c3_2 X66 X67) |
% 17.51/17.09                               bnd_c9_1 X66)) |
% 17.51/17.09                          ~ bnd_c4_0)) &
% 17.51/17.09                        ((((((((((bnd_ndr1_0 & bnd_c8_1 bnd_a333) &
% 17.51/17.09                                 bnd_ndr1_1 bnd_a333) &
% 17.51/17.09                                bnd_c8_2 bnd_a333 bnd_a334) &
% 17.51/17.09                               ~ bnd_c7_2 bnd_a333 bnd_a334) &
% 17.51/17.09                              bnd_c9_2 bnd_a333 bnd_a334) &
% 17.51/17.09                             bnd_ndr1_1 bnd_a333) &
% 17.51/17.09                            ~ bnd_c7_2 bnd_a333 bnd_a335) &
% 17.51/17.09                           bnd_c5_2 bnd_a333 bnd_a335) &
% 17.51/17.09                          ~ bnd_c9_2 bnd_a333 bnd_a335 |
% 17.51/17.09                          bnd_c7_0) |
% 17.51/17.09                         (ALL X68.
% 17.51/17.09                             bnd_ndr1_0 -->
% 17.51/17.09                             ((bnd_ndr1_1 X68 & ~ bnd_c1_2 X68 bnd_a336) &
% 17.51/17.09                              bnd_c8_2 X68 bnd_a336 |
% 17.51/17.09                              ~ bnd_c10_1 X68) |
% 17.51/17.09                             ~ bnd_c1_1 X68))) &
% 17.51/17.09                       (((ALL X69.
% 17.51/17.09                             bnd_ndr1_0 -->
% 17.51/17.09                             (bnd_c8_1 X69 | bnd_c7_1 X69) |
% 17.51/17.09                             (bnd_ndr1_1 X69 & ~ bnd_c8_2 X69 bnd_a337) &
% 17.51/17.09                             ~ bnd_c4_2 X69 bnd_a337) |
% 17.51/17.09                         bnd_c10_0) |
% 17.51/17.09                        (ALL X70.
% 17.51/17.09                            bnd_ndr1_0 -->
% 17.51/17.09                            (~ bnd_c4_1 X70 |
% 17.51/17.09                             ((bnd_ndr1_1 X70 & ~ bnd_c7_2 X70 bnd_a338) &
% 17.51/17.09                              ~ bnd_c8_2 X70 bnd_a338) &
% 17.51/17.09                             ~ bnd_c10_2 X70 bnd_a338) |
% 17.51/17.09                            ~ bnd_c10_1 X70))) &
% 17.51/17.09                      ((~ bnd_c6_0 |
% 17.51/17.09                        ((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a339) &
% 17.51/17.09                               ~ bnd_c3_2 bnd_a339 bnd_a340) &
% 17.51/17.09                              bnd_c9_2 bnd_a339 bnd_a340) &
% 17.51/17.09                             ~ bnd_c7_2 bnd_a339 bnd_a340) &
% 17.51/17.09                            ~ bnd_c6_1 bnd_a339) &
% 17.51/17.09                           bnd_ndr1_1 bnd_a339) &
% 17.51/17.09                          bnd_c4_2 bnd_a339 bnd_a341) &
% 17.51/17.09                         ~ bnd_c9_2 bnd_a339 bnd_a341) &
% 17.51/17.09                        ~ bnd_c5_2 bnd_a339 bnd_a341) |
% 17.51/17.09                       (ALL X71.
% 17.51/17.09                           bnd_ndr1_0 -->
% 17.51/17.09                           (bnd_c9_1 X71 |
% 17.51/17.09                            ((bnd_ndr1_1 X71 & bnd_c1_2 X71 bnd_a342) &
% 17.51/17.09                             bnd_c7_2 X71 bnd_a342) &
% 17.51/17.09                            ~ bnd_c2_2 X71 bnd_a342) |
% 17.51/17.09                           ~ bnd_c7_1 X71))) &
% 17.51/17.09                     ((bnd_c8_0 | bnd_c5_0) |
% 17.51/17.09                      (((((bnd_ndr1_0 & ~ bnd_c8_1 bnd_a343) &
% 17.51/17.09                          bnd_c5_1 bnd_a343) &
% 17.51/17.09                         bnd_ndr1_1 bnd_a343) &
% 17.51/17.09                        ~ bnd_c4_2 bnd_a343 bnd_a344) &
% 17.51/17.09                       bnd_c10_2 bnd_a343 bnd_a344) &
% 17.51/17.09                      bnd_c2_2 bnd_a343 bnd_a344)) &
% 17.51/17.09                    (((ALL X72.
% 17.51/17.09                          bnd_ndr1_0 -->
% 17.51/17.09                          (bnd_c9_1 X72 |
% 17.51/17.09                           (ALL X73.
% 17.51/17.09                               bnd_ndr1_1 X72 -->
% 17.51/17.09                               (bnd_c5_2 X72 X73 | bnd_c1_2 X72 X73) |
% 17.51/17.09                               bnd_c8_2 X72 X73)) |
% 17.51/17.09                          (ALL X74.
% 17.51/17.09                              bnd_ndr1_1 X72 -->
% 17.51/17.09                              ~ bnd_c6_2 X72 X74 | ~ bnd_c4_2 X72 X74)) |
% 17.51/17.09                      (((((bnd_ndr1_0 &
% 17.51/17.09                           (ALL X75.
% 17.51/17.09                               bnd_ndr1_1 bnd_a345 -->
% 17.51/17.09                               (bnd_c6_2 bnd_a345 X75 |
% 17.51/17.09                                ~ bnd_c2_2 bnd_a345 X75) |
% 17.51/17.09                               ~ bnd_c4_2 bnd_a345 X75)) &
% 17.51/17.09                          bnd_c1_1 bnd_a345) &
% 17.51/17.09                         bnd_ndr1_1 bnd_a345) &
% 17.51/17.09                        bnd_c2_2 bnd_a345 bnd_a346) &
% 17.51/17.09                       ~ bnd_c10_2 bnd_a345 bnd_a346) &
% 17.51/17.09                      bnd_c8_2 bnd_a345 bnd_a346) |
% 17.51/17.09                     (ALL X76.
% 17.51/17.09                         bnd_ndr1_0 -->
% 17.51/17.09                         ((bnd_ndr1_1 X76 & ~ bnd_c1_2 X76 bnd_a347) &
% 17.51/17.09                          bnd_c10_2 X76 bnd_a347) &
% 17.51/17.09                         bnd_c7_2 X76 bnd_a347 |
% 17.51/17.09                         ~ bnd_c4_1 X76))) &
% 17.51/17.09                   (bnd_c3_0 |
% 17.51/17.09                    ((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a348) &
% 17.51/17.09                       ~ bnd_c3_2 bnd_a348 bnd_a349) &
% 17.51/17.09                      bnd_c6_2 bnd_a348 bnd_a349) &
% 17.51/17.09                     bnd_c7_2 bnd_a348 bnd_a349) &
% 17.51/17.09                    ~ bnd_c6_1 bnd_a348)) &
% 17.51/17.09                  ((((((bnd_ndr1_0 & ~ bnd_c3_1 bnd_a350) &
% 17.51/17.09                       bnd_c2_1 bnd_a350) &
% 17.51/17.09                      bnd_ndr1_1 bnd_a350) &
% 17.51/17.09                     bnd_c7_2 bnd_a350 bnd_a351) &
% 17.51/17.09                    ~ bnd_c8_2 bnd_a350 bnd_a351) &
% 17.51/17.09                   bnd_c2_2 bnd_a350 bnd_a351 |
% 17.51/17.09                   bnd_c7_0)) &
% 17.51/17.09                 (~ bnd_c1_0 | ~ bnd_c6_0)) &
% 17.51/17.09                ((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a352) &
% 17.51/17.09                     ~ bnd_c2_2 bnd_a352 bnd_a353) &
% 17.51/17.09                    ~ bnd_c5_2 bnd_a352 bnd_a353) &
% 17.51/17.09                   bnd_c6_2 bnd_a352 bnd_a353) &
% 17.51/17.09                  bnd_c10_1 bnd_a352) &
% 17.51/17.09                 ~ bnd_c8_1 bnd_a352 |
% 17.51/17.09                 bnd_c10_0)) &
% 17.51/17.09               ((~ bnd_c2_0 |
% 17.51/17.09                 (ALL X77.
% 17.51/17.09                     bnd_ndr1_0 -->
% 17.51/17.09                     (~ bnd_c1_1 X77 |
% 17.51/17.09                      ((bnd_ndr1_1 X77 & bnd_c5_2 X77 bnd_a354) &
% 17.51/17.09                       bnd_c9_2 X77 bnd_a354) &
% 17.51/17.09                      bnd_c4_2 X77 bnd_a354) |
% 17.51/17.09                     bnd_c7_1 X77)) |
% 17.51/17.09                ((bnd_ndr1_0 & ~ bnd_c7_1 bnd_a355) & ~ bnd_c4_1 bnd_a355) &
% 17.51/17.09                ~ bnd_c6_1 bnd_a355)) &
% 17.51/17.09              (((((((bnd_ndr1_0 & bnd_c8_1 bnd_a356) & bnd_ndr1_1 bnd_a356) &
% 17.51/17.09                   bnd_c1_2 bnd_a356 bnd_a357) &
% 17.51/17.09                  ~ bnd_c6_2 bnd_a356 bnd_a357) &
% 17.51/17.09                 ~ bnd_c5_2 bnd_a356 bnd_a357) &
% 17.51/17.09                ~ bnd_c2_1 bnd_a356 |
% 17.51/17.09                (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a358) &
% 17.51/17.09                    ~ bnd_c2_2 bnd_a358 bnd_a359) &
% 17.51/17.09                   bnd_c5_2 bnd_a358 bnd_a359) &
% 17.51/17.09                  bnd_c10_2 bnd_a358 bnd_a359) &
% 17.51/17.09                 ~ bnd_c3_1 bnd_a358) &
% 17.51/17.09                ~ bnd_c8_1 bnd_a358) |
% 17.51/17.09               (ALL X78.
% 17.51/17.09                   bnd_ndr1_0 -->
% 17.51/17.09                   (bnd_c10_1 X78 |
% 17.51/17.09                    (ALL X79.
% 17.51/17.09                        bnd_ndr1_1 X78 -->
% 17.51/17.09                        (bnd_c3_2 X78 X79 | bnd_c7_2 X78 X79) |
% 17.51/17.09                        ~ bnd_c1_2 X78 X79)) |
% 17.51/17.09                   (ALL X80.
% 17.51/17.09                       bnd_ndr1_1 X78 -->
% 17.51/17.09                       (bnd_c6_2 X78 X80 | ~ bnd_c8_2 X78 X80) |
% 17.51/17.09                       bnd_c5_2 X78 X80)))) &
% 17.51/17.09             ((((bnd_ndr1_0 & ~ bnd_c7_1 bnd_a360) & ~ bnd_c6_1 bnd_a360) &
% 17.51/17.09               ~ bnd_c5_1 bnd_a360 |
% 17.51/17.09               bnd_c9_0) |
% 17.51/17.09              ((bnd_ndr1_0 & bnd_c3_1 bnd_a361) & bnd_c4_1 bnd_a361) &
% 17.51/17.09              ~ bnd_c1_1 bnd_a361)) &
% 17.51/17.09            (((ALL X81.
% 17.51/17.09                  bnd_ndr1_0 -->
% 17.51/17.09                  ((ALL X82.
% 17.51/17.09                       bnd_ndr1_1 X81 -->
% 17.51/17.09                       (bnd_c2_2 X81 X82 | bnd_c7_2 X81 X82) |
% 17.51/17.09                       bnd_c10_2 X81 X82) |
% 17.51/17.09                   bnd_c2_1 X81) |
% 17.51/17.09                  bnd_c5_1 X81) |
% 17.51/17.09              ((bnd_ndr1_0 &
% 17.51/17.09                (ALL X83.
% 17.51/17.09                    bnd_ndr1_1 bnd_a362 -->
% 17.51/17.09                    (~ bnd_c10_2 bnd_a362 X83 | ~ bnd_c4_2 bnd_a362 X83) |
% 17.51/17.09                    bnd_c7_2 bnd_a362 X83)) &
% 17.51/17.09               ~ bnd_c10_1 bnd_a362) &
% 17.51/17.09              (ALL X84.
% 17.51/17.09                  bnd_ndr1_1 bnd_a362 -->
% 17.51/17.09                  (~ bnd_c7_2 bnd_a362 X84 | bnd_c4_2 bnd_a362 X84) |
% 17.51/17.09                  ~ bnd_c5_2 bnd_a362 X84)) |
% 17.51/17.09             (ALL X85.
% 17.51/17.09                 bnd_ndr1_0 -->
% 17.51/17.09                 ((bnd_ndr1_1 X85 & bnd_c5_2 X85 bnd_a363) &
% 17.51/17.09                  bnd_c4_2 X85 bnd_a363 |
% 17.51/17.09                  bnd_c6_1 X85) |
% 17.51/17.09                 ~ bnd_c10_1 X85))) &
% 17.51/17.09           ((~ bnd_c10_0 | ~ bnd_c1_0) | bnd_c5_0)) &
% 17.51/17.09          ((~ bnd_c6_0 |
% 17.51/17.09            ((bnd_ndr1_0 & bnd_c8_1 bnd_a364) & bnd_c9_1 bnd_a364) &
% 17.51/17.09            (ALL X86.
% 17.51/17.09                bnd_ndr1_1 bnd_a364 -->
% 17.51/17.09                bnd_c4_2 bnd_a364 X86 | bnd_c2_2 bnd_a364 X86)) |
% 17.51/17.09           (ALL X87.
% 17.51/17.09               bnd_ndr1_0 -->
% 17.51/17.09               ~ bnd_c3_1 X87 |
% 17.51/17.09               (ALL X88.
% 17.51/17.09                   bnd_ndr1_1 X87 -->
% 17.51/17.09                   (~ bnd_c4_2 X87 X88 | bnd_c7_2 X87 X88) |
% 17.51/17.09                   bnd_c6_2 X87 X88)))) &
% 17.51/17.09         (((ALL X89.
% 17.51/17.09               bnd_ndr1_0 -->
% 17.51/17.09               (bnd_c3_1 X89 |
% 17.51/17.09                (ALL X90.
% 17.51/17.09                    bnd_ndr1_1 X89 -->
% 17.51/17.09                    (bnd_c5_2 X89 X90 | ~ bnd_c2_2 X89 X90) |
% 17.51/17.09                    bnd_c3_2 X89 X90)) |
% 17.51/17.09               bnd_c1_1 X89) |
% 17.51/17.09           (((((bnd_ndr1_0 & bnd_c7_1 bnd_a365) & bnd_c3_1 bnd_a365) &
% 17.51/17.09              bnd_ndr1_1 bnd_a365) &
% 17.51/17.09             ~ bnd_c8_2 bnd_a365 bnd_a366) &
% 17.51/17.09            bnd_c1_2 bnd_a365 bnd_a366) &
% 17.51/17.09           bnd_c4_2 bnd_a365 bnd_a366) |
% 17.51/17.09          (ALL X91. bnd_ndr1_0 --> bnd_c3_1 X91 | ~ bnd_c5_1 X91))) &
% 17.51/17.09        ((~ bnd_c6_0 | ~ bnd_c1_0) | ~ bnd_c9_0)) &
% 17.51/17.09       ((((((bnd_ndr1_0 &
% 17.51/17.09             (ALL X92.
% 17.51/17.09                 bnd_ndr1_1 bnd_a367 -->
% 17.51/17.09                 (bnd_c10_2 bnd_a367 X92 | ~ bnd_c7_2 bnd_a367 X92) |
% 17.51/17.09                 ~ bnd_c1_2 bnd_a367 X92)) &
% 17.51/17.09            bnd_ndr1_1 bnd_a367) &
% 17.51/17.09           bnd_c2_2 bnd_a367 bnd_a368) &
% 17.51/17.09          bnd_c7_2 bnd_a367 bnd_a368) &
% 17.51/17.09         bnd_c10_2 bnd_a367 bnd_a368 |
% 17.51/17.09         (ALL X93.
% 17.51/17.09             bnd_ndr1_0 -->
% 17.51/17.09             ((ALL X94.
% 17.51/17.09                  bnd_ndr1_1 X93 -->
% 17.51/17.09                  (~ bnd_c7_2 X93 X94 | bnd_c4_2 X93 X94) |
% 17.51/17.09                  bnd_c5_2 X93 X94) |
% 17.51/17.09              (ALL X95.
% 17.51/17.09                  bnd_ndr1_1 X93 -->
% 17.51/17.09                  (~ bnd_c6_2 X93 X95 | ~ bnd_c3_2 X93 X95) |
% 17.51/17.09                  bnd_c1_2 X93 X95)) |
% 17.51/17.09             bnd_c6_1 X93)) |
% 17.51/17.09        (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a369) &
% 17.51/17.09            ~ bnd_c4_2 bnd_a369 bnd_a370) &
% 17.51/17.09           ~ bnd_c9_2 bnd_a369 bnd_a370) &
% 17.51/17.09          bnd_c3_2 bnd_a369 bnd_a370) &
% 17.51/17.09         ~ bnd_c2_1 bnd_a369) &
% 17.51/17.09        ~ bnd_c1_1 bnd_a369)) &
% 17.51/17.09      ((bnd_c7_0 |
% 17.51/17.09        (((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a371) &
% 17.51/17.09              ~ bnd_c2_2 bnd_a371 bnd_a372) &
% 17.51/17.09             ~ bnd_c1_2 bnd_a371 bnd_a372) &
% 17.51/17.09            bnd_c6_1 bnd_a371) &
% 17.51/17.09           bnd_ndr1_1 bnd_a371) &
% 17.51/17.09          ~ bnd_c9_2 bnd_a371 bnd_a373) &
% 17.51/17.09         ~ bnd_c1_2 bnd_a371 bnd_a373) &
% 17.51/17.09        ~ bnd_c6_2 bnd_a371 bnd_a373) |
% 17.51/17.09       ((bnd_ndr1_0 & ~ bnd_c9_1 bnd_a374) & bnd_c8_1 bnd_a374) &
% 17.51/17.09       bnd_c10_1 bnd_a374)) &
% 17.51/17.09     ((~ bnd_c6_0 | ~ bnd_c4_0) |
% 17.51/17.09      (ALL X96.
% 17.51/17.09          bnd_ndr1_0 -->
% 17.51/17.09          (bnd_c8_1 X96 |
% 17.51/17.09           (ALL X97.
% 17.51/17.09               bnd_ndr1_1 X96 -->
% 17.51/17.09               (bnd_c7_2 X96 X97 | bnd_c10_2 X96 X97) | bnd_c2_2 X96 X97)) |
% 17.51/17.09          (ALL X98.
% 17.51/17.09              bnd_ndr1_1 X96 -->
% 17.51/17.09              (~ bnd_c10_2 X96 X98 | bnd_c3_2 X96 X98) |
% 17.51/17.09              ~ bnd_c4_2 X96 X98)))) &
% 17.51/17.09    (((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a375) & bnd_c7_2 bnd_a375 bnd_a376) &
% 17.51/17.09           ~ bnd_c2_2 bnd_a375 bnd_a376) &
% 17.51/17.09          bnd_c1_2 bnd_a375 bnd_a376) &
% 17.51/17.09         bnd_c8_1 bnd_a375) &
% 17.51/17.09        bnd_ndr1_1 bnd_a375) &
% 17.51/17.09       ~ bnd_c8_2 bnd_a375 bnd_a377) &
% 17.51/17.09      ~ bnd_c6_2 bnd_a375 bnd_a377 |
% 17.51/17.09      (ALL X99.
% 17.51/17.09          bnd_ndr1_0 -->
% 17.51/17.09          ((ALL X100.
% 17.51/17.09               bnd_ndr1_1 X99 -->
% 17.51/17.09               (bnd_c9_2 X99 X100 | bnd_c3_2 X99 X100) | bnd_c5_2 X99 X100) |
% 17.51/17.09           ~ bnd_c1_1 X99) |
% 17.51/17.09          ~ bnd_c3_1 X99)) |
% 17.51/17.09     (ALL X101.
% 17.51/17.09         bnd_ndr1_0 -->
% 17.51/17.09         (bnd_c3_1 X101 |
% 17.51/17.09          (ALL X102.
% 17.51/17.09              bnd_ndr1_1 X101 -->
% 17.51/17.09              (~ bnd_c6_2 X101 X102 | bnd_c9_2 X101 X102) |
% 17.51/17.09              bnd_c2_2 X101 X102)) |
% 17.51/17.09         ~ bnd_c9_1 X101))) &
% 17.51/17.09   ((bnd_c6_0 | bnd_c9_0) |
% 17.51/17.09    ((bnd_ndr1_0 &
% 17.51/17.09      (ALL X103.
% 17.51/17.09          bnd_ndr1_1 bnd_a378 -->
% 17.51/17.09          (~ bnd_c4_2 bnd_a378 X103 | ~ bnd_c9_2 bnd_a378 X103) |
% 17.51/17.09          ~ bnd_c2_2 bnd_a378 X103)) &
% 17.51/17.09     (ALL X104.
% 17.51/17.09         bnd_ndr1_1 bnd_a378 -->
% 17.51/17.09         (bnd_c5_2 bnd_a378 X104 | bnd_c8_2 bnd_a378 X104) |
% 17.51/17.09         ~ bnd_c9_2 bnd_a378 X104)) &
% 17.51/17.09    bnd_c2_1 bnd_a378)) &
% 17.51/17.09  ((~ bnd_c4_0 | bnd_c8_0) |
% 17.51/17.09   (ALL X105.
% 17.51/17.09       bnd_ndr1_0 -->
% 17.51/17.09       ((bnd_ndr1_1 X105 & bnd_c6_2 X105 bnd_a379) & bnd_c7_2 X105 bnd_a379) &
% 17.51/17.09       ~ bnd_c4_2 X105 bnd_a379 |
% 17.51/17.09       ((bnd_ndr1_1 X105 & ~ bnd_c2_2 X105 bnd_a380) &
% 17.51/17.09        ~ bnd_c1_2 X105 bnd_a380) &
% 17.51/17.09       ~ bnd_c4_2 X105 bnd_a380))) &
% 17.51/17.09                                       ((~ bnd_c4_0 |
% 17.51/17.09   (((((bnd_ndr1_0 & bnd_c1_1 bnd_a381) & bnd_ndr1_1 bnd_a381) &
% 17.51/17.09      ~ bnd_c2_2 bnd_a381 bnd_a382) &
% 17.51/17.09     ~ bnd_c5_2 bnd_a381 bnd_a382) &
% 17.51/17.09    bnd_c8_2 bnd_a381 bnd_a382) &
% 17.51/17.09   (ALL X106.
% 17.51/17.09       bnd_ndr1_1 bnd_a381 -->
% 17.51/17.09       (~ bnd_c9_2 bnd_a381 X106 | ~ bnd_c10_2 bnd_a381 X106) |
% 17.51/17.09       bnd_c8_2 bnd_a381 X106)) |
% 17.51/17.09  ~ bnd_c5_0)) &
% 17.51/17.09                                      ((bnd_c9_0 | bnd_c3_0) |
% 17.51/17.09                                       (ALL X107.
% 17.51/17.09     bnd_ndr1_0 -->
% 17.51/17.09     (((bnd_ndr1_1 X107 & bnd_c8_2 X107 bnd_a383) &
% 17.51/17.09       ~ bnd_c3_2 X107 bnd_a383) &
% 17.51/17.09      ~ bnd_c9_2 X107 bnd_a383 |
% 17.51/17.09      (ALL X108.
% 17.51/17.09          bnd_ndr1_1 X107 -->
% 17.51/17.09          (~ bnd_c3_2 X107 X108 | bnd_c9_2 X107 X108) |
% 17.51/17.09          ~ bnd_c6_2 X107 X108)) |
% 17.51/17.09     (ALL X109.
% 17.51/17.09         bnd_ndr1_1 X107 -->
% 17.51/17.09         ~ bnd_c2_2 X107 X109 | ~ bnd_c10_2 X107 X109)))) &
% 17.51/17.09                                     ((~ bnd_c9_0 | bnd_c4_0) |
% 17.51/17.09                                      (((((bnd_ndr1_0 &
% 17.51/17.09     (ALL X110.
% 17.51/17.09         bnd_ndr1_1 bnd_a384 -->
% 17.51/17.09         (~ bnd_c5_2 bnd_a384 X110 | bnd_c2_2 bnd_a384 X110) |
% 17.51/17.09         bnd_c6_2 bnd_a384 X110)) &
% 17.51/17.09    (ALL X111.
% 17.51/17.09        bnd_ndr1_1 bnd_a384 -->
% 17.51/17.09        (bnd_c4_2 bnd_a384 X111 | bnd_c8_2 bnd_a384 X111) |
% 17.51/17.09        bnd_c3_2 bnd_a384 X111)) &
% 17.51/17.09   bnd_ndr1_1 bnd_a384) &
% 17.51/17.09  ~ bnd_c5_2 bnd_a384 bnd_a385) &
% 17.51/17.09                                       bnd_c9_2 bnd_a384 bnd_a385) &
% 17.51/17.09                                      ~ bnd_c6_2 bnd_a384 bnd_a385)) &
% 17.51/17.09                                    ((((bnd_ndr1_0 & ~ bnd_c7_1 bnd_a386) &
% 17.51/17.09                                       bnd_c9_1 bnd_a386) &
% 17.51/17.09                                      bnd_c2_1 bnd_a386 |
% 17.51/17.09                                      ~ bnd_c2_0) |
% 17.51/17.09                                     (ALL X112.
% 17.51/17.09   bnd_ndr1_0 -->
% 17.51/17.09   (((bnd_ndr1_1 X112 & bnd_c2_2 X112 bnd_a387) & ~ bnd_c6_2 X112 bnd_a387) &
% 17.51/17.09    ~ bnd_c1_2 X112 bnd_a387 |
% 17.51/17.09    ~ bnd_c10_1 X112) |
% 17.51/17.09   bnd_c5_1 X112))) &
% 17.51/17.09                                   ((~ bnd_c4_0 |
% 17.51/17.09                                     (ALL X113.
% 17.51/17.09   bnd_ndr1_0 -->
% 17.51/17.09   (bnd_c3_1 X113 |
% 17.51/17.09    ((bnd_ndr1_1 X113 & ~ bnd_c7_2 X113 bnd_a388) &
% 17.51/17.09     ~ bnd_c9_2 X113 bnd_a388) &
% 17.51/17.09    ~ bnd_c4_2 X113 bnd_a388) |
% 17.51/17.09   ~ bnd_c9_1 X113)) |
% 17.51/17.09                                    (ALL X114.
% 17.51/17.09  bnd_ndr1_0 -->
% 17.51/17.09  (((bnd_ndr1_1 X114 & ~ bnd_c2_2 X114 bnd_a389) & bnd_c4_2 X114 bnd_a389) &
% 17.51/17.09   bnd_c5_2 X114 bnd_a389 |
% 17.51/17.09   ((bnd_ndr1_1 X114 & ~ bnd_c5_2 X114 bnd_a390) & bnd_c9_2 X114 bnd_a390) &
% 17.51/17.09   ~ bnd_c1_2 X114 bnd_a390) |
% 17.51/17.09  ~ bnd_c6_1 X114))) &
% 17.51/17.09                                  (((ALL X115.
% 17.51/17.09  bnd_ndr1_0 -->
% 17.51/17.09  (((bnd_ndr1_1 X115 & ~ bnd_c1_2 X115 bnd_a391) & ~ bnd_c9_2 X115 bnd_a391) &
% 17.51/17.09   ~ bnd_c2_2 X115 bnd_a391 |
% 17.51/17.09   ((bnd_ndr1_1 X115 & bnd_c1_2 X115 bnd_a392) & ~ bnd_c2_2 X115 bnd_a392) &
% 17.51/17.09   ~ bnd_c6_2 X115 bnd_a392) |
% 17.51/17.09  ((bnd_ndr1_1 X115 & ~ bnd_c8_2 X115 bnd_a393) & ~ bnd_c3_2 X115 bnd_a393) &
% 17.51/17.09  bnd_c6_2 X115 bnd_a393) |
% 17.51/17.09                                    ((bnd_ndr1_0 & ~ bnd_c4_1 bnd_a394) &
% 17.51/17.09                                     bnd_c1_1 bnd_a394) &
% 17.51/17.09                                    bnd_c3_1 bnd_a394) |
% 17.51/17.09                                   (((((bnd_ndr1_0 & ~ bnd_c2_1 bnd_a395) &
% 17.51/17.09                                       bnd_c7_1 bnd_a395) &
% 17.51/17.09                                      bnd_ndr1_1 bnd_a395) &
% 17.51/17.09                                     bnd_c9_2 bnd_a395 bnd_a396) &
% 17.51/17.09                                    bnd_c3_2 bnd_a395 bnd_a396) &
% 17.51/17.09                                   bnd_c6_2 bnd_a395 bnd_a396)) &
% 17.51/17.09                                 ((bnd_c9_0 |
% 17.51/17.09                                   (bnd_ndr1_0 & ~ bnd_c6_1 bnd_a397) &
% 17.51/17.09                                   (ALL X116.
% 17.51/17.09                                       bnd_ndr1_1 bnd_a397 -->
% 17.51/17.09                                       (~ bnd_c7_2 bnd_a397 X116 |
% 17.51/17.09  bnd_c1_2 bnd_a397 X116) |
% 17.51/17.09                                       bnd_c10_2 bnd_a397 X116)) |
% 17.51/17.09                                  bnd_c6_0)) &
% 17.51/17.09                                (((bnd_ndr1_0 & bnd_c8_1 bnd_a398) &
% 17.51/17.09                                  (ALL X117.
% 17.51/17.09                                      bnd_ndr1_1 bnd_a398 -->
% 17.51/17.09                                      (bnd_c1_2 bnd_a398 X117 |
% 17.51/17.09                                       bnd_c2_2 bnd_a398 X117) |
% 17.51/17.09                                      ~ bnd_c3_2 bnd_a398 X117)) &
% 17.51/17.09                                 bnd_c7_1 bnd_a398 |
% 17.51/17.09                                 ~ bnd_c6_0)) &
% 17.51/17.09                               (((ALL X118.
% 17.51/17.09                                     bnd_ndr1_0 -->
% 17.51/17.09                                     (bnd_c9_1 X118 |
% 17.51/17.09                                      ((bnd_ndr1_1 X118 &
% 17.51/17.09  bnd_c8_2 X118 bnd_a399) &
% 17.51/17.09                                       ~ bnd_c9_2 X118 bnd_a399) &
% 17.51/17.09                                      bnd_c3_2 X118 bnd_a399) |
% 17.51/17.09                                     bnd_c3_1 X118) |
% 17.51/17.09                                 (ALL X119.
% 17.51/17.09                                     bnd_ndr1_0 -->
% 17.51/17.09                                     (~ bnd_c3_1 X119 |
% 17.51/17.09                                      (ALL X120.
% 17.51/17.09    bnd_ndr1_1 X119 -->
% 17.51/17.09    (bnd_c5_2 X119 X120 | ~ bnd_c7_2 X119 X120) | bnd_c2_2 X119 X120)) |
% 17.51/17.09                                     ((bnd_ndr1_1 X119 &
% 17.51/17.09                                       ~ bnd_c8_2 X119 bnd_a400) &
% 17.51/17.09                                      bnd_c2_2 X119 bnd_a400) &
% 17.51/17.09                                     ~ bnd_c7_2 X119 bnd_a400)) |
% 17.51/17.09                                ~ bnd_c7_0)) &
% 17.51/17.09                              (((ALL X121.
% 17.51/17.09                                    bnd_ndr1_0 -->
% 17.51/17.09                                    (~ bnd_c4_1 X121 |
% 17.51/17.09                                     (ALL X122.
% 17.51/17.09   bnd_ndr1_1 X121 -->
% 17.51/17.09   (~ bnd_c6_2 X121 X122 | bnd_c1_2 X121 X122) | ~ bnd_c9_2 X121 X122)) |
% 17.51/17.09                                    (ALL X123.
% 17.51/17.09  bnd_ndr1_1 X121 --> bnd_c6_2 X121 X123 | ~ bnd_c10_2 X121 X123)) |
% 17.51/17.09                                bnd_c4_0) |
% 17.51/17.09                               (bnd_ndr1_0 & ~ bnd_c6_1 bnd_a401) &
% 17.51/17.09                               bnd_c1_1 bnd_a401)) &
% 17.51/17.09                             (((ALL X124.
% 17.51/17.09                                   bnd_ndr1_0 -->
% 17.51/17.09                                   (((bnd_ndr1_1 X124 &
% 17.51/17.09                                      ~ bnd_c9_2 X124 bnd_a402) &
% 17.51/17.09                                     bnd_c7_2 X124 bnd_a402) &
% 17.51/17.09                                    ~ bnd_c2_2 X124 bnd_a402 |
% 17.51/17.09                                    ~ bnd_c10_1 X124) |
% 17.51/17.09                                   ~ bnd_c2_1 X124) |
% 17.51/17.09                               (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a403) &
% 17.51/17.09                                   bnd_c5_2 bnd_a403 bnd_a404) &
% 17.51/17.09                                  bnd_c3_2 bnd_a403 bnd_a404) &
% 17.51/17.09                                 ~ bnd_c7_2 bnd_a403 bnd_a404) &
% 17.51/17.09                                (ALL X125.
% 17.51/17.09                                    bnd_ndr1_1 bnd_a403 -->
% 17.51/17.09                                    (~ bnd_c10_2 bnd_a403 X125 |
% 17.51/17.09                                     ~ bnd_c6_2 bnd_a403 X125) |
% 17.51/17.09                                    ~ bnd_c4_2 bnd_a403 X125)) &
% 17.51/17.09                               ~ bnd_c3_1 bnd_a403) |
% 17.51/17.09                              (bnd_ndr1_0 & bnd_c8_1 bnd_a405) &
% 17.51/17.09                              (ALL X126.
% 17.51/17.09                                  bnd_ndr1_1 bnd_a405 -->
% 17.51/17.09                                  bnd_c1_2 bnd_a405 X126 |
% 17.51/17.09                                  ~ bnd_c10_2 bnd_a405 X126))) &
% 17.51/17.09                            (((bnd_ndr1_0 &
% 17.51/17.09                               (ALL X127.
% 17.51/17.09                                   bnd_ndr1_1 bnd_a406 -->
% 17.51/17.09                                   (~ bnd_c2_2 bnd_a406 X127 |
% 17.51/17.09                                    bnd_c1_2 bnd_a406 X127) |
% 17.51/17.09                                   bnd_c9_2 bnd_a406 X127)) &
% 17.51/17.09                              ~ bnd_c3_1 bnd_a406 |
% 17.51/17.09                              (ALL X128.
% 17.51/17.09                                  bnd_ndr1_0 -->
% 17.51/17.09                                  (~ bnd_c2_1 X128 |
% 17.51/17.09                                   ((bnd_ndr1_1 X128 &
% 17.51/17.09                                     bnd_c10_2 X128 bnd_a407) &
% 17.51/17.09                                    bnd_c5_2 X128 bnd_a407) &
% 17.51/17.09                                   ~ bnd_c2_2 X128 bnd_a407) |
% 17.51/17.09                                  bnd_c9_1 X128)) |
% 17.51/17.09                             ((((((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a408) &
% 17.51/17.09                                    bnd_c10_2 bnd_a408 bnd_a409) &
% 17.51/17.09                                   bnd_c2_2 bnd_a408 bnd_a409) &
% 17.51/17.09                                  ~ bnd_c5_2 bnd_a408 bnd_a409) &
% 17.51/17.09                                 (ALL X129.
% 17.51/17.09                                     bnd_ndr1_1 bnd_a408 -->
% 17.51/17.09                                     (~ bnd_c7_2 bnd_a408 X129 |
% 17.51/17.09                                      bnd_c8_2 bnd_a408 X129) |
% 17.51/17.09                                     bnd_c3_2 bnd_a408 X129)) &
% 17.51/17.09                                bnd_ndr1_1 bnd_a408) &
% 17.51/17.09                               bnd_c2_2 bnd_a408 bnd_a410) &
% 17.51/17.09                              bnd_c10_2 bnd_a408 bnd_a410) &
% 17.51/17.09                             ~ bnd_c4_2 bnd_a408 bnd_a410)) &
% 17.51/17.09                           (((ALL X130.
% 17.51/17.09                                 bnd_ndr1_0 -->
% 17.51/17.09                                 ((ALL X131.
% 17.51/17.09                                      bnd_ndr1_1 X130 -->
% 17.51/17.09                                      (~ bnd_c5_2 X130 X131 |
% 17.51/17.09                                       bnd_c2_2 X130 X131) |
% 17.51/17.09                                      bnd_c9_2 X130 X131) |
% 17.51/17.09                                  (ALL X132.
% 17.51/17.09                                      bnd_ndr1_1 X130 -->
% 17.51/17.09                                      (bnd_c10_2 X130 X132 |
% 17.51/17.09                                       bnd_c2_2 X130 X132) |
% 17.51/17.09                                      ~ bnd_c7_2 X130 X132)) |
% 17.51/17.09                                 ~ bnd_c8_1 X130) |
% 17.51/17.09                             ~ bnd_c6_0) |
% 17.51/17.09                            ~ bnd_c8_0)) &
% 17.51/17.09                          (((ALL X133.
% 17.51/17.09                                bnd_ndr1_0 -->
% 17.51/17.09                                (~ bnd_c1_1 X133 |
% 17.51/17.09                                 (ALL X134.
% 17.51/17.09                                     bnd_ndr1_1 X133 -->
% 17.51/17.09                                     (~ bnd_c10_2 X133 X134 |
% 17.51/17.09                                      bnd_c6_2 X133 X134) |
% 17.51/17.09                                     bnd_c4_2 X133 X134)) |
% 17.51/17.09                                ((bnd_ndr1_1 X133 &
% 17.51/17.09                                  ~ bnd_c7_2 X133 bnd_a411) &
% 17.51/17.09                                 bnd_c3_2 X133 bnd_a411) &
% 17.51/17.09                                ~ bnd_c2_2 X133 bnd_a411) |
% 17.51/17.09                            (ALL X135.
% 17.51/17.09                                bnd_ndr1_0 -->
% 17.51/17.09                                (((bnd_ndr1_1 X135 & bnd_c3_2 X135 bnd_a412) &
% 17.51/17.09                                  bnd_c5_2 X135 bnd_a412) &
% 17.51/17.09                                 ~ bnd_c4_2 X135 bnd_a412 |
% 17.51/17.09                                 ((bnd_ndr1_1 X135 &
% 17.51/17.09                                   ~ bnd_c4_2 X135 bnd_a413) &
% 17.51/17.09                                  ~ bnd_c1_2 X135 bnd_a413) &
% 17.51/17.09                                 bnd_c3_2 X135 bnd_a413) |
% 17.51/17.09                                ~ bnd_c5_1 X135)) |
% 17.51/17.09                           ~ bnd_c10_0)) &
% 17.51/17.09                         (((ALL X136.
% 17.51/17.09                               bnd_ndr1_0 -->
% 17.51/17.09                               (~ bnd_c10_1 X136 | ~ bnd_c2_1 X136) |
% 17.51/17.09                               (ALL X137.
% 17.51/17.09                                   bnd_ndr1_1 X136 -->
% 17.51/17.09                                   (bnd_c10_2 X136 X137 |
% 17.51/17.09                                    bnd_c6_2 X136 X137) |
% 17.51/17.09                                   ~ bnd_c2_2 X136 X137)) |
% 17.51/17.09                           ~ bnd_c8_0) |
% 17.51/17.09                          bnd_c7_0)) &
% 17.51/17.09                        (((((((bnd_ndr1_0 & ~ bnd_c1_1 bnd_a414) &
% 17.51/17.09                              bnd_ndr1_1 bnd_a414) &
% 17.51/17.09                             bnd_c6_2 bnd_a414 bnd_a415) &
% 17.51/17.09                            ~ bnd_c8_2 bnd_a414 bnd_a415) &
% 17.51/17.09                           bnd_c2_2 bnd_a414 bnd_a415) &
% 17.51/17.09                          (ALL X138.
% 17.51/17.09                              bnd_ndr1_1 bnd_a414 -->
% 17.51/17.09                              (bnd_c7_2 bnd_a414 X138 |
% 17.51/17.09                               ~ bnd_c3_2 bnd_a414 X138) |
% 17.51/17.09                              bnd_c1_2 bnd_a414 X138) |
% 17.51/17.09                          ~ bnd_c3_0) |
% 17.51/17.09                         (((((((bnd_ndr1_0 &
% 17.51/17.09                                (ALL X139.
% 17.51/17.09                                    bnd_ndr1_1 bnd_a416 -->
% 17.51/17.09                                    (bnd_c4_2 bnd_a416 X139 |
% 17.51/17.09                                     ~ bnd_c1_2 bnd_a416 X139) |
% 17.51/17.09                                    ~ bnd_c5_2 bnd_a416 X139)) &
% 17.51/17.09                               bnd_ndr1_1 bnd_a416) &
% 17.51/17.09                              ~ bnd_c4_2 bnd_a416 bnd_a417) &
% 17.51/17.09                             bnd_c7_2 bnd_a416 bnd_a417) &
% 17.51/17.09                            bnd_c5_2 bnd_a416 bnd_a417) &
% 17.51/17.09                           bnd_ndr1_1 bnd_a416) &
% 17.51/17.09                          bnd_c8_2 bnd_a416 bnd_a418) &
% 17.51/17.09                         bnd_c6_2 bnd_a416 bnd_a418)) &
% 17.51/17.09                       ((~ bnd_c8_0 |
% 17.51/17.09                         (ALL X140.
% 17.51/17.09                             bnd_ndr1_0 -->
% 17.51/17.09                             ((ALL X141.
% 17.51/17.09                                  bnd_ndr1_1 X140 -->
% 17.51/17.09                                  (~ bnd_c5_2 X140 X141 |
% 17.51/17.09                                   bnd_c1_2 X140 X141) |
% 17.51/17.09                                  bnd_c6_2 X140 X141) |
% 17.51/17.09                              (bnd_ndr1_1 X140 & ~ bnd_c5_2 X140 bnd_a419) &
% 17.51/17.09                              ~ bnd_c1_2 X140 bnd_a419) |
% 17.51/17.09                             ~ bnd_c9_1 X140)) |
% 17.51/17.09                        ~ bnd_c4_0)) &
% 17.51/17.09                      ((~ bnd_c10_0 |
% 17.51/17.09                        (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a420) &
% 17.51/17.09                            bnd_c7_2 bnd_a420 bnd_a421) &
% 17.51/17.09                           ~ bnd_c3_2 bnd_a420 bnd_a421) &
% 17.51/17.09                          bnd_c10_2 bnd_a420 bnd_a421) &
% 17.51/17.09                         ~ bnd_c8_1 bnd_a420) &
% 17.51/17.09                        bnd_c7_1 bnd_a420) |
% 17.51/17.09                       ~ bnd_c9_0)) &
% 17.51/17.09                     (((((((bnd_ndr1_0 &
% 17.51/17.09                            (ALL X142.
% 17.51/17.09                                bnd_ndr1_1 bnd_a422 -->
% 17.51/17.09                                (~ bnd_c9_2 bnd_a422 X142 |
% 17.51/17.09                                 bnd_c5_2 bnd_a422 X142) |
% 17.51/17.09                                ~ bnd_c7_2 bnd_a422 X142)) &
% 17.51/17.09                           bnd_c1_1 bnd_a422) &
% 17.51/17.09                          bnd_ndr1_1 bnd_a422) &
% 17.51/17.09                         ~ bnd_c10_2 bnd_a422 bnd_a423) &
% 17.51/17.09                        ~ bnd_c6_2 bnd_a422 bnd_a423) &
% 17.51/17.09                       ~ bnd_c8_2 bnd_a422 bnd_a423 |
% 17.51/17.09                       (((bnd_ndr1_0 & ~ bnd_c5_1 bnd_a424) &
% 17.51/17.09                         bnd_ndr1_1 bnd_a424) &
% 17.51/17.09                        ~ bnd_c5_2 bnd_a424 bnd_a425) &
% 17.51/17.09                       bnd_c7_2 bnd_a424 bnd_a425) |
% 17.51/17.09                      ~ bnd_c3_0)) &
% 17.51/17.09                    ((~ bnd_c2_0 |
% 17.51/17.09                      (ALL X143.
% 17.51/17.09                          bnd_ndr1_0 -->
% 17.51/17.09                          ~ bnd_c3_1 X143 |
% 17.51/17.09                          ((bnd_ndr1_1 X143 & ~ bnd_c3_2 X143 bnd_a426) &
% 17.51/17.09                           bnd_c9_2 X143 bnd_a426) &
% 17.51/17.09                          bnd_c4_2 X143 bnd_a426)) |
% 17.51/17.09                     ~ bnd_c8_0)) &
% 17.51/17.09                   ((((bnd_ndr1_0 & ~ bnd_c7_1 bnd_a427) &
% 17.51/17.09                      (ALL X144.
% 17.51/17.09                          bnd_ndr1_1 bnd_a427 -->
% 17.51/17.09                          (bnd_c10_2 bnd_a427 X144 |
% 17.51/17.09                           ~ bnd_c6_2 bnd_a427 X144) |
% 17.51/17.09                          ~ bnd_c8_2 bnd_a427 X144)) &
% 17.51/17.09                     (ALL X145.
% 17.51/17.09                         bnd_ndr1_1 bnd_a427 -->
% 17.51/17.09                         (bnd_c3_2 bnd_a427 X145 | ~ bnd_c1_2 bnd_a427 X145) |
% 17.51/17.09                         ~ bnd_c10_2 bnd_a427 X145) |
% 17.51/17.09                     (ALL X146.
% 17.51/17.09                         bnd_ndr1_0 -->
% 17.51/17.09                         ((ALL X147.
% 17.51/17.09                              bnd_ndr1_1 X146 -->
% 17.51/17.09                              (bnd_c7_2 X146 X147 | bnd_c1_2 X146 X147) |
% 17.51/17.09                              ~ bnd_c2_2 X146 X147) |
% 17.51/17.09                          bnd_c6_1 X146) |
% 17.51/17.09                         ((bnd_ndr1_1 X146 & ~ bnd_c10_2 X146 bnd_a428) &
% 17.51/17.09                          ~ bnd_c1_2 X146 bnd_a428) &
% 17.51/17.09                         ~ bnd_c8_2 X146 bnd_a428)) |
% 17.51/17.09                    (ALL X148.
% 17.51/17.09                        bnd_ndr1_0 -->
% 17.51/17.09                        (((bnd_ndr1_1 X148 & bnd_c7_2 X148 bnd_a429) &
% 17.51/17.09                          ~ bnd_c8_2 X148 bnd_a429) &
% 17.51/17.09                         ~ bnd_c5_2 X148 bnd_a429 |
% 17.51/17.09                         ~ bnd_c9_1 X148) |
% 17.51/17.09                        bnd_c1_1 X148))) &
% 17.51/17.09                  ((bnd_c7_0 | bnd_c3_0) | ~ bnd_c8_0)) &
% 17.51/17.09                 (((ALL X149. bnd_ndr1_0 --> ~ bnd_c10_1 X149) |
% 17.51/17.09                   (ALL X150.
% 17.51/17.09                       bnd_ndr1_0 -->
% 17.51/17.09                       (((bnd_ndr1_1 X150 & bnd_c6_2 X150 bnd_a430) &
% 17.51/17.09                         bnd_c2_2 X150 bnd_a430) &
% 17.51/17.09                        ~ bnd_c10_2 X150 bnd_a430 |
% 17.51/17.09                        bnd_c5_1 X150) |
% 17.51/17.09                       ~ bnd_c4_1 X150)) |
% 17.51/17.09                  ((bnd_ndr1_0 & bnd_c2_1 bnd_a431) & ~ bnd_c4_1 bnd_a431) &
% 17.51/17.09                  bnd_c6_1 bnd_a431)) &
% 17.51/17.09                ((bnd_c9_0 | ~ bnd_c10_0) |
% 17.51/17.09                 (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a432) &
% 17.51/17.09                     ~ bnd_c2_2 bnd_a432 bnd_a433) &
% 17.51/17.09                    ~ bnd_c8_2 bnd_a432 bnd_a433) &
% 17.51/17.09                   ~ bnd_c9_2 bnd_a432 bnd_a433) &
% 17.51/17.09                  ~ bnd_c5_1 bnd_a432) &
% 17.51/17.09                 bnd_c3_1 bnd_a432)) &
% 17.51/17.09               (((ALL X151.
% 17.51/17.09                     bnd_ndr1_0 -->
% 17.51/17.09                     (bnd_c4_1 X151 |
% 17.51/17.09                      (ALL X152.
% 17.51/17.09                          bnd_ndr1_1 X151 -->
% 17.51/17.09                          (bnd_c7_2 X151 X152 | ~ bnd_c8_2 X151 X152) |
% 17.51/17.09                          ~ bnd_c2_2 X151 X152)) |
% 17.51/17.09                     (ALL X153.
% 17.51/17.09                         bnd_ndr1_1 X151 -->
% 17.51/17.09                         (~ bnd_c5_2 X151 X153 | ~ bnd_c6_2 X151 X153) |
% 17.51/17.09                         ~ bnd_c9_2 X151 X153)) |
% 17.51/17.09                 (ALL X154.
% 17.51/17.09                     bnd_ndr1_0 -->
% 17.51/17.09                     (~ bnd_c10_1 X154 |
% 17.51/17.09                      (ALL X155.
% 17.51/17.09                          bnd_ndr1_1 X154 -->
% 17.51/17.09                          (~ bnd_c2_2 X154 X155 | ~ bnd_c7_2 X154 X155) |
% 17.51/17.09                          bnd_c10_2 X154 X155)) |
% 17.51/17.09                     ~ bnd_c1_1 X154)) |
% 17.51/17.09                bnd_c3_0)) &
% 17.51/17.09              (((((((bnd_ndr1_0 & bnd_c7_1 bnd_a434) & bnd_ndr1_1 bnd_a434) &
% 17.51/17.09                   bnd_c9_2 bnd_a434 bnd_a435) &
% 17.51/17.09                  bnd_c4_2 bnd_a434 bnd_a435) &
% 17.51/17.09                 ~ bnd_c1_2 bnd_a434 bnd_a435) &
% 17.51/17.09                ~ bnd_c6_1 bnd_a434 |
% 17.51/17.09                (((((bnd_ndr1_0 & bnd_ndr1_1 bnd_a436) &
% 17.51/17.09                    bnd_c8_2 bnd_a436 bnd_a437) &
% 17.51/17.09                   bnd_c3_2 bnd_a436 bnd_a437) &
% 17.51/17.09                  bnd_c4_2 bnd_a436 bnd_a437) &
% 17.51/17.09                 (ALL X156.
% 17.51/17.09                     bnd_ndr1_1 bnd_a436 -->
% 17.51/17.09                     (bnd_c1_2 bnd_a436 X156 | ~ bnd_c9_2 bnd_a436 X156) |
% 17.51/17.09                     ~ bnd_c3_2 bnd_a436 X156)) &
% 17.51/17.09                ~ bnd_c2_1 bnd_a436) |
% 17.51/17.09               bnd_c8_0)) &
% 17.51/17.09             ((bnd_c5_0 |
% 17.51/17.09               ((bnd_ndr1_0 &
% 17.51/17.09                 (ALL X157.
% 17.51/17.09                     bnd_ndr1_1 bnd_a438 -->
% 17.51/17.09                     (~ bnd_c10_2 bnd_a438 X157 | bnd_c3_2 bnd_a438 X157) |
% 17.51/17.09                     bnd_c9_2 bnd_a438 X157)) &
% 17.51/17.09                (ALL X158.
% 17.51/17.09                    bnd_ndr1_1 bnd_a438 -->
% 17.51/17.09                    (bnd_c7_2 bnd_a438 X158 | ~ bnd_c6_2 bnd_a438 X158) |
% 17.51/17.09                    bnd_c1_2 bnd_a438 X158)) &
% 17.51/17.09               (ALL X159.
% 17.51/17.09                   bnd_ndr1_1 bnd_a438 -->
% 17.51/17.09                   (bnd_c6_2 bnd_a438 X159 | ~ bnd_c2_2 bnd_a438 X159) |
% 17.51/17.09                   bnd_c10_2 bnd_a438 X159)) |
% 17.51/17.09              ~ bnd_c2_0)) &
% 17.51/17.09            (((ALL X160.
% 17.51/17.09                  bnd_ndr1_0 -->
% 17.51/17.09                  ((ALL X161.
% 17.51/17.09                       bnd_ndr1_1 X160 -->
% 17.51/17.09                       (~ bnd_c1_2 X160 X161 | bnd_c4_2 X160 X161) |
% 17.51/17.09                       ~ bnd_c10_2 X160 X161) |
% 17.51/17.09                   bnd_c1_1 X160) |
% 17.51/17.09                  ~ bnd_c4_1 X160) |
% 17.51/17.09              (ALL X162.
% 17.51/17.09                  bnd_ndr1_0 -->
% 17.51/17.09                  (~ bnd_c9_1 X162 | bnd_c1_1 X162) |
% 17.51/17.09                  (bnd_ndr1_1 X162 & ~ bnd_c5_2 X162 bnd_a439) &
% 17.51/17.09                  bnd_c7_2 X162 bnd_a439)) |
% 17.51/17.09             bnd_c6_0)) &
% 17.51/17.09           (~ bnd_c7_0 |
% 17.51/17.09            (ALL X163.
% 17.51/17.09                bnd_ndr1_0 -->
% 17.51/17.09                (bnd_c10_1 X163 | ~ bnd_c9_1 X163) |
% 17.51/17.09                ((bnd_ndr1_1 X163 & ~ bnd_c5_2 X163 bnd_a440) &
% 17.51/17.09                 bnd_c1_2 X163 bnd_a440) &
% 17.51/17.09                bnd_c6_2 X163 bnd_a440))) &
% 17.51/17.09          (((bnd_ndr1_0 &
% 17.51/17.09             (ALL X164.
% 17.51/17.09                 bnd_ndr1_1 bnd_a441 -->
% 17.51/17.09                 (bnd_c7_2 bnd_a441 X164 | ~ bnd_c5_2 bnd_a441 X164) |
% 17.51/17.09                 ~ bnd_c8_2 bnd_a441 X164)) &
% 17.51/17.09            (ALL X165.
% 17.51/17.09                bnd_ndr1_1 bnd_a441 -->
% 17.51/17.09                (bnd_c5_2 bnd_a441 X165 | bnd_c2_2 bnd_a441 X165) |
% 17.51/17.09                ~ bnd_c4_2 bnd_a441 X165) |
% 17.51/17.09            ((bnd_ndr1_0 & bnd_c8_1 bnd_a442) &
% 17.51/17.09             (ALL X166.
% 17.51/17.09                 bnd_ndr1_1 bnd_a442 -->
% 17.51/17.09                 (bnd_c5_2 bnd_a442 X166 | ~ bnd_c3_2 bnd_a442 X166) |
% 17.51/17.09                 ~ bnd_c10_2 bnd_a442 X166)) &
% 17.51/17.09            (ALL X167.
% 17.51/17.09                bnd_ndr1_1 bnd_a442 -->
% 17.51/17.09                (bnd_c2_2 bnd_a442 X167 | ~ bnd_c1_2 bnd_a442 X167) |
% 17.51/17.09                bnd_c7_2 bnd_a442 X167)) |
% 17.51/17.09           ((bnd_ndr1_0 &
% 17.51/17.09             (ALL X168.
% 17.51/17.09                 bnd_ndr1_1 bnd_a443 -->
% 17.51/17.09                 (bnd_c3_2 bnd_a443 X168 | bnd_c10_2 bnd_a443 X168) |
% 17.51/17.09                 ~ bnd_c5_2 bnd_a443 X168)) &
% 17.51/17.09            (ALL X169.
% 17.51/17.09                bnd_ndr1_1 bnd_a443 -->
% 17.51/17.09                (bnd_c8_2 bnd_a443 X169 | bnd_c6_2 bnd_a443 X169) |
% 17.51/17.09                ~ bnd_c5_2 bnd_a443 X169)) &
% 17.51/17.09           (ALL X170.
% 17.51/17.09               bnd_ndr1_1 bnd_a443 -->
% 17.51/17.09               ~ bnd_c3_2 bnd_a443 X170 | ~ bnd_c9_2 bnd_a443 X170))) &
% 17.51/17.09         ((bnd_c8_0 |
% 17.51/17.09           (ALL X171.
% 17.51/17.09               bnd_ndr1_0 -->
% 17.51/17.09               (~ bnd_c1_1 X171 | bnd_c8_1 X171) | ~ bnd_c7_1 X171)) |
% 17.51/17.09          ((bnd_ndr1_0 &
% 17.51/17.09            (ALL X172.
% 17.51/17.09                bnd_ndr1_1 bnd_a444 -->
% 17.51/17.09                (bnd_c10_2 bnd_a444 X172 | bnd_c4_2 bnd_a444 X172) |
% 17.51/17.09                bnd_c2_2 bnd_a444 X172)) &
% 17.51/17.09           bnd_c8_1 bnd_a444) &
% 17.51/17.09          (ALL X173.
% 17.51/17.09              bnd_ndr1_1 bnd_a444 -->
% 17.51/17.09              (~ bnd_c5_2 bnd_a444 X173 | ~ bnd_c10_2 bnd_a444 X173) |
% 17.51/17.09              bnd_c9_2 bnd_a444 X173))) &
% 17.51/17.09        ((~ bnd_c7_0 | (bnd_ndr1_0 & bnd_c1_1 bnd_a445) & bnd_c6_1 bnd_a445) |
% 17.51/17.09         bnd_c3_0)) &
% 17.51/17.09       ((bnd_c4_0 |
% 17.51/17.09         (ALL X174.
% 17.51/17.09             bnd_ndr1_0 -->
% 17.51/17.09             (((bnd_ndr1_1 X174 & ~ bnd_c8_2 X174 bnd_a446) &
% 17.51/17.09               bnd_c10_2 X174 bnd_a446) &
% 17.51/17.09              bnd_c1_2 X174 bnd_a446 |
% 17.51/17.09              ((bnd_ndr1_1 X174 & ~ bnd_c10_2 X174 bnd_a447) &
% 17.51/17.09               bnd_c7_2 X174 bnd_a447) &
% 17.51/17.09              bnd_c3_2 X174 bnd_a447) |
% 17.51/17.09             (ALL X175.
% 17.51/17.09                 bnd_ndr1_1 X174 -->
% 17.51/17.09                 (bnd_c10_2 X174 X175 | ~ bnd_c3_2 X174 X175) |
% 17.51/17.09                 ~ bnd_c4_2 X174 X175))) |
% 17.51/17.09        ~ bnd_c5_0)) &
% 17.51/17.09      ((~ bnd_c5_0 | bnd_c6_0) | bnd_c4_0)) &
% 17.51/17.09     ((((bnd_ndr1_0 & bnd_c10_1 bnd_a448) & ~ bnd_c2_1 bnd_a448) &
% 17.51/17.09       (ALL X176.
% 17.51/17.09           bnd_ndr1_1 bnd_a448 -->
% 17.51/17.09           (~ bnd_c4_2 bnd_a448 X176 | bnd_c7_2 bnd_a448 X176) |
% 17.51/17.09           bnd_c6_2 bnd_a448 X176) |
% 17.51/17.09       bnd_c8_0) |
% 17.51/17.09      bnd_c2_0))
% 17.51/17.09  Adding axioms...
% 17.61/17.10  Typedef.type_definition_def
% 49.65/49.12   ...done.
% 49.65/49.15  Ground types: ?'b, TPTP_Interpret.ind
% 49.65/49.15  Translating term (sizes: 1, 1) ...
% 75.51/74.92  Invoking SAT solver...
% 75.51/74.92  No model exists.
% 75.51/74.92  Translating term (sizes: 2, 1) ...
% 102.20/101.56  Invoking SAT solver...
% 102.20/101.56  No model exists.
% 102.20/101.56  Translating term (sizes: 1, 2) ...
% 149.59/148.73  Invoking SAT solver...
% 150.28/149.42  Model found:
% 150.28/149.42  Size of types: ?'b: 1, TPTP_Interpret.ind: 2
% 150.28/149.42  bnd_a448: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a447: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a446: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a445: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a444: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a443: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a442: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a441: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a440: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a439: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a438: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a437: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a436: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a435: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a434: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a433: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a432: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a431: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a430: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a429: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a428: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a427: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a426: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a425: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a424: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a423: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a422: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a421: ??.TPTP_Interpret.ind1
% 150.28/149.42  bnd_a420: ??.TPTP_Interpret.ind1
% 150.28/149.42  bnd_a419: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a418: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a417: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a416: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a415: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a414: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a413: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a412: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a411: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a410: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a409: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a408: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a407: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a406: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a405: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a404: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a403: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a402: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a401: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a400: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a399: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a398: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a397: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a396: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a395: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a394: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a393: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a392: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a391: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a390: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a389: ??.TPTP_Interpret.ind0
% 150.28/149.42  bnd_a388: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a387: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a386: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a385: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a384: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a383: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a382: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a381: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a380: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a379: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a378: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a377: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a376: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a375: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a374: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a373: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a372: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a371: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a370: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a369: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a368: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a367: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a366: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a365: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a364: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a363: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a362: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a361: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a360: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a359: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a358: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a357: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a356: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a355: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a354: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a353: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a352: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a351: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a350: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a349: ??.TPTP_Interpret.ind1
% 150.28/149.43  bnd_a348: ??.TPTP_Interpret.ind1
% 150.28/149.43  bnd_a347: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a346: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a345: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a344: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a343: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a342: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a341: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a340: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a339: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a338: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a337: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a336: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a335: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a334: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a333: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a332: ??.TPTP_Interpret.ind1
% 150.28/149.43  bnd_a331: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a330: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a329: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a328: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a327: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a326: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a325: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a324: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a323: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a322: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a321: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a320: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a319: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a318: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a317: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a316: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a315: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a314: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a313: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a312: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a311: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a310: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a309: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a308: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a307: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a306: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a305: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a304: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a303: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a302: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a301: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a300: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a299: ??.TPTP_Interpret.ind1
% 150.28/149.43  bnd_a298: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a297: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a296: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a295: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a294: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a293: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a292: ??.TPTP_Interpret.ind1
% 150.28/149.43  bnd_a291: ??.TPTP_Interpret.ind1
% 150.28/149.43  bnd_a290: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a289: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a288: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a287: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_c8_1: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)}
% 150.28/149.43  bnd_c2_0: False
% 150.28/149.43  bnd_a286: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a285: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a284: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a283: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a282: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a281: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a280: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_c10_0: True
% 150.28/149.43  bnd_a279: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a278: ??.TPTP_Interpret.ind1
% 150.28/149.43  bnd_c8_0: True
% 150.28/149.43  bnd_a277: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_a276: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_c5_0: False
% 150.28/149.43  bnd_c7_0: True
% 150.28/149.43  bnd_a275: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_c5_2: {(??.TPTP_Interpret.ind0,
% 150.28/149.43    {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)}),
% 150.28/149.43   (??.TPTP_Interpret.ind1,
% 150.28/149.43    {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)})}
% 150.28/149.43  bnd_a274: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_c8_2: {(??.TPTP_Interpret.ind0,
% 150.28/149.43    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}),
% 150.28/149.43   (??.TPTP_Interpret.ind1,
% 150.28/149.43    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)})}
% 150.28/149.43  bnd_c1_1: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)}
% 150.28/149.43  bnd_c5_1: {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)}
% 150.28/149.43  bnd_c4_2: {(??.TPTP_Interpret.ind0,
% 150.28/149.43    {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)}),
% 150.28/149.43   (??.TPTP_Interpret.ind1,
% 150.28/149.43    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)})}
% 150.28/149.43  bnd_a273: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_c6_2: {(??.TPTP_Interpret.ind0,
% 150.28/149.43    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}),
% 150.28/149.43   (??.TPTP_Interpret.ind1,
% 150.28/149.43    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)})}
% 150.28/149.43  bnd_a272: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_c3_1: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}
% 150.28/149.43  bnd_a271: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_c6_0: False
% 150.28/149.43  bnd_c4_0: True
% 150.28/149.43  bnd_c6_1: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)}
% 150.28/149.43  bnd_c1_2: {(??.TPTP_Interpret.ind0,
% 150.28/149.43    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}),
% 150.28/149.43   (??.TPTP_Interpret.ind1,
% 150.28/149.43    {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, True)})}
% 150.28/149.43  bnd_c2_2: {(??.TPTP_Interpret.ind0,
% 150.28/149.43    {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)}),
% 150.28/149.43   (??.TPTP_Interpret.ind1,
% 150.28/149.43    {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)})}
% 150.28/149.43  bnd_c10_2: {(??.TPTP_Interpret.ind0,
% 150.28/149.43    {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)}),
% 150.28/149.43   (??.TPTP_Interpret.ind1,
% 150.28/149.43    {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, True)})}
% 150.28/149.43  bnd_c9_0: True
% 150.28/149.43  bnd_c4_1: {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)}
% 150.28/149.43  bnd_c2_1: {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)}
% 150.28/149.43  bnd_c7_2: {(??.TPTP_Interpret.ind0,
% 150.28/149.43    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}),
% 150.28/149.43   (??.TPTP_Interpret.ind1,
% 150.28/149.43    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)})}
% 150.28/149.43  bnd_c3_2: {(??.TPTP_Interpret.ind0,
% 150.28/149.43    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}),
% 150.28/149.43   (??.TPTP_Interpret.ind1,
% 150.28/149.43    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, False)})}
% 150.28/149.43  bnd_a270: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_c9_2: {(??.TPTP_Interpret.ind0,
% 150.28/149.43    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}),
% 150.28/149.43   (??.TPTP_Interpret.ind1,
% 150.28/149.43    {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)})}
% 150.28/149.43  bnd_a269: ??.TPTP_Interpret.ind0
% 150.28/149.43  bnd_ndr1_1: {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, True)}
% 150.28/149.43  bnd_c3_0: False
% 150.28/149.43  bnd_c7_1: {(??.TPTP_Interpret.ind0, True), (??.TPTP_Interpret.ind1, True)}
% 150.28/149.43  bnd_c10_1: {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)}
% 150.28/149.43  bnd_c9_1: {(??.TPTP_Interpret.ind0, False), (??.TPTP_Interpret.ind1, False)}
% 150.28/149.43  bnd_ndr1_0: True
% 150.28/149.43  bnd_c1_0: False
% 150.28/149.43  
% 150.28/149.43  % SZS status CounterSatisfiable
%------------------------------------------------------------------------------