TSTP Solution File: HWV006-2 by Geo-III---2018C
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- Process Solution
%------------------------------------------------------------------------------
% File : Geo-III---2018C
% Problem : HWV006-2 : TPTP v8.1.0. Bugfixed v2.7.0.
% Transfm : none
% Format : tptp:raw
% Command : geo -tptp_input -nonempty -inputfile %s
% Computer : n028.cluster.edu
% Model : x86_64 x86_64
% CPU : Intel(R) Xeon(R) CPU E5-2620 v4 2.10GHz
% Memory : 8042.1875MB
% OS : Linux 3.10.0-693.el7.x86_64
% CPULimit : 300s
% WCLimit : 300s
% DateTime : Sat Jul 23 06:04:48 EDT 2022
% Result : Unsatisfiable 282.36s 282.55s
% Output : Refutation 282.36s
% Verified :
% SZS Type : -
% Comments :
%------------------------------------------------------------------------------
%----WARNING: Could not form TPTP format derivation
%------------------------------------------------------------------------------
%----ORIGINAL SYSTEM OUTPUT
% 0.03/0.12 % Problem : HWV006-2 : TPTP v8.1.0. Bugfixed v2.7.0.
% 0.03/0.12 % Command : geo -tptp_input -nonempty -inputfile %s
% 0.12/0.33 % Computer : n028.cluster.edu
% 0.12/0.33 % Model : x86_64 x86_64
% 0.12/0.33 % CPU : Intel(R) Xeon(R) CPU E5-2620 v4 @ 2.10GHz
% 0.12/0.33 % Memory : 8042.1875MB
% 0.12/0.33 % OS : Linux 3.10.0-693.el7.x86_64
% 0.12/0.33 % CPULimit : 300
% 0.12/0.33 % WCLimit : 300
% 0.12/0.33 % DateTime : Fri Jul 22 17:11:58 EDT 2022
% 0.12/0.33 % CPUTime :
% 282.36/282.55 GeoParameters:
% 282.36/282.55
% 282.36/282.55 tptp_input = 1
% 282.36/282.55 tptp_output = 0
% 282.36/282.55 nonempty = 1
% 282.36/282.55 inputfile = /export/starexec/sandbox2/benchmark/theBenchmark.p
% 282.36/282.55 includepath = /export/starexec/sandbox2/solver/bin/../../benchmark/
% 282.36/282.55
% 282.36/282.55
% 282.36/282.55 % SZS status Unsatisfiable for /export/starexec/sandbox2/benchmark/theBenchmark.p
% 282.36/282.55 % SZS output start Refutation for /export/starexec/sandbox2/benchmark/theBenchmark.p
% 282.36/282.55
% 282.36/282.55 RuleSystem INPUT:
% 282.36/282.55
% 282.36/282.55 Initial Rules:
% 282.36/282.55 #0: input, references = 223, size of lhs = 2:
% 282.36/282.55 connection-{F}(V1,V0), zero-{F}(V1) | zero-{T}(V0)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1: input, references = 252, size of lhs = 2:
% 282.36/282.55 connection-{F}(V1,V0), one-{F}(V1) | one-{T}(V0)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #2: input, references = 71, size of lhs = 2:
% 282.36/282.55 zero-{F}(V0), connection-{F}(V1,V0) | zero-{T}(V1)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #3: input, references = 76, size of lhs = 2:
% 282.36/282.55 one-{F}(V0), connection-{F}(V1,V0) | one-{T}(V1)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #4: input, references = 37, size of lhs = 2:
% 282.36/282.55 zero-{F}(V0), one-{F}(V0) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #5: input, references = 52, size of lhs = 4:
% 282.36/282.55 P_in1-{F}(V0,V1), P_out1-{F}(V0,V2), and_ok-{F}(V0), zero-{F}(V1) | zero-{T}(V2)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #6: input, references = 4, size of lhs = 4:
% 282.36/282.55 P_in2-{F}(V0,V1), P_out1-{F}(V0,V2), and_ok-{F}(V0), zero-{F}(V1) | zero-{T}(V2)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #7: input, references = 41, size of lhs = 6:
% 282.36/282.55 P_in1-{F}(V0,V1), P_in2-{F}(V0,V2), P_out1-{F}(V0,V3), and_ok-{F}(V0), one-{F}(V1), one-{F}(V2) | one-{T}(V3)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #8: input, references = 3, size of lhs = 5:
% 282.36/282.55 P_out1-{F}(V0,V1), P_in1-{F}(V0,V2), P_in2-{F}(V0,V3), and_ok-{F}(V0), zero-{F}(V1) | zero-{T}(V2), zero-{T}(V3)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #9: input, references = 7, size of lhs = 4:
% 282.36/282.55 P_out1-{F}(V0,V1), P_in1-{F}(V0,V2), and_ok-{F}(V0), one-{F}(V1) | one-{T}(V2)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #10: input, references = 19, size of lhs = 4:
% 282.36/282.55 P_out1-{F}(V0,V1), P_in2-{F}(V0,V2), and_ok-{F}(V0), one-{F}(V1) | one-{T}(V2)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #11: input, references = 3, size of lhs = 2:
% 282.36/282.55 and_ok-{F}(V0), abnormal-{F}(V0) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #12: input, references = 6, size of lhs = 1:
% 282.36/282.55 logic_and-{F}(V0) | and_ok-{T}(V0), abnormal-{T}(V0)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #13: input, references = 11, size of lhs = 4:
% 282.36/282.55 P_in1-{F}(V0,V1), P_out1-{F}(V0,V2), or_ok-{F}(V0), one-{F}(V1) | one-{T}(V2)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #14: input, references = 24, size of lhs = 4:
% 282.36/282.55 P_in2-{F}(V0,V1), P_out1-{F}(V0,V2), or_ok-{F}(V0), one-{F}(V1) | one-{T}(V2)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #15: input, references = 3, size of lhs = 6:
% 282.36/282.55 P_in1-{F}(V0,V1), P_in2-{F}(V0,V2), P_out1-{F}(V0,V3), or_ok-{F}(V0), zero-{F}(V1), zero-{F}(V2) | zero-{T}(V3)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #16: input, references = 3, size of lhs = 5:
% 282.36/282.55 P_out1-{F}(V0,V1), P_in1-{F}(V0,V2), P_in2-{F}(V0,V3), or_ok-{F}(V0), one-{F}(V1) | one-{T}(V2), one-{T}(V3)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #17: input, references = 4, size of lhs = 4:
% 282.36/282.55 P_out1-{F}(V0,V1), P_in1-{F}(V0,V2), or_ok-{F}(V0), zero-{F}(V1) | zero-{T}(V2)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #18: input, references = 3, size of lhs = 4:
% 282.36/282.55 P_out1-{F}(V0,V1), P_in2-{F}(V0,V2), or_ok-{F}(V0), zero-{F}(V1) | zero-{T}(V2)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #19: input, references = 3, size of lhs = 2:
% 282.36/282.55 or_ok-{F}(V0), abnormal-{F}(V0) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #20: input, references = 5, size of lhs = 1:
% 282.36/282.55 logic_or-{F}(V0) | or_ok-{T}(V0), abnormal-{T}(V0)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #21: input, references = 84, size of lhs = 4:
% 282.36/282.55 P_in1-{F}(V0,V1), P_out1-{F}(V0,V2), not_ok-{F}(V0), zero-{F}(V1) | one-{T}(V2)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #22: input, references = 10, size of lhs = 4:
% 282.36/282.55 P_in1-{F}(V0,V1), P_out1-{F}(V0,V2), not_ok-{F}(V0), one-{F}(V1) | zero-{T}(V2)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #23: input, references = 6, size of lhs = 4:
% 282.36/282.55 P_out1-{F}(V0,V1), P_in1-{F}(V0,V2), not_ok-{F}(V0), zero-{F}(V1) | one-{T}(V2)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #24: input, references = 5, size of lhs = 4:
% 282.36/282.55 P_out1-{F}(V0,V1), P_in1-{F}(V0,V2), not_ok-{F}(V0), one-{F}(V1) | zero-{T}(V2)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #25: input, references = 3, size of lhs = 2:
% 282.36/282.55 not_ok-{F}(V0), abnormal-{F}(V0) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #26: input, references = 7, size of lhs = 1:
% 282.36/282.55 logic_not-{F}(V0) | not_ok-{T}(V0), abnormal-{T}(V0)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #27: input, references = 7, size of lhs = 2:
% 282.36/282.55 P_and1-{F}(V0,V1), halfadder-{F}(V0) | logic_and-{T}(V1)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #28: input, references = 16, size of lhs = 2:
% 282.36/282.55 P_and2-{F}(V0,V1), halfadder-{F}(V0) | logic_and-{T}(V1)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #29: input, references = 12, size of lhs = 2:
% 282.36/282.55 P_not1-{F}(V0,V1), halfadder-{F}(V0) | logic_not-{T}(V1)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #30: input, references = 8, size of lhs = 2:
% 282.36/282.55 P_or1-{F}(V0,V1), halfadder-{F}(V0) | logic_or-{T}(V1)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #31: input, references = 87, size of lhs = 4:
% 282.36/282.55 P_in1-{F}(V0,V1), P_or1-{F}(V0,V2), P_in1-{F}(V2,V3), halfadder-{F}(V0) | connection-{T}(V1,V3)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #32: input, references = 24, size of lhs = 4:
% 282.36/282.55 P_in2-{F}(V0,V1), P_or1-{F}(V0,V2), P_in2-{F}(V2,V3), halfadder-{F}(V0) | connection-{T}(V1,V3)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #33: input, references = 81, size of lhs = 4:
% 282.36/282.55 P_in1-{F}(V0,V1), P_and2-{F}(V0,V2), P_in1-{F}(V2,V3), halfadder-{F}(V0) | connection-{T}(V1,V3)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #34: input, references = 26, size of lhs = 4:
% 282.36/282.55 P_in2-{F}(V0,V1), P_and2-{F}(V0,V2), P_in2-{F}(V2,V3), halfadder-{F}(V0) | connection-{T}(V1,V3)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #35: input, references = 83, size of lhs = 4:
% 282.36/282.55 P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), P_out1-{F}(V2,V3), halfadder-{F}(V0) | connection-{T}(V1,V3)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #36: input, references = 37, size of lhs = 4:
% 282.36/282.55 P_outc-{F}(V0,V1), P_and2-{F}(V0,V2), P_out1-{F}(V2,V3), halfadder-{F}(V0) | connection-{T}(V1,V3)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #37: input, references = 54, size of lhs = 5:
% 282.36/282.55 P_or1-{F}(V0,V1), P_out1-{F}(V1,V2), P_and1-{F}(V0,V3), P_in1-{F}(V3,V4), halfadder-{F}(V0) | connection-{T}(V2,V4)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #38: input, references = 78, size of lhs = 5:
% 282.36/282.55 P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), P_not1-{F}(V0,V3), P_in1-{F}(V3,V4), halfadder-{F}(V0) | connection-{T}(V2,V4)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #39: input, references = 61, size of lhs = 5:
% 282.36/282.55 P_not1-{F}(V0,V1), P_out1-{F}(V1,V2), P_and1-{F}(V0,V3), P_in2-{F}(V3,V4), halfadder-{F}(V0) | connection-{T}(V2,V4)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #40: input, references = 5, size of lhs = 2:
% 282.36/282.55 P_h1-{F}(V0,V1), fulladder-{F}(V0) | halfadder-{T}(V1)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #41: input, references = 5, size of lhs = 2:
% 282.36/282.55 P_h2-{F}(V0,V1), fulladder-{F}(V0) | halfadder-{T}(V1)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #42: input, references = 4, size of lhs = 2:
% 282.36/282.55 P_or1-{F}(V0,V1), fulladder-{F}(V0) | logic_or-{T}(V1)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #43: input, references = 23, size of lhs = 5:
% 282.36/282.55 P_h1-{F}(V0,V1), P_outs-{F}(V1,V2), P_h2-{F}(V0,V3), P_in2-{F}(V3,V4), fulladder-{F}(V0) | connection-{T}(V2,V4)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #44: input, references = 15, size of lhs = 5:
% 282.36/282.55 P_h1-{F}(V0,V1), P_outc-{F}(V1,V2), P_or1-{F}(V0,V3), P_in2-{F}(V3,V4), fulladder-{F}(V0) | connection-{T}(V2,V4)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #45: input, references = 20, size of lhs = 5:
% 282.36/282.55 P_h2-{F}(V0,V1), P_outc-{F}(V1,V2), P_or1-{F}(V0,V3), P_in1-{F}(V3,V4), fulladder-{F}(V0) | connection-{T}(V2,V4)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #46: input, references = 16, size of lhs = 4:
% 282.36/282.55 P_in1-{F}(V0,V1), P_h2-{F}(V0,V2), P_in1-{F}(V2,V3), fulladder-{F}(V0) | connection-{T}(V1,V3)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #47: input, references = 11, size of lhs = 4:
% 282.36/282.55 P_in2-{F}(V0,V1), P_h1-{F}(V0,V2), P_in1-{F}(V2,V3), fulladder-{F}(V0) | connection-{T}(V1,V3)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #48: input, references = 7, size of lhs = 4:
% 282.36/282.55 P_inc-{F}(V0,V1), P_h1-{F}(V0,V2), P_in2-{F}(V2,V3), fulladder-{F}(V0) | connection-{T}(V1,V3)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #49: input, references = 24, size of lhs = 4:
% 282.36/282.55 P_outs-{F}(V0,V1), P_h2-{F}(V0,V2), P_outs-{F}(V2,V3), fulladder-{F}(V0) | connection-{T}(V1,V3)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #50: input, references = 5, size of lhs = 4:
% 282.36/282.55 P_outc-{F}(V0,V1), P_or1-{F}(V0,V2), P_out1-{F}(V2,V3), fulladder-{F}(V0) | connection-{T}(V1,V3)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #51: input, references = 4, size of lhs = 1:
% 282.36/282.55 P_f-{F}(V0) | fulladder-{T}(V0)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #52: input, references = 4, size of lhs = 2:
% 282.36/282.55 P_f-{F}(V0), P_in1-{F}(V0,V1) | one-{T}(V1)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #53: input, references = 4, size of lhs = 3:
% 282.36/282.55 P_f-{F}(V0), P_in1-{F}(V0,V1), P_in2-{F}(V0,V2) | zero-{T}(V2)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #54: input, references = 6, size of lhs = 4:
% 282.36/282.55 P_f-{F}(V0), P_in1-{F}(V0,V1), P_in2-{F}(V0,V2), P_inc-{F}(V0,V3) | one-{T}(V3)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #55: input, references = 6, size of lhs = 5:
% 282.36/282.55 P_f-{F}(V0), P_in1-{F}(V0,V1), P_in2-{F}(V0,V2), P_inc-{F}(V0,V3), P_outs-{F}(V0,V4) | one-{T}(V4)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #56: input, references = 6, size of lhs = 6:
% 282.36/282.55 P_f-{F}(V0), P_in1-{F}(V0,V1), P_in2-{F}(V0,V2), P_inc-{F}(V0,V3), P_outs-{F}(V0,V4), P_outc-{F}(V0,V5) | zero-{T}(V5)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #57: input, references = 4, size of lhs = 11:
% 282.36/282.55 P_f-{F}(V0), P_in1-{F}(V0,V1), P_in2-{F}(V0,V2), P_inc-{F}(V0,V3), P_outs-{F}(V0,V4), P_outc-{F}(V0,V5), P_or1-{F}(V0,V6), P_h2-{F}(V0,V7), P_not1-{F}(V7,V8), abnormal-{F}(V6), abnormal-{F}(V8) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #58: input, references = 4, size of lhs = 11:
% 282.36/282.55 P_f-{F}(V0), P_in1-{F}(V0,V1), P_in2-{F}(V0,V2), P_inc-{F}(V0,V3), P_outs-{F}(V0,V4), P_outc-{F}(V0,V5), P_or1-{F}(V0,V6), P_h2-{F}(V0,V7), P_not1-{F}(V7,V8), P_and2-{F}(V7,V9), abnormal-{F}(V9) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #59: input, references = 3, size of lhs = 13:
% 282.36/282.55 P_f-{F}(V0), P_in1-{F}(V0,V1), P_in2-{F}(V0,V2), P_inc-{F}(V0,V3), P_outs-{F}(V0,V4), P_outc-{F}(V0,V5), P_or1-{F}(V0,V6), P_h2-{F}(V0,V7), P_not1-{F}(V7,V8), P_and2-{F}(V7,V9), P_and1-{F}(V7,V10), abnormal-{F}(V6), abnormal-{F}(V10) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #60: input, references = 3, size of lhs = 14:
% 282.36/282.55 P_f-{F}(V0), P_in1-{F}(V0,V1), P_in2-{F}(V0,V2), P_inc-{F}(V0,V3), P_outs-{F}(V0,V4), P_outc-{F}(V0,V5), P_or1-{F}(V0,V6), P_h2-{F}(V0,V7), P_not1-{F}(V7,V8), P_and2-{F}(V7,V9), P_and1-{F}(V7,V10), P_h1-{F}(V0,V11), P_or1-{F}(V11,V12), abnormal-{F}(V12) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #61: input, references = 4, size of lhs = 15:
% 282.36/282.55 P_f-{F}(V0), P_in1-{F}(V0,V1), P_in2-{F}(V0,V2), P_inc-{F}(V0,V3), P_outs-{F}(V0,V4), P_outc-{F}(V0,V5), P_or1-{F}(V0,V6), P_h2-{F}(V0,V7), P_not1-{F}(V7,V8), P_and2-{F}(V7,V9), P_and1-{F}(V7,V10), P_h1-{F}(V0,V11), P_or1-{F}(V11,V12), P_not1-{F}(V11,V13), abnormal-{F}(V13) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #62: input, references = 3, size of lhs = 16:
% 282.36/282.55 P_f-{F}(V0), P_in1-{F}(V0,V1), P_in2-{F}(V0,V2), P_inc-{F}(V0,V3), P_outs-{F}(V0,V4), P_outc-{F}(V0,V5), P_or1-{F}(V0,V6), P_h2-{F}(V0,V7), P_not1-{F}(V7,V8), P_and2-{F}(V7,V9), P_and1-{F}(V7,V10), P_h1-{F}(V0,V11), P_or1-{F}(V11,V12), P_not1-{F}(V11,V13), P_and2-{F}(V11,V14), abnormal-{F}(V14) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #63: input, references = 4, size of lhs = 17:
% 282.36/282.55 P_f-{F}(V0), P_in1-{F}(V0,V1), P_in2-{F}(V0,V2), P_inc-{F}(V0,V3), P_outs-{F}(V0,V4), P_outc-{F}(V0,V5), P_or1-{F}(V0,V6), P_h2-{F}(V0,V7), P_not1-{F}(V7,V8), P_and2-{F}(V7,V9), P_and1-{F}(V7,V10), P_h1-{F}(V0,V11), P_or1-{F}(V11,V12), P_not1-{F}(V11,V13), P_and2-{F}(V11,V14), P_and1-{F}(V11,V15), abnormal-{F}(V15) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #64: input, references = 110, size of lhs = 1:
% 282.36/282.55 #-{F} V0 | EXISTS V1: P_in1-{T}(V0,V1)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #65: input, references = 99, size of lhs = 1:
% 282.36/282.55 #-{F} V0 | EXISTS V1: P_out1-{T}(V0,V1)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #66: input, references = 40, size of lhs = 1:
% 282.36/282.55 #-{F} V0 | EXISTS V1: P_in2-{T}(V0,V1)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #67: input, references = 22, size of lhs = 1:
% 282.36/282.55 #-{F} V0 | EXISTS V1: P_and1-{T}(V0,V1)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #68: input, references = 40, size of lhs = 1:
% 282.36/282.55 #-{F} V0 | EXISTS V1: P_and2-{T}(V0,V1)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #69: input, references = 49, size of lhs = 1:
% 282.36/282.55 #-{F} V0 | EXISTS V1: P_not1-{T}(V0,V1)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #70: input, references = 21, size of lhs = 1:
% 282.36/282.55 #-{F} V0 | EXISTS V1: P_or1-{T}(V0,V1)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #71: input, references = 25, size of lhs = 1:
% 282.36/282.55 #-{F} V0 | EXISTS V1: P_outs-{T}(V0,V1)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #72: input, references = 23, size of lhs = 1:
% 282.36/282.55 #-{F} V0 | EXISTS V1: P_outc-{T}(V0,V1)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #73: input, references = 4, size of lhs = 1:
% 282.36/282.55 #-{F} V0 | EXISTS V1: P_h1-{T}(V0,V1)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #74: input, references = 5, size of lhs = 1:
% 282.36/282.55 #-{F} V0 | EXISTS V1: P_h2-{T}(V0,V1)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #75: input, references = 9, size of lhs = 1:
% 282.36/282.55 #-{F} V0 | EXISTS V1: P_inc-{T}(V0,V1)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #76: input, references = 4, size of lhs = 0:
% 282.36/282.55 FALSE | EXISTS V0: P_f-{T}(V0)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 number of initial rules = 77
% 282.36/282.55
% 282.36/282.55 Simplifiers:
% 282.36/282.55 #77: unsound, references = 3, size of lhs = 3:
% 282.36/282.55 fulladder-{F}(V0), fulladder-{F}(V1), V0 == V1 | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #78: unsound, references = 3, size of lhs = 3:
% 282.36/282.55 P_in1-{F}(V0,V1), P_in1-{F}(V0,V3), V1 == V3 | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #79: unsound, references = 3, size of lhs = 3:
% 282.36/282.55 P_out1-{F}(V0,V1), P_out1-{F}(V0,V3), V1 == V3 | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #80: unsound, references = 3, size of lhs = 3:
% 282.36/282.55 P_in2-{F}(V0,V1), P_in2-{F}(V0,V3), V1 == V3 | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #81: unsound, references = 3, size of lhs = 3:
% 282.36/282.55 P_and1-{F}(V0,V1), P_and1-{F}(V0,V3), V1 == V3 | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #82: unsound, references = 3, size of lhs = 3:
% 282.36/282.55 P_and2-{F}(V0,V1), P_and2-{F}(V0,V3), V1 == V3 | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #83: unsound, references = 3, size of lhs = 3:
% 282.36/282.55 P_not1-{F}(V0,V1), P_not1-{F}(V0,V3), V1 == V3 | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #84: unsound, references = 3, size of lhs = 3:
% 282.36/282.55 P_or1-{F}(V0,V1), P_or1-{F}(V0,V3), V1 == V3 | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #85: unsound, references = 3, size of lhs = 3:
% 282.36/282.55 P_outs-{F}(V0,V1), P_outs-{F}(V0,V3), V1 == V3 | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #86: unsound, references = 3, size of lhs = 3:
% 282.36/282.55 P_outc-{F}(V0,V1), P_outc-{F}(V0,V3), V1 == V3 | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #87: unsound, references = 3, size of lhs = 3:
% 282.36/282.55 P_h1-{F}(V0,V1), P_h1-{F}(V0,V3), V1 == V3 | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #88: unsound, references = 3, size of lhs = 3:
% 282.36/282.55 P_h2-{F}(V0,V1), P_h2-{F}(V0,V3), V1 == V3 | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #89: unsound, references = 3, size of lhs = 3:
% 282.36/282.55 P_inc-{F}(V0,V1), P_inc-{F}(V0,V3), V1 == V3 | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #90: unsound, references = 3, size of lhs = 3:
% 282.36/282.55 P_f-{F}(V0), P_f-{F}(V1), V0 == V1 | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 number of simplifiers = 14
% 282.36/282.55
% 282.36/282.55 Learnt:
% 282.36/282.55 #99: exists( #75, #97 ), references = 10, size of lhs = 6:
% 282.36/282.55 P_f-{F}(V0), P_in1-{F}(V0,V1), P_in2-{F}(V0,V2), P_outs-{F}(V0,V3), P_outc-{F}(V0,V4), one-{F}(V4) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #103: exists( #72, #101 ), references = 4, size of lhs = 8:
% 282.36/282.55 fulladder-{F}(V0), P_f-{F}(V0), P_or1-{F}(V0,V1), P_out1-{F}(V1,V2), one-{F}(V2), P_in1-{F}(V0,V3), P_in2-{F}(V0,V4), P_outs-{F}(V0,V5) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #105: exists( #71, #102 ), references = 5, size of lhs = 7:
% 282.36/282.55 fulladder-{F}(V0), P_f-{F}(V0), P_or1-{F}(V0,V1), P_out1-{F}(V1,V2), one-{F}(V2), P_in1-{F}(V0,V3), P_in2-{F}(V0,V4) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #120: exists( #75, #116 ), references = 4, size of lhs = 5:
% 282.36/282.55 P_f-{F}(V0), P_in1-{F}(V0,V1), P_in2-{F}(V0,V2), P_outs-{F}(V0,V3), zero-{F}(V3) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #182: exists( #64, #180 ), references = 1, size of lhs = 8:
% 282.36/282.55 fulladder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_h2-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_in1-{F}(V3,V4), zero-{F}(V4) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #206: exists( #64, #204 ), references = 1, size of lhs = 8:
% 282.36/282.55 fulladder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_h2-{F}(V0,V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_in1-{F}(V3,V4), zero-{F}(V4) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #248: exists( #65, #246 ), references = 2, size of lhs = 10:
% 282.36/282.55 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_not1-{F}(V0,V2), P_in1-{F}(V2,V3), one-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V1), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), zero-{F}(V6) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #252: disj( #12, input ), references = 13, size of lhs = 11:
% 282.36/282.55 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_and2-{F}(V8,V0), P_not1-{F}(V8,V9) | and_ok-{T}(V0)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #253: disj( #12, input ), references = 3, size of lhs = 15:
% 282.36/282.55 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_not1-{F}(V8,V9), P_and2-{F}(V8,V10), P_and1-{F}(V8,V11), P_h1-{F}(V1,V12), P_not1-{F}(V12,V0), P_or1-{F}(V12,V13) | and_ok-{T}(V0)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #254: disj( #12, input ), references = 18, size of lhs = 17:
% 282.36/282.55 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_not1-{F}(V8,V9), P_and2-{F}(V8,V10), P_and1-{F}(V8,V11), P_h1-{F}(V1,V12), P_and1-{F}(V12,V0), P_or1-{F}(V12,V13), P_not1-{F}(V12,V14), P_and2-{F}(V12,V15) | and_ok-{T}(V0)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #266: exists( #64, #264 ), references = 1, size of lhs = 8:
% 282.36/282.55 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_in1-{F}(V3,V4), one-{F}(V4) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #276: disj( #12, input ), references = 35, size of lhs = 16:
% 282.36/282.55 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_not1-{F}(V8,V9), P_and2-{F}(V8,V10), P_and1-{F}(V8,V11), P_h1-{F}(V1,V12), P_and2-{F}(V12,V0), P_or1-{F}(V12,V13), P_not1-{F}(V12,V14) | and_ok-{T}(V0)
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #288: exists( #65, #286 ), references = 1, size of lhs = 8:
% 282.36/282.55 halfadder-{F}(V0), P_and2-{F}(V0,V1), and_ok-{F}(V1), P_not1-{F}(V0,V2), P_in1-{F}(V2,V3), one-{F}(V3), P_in1-{F}(V1,V4), zero-{F}(V4) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #292: exists( #64, #290 ), references = 1, size of lhs = 10:
% 282.36/282.55 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), P_in1-{F}(V4,V5), one-{F}(V5) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #295: exists( #69, #293 ), references = 1, size of lhs = 24:
% 282.36/282.55 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_and2-{F}(V8,V9), P_and1-{F}(V8,V10), P_h1-{F}(V1,V11), P_and2-{F}(V11,V0), P_or1-{F}(V11,V12), P_not1-{F}(V11,V13), halfadder-{F}(V14), P_and2-{F}(V14,V0), P_in1-{F}(V14,V15), zero-{F}(V15), halfadder-{F}(V16), P_and2-{F}(V16,V0), P_not1-{F}(V16,V17), P_in1-{F}(V17,V18), one-{F}(V18) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #297: exists( #68, #294 ), references = 2, size of lhs = 23:
% 282.36/282.55 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_and1-{F}(V8,V9), P_h1-{F}(V1,V10), P_and2-{F}(V10,V0), P_or1-{F}(V10,V11), P_not1-{F}(V10,V12), halfadder-{F}(V13), P_and2-{F}(V13,V0), P_in1-{F}(V13,V14), zero-{F}(V14), halfadder-{F}(V15), P_and2-{F}(V15,V0), P_not1-{F}(V15,V16), P_in1-{F}(V16,V17), one-{F}(V17) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #299: exists( #67, #296 ), references = 4, size of lhs = 22:
% 282.36/282.55 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_h1-{F}(V1,V9), P_and2-{F}(V9,V0), P_or1-{F}(V9,V10), P_not1-{F}(V9,V11), halfadder-{F}(V12), P_and2-{F}(V12,V0), P_in1-{F}(V12,V13), zero-{F}(V13), halfadder-{F}(V14), P_and2-{F}(V14,V0), P_not1-{F}(V14,V15), P_in1-{F}(V15,V16), one-{F}(V16) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #301: exists( #70, #298 ), references = 6, size of lhs = 21:
% 282.36/282.55 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_h1-{F}(V1,V9), P_and2-{F}(V9,V0), P_not1-{F}(V9,V10), halfadder-{F}(V11), P_and2-{F}(V11,V0), P_in1-{F}(V11,V12), zero-{F}(V12), halfadder-{F}(V13), P_and2-{F}(V13,V0), P_not1-{F}(V13,V14), P_in1-{F}(V14,V15), one-{F}(V15) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #316: exists( #69, #58 ), references = 1, size of lhs = 10:
% 282.36/282.55 P_f-{F}(V0), P_in1-{F}(V0,V1), P_in2-{F}(V0,V2), P_inc-{F}(V0,V3), P_outs-{F}(V0,V4), P_outc-{F}(V0,V5), P_or1-{F}(V0,V6), P_h2-{F}(V0,V7), P_and2-{F}(V7,V8), abnormal-{F}(V8) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #317: exists( #69, #61 ), references = 1, size of lhs = 14:
% 282.36/282.55 P_f-{F}(V0), P_in1-{F}(V0,V1), P_in2-{F}(V0,V2), P_inc-{F}(V0,V3), P_outs-{F}(V0,V4), P_outc-{F}(V0,V5), P_or1-{F}(V0,V6), P_h2-{F}(V0,V7), P_and2-{F}(V7,V8), P_and1-{F}(V7,V9), P_h1-{F}(V0,V10), P_or1-{F}(V10,V11), P_not1-{F}(V10,V12), abnormal-{F}(V12) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #319: exists( #68, #315 ), references = 1, size of lhs = 13:
% 282.36/282.55 P_f-{F}(V0), P_in1-{F}(V0,V1), P_in2-{F}(V0,V2), P_inc-{F}(V0,V3), P_outs-{F}(V0,V4), P_outc-{F}(V0,V5), P_or1-{F}(V0,V6), P_h2-{F}(V0,V7), P_and1-{F}(V7,V8), P_h1-{F}(V0,V9), P_or1-{F}(V9,V10), P_not1-{F}(V9,V11), abnormal-{F}(V11) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #321: exists( #67, #318 ), references = 1, size of lhs = 12:
% 282.36/282.55 P_f-{F}(V0), P_in1-{F}(V0,V1), P_in2-{F}(V0,V2), P_inc-{F}(V0,V3), P_outs-{F}(V0,V4), P_outc-{F}(V0,V5), P_or1-{F}(V0,V6), P_h2-{F}(V0,V7), P_h1-{F}(V0,V8), P_or1-{F}(V8,V9), P_not1-{F}(V8,V10), abnormal-{F}(V10) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #323: exists( #70, #320 ), references = 1, size of lhs = 11:
% 282.36/282.55 P_f-{F}(V0), P_in1-{F}(V0,V1), P_in2-{F}(V0,V2), P_inc-{F}(V0,V3), P_outs-{F}(V0,V4), P_outc-{F}(V0,V5), P_or1-{F}(V0,V6), P_h2-{F}(V0,V7), P_h1-{F}(V0,V8), P_not1-{F}(V8,V9), abnormal-{F}(V9) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #353: exists( #64, #347 ), references = 1, size of lhs = 23:
% 282.36/282.55 halfadder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), logic_and-{F}(V3), P_f-{F}(V4), P_in1-{F}(V4,V5), P_in2-{F}(V4,V6), P_inc-{F}(V4,V7), P_outs-{F}(V4,V8), P_outc-{F}(V4,V9), P_or1-{F}(V4,V10), P_h2-{F}(V4,V11), P_h1-{F}(V4,V12), P_and2-{F}(V12,V3), P_not1-{F}(V12,V13), halfadder-{F}(V14), P_and2-{F}(V14,V3), P_in1-{F}(V14,V15), zero-{F}(V15), halfadder-{F}(V16), P_and2-{F}(V16,V3), P_not1-{F}(V16,V2) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #354: exists( #64, #348 ), references = 1, size of lhs = 12:
% 282.36/282.55 halfadder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and2-{F}(V3,V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), zero-{F}(V7) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #355: exists( #64, #349 ), references = 1, size of lhs = 24:
% 282.36/282.55 halfadder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), logic_and-{F}(V3), P_f-{F}(V4), P_in1-{F}(V4,V5), P_in2-{F}(V4,V6), P_inc-{F}(V4,V7), P_outs-{F}(V4,V8), P_outc-{F}(V4,V9), P_or1-{F}(V4,V10), P_h2-{F}(V4,V11), P_h1-{F}(V4,V12), P_and2-{F}(V12,V3), P_or1-{F}(V12,V13), P_not1-{F}(V12,V14), halfadder-{F}(V15), P_and2-{F}(V15,V3), P_in1-{F}(V15,V16), zero-{F}(V16), halfadder-{F}(V17), P_and2-{F}(V17,V3), P_not1-{F}(V17,V2) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #365: exists( #69, #359 ), references = 2, size of lhs = 14:
% 282.36/282.55 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_and2-{F}(V8,V0), P_out1-{F}(V0,V9), one-{F}(V9), P_in2-{F}(V0,V10), zero-{F}(V10) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #371: mergings( V3 == V12, V4 == V13, V5 == V14, V7 == V15, V8 == V11; #363 ), references = 3, size of lhs = 13:
% 282.36/282.55 logic_and-{F}(V0), P_out1-{F}(V0,V1), one-{F}(V1), P_in2-{F}(V0,V2), P_f-{F}(V3), P_outc-{F}(V3,V2), P_inc-{F}(V3,V4), P_or1-{F}(V3,V5), P_h2-{F}(V3,V6), P_and2-{F}(V6,V0), P_in1-{F}(V3,V7), P_in2-{F}(V3,V8), P_outs-{F}(V3,V9) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #376: mergings( V3 == V12, V4 == V14, V5 == V15, V9 == V13; #364 ), references = 1, size of lhs = 15:
% 282.36/282.55 logic_and-{F}(V0), P_out1-{F}(V0,V1), one-{F}(V1), P_in2-{F}(V0,V2), fulladder-{F}(V3), P_f-{F}(V3), P_inc-{F}(V3,V4), P_outs-{F}(V3,V5), P_outc-{F}(V3,V6), P_h2-{F}(V3,V7), P_and2-{F}(V7,V0), P_or1-{F}(V3,V8), P_out1-{F}(V8,V2), P_in1-{F}(V3,V9), P_in2-{F}(V3,V10) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #403: exists( #65, #401 ), references = 2, size of lhs = 9:
% 282.36/282.55 halfadder-{F}(V0), P_not1-{F}(V0,V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), zero-{F}(V3), halfadder-{F}(V4), P_and2-{F}(V4,V1), P_outc-{F}(V4,V5), one-{F}(V5) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #407: exists( #72, #405 ), references = 2, size of lhs = 12:
% 282.36/282.55 fulladder-{F}(V0), P_h1-{F}(V0,V1), halfadder-{F}(V1), P_or1-{F}(V0,V2), P_in2-{F}(V2,V3), one-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V5), P_and2-{F}(V1,V5), P_and1-{F}(V4,V6), P_in2-{F}(V6,V7), zero-{F}(V7) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #458: exists( #71, #456 ), references = 5, size of lhs = 8:
% 282.36/282.55 fulladder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_h2-{F}(V0,V2), halfadder-{F}(V2), P_and1-{F}(V2,V3), P_out1-{F}(V3,V4), zero-{F}(V4) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #493: exists( #65, #491 ), references = 2, size of lhs = 7:
% 282.36/282.55 halfadder-{F}(V0), P_outc-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), P_in1-{F}(V2,V3), zero-{F}(V3) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #497: exists( #64, #495 ), references = 2, size of lhs = 9:
% 282.36/282.55 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_outc-{F}(V3,V4), one-{F}(V4) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #500: exists( #69, #498 ), references = 1, size of lhs = 23:
% 282.36/282.55 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_and2-{F}(V8,V9), P_and1-{F}(V8,V10), P_h1-{F}(V1,V11), P_and2-{F}(V11,V0), P_or1-{F}(V11,V12), P_not1-{F}(V11,V13), halfadder-{F}(V14), P_and2-{F}(V14,V0), P_in1-{F}(V14,V15), zero-{F}(V15), halfadder-{F}(V16), P_and2-{F}(V16,V0), P_outc-{F}(V16,V17), one-{F}(V17) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #502: exists( #68, #499 ), references = 2, size of lhs = 22:
% 282.36/282.55 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_and1-{F}(V8,V9), P_h1-{F}(V1,V10), P_and2-{F}(V10,V0), P_or1-{F}(V10,V11), P_not1-{F}(V10,V12), halfadder-{F}(V13), P_and2-{F}(V13,V0), P_in1-{F}(V13,V14), zero-{F}(V14), halfadder-{F}(V15), P_and2-{F}(V15,V0), P_outc-{F}(V15,V16), one-{F}(V16) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #504: exists( #67, #501 ), references = 3, size of lhs = 21:
% 282.36/282.55 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_h1-{F}(V1,V9), P_and2-{F}(V9,V0), P_or1-{F}(V9,V10), P_not1-{F}(V9,V11), halfadder-{F}(V12), P_and2-{F}(V12,V0), P_in1-{F}(V12,V13), zero-{F}(V13), halfadder-{F}(V14), P_and2-{F}(V14,V0), P_outc-{F}(V14,V15), one-{F}(V15) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #514: exists( #72, #512 ), references = 1, size of lhs = 24:
% 282.36/282.55 fulladder-{F}(V0), P_h1-{F}(V0,V1), halfadder-{F}(V1), P_or1-{F}(V0,V2), P_in2-{F}(V2,V3), one-{F}(V3), logic_and-{F}(V4), P_and2-{F}(V1,V4), P_f-{F}(V5), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), P_h2-{F}(V5,V12), P_h1-{F}(V5,V13), P_and2-{F}(V13,V4), P_or1-{F}(V13,V14), P_not1-{F}(V13,V15), halfadder-{F}(V16), P_and2-{F}(V16,V4), P_in1-{F}(V16,V17), zero-{F}(V17) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #516: exists( #70, #513 ), references = 1, size of lhs = 23:
% 282.36/282.55 fulladder-{F}(V0), P_h1-{F}(V0,V1), halfadder-{F}(V1), P_or1-{F}(V0,V2), P_in2-{F}(V2,V3), one-{F}(V3), logic_and-{F}(V4), P_and2-{F}(V1,V4), P_f-{F}(V5), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), P_h2-{F}(V5,V12), P_h1-{F}(V5,V13), P_and2-{F}(V13,V4), P_not1-{F}(V13,V14), halfadder-{F}(V15), P_and2-{F}(V15,V4), P_in1-{F}(V15,V16), zero-{F}(V16) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #518: exists( #69, #515 ), references = 8, size of lhs = 22:
% 282.36/282.55 fulladder-{F}(V0), P_h1-{F}(V0,V1), halfadder-{F}(V1), P_or1-{F}(V0,V2), P_in2-{F}(V2,V3), one-{F}(V3), logic_and-{F}(V4), P_and2-{F}(V1,V4), P_f-{F}(V5), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), P_h2-{F}(V5,V12), P_h1-{F}(V5,V13), P_and2-{F}(V13,V4), halfadder-{F}(V14), P_and2-{F}(V14,V4), P_in1-{F}(V14,V15), zero-{F}(V15) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #521: exists( #68, #519 ), references = 11, size of lhs = 17:
% 282.36/282.55 fulladder-{F}(V0), P_h1-{F}(V0,V1), halfadder-{F}(V1), P_or1-{F}(V0,V2), P_in2-{F}(V2,V3), one-{F}(V3), P_f-{F}(V4), P_h1-{F}(V4,V1), P_in1-{F}(V4,V5), P_in2-{F}(V4,V6), P_inc-{F}(V4,V7), P_outs-{F}(V4,V8), P_outc-{F}(V4,V9), P_or1-{F}(V4,V10), P_h2-{F}(V4,V11), P_in1-{F}(V1,V12), zero-{F}(V12) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #531: mergings( V2 == V4, V0 == V5; #528 ), references = 2, size of lhs = 17:
% 282.36/282.55 one-{F}(V0), fulladder-{F}(V1), P_inc-{F}(V1,V0), P_or1-{F}(V1,V2), P_h1-{F}(V1,V2), halfadder-{F}(V2), P_f-{F}(V3), P_h1-{F}(V3,V2), P_in1-{F}(V3,V4), P_in2-{F}(V3,V5), P_inc-{F}(V3,V6), P_outs-{F}(V3,V7), P_outc-{F}(V3,V8), P_or1-{F}(V3,V9), P_h2-{F}(V3,V10), P_in1-{F}(V2,V11), zero-{F}(V11) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #536: mergings( V2 == V5; #534 ), references = 1, size of lhs = 17:
% 282.36/282.55 zero-{F}(V0), halfadder-{F}(V1), one-{F}(V2), fulladder-{F}(V3), P_in2-{F}(V3,V0), P_inc-{F}(V3,V2), P_or1-{F}(V3,V1), P_h1-{F}(V3,V1), P_f-{F}(V4), P_h1-{F}(V4,V1), P_in1-{F}(V4,V5), P_in2-{F}(V4,V6), P_inc-{F}(V4,V7), P_outs-{F}(V4,V8), P_outc-{F}(V4,V9), P_or1-{F}(V4,V10), P_h2-{F}(V4,V11) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #544: mergings( V4 == V0, V2 == V7, V5 == V3, V3 == V8, V6 == V11; #538 ), references = 1, size of lhs = 11:
% 282.36/282.55 zero-{F}(V0), halfadder-{F}(V1), fulladder-{F}(V2), P_f-{F}(V2), P_h1-{F}(V2,V1), P_in2-{F}(V2,V0), P_or1-{F}(V2,V1), P_in1-{F}(V2,V3), P_outs-{F}(V2,V4), P_outc-{F}(V2,V5), P_h2-{F}(V2,V6) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #551: mergings( V2 == V0, V5 == V7, V3 == V6, V6 == V8, V4 == V11; #545 ), references = 1, size of lhs = 10:
% 282.36/282.55 zero-{F}(V0), halfadder-{F}(V1), fulladder-{F}(V2), P_f-{F}(V2), P_h1-{F}(V2,V1), P_in2-{F}(V2,V0), P_or1-{F}(V2,V1), P_in1-{F}(V2,V3), P_outs-{F}(V2,V4), P_outc-{F}(V2,V5) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #560: exists( #65, #556 ), references = 3, size of lhs = 8:
% 282.36/282.55 or_ok-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), fulladder-{F}(V2), P_f-{F}(V2), P_or1-{F}(V2,V0), P_in1-{F}(V2,V3), P_in2-{F}(V2,V4) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #561: exists( #65, #557 ), references = 3, size of lhs = 9:
% 282.36/282.55 or_ok-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), fulladder-{F}(V2), P_f-{F}(V2), P_or1-{F}(V2,V0), P_in1-{F}(V2,V3), P_in2-{F}(V2,V4), P_outs-{F}(V2,V5) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #583: mergings( V2 == V4; #581 ), references = 1, size of lhs = 7:
% 282.36/282.55 zero-{F}(V0), fulladder-{F}(V1), P_in2-{F}(V1,V0), P_h1-{F}(V1,V2), P_h2-{F}(V1,V2), P_in1-{F}(V1,V3), one-{F}(V3) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #613: mergings( V2 == V4; #609 ), references = 9, size of lhs = 17:
% 282.36/282.55 zero-{F}(V0), halfadder-{F}(V1), fulladder-{F}(V2), P_in2-{F}(V2,V0), P_h1-{F}(V2,V1), P_or1-{F}(V2,V3), P_in2-{F}(V3,V4), one-{F}(V4), P_f-{F}(V5), P_h1-{F}(V5,V1), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), P_h2-{F}(V5,V12) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #648: exists( #70, #642 ), references = 1, size of lhs = 20:
% 282.36/282.55 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_not1-{F}(V8,V9), P_and2-{F}(V8,V10), P_and1-{F}(V8,V11), P_h1-{F}(V1,V12), P_and1-{F}(V12,V0), P_not1-{F}(V12,V13), P_and2-{F}(V12,V14), P_out1-{F}(V0,V15), one-{F}(V15), P_in2-{F}(V0,V16), zero-{F}(V16) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #654: mergings( V3 == V18, V4 == V19, V5 == V20, V7 == V21, V8 == V17; #646 ), references = 1, size of lhs = 19:
% 282.36/282.55 logic_and-{F}(V0), P_out1-{F}(V0,V1), one-{F}(V1), P_in2-{F}(V0,V2), P_f-{F}(V3), P_outc-{F}(V3,V2), P_inc-{F}(V3,V4), P_or1-{F}(V3,V5), P_h2-{F}(V3,V6), P_not1-{F}(V6,V7), P_and2-{F}(V6,V8), P_and1-{F}(V6,V9), P_h1-{F}(V3,V10), P_and1-{F}(V10,V0), P_not1-{F}(V10,V11), P_and2-{F}(V10,V12), P_in1-{F}(V3,V13), P_in2-{F}(V3,V14), P_outs-{F}(V3,V15) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #655: exists( #70, #644 ), references = 1, size of lhs = 30:
% 282.36/282.55 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_not1-{F}(V8,V9), P_and2-{F}(V8,V10), P_and1-{F}(V8,V11), P_h1-{F}(V1,V12), P_and1-{F}(V12,V0), P_not1-{F}(V12,V13), P_and2-{F}(V12,V14), P_out1-{F}(V0,V15), one-{F}(V15), P_in2-{F}(V0,V16), fulladder-{F}(V17), P_h1-{F}(V17,V18), halfadder-{F}(V18), P_or1-{F}(V17,V19), P_in2-{F}(V19,V16), halfadder-{F}(V20), P_not1-{F}(V20,V21), P_and2-{F}(V18,V21), P_and1-{F}(V20,V22), P_in2-{F}(V22,V23), zero-{F}(V23) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #658: exists( #69, #645 ), references = 1, size of lhs = 19:
% 282.36/282.55 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_not1-{F}(V8,V9), P_and2-{F}(V8,V10), P_and1-{F}(V8,V11), P_h1-{F}(V1,V12), P_and1-{F}(V12,V0), P_and2-{F}(V12,V13), P_out1-{F}(V0,V14), one-{F}(V14), P_in2-{F}(V0,V15), zero-{F}(V15) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #664: mergings( V3 == V17, V4 == V18, V5 == V19, V7 == V20, V8 == V16; #657 ), references = 1, size of lhs = 18:
% 282.36/282.55 logic_and-{F}(V0), P_out1-{F}(V0,V1), one-{F}(V1), P_in2-{F}(V0,V2), P_f-{F}(V3), P_outc-{F}(V3,V2), P_inc-{F}(V3,V4), P_or1-{F}(V3,V5), P_h2-{F}(V3,V6), P_not1-{F}(V6,V7), P_and2-{F}(V6,V8), P_and1-{F}(V6,V9), P_h1-{F}(V3,V10), P_and1-{F}(V10,V0), P_and2-{F}(V10,V11), P_in1-{F}(V3,V12), P_in2-{F}(V3,V13), P_outs-{F}(V3,V14) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #667: exists( #68, #656 ), references = 1, size of lhs = 18:
% 282.36/282.55 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_not1-{F}(V8,V9), P_and2-{F}(V8,V10), P_and1-{F}(V8,V11), P_h1-{F}(V1,V12), P_and1-{F}(V12,V0), P_out1-{F}(V0,V13), one-{F}(V13), P_in2-{F}(V0,V14), zero-{F}(V14) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #673: mergings( V3 == V16, V4 == V17, V5 == V18, V7 == V19, V8 == V15; #666 ), references = 1, size of lhs = 17:
% 282.36/282.55 logic_and-{F}(V0), P_out1-{F}(V0,V1), one-{F}(V1), P_in2-{F}(V0,V2), P_f-{F}(V3), P_outc-{F}(V3,V2), P_inc-{F}(V3,V4), P_or1-{F}(V3,V5), P_h2-{F}(V3,V6), P_not1-{F}(V6,V7), P_and2-{F}(V6,V8), P_and1-{F}(V6,V9), P_h1-{F}(V3,V10), P_and1-{F}(V10,V0), P_in1-{F}(V3,V11), P_in2-{F}(V3,V12), P_outs-{F}(V3,V13) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #703: exists( #70, #697 ), references = 2, size of lhs = 19:
% 282.36/282.55 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_not1-{F}(V8,V9), P_and2-{F}(V8,V10), P_and1-{F}(V8,V11), P_h1-{F}(V1,V12), P_and2-{F}(V12,V0), P_not1-{F}(V12,V13), P_out1-{F}(V0,V14), one-{F}(V14), P_in1-{F}(V0,V15), zero-{F}(V15) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #708: mergings( V3 == V17, V4 == V18, V5 == V19, V7 == V16; #701 ), references = 1, size of lhs = 18:
% 282.36/282.55 logic_and-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_out1-{F}(V0,V2), P_f-{F}(V3), P_outs-{F}(V3,V2), P_inc-{F}(V3,V4), P_outc-{F}(V3,V5), P_or1-{F}(V3,V6), P_h2-{F}(V3,V7), P_not1-{F}(V7,V8), P_and2-{F}(V7,V9), P_and1-{F}(V7,V10), P_h1-{F}(V3,V11), P_and2-{F}(V11,V0), P_not1-{F}(V11,V12), P_in1-{F}(V3,V13), P_in2-{F}(V3,V14) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #714: mergings( V3 == V17, V4 == V18, V5 == V19, V7 == V20, V8 == V16; #702 ), references = 2, size of lhs = 18:
% 282.36/282.55 logic_and-{F}(V0), P_out1-{F}(V0,V1), one-{F}(V1), P_in1-{F}(V0,V2), P_f-{F}(V3), P_outc-{F}(V3,V2), P_inc-{F}(V3,V4), P_or1-{F}(V3,V5), P_h2-{F}(V3,V6), P_not1-{F}(V6,V7), P_and2-{F}(V6,V8), P_and1-{F}(V6,V9), P_h1-{F}(V3,V10), P_and2-{F}(V10,V0), P_not1-{F}(V10,V11), P_in1-{F}(V3,V12), P_in2-{F}(V3,V13), P_outs-{F}(V3,V14) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #718: exists( #69, #700 ), references = 3, size of lhs = 18:
% 282.36/282.55 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_not1-{F}(V8,V9), P_and2-{F}(V8,V10), P_and1-{F}(V8,V11), P_h1-{F}(V1,V12), P_and2-{F}(V12,V0), P_out1-{F}(V0,V13), one-{F}(V13), P_in1-{F}(V0,V14), zero-{F}(V14) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #723: mergings( V3 == V16, V4 == V17, V5 == V18, V7 == V15; #716 ), references = 1, size of lhs = 17:
% 282.36/282.55 logic_and-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_out1-{F}(V0,V2), P_f-{F}(V3), P_outs-{F}(V3,V2), P_inc-{F}(V3,V4), P_outc-{F}(V3,V5), P_or1-{F}(V3,V6), P_h2-{F}(V3,V7), P_not1-{F}(V7,V8), P_and2-{F}(V7,V9), P_and1-{F}(V7,V10), P_h1-{F}(V3,V11), P_and2-{F}(V11,V0), P_in1-{F}(V3,V12), P_in2-{F}(V3,V13) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #729: mergings( V3 == V16, V4 == V17, V5 == V18, V7 == V19, V8 == V15; #717 ), references = 2, size of lhs = 17:
% 282.36/282.55 logic_and-{F}(V0), P_out1-{F}(V0,V1), one-{F}(V1), P_in1-{F}(V0,V2), P_f-{F}(V3), P_outc-{F}(V3,V2), P_inc-{F}(V3,V4), P_or1-{F}(V3,V5), P_h2-{F}(V3,V6), P_not1-{F}(V6,V7), P_and2-{F}(V6,V8), P_and1-{F}(V6,V9), P_h1-{F}(V3,V10), P_and2-{F}(V10,V0), P_in1-{F}(V3,V11), P_in2-{F}(V3,V12), P_outs-{F}(V3,V13) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #745: exists( #70, #739 ), references = 1, size of lhs = 20:
% 282.36/282.55 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_not1-{F}(V8,V9), P_and2-{F}(V8,V10), P_and1-{F}(V8,V11), P_h1-{F}(V1,V12), P_and1-{F}(V12,V0), P_not1-{F}(V12,V13), P_and2-{F}(V12,V14), P_out1-{F}(V0,V15), one-{F}(V15), P_in1-{F}(V0,V16), zero-{F}(V16) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #750: mergings( V3 == V18, V4 == V19, V5 == V20, V7 == V17; #743 ), references = 1, size of lhs = 19:
% 282.36/282.55 logic_and-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_out1-{F}(V0,V2), P_f-{F}(V3), P_outs-{F}(V3,V2), P_inc-{F}(V3,V4), P_outc-{F}(V3,V5), P_or1-{F}(V3,V6), P_h2-{F}(V3,V7), P_not1-{F}(V7,V8), P_and2-{F}(V7,V9), P_and1-{F}(V7,V10), P_h1-{F}(V3,V11), P_and1-{F}(V11,V0), P_not1-{F}(V11,V12), P_and2-{F}(V11,V13), P_in1-{F}(V3,V14), P_in2-{F}(V3,V15) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #756: mergings( V3 == V18, V4 == V19, V5 == V20, V7 == V21, V8 == V17; #744 ), references = 1, size of lhs = 19:
% 282.36/282.55 logic_and-{F}(V0), P_out1-{F}(V0,V1), one-{F}(V1), P_in1-{F}(V0,V2), P_f-{F}(V3), P_outc-{F}(V3,V2), P_inc-{F}(V3,V4), P_or1-{F}(V3,V5), P_h2-{F}(V3,V6), P_not1-{F}(V6,V7), P_and2-{F}(V6,V8), P_and1-{F}(V6,V9), P_h1-{F}(V3,V10), P_and1-{F}(V10,V0), P_not1-{F}(V10,V11), P_and2-{F}(V10,V12), P_in1-{F}(V3,V13), P_in2-{F}(V3,V14), P_outs-{F}(V3,V15) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #760: exists( #69, #742 ), references = 1, size of lhs = 19:
% 282.36/282.55 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_not1-{F}(V8,V9), P_and2-{F}(V8,V10), P_and1-{F}(V8,V11), P_h1-{F}(V1,V12), P_and1-{F}(V12,V0), P_and2-{F}(V12,V13), P_out1-{F}(V0,V14), one-{F}(V14), P_in1-{F}(V0,V15), zero-{F}(V15) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #765: mergings( V3 == V17, V4 == V18, V5 == V19, V7 == V16; #758 ), references = 1, size of lhs = 18:
% 282.36/282.55 logic_and-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_out1-{F}(V0,V2), P_f-{F}(V3), P_outs-{F}(V3,V2), P_inc-{F}(V3,V4), P_outc-{F}(V3,V5), P_or1-{F}(V3,V6), P_h2-{F}(V3,V7), P_not1-{F}(V7,V8), P_and2-{F}(V7,V9), P_and1-{F}(V7,V10), P_h1-{F}(V3,V11), P_and1-{F}(V11,V0), P_and2-{F}(V11,V12), P_in1-{F}(V3,V13), P_in2-{F}(V3,V14) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #771: mergings( V3 == V17, V4 == V18, V5 == V19, V7 == V20, V8 == V16; #759 ), references = 1, size of lhs = 18:
% 282.36/282.55 logic_and-{F}(V0), P_out1-{F}(V0,V1), one-{F}(V1), P_in1-{F}(V0,V2), P_f-{F}(V3), P_outc-{F}(V3,V2), P_inc-{F}(V3,V4), P_or1-{F}(V3,V5), P_h2-{F}(V3,V6), P_not1-{F}(V6,V7), P_and2-{F}(V6,V8), P_and1-{F}(V6,V9), P_h1-{F}(V3,V10), P_and1-{F}(V10,V0), P_and2-{F}(V10,V11), P_in1-{F}(V3,V12), P_in2-{F}(V3,V13), P_outs-{F}(V3,V14) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #775: exists( #68, #757 ), references = 1, size of lhs = 18:
% 282.36/282.55 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_not1-{F}(V8,V9), P_and2-{F}(V8,V10), P_and1-{F}(V8,V11), P_h1-{F}(V1,V12), P_and1-{F}(V12,V0), P_out1-{F}(V0,V13), one-{F}(V13), P_in1-{F}(V0,V14), zero-{F}(V14) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #780: mergings( V3 == V16, V4 == V17, V5 == V18, V7 == V15; #773 ), references = 1, size of lhs = 17:
% 282.36/282.55 logic_and-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_out1-{F}(V0,V2), P_f-{F}(V3), P_outs-{F}(V3,V2), P_inc-{F}(V3,V4), P_outc-{F}(V3,V5), P_or1-{F}(V3,V6), P_h2-{F}(V3,V7), P_not1-{F}(V7,V8), P_and2-{F}(V7,V9), P_and1-{F}(V7,V10), P_h1-{F}(V3,V11), P_and1-{F}(V11,V0), P_in1-{F}(V3,V12), P_in2-{F}(V3,V13) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #786: mergings( V3 == V16, V4 == V17, V5 == V18, V7 == V19, V8 == V15; #774 ), references = 1, size of lhs = 17:
% 282.36/282.55 logic_and-{F}(V0), P_out1-{F}(V0,V1), one-{F}(V1), P_in1-{F}(V0,V2), P_f-{F}(V3), P_outc-{F}(V3,V2), P_inc-{F}(V3,V4), P_or1-{F}(V3,V5), P_h2-{F}(V3,V6), P_not1-{F}(V6,V7), P_and2-{F}(V6,V8), P_and1-{F}(V6,V9), P_h1-{F}(V3,V10), P_and1-{F}(V10,V0), P_in1-{F}(V3,V11), P_in2-{F}(V3,V12), P_outs-{F}(V3,V13) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #822: exists( #66, #816 ), references = 2, size of lhs = 16:
% 282.36/282.55 halfadder-{F}(V0), P_in2-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), logic_and-{F}(V2), P_f-{F}(V3), P_in1-{F}(V3,V4), P_in2-{F}(V3,V5), P_inc-{F}(V3,V6), P_outs-{F}(V3,V7), P_outc-{F}(V3,V8), P_or1-{F}(V3,V9), P_h2-{F}(V3,V10), P_and2-{F}(V10,V2), P_out1-{F}(V2,V11), one-{F}(V11) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #823: exists( #66, #817 ), references = 2, size of lhs = 7:
% 282.36/282.55 halfadder-{F}(V0), P_in2-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), P_out1-{F}(V2,V3), one-{F}(V3) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #824: exists( #66, #818 ), references = 2, size of lhs = 11:
% 282.36/282.55 halfadder-{F}(V0), P_in2-{F}(V0,V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), P_out1-{F}(V2,V3), one-{F}(V3), P_f-{F}(V4), P_outc-{F}(V4,V1), P_in1-{F}(V4,V5), P_in2-{F}(V4,V6), P_outs-{F}(V4,V7) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #834: exists( #65, #828 ), references = 6, size of lhs = 18:
% 282.36/282.55 halfadder-{F}(V0), P_outc-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), logic_and-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_in2-{F}(V3,V4), zero-{F}(V4), P_f-{F}(V5), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), P_h2-{F}(V5,V12), P_and2-{F}(V12,V2) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #835: exists( #65, #829 ), references = 2, size of lhs = 9:
% 282.36/282.55 halfadder-{F}(V0), P_outc-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_in2-{F}(V3,V4), zero-{F}(V4) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #836: exists( #65, #830 ), references = 1, size of lhs = 13:
% 282.36/282.55 halfadder-{F}(V0), P_outc-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_in2-{F}(V3,V4), P_f-{F}(V5), P_outc-{F}(V5,V4), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_outs-{F}(V5,V8) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #846: exists( #72, #840 ), references = 7, size of lhs = 21:
% 282.36/282.55 fulladder-{F}(V0), P_h2-{F}(V0,V1), halfadder-{F}(V1), P_or1-{F}(V0,V2), P_in1-{F}(V2,V3), one-{F}(V3), P_and2-{F}(V1,V4), logic_and-{F}(V4), halfadder-{F}(V5), P_and2-{F}(V5,V4), P_in2-{F}(V5,V6), zero-{F}(V6), P_f-{F}(V7), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), P_h2-{F}(V7,V14), P_and2-{F}(V14,V4) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #849: exists( #68, #847 ), references = 7, size of lhs = 16:
% 282.36/282.55 fulladder-{F}(V0), P_h2-{F}(V0,V1), halfadder-{F}(V1), P_or1-{F}(V0,V2), P_in1-{F}(V2,V3), one-{F}(V3), P_in2-{F}(V1,V4), zero-{F}(V4), P_f-{F}(V5), P_h2-{F}(V5,V1), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #916: exists( #65, #910 ), references = 1, size of lhs = 23:
% 282.36/282.55 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_not1-{F}(V0,V2), P_in1-{F}(V2,V3), zero-{F}(V3), halfadder-{F}(V4), P_and1-{F}(V4,V1), P_outs-{F}(V4,V5), fulladder-{F}(V6), P_h2-{F}(V6,V7), halfadder-{F}(V7), P_in2-{F}(V7,V5), P_or1-{F}(V6,V8), P_in1-{F}(V8,V9), one-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V7), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #917: exists( #65, #911 ), references = 1, size of lhs = 28:
% 282.36/282.55 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_not1-{F}(V0,V2), P_in1-{F}(V2,V3), zero-{F}(V3), halfadder-{F}(V4), P_and1-{F}(V4,V1), P_outs-{F}(V4,V5), fulladder-{F}(V6), P_h2-{F}(V6,V7), halfadder-{F}(V7), P_or1-{F}(V6,V8), P_in1-{F}(V8,V9), one-{F}(V9), P_and2-{F}(V7,V10), logic_and-{F}(V10), halfadder-{F}(V11), P_and2-{F}(V11,V10), P_in2-{F}(V11,V5), P_f-{F}(V12), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), P_h2-{F}(V12,V19), P_and2-{F}(V19,V10) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #918: exists( #65, #912 ), references = 1, size of lhs = 25:
% 282.36/282.55 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_not1-{F}(V0,V2), P_in1-{F}(V2,V3), zero-{F}(V3), halfadder-{F}(V4), P_and1-{F}(V4,V1), P_outs-{F}(V4,V5), halfadder-{F}(V6), P_outc-{F}(V6,V7), one-{F}(V7), P_and2-{F}(V6,V8), logic_and-{F}(V8), halfadder-{F}(V9), P_and2-{F}(V9,V8), P_in2-{F}(V9,V5), P_f-{F}(V10), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), P_h2-{F}(V10,V17), P_and2-{F}(V17,V8) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #961: exists( #65, #955 ), references = 1, size of lhs = 24:
% 282.36/282.55 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_not1-{F}(V0,V2), P_in1-{F}(V2,V3), zero-{F}(V3), halfadder-{F}(V4), P_and1-{F}(V4,V1), P_outs-{F}(V4,V5), fulladder-{F}(V6), P_h2-{F}(V6,V7), halfadder-{F}(V7), P_in2-{F}(V7,V8), connection-{F}(V5,V8), P_or1-{F}(V6,V9), P_in1-{F}(V9,V10), one-{F}(V10), P_f-{F}(V11), P_h2-{F}(V11,V7), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #962: exists( #65, #956 ), references = 1, size of lhs = 29:
% 282.36/282.55 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_not1-{F}(V0,V2), P_in1-{F}(V2,V3), zero-{F}(V3), halfadder-{F}(V4), P_and1-{F}(V4,V1), P_outs-{F}(V4,V5), fulladder-{F}(V6), P_h2-{F}(V6,V7), halfadder-{F}(V7), P_or1-{F}(V6,V8), P_in1-{F}(V8,V9), one-{F}(V9), P_and2-{F}(V7,V10), logic_and-{F}(V10), halfadder-{F}(V11), P_and2-{F}(V11,V10), P_in2-{F}(V11,V12), connection-{F}(V5,V12), P_f-{F}(V13), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15), P_inc-{F}(V13,V16), P_outs-{F}(V13,V17), P_outc-{F}(V13,V18), P_or1-{F}(V13,V19), P_h2-{F}(V13,V20), P_and2-{F}(V20,V10) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #963: exists( #65, #957 ), references = 1, size of lhs = 26:
% 282.36/282.55 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_not1-{F}(V0,V2), P_in1-{F}(V2,V3), zero-{F}(V3), halfadder-{F}(V4), P_and1-{F}(V4,V1), P_outs-{F}(V4,V5), halfadder-{F}(V6), P_outc-{F}(V6,V7), one-{F}(V7), P_and2-{F}(V6,V8), logic_and-{F}(V8), halfadder-{F}(V9), P_and2-{F}(V9,V8), P_in2-{F}(V9,V10), connection-{F}(V5,V10), P_f-{F}(V11), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), P_h2-{F}(V11,V18), P_and2-{F}(V18,V8) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #972: mergings( V2 == V9, V3 == V10; #967 ), references = 2, size of lhs = 23:
% 282.36/282.55 halfadder-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V2), P_and1-{F}(V0,V2), P_not1-{F}(V1,V3), P_in1-{F}(V3,V4), zero-{F}(V4), fulladder-{F}(V5), P_h1-{F}(V5,V0), P_h2-{F}(V5,V6), halfadder-{F}(V6), P_in2-{F}(V6,V7), P_or1-{F}(V5,V8), P_in1-{F}(V8,V9), one-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V6), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #975: mergings( V2 == V9, V3 == V10; #968 ), references = 2, size of lhs = 29:
% 282.36/282.55 halfadder-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V2), P_and1-{F}(V0,V2), P_not1-{F}(V1,V3), P_in1-{F}(V3,V4), zero-{F}(V4), fulladder-{F}(V5), P_h1-{F}(V5,V0), P_h2-{F}(V5,V6), halfadder-{F}(V6), P_in2-{F}(V6,V7), P_or1-{F}(V5,V8), P_in1-{F}(V8,V9), one-{F}(V9), P_and2-{F}(V6,V10), logic_and-{F}(V10), halfadder-{F}(V11), P_and2-{F}(V11,V10), P_in2-{F}(V11,V7), P_f-{F}(V12), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), P_h2-{F}(V12,V19), P_and2-{F}(V19,V10) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #976: exists( #71, #966 ), references = 2, size of lhs = 28:
% 282.36/282.55 fulladder-{F}(V0), P_h1-{F}(V0,V1), halfadder-{F}(V1), P_h2-{F}(V0,V2), P_in2-{F}(V2,V3), halfadder-{F}(V4), P_and2-{F}(V4,V5), P_and1-{F}(V1,V5), P_not1-{F}(V4,V6), P_in1-{F}(V6,V7), zero-{F}(V7), halfadder-{F}(V8), P_outc-{F}(V8,V9), one-{F}(V9), P_and2-{F}(V8,V10), logic_and-{F}(V10), halfadder-{F}(V11), P_and2-{F}(V11,V10), P_in2-{F}(V11,V3), P_f-{F}(V12), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), P_h2-{F}(V12,V19), P_and2-{F}(V19,V10) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1022: exists( #65, #1016 ), references = 3, size of lhs = 22:
% 282.36/282.55 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), and_ok-{F}(V2), P_in1-{F}(V2,V3), zero-{F}(V3), connection-{F}(V1,V4), fulladder-{F}(V5), P_h2-{F}(V5,V6), halfadder-{F}(V6), P_in2-{F}(V6,V4), P_or1-{F}(V5,V7), P_in1-{F}(V7,V8), one-{F}(V8), P_f-{F}(V9), P_h2-{F}(V9,V6), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1023: exists( #65, #1017 ), references = 3, size of lhs = 27:
% 282.36/282.55 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), and_ok-{F}(V2), P_in1-{F}(V2,V3), zero-{F}(V3), connection-{F}(V1,V4), fulladder-{F}(V5), P_h2-{F}(V5,V6), halfadder-{F}(V6), P_or1-{F}(V5,V7), P_in1-{F}(V7,V8), one-{F}(V8), P_and2-{F}(V6,V9), logic_and-{F}(V9), halfadder-{F}(V10), P_and2-{F}(V10,V9), P_in2-{F}(V10,V4), P_f-{F}(V11), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), P_h2-{F}(V11,V18), P_and2-{F}(V18,V9) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1024: exists( #65, #1018 ), references = 3, size of lhs = 15:
% 282.36/282.55 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), and_ok-{F}(V2), P_in1-{F}(V2,V3), zero-{F}(V3), connection-{F}(V1,V4), halfadder-{F}(V5), P_outc-{F}(V5,V6), one-{F}(V6), P_and2-{F}(V5,V7), and_ok-{F}(V7), halfadder-{F}(V8), P_and2-{F}(V8,V7), P_in2-{F}(V8,V4) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1034: exists( #64, #1028 ), references = 1, size of lhs = 24:
% 282.36/282.55 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_outs-{F}(V3,V4), connection-{F}(V4,V5), fulladder-{F}(V6), P_h2-{F}(V6,V7), halfadder-{F}(V7), P_in2-{F}(V7,V5), P_or1-{F}(V6,V8), P_in1-{F}(V8,V9), one-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V7), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1035: exists( #64, #1029 ), references = 1, size of lhs = 29:
% 282.36/282.55 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_outs-{F}(V3,V4), connection-{F}(V4,V5), fulladder-{F}(V6), P_h2-{F}(V6,V7), halfadder-{F}(V7), P_or1-{F}(V6,V8), P_in1-{F}(V8,V9), one-{F}(V9), P_and2-{F}(V7,V10), logic_and-{F}(V10), halfadder-{F}(V11), P_and2-{F}(V11,V10), P_in2-{F}(V11,V5), P_f-{F}(V12), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), P_h2-{F}(V12,V19), P_and2-{F}(V19,V10) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1036: exists( #64, #1030 ), references = 1, size of lhs = 17:
% 282.36/282.55 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_outs-{F}(V3,V4), connection-{F}(V4,V5), halfadder-{F}(V6), P_outc-{F}(V6,V7), one-{F}(V7), P_and2-{F}(V6,V8), and_ok-{F}(V8), halfadder-{F}(V9), P_and2-{F}(V9,V8), P_in2-{F}(V9,V5) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1045: mergings( V2 == V8, V3 == V9; #1040 ), references = 1, size of lhs = 23:
% 282.36/282.55 halfadder-{F}(V0), halfadder-{F}(V1), P_in1-{F}(V1,V2), zero-{F}(V2), P_and2-{F}(V1,V3), and_ok-{F}(V3), P_and1-{F}(V0,V3), fulladder-{F}(V4), P_h1-{F}(V4,V0), P_h2-{F}(V4,V5), halfadder-{F}(V5), P_in2-{F}(V5,V6), P_or1-{F}(V4,V7), P_in1-{F}(V7,V8), one-{F}(V8), P_f-{F}(V9), P_h2-{F}(V9,V5), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1048: mergings( V2 == V8, V3 == V9; #1041 ), references = 1, size of lhs = 29:
% 282.36/282.55 halfadder-{F}(V0), halfadder-{F}(V1), P_in1-{F}(V1,V2), zero-{F}(V2), P_and2-{F}(V1,V3), and_ok-{F}(V3), P_and1-{F}(V0,V3), fulladder-{F}(V4), P_h1-{F}(V4,V0), P_h2-{F}(V4,V5), halfadder-{F}(V5), P_in2-{F}(V5,V6), P_or1-{F}(V4,V7), P_in1-{F}(V7,V8), one-{F}(V8), P_and2-{F}(V5,V9), logic_and-{F}(V9), halfadder-{F}(V10), P_and2-{F}(V10,V9), P_in2-{F}(V10,V6), P_f-{F}(V11), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), P_h2-{F}(V11,V18), P_and2-{F}(V18,V9) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1049: exists( #71, #1039 ), references = 1, size of lhs = 19:
% 282.36/282.55 fulladder-{F}(V0), P_h1-{F}(V0,V1), halfadder-{F}(V1), P_h2-{F}(V0,V2), P_in2-{F}(V2,V3), halfadder-{F}(V4), P_in1-{F}(V4,V5), zero-{F}(V5), P_and2-{F}(V4,V6), and_ok-{F}(V6), P_and1-{F}(V1,V6), halfadder-{F}(V7), P_outc-{F}(V7,V8), one-{F}(V8), P_and2-{F}(V7,V9), and_ok-{F}(V9), halfadder-{F}(V10), P_and2-{F}(V10,V9), P_in2-{F}(V10,V3) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1066: mergings( V15 == V21, V17 == V22, V3 == V25, V4 == V26, V5 == V27, V9 == V31, V7 == V29, V8 == V30, V10 == V22, V6 == V28; #1053 ), references = 1, size of lhs = 29:
% 282.36/282.55 logic_and-{F}(V0), halfadder-{F}(V1), P_and1-{F}(V1,V0), halfadder-{F}(V2), P_and2-{F}(V2,V0), P_in1-{F}(V2,V3), zero-{F}(V3), fulladder-{F}(V4), P_h1-{F}(V4,V1), P_h2-{F}(V4,V5), halfadder-{F}(V5), P_not1-{F}(V5,V6), P_and2-{F}(V5,V7), P_and1-{F}(V5,V8), P_in2-{F}(V5,V9), P_or1-{F}(V4,V10), P_in1-{F}(V10,V11), one-{F}(V11), P_f-{F}(V12), P_h2-{F}(V12,V5), P_h1-{F}(V12,V13), P_and2-{F}(V13,V0), P_not1-{F}(V13,V14), P_in1-{F}(V12,V15), P_in2-{F}(V12,V16), P_inc-{F}(V12,V17), P_outs-{F}(V12,V18), P_outc-{F}(V12,V19), P_or1-{F}(V12,V20) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1078: mergings( V15 == V21, V17 == V22, V3 == V27, V4 == V28, V5 == V29, V9 == V33, V7 == V31, V8 == V32, V10 == V34, V12 == V25, V6 == V30; #1054 ), references = 1, size of lhs = 34:
% 282.36/282.55 logic_and-{F}(V0), halfadder-{F}(V1), P_and1-{F}(V1,V0), halfadder-{F}(V2), P_and2-{F}(V2,V0), P_in1-{F}(V2,V3), zero-{F}(V3), fulladder-{F}(V4), P_h1-{F}(V4,V1), P_h2-{F}(V4,V5), halfadder-{F}(V5), P_in2-{F}(V5,V6), P_or1-{F}(V4,V7), P_in1-{F}(V7,V8), one-{F}(V8), P_and2-{F}(V5,V9), logic_and-{F}(V9), halfadder-{F}(V10), P_and2-{F}(V10,V9), P_in2-{F}(V10,V6), P_f-{F}(V11), P_h1-{F}(V11,V12), P_and2-{F}(V12,V0), P_not1-{F}(V12,V13), P_in1-{F}(V11,V14), P_in2-{F}(V11,V15), P_inc-{F}(V11,V16), P_outs-{F}(V11,V17), P_outc-{F}(V11,V18), P_or1-{F}(V11,V19), P_h2-{F}(V11,V20), P_and2-{F}(V20,V9), P_not1-{F}(V20,V21), P_and1-{F}(V20,V22) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1079: exists( #70, #1052 ), references = 1, size of lhs = 33:
% 282.36/282.55 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_not1-{F}(V8,V9), P_and2-{F}(V8,V10), P_and1-{F}(V8,V11), P_h1-{F}(V1,V12), P_and2-{F}(V12,V0), P_not1-{F}(V12,V13), fulladder-{F}(V14), P_h1-{F}(V14,V15), halfadder-{F}(V15), P_and1-{F}(V15,V0), P_h2-{F}(V14,V16), P_in2-{F}(V16,V17), halfadder-{F}(V18), P_and2-{F}(V18,V0), P_in1-{F}(V18,V19), zero-{F}(V19), halfadder-{F}(V20), P_outc-{F}(V20,V21), one-{F}(V21), P_and2-{F}(V20,V22), and_ok-{F}(V22), halfadder-{F}(V23), P_and2-{F}(V23,V22), P_in2-{F}(V23,V17) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1093: mergings( V14 == V20, V16 == V21, V3 == V24, V4 == V25, V5 == V26, V9 == V30, V7 == V28, V8 == V29, V10 == V21, V6 == V27; #1080 ), references = 1, size of lhs = 28:
% 282.36/282.55 logic_and-{F}(V0), halfadder-{F}(V1), P_and1-{F}(V1,V0), halfadder-{F}(V2), P_and2-{F}(V2,V0), P_in1-{F}(V2,V3), zero-{F}(V3), fulladder-{F}(V4), P_h1-{F}(V4,V1), P_h2-{F}(V4,V5), halfadder-{F}(V5), P_not1-{F}(V5,V6), P_and2-{F}(V5,V7), P_and1-{F}(V5,V8), P_in2-{F}(V5,V9), P_or1-{F}(V4,V10), P_in1-{F}(V10,V11), one-{F}(V11), P_f-{F}(V12), P_h2-{F}(V12,V5), P_h1-{F}(V12,V13), P_and2-{F}(V13,V0), P_in1-{F}(V12,V14), P_in2-{F}(V12,V15), P_inc-{F}(V12,V16), P_outs-{F}(V12,V17), P_outc-{F}(V12,V18), P_or1-{F}(V12,V19) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1105: mergings( V14 == V20, V16 == V21, V3 == V26, V4 == V27, V5 == V28, V9 == V32, V7 == V30, V8 == V31, V10 == V33, V12 == V24, V6 == V29; #1081 ), references = 1, size of lhs = 33:
% 282.36/282.55 logic_and-{F}(V0), halfadder-{F}(V1), P_and1-{F}(V1,V0), halfadder-{F}(V2), P_and2-{F}(V2,V0), P_in1-{F}(V2,V3), zero-{F}(V3), fulladder-{F}(V4), P_h1-{F}(V4,V1), P_h2-{F}(V4,V5), halfadder-{F}(V5), P_in2-{F}(V5,V6), P_or1-{F}(V4,V7), P_in1-{F}(V7,V8), one-{F}(V8), P_and2-{F}(V5,V9), logic_and-{F}(V9), halfadder-{F}(V10), P_and2-{F}(V10,V9), P_in2-{F}(V10,V6), P_f-{F}(V11), P_h1-{F}(V11,V12), P_and2-{F}(V12,V0), P_in1-{F}(V11,V13), P_in2-{F}(V11,V14), P_inc-{F}(V11,V15), P_outs-{F}(V11,V16), P_outc-{F}(V11,V17), P_or1-{F}(V11,V18), P_h2-{F}(V11,V19), P_and2-{F}(V19,V9), P_not1-{F}(V19,V20), P_and1-{F}(V19,V21) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1106: exists( #69, #1055 ), references = 1, size of lhs = 32:
% 282.36/282.55 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_not1-{F}(V8,V9), P_and2-{F}(V8,V10), P_and1-{F}(V8,V11), P_h1-{F}(V1,V12), P_and2-{F}(V12,V0), fulladder-{F}(V13), P_h1-{F}(V13,V14), halfadder-{F}(V14), P_and1-{F}(V14,V0), P_h2-{F}(V13,V15), P_in2-{F}(V15,V16), halfadder-{F}(V17), P_and2-{F}(V17,V0), P_in1-{F}(V17,V18), zero-{F}(V18), halfadder-{F}(V19), P_outc-{F}(V19,V20), one-{F}(V20), P_and2-{F}(V19,V21), and_ok-{F}(V21), halfadder-{F}(V22), P_and2-{F}(V22,V21), P_in2-{F}(V22,V16) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1154: mergings( V2 == V7, V3 == V9; #1149 ), references = 2, size of lhs = 21:
% 282.36/282.55 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), fulladder-{F}(V3), P_h1-{F}(V3,V0), P_h2-{F}(V3,V4), halfadder-{F}(V4), P_in2-{F}(V4,V5), P_or1-{F}(V3,V6), P_in2-{F}(V6,V5), P_in1-{F}(V6,V7), one-{F}(V7), P_f-{F}(V8), P_h2-{F}(V8,V4), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1157: mergings( V2 == V7, V3 == V9; #1150 ), references = 1, size of lhs = 26:
% 282.36/282.55 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), fulladder-{F}(V3), P_h1-{F}(V3,V0), P_h2-{F}(V3,V4), halfadder-{F}(V4), P_or1-{F}(V3,V5), P_in2-{F}(V5,V6), P_in1-{F}(V5,V7), one-{F}(V7), P_and2-{F}(V4,V8), logic_and-{F}(V8), halfadder-{F}(V9), P_and2-{F}(V9,V8), P_in2-{F}(V9,V6), P_f-{F}(V10), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), P_h2-{F}(V10,V17), P_and2-{F}(V17,V8) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1158: exists( #72, #1148 ), references = 1, size of lhs = 25:
% 282.36/282.55 fulladder-{F}(V0), P_h1-{F}(V0,V1), halfadder-{F}(V1), P_or1-{F}(V0,V2), P_in2-{F}(V2,V3), P_and2-{F}(V1,V4), P_out1-{F}(V4,V5), zero-{F}(V5), halfadder-{F}(V6), P_outc-{F}(V6,V7), one-{F}(V7), P_and2-{F}(V6,V8), logic_and-{F}(V8), halfadder-{F}(V9), P_and2-{F}(V9,V8), P_in2-{F}(V9,V3), P_f-{F}(V10), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), P_h2-{F}(V10,V17), P_and2-{F}(V17,V8) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1192: exists( #64, #1186 ), references = 1, size of lhs = 24:
% 282.36/282.55 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_outs-{F}(V3,V4), connection-{F}(V4,V5), fulladder-{F}(V6), P_h2-{F}(V6,V7), halfadder-{F}(V7), P_in2-{F}(V7,V5), P_or1-{F}(V6,V8), P_in1-{F}(V8,V9), one-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V7), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1193: exists( #64, #1187 ), references = 1, size of lhs = 29:
% 282.36/282.55 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_outs-{F}(V3,V4), connection-{F}(V4,V5), fulladder-{F}(V6), P_h2-{F}(V6,V7), halfadder-{F}(V7), P_or1-{F}(V6,V8), P_in1-{F}(V8,V9), one-{F}(V9), P_and2-{F}(V7,V10), logic_and-{F}(V10), halfadder-{F}(V11), P_and2-{F}(V11,V10), P_in2-{F}(V11,V5), P_f-{F}(V12), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), P_h2-{F}(V12,V19), P_and2-{F}(V19,V10) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1194: exists( #64, #1188 ), references = 1, size of lhs = 17:
% 282.36/282.55 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_outs-{F}(V3,V4), connection-{F}(V4,V5), halfadder-{F}(V6), P_outc-{F}(V6,V7), one-{F}(V7), P_and2-{F}(V6,V8), and_ok-{F}(V8), halfadder-{F}(V9), P_and2-{F}(V9,V8), P_in2-{F}(V9,V5) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1203: mergings( V2 == V8, V3 == V9; #1198 ), references = 1, size of lhs = 23:
% 282.36/282.55 halfadder-{F}(V0), halfadder-{F}(V1), P_in1-{F}(V1,V2), zero-{F}(V2), P_or1-{F}(V1,V3), and_ok-{F}(V3), P_and1-{F}(V0,V3), fulladder-{F}(V4), P_h1-{F}(V4,V0), P_h2-{F}(V4,V5), halfadder-{F}(V5), P_in2-{F}(V5,V6), P_or1-{F}(V4,V7), P_in1-{F}(V7,V8), one-{F}(V8), P_f-{F}(V9), P_h2-{F}(V9,V5), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1206: mergings( V2 == V8, V3 == V9; #1199 ), references = 1, size of lhs = 29:
% 282.36/282.55 halfadder-{F}(V0), halfadder-{F}(V1), P_in1-{F}(V1,V2), zero-{F}(V2), P_or1-{F}(V1,V3), and_ok-{F}(V3), P_and1-{F}(V0,V3), fulladder-{F}(V4), P_h1-{F}(V4,V0), P_h2-{F}(V4,V5), halfadder-{F}(V5), P_in2-{F}(V5,V6), P_or1-{F}(V4,V7), P_in1-{F}(V7,V8), one-{F}(V8), P_and2-{F}(V5,V9), logic_and-{F}(V9), halfadder-{F}(V10), P_and2-{F}(V10,V9), P_in2-{F}(V10,V6), P_f-{F}(V11), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), P_h2-{F}(V11,V18), P_and2-{F}(V18,V9) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1207: exists( #71, #1197 ), references = 1, size of lhs = 19:
% 282.36/282.55 fulladder-{F}(V0), P_h1-{F}(V0,V1), halfadder-{F}(V1), P_h2-{F}(V0,V2), P_in2-{F}(V2,V3), halfadder-{F}(V4), P_in1-{F}(V4,V5), zero-{F}(V5), P_or1-{F}(V4,V6), and_ok-{F}(V6), P_and1-{F}(V1,V6), halfadder-{F}(V7), P_outc-{F}(V7,V8), one-{F}(V8), P_and2-{F}(V7,V9), and_ok-{F}(V9), halfadder-{F}(V10), P_and2-{F}(V10,V9), P_in2-{F}(V10,V3) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1247: exists( #64, #1241 ), references = 1, size of lhs = 13:
% 282.36/282.55 halfadder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_in1-{F}(V3,V4), fulladder-{F}(V5), P_f-{F}(V5), P_or1-{F}(V5,V6), P_out1-{F}(V6,V4), P_in1-{F}(V5,V7), P_in2-{F}(V5,V8) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1248: exists( #64, #1242 ), references = 1, size of lhs = 14:
% 282.36/282.55 halfadder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_in1-{F}(V3,V4), fulladder-{F}(V5), P_f-{F}(V5), P_or1-{F}(V5,V6), P_out1-{F}(V6,V4), P_in1-{F}(V5,V7), P_in2-{F}(V5,V8), P_outs-{F}(V5,V9) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1249: exists( #64, #1243 ), references = 1, size of lhs = 8:
% 282.36/282.55 halfadder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_in1-{F}(V3,V4), zero-{F}(V4) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1313: exists( #66, #1307 ), references = 4, size of lhs = 24:
% 282.36/282.55 halfadder-{F}(V0), P_in2-{F}(V0,V1), P_and2-{F}(V0,V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_not1-{F}(V3,V4), P_out1-{F}(V4,V5), one-{F}(V5), zero-{F}(V6), halfadder-{F}(V7), fulladder-{F}(V8), P_in2-{F}(V8,V6), P_h1-{F}(V8,V7), P_or1-{F}(V8,V9), P_in2-{F}(V9,V1), P_f-{F}(V10), P_h1-{F}(V10,V7), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), P_h2-{F}(V10,V17) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1314: exists( #66, #1308 ), references = 2, size of lhs = 24:
% 282.36/282.55 halfadder-{F}(V0), P_in2-{F}(V0,V1), P_and2-{F}(V0,V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_not1-{F}(V3,V4), P_out1-{F}(V4,V5), one-{F}(V5), fulladder-{F}(V6), P_h1-{F}(V6,V7), halfadder-{F}(V7), P_or1-{F}(V6,V8), P_in2-{F}(V8,V1), P_f-{F}(V9), P_h1-{F}(V9,V7), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), P_h2-{F}(V9,V16), P_in1-{F}(V7,V17), zero-{F}(V17) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1315: exists( #66, #1309 ), references = 2, size of lhs = 29:
% 282.36/282.55 halfadder-{F}(V0), P_in2-{F}(V0,V1), P_and2-{F}(V0,V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_not1-{F}(V3,V4), P_out1-{F}(V4,V5), one-{F}(V5), fulladder-{F}(V6), P_h1-{F}(V6,V7), halfadder-{F}(V7), P_or1-{F}(V6,V8), P_in2-{F}(V8,V1), logic_and-{F}(V9), P_and2-{F}(V7,V9), P_f-{F}(V10), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), P_h2-{F}(V10,V17), P_h1-{F}(V10,V18), P_and2-{F}(V18,V9), halfadder-{F}(V19), P_and2-{F}(V19,V9), P_in1-{F}(V19,V20), zero-{F}(V20) | FALSE
% 282.36/282.55 (used 0 times, uses = {})
% 282.36/282.55
% 282.36/282.55 #1323: exists( #65, #1320 ), references = 2, size of lhs = 26:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_and1-{F}(V0,V2), halfadder-{F}(V3), P_in2-{F}(V3,V4), P_and2-{F}(V3,V5), halfadder-{F}(V6), P_and1-{F}(V6,V5), P_not1-{F}(V6,V2), zero-{F}(V7), halfadder-{F}(V8), fulladder-{F}(V9), P_in2-{F}(V9,V7), P_h1-{F}(V9,V8), P_or1-{F}(V9,V10), P_in2-{F}(V10,V4), P_f-{F}(V11), P_h1-{F}(V11,V8), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), P_h2-{F}(V11,V18) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1336: mergings( V2 == V11; #1334 ), references = 1, size of lhs = 27:
% 282.36/282.56 one-{F}(V0), halfadder-{F}(V1), P_and1-{F}(V1,V2), halfadder-{F}(V3), P_in2-{F}(V3,V4), P_and2-{F}(V3,V5), halfadder-{F}(V6), P_and1-{F}(V6,V5), P_not1-{F}(V6,V2), zero-{F}(V7), halfadder-{F}(V8), fulladder-{F}(V9), P_outs-{F}(V9,V0), P_h2-{F}(V9,V1), P_in2-{F}(V9,V7), P_h1-{F}(V9,V8), P_or1-{F}(V9,V10), P_in2-{F}(V10,V4), P_f-{F}(V11), P_h1-{F}(V11,V8), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), P_h2-{F}(V11,V18) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1364: exists( #64, #1358 ), references = 1, size of lhs = 25:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), halfadder-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V2), P_and2-{F}(V4,V5), P_and1-{F}(V3,V5), fulladder-{F}(V6), P_h1-{F}(V6,V3), P_h2-{F}(V6,V7), halfadder-{F}(V7), P_in2-{F}(V7,V8), P_or1-{F}(V6,V9), P_in1-{F}(V9,V10), one-{F}(V10), P_f-{F}(V11), P_h2-{F}(V11,V7), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1365: exists( #64, #1359 ), references = 1, size of lhs = 31:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), halfadder-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V2), P_and2-{F}(V4,V5), P_and1-{F}(V3,V5), fulladder-{F}(V6), P_h1-{F}(V6,V3), P_h2-{F}(V6,V7), halfadder-{F}(V7), P_in2-{F}(V7,V8), P_or1-{F}(V6,V9), P_in1-{F}(V9,V10), one-{F}(V10), P_and2-{F}(V7,V11), logic_and-{F}(V11), halfadder-{F}(V12), P_and2-{F}(V12,V11), P_in2-{F}(V12,V8), P_f-{F}(V13), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15), P_inc-{F}(V13,V16), P_outs-{F}(V13,V17), P_outc-{F}(V13,V18), P_or1-{F}(V13,V19), P_h2-{F}(V13,V20), P_and2-{F}(V20,V11) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1366: exists( #64, #1360 ), references = 1, size of lhs = 30:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), fulladder-{F}(V3), P_h1-{F}(V3,V4), halfadder-{F}(V4), P_h2-{F}(V3,V5), P_in2-{F}(V5,V6), halfadder-{F}(V7), P_not1-{F}(V7,V2), P_and2-{F}(V7,V8), P_and1-{F}(V4,V8), halfadder-{F}(V9), P_outc-{F}(V9,V10), one-{F}(V10), P_and2-{F}(V9,V11), logic_and-{F}(V11), halfadder-{F}(V12), P_and2-{F}(V12,V11), P_in2-{F}(V12,V6), P_f-{F}(V13), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15), P_inc-{F}(V13,V16), P_outs-{F}(V13,V17), P_outc-{F}(V13,V18), P_or1-{F}(V13,V19), P_h2-{F}(V13,V20), P_and2-{F}(V20,V11) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1384: mergings( V3 == V21, V4 == V22, V5 == V23, V9 == V27, V7 == V25, V8 == V26, V10 == V18, V6 == V24; #1373 ), references = 1, size of lhs = 25:
% 282.36/282.56 logic_and-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_out1-{F}(V0,V2), fulladder-{F}(V3), P_h2-{F}(V3,V4), halfadder-{F}(V4), P_in2-{F}(V4,V2), P_not1-{F}(V4,V5), P_and2-{F}(V4,V6), P_and1-{F}(V4,V7), P_or1-{F}(V3,V8), P_in1-{F}(V8,V9), one-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V4), P_h1-{F}(V10,V11), P_and2-{F}(V11,V0), P_not1-{F}(V11,V12), P_in1-{F}(V10,V13), P_in2-{F}(V10,V14), P_inc-{F}(V10,V15), P_outs-{F}(V10,V16), P_outc-{F}(V10,V17), P_or1-{F}(V10,V18) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1394: mergings( V3 == V23, V4 == V24, V5 == V25, V9 == V29, V7 == V27, V8 == V28, V10 == V30, V12 == V21, V6 == V26; #1374 ), references = 1, size of lhs = 29:
% 282.36/282.56 logic_and-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_out1-{F}(V0,V2), fulladder-{F}(V3), P_h2-{F}(V3,V4), halfadder-{F}(V4), P_or1-{F}(V3,V5), P_in1-{F}(V5,V6), one-{F}(V6), P_and2-{F}(V4,V7), logic_and-{F}(V7), halfadder-{F}(V8), P_and2-{F}(V8,V7), P_in2-{F}(V8,V2), P_f-{F}(V9), P_h1-{F}(V9,V10), P_and2-{F}(V10,V0), P_not1-{F}(V10,V11), P_in1-{F}(V9,V12), P_in2-{F}(V9,V13), P_inc-{F}(V9,V14), P_outs-{F}(V9,V15), P_outc-{F}(V9,V16), P_or1-{F}(V9,V17), P_h2-{F}(V9,V18), P_and2-{F}(V18,V7), P_not1-{F}(V18,V19), P_and1-{F}(V18,V20) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1403: mergings( V3 == V24, V4 == V25, V5 == V26, V9 == V30, V7 == V28, V8 == V29, V10 == V20, V6 == V27; #1375 ), references = 1, size of lhs = 30:
% 282.36/282.56 logic_and-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_out1-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V4), P_out1-{F}(V4,V2), fulladder-{F}(V5), P_h1-{F}(V5,V3), P_h2-{F}(V5,V6), halfadder-{F}(V6), P_not1-{F}(V6,V7), P_and2-{F}(V6,V8), P_and1-{F}(V6,V9), P_in2-{F}(V6,V10), P_or1-{F}(V5,V11), P_in2-{F}(V11,V10), P_in1-{F}(V11,V12), one-{F}(V12), P_f-{F}(V13), P_h2-{F}(V13,V6), P_h1-{F}(V13,V14), P_and2-{F}(V14,V0), P_not1-{F}(V14,V15), P_in1-{F}(V13,V16), P_in2-{F}(V13,V17), P_inc-{F}(V13,V18), P_outs-{F}(V13,V19), P_outc-{F}(V13,V20), P_or1-{F}(V13,V21) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1415: mergings( V3 == V20, V4 == V21, V5 == V22, V9 == V26, V7 == V24, V8 == V25, V10 == V17, V6 == V23; #1404 ), references = 1, size of lhs = 24:
% 282.36/282.56 logic_and-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_out1-{F}(V0,V2), fulladder-{F}(V3), P_h2-{F}(V3,V4), halfadder-{F}(V4), P_in2-{F}(V4,V2), P_not1-{F}(V4,V5), P_and2-{F}(V4,V6), P_and1-{F}(V4,V7), P_or1-{F}(V3,V8), P_in1-{F}(V8,V9), one-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V4), P_h1-{F}(V10,V11), P_and2-{F}(V11,V0), P_in1-{F}(V10,V12), P_in2-{F}(V10,V13), P_inc-{F}(V10,V14), P_outs-{F}(V10,V15), P_outc-{F}(V10,V16), P_or1-{F}(V10,V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1425: mergings( V3 == V22, V4 == V23, V5 == V24, V9 == V28, V7 == V26, V8 == V27, V10 == V29, V12 == V20, V6 == V25; #1405 ), references = 1, size of lhs = 28:
% 282.36/282.56 logic_and-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_out1-{F}(V0,V2), fulladder-{F}(V3), P_h2-{F}(V3,V4), halfadder-{F}(V4), P_or1-{F}(V3,V5), P_in1-{F}(V5,V6), one-{F}(V6), P_and2-{F}(V4,V7), logic_and-{F}(V7), halfadder-{F}(V8), P_and2-{F}(V8,V7), P_in2-{F}(V8,V2), P_f-{F}(V9), P_h1-{F}(V9,V10), P_and2-{F}(V10,V0), P_in1-{F}(V9,V11), P_in2-{F}(V9,V12), P_inc-{F}(V9,V13), P_outs-{F}(V9,V14), P_outc-{F}(V9,V15), P_or1-{F}(V9,V16), P_h2-{F}(V9,V17), P_and2-{F}(V17,V7), P_not1-{F}(V17,V18), P_and1-{F}(V17,V19) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1434: mergings( V3 == V23, V4 == V24, V5 == V25, V9 == V29, V7 == V27, V8 == V28, V10 == V19, V6 == V26; #1406 ), references = 1, size of lhs = 29:
% 282.36/282.56 logic_and-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_out1-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V4), P_out1-{F}(V4,V2), fulladder-{F}(V5), P_h1-{F}(V5,V3), P_h2-{F}(V5,V6), halfadder-{F}(V6), P_not1-{F}(V6,V7), P_and2-{F}(V6,V8), P_and1-{F}(V6,V9), P_in2-{F}(V6,V10), P_or1-{F}(V5,V11), P_in2-{F}(V11,V10), P_in1-{F}(V11,V12), one-{F}(V12), P_f-{F}(V13), P_h2-{F}(V13,V6), P_h1-{F}(V13,V14), P_and2-{F}(V14,V0), P_in1-{F}(V13,V15), P_in2-{F}(V13,V16), P_inc-{F}(V13,V17), P_outs-{F}(V13,V18), P_outc-{F}(V13,V19), P_or1-{F}(V13,V20) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1492: exists( #65, #1486 ), references = 4, size of lhs = 24:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_and1-{F}(V0,V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_outs-{F}(V3,V4), connection-{F}(V4,V5), zero-{F}(V6), halfadder-{F}(V7), fulladder-{F}(V8), P_in2-{F}(V8,V6), P_h1-{F}(V8,V7), P_or1-{F}(V8,V9), P_in2-{F}(V9,V5), P_f-{F}(V10), P_h1-{F}(V10,V7), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), P_h2-{F}(V10,V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1493: exists( #65, #1487 ), references = 2, size of lhs = 24:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_and1-{F}(V0,V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_outs-{F}(V3,V4), connection-{F}(V4,V5), fulladder-{F}(V6), P_h1-{F}(V6,V7), halfadder-{F}(V7), P_or1-{F}(V6,V8), P_in2-{F}(V8,V5), P_f-{F}(V9), P_h1-{F}(V9,V7), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), P_h2-{F}(V9,V16), P_in1-{F}(V7,V17), zero-{F}(V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1494: exists( #65, #1488 ), references = 2, size of lhs = 29:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_and1-{F}(V0,V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_outs-{F}(V3,V4), connection-{F}(V4,V5), fulladder-{F}(V6), P_h1-{F}(V6,V7), halfadder-{F}(V7), P_or1-{F}(V6,V8), P_in2-{F}(V8,V5), logic_and-{F}(V9), P_and2-{F}(V7,V9), P_f-{F}(V10), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), P_h2-{F}(V10,V17), P_h1-{F}(V10,V18), P_and2-{F}(V18,V9), halfadder-{F}(V19), P_and2-{F}(V19,V9), P_in1-{F}(V19,V20), zero-{F}(V20) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1503: mergings( V2 == V10, V0 == V9; #1498 ), references = 1, size of lhs = 23:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_and1-{F}(V0,V2), zero-{F}(V3), halfadder-{F}(V4), P_and1-{F}(V4,V2), fulladder-{F}(V5), P_in2-{F}(V5,V3), P_h1-{F}(V5,V4), P_h2-{F}(V5,V6), P_in2-{F}(V6,V7), P_or1-{F}(V5,V8), P_in2-{F}(V8,V7), P_f-{F}(V9), P_h1-{F}(V9,V4), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), P_h2-{F}(V9,V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1506: mergings( V2 == V8, V0 == V9; #1499 ), references = 1, size of lhs = 23:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_and1-{F}(V0,V2), fulladder-{F}(V3), P_h2-{F}(V3,V4), P_in2-{F}(V4,V5), P_h1-{F}(V3,V6), P_and1-{F}(V6,V2), halfadder-{F}(V6), P_or1-{F}(V3,V7), P_in2-{F}(V7,V5), P_f-{F}(V8), P_h1-{F}(V8,V6), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14), P_h2-{F}(V8,V15), P_in1-{F}(V6,V16), zero-{F}(V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1558: exists( #65, #1552 ), references = 2, size of lhs = 24:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_and1-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), P_in1-{F}(V4,V5), zero-{F}(V6), halfadder-{F}(V7), fulladder-{F}(V8), P_in2-{F}(V8,V6), P_h1-{F}(V8,V7), P_or1-{F}(V8,V9), P_in2-{F}(V9,V5), P_f-{F}(V10), P_h1-{F}(V10,V7), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), P_h2-{F}(V10,V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1559: exists( #65, #1553 ), references = 2, size of lhs = 24:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_and1-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), P_in1-{F}(V4,V5), fulladder-{F}(V6), P_h1-{F}(V6,V7), halfadder-{F}(V7), P_or1-{F}(V6,V8), P_in2-{F}(V8,V5), P_f-{F}(V9), P_h1-{F}(V9,V7), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), P_h2-{F}(V9,V16), P_in1-{F}(V7,V17), zero-{F}(V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1560: exists( #65, #1554 ), references = 1, size of lhs = 29:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_and1-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), P_in1-{F}(V4,V5), fulladder-{F}(V6), P_h1-{F}(V6,V7), halfadder-{F}(V7), P_or1-{F}(V6,V8), P_in2-{F}(V8,V5), logic_and-{F}(V9), P_and2-{F}(V7,V9), P_f-{F}(V10), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), P_h2-{F}(V10,V17), P_h1-{F}(V10,V18), P_and2-{F}(V18,V9), halfadder-{F}(V19), P_and2-{F}(V19,V9), P_in1-{F}(V19,V20), zero-{F}(V20) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1591: exists( #65, #1585 ), references = 1, size of lhs = 31:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_and1-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), P_in1-{F}(V4,V5), halfadder-{F}(V6), P_in2-{F}(V6,V7), P_and2-{F}(V6,V8), halfadder-{F}(V9), P_and1-{F}(V9,V8), P_not1-{F}(V9,V10), P_out1-{F}(V10,V5), zero-{F}(V11), halfadder-{F}(V12), fulladder-{F}(V13), P_in2-{F}(V13,V11), P_h1-{F}(V13,V12), P_or1-{F}(V13,V14), P_in2-{F}(V14,V7), P_f-{F}(V15), P_h1-{F}(V15,V12), P_in1-{F}(V15,V16), P_in2-{F}(V15,V17), P_inc-{F}(V15,V18), P_outs-{F}(V15,V19), P_outc-{F}(V15,V20), P_or1-{F}(V15,V21), P_h2-{F}(V15,V22) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1592: exists( #65, #1586 ), references = 1, size of lhs = 31:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_and1-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), P_in1-{F}(V4,V5), halfadder-{F}(V6), P_in2-{F}(V6,V7), P_and2-{F}(V6,V8), halfadder-{F}(V9), P_and1-{F}(V9,V8), P_not1-{F}(V9,V10), P_out1-{F}(V10,V5), fulladder-{F}(V11), P_h1-{F}(V11,V12), halfadder-{F}(V12), P_or1-{F}(V11,V13), P_in2-{F}(V13,V7), P_f-{F}(V14), P_h1-{F}(V14,V12), P_in1-{F}(V14,V15), P_in2-{F}(V14,V16), P_inc-{F}(V14,V17), P_outs-{F}(V14,V18), P_outc-{F}(V14,V19), P_or1-{F}(V14,V20), P_h2-{F}(V14,V21), P_in1-{F}(V12,V22), zero-{F}(V22) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1593: exists( #65, #1587 ), references = 1, size of lhs = 36:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_and1-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), P_in1-{F}(V4,V5), halfadder-{F}(V6), P_in2-{F}(V6,V7), P_and2-{F}(V6,V8), halfadder-{F}(V9), P_and1-{F}(V9,V8), P_not1-{F}(V9,V10), P_out1-{F}(V10,V5), fulladder-{F}(V11), P_h1-{F}(V11,V12), halfadder-{F}(V12), P_or1-{F}(V11,V13), P_in2-{F}(V13,V7), logic_and-{F}(V14), P_and2-{F}(V12,V14), P_f-{F}(V15), P_in1-{F}(V15,V16), P_in2-{F}(V15,V17), P_inc-{F}(V15,V18), P_outs-{F}(V15,V19), P_outc-{F}(V15,V20), P_or1-{F}(V15,V21), P_h2-{F}(V15,V22), P_h1-{F}(V15,V23), P_and2-{F}(V23,V14), halfadder-{F}(V24), P_and2-{F}(V24,V14), P_in1-{F}(V24,V25), zero-{F}(V25) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1639: exists( #65, #1633 ), references = 2, size of lhs = 25:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_and1-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), P_in1-{F}(V4,V5), zero-{F}(V6), halfadder-{F}(V7), fulladder-{F}(V8), P_in2-{F}(V8,V6), P_h1-{F}(V8,V7), P_or1-{F}(V8,V9), P_in2-{F}(V9,V10), connection-{F}(V10,V5), P_f-{F}(V11), P_h1-{F}(V11,V7), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), P_h2-{F}(V11,V18) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1640: exists( #65, #1634 ), references = 1, size of lhs = 25:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_and1-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), P_in1-{F}(V4,V5), fulladder-{F}(V6), P_h1-{F}(V6,V7), halfadder-{F}(V7), P_or1-{F}(V6,V8), P_in2-{F}(V8,V9), connection-{F}(V9,V5), P_f-{F}(V10), P_h1-{F}(V10,V7), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), P_h2-{F}(V10,V17), P_in1-{F}(V7,V18), zero-{F}(V18) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1641: exists( #65, #1635 ), references = 1, size of lhs = 30:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_and1-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), P_in1-{F}(V4,V5), fulladder-{F}(V6), P_h1-{F}(V6,V7), halfadder-{F}(V7), P_or1-{F}(V6,V8), P_in2-{F}(V8,V9), connection-{F}(V9,V5), logic_and-{F}(V10), P_and2-{F}(V7,V10), P_f-{F}(V11), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), P_h2-{F}(V11,V18), P_h1-{F}(V11,V19), P_and2-{F}(V19,V10), halfadder-{F}(V20), P_and2-{F}(V20,V10), P_in1-{F}(V20,V21), zero-{F}(V21) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1648: exists( #64, #1642 ), references = 1, size of lhs = 27:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), P_out1-{F}(V1,V2), P_and1-{F}(V0,V3), halfadder-{F}(V4), P_outs-{F}(V4,V5), one-{F}(V5), P_and1-{F}(V4,V6), halfadder-{F}(V7), P_and2-{F}(V7,V6), P_not1-{F}(V7,V3), zero-{F}(V8), halfadder-{F}(V9), fulladder-{F}(V10), P_in2-{F}(V10,V8), P_h1-{F}(V10,V9), P_or1-{F}(V10,V11), P_in2-{F}(V11,V2), P_f-{F}(V12), P_h1-{F}(V12,V9), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), P_h2-{F}(V12,V19) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1649: exists( #64, #1643 ), references = 1, size of lhs = 27:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), P_out1-{F}(V1,V2), P_and1-{F}(V0,V3), halfadder-{F}(V4), P_outs-{F}(V4,V5), one-{F}(V5), P_and1-{F}(V4,V6), halfadder-{F}(V7), P_and2-{F}(V7,V6), P_not1-{F}(V7,V3), fulladder-{F}(V8), P_h1-{F}(V8,V9), halfadder-{F}(V9), P_or1-{F}(V8,V10), P_in2-{F}(V10,V2), P_f-{F}(V11), P_h1-{F}(V11,V9), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), P_h2-{F}(V11,V18), P_in1-{F}(V9,V19), zero-{F}(V19) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1650: exists( #64, #1644 ), references = 1, size of lhs = 32:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), P_out1-{F}(V1,V2), P_and1-{F}(V0,V3), halfadder-{F}(V4), P_outs-{F}(V4,V5), one-{F}(V5), P_and1-{F}(V4,V6), halfadder-{F}(V7), P_and2-{F}(V7,V6), P_not1-{F}(V7,V3), fulladder-{F}(V8), P_h1-{F}(V8,V9), halfadder-{F}(V9), P_or1-{F}(V8,V10), P_in2-{F}(V10,V2), logic_and-{F}(V11), P_and2-{F}(V9,V11), P_f-{F}(V12), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), P_h2-{F}(V12,V19), P_h1-{F}(V12,V20), P_and2-{F}(V20,V11), halfadder-{F}(V21), P_and2-{F}(V21,V11), P_in1-{F}(V21,V22), zero-{F}(V22) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1708: exists( #65, #1702 ), references = 1, size of lhs = 16:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_and1-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), P_in1-{F}(V4,V5), halfadder-{F}(V6), P_in1-{F}(V6,V7), zero-{F}(V7), P_and2-{F}(V6,V8), and_ok-{F}(V8), halfadder-{F}(V9), P_and2-{F}(V9,V8), P_outc-{F}(V9,V5) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1709: exists( #65, #1703 ), references = 1, size of lhs = 28:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_and1-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), P_in1-{F}(V4,V5), logic_and-{F}(V6), P_f-{F}(V7), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), P_h2-{F}(V7,V14), P_h1-{F}(V7,V15), P_and2-{F}(V15,V6), P_or1-{F}(V15,V16), P_not1-{F}(V15,V17), halfadder-{F}(V18), P_and2-{F}(V18,V6), P_in1-{F}(V18,V19), zero-{F}(V19), halfadder-{F}(V20), P_and2-{F}(V20,V6), P_outc-{F}(V20,V5) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1710: exists( #65, #1704 ), references = 1, size of lhs = 29:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_and1-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), P_in1-{F}(V4,V5), logic_and-{F}(V6), P_f-{F}(V7), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), P_h2-{F}(V7,V14), P_and1-{F}(V14,V15), P_h1-{F}(V7,V16), P_and2-{F}(V16,V6), P_or1-{F}(V16,V17), P_not1-{F}(V16,V18), halfadder-{F}(V19), P_and2-{F}(V19,V6), P_in1-{F}(V19,V20), zero-{F}(V20), halfadder-{F}(V21), P_and2-{F}(V21,V6), P_outc-{F}(V21,V5) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1765: exists( #65, #1759 ), references = 1, size of lhs = 29:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_and1-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), P_in1-{F}(V4,V5), and_ok-{F}(V6), P_in1-{F}(V6,V5), P_in2-{F}(V6,V7), one-{F}(V7), P_out1-{F}(V6,V8), zero-{F}(V9), halfadder-{F}(V10), fulladder-{F}(V11), P_in2-{F}(V11,V9), P_h1-{F}(V11,V10), P_or1-{F}(V11,V12), P_in2-{F}(V12,V8), P_f-{F}(V13), P_h1-{F}(V13,V10), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15), P_inc-{F}(V13,V16), P_outs-{F}(V13,V17), P_outc-{F}(V13,V18), P_or1-{F}(V13,V19), P_h2-{F}(V13,V20) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1766: exists( #65, #1760 ), references = 1, size of lhs = 36:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_and1-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), P_in1-{F}(V4,V5), and_ok-{F}(V6), P_in1-{F}(V6,V5), P_in2-{F}(V6,V7), one-{F}(V7), P_out1-{F}(V6,V8), halfadder-{F}(V9), P_in2-{F}(V9,V10), P_and2-{F}(V9,V11), halfadder-{F}(V12), P_and1-{F}(V12,V11), P_not1-{F}(V12,V13), P_out1-{F}(V13,V8), zero-{F}(V14), halfadder-{F}(V15), fulladder-{F}(V16), P_in2-{F}(V16,V14), P_h1-{F}(V16,V15), P_or1-{F}(V16,V17), P_in2-{F}(V17,V10), P_f-{F}(V18), P_h1-{F}(V18,V15), P_in1-{F}(V18,V19), P_in2-{F}(V18,V20), P_inc-{F}(V18,V21), P_outs-{F}(V18,V22), P_outc-{F}(V18,V23), P_or1-{F}(V18,V24), P_h2-{F}(V18,V25) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1767: exists( #65, #1761 ), references = 1, size of lhs = 29:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_and1-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), P_in1-{F}(V4,V5), and_ok-{F}(V6), P_in1-{F}(V6,V5), P_in2-{F}(V6,V7), one-{F}(V7), P_out1-{F}(V6,V8), fulladder-{F}(V9), P_h1-{F}(V9,V10), halfadder-{F}(V10), P_or1-{F}(V9,V11), P_in2-{F}(V11,V8), P_f-{F}(V12), P_h1-{F}(V12,V10), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), P_h2-{F}(V12,V19), P_in1-{F}(V10,V20), zero-{F}(V20) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1792: exists( #66, #1786 ), references = 4, size of lhs = 22:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), P_out1-{F}(V2,V3), one-{F}(V3), zero-{F}(V4), halfadder-{F}(V5), fulladder-{F}(V6), P_in2-{F}(V6,V4), P_h1-{F}(V6,V5), P_or1-{F}(V6,V7), P_in2-{F}(V7,V1), P_f-{F}(V8), P_h1-{F}(V8,V5), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14), P_h2-{F}(V8,V15) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1793: exists( #66, #1787 ), references = 1, size of lhs = 22:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), P_out1-{F}(V2,V3), one-{F}(V3), fulladder-{F}(V4), P_h1-{F}(V4,V5), halfadder-{F}(V5), P_or1-{F}(V4,V6), P_in2-{F}(V6,V1), P_f-{F}(V7), P_h1-{F}(V7,V5), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), P_h2-{F}(V7,V14), P_in1-{F}(V5,V15), zero-{F}(V15) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1794: exists( #66, #1788 ), references = 1, size of lhs = 27:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), P_out1-{F}(V2,V3), one-{F}(V3), fulladder-{F}(V4), P_h1-{F}(V4,V5), halfadder-{F}(V5), P_or1-{F}(V4,V6), P_in2-{F}(V6,V1), logic_and-{F}(V7), P_and2-{F}(V5,V7), P_f-{F}(V8), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14), P_h2-{F}(V8,V15), P_h1-{F}(V8,V16), P_and2-{F}(V16,V7), halfadder-{F}(V17), P_and2-{F}(V17,V7), P_in1-{F}(V17,V18), zero-{F}(V18) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1804: exists( #65, #1798 ), references = 2, size of lhs = 24:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_and1-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_in2-{F}(V3,V4), zero-{F}(V5), halfadder-{F}(V6), fulladder-{F}(V7), P_in2-{F}(V7,V5), P_h1-{F}(V7,V6), P_or1-{F}(V7,V8), P_in2-{F}(V8,V4), P_f-{F}(V9), P_h1-{F}(V9,V6), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), P_h2-{F}(V9,V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1817: mergings( V2 == V9; #1815 ), references = 1, size of lhs = 25:
% 282.36/282.56 one-{F}(V0), halfadder-{F}(V1), P_and1-{F}(V1,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_in2-{F}(V3,V4), zero-{F}(V5), halfadder-{F}(V6), fulladder-{F}(V7), P_outs-{F}(V7,V0), P_h2-{F}(V7,V1), P_in2-{F}(V7,V5), P_h1-{F}(V7,V6), P_or1-{F}(V7,V8), P_in2-{F}(V8,V4), P_f-{F}(V9), P_h1-{F}(V9,V6), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), P_h2-{F}(V9,V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1829: mergings( V10 == V17, V3 == V19, V4 == V20, V5 == V21, V9 == V25, V7 == V23, V8 == V24, V0 == V26, V6 == V22; #1819 ), references = 1, size of lhs = 26:
% 282.36/282.56 logic_and-{F}(V0), one-{F}(V1), halfadder-{F}(V2), P_and1-{F}(V2,V0), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_in2-{F}(V3,V4), zero-{F}(V5), halfadder-{F}(V6), fulladder-{F}(V7), P_outs-{F}(V7,V1), P_h2-{F}(V7,V2), P_in2-{F}(V7,V5), P_h1-{F}(V7,V6), P_or1-{F}(V7,V8), P_in2-{F}(V8,V4), P_f-{F}(V9), P_h1-{F}(V9,V6), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), P_h2-{F}(V9,V16), P_and2-{F}(V16,V0) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1852: exists( #65, #1846 ), references = 1, size of lhs = 25:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), and_ok-{F}(V1), P_not1-{F}(V0,V2), P_in1-{F}(V2,V3), one-{F}(V3), halfadder-{F}(V4), P_and2-{F}(V4,V1), P_in2-{F}(V4,V5), zero-{F}(V6), halfadder-{F}(V7), fulladder-{F}(V8), P_in2-{F}(V8,V6), P_h1-{F}(V8,V7), P_or1-{F}(V8,V9), P_in2-{F}(V9,V5), P_f-{F}(V10), P_h1-{F}(V10,V7), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), P_h2-{F}(V10,V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1873: exists( #70, #63 ), references = 1, size of lhs = 16:
% 282.36/282.56 P_f-{F}(V0), P_in1-{F}(V0,V1), P_in2-{F}(V0,V2), P_inc-{F}(V0,V3), P_outs-{F}(V0,V4), P_outc-{F}(V0,V5), P_or1-{F}(V0,V6), P_h2-{F}(V0,V7), P_not1-{F}(V7,V8), P_and2-{F}(V7,V9), P_and1-{F}(V7,V10), P_h1-{F}(V0,V11), P_not1-{F}(V11,V12), P_and2-{F}(V11,V13), P_and1-{F}(V11,V14), abnormal-{F}(V14) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1875: exists( #69, #1872 ), references = 1, size of lhs = 15:
% 282.36/282.56 P_f-{F}(V0), P_in1-{F}(V0,V1), P_in2-{F}(V0,V2), P_inc-{F}(V0,V3), P_outs-{F}(V0,V4), P_outc-{F}(V0,V5), P_or1-{F}(V0,V6), P_h2-{F}(V0,V7), P_not1-{F}(V7,V8), P_and2-{F}(V7,V9), P_and1-{F}(V7,V10), P_h1-{F}(V0,V11), P_and2-{F}(V11,V12), P_and1-{F}(V11,V13), abnormal-{F}(V13) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1877: exists( #68, #1874 ), references = 1, size of lhs = 14:
% 282.36/282.56 P_f-{F}(V0), P_in1-{F}(V0,V1), P_in2-{F}(V0,V2), P_inc-{F}(V0,V3), P_outs-{F}(V0,V4), P_outc-{F}(V0,V5), P_or1-{F}(V0,V6), P_h2-{F}(V0,V7), P_not1-{F}(V7,V8), P_and2-{F}(V7,V9), P_and1-{F}(V7,V10), P_h1-{F}(V0,V11), P_and1-{F}(V11,V12), abnormal-{F}(V12) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1924: mergings( V2 == V7, V3 == V8; #1919 ), references = 1, size of lhs = 20:
% 282.36/282.56 halfadder-{F}(V0), P_and1-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), fulladder-{F}(V3), P_h1-{F}(V3,V0), P_h2-{F}(V3,V4), halfadder-{F}(V4), P_in2-{F}(V4,V5), P_or1-{F}(V3,V6), P_in1-{F}(V6,V7), one-{F}(V7), P_f-{F}(V8), P_h2-{F}(V8,V4), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1927: mergings( V2 == V7, V3 == V8; #1920 ), references = 1, size of lhs = 26:
% 282.36/282.56 halfadder-{F}(V0), P_and1-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), fulladder-{F}(V3), P_h1-{F}(V3,V0), P_h2-{F}(V3,V4), halfadder-{F}(V4), P_in2-{F}(V4,V5), P_or1-{F}(V3,V6), P_in1-{F}(V6,V7), one-{F}(V7), P_and2-{F}(V4,V8), logic_and-{F}(V8), halfadder-{F}(V9), P_and2-{F}(V9,V8), P_in2-{F}(V9,V5), P_f-{F}(V10), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), P_h2-{F}(V10,V17), P_and2-{F}(V17,V8) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1928: exists( #71, #1918 ), references = 1, size of lhs = 25:
% 282.36/282.56 fulladder-{F}(V0), P_h1-{F}(V0,V1), halfadder-{F}(V1), P_h2-{F}(V0,V2), P_in2-{F}(V2,V3), P_and1-{F}(V1,V4), P_out1-{F}(V4,V5), zero-{F}(V5), halfadder-{F}(V6), P_outc-{F}(V6,V7), one-{F}(V7), P_and2-{F}(V6,V8), logic_and-{F}(V8), halfadder-{F}(V9), P_and2-{F}(V9,V8), P_in2-{F}(V9,V3), P_f-{F}(V10), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), P_h2-{F}(V10,V17), P_and2-{F}(V17,V8) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1948: exists( #65, #1945 ), references = 2, size of lhs = 24:
% 282.36/282.56 halfadder-{F}(V0), P_outc-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_in2-{F}(V3,V4), zero-{F}(V5), halfadder-{F}(V6), fulladder-{F}(V7), P_in2-{F}(V7,V5), P_h1-{F}(V7,V6), P_or1-{F}(V7,V8), P_in2-{F}(V8,V4), P_f-{F}(V9), P_h1-{F}(V9,V6), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), P_h2-{F}(V9,V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1963: mergings( V2 == V10, V3 == V11; #1960 ), references = 1, size of lhs = 25:
% 282.36/282.56 halfadder-{F}(V0), one-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_in2-{F}(V3,V4), zero-{F}(V5), halfadder-{F}(V6), fulladder-{F}(V7), P_h2-{F}(V7,V0), P_in2-{F}(V7,V5), P_h1-{F}(V7,V6), P_or1-{F}(V7,V8), P_in1-{F}(V8,V1), P_in2-{F}(V8,V4), P_f-{F}(V9), P_h1-{F}(V9,V6), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), P_h2-{F}(V9,V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1976: mergings( V10 == V18, V12 == V19, V3 == V20, V4 == V21, V5 == V22, V9 == V26, V7 == V24, V8 == V25, V0 == V27, V6 == V23; #1965 ), references = 1, size of lhs = 26:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), one-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_in2-{F}(V3,V4), zero-{F}(V5), halfadder-{F}(V6), fulladder-{F}(V7), P_h2-{F}(V7,V1), P_in2-{F}(V7,V5), P_h1-{F}(V7,V6), P_or1-{F}(V7,V8), P_in1-{F}(V8,V2), P_in2-{F}(V8,V4), P_f-{F}(V9), P_h1-{F}(V9,V6), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), P_h2-{F}(V9,V16), P_and2-{F}(V16,V0) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #1989: mergings( V9 == V15, V10 == V16, V2 == V17, V3 == V18, V4 == V19, V8 == V23, V6 == V21, V7 == V22, V0 == V24, V5 == V20; #1978 ), references = 1, size of lhs = 21:
% 282.36/282.56 halfadder-{F}(V0), one-{F}(V1), P_in2-{F}(V0,V2), zero-{F}(V3), halfadder-{F}(V4), fulladder-{F}(V5), P_h2-{F}(V5,V0), P_in2-{F}(V5,V3), P_h1-{F}(V5,V4), P_or1-{F}(V5,V6), P_in1-{F}(V6,V1), P_in2-{F}(V6,V2), P_f-{F}(V7), P_h1-{F}(V7,V4), P_h2-{F}(V7,V0), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2001: mergings( V9 == V14, V10 == V0, V2 == V15, V3 == V16, V4 == V17, V8 == V21, V6 == V19, V7 == V20, V0 == V22, V5 == V18; #1990 ), references = 1, size of lhs = 19:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), zero-{F}(V2), halfadder-{F}(V3), fulladder-{F}(V4), P_h2-{F}(V4,V0), P_in2-{F}(V4,V2), P_h1-{F}(V4,V3), P_or1-{F}(V4,V0), P_f-{F}(V5), P_h1-{F}(V5,V3), P_h2-{F}(V5,V0), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2016: mergings( V2 == V12, V12 == V15, V0 == V11, V4 == V16, V5 == V17, V6 == V18, V10 == V22, V8 == V20, V9 == V21, V11 == V23, V7 == V19; #2004 ), references = 1, size of lhs = 19:
% 282.36/282.56 one-{F}(V0), halfadder-{F}(V1), zero-{F}(V2), halfadder-{F}(V3), fulladder-{F}(V4), P_in1-{F}(V4,V0), P_h2-{F}(V4,V1), P_in2-{F}(V4,V2), P_h1-{F}(V4,V3), P_or1-{F}(V4,V1), P_f-{F}(V5), P_h1-{F}(V5,V3), P_h2-{F}(V5,V1), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2027: mergings( V2 == V11, V11 == V14, V5 == V15, V6 == V16, V4 == V10, V9 == V19, V7 == V17, V8 == V18, V10 == V20; #2017 ), references = 1, size of lhs = 18:
% 282.36/282.56 one-{F}(V0), halfadder-{F}(V1), zero-{F}(V2), halfadder-{F}(V3), fulladder-{F}(V4), P_in1-{F}(V4,V0), P_h2-{F}(V4,V1), P_in2-{F}(V4,V2), P_h1-{F}(V4,V3), P_or1-{F}(V4,V1), P_f-{F}(V5), P_h1-{F}(V5,V3), P_h2-{F}(V5,V1), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_outs-{F}(V5,V8), P_outc-{F}(V5,V9), P_or1-{F}(V5,V10) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2069: exists( #65, #2066 ), references = 4, size of lhs = 9:
% 282.36/282.56 and_ok-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), fulladder-{F}(V2), P_outs-{F}(V2,V3), one-{F}(V3), P_h2-{F}(V2,V4), halfadder-{F}(V4), P_and1-{F}(V4,V0) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2073: exists( #64, #2071 ), references = 3, size of lhs = 12:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), and_ok-{F}(V3), fulladder-{F}(V4), P_outs-{F}(V4,V5), one-{F}(V5), P_h2-{F}(V4,V6), halfadder-{F}(V6), P_and1-{F}(V6,V3) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2076: exists( #69, #2074 ), references = 2, size of lhs = 25:
% 282.36/282.56 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_and2-{F}(V8,V9), P_and1-{F}(V8,V10), P_h1-{F}(V1,V11), P_not1-{F}(V11,V0), P_or1-{F}(V11,V12), halfadder-{F}(V13), P_not1-{F}(V13,V0), P_and2-{F}(V13,V14), P_out1-{F}(V14,V15), zero-{F}(V15), fulladder-{F}(V16), P_outs-{F}(V16,V17), one-{F}(V17), P_h2-{F}(V16,V18), halfadder-{F}(V18), P_and1-{F}(V18,V0) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2078: exists( #68, #2075 ), references = 2, size of lhs = 24:
% 282.36/282.56 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_and1-{F}(V8,V9), P_h1-{F}(V1,V10), P_not1-{F}(V10,V0), P_or1-{F}(V10,V11), halfadder-{F}(V12), P_not1-{F}(V12,V0), P_and2-{F}(V12,V13), P_out1-{F}(V13,V14), zero-{F}(V14), fulladder-{F}(V15), P_outs-{F}(V15,V16), one-{F}(V16), P_h2-{F}(V15,V17), halfadder-{F}(V17), P_and1-{F}(V17,V0) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2099: mergings( V2 == V10; #2095 ), references = 1, size of lhs = 25:
% 282.36/282.56 one-{F}(V0), halfadder-{F}(V1), P_and1-{F}(V1,V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), P_in1-{F}(V4,V5), zero-{F}(V6), halfadder-{F}(V7), fulladder-{F}(V8), P_outs-{F}(V8,V0), P_h2-{F}(V8,V1), P_in2-{F}(V8,V6), P_h1-{F}(V8,V7), P_or1-{F}(V8,V9), P_in2-{F}(V9,V5), P_f-{F}(V10), P_h1-{F}(V10,V7), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), P_h2-{F}(V10,V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2101: mergings( V2 == V8; #2096 ), references = 1, size of lhs = 25:
% 282.36/282.56 one-{F}(V0), halfadder-{F}(V1), P_and1-{F}(V1,V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), P_in1-{F}(V4,V5), fulladder-{F}(V6), P_outs-{F}(V6,V0), P_h2-{F}(V6,V1), P_h1-{F}(V6,V7), halfadder-{F}(V7), P_or1-{F}(V6,V8), P_in2-{F}(V8,V5), P_f-{F}(V9), P_h1-{F}(V9,V7), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), P_h2-{F}(V9,V16), P_in1-{F}(V7,V17), zero-{F}(V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2103: mergings( V2 == V10; #2097 ), references = 2, size of lhs = 26:
% 282.36/282.56 one-{F}(V0), halfadder-{F}(V1), P_and1-{F}(V1,V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), P_in1-{F}(V4,V5), zero-{F}(V6), halfadder-{F}(V7), fulladder-{F}(V8), P_outs-{F}(V8,V0), P_h2-{F}(V8,V1), P_in2-{F}(V8,V6), P_h1-{F}(V8,V7), P_or1-{F}(V8,V9), P_in2-{F}(V9,V10), connection-{F}(V10,V5), P_f-{F}(V11), P_h1-{F}(V11,V7), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), P_h2-{F}(V11,V18) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2107: disj( #26, exists( #70, #320 ) ), references = 8, size of lhs = 11:
% 282.36/282.56 logic_not-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_h1-{F}(V1,V9), P_not1-{F}(V9,V0) | not_ok-{T}(V0)
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2153: exists( #65, #2147 ), references = 3, size of lhs = 8:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), zero-{F}(V3), P_in1-{F}(V1,V4), zero-{F}(V4) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2154: exists( #65, #2148 ), references = 2, size of lhs = 13:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), fulladder-{F}(V5), P_f-{F}(V5), P_or1-{F}(V5,V6), P_out1-{F}(V6,V3), P_in1-{F}(V5,V7), P_in2-{F}(V5,V8) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2155: exists( #65, #2149 ), references = 2, size of lhs = 14:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), fulladder-{F}(V5), P_f-{F}(V5), P_or1-{F}(V5,V6), P_out1-{F}(V6,V3), P_in1-{F}(V5,V7), P_in2-{F}(V5,V8), P_outs-{F}(V5,V9) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2165: exists( #64, #2159 ), references = 1, size of lhs = 11:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_or1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in1-{F}(V5,V6), zero-{F}(V6) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2166: exists( #64, #2160 ), references = 1, size of lhs = 16:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_or1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in1-{F}(V5,V6), fulladder-{F}(V7), P_f-{F}(V7), P_or1-{F}(V7,V8), P_out1-{F}(V8,V6), P_in1-{F}(V7,V9), P_in2-{F}(V7,V10) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2167: exists( #64, #2161 ), references = 1, size of lhs = 17:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_or1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in1-{F}(V5,V6), fulladder-{F}(V7), P_f-{F}(V7), P_or1-{F}(V7,V8), P_out1-{F}(V8,V6), P_in1-{F}(V7,V9), P_in2-{F}(V7,V10), P_outs-{F}(V7,V11) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2199: exists( #64, #2197 ), references = 1, size of lhs = 23:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_or1-{F}(V0,V2), logic_and-{F}(V3), P_f-{F}(V4), P_in1-{F}(V4,V5), P_in2-{F}(V4,V6), P_inc-{F}(V4,V7), P_outs-{F}(V4,V8), P_outc-{F}(V4,V9), P_or1-{F}(V4,V10), P_h2-{F}(V4,V11), P_h1-{F}(V4,V12), P_and2-{F}(V12,V3), P_not1-{F}(V12,V13), halfadder-{F}(V14), P_and2-{F}(V14,V3), P_in1-{F}(V14,V15), zero-{F}(V15), halfadder-{F}(V16), P_and2-{F}(V16,V3), P_not1-{F}(V16,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2227: exists( #65, #2221 ), references = 5, size of lhs = 8:
% 282.36/282.56 not_ok-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), halfadder-{F}(V2), P_not1-{F}(V2,V0), P_and1-{F}(V2,V3), P_in2-{F}(V3,V4), zero-{F}(V4) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2228: exists( #65, #2222 ), references = 3, size of lhs = 12:
% 282.36/282.56 not_ok-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), halfadder-{F}(V2), P_not1-{F}(V2,V0), P_and1-{F}(V2,V3), P_in2-{F}(V3,V4), P_f-{F}(V5), P_outc-{F}(V5,V4), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_outs-{F}(V5,V8) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2229: exists( #65, #2223 ), references = 2, size of lhs = 30:
% 282.36/282.56 not_ok-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), halfadder-{F}(V2), P_not1-{F}(V2,V0), P_and1-{F}(V2,V3), P_in2-{F}(V3,V4), halfadder-{F}(V5), P_outs-{F}(V5,V4), P_and1-{F}(V5,V6), halfadder-{F}(V7), P_and1-{F}(V7,V6), P_outs-{F}(V7,V8), connection-{F}(V8,V9), zero-{F}(V10), halfadder-{F}(V11), fulladder-{F}(V12), P_in2-{F}(V12,V10), P_h1-{F}(V12,V11), P_or1-{F}(V12,V13), P_in2-{F}(V13,V9), P_f-{F}(V14), P_h1-{F}(V14,V11), P_in1-{F}(V14,V15), P_in2-{F}(V14,V16), P_inc-{F}(V14,V17), P_outs-{F}(V14,V18), P_outc-{F}(V14,V19), P_or1-{F}(V14,V20), P_h2-{F}(V14,V21) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2239: exists( #64, #2233 ), references = 4, size of lhs = 11:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), zero-{F}(V6) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2240: exists( #64, #2234 ), references = 2, size of lhs = 15:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), P_f-{F}(V7), P_outc-{F}(V7,V6), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_outs-{F}(V7,V10) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2241: exists( #64, #2235 ), references = 1, size of lhs = 33:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), halfadder-{F}(V7), P_outs-{F}(V7,V6), P_and1-{F}(V7,V8), halfadder-{F}(V9), P_and1-{F}(V9,V8), P_outs-{F}(V9,V10), connection-{F}(V10,V11), zero-{F}(V12), halfadder-{F}(V13), fulladder-{F}(V14), P_in2-{F}(V14,V12), P_h1-{F}(V14,V13), P_or1-{F}(V14,V15), P_in2-{F}(V15,V11), P_f-{F}(V16), P_h1-{F}(V16,V13), P_in1-{F}(V16,V17), P_in2-{F}(V16,V18), P_inc-{F}(V16,V19), P_outs-{F}(V16,V20), P_outc-{F}(V16,V21), P_or1-{F}(V16,V22), P_h2-{F}(V16,V23) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2252: disj( #20, input ), references = 6, size of lhs = 14:
% 282.36/282.56 logic_or-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_not1-{F}(V8,V9), P_and2-{F}(V8,V10), P_and1-{F}(V8,V11), P_h1-{F}(V1,V12), P_or1-{F}(V12,V0) | or_ok-{T}(V0)
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2253: disj( #20, exists( #68, #1874 ) ), references = 1, size of lhs = 14:
% 282.36/282.56 logic_or-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_not1-{F}(V8,V9), P_and2-{F}(V8,V10), P_and1-{F}(V8,V11), P_h1-{F}(V1,V12), P_and1-{F}(V12,V0) | or_ok-{T}(V0)
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2254: disj( #20, exists( #69, #1872 ) ), references = 1, size of lhs = 15:
% 282.36/282.56 logic_or-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_not1-{F}(V8,V9), P_and2-{F}(V8,V10), P_and1-{F}(V8,V11), P_h1-{F}(V1,V12), P_and1-{F}(V12,V0), P_and2-{F}(V12,V13) | or_ok-{T}(V0)
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2264: exists( #69, #2258 ), references = 2, size of lhs = 17:
% 282.36/282.56 logic_or-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_and2-{F}(V8,V9), P_and1-{F}(V8,V10), P_h1-{F}(V1,V11), P_or1-{F}(V11,V0), P_in2-{F}(V0,V12), one-{F}(V12), P_out1-{F}(V0,V13), zero-{F}(V13) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2270: mergings( V3 == V15, V4 == V16, V5 == V17, V7 == V18, V8 == V14; #2262 ), references = 1, size of lhs = 16:
% 282.36/282.56 logic_or-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_out1-{F}(V0,V2), P_f-{F}(V3), P_outc-{F}(V3,V2), P_inc-{F}(V3,V4), P_or1-{F}(V3,V5), P_h2-{F}(V3,V6), P_and2-{F}(V6,V7), P_and1-{F}(V6,V8), P_h1-{F}(V3,V9), P_or1-{F}(V9,V0), P_in1-{F}(V3,V10), P_in2-{F}(V3,V11), P_outs-{F}(V3,V12) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2280: mergings( V3 == V17, V4 == V21, V5 == V22, V9 == V19, V7 == V23, V8 == V16, V0 == V20, V10 == V15, V6 == V18; #2263 ), references = 1, size of lhs = 19:
% 282.36/282.56 logic_or-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_out1-{F}(V0,V2), logic_and-{F}(V3), P_out1-{F}(V3,V2), P_in2-{F}(V3,V4), P_f-{F}(V5), P_outc-{F}(V5,V4), P_h1-{F}(V5,V6), P_or1-{F}(V6,V0), P_inc-{F}(V5,V7), P_or1-{F}(V5,V8), P_h2-{F}(V5,V9), P_and2-{F}(V9,V3), P_and1-{F}(V9,V10), P_in1-{F}(V5,V11), P_in2-{F}(V5,V12), P_outs-{F}(V5,V13) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2284: exists( #68, #2261 ), references = 2, size of lhs = 16:
% 282.36/282.56 logic_or-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_and1-{F}(V8,V9), P_h1-{F}(V1,V10), P_or1-{F}(V10,V0), P_in2-{F}(V0,V11), one-{F}(V11), P_out1-{F}(V0,V12), zero-{F}(V12) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2290: mergings( V3 == V14, V4 == V15, V5 == V16, V7 == V17, V8 == V13; #2283 ), references = 1, size of lhs = 15:
% 282.36/282.56 logic_or-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_out1-{F}(V0,V2), P_f-{F}(V3), P_outc-{F}(V3,V2), P_inc-{F}(V3,V4), P_or1-{F}(V3,V5), P_h2-{F}(V3,V6), P_and1-{F}(V6,V7), P_h1-{F}(V3,V8), P_or1-{F}(V8,V0), P_in1-{F}(V3,V9), P_in2-{F}(V3,V10), P_outs-{F}(V3,V11) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2293: exists( #67, #2282 ), references = 2, size of lhs = 15:
% 282.36/282.56 logic_or-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_h1-{F}(V1,V9), P_or1-{F}(V9,V0), P_in2-{F}(V0,V10), one-{F}(V10), P_out1-{F}(V0,V11), zero-{F}(V11) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2299: mergings( V3 == V13, V4 == V14, V5 == V15, V7 == V16, V8 == V12; #2292 ), references = 1, size of lhs = 14:
% 282.36/282.56 logic_or-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_out1-{F}(V0,V2), P_f-{F}(V3), P_outc-{F}(V3,V2), P_inc-{F}(V3,V4), P_or1-{F}(V3,V5), P_h2-{F}(V3,V6), P_h1-{F}(V3,V7), P_or1-{F}(V7,V0), P_in1-{F}(V3,V8), P_in2-{F}(V3,V9), P_outs-{F}(V3,V10) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2377: exists( #64, #2371 ), references = 1, size of lhs = 8:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_in1-{F}(V3,V4), one-{F}(V4) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2378: exists( #64, #2372 ), references = 1, size of lhs = 17:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_in1-{F}(V3,V4), halfadder-{F}(V5), P_and2-{F}(V5,V6), P_out1-{F}(V6,V7), zero-{F}(V7), P_not1-{F}(V5,V8), not_ok-{F}(V8), halfadder-{F}(V9), P_not1-{F}(V9,V8), P_and1-{F}(V9,V10), P_in2-{F}(V10,V4) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2400: exists( #66, #2394 ), references = 5, size of lhs = 17:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_or1-{F}(V0,V2), logic_or-{F}(V2), P_f-{F}(V3), P_in1-{F}(V3,V4), P_in2-{F}(V3,V5), P_inc-{F}(V3,V6), P_outs-{F}(V3,V7), P_outc-{F}(V3,V8), P_or1-{F}(V3,V9), P_h2-{F}(V3,V10), P_h1-{F}(V3,V11), P_or1-{F}(V11,V2), P_out1-{F}(V2,V12), zero-{F}(V12) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2401: exists( #66, #2395 ), references = 3, size of lhs = 18:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_or1-{F}(V0,V2), logic_or-{F}(V2), P_f-{F}(V3), P_in1-{F}(V3,V4), P_in2-{F}(V3,V5), P_inc-{F}(V3,V6), P_outs-{F}(V3,V7), P_outc-{F}(V3,V8), P_or1-{F}(V3,V9), P_h2-{F}(V3,V10), P_and1-{F}(V10,V11), P_h1-{F}(V3,V12), P_or1-{F}(V12,V2), P_out1-{F}(V2,V13), zero-{F}(V13) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2402: exists( #66, #2396 ), references = 3, size of lhs = 19:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_or1-{F}(V0,V2), logic_or-{F}(V2), P_f-{F}(V3), P_in1-{F}(V3,V4), P_in2-{F}(V3,V5), P_inc-{F}(V3,V6), P_outs-{F}(V3,V7), P_outc-{F}(V3,V8), P_or1-{F}(V3,V9), P_h2-{F}(V3,V10), P_and2-{F}(V10,V11), P_and1-{F}(V10,V12), P_h1-{F}(V3,V13), P_or1-{F}(V13,V2), P_out1-{F}(V2,V14), zero-{F}(V14) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2421: exists( #65, #2415 ), references = 4, size of lhs = 20:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), logic_or-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), zero-{F}(V3), halfadder-{F}(V4), P_or1-{F}(V4,V1), P_in2-{F}(V4,V5), one-{F}(V5), P_f-{F}(V6), P_in1-{F}(V6,V7), P_in2-{F}(V6,V8), P_inc-{F}(V6,V9), P_outs-{F}(V6,V10), P_outc-{F}(V6,V11), P_or1-{F}(V6,V12), P_h2-{F}(V6,V13), P_h1-{F}(V6,V14), P_or1-{F}(V14,V1) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2424: exists( #70, #2422 ), references = 6, size of lhs = 15:
% 282.36/282.56 zero-{F}(V0), halfadder-{F}(V1), P_and1-{F}(V1,V2), P_in1-{F}(V2,V0), P_in2-{F}(V1,V3), one-{F}(V3), P_f-{F}(V4), P_h1-{F}(V4,V1), P_in1-{F}(V4,V5), P_in2-{F}(V4,V6), P_inc-{F}(V4,V7), P_outs-{F}(V4,V8), P_outc-{F}(V4,V9), P_or1-{F}(V4,V10), P_h2-{F}(V4,V11) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2432: exists( #69, #2430 ), references = 2, size of lhs = 16:
% 282.36/282.56 P_f-{F}(V0), P_in1-{F}(V0,V1), P_in2-{F}(V0,V2), P_inc-{F}(V0,V3), P_outs-{F}(V0,V4), P_outc-{F}(V0,V5), P_or1-{F}(V0,V6), P_h2-{F}(V0,V7), P_h1-{F}(V0,V8), halfadder-{F}(V8), P_and2-{F}(V8,V9), P_out1-{F}(V9,V10), zero-{F}(V10), P_and1-{F}(V8,V11), P_in2-{F}(V11,V12), zero-{F}(V12) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2473: exists( #64, #2467 ), references = 1, size of lhs = 27:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), P_and2-{F}(V0,V2), one-{F}(V3), halfadder-{F}(V4), P_and1-{F}(V4,V5), halfadder-{F}(V6), P_and2-{F}(V6,V5), P_not1-{F}(V6,V2), zero-{F}(V7), halfadder-{F}(V8), fulladder-{F}(V9), P_outs-{F}(V9,V3), P_h2-{F}(V9,V4), P_in2-{F}(V9,V7), P_h1-{F}(V9,V8), P_or1-{F}(V9,V10), P_in2-{F}(V10,V1), P_f-{F}(V11), P_h1-{F}(V11,V8), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), P_h2-{F}(V11,V18) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2495: exists( #64, #2491 ), references = 1, size of lhs = 10:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in2-{F}(V4,V5), zero-{F}(V5) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2496: exists( #64, #2492 ), references = 1, size of lhs = 14:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in2-{F}(V4,V5), P_f-{F}(V6), P_outc-{F}(V6,V5), P_in1-{F}(V6,V7), P_in2-{F}(V6,V8), P_outs-{F}(V6,V9) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2552: exists( #65, #2546 ), references = 3, size of lhs = 18:
% 282.36/282.56 halfadder-{F}(V0), P_outc-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), P_f-{F}(V3), P_in1-{F}(V3,V4), P_in2-{F}(V3,V5), P_inc-{F}(V3,V6), P_outs-{F}(V3,V7), P_outc-{F}(V3,V8), P_or1-{F}(V3,V9), P_h2-{F}(V3,V10), P_h1-{F}(V3,V11), halfadder-{F}(V11), P_and2-{F}(V11,V2), P_and1-{F}(V11,V12), P_in2-{F}(V12,V13), zero-{F}(V13) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2553: exists( #65, #2547 ), references = 1, size of lhs = 13:
% 282.36/282.56 halfadder-{F}(V0), P_outc-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), zero-{F}(V7) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2554: exists( #65, #2548 ), references = 1, size of lhs = 17:
% 282.36/282.56 halfadder-{F}(V0), P_outc-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), P_f-{F}(V8), P_outc-{F}(V8,V7), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_outs-{F}(V8,V11) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2564: exists( #72, #2558 ), references = 3, size of lhs = 21:
% 282.36/282.56 fulladder-{F}(V0), P_h1-{F}(V0,V1), halfadder-{F}(V1), P_or1-{F}(V0,V2), P_in2-{F}(V2,V3), zero-{F}(V3), P_and2-{F}(V1,V4), P_f-{F}(V5), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), P_h2-{F}(V5,V12), P_h1-{F}(V5,V13), halfadder-{F}(V13), P_and2-{F}(V13,V4), P_and1-{F}(V13,V14), P_in2-{F}(V14,V15), zero-{F}(V15) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2566: exists( #68, #2561 ), references = 4, size of lhs = 18:
% 282.36/282.56 fulladder-{F}(V0), P_h1-{F}(V0,V1), halfadder-{F}(V1), P_or1-{F}(V0,V2), P_in2-{F}(V2,V3), zero-{F}(V3), P_f-{F}(V4), P_h1-{F}(V4,V1), P_in1-{F}(V4,V5), P_in2-{F}(V4,V6), P_inc-{F}(V4,V7), P_outs-{F}(V4,V8), P_outc-{F}(V4,V9), P_or1-{F}(V4,V10), P_h2-{F}(V4,V11), P_and1-{F}(V1,V12), P_in2-{F}(V12,V13), zero-{F}(V13) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2618: exists( #72, #2616 ), references = 3, size of lhs = 9:
% 282.36/282.56 fulladder-{F}(V0), P_h2-{F}(V0,V1), halfadder-{F}(V1), P_or1-{F}(V0,V2), P_in1-{F}(V2,V3), zero-{F}(V3), P_and2-{F}(V1,V4), P_out1-{F}(V4,V5), one-{F}(V5) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2648: exists( #65, #2642 ), references = 2, size of lhs = 19:
% 282.36/282.56 halfadder-{F}(V0), P_outc-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), logic_or-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_in2-{F}(V3,V4), one-{F}(V4), P_f-{F}(V5), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), P_h2-{F}(V5,V12), P_h1-{F}(V5,V13), P_or1-{F}(V13,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2652: exists( #72, #2650 ), references = 1, size of lhs = 22:
% 282.36/282.56 fulladder-{F}(V0), P_h1-{F}(V0,V1), halfadder-{F}(V1), P_or1-{F}(V0,V2), P_in2-{F}(V2,V3), zero-{F}(V3), P_and2-{F}(V1,V4), logic_or-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V4), P_in2-{F}(V5,V6), one-{F}(V6), P_f-{F}(V7), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), P_h2-{F}(V7,V14), P_h1-{F}(V7,V15), P_or1-{F}(V15,V4) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2693: exists( #65, #2689 ), references = 4, size of lhs = 9:
% 282.36/282.56 halfadder-{F}(V0), P_outc-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in2-{F}(V4,V5), one-{F}(V5) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2697: exists( #66, #2695 ), references = 3, size of lhs = 12:
% 282.36/282.56 fulladder-{F}(V0), P_h1-{F}(V0,V1), P_outs-{F}(V1,V2), one-{F}(V2), P_h2-{F}(V0,V3), halfadder-{F}(V4), P_outc-{F}(V4,V5), zero-{F}(V5), P_and2-{F}(V4,V6), halfadder-{F}(V7), P_not1-{F}(V7,V6), P_and1-{F}(V7,V3) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2703: mergings( V2 == V5, V0 == V6; #2700 ), references = 3, size of lhs = 13:
% 282.36/282.56 halfadder-{F}(V0), zero-{F}(V1), fulladder-{F}(V2), P_h1-{F}(V2,V0), P_or1-{F}(V2,V3), P_in2-{F}(V3,V1), P_outs-{F}(V0,V4), one-{F}(V4), P_h2-{F}(V2,V5), P_and2-{F}(V0,V6), halfadder-{F}(V7), P_not1-{F}(V7,V6), P_and1-{F}(V7,V5) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2721: mergings( V2 == V5, V3 == V6; #2716 ), references = 3, size of lhs = 19:
% 282.36/282.56 zero-{F}(V0), fulladder-{F}(V1), P_h2-{F}(V1,V2), P_h1-{F}(V1,V3), P_outs-{F}(V3,V0), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_or1-{F}(V1,V4), P_in2-{F}(V4,V5), zero-{F}(V5), P_f-{F}(V6), P_h1-{F}(V6,V3), P_in1-{F}(V6,V7), P_in2-{F}(V6,V8), P_inc-{F}(V6,V9), P_outs-{F}(V6,V10), P_outc-{F}(V6,V11), P_or1-{F}(V6,V12), P_h2-{F}(V6,V13) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2722: exists( #66, #2714 ), references = 3, size of lhs = 21:
% 282.36/282.56 fulladder-{F}(V0), P_h1-{F}(V0,V1), P_outs-{F}(V1,V2), zero-{F}(V2), P_h2-{F}(V0,V3), halfadder-{F}(V4), P_outc-{F}(V4,V5), zero-{F}(V5), P_and2-{F}(V4,V6), P_f-{F}(V7), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), P_h2-{F}(V7,V14), P_h1-{F}(V7,V15), halfadder-{F}(V15), P_and2-{F}(V15,V6), P_and1-{F}(V15,V3) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2725: mergings( V2 == V5, V3 == V6; #2718 ), references = 3, size of lhs = 22:
% 282.36/282.56 zero-{F}(V0), fulladder-{F}(V1), P_h2-{F}(V1,V2), P_h1-{F}(V1,V3), P_outs-{F}(V3,V0), halfadder-{F}(V3), P_or1-{F}(V1,V4), P_in2-{F}(V4,V5), zero-{F}(V5), P_and2-{F}(V3,V6), P_f-{F}(V7), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), P_h2-{F}(V7,V14), P_h1-{F}(V7,V15), halfadder-{F}(V15), P_and2-{F}(V15,V6), P_and1-{F}(V15,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2807: mergings( V2 == V8, V0 == V10; #2802 ), references = 1, size of lhs = 17:
% 282.36/282.56 one-{F}(V0), halfadder-{F}(V1), P_and1-{F}(V1,V2), P_out1-{F}(V2,V3), halfadder-{F}(V4), P_outs-{F}(V4,V3), zero-{F}(V5), fulladder-{F}(V6), P_outs-{F}(V6,V0), P_h1-{F}(V6,V4), P_h2-{F}(V6,V1), P_or1-{F}(V6,V7), P_in2-{F}(V7,V5), P_and2-{F}(V4,V8), halfadder-{F}(V9), P_not1-{F}(V9,V8), P_and1-{F}(V9,V1) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2810: mergings( V2 == V6, V0 == V8; #2803 ), references = 1, size of lhs = 16:
% 282.36/282.56 one-{F}(V0), halfadder-{F}(V1), P_and1-{F}(V1,V2), P_out1-{F}(V2,V3), fulladder-{F}(V4), P_outs-{F}(V4,V0), P_h2-{F}(V4,V1), P_h1-{F}(V4,V5), P_outs-{F}(V5,V3), halfadder-{F}(V6), P_outc-{F}(V6,V7), zero-{F}(V7), P_and2-{F}(V6,V8), halfadder-{F}(V9), P_not1-{F}(V9,V8), P_and1-{F}(V9,V1) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2811: exists( #71, #2801 ), references = 1, size of lhs = 15:
% 282.36/282.56 fulladder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_h2-{F}(V0,V2), halfadder-{F}(V2), P_and1-{F}(V2,V3), P_out1-{F}(V3,V4), halfadder-{F}(V5), P_outc-{F}(V5,V6), zero-{F}(V6), P_and2-{F}(V5,V7), halfadder-{F}(V8), P_not1-{F}(V8,V7), P_and1-{F}(V8,V9), P_in2-{F}(V9,V4) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2884: mergings( V2 == V7, V3 == V10, V0 == V8; #2878 ), references = 1, size of lhs = 23:
% 282.36/282.56 halfadder-{F}(V0), zero-{F}(V1), P_and2-{F}(V0,V2), P_out1-{F}(V2,V3), fulladder-{F}(V4), P_h2-{F}(V4,V0), P_h1-{F}(V4,V5), P_outs-{F}(V5,V3), halfadder-{F}(V5), P_and1-{F}(V5,V0), P_or1-{F}(V4,V6), P_in1-{F}(V6,V1), P_in2-{F}(V6,V7), zero-{F}(V7), P_f-{F}(V8), P_h1-{F}(V8,V5), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14), P_h2-{F}(V8,V15) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2888: mergings( V2 == V7, V3 == V10, V0 == V8; #2879 ), references = 1, size of lhs = 26:
% 282.36/282.56 halfadder-{F}(V0), zero-{F}(V1), P_and2-{F}(V0,V2), P_out1-{F}(V2,V3), fulladder-{F}(V4), P_h2-{F}(V4,V0), P_h1-{F}(V4,V5), P_outs-{F}(V5,V3), halfadder-{F}(V5), P_or1-{F}(V4,V6), P_in1-{F}(V6,V1), P_in2-{F}(V6,V7), zero-{F}(V7), P_and2-{F}(V5,V8), P_f-{F}(V9), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), P_h2-{F}(V9,V16), P_h1-{F}(V9,V17), halfadder-{F}(V17), P_and2-{F}(V17,V8), P_and1-{F}(V17,V0) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2891: mergings( V2 == V7, V0 == V9; #2880 ), references = 1, size of lhs = 26:
% 282.36/282.56 halfadder-{F}(V0), zero-{F}(V1), P_and2-{F}(V0,V2), P_out1-{F}(V2,V3), fulladder-{F}(V4), P_h2-{F}(V4,V0), P_or1-{F}(V4,V5), P_in1-{F}(V5,V1), P_h1-{F}(V4,V6), P_outs-{F}(V6,V3), halfadder-{F}(V7), P_outc-{F}(V7,V8), zero-{F}(V8), P_and2-{F}(V7,V9), P_f-{F}(V10), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), P_h2-{F}(V10,V17), P_h1-{F}(V10,V18), halfadder-{F}(V18), P_and2-{F}(V18,V9), P_and1-{F}(V18,V0) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2927: exists( #65, #2923 ), references = 2, size of lhs = 7:
% 282.36/282.56 halfadder-{F}(V0), P_outc-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), not_ok-{F}(V2), P_in1-{F}(V2,V3), zero-{F}(V3) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2929: mergings( V2 == V3; #2925 ), references = 1, size of lhs = 17:
% 282.36/282.56 not_ok-{F}(V0), logic_and-{F}(V0), zero-{F}(V1), P_in1-{F}(V0,V1), P_f-{F}(V2), P_outc-{F}(V2,V1), P_inc-{F}(V2,V3), P_or1-{F}(V2,V4), P_h2-{F}(V2,V5), P_not1-{F}(V5,V6), P_and2-{F}(V5,V7), P_and1-{F}(V5,V8), P_h1-{F}(V2,V9), P_and2-{F}(V9,V0), P_in1-{F}(V2,V10), P_in2-{F}(V2,V11), P_outs-{F}(V2,V12) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2931: mergings( V2 == V3; #2926 ), references = 1, size of lhs = 18:
% 282.36/282.56 not_ok-{F}(V0), logic_and-{F}(V0), zero-{F}(V1), P_in1-{F}(V0,V1), P_f-{F}(V2), P_outc-{F}(V2,V1), P_inc-{F}(V2,V3), P_or1-{F}(V2,V4), P_h2-{F}(V2,V5), P_not1-{F}(V5,V6), P_and2-{F}(V5,V7), P_and1-{F}(V5,V8), P_h1-{F}(V2,V9), P_and2-{F}(V9,V0), P_not1-{F}(V9,V10), P_in1-{F}(V2,V11), P_in2-{F}(V2,V12), P_outs-{F}(V2,V13) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2939: exists( #64, #2937 ), references = 1, size of lhs = 9:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_outc-{F}(V3,V4), zero-{F}(V4) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2943: exists( #72, #2941 ), references = 1, size of lhs = 12:
% 282.36/282.56 fulladder-{F}(V0), P_h1-{F}(V0,V1), halfadder-{F}(V1), P_or1-{F}(V0,V2), P_in2-{F}(V2,V3), zero-{F}(V3), halfadder-{F}(V4), P_in1-{F}(V4,V5), zero-{F}(V5), P_and2-{F}(V4,V6), not_ok-{F}(V6), P_and2-{F}(V1,V6) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #2962: exists( #64, #2958 ), references = 1, size of lhs = 23:
% 282.36/282.56 fulladder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_h2-{F}(V0,V2), logic_and-{F}(V3), P_f-{F}(V4), P_in1-{F}(V4,V5), P_in2-{F}(V4,V6), P_inc-{F}(V4,V7), P_outs-{F}(V4,V8), P_outc-{F}(V4,V9), P_or1-{F}(V4,V10), P_h2-{F}(V4,V11), P_h1-{F}(V4,V12), P_and2-{F}(V12,V3), P_not1-{F}(V12,V13), halfadder-{F}(V14), P_and2-{F}(V14,V3), P_in1-{F}(V14,V15), zero-{F}(V15), halfadder-{F}(V16), P_and2-{F}(V16,V3), P_not1-{F}(V16,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3030: exists( #64, #3024 ), references = 1, size of lhs = 8:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_in1-{F}(V3,V4), one-{F}(V4) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3031: exists( #64, #3025 ), references = 1, size of lhs = 21:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_in1-{F}(V3,V4), halfadder-{F}(V5), P_and1-{F}(V5,V6), P_in1-{F}(V6,V4), P_in2-{F}(V5,V7), one-{F}(V7), P_f-{F}(V8), P_h1-{F}(V8,V5), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14), P_h2-{F}(V8,V15) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3032: exists( #64, #3026 ), references = 1, size of lhs = 26:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_in1-{F}(V3,V4), halfadder-{F}(V5), P_or1-{F}(V5,V6), logic_or-{F}(V6), P_and1-{F}(V5,V7), P_in1-{F}(V7,V4), halfadder-{F}(V8), P_or1-{F}(V8,V6), P_in2-{F}(V8,V9), one-{F}(V9), P_f-{F}(V10), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), P_h2-{F}(V10,V17), P_h1-{F}(V10,V18), P_or1-{F}(V18,V6) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3063: exists( #65, #3057 ), references = 2, size of lhs = 13:
% 282.36/282.56 and_ok-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), halfadder-{F}(V2), P_and2-{F}(V2,V0), P_not1-{F}(V2,V3), and_ok-{F}(V3), fulladder-{F}(V4), P_outs-{F}(V4,V5), one-{F}(V5), P_h2-{F}(V4,V6), halfadder-{F}(V6), P_and1-{F}(V6,V3) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3064: exists( #65, #3058 ), references = 2, size of lhs = 25:
% 282.36/282.56 and_ok-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), logic_and-{F}(V2), P_f-{F}(V3), P_in1-{F}(V3,V4), P_in2-{F}(V3,V5), P_inc-{F}(V3,V6), P_outs-{F}(V3,V7), P_outc-{F}(V3,V8), P_or1-{F}(V3,V9), P_h2-{F}(V3,V10), P_and1-{F}(V10,V11), P_h1-{F}(V3,V12), P_not1-{F}(V12,V2), P_or1-{F}(V12,V13), halfadder-{F}(V14), P_not1-{F}(V14,V2), P_and2-{F}(V14,V0), fulladder-{F}(V15), P_outs-{F}(V15,V16), one-{F}(V16), P_h2-{F}(V15,V17), halfadder-{F}(V17), P_and1-{F}(V17,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3065: exists( #65, #3059 ), references = 2, size of lhs = 26:
% 282.36/282.56 and_ok-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), logic_and-{F}(V2), P_f-{F}(V3), P_in1-{F}(V3,V4), P_in2-{F}(V3,V5), P_inc-{F}(V3,V6), P_outs-{F}(V3,V7), P_outc-{F}(V3,V8), P_or1-{F}(V3,V9), P_h2-{F}(V3,V10), P_and2-{F}(V10,V11), P_and1-{F}(V10,V12), P_h1-{F}(V3,V13), P_not1-{F}(V13,V2), P_or1-{F}(V13,V14), halfadder-{F}(V15), P_not1-{F}(V15,V2), P_and2-{F}(V15,V0), fulladder-{F}(V16), P_outs-{F}(V16,V17), one-{F}(V17), P_h2-{F}(V16,V18), halfadder-{F}(V18), P_and1-{F}(V18,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3075: exists( #64, #3069 ), references = 1, size of lhs = 15:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), and_ok-{F}(V4), fulladder-{F}(V5), P_outs-{F}(V5,V6), one-{F}(V6), P_h2-{F}(V5,V7), halfadder-{F}(V7), P_and1-{F}(V7,V4) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3076: exists( #64, #3070 ), references = 1, size of lhs = 27:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), logic_and-{F}(V3), P_f-{F}(V4), P_in1-{F}(V4,V5), P_in2-{F}(V4,V6), P_inc-{F}(V4,V7), P_outs-{F}(V4,V8), P_outc-{F}(V4,V9), P_or1-{F}(V4,V10), P_h2-{F}(V4,V11), P_and1-{F}(V11,V12), P_h1-{F}(V4,V13), P_not1-{F}(V13,V3), P_or1-{F}(V13,V14), halfadder-{F}(V15), P_not1-{F}(V15,V3), P_and2-{F}(V15,V2), fulladder-{F}(V16), P_outs-{F}(V16,V17), one-{F}(V17), P_h2-{F}(V16,V18), halfadder-{F}(V18), P_and1-{F}(V18,V3) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3077: exists( #64, #3071 ), references = 1, size of lhs = 28:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), logic_and-{F}(V3), P_f-{F}(V4), P_in1-{F}(V4,V5), P_in2-{F}(V4,V6), P_inc-{F}(V4,V7), P_outs-{F}(V4,V8), P_outc-{F}(V4,V9), P_or1-{F}(V4,V10), P_h2-{F}(V4,V11), P_and2-{F}(V11,V12), P_and1-{F}(V11,V13), P_h1-{F}(V4,V14), P_not1-{F}(V14,V3), P_or1-{F}(V14,V15), halfadder-{F}(V16), P_not1-{F}(V16,V3), P_and2-{F}(V16,V2), fulladder-{F}(V17), P_outs-{F}(V17,V18), one-{F}(V18), P_h2-{F}(V17,V19), halfadder-{F}(V19), P_and1-{F}(V19,V3) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3097: mergings( V3 == V18, V4 == V19, V5 == V20, V9 == V24, V7 == V22, V8 == V23, V12 == V27, V14 == V17, V13 == V28, V0 == V25, V11 == V26, V6 == V21; #3082 ), references = 1, size of lhs = 29:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), logic_and-{F}(V3), P_f-{F}(V4), P_in1-{F}(V4,V5), P_in2-{F}(V4,V6), P_inc-{F}(V4,V7), P_outs-{F}(V4,V8), P_outc-{F}(V4,V9), P_or1-{F}(V4,V10), P_h2-{F}(V4,V11), P_and2-{F}(V11,V12), P_and1-{F}(V11,V13), P_h1-{F}(V4,V14), P_and2-{F}(V14,V0), P_not1-{F}(V14,V3), P_or1-{F}(V14,V15), halfadder-{F}(V16), P_not1-{F}(V16,V3), P_and2-{F}(V16,V0), fulladder-{F}(V17), P_outs-{F}(V17,V18), one-{F}(V18), P_h2-{F}(V17,V19), halfadder-{F}(V19), P_and1-{F}(V19,V3) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3111: mergings( V3 == V18, V4 == V19, V5 == V20, V9 == V24, V7 == V22, V8 == V23, V12 == V28, V14 == V17, V13 == V29, V0 == V25, V11 == V27, V10 == V26, V6 == V21; #3083 ), references = 1, size of lhs = 29:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), logic_and-{F}(V3), P_f-{F}(V4), P_in1-{F}(V4,V5), P_in2-{F}(V4,V6), P_inc-{F}(V4,V7), P_outs-{F}(V4,V8), P_outc-{F}(V4,V9), P_or1-{F}(V4,V10), P_h2-{F}(V4,V11), P_and2-{F}(V11,V12), P_and1-{F}(V11,V13), P_h1-{F}(V4,V14), P_and2-{F}(V14,V0), P_not1-{F}(V14,V3), P_or1-{F}(V14,V15), halfadder-{F}(V16), P_not1-{F}(V16,V3), P_and2-{F}(V16,V0), fulladder-{F}(V17), P_outs-{F}(V17,V18), one-{F}(V18), P_h2-{F}(V17,V19), halfadder-{F}(V19), P_and1-{F}(V19,V3) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3124: mergings( V11 == V23, V10 == V22, V3 == V15, V4 == V16, V5 == V17, V9 == V21, V7 == V19, V8 == V20, V12 == V24, V2 == V26, V13 == V25, V6 == V18; #3084 ), references = 1, size of lhs = 29:
% 282.36/282.56 logic_and-{F}(V0), logic_and-{F}(V1), P_f-{F}(V2), P_h2-{F}(V2,V3), P_in1-{F}(V2,V4), P_in2-{F}(V2,V5), P_inc-{F}(V2,V6), P_outs-{F}(V2,V7), P_outc-{F}(V2,V8), P_or1-{F}(V2,V9), P_and2-{F}(V3,V10), P_and1-{F}(V3,V11), P_h1-{F}(V2,V12), P_and2-{F}(V12,V1), P_not1-{F}(V12,V0), P_or1-{F}(V12,V13), halfadder-{F}(V14), P_and2-{F}(V14,V1), P_in1-{F}(V14,V15), zero-{F}(V15), halfadder-{F}(V16), P_and2-{F}(V16,V1), P_not1-{F}(V16,V0), fulladder-{F}(V17), P_outs-{F}(V17,V18), one-{F}(V18), P_h2-{F}(V17,V19), halfadder-{F}(V19), P_and1-{F}(V19,V0) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3140: mergings( V3 == V17, V4 == V18, V5 == V19, V9 == V23, V7 == V21, V8 == V22, V11 == V26, V13 == V16, V12 == V27, V0 == V24, V10 == V25, V6 == V20; #3125 ), references = 1, size of lhs = 28:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), logic_and-{F}(V3), P_f-{F}(V4), P_in1-{F}(V4,V5), P_in2-{F}(V4,V6), P_inc-{F}(V4,V7), P_outs-{F}(V4,V8), P_outc-{F}(V4,V9), P_or1-{F}(V4,V10), P_h2-{F}(V4,V11), P_and1-{F}(V11,V12), P_h1-{F}(V4,V13), P_and2-{F}(V13,V0), P_not1-{F}(V13,V3), P_or1-{F}(V13,V14), halfadder-{F}(V15), P_not1-{F}(V15,V3), P_and2-{F}(V15,V0), fulladder-{F}(V16), P_outs-{F}(V16,V17), one-{F}(V17), P_h2-{F}(V16,V18), halfadder-{F}(V18), P_and1-{F}(V18,V3) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3152: mergings( V10 == V24, V3 == V17, V4 == V18, V5 == V19, V9 == V23, V7 == V21, V8 == V22, V11 == V25, V13 == V16, V12 == V26, V6 == V20; #3126 ), references = 1, size of lhs = 28:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), logic_and-{F}(V3), P_f-{F}(V4), P_h2-{F}(V4,V5), P_in1-{F}(V4,V6), P_in2-{F}(V4,V7), P_inc-{F}(V4,V8), P_outs-{F}(V4,V9), P_outc-{F}(V4,V10), P_or1-{F}(V4,V11), P_and1-{F}(V5,V12), P_h1-{F}(V4,V13), P_and2-{F}(V13,V0), P_not1-{F}(V13,V3), P_or1-{F}(V13,V14), halfadder-{F}(V15), P_not1-{F}(V15,V3), P_and2-{F}(V15,V0), fulladder-{F}(V16), P_outs-{F}(V16,V17), one-{F}(V17), P_h2-{F}(V16,V18), halfadder-{F}(V18), P_and1-{F}(V18,V3) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3164: mergings( V10 == V21, V3 == V14, V4 == V15, V5 == V16, V9 == V20, V7 == V18, V8 == V19, V11 == V22, V2 == V24, V12 == V23, V6 == V17; #3127 ), references = 1, size of lhs = 28:
% 282.36/282.56 logic_and-{F}(V0), logic_and-{F}(V1), P_f-{F}(V2), P_h2-{F}(V2,V3), P_in1-{F}(V2,V4), P_in2-{F}(V2,V5), P_inc-{F}(V2,V6), P_outs-{F}(V2,V7), P_outc-{F}(V2,V8), P_or1-{F}(V2,V9), P_and1-{F}(V3,V10), P_h1-{F}(V2,V11), P_and2-{F}(V11,V1), P_not1-{F}(V11,V0), P_or1-{F}(V11,V12), halfadder-{F}(V13), P_and2-{F}(V13,V1), P_in1-{F}(V13,V14), zero-{F}(V14), halfadder-{F}(V15), P_and2-{F}(V15,V1), P_not1-{F}(V15,V0), fulladder-{F}(V16), P_outs-{F}(V16,V17), one-{F}(V17), P_h2-{F}(V16,V18), halfadder-{F}(V18), P_and1-{F}(V18,V0) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3195: exists( #64, #3191 ), references = 1, size of lhs = 11:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), fulladder-{F}(V3), P_outs-{F}(V3,V4), one-{F}(V4), P_h2-{F}(V3,V5), halfadder-{F}(V5), P_and1-{F}(V5,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3198: exists( #69, #3196 ), references = 1, size of lhs = 25:
% 282.36/282.56 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_and2-{F}(V8,V9), P_and1-{F}(V8,V10), P_h1-{F}(V1,V11), P_and2-{F}(V11,V0), P_or1-{F}(V11,V12), P_not1-{F}(V11,V13), halfadder-{F}(V14), P_and2-{F}(V14,V0), P_in1-{F}(V14,V15), zero-{F}(V15), fulladder-{F}(V16), P_outs-{F}(V16,V17), one-{F}(V17), P_h2-{F}(V16,V18), halfadder-{F}(V18), P_and1-{F}(V18,V0) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3200: exists( #68, #3197 ), references = 1, size of lhs = 24:
% 282.36/282.56 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_and1-{F}(V8,V9), P_h1-{F}(V1,V10), P_and2-{F}(V10,V0), P_or1-{F}(V10,V11), P_not1-{F}(V10,V12), halfadder-{F}(V13), P_and2-{F}(V13,V0), P_in1-{F}(V13,V14), zero-{F}(V14), fulladder-{F}(V15), P_outs-{F}(V15,V16), one-{F}(V16), P_h2-{F}(V15,V17), halfadder-{F}(V17), P_and1-{F}(V17,V0) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3257: exists( #65, #3255 ), references = 2, size of lhs = 12:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_not1-{F}(V0,V2), P_in1-{F}(V2,V3), one-{F}(V3), fulladder-{F}(V4), P_h2-{F}(V4,V5), halfadder-{F}(V5), P_and2-{F}(V5,V1), P_or1-{F}(V4,V6), P_in1-{F}(V6,V7), zero-{F}(V7) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3272: mergings( V2 == V5, V0 == V8; #3268 ), references = 1, size of lhs = 13:
% 282.36/282.56 halfadder-{F}(V0), zero-{F}(V1), fulladder-{F}(V2), P_h2-{F}(V2,V0), P_or1-{F}(V2,V3), P_in1-{F}(V3,V1), P_h1-{F}(V2,V4), P_outs-{F}(V4,V5), one-{F}(V5), P_and2-{F}(V0,V6), halfadder-{F}(V7), P_not1-{F}(V7,V6), P_and1-{F}(V7,V0) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3273: exists( #72, #3267 ), references = 1, size of lhs = 12:
% 282.36/282.56 fulladder-{F}(V0), P_h2-{F}(V0,V1), halfadder-{F}(V1), P_or1-{F}(V0,V2), P_in1-{F}(V2,V3), zero-{F}(V3), P_and2-{F}(V1,V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), one-{F}(V7) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3304: exists( #66, #3298 ), references = 1, size of lhs = 16:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), P_in1-{F}(V2,V3), one-{F}(V3), P_out1-{F}(V2,V4), fulladder-{F}(V5), P_h2-{F}(V5,V6), halfadder-{F}(V6), P_or1-{F}(V5,V7), P_in1-{F}(V7,V8), zero-{F}(V8), P_and2-{F}(V6,V9), P_out1-{F}(V9,V4) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3305: exists( #66, #3299 ), references = 2, size of lhs = 9:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), P_in1-{F}(V2,V3), one-{F}(V3), P_out1-{F}(V2,V4), zero-{F}(V4) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3306: exists( #66, #3300 ), references = 1, size of lhs = 25:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), P_in1-{F}(V2,V3), one-{F}(V3), P_out1-{F}(V2,V4), logic_and-{F}(V5), P_out1-{F}(V5,V4), P_f-{F}(V6), P_in1-{F}(V6,V7), P_in2-{F}(V6,V8), P_inc-{F}(V6,V9), P_outs-{F}(V6,V10), P_outc-{F}(V6,V11), P_or1-{F}(V6,V12), P_h2-{F}(V6,V13), P_not1-{F}(V13,V14), P_and2-{F}(V13,V15), P_and1-{F}(V13,V16), P_h1-{F}(V6,V17), P_and2-{F}(V17,V5), P_in1-{F}(V5,V18), zero-{F}(V18) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3308: exists( #65, #3301 ), references = 2, size of lhs = 14:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), P_in1-{F}(V2,V3), one-{F}(V3), fulladder-{F}(V4), P_h2-{F}(V4,V5), halfadder-{F}(V5), P_and2-{F}(V5,V2), P_or1-{F}(V4,V6), P_in1-{F}(V6,V7), zero-{F}(V7) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3321: exists( #64, #3319 ), references = 2, size of lhs = 16:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_in2-{F}(V3,V4), one-{F}(V4), fulladder-{F}(V5), P_h2-{F}(V5,V6), halfadder-{F}(V6), P_and2-{F}(V6,V2), P_or1-{F}(V5,V7), P_in1-{F}(V7,V8), zero-{F}(V8) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3324: exists( #69, #3322 ), references = 2, size of lhs = 25:
% 282.36/282.56 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_and2-{F}(V8,V0), halfadder-{F}(V9), P_and2-{F}(V9,V0), P_in1-{F}(V9,V10), one-{F}(V10), halfadder-{F}(V11), P_and2-{F}(V11,V0), P_in2-{F}(V11,V12), one-{F}(V12), fulladder-{F}(V13), P_h2-{F}(V13,V14), halfadder-{F}(V14), P_and2-{F}(V14,V0), P_or1-{F}(V13,V15), P_in1-{F}(V15,V16), zero-{F}(V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3327: exists( #68, #3325 ), references = 4, size of lhs = 18:
% 282.36/282.56 P_f-{F}(V0), P_in1-{F}(V0,V1), P_in2-{F}(V0,V2), P_inc-{F}(V0,V3), P_outs-{F}(V0,V4), P_outc-{F}(V0,V5), P_or1-{F}(V0,V6), P_h2-{F}(V0,V7), halfadder-{F}(V7), P_in1-{F}(V7,V8), one-{F}(V8), P_in2-{F}(V7,V9), one-{F}(V9), fulladder-{F}(V10), P_h2-{F}(V10,V7), P_or1-{F}(V10,V11), P_in1-{F}(V11,V12), zero-{F}(V12) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3332: mergings( V2 == V13; #3330 ), references = 10, size of lhs = 19:
% 282.36/282.56 one-{F}(V0), halfadder-{F}(V1), P_f-{F}(V2), P_h2-{F}(V2,V1), P_in1-{F}(V2,V3), P_in2-{F}(V2,V4), P_inc-{F}(V2,V5), P_outs-{F}(V2,V6), P_outc-{F}(V2,V7), P_or1-{F}(V2,V8), P_in1-{F}(V1,V9), one-{F}(V9), fulladder-{F}(V10), P_h2-{F}(V10,V1), P_h1-{F}(V10,V11), P_outs-{F}(V11,V0), P_or1-{F}(V10,V12), P_in1-{F}(V12,V13), zero-{F}(V13) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3338: mergings( V2 == V4, V4 == V14; #3335 ), references = 12, size of lhs = 19:
% 282.36/282.56 one-{F}(V0), halfadder-{F}(V1), one-{F}(V2), P_f-{F}(V3), P_h2-{F}(V3,V1), P_in1-{F}(V3,V4), P_in2-{F}(V3,V5), P_inc-{F}(V3,V6), P_outs-{F}(V3,V7), P_outc-{F}(V3,V8), P_or1-{F}(V3,V9), fulladder-{F}(V10), P_in1-{F}(V10,V0), P_h2-{F}(V10,V1), P_h1-{F}(V10,V11), P_outs-{F}(V11,V2), P_or1-{F}(V10,V12), P_in1-{F}(V12,V13), zero-{F}(V13) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3411: mergings( V2 == V7, V3 == V11, V0 == V8; #3405 ), references = 1, size of lhs = 24:
% 282.36/282.56 halfadder-{F}(V0), zero-{F}(V1), P_and2-{F}(V0,V2), P_out1-{F}(V2,V3), fulladder-{F}(V4), P_h2-{F}(V4,V0), P_h1-{F}(V4,V5), halfadder-{F}(V5), P_and1-{F}(V5,V0), P_outs-{F}(V5,V6), connection-{F}(V6,V3), P_or1-{F}(V4,V7), P_in1-{F}(V7,V1), P_in2-{F}(V7,V8), zero-{F}(V8), P_f-{F}(V9), P_h1-{F}(V9,V5), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), P_h2-{F}(V9,V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3415: mergings( V2 == V7, V3 == V11, V0 == V8; #3406 ), references = 1, size of lhs = 27:
% 282.36/282.56 halfadder-{F}(V0), zero-{F}(V1), P_and2-{F}(V0,V2), P_out1-{F}(V2,V3), fulladder-{F}(V4), P_h2-{F}(V4,V0), P_h1-{F}(V4,V5), halfadder-{F}(V5), P_outs-{F}(V5,V6), connection-{F}(V6,V3), P_or1-{F}(V4,V7), P_in1-{F}(V7,V1), P_in2-{F}(V7,V8), zero-{F}(V8), P_and2-{F}(V5,V9), P_f-{F}(V10), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), P_h2-{F}(V10,V17), P_h1-{F}(V10,V18), halfadder-{F}(V18), P_and2-{F}(V18,V9), P_and1-{F}(V18,V0) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3418: mergings( V2 == V7, V0 == V10; #3407 ), references = 1, size of lhs = 27:
% 282.36/282.56 halfadder-{F}(V0), zero-{F}(V1), P_and2-{F}(V0,V2), P_out1-{F}(V2,V3), fulladder-{F}(V4), P_h2-{F}(V4,V0), P_or1-{F}(V4,V5), P_in1-{F}(V5,V1), P_h1-{F}(V4,V6), P_outs-{F}(V6,V7), connection-{F}(V7,V3), halfadder-{F}(V8), P_outc-{F}(V8,V9), zero-{F}(V9), P_and2-{F}(V8,V10), P_f-{F}(V11), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), P_h2-{F}(V11,V18), P_h1-{F}(V11,V19), halfadder-{F}(V19), P_and2-{F}(V19,V10), P_and1-{F}(V19,V0) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3449: exists( #65, #3443 ), references = 2, size of lhs = 25:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), one-{F}(V5), halfadder-{F}(V6), P_f-{F}(V7), P_h2-{F}(V7,V6), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), fulladder-{F}(V14), P_in1-{F}(V14,V5), P_h2-{F}(V14,V6), P_h1-{F}(V14,V15), P_outs-{F}(V15,V3), P_or1-{F}(V14,V16), P_in1-{F}(V16,V17), zero-{F}(V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3450: exists( #65, #3444 ), references = 2, size of lhs = 24:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), P_f-{F}(V5), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), P_h2-{F}(V5,V12), halfadder-{F}(V12), P_in2-{F}(V12,V3), P_in1-{F}(V12,V13), one-{F}(V13), fulladder-{F}(V14), P_h2-{F}(V14,V12), P_or1-{F}(V14,V15), P_in1-{F}(V15,V16), zero-{F}(V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3451: exists( #65, #3445 ), references = 2, size of lhs = 25:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_f-{F}(V6), P_h2-{F}(V6,V5), P_in1-{F}(V6,V7), P_in2-{F}(V6,V8), P_inc-{F}(V6,V9), P_outs-{F}(V6,V10), P_outc-{F}(V6,V11), P_or1-{F}(V6,V12), P_in1-{F}(V5,V13), one-{F}(V13), fulladder-{F}(V14), P_h2-{F}(V14,V5), P_h1-{F}(V14,V15), P_outs-{F}(V15,V3), P_or1-{F}(V14,V16), P_in1-{F}(V16,V17), zero-{F}(V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3467: exists( #64, #3461 ), references = 2, size of lhs = 28:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), one-{F}(V7), halfadder-{F}(V8), P_f-{F}(V9), P_h2-{F}(V9,V8), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), fulladder-{F}(V16), P_in1-{F}(V16,V7), P_h2-{F}(V16,V8), P_h1-{F}(V16,V17), P_outs-{F}(V17,V6), P_or1-{F}(V16,V18), P_in1-{F}(V18,V19), zero-{F}(V19) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3468: exists( #64, #3462 ), references = 2, size of lhs = 27:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), P_f-{F}(V7), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), P_h2-{F}(V7,V14), halfadder-{F}(V14), P_in2-{F}(V14,V6), P_in1-{F}(V14,V15), one-{F}(V15), fulladder-{F}(V16), P_h2-{F}(V16,V14), P_or1-{F}(V16,V17), P_in1-{F}(V17,V18), zero-{F}(V18) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3469: exists( #64, #3463 ), references = 2, size of lhs = 28:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), halfadder-{F}(V7), P_f-{F}(V8), P_h2-{F}(V8,V7), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14), P_in1-{F}(V7,V15), one-{F}(V15), fulladder-{F}(V16), P_h2-{F}(V16,V7), P_h1-{F}(V16,V17), P_outs-{F}(V17,V6), P_or1-{F}(V16,V18), P_in1-{F}(V18,V19), zero-{F}(V19) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3476: exists( #65, #3470 ), references = 2, size of lhs = 29:
% 282.36/282.56 and_ok-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), halfadder-{F}(V2), P_and2-{F}(V2,V0), P_not1-{F}(V2,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), one-{F}(V7), halfadder-{F}(V8), P_f-{F}(V9), P_h2-{F}(V9,V8), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), fulladder-{F}(V16), P_in1-{F}(V16,V7), P_h2-{F}(V16,V8), P_h1-{F}(V16,V17), P_outs-{F}(V17,V6), P_or1-{F}(V16,V18), P_in1-{F}(V18,V19), zero-{F}(V19) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3477: exists( #65, #3471 ), references = 2, size of lhs = 28:
% 282.36/282.56 and_ok-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), halfadder-{F}(V2), P_and2-{F}(V2,V0), P_not1-{F}(V2,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), P_f-{F}(V7), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), P_h2-{F}(V7,V14), halfadder-{F}(V14), P_in2-{F}(V14,V6), P_in1-{F}(V14,V15), one-{F}(V15), fulladder-{F}(V16), P_h2-{F}(V16,V14), P_or1-{F}(V16,V17), P_in1-{F}(V17,V18), zero-{F}(V18) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3478: exists( #65, #3472 ), references = 2, size of lhs = 29:
% 282.36/282.56 and_ok-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), halfadder-{F}(V2), P_and2-{F}(V2,V0), P_not1-{F}(V2,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), halfadder-{F}(V7), P_f-{F}(V8), P_h2-{F}(V8,V7), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14), P_in1-{F}(V7,V15), one-{F}(V15), fulladder-{F}(V16), P_h2-{F}(V16,V7), P_h1-{F}(V16,V17), P_outs-{F}(V17,V6), P_or1-{F}(V16,V18), P_in1-{F}(V18,V19), zero-{F}(V19) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3494: exists( #64, #3488 ), references = 1, size of lhs = 31:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), one-{F}(V8), halfadder-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V9), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), fulladder-{F}(V17), P_in1-{F}(V17,V8), P_h2-{F}(V17,V9), P_h1-{F}(V17,V18), P_outs-{F}(V18,V7), P_or1-{F}(V17,V19), P_in1-{F}(V19,V20), zero-{F}(V20) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3495: exists( #64, #3489 ), references = 1, size of lhs = 30:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), P_f-{F}(V8), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14), P_h2-{F}(V8,V15), halfadder-{F}(V15), P_in2-{F}(V15,V7), P_in1-{F}(V15,V16), one-{F}(V16), fulladder-{F}(V17), P_h2-{F}(V17,V15), P_or1-{F}(V17,V18), P_in1-{F}(V18,V19), zero-{F}(V19) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3496: exists( #64, #3490 ), references = 1, size of lhs = 31:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), halfadder-{F}(V8), P_f-{F}(V9), P_h2-{F}(V9,V8), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), P_in1-{F}(V8,V16), one-{F}(V16), fulladder-{F}(V17), P_h2-{F}(V17,V8), P_h1-{F}(V17,V18), P_outs-{F}(V18,V7), P_or1-{F}(V17,V19), P_in1-{F}(V19,V20), zero-{F}(V20) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3511: mergings( V3 == V24, V4 == V25, V5 == V26, V9 == V30, V7 == V28, V8 == V29, V0 == V23, V6 == V27; #3500 ), references = 1, size of lhs = 37:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), one-{F}(V8), halfadder-{F}(V9), P_and2-{F}(V9,V10), P_and1-{F}(V9,V11), P_f-{F}(V12), P_h2-{F}(V12,V9), P_h1-{F}(V12,V13), P_and2-{F}(V13,V0), P_or1-{F}(V13,V14), P_not1-{F}(V13,V15), P_in1-{F}(V12,V16), P_in2-{F}(V12,V17), P_inc-{F}(V12,V18), P_outs-{F}(V12,V19), P_outc-{F}(V12,V20), P_or1-{F}(V12,V21), fulladder-{F}(V22), P_in1-{F}(V22,V8), P_h2-{F}(V22,V9), P_h1-{F}(V22,V23), P_outs-{F}(V23,V7), P_or1-{F}(V22,V24), P_in1-{F}(V24,V25), zero-{F}(V25) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3520: mergings( V3 == V22, V4 == V23, V5 == V24, V9 == V28, V7 == V26, V8 == V27, V0 == V29, V6 == V25; #3501 ), references = 1, size of lhs = 36:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), P_f-{F}(V8), P_h1-{F}(V8,V9), P_and2-{F}(V9,V0), P_or1-{F}(V9,V10), P_not1-{F}(V9,V11), P_in1-{F}(V8,V12), P_in2-{F}(V8,V13), P_inc-{F}(V8,V14), P_outs-{F}(V8,V15), P_outc-{F}(V8,V16), P_or1-{F}(V8,V17), P_h2-{F}(V8,V18), halfadder-{F}(V18), P_in2-{F}(V18,V7), P_and2-{F}(V18,V19), P_and1-{F}(V18,V20), P_in1-{F}(V18,V21), one-{F}(V21), fulladder-{F}(V22), P_h2-{F}(V22,V18), P_or1-{F}(V22,V23), P_in1-{F}(V23,V24), zero-{F}(V24) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3529: mergings( V3 == V23, V4 == V24, V5 == V25, V9 == V29, V7 == V27, V8 == V28, V0 == V22, V6 == V26; #3502 ), references = 1, size of lhs = 37:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), halfadder-{F}(V8), P_and2-{F}(V8,V9), P_and1-{F}(V8,V10), P_f-{F}(V11), P_h2-{F}(V11,V8), P_h1-{F}(V11,V12), P_and2-{F}(V12,V0), P_or1-{F}(V12,V13), P_not1-{F}(V12,V14), P_in1-{F}(V11,V15), P_in2-{F}(V11,V16), P_inc-{F}(V11,V17), P_outs-{F}(V11,V18), P_outc-{F}(V11,V19), P_or1-{F}(V11,V20), P_in1-{F}(V8,V21), one-{F}(V21), fulladder-{F}(V22), P_h2-{F}(V22,V8), P_h1-{F}(V22,V23), P_outs-{F}(V23,V7), P_or1-{F}(V22,V24), P_in1-{F}(V24,V25), zero-{F}(V25) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3541: mergings( V3 == V23, V4 == V24, V5 == V25, V9 == V29, V7 == V27, V8 == V28, V0 == V22, V6 == V26; #3530 ), references = 1, size of lhs = 36:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), one-{F}(V8), halfadder-{F}(V9), P_and1-{F}(V9,V10), P_f-{F}(V11), P_h2-{F}(V11,V9), P_h1-{F}(V11,V12), P_and2-{F}(V12,V0), P_or1-{F}(V12,V13), P_not1-{F}(V12,V14), P_in1-{F}(V11,V15), P_in2-{F}(V11,V16), P_inc-{F}(V11,V17), P_outs-{F}(V11,V18), P_outc-{F}(V11,V19), P_or1-{F}(V11,V20), fulladder-{F}(V21), P_in1-{F}(V21,V8), P_h2-{F}(V21,V9), P_h1-{F}(V21,V22), P_outs-{F}(V22,V7), P_or1-{F}(V21,V23), P_in1-{F}(V23,V24), zero-{F}(V24) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3550: mergings( V3 == V21, V4 == V22, V5 == V23, V9 == V27, V7 == V25, V8 == V26, V0 == V28, V6 == V24; #3531 ), references = 1, size of lhs = 35:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), P_f-{F}(V8), P_h1-{F}(V8,V9), P_and2-{F}(V9,V0), P_or1-{F}(V9,V10), P_not1-{F}(V9,V11), P_in1-{F}(V8,V12), P_in2-{F}(V8,V13), P_inc-{F}(V8,V14), P_outs-{F}(V8,V15), P_outc-{F}(V8,V16), P_or1-{F}(V8,V17), P_h2-{F}(V8,V18), halfadder-{F}(V18), P_in2-{F}(V18,V7), P_and1-{F}(V18,V19), P_in1-{F}(V18,V20), one-{F}(V20), fulladder-{F}(V21), P_h2-{F}(V21,V18), P_or1-{F}(V21,V22), P_in1-{F}(V22,V23), zero-{F}(V23) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3559: mergings( V3 == V22, V4 == V23, V5 == V24, V9 == V28, V7 == V26, V8 == V27, V0 == V21, V6 == V25; #3532 ), references = 1, size of lhs = 36:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), halfadder-{F}(V8), P_and1-{F}(V8,V9), P_f-{F}(V10), P_h2-{F}(V10,V8), P_h1-{F}(V10,V11), P_and2-{F}(V11,V0), P_or1-{F}(V11,V12), P_not1-{F}(V11,V13), P_in1-{F}(V10,V14), P_in2-{F}(V10,V15), P_inc-{F}(V10,V16), P_outs-{F}(V10,V17), P_outc-{F}(V10,V18), P_or1-{F}(V10,V19), P_in1-{F}(V8,V20), one-{F}(V20), fulladder-{F}(V21), P_h2-{F}(V21,V8), P_h1-{F}(V21,V22), P_outs-{F}(V22,V7), P_or1-{F}(V21,V23), P_in1-{F}(V23,V24), zero-{F}(V24) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3571: mergings( V3 == V22, V4 == V23, V5 == V24, V9 == V28, V7 == V26, V8 == V27, V0 == V21, V6 == V25; #3560 ), references = 1, size of lhs = 35:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), one-{F}(V8), halfadder-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V9), P_h1-{F}(V10,V11), P_and2-{F}(V11,V0), P_or1-{F}(V11,V12), P_not1-{F}(V11,V13), P_in1-{F}(V10,V14), P_in2-{F}(V10,V15), P_inc-{F}(V10,V16), P_outs-{F}(V10,V17), P_outc-{F}(V10,V18), P_or1-{F}(V10,V19), fulladder-{F}(V20), P_in1-{F}(V20,V8), P_h2-{F}(V20,V9), P_h1-{F}(V20,V21), P_outs-{F}(V21,V7), P_or1-{F}(V20,V22), P_in1-{F}(V22,V23), zero-{F}(V23) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3580: mergings( V3 == V20, V4 == V21, V5 == V22, V9 == V26, V7 == V24, V8 == V25, V0 == V27, V6 == V23; #3561 ), references = 1, size of lhs = 34:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), P_f-{F}(V8), P_h1-{F}(V8,V9), P_and2-{F}(V9,V0), P_or1-{F}(V9,V10), P_not1-{F}(V9,V11), P_in1-{F}(V8,V12), P_in2-{F}(V8,V13), P_inc-{F}(V8,V14), P_outs-{F}(V8,V15), P_outc-{F}(V8,V16), P_or1-{F}(V8,V17), P_h2-{F}(V8,V18), halfadder-{F}(V18), P_in2-{F}(V18,V7), P_in1-{F}(V18,V19), one-{F}(V19), fulladder-{F}(V20), P_h2-{F}(V20,V18), P_or1-{F}(V20,V21), P_in1-{F}(V21,V22), zero-{F}(V22) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3589: mergings( V3 == V21, V4 == V22, V5 == V23, V9 == V27, V7 == V25, V8 == V26, V0 == V20, V6 == V24; #3562 ), references = 1, size of lhs = 35:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), halfadder-{F}(V8), P_f-{F}(V9), P_h2-{F}(V9,V8), P_h1-{F}(V9,V10), P_and2-{F}(V10,V0), P_or1-{F}(V10,V11), P_not1-{F}(V10,V12), P_in1-{F}(V9,V13), P_in2-{F}(V9,V14), P_inc-{F}(V9,V15), P_outs-{F}(V9,V16), P_outc-{F}(V9,V17), P_or1-{F}(V9,V18), P_in1-{F}(V8,V19), one-{F}(V19), fulladder-{F}(V20), P_h2-{F}(V20,V8), P_h1-{F}(V20,V21), P_outs-{F}(V21,V7), P_or1-{F}(V20,V22), P_in1-{F}(V22,V23), zero-{F}(V23) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3599: mergings( V3 == V19, V4 == V20, V5 == V21, V9 == V25, V7 == V23, V8 == V24, V10 == V0, V6 == V22; #3590 ), references = 2, size of lhs = 32:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), halfadder-{F}(V6), P_f-{F}(V7), P_h2-{F}(V7,V6), P_h1-{F}(V7,V8), P_and2-{F}(V8,V0), P_or1-{F}(V8,V9), P_not1-{F}(V8,V10), P_in1-{F}(V7,V11), P_in2-{F}(V7,V12), P_inc-{F}(V7,V13), P_outs-{F}(V7,V14), P_outc-{F}(V7,V15), P_or1-{F}(V7,V16), P_in1-{F}(V6,V17), one-{F}(V17), fulladder-{F}(V18), P_h2-{F}(V18,V6), P_or1-{F}(V18,V19), P_in1-{F}(V19,V20), zero-{F}(V20) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3608: mergings( V2 == V20; #3606 ), references = 1, size of lhs = 32:
% 282.36/282.56 one-{F}(V0), halfadder-{F}(V1), logic_and-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_in1-{F}(V3,V4), zero-{F}(V4), halfadder-{F}(V5), P_and2-{F}(V5,V2), P_not1-{F}(V5,V6), not_ok-{F}(V6), halfadder-{F}(V7), P_not1-{F}(V7,V6), P_and1-{F}(V7,V1), P_f-{F}(V8), P_h2-{F}(V8,V1), P_h1-{F}(V8,V9), P_and2-{F}(V9,V2), P_or1-{F}(V9,V10), P_not1-{F}(V9,V11), P_in1-{F}(V8,V12), P_in2-{F}(V8,V13), P_inc-{F}(V8,V14), P_outs-{F}(V8,V15), P_outc-{F}(V8,V16), P_or1-{F}(V8,V17), fulladder-{F}(V18), P_in1-{F}(V18,V0), P_h2-{F}(V18,V1), P_or1-{F}(V18,V19), P_in1-{F}(V19,V20), zero-{F}(V20) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3611: mergings( V2 == V19; #3609 ), references = 1, size of lhs = 31:
% 282.36/282.56 one-{F}(V0), halfadder-{F}(V1), logic_and-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_in1-{F}(V3,V4), zero-{F}(V4), halfadder-{F}(V5), P_and2-{F}(V5,V2), P_not1-{F}(V5,V6), not_ok-{F}(V6), halfadder-{F}(V7), P_not1-{F}(V7,V6), P_and1-{F}(V7,V1), P_f-{F}(V8), P_h2-{F}(V8,V1), P_h1-{F}(V8,V9), P_and2-{F}(V9,V2), P_not1-{F}(V9,V10), P_in1-{F}(V8,V11), P_in2-{F}(V8,V12), P_inc-{F}(V8,V13), P_outs-{F}(V8,V14), P_outc-{F}(V8,V15), P_or1-{F}(V8,V16), fulladder-{F}(V17), P_in1-{F}(V17,V0), P_h2-{F}(V17,V1), P_or1-{F}(V17,V18), P_in1-{F}(V18,V19), zero-{F}(V19) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3624: mergings( V10 == V23, V2 == V16, V3 == V17, V4 == V18, V8 == V22, V6 == V20, V7 == V21, V9 == V12, V5 == V19; #3614 ), references = 1, size of lhs = 25:
% 282.36/282.56 halfadder-{F}(V0), one-{F}(V1), halfadder-{F}(V2), P_and1-{F}(V0,V2), logic_and-{F}(V3), P_and2-{F}(V0,V3), halfadder-{F}(V4), P_and2-{F}(V4,V3), P_in1-{F}(V4,V5), zero-{F}(V5), P_f-{F}(V6), P_h2-{F}(V6,V2), P_h1-{F}(V6,V0), P_in1-{F}(V6,V7), P_in2-{F}(V6,V8), P_inc-{F}(V6,V9), P_outs-{F}(V6,V10), P_outc-{F}(V6,V11), P_or1-{F}(V6,V12), fulladder-{F}(V13), P_in1-{F}(V13,V1), P_h2-{F}(V13,V2), P_or1-{F}(V13,V14), P_in1-{F}(V14,V15), zero-{F}(V15) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3636: mergings( V10 == V21, V2 == V14, V3 == V15, V4 == V16, V8 == V20, V6 == V18, V7 == V19, V9 == V12, V5 == V17; #3626 ), references = 1, size of lhs = 21:
% 282.36/282.56 halfadder-{F}(V0), one-{F}(V1), halfadder-{F}(V2), P_and1-{F}(V0,V2), P_in1-{F}(V0,V3), zero-{F}(V3), P_f-{F}(V4), P_h2-{F}(V4,V2), P_h1-{F}(V4,V0), P_in1-{F}(V4,V5), P_in2-{F}(V4,V6), P_inc-{F}(V4,V7), P_outs-{F}(V4,V8), P_outc-{F}(V4,V9), P_or1-{F}(V4,V10), fulladder-{F}(V11), P_in1-{F}(V11,V1), P_h2-{F}(V11,V2), P_or1-{F}(V11,V12), P_in1-{F}(V12,V13), zero-{F}(V13) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3698: exists( #64, #3694 ), references = 1, size of lhs = 17:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_in2-{F}(V3,V4), one-{F}(V4), P_f-{F}(V5), P_h1-{F}(V5,V3), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), P_h2-{F}(V5,V12) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3738: exists( #64, #3732 ), references = 1, size of lhs = 17:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_in2-{F}(V3,V4), one-{F}(V4), P_f-{F}(V5), P_h1-{F}(V5,V3), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), P_h2-{F}(V5,V12) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3739: exists( #64, #3733 ), references = 1, size of lhs = 22:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_or1-{F}(V3,V4), logic_or-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V4), P_in2-{F}(V5,V6), one-{F}(V6), P_f-{F}(V7), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), P_h2-{F}(V7,V14), P_h1-{F}(V7,V15), P_or1-{F}(V15,V4) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3740: exists( #64, #3734 ), references = 1, size of lhs = 8:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3770: exists( #65, #3764 ), references = 1, size of lhs = 26:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), zero-{F}(V1), P_and1-{F}(V0,V2), not_ok-{F}(V2), P_in1-{F}(V2,V3), logic_and-{F}(V4), P_f-{F}(V5), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), P_h2-{F}(V5,V12), P_h1-{F}(V5,V13), P_and2-{F}(V13,V4), P_not1-{F}(V13,V14), halfadder-{F}(V15), P_and2-{F}(V15,V4), P_in1-{F}(V15,V16), zero-{F}(V16), halfadder-{F}(V17), P_and2-{F}(V17,V4), P_not1-{F}(V17,V18), P_in1-{F}(V18,V3) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3771: exists( #65, #3765 ), references = 1, size of lhs = 27:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), zero-{F}(V1), P_and1-{F}(V0,V2), not_ok-{F}(V2), P_in1-{F}(V2,V3), logic_and-{F}(V4), P_f-{F}(V5), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), P_h2-{F}(V5,V12), P_h1-{F}(V5,V13), P_and2-{F}(V13,V4), P_or1-{F}(V13,V14), P_not1-{F}(V13,V15), halfadder-{F}(V16), P_and2-{F}(V16,V4), P_in1-{F}(V16,V17), zero-{F}(V17), halfadder-{F}(V18), P_and2-{F}(V18,V4), P_not1-{F}(V18,V19), P_in1-{F}(V19,V3) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3772: exists( #65, #3766 ), references = 1, size of lhs = 28:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), zero-{F}(V1), P_and1-{F}(V0,V2), not_ok-{F}(V2), P_in1-{F}(V2,V3), logic_and-{F}(V4), P_f-{F}(V5), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), P_h2-{F}(V5,V12), P_and1-{F}(V12,V13), P_h1-{F}(V5,V14), P_and2-{F}(V14,V4), P_or1-{F}(V14,V15), P_not1-{F}(V14,V16), halfadder-{F}(V17), P_and2-{F}(V17,V4), P_in1-{F}(V17,V18), zero-{F}(V18), halfadder-{F}(V19), P_and2-{F}(V19,V4), P_not1-{F}(V19,V20), P_in1-{F}(V20,V3) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3776: exists( #64, #3767 ), references = 1, size of lhs = 24:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), zero-{F}(V1), P_and1-{F}(V0,V2), not_ok-{F}(V2), logic_and-{F}(V3), P_f-{F}(V4), P_in1-{F}(V4,V5), P_in2-{F}(V4,V6), P_inc-{F}(V4,V7), P_outs-{F}(V4,V8), P_outc-{F}(V4,V9), P_or1-{F}(V4,V10), P_h2-{F}(V4,V11), P_h1-{F}(V4,V12), P_and2-{F}(V12,V3), P_not1-{F}(V12,V13), halfadder-{F}(V14), P_and2-{F}(V14,V3), P_in1-{F}(V14,V15), zero-{F}(V15), halfadder-{F}(V16), P_and2-{F}(V16,V3), P_not1-{F}(V16,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3777: exists( #64, #3768 ), references = 1, size of lhs = 25:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), zero-{F}(V1), P_and1-{F}(V0,V2), not_ok-{F}(V2), logic_and-{F}(V3), P_f-{F}(V4), P_in1-{F}(V4,V5), P_in2-{F}(V4,V6), P_inc-{F}(V4,V7), P_outs-{F}(V4,V8), P_outc-{F}(V4,V9), P_or1-{F}(V4,V10), P_h2-{F}(V4,V11), P_h1-{F}(V4,V12), P_and2-{F}(V12,V3), P_or1-{F}(V12,V13), P_not1-{F}(V12,V14), halfadder-{F}(V15), P_and2-{F}(V15,V3), P_in1-{F}(V15,V16), zero-{F}(V16), halfadder-{F}(V17), P_and2-{F}(V17,V3), P_not1-{F}(V17,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3833: exists( #65, #3827 ), references = 2, size of lhs = 21:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), and_ok-{F}(V1), P_not1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_and1-{F}(V5,V6), P_in1-{F}(V6,V3), P_in2-{F}(V5,V7), one-{F}(V7), P_f-{F}(V8), P_h1-{F}(V8,V5), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14), P_h2-{F}(V8,V15) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3834: exists( #65, #3828 ), references = 1, size of lhs = 26:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), and_ok-{F}(V1), P_not1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V6), logic_or-{F}(V6), P_and1-{F}(V5,V7), P_in1-{F}(V7,V3), halfadder-{F}(V8), P_or1-{F}(V8,V6), P_in2-{F}(V8,V9), one-{F}(V9), P_f-{F}(V10), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), P_h2-{F}(V10,V17), P_h1-{F}(V10,V18), P_or1-{F}(V18,V6) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3835: exists( #65, #3829 ), references = 1, size of lhs = 13:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), and_ok-{F}(V1), P_not1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), not_ok-{F}(V5), P_in1-{F}(V5,V3), halfadder-{F}(V6), P_not1-{F}(V6,V5), P_and1-{F}(V6,V7), P_in2-{F}(V7,V3) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3843: exists( #64, #3841 ), references = 1, size of lhs = 23:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), P_in1-{F}(V4,V5), halfadder-{F}(V6), P_and1-{F}(V6,V7), P_in1-{F}(V7,V5), P_in2-{F}(V6,V8), one-{F}(V8), P_f-{F}(V9), P_h1-{F}(V9,V6), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), P_h2-{F}(V9,V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3845: exists( #64, #3842 ), references = 1, size of lhs = 21:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), halfadder-{F}(V5), P_and1-{F}(V5,V4), P_in2-{F}(V5,V6), one-{F}(V6), P_f-{F}(V7), P_h1-{F}(V7,V5), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), P_h2-{F}(V7,V14) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3857: mergings( V3 == V21, V4 == V22, V5 == V23, V9 == V27, V7 == V25, V8 == V26, V12 == V19, V0 == V28, V6 == V24; #3847 ), references = 1, size of lhs = 26:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_not1-{F}(V3,V4), halfadder-{F}(V5), P_and2-{F}(V5,V0), P_and1-{F}(V5,V4), P_or1-{F}(V5,V6), P_not1-{F}(V5,V7), P_in2-{F}(V5,V8), one-{F}(V8), P_f-{F}(V9), P_h1-{F}(V9,V5), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), P_h2-{F}(V9,V16), P_and2-{F}(V16,V17), P_and1-{F}(V16,V18) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3868: mergings( V3 == V20, V4 == V21, V5 == V22, V9 == V26, V7 == V24, V8 == V25, V11 == V18, V0 == V27, V6 == V23; #3858 ), references = 1, size of lhs = 25:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_not1-{F}(V3,V4), halfadder-{F}(V5), P_and2-{F}(V5,V0), P_and1-{F}(V5,V4), P_or1-{F}(V5,V6), P_not1-{F}(V5,V7), P_in2-{F}(V5,V8), one-{F}(V8), P_f-{F}(V9), P_h1-{F}(V9,V5), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), P_h2-{F}(V9,V16), P_and1-{F}(V16,V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3879: mergings( V3 == V19, V4 == V20, V5 == V21, V9 == V25, V7 == V23, V8 == V24, V10 == V17, V0 == V26, V6 == V22; #3869 ), references = 1, size of lhs = 24:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_not1-{F}(V3,V4), halfadder-{F}(V5), P_and2-{F}(V5,V0), P_and1-{F}(V5,V4), P_or1-{F}(V5,V6), P_not1-{F}(V5,V7), P_in2-{F}(V5,V8), one-{F}(V8), P_f-{F}(V9), P_h1-{F}(V9,V5), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), P_h2-{F}(V9,V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3890: mergings( V3 == V18, V4 == V19, V5 == V20, V9 == V24, V7 == V22, V8 == V23, V0 == V16, V10 == V25, V6 == V21; #3880 ), references = 1, size of lhs = 23:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_not1-{F}(V3,V4), halfadder-{F}(V5), P_and2-{F}(V5,V0), P_and1-{F}(V5,V4), P_not1-{F}(V5,V6), P_in2-{F}(V5,V7), one-{F}(V7), P_f-{F}(V8), P_h1-{F}(V8,V5), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14), P_h2-{F}(V8,V15) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3930: mergings( V2 == V10; #3926 ), references = 1, size of lhs = 25:
% 282.36/282.56 one-{F}(V0), halfadder-{F}(V1), P_and1-{F}(V1,V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_outs-{F}(V3,V4), connection-{F}(V4,V5), zero-{F}(V6), halfadder-{F}(V7), fulladder-{F}(V8), P_outs-{F}(V8,V0), P_h2-{F}(V8,V1), P_in2-{F}(V8,V6), P_h1-{F}(V8,V7), P_or1-{F}(V8,V9), P_in2-{F}(V9,V5), P_f-{F}(V10), P_h1-{F}(V10,V7), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), P_h2-{F}(V10,V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3932: mergings( V2 == V8; #3927 ), references = 1, size of lhs = 25:
% 282.36/282.56 one-{F}(V0), halfadder-{F}(V1), P_and1-{F}(V1,V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_outs-{F}(V3,V4), connection-{F}(V4,V5), fulladder-{F}(V6), P_outs-{F}(V6,V0), P_h2-{F}(V6,V1), P_h1-{F}(V6,V7), halfadder-{F}(V7), P_or1-{F}(V6,V8), P_in2-{F}(V8,V5), P_f-{F}(V9), P_h1-{F}(V9,V7), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), P_h2-{F}(V9,V16), P_in1-{F}(V7,V17), zero-{F}(V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3934: mergings( V2 == V8; #3928 ), references = 1, size of lhs = 30:
% 282.36/282.56 one-{F}(V0), halfadder-{F}(V1), P_and1-{F}(V1,V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_outs-{F}(V3,V4), connection-{F}(V4,V5), fulladder-{F}(V6), P_outs-{F}(V6,V0), P_h2-{F}(V6,V1), P_h1-{F}(V6,V7), halfadder-{F}(V7), P_or1-{F}(V6,V8), P_in2-{F}(V8,V5), logic_and-{F}(V9), P_and2-{F}(V7,V9), P_f-{F}(V10), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), P_h2-{F}(V10,V17), P_h1-{F}(V10,V18), P_and2-{F}(V18,V9), halfadder-{F}(V19), P_and2-{F}(V19,V9), P_in1-{F}(V19,V20), zero-{F}(V20) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3968: exists( #65, #3962 ), references = 2, size of lhs = 24:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), or_ok-{F}(V2), P_in1-{F}(V2,V3), one-{F}(V3), one-{F}(V4), halfadder-{F}(V5), P_f-{F}(V6), P_h2-{F}(V6,V5), P_in1-{F}(V6,V7), P_in2-{F}(V6,V8), P_inc-{F}(V6,V9), P_outs-{F}(V6,V10), P_outc-{F}(V6,V11), P_or1-{F}(V6,V12), fulladder-{F}(V13), P_in1-{F}(V13,V4), P_h2-{F}(V13,V5), P_h1-{F}(V13,V14), P_outs-{F}(V14,V1), P_or1-{F}(V13,V15), P_in1-{F}(V15,V16), zero-{F}(V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3969: exists( #65, #3963 ), references = 2, size of lhs = 18:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), or_ok-{F}(V2), P_in1-{F}(V2,V3), one-{F}(V3), halfadder-{F}(V4), P_outs-{F}(V4,V1), zero-{F}(V5), fulladder-{F}(V6), P_h1-{F}(V6,V4), P_or1-{F}(V6,V7), P_in2-{F}(V7,V5), P_h2-{F}(V6,V8), P_and2-{F}(V4,V9), halfadder-{F}(V10), P_not1-{F}(V10,V9), P_and1-{F}(V10,V8) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3970: exists( #65, #3964 ), references = 2, size of lhs = 29:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), or_ok-{F}(V2), P_in1-{F}(V2,V3), one-{F}(V3), halfadder-{F}(V4), P_outs-{F}(V4,V1), P_and1-{F}(V4,V5), halfadder-{F}(V6), P_and1-{F}(V6,V5), P_outs-{F}(V6,V7), connection-{F}(V7,V8), zero-{F}(V9), halfadder-{F}(V10), fulladder-{F}(V11), P_in2-{F}(V11,V9), P_h1-{F}(V11,V10), P_or1-{F}(V11,V12), P_in2-{F}(V12,V8), P_f-{F}(V13), P_h1-{F}(V13,V10), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15), P_inc-{F}(V13,V16), P_outs-{F}(V13,V17), P_outc-{F}(V13,V18), P_or1-{F}(V13,V19), P_h2-{F}(V13,V20) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3980: exists( #64, #3974 ), references = 1, size of lhs = 26:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_or1-{F}(V0,V2), or_ok-{F}(V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_outs-{F}(V3,V4), one-{F}(V5), halfadder-{F}(V6), P_f-{F}(V7), P_h2-{F}(V7,V6), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), fulladder-{F}(V14), P_in1-{F}(V14,V5), P_h2-{F}(V14,V6), P_h1-{F}(V14,V15), P_outs-{F}(V15,V4), P_or1-{F}(V14,V16), P_in1-{F}(V16,V17), zero-{F}(V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3981: exists( #64, #3975 ), references = 1, size of lhs = 20:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_or1-{F}(V0,V2), or_ok-{F}(V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_outs-{F}(V3,V4), halfadder-{F}(V5), P_outs-{F}(V5,V4), zero-{F}(V6), fulladder-{F}(V7), P_h1-{F}(V7,V5), P_or1-{F}(V7,V8), P_in2-{F}(V8,V6), P_h2-{F}(V7,V9), P_and2-{F}(V5,V10), halfadder-{F}(V11), P_not1-{F}(V11,V10), P_and1-{F}(V11,V9) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #3982: exists( #64, #3976 ), references = 1, size of lhs = 31:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_or1-{F}(V0,V2), or_ok-{F}(V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_outs-{F}(V3,V4), halfadder-{F}(V5), P_outs-{F}(V5,V4), P_and1-{F}(V5,V6), halfadder-{F}(V7), P_and1-{F}(V7,V6), P_outs-{F}(V7,V8), connection-{F}(V8,V9), zero-{F}(V10), halfadder-{F}(V11), fulladder-{F}(V12), P_in2-{F}(V12,V10), P_h1-{F}(V12,V11), P_or1-{F}(V12,V13), P_in2-{F}(V13,V9), P_f-{F}(V14), P_h1-{F}(V14,V11), P_in1-{F}(V14,V15), P_in2-{F}(V14,V16), P_inc-{F}(V14,V17), P_outs-{F}(V14,V18), P_outc-{F}(V14,V19), P_or1-{F}(V14,V20), P_h2-{F}(V14,V21) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4044: exists( #65, #4038 ), references = 2, size of lhs = 18:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), and_ok-{F}(V5), P_in1-{F}(V5,V3), P_in2-{F}(V5,V3), P_out1-{F}(V5,V6), or_ok-{F}(V7), P_in1-{F}(V7,V6), fulladder-{F}(V8), P_f-{F}(V8), P_or1-{F}(V8,V7), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4045: exists( #65, #4039 ), references = 2, size of lhs = 19:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), and_ok-{F}(V5), P_in1-{F}(V5,V3), P_in2-{F}(V5,V3), P_out1-{F}(V5,V6), or_ok-{F}(V7), P_in1-{F}(V7,V6), fulladder-{F}(V8), P_f-{F}(V8), P_or1-{F}(V8,V7), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_outs-{F}(V8,V11) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4046: exists( #65, #4040 ), references = 2, size of lhs = 12:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), and_ok-{F}(V5), P_in1-{F}(V5,V3), P_in2-{F}(V5,V3), P_out1-{F}(V5,V6), zero-{F}(V6) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4056: exists( #64, #4050 ), references = 1, size of lhs = 14:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in1-{F}(V4,V5), and_ok-{F}(V6), P_in1-{F}(V6,V5), P_in2-{F}(V6,V5), P_out1-{F}(V6,V7), zero-{F}(V7) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4057: exists( #64, #4051 ), references = 1, size of lhs = 20:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in1-{F}(V4,V5), and_ok-{F}(V6), P_in1-{F}(V6,V5), P_in2-{F}(V6,V5), P_out1-{F}(V6,V7), or_ok-{F}(V8), P_in1-{F}(V8,V7), fulladder-{F}(V9), P_f-{F}(V9), P_or1-{F}(V9,V8), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4058: exists( #64, #4052 ), references = 1, size of lhs = 21:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in1-{F}(V4,V5), and_ok-{F}(V6), P_in1-{F}(V6,V5), P_in2-{F}(V6,V5), P_out1-{F}(V6,V7), or_ok-{F}(V8), P_in1-{F}(V8,V7), fulladder-{F}(V9), P_f-{F}(V9), P_or1-{F}(V9,V8), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_outs-{F}(V9,V12) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4104: exists( #65, #4098 ), references = 3, size of lhs = 19:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), and_ok-{F}(V5), P_in1-{F}(V5,V3), P_in2-{F}(V5,V6), one-{F}(V6), P_out1-{F}(V5,V7), or_ok-{F}(V8), P_in1-{F}(V8,V7), fulladder-{F}(V9), P_f-{F}(V9), P_or1-{F}(V9,V8), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4105: exists( #65, #4099 ), references = 3, size of lhs = 20:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), and_ok-{F}(V5), P_in1-{F}(V5,V3), P_in2-{F}(V5,V6), one-{F}(V6), P_out1-{F}(V5,V7), or_ok-{F}(V8), P_in1-{F}(V8,V7), fulladder-{F}(V9), P_f-{F}(V9), P_or1-{F}(V9,V8), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_outs-{F}(V9,V12) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4106: exists( #65, #4100 ), references = 3, size of lhs = 13:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), and_ok-{F}(V5), P_in1-{F}(V5,V3), P_in2-{F}(V5,V6), one-{F}(V6), P_out1-{F}(V5,V7), zero-{F}(V7) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4116: exists( #64, #4110 ), references = 1, size of lhs = 15:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in1-{F}(V4,V5), and_ok-{F}(V6), P_in1-{F}(V6,V5), P_in2-{F}(V6,V7), one-{F}(V7), P_out1-{F}(V6,V8), zero-{F}(V8) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4117: exists( #64, #4111 ), references = 1, size of lhs = 21:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in1-{F}(V4,V5), and_ok-{F}(V6), P_in1-{F}(V6,V5), P_in2-{F}(V6,V7), one-{F}(V7), P_out1-{F}(V6,V8), or_ok-{F}(V9), P_in1-{F}(V9,V8), fulladder-{F}(V10), P_f-{F}(V10), P_or1-{F}(V10,V9), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4118: exists( #64, #4112 ), references = 1, size of lhs = 22:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in1-{F}(V4,V5), and_ok-{F}(V6), P_in1-{F}(V6,V5), P_in2-{F}(V6,V7), one-{F}(V7), P_out1-{F}(V6,V8), or_ok-{F}(V9), P_in1-{F}(V9,V8), fulladder-{F}(V10), P_f-{F}(V10), P_or1-{F}(V10,V9), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_outs-{F}(V10,V13) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4140: exists( #65, #4134 ), references = 2, size of lhs = 19:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V6), not_ok-{F}(V6), P_and1-{F}(V5,V7), P_in1-{F}(V7,V8), P_in1-{F}(V6,V9), zero-{F}(V9), and_ok-{F}(V10), P_in1-{F}(V10,V8), P_in2-{F}(V10,V3), P_out1-{F}(V10,V11), zero-{F}(V11) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4141: exists( #65, #4135 ), references = 2, size of lhs = 25:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V6), not_ok-{F}(V6), P_and1-{F}(V5,V7), P_in1-{F}(V7,V8), P_in1-{F}(V6,V9), zero-{F}(V9), and_ok-{F}(V10), P_in1-{F}(V10,V8), P_in2-{F}(V10,V3), P_out1-{F}(V10,V11), or_ok-{F}(V12), P_in1-{F}(V12,V11), fulladder-{F}(V13), P_f-{F}(V13), P_or1-{F}(V13,V12), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4142: exists( #65, #4136 ), references = 2, size of lhs = 26:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V6), not_ok-{F}(V6), P_and1-{F}(V5,V7), P_in1-{F}(V7,V8), P_in1-{F}(V6,V9), zero-{F}(V9), and_ok-{F}(V10), P_in1-{F}(V10,V8), P_in2-{F}(V10,V3), P_out1-{F}(V10,V11), or_ok-{F}(V12), P_in1-{F}(V12,V11), fulladder-{F}(V13), P_f-{F}(V13), P_or1-{F}(V13,V12), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15), P_outs-{F}(V13,V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4152: exists( #64, #4146 ), references = 1, size of lhs = 18:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in2-{F}(V4,V5), halfadder-{F}(V6), P_or1-{F}(V6,V2), P_and1-{F}(V6,V7), P_in1-{F}(V7,V8), and_ok-{F}(V9), P_in1-{F}(V9,V8), P_in2-{F}(V9,V5), P_out1-{F}(V9,V10), zero-{F}(V10) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4153: exists( #64, #4147 ), references = 1, size of lhs = 24:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in2-{F}(V4,V5), halfadder-{F}(V6), P_or1-{F}(V6,V2), P_and1-{F}(V6,V7), P_in1-{F}(V7,V8), and_ok-{F}(V9), P_in1-{F}(V9,V8), P_in2-{F}(V9,V5), P_out1-{F}(V9,V10), or_ok-{F}(V11), P_in1-{F}(V11,V10), fulladder-{F}(V12), P_f-{F}(V12), P_or1-{F}(V12,V11), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4154: exists( #64, #4148 ), references = 1, size of lhs = 25:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in2-{F}(V4,V5), halfadder-{F}(V6), P_or1-{F}(V6,V2), P_and1-{F}(V6,V7), P_in1-{F}(V7,V8), and_ok-{F}(V9), P_in1-{F}(V9,V8), P_in2-{F}(V9,V5), P_out1-{F}(V9,V10), or_ok-{F}(V11), P_in1-{F}(V11,V10), fulladder-{F}(V12), P_f-{F}(V12), P_or1-{F}(V12,V11), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_outs-{F}(V12,V15) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4158: exists( #66, #4149 ), references = 3, size of lhs = 16:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), and_ok-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V2), P_and1-{F}(V5,V6), P_in1-{F}(V6,V7), P_in1-{F}(V4,V7), P_out1-{F}(V4,V8), zero-{F}(V8) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4159: exists( #66, #4150 ), references = 1, size of lhs = 22:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), and_ok-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V2), P_and1-{F}(V5,V6), P_in1-{F}(V6,V7), P_in1-{F}(V4,V7), P_out1-{F}(V4,V8), or_ok-{F}(V9), P_in1-{F}(V9,V8), fulladder-{F}(V10), P_f-{F}(V10), P_or1-{F}(V10,V9), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4160: exists( #66, #4151 ), references = 1, size of lhs = 23:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), and_ok-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V2), P_and1-{F}(V5,V6), P_in1-{F}(V6,V7), P_in1-{F}(V4,V7), P_out1-{F}(V4,V8), or_ok-{F}(V9), P_in1-{F}(V9,V8), fulladder-{F}(V10), P_f-{F}(V10), P_or1-{F}(V10,V9), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_outs-{F}(V10,V13) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4164: exists( #65, #4162 ), references = 1, size of lhs = 18:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), zero-{F}(V1), P_and1-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), zero-{F}(V4), P_or1-{F}(V3,V5), not_ok-{F}(V5), halfadder-{F}(V6), P_not1-{F}(V6,V5), P_and1-{F}(V6,V2), halfadder-{F}(V7), P_or1-{F}(V7,V5), P_and1-{F}(V7,V8), P_in1-{F}(V8,V9), P_in1-{F}(V2,V9) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4166: exists( #64, #4163 ), references = 2, size of lhs = 16:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), zero-{F}(V1), P_and1-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), zero-{F}(V4), P_or1-{F}(V3,V5), not_ok-{F}(V5), halfadder-{F}(V6), P_not1-{F}(V6,V5), P_and1-{F}(V6,V2), halfadder-{F}(V7), P_or1-{F}(V7,V5), P_and1-{F}(V7,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4169: exists( #69, #4167 ), references = 1, size of lhs = 31:
% 282.36/282.56 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_and2-{F}(V8,V9), P_and1-{F}(V8,V10), P_h1-{F}(V1,V11), P_and1-{F}(V11,V0), P_or1-{F}(V11,V12), P_not1-{F}(V11,V13), P_and2-{F}(V11,V14), halfadder-{F}(V15), P_and1-{F}(V15,V0), P_outs-{F}(V15,V16), zero-{F}(V16), halfadder-{F}(V17), P_in1-{F}(V17,V18), zero-{F}(V18), P_or1-{F}(V17,V19), not_ok-{F}(V19), halfadder-{F}(V20), P_not1-{F}(V20,V19), P_and1-{F}(V20,V0), halfadder-{F}(V21), P_or1-{F}(V21,V19), P_and1-{F}(V21,V0) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4171: exists( #68, #4168 ), references = 2, size of lhs = 30:
% 282.36/282.56 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_and1-{F}(V8,V9), P_h1-{F}(V1,V10), P_and1-{F}(V10,V0), P_or1-{F}(V10,V11), P_not1-{F}(V10,V12), P_and2-{F}(V10,V13), halfadder-{F}(V14), P_and1-{F}(V14,V0), P_outs-{F}(V14,V15), zero-{F}(V15), halfadder-{F}(V16), P_in1-{F}(V16,V17), zero-{F}(V17), P_or1-{F}(V16,V18), not_ok-{F}(V18), halfadder-{F}(V19), P_not1-{F}(V19,V18), P_and1-{F}(V19,V0), halfadder-{F}(V20), P_or1-{F}(V20,V18), P_and1-{F}(V20,V0) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4173: exists( #67, #4170 ), references = 2, size of lhs = 29:
% 282.36/282.56 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_h1-{F}(V1,V9), P_and1-{F}(V9,V0), P_or1-{F}(V9,V10), P_not1-{F}(V9,V11), P_and2-{F}(V9,V12), halfadder-{F}(V13), P_and1-{F}(V13,V0), P_outs-{F}(V13,V14), zero-{F}(V14), halfadder-{F}(V15), P_in1-{F}(V15,V16), zero-{F}(V16), P_or1-{F}(V15,V17), not_ok-{F}(V17), halfadder-{F}(V18), P_not1-{F}(V18,V17), P_and1-{F}(V18,V0), halfadder-{F}(V19), P_or1-{F}(V19,V17), P_and1-{F}(V19,V0) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4203: exists( #65, #4200 ), references = 2, size of lhs = 10:
% 282.36/282.56 halfadder-{F}(V0), P_outc-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), fulladder-{F}(V3), P_outs-{F}(V3,V4), one-{F}(V4), P_h2-{F}(V3,V5), halfadder-{F}(V5), P_and1-{F}(V5,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4215: mergings( V2 == V6, V0 == V8; #4212 ), references = 1, size of lhs = 10:
% 282.36/282.56 zero-{F}(V0), fulladder-{F}(V1), P_or1-{F}(V1,V2), P_in1-{F}(V2,V0), P_outs-{F}(V1,V3), one-{F}(V3), P_h2-{F}(V1,V4), halfadder-{F}(V4), P_and2-{F}(V4,V5), P_and1-{F}(V4,V5) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4277: exists( #65, #4273 ), references = 10, size of lhs = 25:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_outs-{F}(V3,V4), one-{F}(V4), one-{F}(V5), halfadder-{F}(V6), P_f-{F}(V7), P_h2-{F}(V7,V6), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), fulladder-{F}(V14), P_in1-{F}(V14,V5), P_h2-{F}(V14,V6), P_h1-{F}(V14,V15), P_outs-{F}(V15,V1), P_or1-{F}(V14,V16), P_in1-{F}(V16,V17), zero-{F}(V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4278: exists( #65, #4274 ), references = 2, size of lhs = 25:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_outs-{F}(V3,V4), one-{F}(V4), halfadder-{F}(V5), P_f-{F}(V6), P_h2-{F}(V6,V5), P_in1-{F}(V6,V7), P_in2-{F}(V6,V8), P_inc-{F}(V6,V9), P_outs-{F}(V6,V10), P_outc-{F}(V6,V11), P_or1-{F}(V6,V12), P_in1-{F}(V5,V13), one-{F}(V13), fulladder-{F}(V14), P_h2-{F}(V14,V5), P_h1-{F}(V14,V15), P_outs-{F}(V15,V1), P_or1-{F}(V14,V16), P_in1-{F}(V16,V17), zero-{F}(V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4287: mergings( V2 == V16, V0 == V8; #4283 ), references = 1, size of lhs = 24:
% 282.36/282.56 one-{F}(V0), halfadder-{F}(V1), P_outs-{F}(V1,V2), P_and1-{F}(V1,V3), one-{F}(V4), halfadder-{F}(V5), P_and1-{F}(V5,V3), P_f-{F}(V6), P_h2-{F}(V6,V5), P_in1-{F}(V6,V7), P_in2-{F}(V6,V8), P_inc-{F}(V6,V9), P_outs-{F}(V6,V10), P_outc-{F}(V6,V11), P_or1-{F}(V6,V12), fulladder-{F}(V13), P_outs-{F}(V13,V0), P_in1-{F}(V13,V4), P_h2-{F}(V13,V5), P_h1-{F}(V13,V14), P_outs-{F}(V14,V2), P_or1-{F}(V13,V15), P_in1-{F}(V15,V16), zero-{F}(V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4290: mergings( V2 == V16, V0 == V7; #4284 ), references = 1, size of lhs = 24:
% 282.36/282.56 one-{F}(V0), halfadder-{F}(V1), P_outs-{F}(V1,V2), P_and1-{F}(V1,V3), halfadder-{F}(V4), P_and1-{F}(V4,V3), P_f-{F}(V5), P_h2-{F}(V5,V4), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), P_in1-{F}(V4,V12), one-{F}(V12), fulladder-{F}(V13), P_outs-{F}(V13,V0), P_h2-{F}(V13,V4), P_h1-{F}(V13,V14), P_outs-{F}(V14,V2), P_or1-{F}(V13,V15), P_in1-{F}(V15,V16), zero-{F}(V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4336: exists( #65, #4334 ), references = 1, size of lhs = 18:
% 282.36/282.56 halfadder-{F}(V0), P_outc-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), zero-{F}(V4), P_or1-{F}(V3,V5), not_ok-{F}(V5), halfadder-{F}(V6), P_not1-{F}(V6,V5), P_and1-{F}(V6,V2), halfadder-{F}(V7), P_or1-{F}(V7,V5), P_and1-{F}(V7,V8), P_in1-{F}(V8,V9), P_in1-{F}(V2,V9) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4338: exists( #64, #4335 ), references = 2, size of lhs = 16:
% 282.36/282.56 halfadder-{F}(V0), P_outc-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), zero-{F}(V4), P_or1-{F}(V3,V5), not_ok-{F}(V5), halfadder-{F}(V6), P_not1-{F}(V6,V5), P_and1-{F}(V6,V2), halfadder-{F}(V7), P_or1-{F}(V7,V5), P_and1-{F}(V7,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4342: exists( #72, #4340 ), references = 1, size of lhs = 19:
% 282.36/282.56 fulladder-{F}(V0), P_h2-{F}(V0,V1), halfadder-{F}(V1), P_or1-{F}(V0,V2), P_in1-{F}(V2,V3), zero-{F}(V3), P_and2-{F}(V1,V4), and_ok-{F}(V4), halfadder-{F}(V5), P_in1-{F}(V5,V6), zero-{F}(V6), P_or1-{F}(V5,V7), not_ok-{F}(V7), halfadder-{F}(V8), P_not1-{F}(V8,V7), P_and1-{F}(V8,V4), halfadder-{F}(V9), P_or1-{F}(V9,V7), P_and1-{F}(V9,V4) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4345: exists( #69, #4343 ), references = 1, size of lhs = 28:
% 282.36/282.56 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_and2-{F}(V8,V0), fulladder-{F}(V9), P_h2-{F}(V9,V10), halfadder-{F}(V10), P_and2-{F}(V10,V0), P_or1-{F}(V9,V11), P_in1-{F}(V11,V12), zero-{F}(V12), halfadder-{F}(V13), P_in1-{F}(V13,V14), zero-{F}(V14), P_or1-{F}(V13,V15), not_ok-{F}(V15), halfadder-{F}(V16), P_not1-{F}(V16,V15), P_and1-{F}(V16,V0), halfadder-{F}(V17), P_or1-{F}(V17,V15), P_and1-{F}(V17,V0) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4395: exists( #65, #4389 ), references = 2, size of lhs = 23:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), and_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_outs-{F}(V5,V6), connection-{F}(V6,V3), P_and1-{F}(V5,V7), and_ok-{F}(V7), halfadder-{F}(V8), P_in1-{F}(V8,V9), zero-{F}(V9), P_or1-{F}(V8,V10), not_ok-{F}(V10), halfadder-{F}(V11), P_not1-{F}(V11,V10), P_and1-{F}(V11,V7), halfadder-{F}(V12), P_or1-{F}(V12,V10), P_and1-{F}(V12,V7) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4396: exists( #65, #4390 ), references = 2, size of lhs = 36:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), and_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), logic_and-{F}(V5), P_f-{F}(V6), P_in1-{F}(V6,V7), P_in2-{F}(V6,V8), P_inc-{F}(V6,V9), P_outs-{F}(V6,V10), P_outc-{F}(V6,V11), P_or1-{F}(V6,V12), P_h2-{F}(V6,V13), P_h1-{F}(V6,V14), P_and1-{F}(V14,V5), P_or1-{F}(V14,V15), P_not1-{F}(V14,V16), P_and2-{F}(V14,V17), halfadder-{F}(V18), P_and1-{F}(V18,V5), P_outs-{F}(V18,V19), connection-{F}(V19,V3), halfadder-{F}(V20), P_in1-{F}(V20,V21), zero-{F}(V21), P_or1-{F}(V20,V22), not_ok-{F}(V22), halfadder-{F}(V23), P_not1-{F}(V23,V22), P_and1-{F}(V23,V5), halfadder-{F}(V24), P_or1-{F}(V24,V22), P_and1-{F}(V24,V5) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4397: exists( #65, #4391 ), references = 2, size of lhs = 37:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), and_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), logic_and-{F}(V5), P_f-{F}(V6), P_in1-{F}(V6,V7), P_in2-{F}(V6,V8), P_inc-{F}(V6,V9), P_outs-{F}(V6,V10), P_outc-{F}(V6,V11), P_or1-{F}(V6,V12), P_h2-{F}(V6,V13), P_and1-{F}(V13,V14), P_h1-{F}(V6,V15), P_and1-{F}(V15,V5), P_or1-{F}(V15,V16), P_not1-{F}(V15,V17), P_and2-{F}(V15,V18), halfadder-{F}(V19), P_and1-{F}(V19,V5), P_outs-{F}(V19,V20), connection-{F}(V20,V3), halfadder-{F}(V21), P_in1-{F}(V21,V22), zero-{F}(V22), P_or1-{F}(V21,V23), not_ok-{F}(V23), halfadder-{F}(V24), P_not1-{F}(V24,V23), P_and1-{F}(V24,V5), halfadder-{F}(V25), P_or1-{F}(V25,V23), P_and1-{F}(V25,V5) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4407: exists( #64, #4401 ), references = 1, size of lhs = 25:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in2-{F}(V4,V5), halfadder-{F}(V6), P_outs-{F}(V6,V7), connection-{F}(V7,V5), P_and1-{F}(V6,V8), and_ok-{F}(V8), halfadder-{F}(V9), P_in1-{F}(V9,V10), zero-{F}(V10), P_or1-{F}(V9,V11), not_ok-{F}(V11), halfadder-{F}(V12), P_not1-{F}(V12,V11), P_and1-{F}(V12,V8), halfadder-{F}(V13), P_or1-{F}(V13,V11), P_and1-{F}(V13,V8) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4408: exists( #64, #4402 ), references = 1, size of lhs = 38:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in2-{F}(V4,V5), logic_and-{F}(V6), P_f-{F}(V7), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), P_h2-{F}(V7,V14), P_h1-{F}(V7,V15), P_and1-{F}(V15,V6), P_or1-{F}(V15,V16), P_not1-{F}(V15,V17), P_and2-{F}(V15,V18), halfadder-{F}(V19), P_and1-{F}(V19,V6), P_outs-{F}(V19,V20), connection-{F}(V20,V5), halfadder-{F}(V21), P_in1-{F}(V21,V22), zero-{F}(V22), P_or1-{F}(V21,V23), not_ok-{F}(V23), halfadder-{F}(V24), P_not1-{F}(V24,V23), P_and1-{F}(V24,V6), halfadder-{F}(V25), P_or1-{F}(V25,V23), P_and1-{F}(V25,V6) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4409: exists( #64, #4403 ), references = 1, size of lhs = 39:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in2-{F}(V4,V5), logic_and-{F}(V6), P_f-{F}(V7), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), P_h2-{F}(V7,V14), P_and1-{F}(V14,V15), P_h1-{F}(V7,V16), P_and1-{F}(V16,V6), P_or1-{F}(V16,V17), P_not1-{F}(V16,V18), P_and2-{F}(V16,V19), halfadder-{F}(V20), P_and1-{F}(V20,V6), P_outs-{F}(V20,V21), connection-{F}(V21,V5), halfadder-{F}(V22), P_in1-{F}(V22,V23), zero-{F}(V23), P_or1-{F}(V22,V24), not_ok-{F}(V24), halfadder-{F}(V25), P_not1-{F}(V25,V24), P_and1-{F}(V25,V6), halfadder-{F}(V26), P_or1-{F}(V26,V24), P_and1-{F}(V26,V6) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4453: exists( #65, #4451 ), references = 2, size of lhs = 18:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_and2-{F}(V5,V6), P_not1-{F}(V5,V7), P_in1-{F}(V7,V3), fulladder-{F}(V8), P_h2-{F}(V8,V9), halfadder-{F}(V9), P_and2-{F}(V9,V6), P_or1-{F}(V8,V10), P_in1-{F}(V10,V11), zero-{F}(V11) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4457: exists( #64, #4455 ), references = 1, size of lhs = 20:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in1-{F}(V4,V5), halfadder-{F}(V6), P_and2-{F}(V6,V7), P_not1-{F}(V6,V8), P_in1-{F}(V8,V5), fulladder-{F}(V9), P_h2-{F}(V9,V10), halfadder-{F}(V10), P_and2-{F}(V10,V7), P_or1-{F}(V9,V11), P_in1-{F}(V11,V12), zero-{F}(V12) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4459: exists( #64, #4456 ), references = 1, size of lhs = 18:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and2-{F}(V5,V6), fulladder-{F}(V7), P_h2-{F}(V7,V8), halfadder-{F}(V8), P_and2-{F}(V8,V6), P_or1-{F}(V7,V9), P_in1-{F}(V9,V10), zero-{F}(V10) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4547: exists( #65, #4541 ), references = 2, size of lhs = 26:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), one-{F}(V5), halfadder-{F}(V6), P_f-{F}(V7), P_h2-{F}(V7,V6), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), fulladder-{F}(V14), P_in1-{F}(V14,V5), P_h2-{F}(V14,V6), P_h1-{F}(V14,V15), P_outs-{F}(V15,V16), connection-{F}(V16,V3), P_or1-{F}(V14,V17), P_in1-{F}(V17,V18), zero-{F}(V18) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4548: exists( #65, #4542 ), references = 2, size of lhs = 32:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_outs-{F}(V5,V6), P_and1-{F}(V5,V7), halfadder-{F}(V8), P_and1-{F}(V8,V7), P_outs-{F}(V8,V9), connection-{F}(V9,V3), one-{F}(V10), halfadder-{F}(V11), P_f-{F}(V12), P_h2-{F}(V12,V11), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), fulladder-{F}(V19), P_in1-{F}(V19,V10), P_h2-{F}(V19,V11), P_h1-{F}(V19,V20), P_outs-{F}(V20,V6), P_or1-{F}(V19,V21), P_in1-{F}(V21,V22), zero-{F}(V22) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4549: exists( #65, #4543 ), references = 2, size of lhs = 26:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_f-{F}(V6), P_h2-{F}(V6,V5), P_in1-{F}(V6,V7), P_in2-{F}(V6,V8), P_inc-{F}(V6,V9), P_outs-{F}(V6,V10), P_outc-{F}(V6,V11), P_or1-{F}(V6,V12), P_in1-{F}(V5,V13), one-{F}(V13), fulladder-{F}(V14), P_h2-{F}(V14,V5), P_h1-{F}(V14,V15), P_outs-{F}(V15,V16), connection-{F}(V16,V3), P_or1-{F}(V14,V17), P_in1-{F}(V17,V18), zero-{F}(V18) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4565: exists( #64, #4559 ), references = 1, size of lhs = 28:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in1-{F}(V4,V5), one-{F}(V6), halfadder-{F}(V7), P_f-{F}(V8), P_h2-{F}(V8,V7), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14), fulladder-{F}(V15), P_in1-{F}(V15,V6), P_h2-{F}(V15,V7), P_h1-{F}(V15,V16), P_outs-{F}(V16,V17), connection-{F}(V17,V5), P_or1-{F}(V15,V18), P_in1-{F}(V18,V19), zero-{F}(V19) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4566: exists( #64, #4560 ), references = 1, size of lhs = 34:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in1-{F}(V4,V5), halfadder-{F}(V6), P_outs-{F}(V6,V7), P_and1-{F}(V6,V8), halfadder-{F}(V9), P_and1-{F}(V9,V8), P_outs-{F}(V9,V10), connection-{F}(V10,V5), one-{F}(V11), halfadder-{F}(V12), P_f-{F}(V13), P_h2-{F}(V13,V12), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15), P_inc-{F}(V13,V16), P_outs-{F}(V13,V17), P_outc-{F}(V13,V18), P_or1-{F}(V13,V19), fulladder-{F}(V20), P_in1-{F}(V20,V11), P_h2-{F}(V20,V12), P_h1-{F}(V20,V21), P_outs-{F}(V21,V7), P_or1-{F}(V20,V22), P_in1-{F}(V22,V23), zero-{F}(V23) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4567: exists( #64, #4561 ), references = 1, size of lhs = 28:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in1-{F}(V4,V5), halfadder-{F}(V6), P_f-{F}(V7), P_h2-{F}(V7,V6), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), P_in1-{F}(V6,V14), one-{F}(V14), fulladder-{F}(V15), P_h2-{F}(V15,V6), P_h1-{F}(V15,V16), P_outs-{F}(V16,V17), connection-{F}(V17,V5), P_or1-{F}(V15,V18), P_in1-{F}(V18,V19), zero-{F}(V19) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4616: exists( #65, #4610 ), references = 4, size of lhs = 30:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), and_ok-{F}(V5), P_in1-{F}(V5,V3), P_in2-{F}(V5,V6), one-{F}(V6), P_out1-{F}(V5,V7), one-{F}(V8), halfadder-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V9), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), fulladder-{F}(V17), P_in1-{F}(V17,V8), P_h2-{F}(V17,V9), P_h1-{F}(V17,V18), P_outs-{F}(V18,V7), P_or1-{F}(V17,V19), P_in1-{F}(V19,V20), zero-{F}(V20) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4617: exists( #65, #4611 ), references = 4, size of lhs = 36:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), and_ok-{F}(V5), P_in1-{F}(V5,V3), P_in2-{F}(V5,V6), one-{F}(V6), P_out1-{F}(V5,V7), halfadder-{F}(V8), P_outs-{F}(V8,V9), P_and1-{F}(V8,V10), halfadder-{F}(V11), P_and1-{F}(V11,V10), P_outs-{F}(V11,V7), one-{F}(V12), halfadder-{F}(V13), P_f-{F}(V14), P_h2-{F}(V14,V13), P_in1-{F}(V14,V15), P_in2-{F}(V14,V16), P_inc-{F}(V14,V17), P_outs-{F}(V14,V18), P_outc-{F}(V14,V19), P_or1-{F}(V14,V20), fulladder-{F}(V21), P_in1-{F}(V21,V12), P_h2-{F}(V21,V13), P_h1-{F}(V21,V22), P_outs-{F}(V22,V9), P_or1-{F}(V21,V23), P_in1-{F}(V23,V24), zero-{F}(V24) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4618: exists( #65, #4612 ), references = 2, size of lhs = 30:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), and_ok-{F}(V5), P_in1-{F}(V5,V3), P_in2-{F}(V5,V6), one-{F}(V6), P_out1-{F}(V5,V7), halfadder-{F}(V8), P_f-{F}(V9), P_h2-{F}(V9,V8), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), P_in1-{F}(V8,V16), one-{F}(V16), fulladder-{F}(V17), P_h2-{F}(V17,V8), P_h1-{F}(V17,V18), P_outs-{F}(V18,V7), P_or1-{F}(V17,V19), P_in1-{F}(V19,V20), zero-{F}(V20) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4634: exists( #64, #4628 ), references = 3, size of lhs = 32:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in1-{F}(V4,V5), and_ok-{F}(V6), P_in1-{F}(V6,V5), P_in2-{F}(V6,V7), one-{F}(V7), P_out1-{F}(V6,V8), one-{F}(V9), halfadder-{F}(V10), P_f-{F}(V11), P_h2-{F}(V11,V10), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), fulladder-{F}(V18), P_in1-{F}(V18,V9), P_h2-{F}(V18,V10), P_h1-{F}(V18,V19), P_outs-{F}(V19,V8), P_or1-{F}(V18,V20), P_in1-{F}(V20,V21), zero-{F}(V21) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4635: exists( #64, #4629 ), references = 1, size of lhs = 38:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in1-{F}(V4,V5), and_ok-{F}(V6), P_in1-{F}(V6,V5), P_in2-{F}(V6,V7), one-{F}(V7), P_out1-{F}(V6,V8), halfadder-{F}(V9), P_outs-{F}(V9,V10), P_and1-{F}(V9,V11), halfadder-{F}(V12), P_and1-{F}(V12,V11), P_outs-{F}(V12,V8), one-{F}(V13), halfadder-{F}(V14), P_f-{F}(V15), P_h2-{F}(V15,V14), P_in1-{F}(V15,V16), P_in2-{F}(V15,V17), P_inc-{F}(V15,V18), P_outs-{F}(V15,V19), P_outc-{F}(V15,V20), P_or1-{F}(V15,V21), fulladder-{F}(V22), P_in1-{F}(V22,V13), P_h2-{F}(V22,V14), P_h1-{F}(V22,V23), P_outs-{F}(V23,V10), P_or1-{F}(V22,V24), P_in1-{F}(V24,V25), zero-{F}(V25) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4636: exists( #64, #4630 ), references = 1, size of lhs = 32:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in1-{F}(V4,V5), and_ok-{F}(V6), P_in1-{F}(V6,V5), P_in2-{F}(V6,V7), one-{F}(V7), P_out1-{F}(V6,V8), halfadder-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V9), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), P_in1-{F}(V9,V17), one-{F}(V17), fulladder-{F}(V18), P_h2-{F}(V18,V9), P_h1-{F}(V18,V19), P_outs-{F}(V19,V8), P_or1-{F}(V18,V20), P_in1-{F}(V20,V21), zero-{F}(V21) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4691: exists( #65, #4685 ), references = 2, size of lhs = 36:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V6), not_ok-{F}(V6), P_and1-{F}(V5,V7), P_in1-{F}(V7,V8), P_in1-{F}(V6,V9), zero-{F}(V9), and_ok-{F}(V10), P_in1-{F}(V10,V8), P_in2-{F}(V10,V3), P_out1-{F}(V10,V11), one-{F}(V12), halfadder-{F}(V13), P_f-{F}(V14), P_h2-{F}(V14,V13), P_in1-{F}(V14,V15), P_in2-{F}(V14,V16), P_inc-{F}(V14,V17), P_outs-{F}(V14,V18), P_outc-{F}(V14,V19), P_or1-{F}(V14,V20), fulladder-{F}(V21), P_in1-{F}(V21,V12), P_h2-{F}(V21,V13), P_h1-{F}(V21,V22), P_outs-{F}(V22,V11), P_or1-{F}(V21,V23), P_in1-{F}(V23,V24), zero-{F}(V24) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4692: exists( #65, #4686 ), references = 2, size of lhs = 42:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V6), not_ok-{F}(V6), P_and1-{F}(V5,V7), P_in1-{F}(V7,V8), P_in1-{F}(V6,V9), zero-{F}(V9), and_ok-{F}(V10), P_in1-{F}(V10,V8), P_in2-{F}(V10,V3), P_out1-{F}(V10,V11), halfadder-{F}(V12), P_outs-{F}(V12,V13), P_and1-{F}(V12,V14), halfadder-{F}(V15), P_and1-{F}(V15,V14), P_outs-{F}(V15,V11), one-{F}(V16), halfadder-{F}(V17), P_f-{F}(V18), P_h2-{F}(V18,V17), P_in1-{F}(V18,V19), P_in2-{F}(V18,V20), P_inc-{F}(V18,V21), P_outs-{F}(V18,V22), P_outc-{F}(V18,V23), P_or1-{F}(V18,V24), fulladder-{F}(V25), P_in1-{F}(V25,V16), P_h2-{F}(V25,V17), P_h1-{F}(V25,V26), P_outs-{F}(V26,V13), P_or1-{F}(V25,V27), P_in1-{F}(V27,V28), zero-{F}(V28) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4693: exists( #65, #4687 ), references = 2, size of lhs = 38:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_in1-{F}(V5,V6), zero-{F}(V6), P_or1-{F}(V5,V7), not_ok-{F}(V7), halfadder-{F}(V8), P_or1-{F}(V8,V7), P_and1-{F}(V8,V9), P_in1-{F}(V9,V10), and_ok-{F}(V11), P_in1-{F}(V11,V10), P_in2-{F}(V11,V3), P_out1-{F}(V11,V12), one-{F}(V13), halfadder-{F}(V14), P_f-{F}(V15), P_h2-{F}(V15,V14), P_in1-{F}(V15,V16), P_in2-{F}(V15,V17), P_inc-{F}(V15,V18), P_outs-{F}(V15,V19), P_outc-{F}(V15,V20), P_or1-{F}(V15,V21), fulladder-{F}(V22), P_in1-{F}(V22,V13), P_h2-{F}(V22,V14), P_h1-{F}(V22,V23), P_outs-{F}(V23,V12), P_or1-{F}(V22,V24), P_in1-{F}(V24,V25), zero-{F}(V25) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4709: exists( #64, #4703 ), references = 1, size of lhs = 35:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in1-{F}(V4,V5), halfadder-{F}(V6), P_or1-{F}(V6,V2), P_and1-{F}(V6,V7), P_in1-{F}(V7,V8), and_ok-{F}(V9), P_in1-{F}(V9,V8), P_in2-{F}(V9,V5), P_out1-{F}(V9,V10), one-{F}(V11), halfadder-{F}(V12), P_f-{F}(V13), P_h2-{F}(V13,V12), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15), P_inc-{F}(V13,V16), P_outs-{F}(V13,V17), P_outc-{F}(V13,V18), P_or1-{F}(V13,V19), fulladder-{F}(V20), P_in1-{F}(V20,V11), P_h2-{F}(V20,V12), P_h1-{F}(V20,V21), P_outs-{F}(V21,V10), P_or1-{F}(V20,V22), P_in1-{F}(V22,V23), zero-{F}(V23) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4710: exists( #64, #4704 ), references = 1, size of lhs = 40:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in1-{F}(V4,V5), halfadder-{F}(V6), P_in1-{F}(V6,V7), zero-{F}(V7), P_or1-{F}(V6,V8), not_ok-{F}(V8), halfadder-{F}(V9), P_or1-{F}(V9,V8), P_and1-{F}(V9,V10), P_in1-{F}(V10,V11), and_ok-{F}(V12), P_in1-{F}(V12,V11), P_in2-{F}(V12,V5), P_out1-{F}(V12,V13), one-{F}(V14), halfadder-{F}(V15), P_f-{F}(V16), P_h2-{F}(V16,V15), P_in1-{F}(V16,V17), P_in2-{F}(V16,V18), P_inc-{F}(V16,V19), P_outs-{F}(V16,V20), P_outc-{F}(V16,V21), P_or1-{F}(V16,V22), fulladder-{F}(V23), P_in1-{F}(V23,V14), P_h2-{F}(V23,V15), P_h1-{F}(V23,V24), P_outs-{F}(V24,V13), P_or1-{F}(V23,V25), P_in1-{F}(V25,V26), zero-{F}(V26) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4711: exists( #64, #4705 ), references = 1, size of lhs = 41:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in1-{F}(V4,V5), halfadder-{F}(V6), P_or1-{F}(V6,V2), P_and1-{F}(V6,V7), P_in1-{F}(V7,V8), and_ok-{F}(V9), P_in1-{F}(V9,V8), P_in2-{F}(V9,V5), P_out1-{F}(V9,V10), halfadder-{F}(V11), P_outs-{F}(V11,V12), P_and1-{F}(V11,V13), halfadder-{F}(V14), P_and1-{F}(V14,V13), P_outs-{F}(V14,V10), one-{F}(V15), halfadder-{F}(V16), P_f-{F}(V17), P_h2-{F}(V17,V16), P_in1-{F}(V17,V18), P_in2-{F}(V17,V19), P_inc-{F}(V17,V20), P_outs-{F}(V17,V21), P_outc-{F}(V17,V22), P_or1-{F}(V17,V23), fulladder-{F}(V24), P_in1-{F}(V24,V15), P_h2-{F}(V24,V16), P_h1-{F}(V24,V25), P_outs-{F}(V25,V12), P_or1-{F}(V24,V26), P_in1-{F}(V26,V27), zero-{F}(V27) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4742: exists( #65, #4736 ), references = 2, size of lhs = 36:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V6), not_ok-{F}(V6), P_and1-{F}(V5,V7), P_in1-{F}(V7,V8), P_in1-{F}(V6,V9), zero-{F}(V9), and_ok-{F}(V10), P_in1-{F}(V10,V8), P_in2-{F}(V10,V3), P_out1-{F}(V10,V11), one-{F}(V12), halfadder-{F}(V13), P_f-{F}(V14), P_h2-{F}(V14,V13), P_in1-{F}(V14,V15), P_in2-{F}(V14,V16), P_inc-{F}(V14,V17), P_outs-{F}(V14,V18), P_outc-{F}(V14,V19), P_or1-{F}(V14,V20), fulladder-{F}(V21), P_in1-{F}(V21,V12), P_h2-{F}(V21,V13), P_h1-{F}(V21,V22), P_outs-{F}(V22,V11), P_or1-{F}(V21,V23), P_in1-{F}(V23,V24), zero-{F}(V24) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4743: exists( #65, #4737 ), references = 2, size of lhs = 42:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V6), not_ok-{F}(V6), P_and1-{F}(V5,V7), P_in1-{F}(V7,V8), P_in1-{F}(V6,V9), zero-{F}(V9), and_ok-{F}(V10), P_in1-{F}(V10,V8), P_in2-{F}(V10,V3), P_out1-{F}(V10,V11), halfadder-{F}(V12), P_outs-{F}(V12,V13), P_and1-{F}(V12,V14), halfadder-{F}(V15), P_and1-{F}(V15,V14), P_outs-{F}(V15,V11), one-{F}(V16), halfadder-{F}(V17), P_f-{F}(V18), P_h2-{F}(V18,V17), P_in1-{F}(V18,V19), P_in2-{F}(V18,V20), P_inc-{F}(V18,V21), P_outs-{F}(V18,V22), P_outc-{F}(V18,V23), P_or1-{F}(V18,V24), fulladder-{F}(V25), P_in1-{F}(V25,V16), P_h2-{F}(V25,V17), P_h1-{F}(V25,V26), P_outs-{F}(V26,V13), P_or1-{F}(V25,V27), P_in1-{F}(V27,V28), zero-{F}(V28) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4744: exists( #65, #4738 ), references = 2, size of lhs = 38:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_in1-{F}(V5,V6), zero-{F}(V6), P_or1-{F}(V5,V7), not_ok-{F}(V7), halfadder-{F}(V8), P_or1-{F}(V8,V7), P_and1-{F}(V8,V9), P_in1-{F}(V9,V10), and_ok-{F}(V11), P_in1-{F}(V11,V10), P_in2-{F}(V11,V3), P_out1-{F}(V11,V12), one-{F}(V13), halfadder-{F}(V14), P_f-{F}(V15), P_h2-{F}(V15,V14), P_in1-{F}(V15,V16), P_in2-{F}(V15,V17), P_inc-{F}(V15,V18), P_outs-{F}(V15,V19), P_outc-{F}(V15,V20), P_or1-{F}(V15,V21), fulladder-{F}(V22), P_in1-{F}(V22,V13), P_h2-{F}(V22,V14), P_h1-{F}(V22,V23), P_outs-{F}(V23,V12), P_or1-{F}(V22,V24), P_in1-{F}(V24,V25), zero-{F}(V25) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4754: exists( #64, #4748 ), references = 1, size of lhs = 35:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in2-{F}(V4,V5), halfadder-{F}(V6), P_or1-{F}(V6,V2), P_and1-{F}(V6,V7), P_in1-{F}(V7,V8), and_ok-{F}(V9), P_in1-{F}(V9,V8), P_in2-{F}(V9,V5), P_out1-{F}(V9,V10), one-{F}(V11), halfadder-{F}(V12), P_f-{F}(V13), P_h2-{F}(V13,V12), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15), P_inc-{F}(V13,V16), P_outs-{F}(V13,V17), P_outc-{F}(V13,V18), P_or1-{F}(V13,V19), fulladder-{F}(V20), P_in1-{F}(V20,V11), P_h2-{F}(V20,V12), P_h1-{F}(V20,V21), P_outs-{F}(V21,V10), P_or1-{F}(V20,V22), P_in1-{F}(V22,V23), zero-{F}(V23) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4755: exists( #64, #4749 ), references = 1, size of lhs = 40:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in2-{F}(V4,V5), halfadder-{F}(V6), P_in1-{F}(V6,V7), zero-{F}(V7), P_or1-{F}(V6,V8), not_ok-{F}(V8), halfadder-{F}(V9), P_or1-{F}(V9,V8), P_and1-{F}(V9,V10), P_in1-{F}(V10,V11), and_ok-{F}(V12), P_in1-{F}(V12,V11), P_in2-{F}(V12,V5), P_out1-{F}(V12,V13), one-{F}(V14), halfadder-{F}(V15), P_f-{F}(V16), P_h2-{F}(V16,V15), P_in1-{F}(V16,V17), P_in2-{F}(V16,V18), P_inc-{F}(V16,V19), P_outs-{F}(V16,V20), P_outc-{F}(V16,V21), P_or1-{F}(V16,V22), fulladder-{F}(V23), P_in1-{F}(V23,V14), P_h2-{F}(V23,V15), P_h1-{F}(V23,V24), P_outs-{F}(V24,V13), P_or1-{F}(V23,V25), P_in1-{F}(V25,V26), zero-{F}(V26) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4756: exists( #64, #4750 ), references = 1, size of lhs = 41:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in2-{F}(V4,V5), halfadder-{F}(V6), P_or1-{F}(V6,V2), P_and1-{F}(V6,V7), P_in1-{F}(V7,V8), and_ok-{F}(V9), P_in1-{F}(V9,V8), P_in2-{F}(V9,V5), P_out1-{F}(V9,V10), halfadder-{F}(V11), P_outs-{F}(V11,V12), P_and1-{F}(V11,V13), halfadder-{F}(V14), P_and1-{F}(V14,V13), P_outs-{F}(V14,V10), one-{F}(V15), halfadder-{F}(V16), P_f-{F}(V17), P_h2-{F}(V17,V16), P_in1-{F}(V17,V18), P_in2-{F}(V17,V19), P_inc-{F}(V17,V20), P_outs-{F}(V17,V21), P_outc-{F}(V17,V22), P_or1-{F}(V17,V23), fulladder-{F}(V24), P_in1-{F}(V24,V15), P_h2-{F}(V24,V16), P_h1-{F}(V24,V25), P_outs-{F}(V25,V12), P_or1-{F}(V24,V26), P_in1-{F}(V26,V27), zero-{F}(V27) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4760: exists( #66, #4751 ), references = 1, size of lhs = 33:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), and_ok-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V2), P_and1-{F}(V5,V6), P_in1-{F}(V6,V7), P_in1-{F}(V4,V7), P_out1-{F}(V4,V8), one-{F}(V9), halfadder-{F}(V10), P_f-{F}(V11), P_h2-{F}(V11,V10), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), fulladder-{F}(V18), P_in1-{F}(V18,V9), P_h2-{F}(V18,V10), P_h1-{F}(V18,V19), P_outs-{F}(V19,V8), P_or1-{F}(V18,V20), P_in1-{F}(V20,V21), zero-{F}(V21) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4761: exists( #66, #4752 ), references = 1, size of lhs = 38:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), and_ok-{F}(V4), halfadder-{F}(V5), P_in1-{F}(V5,V6), zero-{F}(V6), P_or1-{F}(V5,V7), not_ok-{F}(V7), halfadder-{F}(V8), P_or1-{F}(V8,V7), P_and1-{F}(V8,V9), P_in1-{F}(V9,V10), P_in1-{F}(V4,V10), P_out1-{F}(V4,V11), one-{F}(V12), halfadder-{F}(V13), P_f-{F}(V14), P_h2-{F}(V14,V13), P_in1-{F}(V14,V15), P_in2-{F}(V14,V16), P_inc-{F}(V14,V17), P_outs-{F}(V14,V18), P_outc-{F}(V14,V19), P_or1-{F}(V14,V20), fulladder-{F}(V21), P_in1-{F}(V21,V12), P_h2-{F}(V21,V13), P_h1-{F}(V21,V22), P_outs-{F}(V22,V11), P_or1-{F}(V21,V23), P_in1-{F}(V23,V24), zero-{F}(V24) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4762: exists( #66, #4753 ), references = 1, size of lhs = 39:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), and_ok-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V2), P_and1-{F}(V5,V6), P_in1-{F}(V6,V7), P_in1-{F}(V4,V7), P_out1-{F}(V4,V8), halfadder-{F}(V9), P_outs-{F}(V9,V10), P_and1-{F}(V9,V11), halfadder-{F}(V12), P_and1-{F}(V12,V11), P_outs-{F}(V12,V8), one-{F}(V13), halfadder-{F}(V14), P_f-{F}(V15), P_h2-{F}(V15,V14), P_in1-{F}(V15,V16), P_in2-{F}(V15,V17), P_inc-{F}(V15,V18), P_outs-{F}(V15,V19), P_outc-{F}(V15,V20), P_or1-{F}(V15,V21), fulladder-{F}(V22), P_in1-{F}(V22,V13), P_h2-{F}(V22,V14), P_h1-{F}(V22,V23), P_outs-{F}(V23,V10), P_or1-{F}(V22,V24), P_in1-{F}(V24,V25), zero-{F}(V25) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4805: exists( #65, #4799 ), references = 4, size of lhs = 27:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), and_ok-{F}(V5), P_in1-{F}(V5,V3), P_in2-{F}(V5,V6), one-{F}(V6), P_out1-{F}(V5,V7), halfadder-{F}(V8), P_in1-{F}(V8,V9), one-{F}(V9), P_and2-{F}(V8,V10), and_ok-{F}(V10), halfadder-{F}(V11), P_and2-{F}(V11,V10), P_in2-{F}(V11,V7), fulladder-{F}(V12), P_h2-{F}(V12,V13), halfadder-{F}(V13), P_and2-{F}(V13,V10), P_or1-{F}(V12,V14), P_in1-{F}(V14,V15), zero-{F}(V15) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4806: exists( #65, #4800 ), references = 4, size of lhs = 29:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), and_ok-{F}(V5), P_in1-{F}(V5,V3), P_in2-{F}(V5,V6), one-{F}(V6), P_out1-{F}(V5,V7), P_f-{F}(V8), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14), P_h2-{F}(V8,V15), halfadder-{F}(V15), P_in2-{F}(V15,V7), P_in1-{F}(V15,V16), one-{F}(V16), fulladder-{F}(V17), P_h2-{F}(V17,V15), P_or1-{F}(V17,V18), P_in1-{F}(V18,V19), zero-{F}(V19) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4807: exists( #65, #4801 ), references = 4, size of lhs = 36:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), and_ok-{F}(V5), P_in1-{F}(V5,V3), P_in2-{F}(V5,V6), one-{F}(V6), P_out1-{F}(V5,V7), logic_and-{F}(V8), P_f-{F}(V9), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), P_h2-{F}(V9,V16), P_and2-{F}(V16,V8), halfadder-{F}(V17), P_and2-{F}(V17,V8), P_in1-{F}(V17,V18), one-{F}(V18), halfadder-{F}(V19), P_and2-{F}(V19,V8), P_in2-{F}(V19,V7), fulladder-{F}(V20), P_h2-{F}(V20,V21), halfadder-{F}(V21), P_and2-{F}(V21,V8), P_or1-{F}(V20,V22), P_in1-{F}(V22,V23), zero-{F}(V23) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4823: exists( #64, #4817 ), references = 1, size of lhs = 29:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in1-{F}(V4,V5), and_ok-{F}(V6), P_in1-{F}(V6,V5), P_in2-{F}(V6,V7), one-{F}(V7), P_out1-{F}(V6,V8), halfadder-{F}(V9), P_in1-{F}(V9,V10), one-{F}(V10), P_and2-{F}(V9,V11), and_ok-{F}(V11), halfadder-{F}(V12), P_and2-{F}(V12,V11), P_in2-{F}(V12,V8), fulladder-{F}(V13), P_h2-{F}(V13,V14), halfadder-{F}(V14), P_and2-{F}(V14,V11), P_or1-{F}(V13,V15), P_in1-{F}(V15,V16), zero-{F}(V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4824: exists( #64, #4818 ), references = 1, size of lhs = 31:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in1-{F}(V4,V5), and_ok-{F}(V6), P_in1-{F}(V6,V5), P_in2-{F}(V6,V7), one-{F}(V7), P_out1-{F}(V6,V8), P_f-{F}(V9), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), P_h2-{F}(V9,V16), halfadder-{F}(V16), P_in2-{F}(V16,V8), P_in1-{F}(V16,V17), one-{F}(V17), fulladder-{F}(V18), P_h2-{F}(V18,V16), P_or1-{F}(V18,V19), P_in1-{F}(V19,V20), zero-{F}(V20) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4825: exists( #64, #4819 ), references = 1, size of lhs = 38:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in1-{F}(V4,V5), and_ok-{F}(V6), P_in1-{F}(V6,V5), P_in2-{F}(V6,V7), one-{F}(V7), P_out1-{F}(V6,V8), logic_and-{F}(V9), P_f-{F}(V10), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), P_h2-{F}(V10,V17), P_and2-{F}(V17,V9), halfadder-{F}(V18), P_and2-{F}(V18,V9), P_in1-{F}(V18,V19), one-{F}(V19), halfadder-{F}(V20), P_and2-{F}(V20,V9), P_in2-{F}(V20,V8), fulladder-{F}(V21), P_h2-{F}(V21,V22), halfadder-{F}(V22), P_and2-{F}(V22,V9), P_or1-{F}(V21,V23), P_in1-{F}(V23,V24), zero-{F}(V24) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4880: exists( #65, #4874 ), references = 2, size of lhs = 33:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V6), not_ok-{F}(V6), P_and1-{F}(V5,V7), P_in1-{F}(V7,V8), P_in1-{F}(V6,V9), zero-{F}(V9), and_ok-{F}(V10), P_in1-{F}(V10,V8), P_in2-{F}(V10,V3), P_out1-{F}(V10,V11), halfadder-{F}(V12), P_in1-{F}(V12,V13), one-{F}(V13), P_and2-{F}(V12,V14), and_ok-{F}(V14), halfadder-{F}(V15), P_and2-{F}(V15,V14), P_in2-{F}(V15,V11), fulladder-{F}(V16), P_h2-{F}(V16,V17), halfadder-{F}(V17), P_and2-{F}(V17,V14), P_or1-{F}(V16,V18), P_in1-{F}(V18,V19), zero-{F}(V19) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4881: exists( #65, #4875 ), references = 2, size of lhs = 35:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V6), not_ok-{F}(V6), P_and1-{F}(V5,V7), P_in1-{F}(V7,V8), P_in1-{F}(V6,V9), zero-{F}(V9), and_ok-{F}(V10), P_in1-{F}(V10,V8), P_in2-{F}(V10,V3), P_out1-{F}(V10,V11), P_f-{F}(V12), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), P_h2-{F}(V12,V19), halfadder-{F}(V19), P_in2-{F}(V19,V11), P_in1-{F}(V19,V20), one-{F}(V20), fulladder-{F}(V21), P_h2-{F}(V21,V19), P_or1-{F}(V21,V22), P_in1-{F}(V22,V23), zero-{F}(V23) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4882: exists( #65, #4876 ), references = 2, size of lhs = 42:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V6), not_ok-{F}(V6), P_and1-{F}(V5,V7), P_in1-{F}(V7,V8), P_in1-{F}(V6,V9), zero-{F}(V9), and_ok-{F}(V10), P_in1-{F}(V10,V8), P_in2-{F}(V10,V3), P_out1-{F}(V10,V11), logic_and-{F}(V12), P_f-{F}(V13), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15), P_inc-{F}(V13,V16), P_outs-{F}(V13,V17), P_outc-{F}(V13,V18), P_or1-{F}(V13,V19), P_h2-{F}(V13,V20), P_and2-{F}(V20,V12), halfadder-{F}(V21), P_and2-{F}(V21,V12), P_in1-{F}(V21,V22), one-{F}(V22), halfadder-{F}(V23), P_and2-{F}(V23,V12), P_in2-{F}(V23,V11), fulladder-{F}(V24), P_h2-{F}(V24,V25), halfadder-{F}(V25), P_and2-{F}(V25,V12), P_or1-{F}(V24,V26), P_in1-{F}(V26,V27), zero-{F}(V27) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4898: exists( #64, #4892 ), references = 1, size of lhs = 32:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in1-{F}(V4,V5), halfadder-{F}(V6), P_or1-{F}(V6,V2), P_and1-{F}(V6,V7), P_in1-{F}(V7,V8), and_ok-{F}(V9), P_in1-{F}(V9,V8), P_in2-{F}(V9,V5), P_out1-{F}(V9,V10), halfadder-{F}(V11), P_in1-{F}(V11,V12), one-{F}(V12), P_and2-{F}(V11,V13), and_ok-{F}(V13), halfadder-{F}(V14), P_and2-{F}(V14,V13), P_in2-{F}(V14,V10), fulladder-{F}(V15), P_h2-{F}(V15,V16), halfadder-{F}(V16), P_and2-{F}(V16,V13), P_or1-{F}(V15,V17), P_in1-{F}(V17,V18), zero-{F}(V18) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4899: exists( #64, #4893 ), references = 1, size of lhs = 34:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in1-{F}(V4,V5), halfadder-{F}(V6), P_or1-{F}(V6,V2), P_and1-{F}(V6,V7), P_in1-{F}(V7,V8), and_ok-{F}(V9), P_in1-{F}(V9,V8), P_in2-{F}(V9,V5), P_out1-{F}(V9,V10), P_f-{F}(V11), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), P_h2-{F}(V11,V18), halfadder-{F}(V18), P_in2-{F}(V18,V10), P_in1-{F}(V18,V19), one-{F}(V19), fulladder-{F}(V20), P_h2-{F}(V20,V18), P_or1-{F}(V20,V21), P_in1-{F}(V21,V22), zero-{F}(V22) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4900: exists( #64, #4894 ), references = 1, size of lhs = 41:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in1-{F}(V4,V5), halfadder-{F}(V6), P_or1-{F}(V6,V2), P_and1-{F}(V6,V7), P_in1-{F}(V7,V8), and_ok-{F}(V9), P_in1-{F}(V9,V8), P_in2-{F}(V9,V5), P_out1-{F}(V9,V10), logic_and-{F}(V11), P_f-{F}(V12), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), P_h2-{F}(V12,V19), P_and2-{F}(V19,V11), halfadder-{F}(V20), P_and2-{F}(V20,V11), P_in1-{F}(V20,V21), one-{F}(V21), halfadder-{F}(V22), P_and2-{F}(V22,V11), P_in2-{F}(V22,V10), fulladder-{F}(V23), P_h2-{F}(V23,V24), halfadder-{F}(V24), P_and2-{F}(V24,V11), P_or1-{F}(V23,V25), P_in1-{F}(V25,V26), zero-{F}(V26) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4928: exists( #65, #4922 ), references = 2, size of lhs = 33:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V6), not_ok-{F}(V6), P_and1-{F}(V5,V7), P_in1-{F}(V7,V8), P_in1-{F}(V6,V9), zero-{F}(V9), and_ok-{F}(V10), P_in1-{F}(V10,V8), P_in2-{F}(V10,V3), P_out1-{F}(V10,V11), halfadder-{F}(V12), P_in1-{F}(V12,V13), one-{F}(V13), P_and2-{F}(V12,V14), and_ok-{F}(V14), halfadder-{F}(V15), P_and2-{F}(V15,V14), P_in2-{F}(V15,V11), fulladder-{F}(V16), P_h2-{F}(V16,V17), halfadder-{F}(V17), P_and2-{F}(V17,V14), P_or1-{F}(V16,V18), P_in1-{F}(V18,V19), zero-{F}(V19) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4929: exists( #65, #4923 ), references = 2, size of lhs = 35:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V6), not_ok-{F}(V6), P_and1-{F}(V5,V7), P_in1-{F}(V7,V8), P_in1-{F}(V6,V9), zero-{F}(V9), and_ok-{F}(V10), P_in1-{F}(V10,V8), P_in2-{F}(V10,V3), P_out1-{F}(V10,V11), P_f-{F}(V12), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), P_h2-{F}(V12,V19), halfadder-{F}(V19), P_in2-{F}(V19,V11), P_in1-{F}(V19,V20), one-{F}(V20), fulladder-{F}(V21), P_h2-{F}(V21,V19), P_or1-{F}(V21,V22), P_in1-{F}(V22,V23), zero-{F}(V23) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4930: exists( #65, #4924 ), references = 2, size of lhs = 42:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V6), not_ok-{F}(V6), P_and1-{F}(V5,V7), P_in1-{F}(V7,V8), P_in1-{F}(V6,V9), zero-{F}(V9), and_ok-{F}(V10), P_in1-{F}(V10,V8), P_in2-{F}(V10,V3), P_out1-{F}(V10,V11), logic_and-{F}(V12), P_f-{F}(V13), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15), P_inc-{F}(V13,V16), P_outs-{F}(V13,V17), P_outc-{F}(V13,V18), P_or1-{F}(V13,V19), P_h2-{F}(V13,V20), P_and2-{F}(V20,V12), halfadder-{F}(V21), P_and2-{F}(V21,V12), P_in1-{F}(V21,V22), one-{F}(V22), halfadder-{F}(V23), P_and2-{F}(V23,V12), P_in2-{F}(V23,V11), fulladder-{F}(V24), P_h2-{F}(V24,V25), halfadder-{F}(V25), P_and2-{F}(V25,V12), P_or1-{F}(V24,V26), P_in1-{F}(V26,V27), zero-{F}(V27) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4952: exists( #64, #4946 ), references = 1, size of lhs = 32:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in2-{F}(V4,V5), halfadder-{F}(V6), P_or1-{F}(V6,V2), P_and1-{F}(V6,V7), P_in1-{F}(V7,V8), and_ok-{F}(V9), P_in1-{F}(V9,V8), P_in2-{F}(V9,V5), P_out1-{F}(V9,V10), halfadder-{F}(V11), P_in1-{F}(V11,V12), one-{F}(V12), P_and2-{F}(V11,V13), and_ok-{F}(V13), halfadder-{F}(V14), P_and2-{F}(V14,V13), P_in2-{F}(V14,V10), fulladder-{F}(V15), P_h2-{F}(V15,V16), halfadder-{F}(V16), P_and2-{F}(V16,V13), P_or1-{F}(V15,V17), P_in1-{F}(V17,V18), zero-{F}(V18) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4953: exists( #64, #4947 ), references = 1, size of lhs = 34:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in2-{F}(V4,V5), halfadder-{F}(V6), P_or1-{F}(V6,V2), P_and1-{F}(V6,V7), P_in1-{F}(V7,V8), and_ok-{F}(V9), P_in1-{F}(V9,V8), P_in2-{F}(V9,V5), P_out1-{F}(V9,V10), P_f-{F}(V11), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), P_h2-{F}(V11,V18), halfadder-{F}(V18), P_in2-{F}(V18,V10), P_in1-{F}(V18,V19), one-{F}(V19), fulladder-{F}(V20), P_h2-{F}(V20,V18), P_or1-{F}(V20,V21), P_in1-{F}(V21,V22), zero-{F}(V22) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4954: exists( #64, #4948 ), references = 1, size of lhs = 41:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in2-{F}(V4,V5), halfadder-{F}(V6), P_or1-{F}(V6,V2), P_and1-{F}(V6,V7), P_in1-{F}(V7,V8), and_ok-{F}(V9), P_in1-{F}(V9,V8), P_in2-{F}(V9,V5), P_out1-{F}(V9,V10), logic_and-{F}(V11), P_f-{F}(V12), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), P_h2-{F}(V12,V19), P_and2-{F}(V19,V11), halfadder-{F}(V20), P_and2-{F}(V20,V11), P_in1-{F}(V20,V21), one-{F}(V21), halfadder-{F}(V22), P_and2-{F}(V22,V11), P_in2-{F}(V22,V10), fulladder-{F}(V23), P_h2-{F}(V23,V24), halfadder-{F}(V24), P_and2-{F}(V24,V11), P_or1-{F}(V23,V25), P_in1-{F}(V25,V26), zero-{F}(V26) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4958: exists( #66, #4949 ), references = 1, size of lhs = 30:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), and_ok-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V2), P_and1-{F}(V5,V6), P_in1-{F}(V6,V7), P_in1-{F}(V4,V7), P_out1-{F}(V4,V8), halfadder-{F}(V9), P_in1-{F}(V9,V10), one-{F}(V10), P_and2-{F}(V9,V11), and_ok-{F}(V11), halfadder-{F}(V12), P_and2-{F}(V12,V11), P_in2-{F}(V12,V8), fulladder-{F}(V13), P_h2-{F}(V13,V14), halfadder-{F}(V14), P_and2-{F}(V14,V11), P_or1-{F}(V13,V15), P_in1-{F}(V15,V16), zero-{F}(V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4959: exists( #66, #4950 ), references = 1, size of lhs = 32:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), and_ok-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V2), P_and1-{F}(V5,V6), P_in1-{F}(V6,V7), P_in1-{F}(V4,V7), P_out1-{F}(V4,V8), P_f-{F}(V9), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), P_h2-{F}(V9,V16), halfadder-{F}(V16), P_in2-{F}(V16,V8), P_in1-{F}(V16,V17), one-{F}(V17), fulladder-{F}(V18), P_h2-{F}(V18,V16), P_or1-{F}(V18,V19), P_in1-{F}(V19,V20), zero-{F}(V20) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #4960: exists( #66, #4951 ), references = 1, size of lhs = 39:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), and_ok-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V2), P_and1-{F}(V5,V6), P_in1-{F}(V6,V7), P_in1-{F}(V4,V7), P_out1-{F}(V4,V8), logic_and-{F}(V9), P_f-{F}(V10), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), P_h2-{F}(V10,V17), P_and2-{F}(V17,V9), halfadder-{F}(V18), P_and2-{F}(V18,V9), P_in1-{F}(V18,V19), one-{F}(V19), halfadder-{F}(V20), P_and2-{F}(V20,V9), P_in2-{F}(V20,V8), fulladder-{F}(V21), P_h2-{F}(V21,V22), halfadder-{F}(V22), P_and2-{F}(V22,V9), P_or1-{F}(V21,V23), P_in1-{F}(V23,V24), zero-{F}(V24) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5021: exists( #65, #5015 ), references = 2, size of lhs = 30:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), and_ok-{F}(V5), P_in1-{F}(V5,V3), P_in2-{F}(V5,V3), P_out1-{F}(V5,V6), one-{F}(V7), halfadder-{F}(V8), P_f-{F}(V9), P_h2-{F}(V9,V8), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), fulladder-{F}(V16), P_in1-{F}(V16,V7), P_h2-{F}(V16,V8), P_h1-{F}(V16,V17), P_outs-{F}(V17,V18), connection-{F}(V18,V6), P_or1-{F}(V16,V19), P_in1-{F}(V19,V20), zero-{F}(V20) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5022: exists( #65, #5016 ), references = 2, size of lhs = 36:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), and_ok-{F}(V5), P_in1-{F}(V5,V3), P_in2-{F}(V5,V3), P_out1-{F}(V5,V6), halfadder-{F}(V7), P_outs-{F}(V7,V8), P_and1-{F}(V7,V9), halfadder-{F}(V10), P_and1-{F}(V10,V9), P_outs-{F}(V10,V11), connection-{F}(V11,V6), one-{F}(V12), halfadder-{F}(V13), P_f-{F}(V14), P_h2-{F}(V14,V13), P_in1-{F}(V14,V15), P_in2-{F}(V14,V16), P_inc-{F}(V14,V17), P_outs-{F}(V14,V18), P_outc-{F}(V14,V19), P_or1-{F}(V14,V20), fulladder-{F}(V21), P_in1-{F}(V21,V12), P_h2-{F}(V21,V13), P_h1-{F}(V21,V22), P_outs-{F}(V22,V8), P_or1-{F}(V21,V23), P_in1-{F}(V23,V24), zero-{F}(V24) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5023: exists( #65, #5017 ), references = 2, size of lhs = 30:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), and_ok-{F}(V5), P_in1-{F}(V5,V3), P_in2-{F}(V5,V3), P_out1-{F}(V5,V6), halfadder-{F}(V7), P_f-{F}(V8), P_h2-{F}(V8,V7), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14), P_in1-{F}(V7,V15), one-{F}(V15), fulladder-{F}(V16), P_h2-{F}(V16,V7), P_h1-{F}(V16,V17), P_outs-{F}(V17,V18), connection-{F}(V18,V6), P_or1-{F}(V16,V19), P_in1-{F}(V19,V20), zero-{F}(V20) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5039: exists( #64, #5033 ), references = 1, size of lhs = 32:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in1-{F}(V4,V5), and_ok-{F}(V6), P_in1-{F}(V6,V5), P_in2-{F}(V6,V5), P_out1-{F}(V6,V7), one-{F}(V8), halfadder-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V9), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), fulladder-{F}(V17), P_in1-{F}(V17,V8), P_h2-{F}(V17,V9), P_h1-{F}(V17,V18), P_outs-{F}(V18,V19), connection-{F}(V19,V7), P_or1-{F}(V17,V20), P_in1-{F}(V20,V21), zero-{F}(V21) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5040: exists( #64, #5034 ), references = 1, size of lhs = 38:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in1-{F}(V4,V5), and_ok-{F}(V6), P_in1-{F}(V6,V5), P_in2-{F}(V6,V5), P_out1-{F}(V6,V7), halfadder-{F}(V8), P_outs-{F}(V8,V9), P_and1-{F}(V8,V10), halfadder-{F}(V11), P_and1-{F}(V11,V10), P_outs-{F}(V11,V12), connection-{F}(V12,V7), one-{F}(V13), halfadder-{F}(V14), P_f-{F}(V15), P_h2-{F}(V15,V14), P_in1-{F}(V15,V16), P_in2-{F}(V15,V17), P_inc-{F}(V15,V18), P_outs-{F}(V15,V19), P_outc-{F}(V15,V20), P_or1-{F}(V15,V21), fulladder-{F}(V22), P_in1-{F}(V22,V13), P_h2-{F}(V22,V14), P_h1-{F}(V22,V23), P_outs-{F}(V23,V9), P_or1-{F}(V22,V24), P_in1-{F}(V24,V25), zero-{F}(V25) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5041: exists( #64, #5035 ), references = 1, size of lhs = 32:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in1-{F}(V4,V5), and_ok-{F}(V6), P_in1-{F}(V6,V5), P_in2-{F}(V6,V5), P_out1-{F}(V6,V7), halfadder-{F}(V8), P_f-{F}(V9), P_h2-{F}(V9,V8), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), P_in1-{F}(V8,V16), one-{F}(V16), fulladder-{F}(V17), P_h2-{F}(V17,V8), P_h1-{F}(V17,V18), P_outs-{F}(V18,V19), connection-{F}(V19,V7), P_or1-{F}(V17,V20), P_in1-{F}(V20,V21), zero-{F}(V21) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5102: exists( #65, #5096 ), references = 3, size of lhs = 31:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), and_ok-{F}(V5), P_in1-{F}(V5,V3), P_in2-{F}(V5,V6), one-{F}(V6), P_out1-{F}(V5,V7), one-{F}(V8), halfadder-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V9), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), fulladder-{F}(V17), P_in1-{F}(V17,V8), P_h2-{F}(V17,V9), P_h1-{F}(V17,V18), P_outs-{F}(V18,V19), connection-{F}(V19,V7), P_or1-{F}(V17,V20), P_in1-{F}(V20,V21), zero-{F}(V21) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5103: exists( #65, #5097 ), references = 3, size of lhs = 37:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), and_ok-{F}(V5), P_in1-{F}(V5,V3), P_in2-{F}(V5,V6), one-{F}(V6), P_out1-{F}(V5,V7), halfadder-{F}(V8), P_outs-{F}(V8,V9), P_and1-{F}(V8,V10), halfadder-{F}(V11), P_and1-{F}(V11,V10), P_outs-{F}(V11,V12), connection-{F}(V12,V7), one-{F}(V13), halfadder-{F}(V14), P_f-{F}(V15), P_h2-{F}(V15,V14), P_in1-{F}(V15,V16), P_in2-{F}(V15,V17), P_inc-{F}(V15,V18), P_outs-{F}(V15,V19), P_outc-{F}(V15,V20), P_or1-{F}(V15,V21), fulladder-{F}(V22), P_in1-{F}(V22,V13), P_h2-{F}(V22,V14), P_h1-{F}(V22,V23), P_outs-{F}(V23,V9), P_or1-{F}(V22,V24), P_in1-{F}(V24,V25), zero-{F}(V25) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5104: exists( #65, #5098 ), references = 2, size of lhs = 31:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), and_ok-{F}(V5), P_in1-{F}(V5,V3), P_in2-{F}(V5,V6), one-{F}(V6), P_out1-{F}(V5,V7), halfadder-{F}(V8), P_f-{F}(V9), P_h2-{F}(V9,V8), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), P_in1-{F}(V8,V16), one-{F}(V16), fulladder-{F}(V17), P_h2-{F}(V17,V8), P_h1-{F}(V17,V18), P_outs-{F}(V18,V19), connection-{F}(V19,V7), P_or1-{F}(V17,V20), P_in1-{F}(V20,V21), zero-{F}(V21) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5120: exists( #64, #5114 ), references = 2, size of lhs = 33:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in1-{F}(V4,V5), and_ok-{F}(V6), P_in1-{F}(V6,V5), P_in2-{F}(V6,V7), one-{F}(V7), P_out1-{F}(V6,V8), one-{F}(V9), halfadder-{F}(V10), P_f-{F}(V11), P_h2-{F}(V11,V10), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), fulladder-{F}(V18), P_in1-{F}(V18,V9), P_h2-{F}(V18,V10), P_h1-{F}(V18,V19), P_outs-{F}(V19,V20), connection-{F}(V20,V8), P_or1-{F}(V18,V21), P_in1-{F}(V21,V22), zero-{F}(V22) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5121: exists( #64, #5115 ), references = 1, size of lhs = 39:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in1-{F}(V4,V5), and_ok-{F}(V6), P_in1-{F}(V6,V5), P_in2-{F}(V6,V7), one-{F}(V7), P_out1-{F}(V6,V8), halfadder-{F}(V9), P_outs-{F}(V9,V10), P_and1-{F}(V9,V11), halfadder-{F}(V12), P_and1-{F}(V12,V11), P_outs-{F}(V12,V13), connection-{F}(V13,V8), one-{F}(V14), halfadder-{F}(V15), P_f-{F}(V16), P_h2-{F}(V16,V15), P_in1-{F}(V16,V17), P_in2-{F}(V16,V18), P_inc-{F}(V16,V19), P_outs-{F}(V16,V20), P_outc-{F}(V16,V21), P_or1-{F}(V16,V22), fulladder-{F}(V23), P_in1-{F}(V23,V14), P_h2-{F}(V23,V15), P_h1-{F}(V23,V24), P_outs-{F}(V24,V10), P_or1-{F}(V23,V25), P_in1-{F}(V25,V26), zero-{F}(V26) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5122: exists( #64, #5116 ), references = 1, size of lhs = 33:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in1-{F}(V4,V5), and_ok-{F}(V6), P_in1-{F}(V6,V5), P_in2-{F}(V6,V7), one-{F}(V7), P_out1-{F}(V6,V8), halfadder-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V9), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), P_in1-{F}(V9,V17), one-{F}(V17), fulladder-{F}(V18), P_h2-{F}(V18,V9), P_h1-{F}(V18,V19), P_outs-{F}(V19,V20), connection-{F}(V20,V8), P_or1-{F}(V18,V21), P_in1-{F}(V21,V22), zero-{F}(V22) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5162: exists( #65, #5156 ), references = 2, size of lhs = 37:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V6), not_ok-{F}(V6), P_and1-{F}(V5,V7), P_in1-{F}(V7,V8), P_in1-{F}(V6,V9), zero-{F}(V9), and_ok-{F}(V10), P_in1-{F}(V10,V8), P_in2-{F}(V10,V3), P_out1-{F}(V10,V11), one-{F}(V12), halfadder-{F}(V13), P_f-{F}(V14), P_h2-{F}(V14,V13), P_in1-{F}(V14,V15), P_in2-{F}(V14,V16), P_inc-{F}(V14,V17), P_outs-{F}(V14,V18), P_outc-{F}(V14,V19), P_or1-{F}(V14,V20), fulladder-{F}(V21), P_in1-{F}(V21,V12), P_h2-{F}(V21,V13), P_h1-{F}(V21,V22), P_outs-{F}(V22,V23), connection-{F}(V23,V11), P_or1-{F}(V21,V24), P_in1-{F}(V24,V25), zero-{F}(V25) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5163: exists( #65, #5157 ), references = 2, size of lhs = 43:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V6), not_ok-{F}(V6), P_and1-{F}(V5,V7), P_in1-{F}(V7,V8), P_in1-{F}(V6,V9), zero-{F}(V9), and_ok-{F}(V10), P_in1-{F}(V10,V8), P_in2-{F}(V10,V3), P_out1-{F}(V10,V11), halfadder-{F}(V12), P_outs-{F}(V12,V13), P_and1-{F}(V12,V14), halfadder-{F}(V15), P_and1-{F}(V15,V14), P_outs-{F}(V15,V16), connection-{F}(V16,V11), one-{F}(V17), halfadder-{F}(V18), P_f-{F}(V19), P_h2-{F}(V19,V18), P_in1-{F}(V19,V20), P_in2-{F}(V19,V21), P_inc-{F}(V19,V22), P_outs-{F}(V19,V23), P_outc-{F}(V19,V24), P_or1-{F}(V19,V25), fulladder-{F}(V26), P_in1-{F}(V26,V17), P_h2-{F}(V26,V18), P_h1-{F}(V26,V27), P_outs-{F}(V27,V13), P_or1-{F}(V26,V28), P_in1-{F}(V28,V29), zero-{F}(V29) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5164: exists( #65, #5158 ), references = 2, size of lhs = 39:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_in1-{F}(V5,V6), zero-{F}(V6), P_or1-{F}(V5,V7), not_ok-{F}(V7), halfadder-{F}(V8), P_or1-{F}(V8,V7), P_and1-{F}(V8,V9), P_in1-{F}(V9,V10), and_ok-{F}(V11), P_in1-{F}(V11,V10), P_in2-{F}(V11,V3), P_out1-{F}(V11,V12), one-{F}(V13), halfadder-{F}(V14), P_f-{F}(V15), P_h2-{F}(V15,V14), P_in1-{F}(V15,V16), P_in2-{F}(V15,V17), P_inc-{F}(V15,V18), P_outs-{F}(V15,V19), P_outc-{F}(V15,V20), P_or1-{F}(V15,V21), fulladder-{F}(V22), P_in1-{F}(V22,V13), P_h2-{F}(V22,V14), P_h1-{F}(V22,V23), P_outs-{F}(V23,V24), connection-{F}(V24,V12), P_or1-{F}(V22,V25), P_in1-{F}(V25,V26), zero-{F}(V26) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5174: exists( #64, #5168 ), references = 1, size of lhs = 36:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in2-{F}(V4,V5), halfadder-{F}(V6), P_or1-{F}(V6,V2), P_and1-{F}(V6,V7), P_in1-{F}(V7,V8), and_ok-{F}(V9), P_in1-{F}(V9,V8), P_in2-{F}(V9,V5), P_out1-{F}(V9,V10), one-{F}(V11), halfadder-{F}(V12), P_f-{F}(V13), P_h2-{F}(V13,V12), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15), P_inc-{F}(V13,V16), P_outs-{F}(V13,V17), P_outc-{F}(V13,V18), P_or1-{F}(V13,V19), fulladder-{F}(V20), P_in1-{F}(V20,V11), P_h2-{F}(V20,V12), P_h1-{F}(V20,V21), P_outs-{F}(V21,V22), connection-{F}(V22,V10), P_or1-{F}(V20,V23), P_in1-{F}(V23,V24), zero-{F}(V24) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5175: exists( #64, #5169 ), references = 1, size of lhs = 41:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in2-{F}(V4,V5), halfadder-{F}(V6), P_in1-{F}(V6,V7), zero-{F}(V7), P_or1-{F}(V6,V8), not_ok-{F}(V8), halfadder-{F}(V9), P_or1-{F}(V9,V8), P_and1-{F}(V9,V10), P_in1-{F}(V10,V11), and_ok-{F}(V12), P_in1-{F}(V12,V11), P_in2-{F}(V12,V5), P_out1-{F}(V12,V13), one-{F}(V14), halfadder-{F}(V15), P_f-{F}(V16), P_h2-{F}(V16,V15), P_in1-{F}(V16,V17), P_in2-{F}(V16,V18), P_inc-{F}(V16,V19), P_outs-{F}(V16,V20), P_outc-{F}(V16,V21), P_or1-{F}(V16,V22), fulladder-{F}(V23), P_in1-{F}(V23,V14), P_h2-{F}(V23,V15), P_h1-{F}(V23,V24), P_outs-{F}(V24,V25), connection-{F}(V25,V13), P_or1-{F}(V23,V26), P_in1-{F}(V26,V27), zero-{F}(V27) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5176: exists( #64, #5170 ), references = 1, size of lhs = 42:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in2-{F}(V4,V5), halfadder-{F}(V6), P_or1-{F}(V6,V2), P_and1-{F}(V6,V7), P_in1-{F}(V7,V8), and_ok-{F}(V9), P_in1-{F}(V9,V8), P_in2-{F}(V9,V5), P_out1-{F}(V9,V10), halfadder-{F}(V11), P_outs-{F}(V11,V12), P_and1-{F}(V11,V13), halfadder-{F}(V14), P_and1-{F}(V14,V13), P_outs-{F}(V14,V15), connection-{F}(V15,V10), one-{F}(V16), halfadder-{F}(V17), P_f-{F}(V18), P_h2-{F}(V18,V17), P_in1-{F}(V18,V19), P_in2-{F}(V18,V20), P_inc-{F}(V18,V21), P_outs-{F}(V18,V22), P_outc-{F}(V18,V23), P_or1-{F}(V18,V24), fulladder-{F}(V25), P_in1-{F}(V25,V16), P_h2-{F}(V25,V17), P_h1-{F}(V25,V26), P_outs-{F}(V26,V12), P_or1-{F}(V25,V27), P_in1-{F}(V27,V28), zero-{F}(V28) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5180: exists( #66, #5171 ), references = 1, size of lhs = 34:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), and_ok-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V2), P_and1-{F}(V5,V6), P_in1-{F}(V6,V7), P_in1-{F}(V4,V7), P_out1-{F}(V4,V8), one-{F}(V9), halfadder-{F}(V10), P_f-{F}(V11), P_h2-{F}(V11,V10), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), fulladder-{F}(V18), P_in1-{F}(V18,V9), P_h2-{F}(V18,V10), P_h1-{F}(V18,V19), P_outs-{F}(V19,V20), connection-{F}(V20,V8), P_or1-{F}(V18,V21), P_in1-{F}(V21,V22), zero-{F}(V22) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5181: exists( #66, #5172 ), references = 1, size of lhs = 39:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), and_ok-{F}(V4), halfadder-{F}(V5), P_in1-{F}(V5,V6), zero-{F}(V6), P_or1-{F}(V5,V7), not_ok-{F}(V7), halfadder-{F}(V8), P_or1-{F}(V8,V7), P_and1-{F}(V8,V9), P_in1-{F}(V9,V10), P_in1-{F}(V4,V10), P_out1-{F}(V4,V11), one-{F}(V12), halfadder-{F}(V13), P_f-{F}(V14), P_h2-{F}(V14,V13), P_in1-{F}(V14,V15), P_in2-{F}(V14,V16), P_inc-{F}(V14,V17), P_outs-{F}(V14,V18), P_outc-{F}(V14,V19), P_or1-{F}(V14,V20), fulladder-{F}(V21), P_in1-{F}(V21,V12), P_h2-{F}(V21,V13), P_h1-{F}(V21,V22), P_outs-{F}(V22,V23), connection-{F}(V23,V11), P_or1-{F}(V21,V24), P_in1-{F}(V24,V25), zero-{F}(V25) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5182: exists( #66, #5173 ), references = 1, size of lhs = 40:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), and_ok-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V2), P_and1-{F}(V5,V6), P_in1-{F}(V6,V7), P_in1-{F}(V4,V7), P_out1-{F}(V4,V8), halfadder-{F}(V9), P_outs-{F}(V9,V10), P_and1-{F}(V9,V11), halfadder-{F}(V12), P_and1-{F}(V12,V11), P_outs-{F}(V12,V13), connection-{F}(V13,V8), one-{F}(V14), halfadder-{F}(V15), P_f-{F}(V16), P_h2-{F}(V16,V15), P_in1-{F}(V16,V17), P_in2-{F}(V16,V18), P_inc-{F}(V16,V19), P_outs-{F}(V16,V20), P_outc-{F}(V16,V21), P_or1-{F}(V16,V22), fulladder-{F}(V23), P_in1-{F}(V23,V14), P_h2-{F}(V23,V15), P_h1-{F}(V23,V24), P_outs-{F}(V24,V10), P_or1-{F}(V23,V25), P_in1-{F}(V25,V26), zero-{F}(V26) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5189: exists( #65, #5183 ), references = 1, size of lhs = 35:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), zero-{F}(V4), P_or1-{F}(V3,V5), not_ok-{F}(V5), halfadder-{F}(V6), P_not1-{F}(V6,V5), P_and1-{F}(V6,V2), halfadder-{F}(V7), P_or1-{F}(V7,V5), P_and1-{F}(V7,V8), P_in1-{F}(V8,V9), P_in1-{F}(V2,V9), one-{F}(V10), halfadder-{F}(V11), P_f-{F}(V12), P_h2-{F}(V12,V11), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), fulladder-{F}(V19), P_in1-{F}(V19,V10), P_h2-{F}(V19,V11), P_h1-{F}(V19,V20), P_outs-{F}(V20,V1), P_or1-{F}(V19,V21), P_in1-{F}(V21,V22), zero-{F}(V22) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5190: exists( #65, #5184 ), references = 1, size of lhs = 40:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), zero-{F}(V4), P_or1-{F}(V3,V5), not_ok-{F}(V5), halfadder-{F}(V6), P_not1-{F}(V6,V5), P_and1-{F}(V6,V2), halfadder-{F}(V7), P_in1-{F}(V7,V8), zero-{F}(V8), P_or1-{F}(V7,V9), not_ok-{F}(V9), halfadder-{F}(V10), P_or1-{F}(V10,V9), P_and1-{F}(V10,V11), P_in1-{F}(V11,V12), P_in1-{F}(V2,V12), one-{F}(V13), halfadder-{F}(V14), P_f-{F}(V15), P_h2-{F}(V15,V14), P_in1-{F}(V15,V16), P_in2-{F}(V15,V17), P_inc-{F}(V15,V18), P_outs-{F}(V15,V19), P_outc-{F}(V15,V20), P_or1-{F}(V15,V21), fulladder-{F}(V22), P_in1-{F}(V22,V13), P_h2-{F}(V22,V14), P_h1-{F}(V22,V23), P_outs-{F}(V23,V1), P_or1-{F}(V22,V24), P_in1-{F}(V24,V25), zero-{F}(V25) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5191: exists( #65, #5185 ), references = 1, size of lhs = 41:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), zero-{F}(V4), P_or1-{F}(V3,V5), not_ok-{F}(V5), halfadder-{F}(V6), P_not1-{F}(V6,V5), P_and1-{F}(V6,V2), halfadder-{F}(V7), P_or1-{F}(V7,V5), P_and1-{F}(V7,V8), P_in1-{F}(V8,V9), P_in1-{F}(V2,V9), halfadder-{F}(V10), P_outs-{F}(V10,V11), P_and1-{F}(V10,V12), halfadder-{F}(V13), P_and1-{F}(V13,V12), P_outs-{F}(V13,V1), one-{F}(V14), halfadder-{F}(V15), P_f-{F}(V16), P_h2-{F}(V16,V15), P_in1-{F}(V16,V17), P_in2-{F}(V16,V18), P_inc-{F}(V16,V19), P_outs-{F}(V16,V20), P_outc-{F}(V16,V21), P_or1-{F}(V16,V22), fulladder-{F}(V23), P_in1-{F}(V23,V14), P_h2-{F}(V23,V15), P_h1-{F}(V23,V24), P_outs-{F}(V24,V11), P_or1-{F}(V23,V25), P_in1-{F}(V25,V26), zero-{F}(V26) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5195: exists( #64, #5186 ), references = 1, size of lhs = 33:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), zero-{F}(V4), P_or1-{F}(V3,V5), not_ok-{F}(V5), halfadder-{F}(V6), P_not1-{F}(V6,V5), P_and1-{F}(V6,V2), halfadder-{F}(V7), P_or1-{F}(V7,V5), P_and1-{F}(V7,V2), one-{F}(V8), halfadder-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V9), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), fulladder-{F}(V17), P_in1-{F}(V17,V8), P_h2-{F}(V17,V9), P_h1-{F}(V17,V18), P_outs-{F}(V18,V1), P_or1-{F}(V17,V19), P_in1-{F}(V19,V20), zero-{F}(V20) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5196: exists( #64, #5187 ), references = 1, size of lhs = 38:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), zero-{F}(V4), P_or1-{F}(V3,V5), not_ok-{F}(V5), halfadder-{F}(V6), P_not1-{F}(V6,V5), P_and1-{F}(V6,V2), halfadder-{F}(V7), P_in1-{F}(V7,V8), zero-{F}(V8), P_or1-{F}(V7,V9), not_ok-{F}(V9), halfadder-{F}(V10), P_or1-{F}(V10,V9), P_and1-{F}(V10,V2), one-{F}(V11), halfadder-{F}(V12), P_f-{F}(V13), P_h2-{F}(V13,V12), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15), P_inc-{F}(V13,V16), P_outs-{F}(V13,V17), P_outc-{F}(V13,V18), P_or1-{F}(V13,V19), fulladder-{F}(V20), P_in1-{F}(V20,V11), P_h2-{F}(V20,V12), P_h1-{F}(V20,V21), P_outs-{F}(V21,V1), P_or1-{F}(V20,V22), P_in1-{F}(V22,V23), zero-{F}(V23) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5197: exists( #64, #5188 ), references = 1, size of lhs = 39:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), zero-{F}(V4), P_or1-{F}(V3,V5), not_ok-{F}(V5), halfadder-{F}(V6), P_not1-{F}(V6,V5), P_and1-{F}(V6,V2), halfadder-{F}(V7), P_or1-{F}(V7,V5), P_and1-{F}(V7,V2), halfadder-{F}(V8), P_outs-{F}(V8,V9), P_and1-{F}(V8,V10), halfadder-{F}(V11), P_and1-{F}(V11,V10), P_outs-{F}(V11,V1), one-{F}(V12), halfadder-{F}(V13), P_f-{F}(V14), P_h2-{F}(V14,V13), P_in1-{F}(V14,V15), P_in2-{F}(V14,V16), P_inc-{F}(V14,V17), P_outs-{F}(V14,V18), P_outc-{F}(V14,V19), P_or1-{F}(V14,V20), fulladder-{F}(V21), P_in1-{F}(V21,V12), P_h2-{F}(V21,V13), P_h1-{F}(V21,V22), P_outs-{F}(V22,V9), P_or1-{F}(V21,V23), P_in1-{F}(V23,V24), zero-{F}(V24) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5212: mergings( V3 == V25, V4 == V26, V5 == V27, V9 == V31, V7 == V29, V8 == V30, V0 == V24, V6 == V28; #5201 ), references = 1, size of lhs = 40:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and1-{F}(V1,V0), P_outs-{F}(V1,V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), zero-{F}(V4), P_or1-{F}(V3,V5), not_ok-{F}(V5), halfadder-{F}(V6), P_not1-{F}(V6,V5), P_and1-{F}(V6,V0), halfadder-{F}(V7), P_or1-{F}(V7,V5), P_and1-{F}(V7,V0), one-{F}(V8), halfadder-{F}(V9), P_and2-{F}(V9,V10), P_and1-{F}(V9,V11), P_f-{F}(V12), P_h2-{F}(V12,V9), P_h1-{F}(V12,V13), P_and1-{F}(V13,V0), P_or1-{F}(V13,V14), P_not1-{F}(V13,V15), P_and2-{F}(V13,V16), P_in1-{F}(V12,V17), P_in2-{F}(V12,V18), P_inc-{F}(V12,V19), P_outs-{F}(V12,V20), P_outc-{F}(V12,V21), P_or1-{F}(V12,V22), fulladder-{F}(V23), P_in1-{F}(V23,V8), P_h2-{F}(V23,V9), P_h1-{F}(V23,V24), P_outs-{F}(V24,V2), P_or1-{F}(V23,V25), P_in1-{F}(V25,V26), zero-{F}(V26) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5221: mergings( V3 == V28, V4 == V29, V5 == V30, V9 == V34, V7 == V32, V8 == V33, V0 == V27, V6 == V31; #5202 ), references = 1, size of lhs = 45:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and1-{F}(V1,V0), P_outs-{F}(V1,V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), zero-{F}(V4), P_or1-{F}(V3,V5), not_ok-{F}(V5), halfadder-{F}(V6), P_not1-{F}(V6,V5), P_and1-{F}(V6,V0), halfadder-{F}(V7), P_in1-{F}(V7,V8), zero-{F}(V8), P_or1-{F}(V7,V9), not_ok-{F}(V9), halfadder-{F}(V10), P_or1-{F}(V10,V9), P_and1-{F}(V10,V0), one-{F}(V11), halfadder-{F}(V12), P_and2-{F}(V12,V13), P_and1-{F}(V12,V14), P_f-{F}(V15), P_h2-{F}(V15,V12), P_h1-{F}(V15,V16), P_and1-{F}(V16,V0), P_or1-{F}(V16,V17), P_not1-{F}(V16,V18), P_and2-{F}(V16,V19), P_in1-{F}(V15,V20), P_in2-{F}(V15,V21), P_inc-{F}(V15,V22), P_outs-{F}(V15,V23), P_outc-{F}(V15,V24), P_or1-{F}(V15,V25), fulladder-{F}(V26), P_in1-{F}(V26,V11), P_h2-{F}(V26,V12), P_h1-{F}(V26,V27), P_outs-{F}(V27,V2), P_or1-{F}(V26,V28), P_in1-{F}(V28,V29), zero-{F}(V29) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5230: mergings( V3 == V29, V4 == V30, V5 == V31, V9 == V35, V7 == V33, V8 == V34, V0 == V28, V6 == V32; #5203 ), references = 1, size of lhs = 46:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and1-{F}(V1,V0), P_outs-{F}(V1,V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), zero-{F}(V4), P_or1-{F}(V3,V5), not_ok-{F}(V5), halfadder-{F}(V6), P_not1-{F}(V6,V5), P_and1-{F}(V6,V0), halfadder-{F}(V7), P_or1-{F}(V7,V5), P_and1-{F}(V7,V0), halfadder-{F}(V8), P_outs-{F}(V8,V9), P_and1-{F}(V8,V10), halfadder-{F}(V11), P_and1-{F}(V11,V10), P_outs-{F}(V11,V2), one-{F}(V12), halfadder-{F}(V13), P_and2-{F}(V13,V14), P_and1-{F}(V13,V15), P_f-{F}(V16), P_h2-{F}(V16,V13), P_h1-{F}(V16,V17), P_and1-{F}(V17,V0), P_or1-{F}(V17,V18), P_not1-{F}(V17,V19), P_and2-{F}(V17,V20), P_in1-{F}(V16,V21), P_in2-{F}(V16,V22), P_inc-{F}(V16,V23), P_outs-{F}(V16,V24), P_outc-{F}(V16,V25), P_or1-{F}(V16,V26), fulladder-{F}(V27), P_in1-{F}(V27,V12), P_h2-{F}(V27,V13), P_h1-{F}(V27,V28), P_outs-{F}(V28,V9), P_or1-{F}(V27,V29), P_in1-{F}(V29,V30), zero-{F}(V30) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5242: mergings( V3 == V24, V4 == V25, V5 == V26, V9 == V30, V7 == V28, V8 == V29, V0 == V23, V6 == V27; #5231 ), references = 1, size of lhs = 39:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and1-{F}(V1,V0), P_outs-{F}(V1,V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), zero-{F}(V4), P_or1-{F}(V3,V5), not_ok-{F}(V5), halfadder-{F}(V6), P_not1-{F}(V6,V5), P_and1-{F}(V6,V0), halfadder-{F}(V7), P_or1-{F}(V7,V5), P_and1-{F}(V7,V0), one-{F}(V8), halfadder-{F}(V9), P_and1-{F}(V9,V10), P_f-{F}(V11), P_h2-{F}(V11,V9), P_h1-{F}(V11,V12), P_and1-{F}(V12,V0), P_or1-{F}(V12,V13), P_not1-{F}(V12,V14), P_and2-{F}(V12,V15), P_in1-{F}(V11,V16), P_in2-{F}(V11,V17), P_inc-{F}(V11,V18), P_outs-{F}(V11,V19), P_outc-{F}(V11,V20), P_or1-{F}(V11,V21), fulladder-{F}(V22), P_in1-{F}(V22,V8), P_h2-{F}(V22,V9), P_h1-{F}(V22,V23), P_outs-{F}(V23,V2), P_or1-{F}(V22,V24), P_in1-{F}(V24,V25), zero-{F}(V25) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5251: mergings( V3 == V27, V4 == V28, V5 == V29, V9 == V33, V7 == V31, V8 == V32, V0 == V26, V6 == V30; #5232 ), references = 1, size of lhs = 44:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and1-{F}(V1,V0), P_outs-{F}(V1,V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), zero-{F}(V4), P_or1-{F}(V3,V5), not_ok-{F}(V5), halfadder-{F}(V6), P_not1-{F}(V6,V5), P_and1-{F}(V6,V0), halfadder-{F}(V7), P_in1-{F}(V7,V8), zero-{F}(V8), P_or1-{F}(V7,V9), not_ok-{F}(V9), halfadder-{F}(V10), P_or1-{F}(V10,V9), P_and1-{F}(V10,V0), one-{F}(V11), halfadder-{F}(V12), P_and1-{F}(V12,V13), P_f-{F}(V14), P_h2-{F}(V14,V12), P_h1-{F}(V14,V15), P_and1-{F}(V15,V0), P_or1-{F}(V15,V16), P_not1-{F}(V15,V17), P_and2-{F}(V15,V18), P_in1-{F}(V14,V19), P_in2-{F}(V14,V20), P_inc-{F}(V14,V21), P_outs-{F}(V14,V22), P_outc-{F}(V14,V23), P_or1-{F}(V14,V24), fulladder-{F}(V25), P_in1-{F}(V25,V11), P_h2-{F}(V25,V12), P_h1-{F}(V25,V26), P_outs-{F}(V26,V2), P_or1-{F}(V25,V27), P_in1-{F}(V27,V28), zero-{F}(V28) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5260: mergings( V3 == V28, V4 == V29, V5 == V30, V9 == V34, V7 == V32, V8 == V33, V0 == V27, V6 == V31; #5233 ), references = 1, size of lhs = 45:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and1-{F}(V1,V0), P_outs-{F}(V1,V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), zero-{F}(V4), P_or1-{F}(V3,V5), not_ok-{F}(V5), halfadder-{F}(V6), P_not1-{F}(V6,V5), P_and1-{F}(V6,V0), halfadder-{F}(V7), P_or1-{F}(V7,V5), P_and1-{F}(V7,V0), halfadder-{F}(V8), P_outs-{F}(V8,V9), P_and1-{F}(V8,V10), halfadder-{F}(V11), P_and1-{F}(V11,V10), P_outs-{F}(V11,V2), one-{F}(V12), halfadder-{F}(V13), P_and1-{F}(V13,V14), P_f-{F}(V15), P_h2-{F}(V15,V13), P_h1-{F}(V15,V16), P_and1-{F}(V16,V0), P_or1-{F}(V16,V17), P_not1-{F}(V16,V18), P_and2-{F}(V16,V19), P_in1-{F}(V15,V20), P_in2-{F}(V15,V21), P_inc-{F}(V15,V22), P_outs-{F}(V15,V23), P_outc-{F}(V15,V24), P_or1-{F}(V15,V25), fulladder-{F}(V26), P_in1-{F}(V26,V12), P_h2-{F}(V26,V13), P_h1-{F}(V26,V27), P_outs-{F}(V27,V9), P_or1-{F}(V26,V28), P_in1-{F}(V28,V29), zero-{F}(V29) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5272: mergings( V3 == V23, V4 == V24, V5 == V25, V9 == V29, V7 == V27, V8 == V28, V0 == V22, V6 == V26; #5261 ), references = 1, size of lhs = 38:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and1-{F}(V1,V0), P_outs-{F}(V1,V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), zero-{F}(V4), P_or1-{F}(V3,V5), not_ok-{F}(V5), halfadder-{F}(V6), P_not1-{F}(V6,V5), P_and1-{F}(V6,V0), halfadder-{F}(V7), P_or1-{F}(V7,V5), P_and1-{F}(V7,V0), one-{F}(V8), halfadder-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V9), P_h1-{F}(V10,V11), P_and1-{F}(V11,V0), P_or1-{F}(V11,V12), P_not1-{F}(V11,V13), P_and2-{F}(V11,V14), P_in1-{F}(V10,V15), P_in2-{F}(V10,V16), P_inc-{F}(V10,V17), P_outs-{F}(V10,V18), P_outc-{F}(V10,V19), P_or1-{F}(V10,V20), fulladder-{F}(V21), P_in1-{F}(V21,V8), P_h2-{F}(V21,V9), P_h1-{F}(V21,V22), P_outs-{F}(V22,V2), P_or1-{F}(V21,V23), P_in1-{F}(V23,V24), zero-{F}(V24) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5281: mergings( V3 == V26, V4 == V27, V5 == V28, V9 == V32, V7 == V30, V8 == V31, V0 == V25, V6 == V29; #5262 ), references = 1, size of lhs = 43:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and1-{F}(V1,V0), P_outs-{F}(V1,V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), zero-{F}(V4), P_or1-{F}(V3,V5), not_ok-{F}(V5), halfadder-{F}(V6), P_not1-{F}(V6,V5), P_and1-{F}(V6,V0), halfadder-{F}(V7), P_in1-{F}(V7,V8), zero-{F}(V8), P_or1-{F}(V7,V9), not_ok-{F}(V9), halfadder-{F}(V10), P_or1-{F}(V10,V9), P_and1-{F}(V10,V0), one-{F}(V11), halfadder-{F}(V12), P_f-{F}(V13), P_h2-{F}(V13,V12), P_h1-{F}(V13,V14), P_and1-{F}(V14,V0), P_or1-{F}(V14,V15), P_not1-{F}(V14,V16), P_and2-{F}(V14,V17), P_in1-{F}(V13,V18), P_in2-{F}(V13,V19), P_inc-{F}(V13,V20), P_outs-{F}(V13,V21), P_outc-{F}(V13,V22), P_or1-{F}(V13,V23), fulladder-{F}(V24), P_in1-{F}(V24,V11), P_h2-{F}(V24,V12), P_h1-{F}(V24,V25), P_outs-{F}(V25,V2), P_or1-{F}(V24,V26), P_in1-{F}(V26,V27), zero-{F}(V27) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5290: mergings( V3 == V27, V4 == V28, V5 == V29, V9 == V33, V7 == V31, V8 == V32, V0 == V26, V6 == V30; #5263 ), references = 1, size of lhs = 44:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and1-{F}(V1,V0), P_outs-{F}(V1,V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), zero-{F}(V4), P_or1-{F}(V3,V5), not_ok-{F}(V5), halfadder-{F}(V6), P_not1-{F}(V6,V5), P_and1-{F}(V6,V0), halfadder-{F}(V7), P_or1-{F}(V7,V5), P_and1-{F}(V7,V0), halfadder-{F}(V8), P_outs-{F}(V8,V9), P_and1-{F}(V8,V10), halfadder-{F}(V11), P_and1-{F}(V11,V10), P_outs-{F}(V11,V2), one-{F}(V12), halfadder-{F}(V13), P_f-{F}(V14), P_h2-{F}(V14,V13), P_h1-{F}(V14,V15), P_and1-{F}(V15,V0), P_or1-{F}(V15,V16), P_not1-{F}(V15,V17), P_and2-{F}(V15,V18), P_in1-{F}(V14,V19), P_in2-{F}(V14,V20), P_inc-{F}(V14,V21), P_outs-{F}(V14,V22), P_outc-{F}(V14,V23), P_or1-{F}(V14,V24), fulladder-{F}(V25), P_in1-{F}(V25,V12), P_h2-{F}(V25,V13), P_h1-{F}(V25,V26), P_outs-{F}(V26,V9), P_or1-{F}(V25,V27), P_in1-{F}(V27,V28), zero-{F}(V28) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5302: mergings( V3 == V22, V4 == V23, V5 == V24, V9 == V28, V7 == V26, V8 == V27, V10 == V21, V6 == V25; #5291 ), references = 1, size of lhs = 36:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and1-{F}(V1,V0), halfadder-{F}(V2), P_in1-{F}(V2,V3), zero-{F}(V3), P_or1-{F}(V2,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V0), halfadder-{F}(V6), P_or1-{F}(V6,V4), P_and1-{F}(V6,V0), one-{F}(V7), halfadder-{F}(V8), P_f-{F}(V9), P_h2-{F}(V9,V8), P_h1-{F}(V9,V10), P_and1-{F}(V10,V0), P_or1-{F}(V10,V11), P_not1-{F}(V10,V12), P_and2-{F}(V10,V13), P_in1-{F}(V9,V14), P_in2-{F}(V9,V15), P_inc-{F}(V9,V16), P_outs-{F}(V9,V17), P_outc-{F}(V9,V18), P_or1-{F}(V9,V19), fulladder-{F}(V20), P_in1-{F}(V20,V7), P_h2-{F}(V20,V8), P_h1-{F}(V20,V1), P_or1-{F}(V20,V21), P_in1-{F}(V21,V22), zero-{F}(V22) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5312: mergings( V2 == V20, V3 == V23, V4 == V24, V5 == V25, V9 == V29, V7 == V27, V8 == V28, V10 == V22, V6 == V26; #5293 ), references = 1, size of lhs = 36:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_in1-{F}(V1,V2), zero-{F}(V2), P_or1-{F}(V1,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V0), halfadder-{F}(V5), P_or1-{F}(V5,V3), P_and1-{F}(V5,V0), halfadder-{F}(V6), P_and1-{F}(V6,V0), one-{F}(V7), halfadder-{F}(V8), P_f-{F}(V9), P_h2-{F}(V9,V8), P_h1-{F}(V9,V10), P_and1-{F}(V10,V0), P_or1-{F}(V10,V11), P_not1-{F}(V10,V12), P_and2-{F}(V10,V13), P_in1-{F}(V9,V14), P_in2-{F}(V9,V15), P_inc-{F}(V9,V16), P_outs-{F}(V9,V17), P_outc-{F}(V9,V18), P_or1-{F}(V9,V19), fulladder-{F}(V20), P_in1-{F}(V20,V7), P_h2-{F}(V20,V8), P_h1-{F}(V20,V6), P_or1-{F}(V20,V21), P_in1-{F}(V21,V22), zero-{F}(V22) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5321: mergings( V3 == V25, V4 == V26, V5 == V27, V9 == V31, V7 == V29, V8 == V30, V10 == V24, V6 == V28; #5292 ), references = 1, size of lhs = 41:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and1-{F}(V1,V0), halfadder-{F}(V2), P_in1-{F}(V2,V3), zero-{F}(V3), P_or1-{F}(V2,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V0), halfadder-{F}(V6), P_in1-{F}(V6,V7), zero-{F}(V7), P_or1-{F}(V6,V8), not_ok-{F}(V8), halfadder-{F}(V9), P_or1-{F}(V9,V8), P_and1-{F}(V9,V0), one-{F}(V10), halfadder-{F}(V11), P_f-{F}(V12), P_h2-{F}(V12,V11), P_h1-{F}(V12,V13), P_and1-{F}(V13,V0), P_or1-{F}(V13,V14), P_not1-{F}(V13,V15), P_and2-{F}(V13,V16), P_in1-{F}(V12,V17), P_in2-{F}(V12,V18), P_inc-{F}(V12,V19), P_outs-{F}(V12,V20), P_outc-{F}(V12,V21), P_or1-{F}(V12,V22), fulladder-{F}(V23), P_in1-{F}(V23,V10), P_h2-{F}(V23,V11), P_h1-{F}(V23,V1), P_or1-{F}(V23,V24), P_in1-{F}(V24,V25), zero-{F}(V25) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5351: exists( #66, #5345 ), references = 1, size of lhs = 20:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), fulladder-{F}(V3), P_h1-{F}(V3,V4), halfadder-{F}(V4), P_and1-{F}(V4,V2), P_or1-{F}(V3,V5), P_in2-{F}(V5,V6), zero-{F}(V6), P_f-{F}(V7), P_h1-{F}(V7,V4), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), P_h2-{F}(V7,V14) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5352: exists( #66, #5346 ), references = 1, size of lhs = 23:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), fulladder-{F}(V3), P_h1-{F}(V3,V4), halfadder-{F}(V4), P_or1-{F}(V3,V5), P_in2-{F}(V5,V6), zero-{F}(V6), P_and2-{F}(V4,V7), P_f-{F}(V8), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14), P_h2-{F}(V8,V15), P_h1-{F}(V8,V16), halfadder-{F}(V16), P_and2-{F}(V16,V7), P_and1-{F}(V16,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5353: exists( #66, #5347 ), references = 1, size of lhs = 20:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), halfadder-{F}(V3), P_outc-{F}(V3,V4), zero-{F}(V4), P_and2-{F}(V3,V5), P_f-{F}(V6), P_in1-{F}(V6,V7), P_in2-{F}(V6,V8), P_inc-{F}(V6,V9), P_outs-{F}(V6,V10), P_outc-{F}(V6,V11), P_or1-{F}(V6,V12), P_h2-{F}(V6,V13), P_h1-{F}(V6,V14), halfadder-{F}(V14), P_and2-{F}(V14,V5), P_and1-{F}(V14,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5426: exists( #65, #5420 ), references = 3, size of lhs = 13:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), and_ok-{F}(V5), P_in2-{F}(V5,V3), P_in1-{F}(V5,V6), one-{F}(V6), P_out1-{F}(V5,V7), zero-{F}(V7) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5427: exists( #65, #5421 ), references = 2, size of lhs = 17:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), and_ok-{F}(V5), P_in2-{F}(V5,V3), P_in1-{F}(V5,V6), one-{F}(V6), P_out1-{F}(V5,V7), P_f-{F}(V8), P_outc-{F}(V8,V7), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_outs-{F}(V8,V11) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5428: exists( #65, #5422 ), references = 2, size of lhs = 24:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), and_ok-{F}(V5), P_in2-{F}(V5,V3), P_in1-{F}(V5,V6), one-{F}(V6), P_out1-{F}(V5,V7), logic_and-{F}(V8), P_out1-{F}(V8,V7), P_in2-{F}(V8,V9), P_f-{F}(V10), P_outc-{F}(V10,V9), P_inc-{F}(V10,V11), P_or1-{F}(V10,V12), P_h2-{F}(V10,V13), P_and2-{F}(V13,V8), P_in1-{F}(V10,V14), P_in2-{F}(V10,V15), P_outs-{F}(V10,V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5438: exists( #64, #5432 ), references = 2, size of lhs = 16:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), and_ok-{F}(V7), P_in2-{F}(V7,V6), P_in1-{F}(V7,V8), one-{F}(V8), P_out1-{F}(V7,V9), zero-{F}(V9) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5439: exists( #64, #5433 ), references = 2, size of lhs = 20:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), and_ok-{F}(V7), P_in2-{F}(V7,V6), P_in1-{F}(V7,V8), one-{F}(V8), P_out1-{F}(V7,V9), P_f-{F}(V10), P_outc-{F}(V10,V9), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_outs-{F}(V10,V13) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5440: exists( #64, #5434 ), references = 2, size of lhs = 27:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), and_ok-{F}(V7), P_in2-{F}(V7,V6), P_in1-{F}(V7,V8), one-{F}(V8), P_out1-{F}(V7,V9), logic_and-{F}(V10), P_out1-{F}(V10,V9), P_in2-{F}(V10,V11), P_f-{F}(V12), P_outc-{F}(V12,V11), P_inc-{F}(V12,V13), P_or1-{F}(V12,V14), P_h2-{F}(V12,V15), P_and2-{F}(V15,V10), P_in1-{F}(V12,V16), P_in2-{F}(V12,V17), P_outs-{F}(V12,V18) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5450: exists( #65, #5444 ), references = 2, size of lhs = 17:
% 282.36/282.56 and_ok-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), halfadder-{F}(V2), P_and2-{F}(V2,V0), P_not1-{F}(V2,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), and_ok-{F}(V7), P_in2-{F}(V7,V6), P_in1-{F}(V7,V8), one-{F}(V8), P_out1-{F}(V7,V9), zero-{F}(V9) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5451: exists( #65, #5445 ), references = 2, size of lhs = 21:
% 282.36/282.56 and_ok-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), halfadder-{F}(V2), P_and2-{F}(V2,V0), P_not1-{F}(V2,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), and_ok-{F}(V7), P_in2-{F}(V7,V6), P_in1-{F}(V7,V8), one-{F}(V8), P_out1-{F}(V7,V9), P_f-{F}(V10), P_outc-{F}(V10,V9), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_outs-{F}(V10,V13) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5452: exists( #65, #5446 ), references = 2, size of lhs = 28:
% 282.36/282.56 and_ok-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), halfadder-{F}(V2), P_and2-{F}(V2,V0), P_not1-{F}(V2,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), and_ok-{F}(V7), P_in2-{F}(V7,V6), P_in1-{F}(V7,V8), one-{F}(V8), P_out1-{F}(V7,V9), logic_and-{F}(V10), P_out1-{F}(V10,V9), P_in2-{F}(V10,V11), P_f-{F}(V12), P_outc-{F}(V12,V11), P_inc-{F}(V12,V13), P_or1-{F}(V12,V14), P_h2-{F}(V12,V15), P_and2-{F}(V15,V10), P_in1-{F}(V12,V16), P_in2-{F}(V12,V17), P_outs-{F}(V12,V18) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5462: exists( #64, #5456 ), references = 3, size of lhs = 19:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), and_ok-{F}(V8), P_in2-{F}(V8,V7), P_in1-{F}(V8,V9), one-{F}(V9), P_out1-{F}(V8,V10), zero-{F}(V10) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5463: exists( #64, #5457 ), references = 1, size of lhs = 23:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), and_ok-{F}(V8), P_in2-{F}(V8,V7), P_in1-{F}(V8,V9), one-{F}(V9), P_out1-{F}(V8,V10), P_f-{F}(V11), P_outc-{F}(V11,V10), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_outs-{F}(V11,V14) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5464: exists( #64, #5458 ), references = 1, size of lhs = 30:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), and_ok-{F}(V8), P_in2-{F}(V8,V7), P_in1-{F}(V8,V9), one-{F}(V9), P_out1-{F}(V8,V10), logic_and-{F}(V11), P_out1-{F}(V11,V10), P_in2-{F}(V11,V12), P_f-{F}(V13), P_outc-{F}(V13,V12), P_inc-{F}(V13,V14), P_or1-{F}(V13,V15), P_h2-{F}(V13,V16), P_and2-{F}(V16,V11), P_in1-{F}(V13,V17), P_in2-{F}(V13,V18), P_outs-{F}(V13,V19) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5468: exists( #66, #5459 ), references = 6, size of lhs = 17:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), and_ok-{F}(V6), P_in1-{F}(V6,V7), one-{F}(V7), P_out1-{F}(V6,V8), zero-{F}(V8) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5469: exists( #66, #5460 ), references = 1, size of lhs = 21:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), and_ok-{F}(V6), P_in1-{F}(V6,V7), one-{F}(V7), P_out1-{F}(V6,V8), P_f-{F}(V9), P_outc-{F}(V9,V8), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_outs-{F}(V9,V12) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5470: exists( #66, #5461 ), references = 1, size of lhs = 28:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), and_ok-{F}(V6), P_in1-{F}(V6,V7), one-{F}(V7), P_out1-{F}(V6,V8), logic_and-{F}(V9), P_out1-{F}(V9,V8), P_in2-{F}(V9,V10), P_f-{F}(V11), P_outc-{F}(V11,V10), P_inc-{F}(V11,V12), P_or1-{F}(V11,V13), P_h2-{F}(V11,V14), P_and2-{F}(V14,V9), P_in1-{F}(V11,V15), P_in2-{F}(V11,V16), P_outs-{F}(V11,V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5474: exists( #65, #5472 ), references = 4, size of lhs = 19:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), zero-{F}(V1), P_and1-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), zero-{F}(V4), P_and2-{F}(V3,V5), and_ok-{F}(V5), halfadder-{F}(V6), P_and2-{F}(V6,V5), P_not1-{F}(V6,V7), not_ok-{F}(V7), halfadder-{F}(V8), P_not1-{F}(V8,V7), P_and1-{F}(V8,V2), P_in1-{F}(V2,V9), one-{F}(V9) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5496: exists( #65, #5490 ), references = 2, size of lhs = 25:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_outs-{F}(V5,V6), zero-{F}(V6), P_and1-{F}(V5,V7), and_ok-{F}(V7), P_in1-{F}(V7,V3), halfadder-{F}(V8), P_in1-{F}(V8,V9), zero-{F}(V9), P_and2-{F}(V8,V10), and_ok-{F}(V10), halfadder-{F}(V11), P_and2-{F}(V11,V10), P_not1-{F}(V11,V12), not_ok-{F}(V12), halfadder-{F}(V13), P_not1-{F}(V13,V12), P_and1-{F}(V13,V7) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5497: exists( #65, #5491 ), references = 2, size of lhs = 19:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V6), not_ok-{F}(V6), P_and1-{F}(V5,V7), P_in2-{F}(V7,V8), P_in1-{F}(V6,V9), zero-{F}(V9), and_ok-{F}(V10), P_in2-{F}(V10,V8), P_in1-{F}(V10,V3), P_out1-{F}(V10,V11), zero-{F}(V11) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5498: exists( #65, #5492 ), references = 2, size of lhs = 23:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_in1-{F}(V5,V6), zero-{F}(V6), P_and2-{F}(V5,V7), and_ok-{F}(V7), halfadder-{F}(V8), P_and2-{F}(V8,V7), P_not1-{F}(V8,V9), not_ok-{F}(V9), halfadder-{F}(V10), P_not1-{F}(V10,V9), P_and1-{F}(V10,V11), and_ok-{F}(V11), P_in1-{F}(V11,V3), P_out1-{F}(V11,V12), zero-{F}(V12) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5508: exists( #64, #5502 ), references = 2, size of lhs = 28:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), halfadder-{F}(V7), P_outs-{F}(V7,V8), zero-{F}(V8), P_and1-{F}(V7,V9), and_ok-{F}(V9), P_in1-{F}(V9,V6), halfadder-{F}(V10), P_in1-{F}(V10,V11), zero-{F}(V11), P_and2-{F}(V10,V12), and_ok-{F}(V12), halfadder-{F}(V13), P_and2-{F}(V13,V12), P_not1-{F}(V13,V14), not_ok-{F}(V14), halfadder-{F}(V15), P_not1-{F}(V15,V14), P_and1-{F}(V15,V9) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5509: exists( #64, #5503 ), references = 2, size of lhs = 19:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), halfadder-{F}(V7), P_not1-{F}(V7,V3), P_and1-{F}(V7,V8), P_in2-{F}(V8,V9), and_ok-{F}(V10), P_in2-{F}(V10,V9), P_in1-{F}(V10,V6), P_out1-{F}(V10,V11), zero-{F}(V11) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5510: exists( #64, #5504 ), references = 2, size of lhs = 26:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), halfadder-{F}(V7), P_in1-{F}(V7,V8), zero-{F}(V8), P_and2-{F}(V7,V9), and_ok-{F}(V9), halfadder-{F}(V10), P_and2-{F}(V10,V9), P_not1-{F}(V10,V11), not_ok-{F}(V11), halfadder-{F}(V12), P_not1-{F}(V12,V11), P_and1-{F}(V12,V13), and_ok-{F}(V13), P_in1-{F}(V13,V6), P_out1-{F}(V13,V14), zero-{F}(V14) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5517: exists( #65, #5511 ), references = 2, size of lhs = 29:
% 282.36/282.56 and_ok-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), halfadder-{F}(V2), P_and2-{F}(V2,V0), P_not1-{F}(V2,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), halfadder-{F}(V7), P_outs-{F}(V7,V8), zero-{F}(V8), P_and1-{F}(V7,V9), and_ok-{F}(V9), P_in1-{F}(V9,V6), halfadder-{F}(V10), P_in1-{F}(V10,V11), zero-{F}(V11), P_and2-{F}(V10,V12), and_ok-{F}(V12), halfadder-{F}(V13), P_and2-{F}(V13,V12), P_not1-{F}(V13,V14), not_ok-{F}(V14), halfadder-{F}(V15), P_not1-{F}(V15,V14), P_and1-{F}(V15,V9) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5518: exists( #65, #5512 ), references = 2, size of lhs = 20:
% 282.36/282.56 and_ok-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), halfadder-{F}(V2), P_and2-{F}(V2,V0), P_not1-{F}(V2,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), halfadder-{F}(V7), P_not1-{F}(V7,V3), P_and1-{F}(V7,V8), P_in2-{F}(V8,V9), and_ok-{F}(V10), P_in2-{F}(V10,V9), P_in1-{F}(V10,V6), P_out1-{F}(V10,V11), zero-{F}(V11) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5519: exists( #65, #5513 ), references = 2, size of lhs = 27:
% 282.36/282.56 and_ok-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), halfadder-{F}(V2), P_and2-{F}(V2,V0), P_not1-{F}(V2,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), halfadder-{F}(V7), P_in1-{F}(V7,V8), zero-{F}(V8), P_and2-{F}(V7,V9), and_ok-{F}(V9), halfadder-{F}(V10), P_and2-{F}(V10,V9), P_not1-{F}(V10,V11), not_ok-{F}(V11), halfadder-{F}(V12), P_not1-{F}(V12,V11), P_and1-{F}(V12,V13), and_ok-{F}(V13), P_in1-{F}(V13,V6), P_out1-{F}(V13,V14), zero-{F}(V14) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5535: exists( #64, #5529 ), references = 1, size of lhs = 31:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), halfadder-{F}(V8), P_outs-{F}(V8,V9), zero-{F}(V9), P_and1-{F}(V8,V10), and_ok-{F}(V10), P_in1-{F}(V10,V7), halfadder-{F}(V11), P_in1-{F}(V11,V12), zero-{F}(V12), P_and2-{F}(V11,V13), and_ok-{F}(V13), halfadder-{F}(V14), P_and2-{F}(V14,V13), P_not1-{F}(V14,V15), not_ok-{F}(V15), halfadder-{F}(V16), P_not1-{F}(V16,V15), P_and1-{F}(V16,V10) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5536: exists( #64, #5530 ), references = 1, size of lhs = 22:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), halfadder-{F}(V8), P_not1-{F}(V8,V4), P_and1-{F}(V8,V9), P_in2-{F}(V9,V10), and_ok-{F}(V11), P_in2-{F}(V11,V10), P_in1-{F}(V11,V7), P_out1-{F}(V11,V12), zero-{F}(V12) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5537: exists( #64, #5531 ), references = 1, size of lhs = 29:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), halfadder-{F}(V8), P_in1-{F}(V8,V9), zero-{F}(V9), P_and2-{F}(V8,V10), and_ok-{F}(V10), halfadder-{F}(V11), P_and2-{F}(V11,V10), P_not1-{F}(V11,V12), not_ok-{F}(V12), halfadder-{F}(V13), P_not1-{F}(V13,V12), P_and1-{F}(V13,V14), and_ok-{F}(V14), P_in1-{F}(V14,V7), P_out1-{F}(V14,V15), zero-{F}(V15) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5577: exists( #66, #5571 ), references = 1, size of lhs = 24:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_or1-{F}(V0,V2), or_ok-{F}(V2), P_out1-{F}(V2,V3), halfadder-{F}(V4), P_outs-{F}(V4,V5), zero-{F}(V5), P_and1-{F}(V4,V6), and_ok-{F}(V6), P_in1-{F}(V6,V3), halfadder-{F}(V7), P_in1-{F}(V7,V8), zero-{F}(V8), P_and2-{F}(V7,V9), and_ok-{F}(V9), halfadder-{F}(V10), P_and2-{F}(V10,V9), P_not1-{F}(V10,V11), not_ok-{F}(V11), halfadder-{F}(V12), P_not1-{F}(V12,V11), P_and1-{F}(V12,V6) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5578: exists( #66, #5572 ), references = 1, size of lhs = 22:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_or1-{F}(V0,V2), or_ok-{F}(V2), P_out1-{F}(V2,V3), halfadder-{F}(V4), P_in1-{F}(V4,V5), zero-{F}(V5), P_and2-{F}(V4,V6), and_ok-{F}(V6), halfadder-{F}(V7), P_and2-{F}(V7,V6), P_not1-{F}(V7,V8), not_ok-{F}(V8), halfadder-{F}(V9), P_not1-{F}(V9,V8), P_and1-{F}(V9,V10), and_ok-{F}(V10), P_in1-{F}(V10,V3), P_out1-{F}(V10,V11), zero-{F}(V11) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5579: exists( #66, #5573 ), references = 1, size of lhs = 24:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_or1-{F}(V0,V2), or_ok-{F}(V2), P_out1-{F}(V2,V3), halfadder-{F}(V4), P_in1-{F}(V4,V5), zero-{F}(V5), P_and2-{F}(V4,V6), and_ok-{F}(V6), halfadder-{F}(V7), P_and2-{F}(V7,V6), P_not1-{F}(V7,V8), not_ok-{F}(V8), halfadder-{F}(V9), P_not1-{F}(V9,V8), P_and1-{F}(V9,V10), P_in2-{F}(V10,V11), and_ok-{F}(V12), P_in2-{F}(V12,V11), P_in1-{F}(V12,V3), P_out1-{F}(V12,V13), zero-{F}(V13) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5619: exists( #66, #5613 ), references = 1, size of lhs = 25:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_or1-{F}(V0,V2), or_ok-{F}(V2), P_out1-{F}(V2,V3), connection-{F}(V3,V4), halfadder-{F}(V5), P_outs-{F}(V5,V6), zero-{F}(V6), P_and1-{F}(V5,V7), and_ok-{F}(V7), P_in1-{F}(V7,V4), halfadder-{F}(V8), P_in1-{F}(V8,V9), zero-{F}(V9), P_and2-{F}(V8,V10), and_ok-{F}(V10), halfadder-{F}(V11), P_and2-{F}(V11,V10), P_not1-{F}(V11,V12), not_ok-{F}(V12), halfadder-{F}(V13), P_not1-{F}(V13,V12), P_and1-{F}(V13,V7) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5620: exists( #66, #5614 ), references = 1, size of lhs = 23:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_or1-{F}(V0,V2), or_ok-{F}(V2), P_out1-{F}(V2,V3), connection-{F}(V3,V4), halfadder-{F}(V5), P_in1-{F}(V5,V6), zero-{F}(V6), P_and2-{F}(V5,V7), and_ok-{F}(V7), halfadder-{F}(V8), P_and2-{F}(V8,V7), P_not1-{F}(V8,V9), not_ok-{F}(V9), halfadder-{F}(V10), P_not1-{F}(V10,V9), P_and1-{F}(V10,V11), and_ok-{F}(V11), P_in1-{F}(V11,V4), P_out1-{F}(V11,V12), zero-{F}(V12) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5621: exists( #66, #5615 ), references = 1, size of lhs = 25:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_or1-{F}(V0,V2), or_ok-{F}(V2), P_out1-{F}(V2,V3), connection-{F}(V3,V4), halfadder-{F}(V5), P_in1-{F}(V5,V6), zero-{F}(V6), P_and2-{F}(V5,V7), and_ok-{F}(V7), halfadder-{F}(V8), P_and2-{F}(V8,V7), P_not1-{F}(V8,V9), not_ok-{F}(V9), halfadder-{F}(V10), P_not1-{F}(V10,V9), P_and1-{F}(V10,V11), P_in2-{F}(V11,V12), and_ok-{F}(V13), P_in2-{F}(V13,V12), P_in1-{F}(V13,V4), P_out1-{F}(V13,V14), zero-{F}(V14) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5628: exists( #65, #5622 ), references = 1, size of lhs = 27:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), or_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), halfadder-{F}(V4), P_or1-{F}(V4,V1), P_in2-{F}(V4,V5), one-{F}(V5), halfadder-{F}(V6), P_outs-{F}(V6,V7), zero-{F}(V7), P_and1-{F}(V6,V8), and_ok-{F}(V8), P_in1-{F}(V8,V3), halfadder-{F}(V9), P_in1-{F}(V9,V10), zero-{F}(V10), P_and2-{F}(V9,V11), and_ok-{F}(V11), halfadder-{F}(V12), P_and2-{F}(V12,V11), P_not1-{F}(V12,V13), not_ok-{F}(V13), halfadder-{F}(V14), P_not1-{F}(V14,V13), P_and1-{F}(V14,V8) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5630: exists( #64, #5625 ), references = 3, size of lhs = 25:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), or_ok-{F}(V1), P_and1-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V1), P_in2-{F}(V3,V4), one-{F}(V4), halfadder-{F}(V5), P_and1-{F}(V5,V2), P_outs-{F}(V5,V6), zero-{F}(V6), halfadder-{F}(V7), P_in1-{F}(V7,V8), zero-{F}(V8), P_and2-{F}(V7,V9), and_ok-{F}(V9), halfadder-{F}(V10), P_and2-{F}(V10,V9), P_not1-{F}(V10,V11), not_ok-{F}(V11), halfadder-{F}(V12), P_not1-{F}(V12,V11), P_and1-{F}(V12,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5659: mergings( V11 == V22, V22 == V35, V10 == V21, V21 == V34, V3 == V14, V4 == V15, V5 == V16, V9 == V20, V7 == V18, V8 == V19, V12 == V23, V2 == V24, V6 == V17, V14 == V27, V15 == V28, V16 == V29, V20 == V33, V18 == V31, V19 == V32, V23 == V36, V13 == V39, V25 == V38, V24 == V37, V17 == V30; #5634 ), references = 1, size of lhs = 40:
% 282.36/282.56 logic_or-{F}(V0), logic_and-{F}(V1), logic_and-{F}(V2), P_f-{F}(V3), P_h2-{F}(V3,V4), P_in1-{F}(V3,V5), P_in2-{F}(V3,V6), P_inc-{F}(V3,V7), P_outs-{F}(V3,V8), P_outc-{F}(V3,V9), P_or1-{F}(V3,V10), P_and2-{F}(V4,V11), P_and1-{F}(V4,V12), P_h1-{F}(V3,V13), P_and1-{F}(V13,V2), P_or1-{F}(V13,V0), P_and2-{F}(V13,V1), P_not1-{F}(V13,V14), halfadder-{F}(V15), P_and1-{F}(V15,V2), P_or1-{F}(V15,V0), halfadder-{F}(V16), P_or1-{F}(V16,V0), P_in2-{F}(V16,V17), one-{F}(V17), halfadder-{F}(V18), P_and1-{F}(V18,V2), P_outs-{F}(V18,V19), zero-{F}(V19), halfadder-{F}(V20), P_and2-{F}(V20,V1), P_in1-{F}(V20,V21), zero-{F}(V21), halfadder-{F}(V22), P_and2-{F}(V22,V1), P_not1-{F}(V22,V23), not_ok-{F}(V23), halfadder-{F}(V24), P_not1-{F}(V24,V23), P_and1-{F}(V24,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5683: mergings( V10 == V20, V20 == V32, V3 == V13, V4 == V14, V5 == V15, V9 == V19, V7 == V17, V8 == V18, V11 == V21, V2 == V22, V6 == V16, V13 == V25, V14 == V26, V15 == V27, V19 == V31, V17 == V29, V18 == V30, V21 == V33, V12 == V36, V23 == V35, V22 == V34, V16 == V28; #5660 ), references = 2, size of lhs = 39:
% 282.36/282.56 logic_or-{F}(V0), logic_and-{F}(V1), logic_and-{F}(V2), P_f-{F}(V3), P_h2-{F}(V3,V4), P_in1-{F}(V3,V5), P_in2-{F}(V3,V6), P_inc-{F}(V3,V7), P_outs-{F}(V3,V8), P_outc-{F}(V3,V9), P_or1-{F}(V3,V10), P_and1-{F}(V4,V11), P_h1-{F}(V3,V12), P_and1-{F}(V12,V2), P_or1-{F}(V12,V0), P_and2-{F}(V12,V1), P_not1-{F}(V12,V13), halfadder-{F}(V14), P_and1-{F}(V14,V2), P_or1-{F}(V14,V0), halfadder-{F}(V15), P_or1-{F}(V15,V0), P_in2-{F}(V15,V16), one-{F}(V16), halfadder-{F}(V17), P_and1-{F}(V17,V2), P_outs-{F}(V17,V18), zero-{F}(V18), halfadder-{F}(V19), P_and2-{F}(V19,V1), P_in1-{F}(V19,V20), zero-{F}(V20), halfadder-{F}(V21), P_and2-{F}(V21,V1), P_not1-{F}(V21,V22), not_ok-{F}(V22), halfadder-{F}(V23), P_not1-{F}(V23,V22), P_and1-{F}(V23,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5705: mergings( V3 == V12, V4 == V13, V5 == V14, V9 == V18, V7 == V16, V8 == V17, V10 == V19, V2 == V20, V6 == V15, V12 == V23, V13 == V24, V14 == V25, V18 == V29, V16 == V27, V17 == V28, V19 == V30, V11 == V33, V21 == V32, V20 == V31, V15 == V26; #5684 ), references = 4, size of lhs = 38:
% 282.36/282.56 logic_or-{F}(V0), logic_and-{F}(V1), logic_and-{F}(V2), P_f-{F}(V3), P_h2-{F}(V3,V4), P_in1-{F}(V3,V5), P_in2-{F}(V3,V6), P_inc-{F}(V3,V7), P_outs-{F}(V3,V8), P_outc-{F}(V3,V9), P_or1-{F}(V3,V10), P_h1-{F}(V3,V11), P_and1-{F}(V11,V2), P_or1-{F}(V11,V0), P_and2-{F}(V11,V1), P_not1-{F}(V11,V12), halfadder-{F}(V13), P_and1-{F}(V13,V2), P_or1-{F}(V13,V0), halfadder-{F}(V14), P_or1-{F}(V14,V0), P_in2-{F}(V14,V15), one-{F}(V15), halfadder-{F}(V16), P_and1-{F}(V16,V2), P_outs-{F}(V16,V17), zero-{F}(V17), halfadder-{F}(V18), P_and2-{F}(V18,V1), P_in1-{F}(V18,V19), zero-{F}(V19), halfadder-{F}(V20), P_and2-{F}(V20,V1), P_not1-{F}(V20,V21), not_ok-{F}(V21), halfadder-{F}(V22), P_not1-{F}(V22,V21), P_and1-{F}(V22,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5744: exists( #65, #5742 ), references = 2, size of lhs = 19:
% 282.36/282.56 halfadder-{F}(V0), P_outc-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), zero-{F}(V4), P_and2-{F}(V3,V5), and_ok-{F}(V5), halfadder-{F}(V6), P_and2-{F}(V6,V5), P_not1-{F}(V6,V7), not_ok-{F}(V7), halfadder-{F}(V8), P_not1-{F}(V8,V7), P_and1-{F}(V8,V2), P_in1-{F}(V2,V9), one-{F}(V9) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5754: exists( #64, #5752 ), references = 1, size of lhs = 21:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_outc-{F}(V3,V4), zero-{F}(V4), halfadder-{F}(V5), P_in1-{F}(V5,V6), zero-{F}(V6), P_and2-{F}(V5,V7), and_ok-{F}(V7), halfadder-{F}(V8), P_and2-{F}(V8,V7), P_not1-{F}(V8,V9), not_ok-{F}(V9), halfadder-{F}(V10), P_not1-{F}(V10,V9), P_and1-{F}(V10,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5758: exists( #72, #5756 ), references = 1, size of lhs = 24:
% 282.36/282.56 fulladder-{F}(V0), P_h2-{F}(V0,V1), halfadder-{F}(V1), P_or1-{F}(V0,V2), P_in1-{F}(V2,V3), zero-{F}(V3), halfadder-{F}(V4), P_in1-{F}(V4,V5), one-{F}(V5), P_and2-{F}(V4,V6), and_ok-{F}(V6), P_and2-{F}(V1,V6), halfadder-{F}(V7), P_in1-{F}(V7,V8), zero-{F}(V8), P_and2-{F}(V7,V9), and_ok-{F}(V9), halfadder-{F}(V10), P_and2-{F}(V10,V9), P_not1-{F}(V10,V11), not_ok-{F}(V11), halfadder-{F}(V12), P_not1-{F}(V12,V11), P_and1-{F}(V12,V6) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5770: mergings( V2 == V18, V3 == V11, V4 == V12, V5 == V13, V9 == V17, V7 == V15, V8 == V16, V6 == V14; #5761 ), references = 1, size of lhs = 38:
% 282.36/282.56 logic_and-{F}(V0), logic_and-{F}(V1), P_f-{F}(V2), P_h2-{F}(V2,V3), P_and2-{F}(V3,V0), P_in1-{F}(V2,V4), P_in2-{F}(V2,V5), P_inc-{F}(V2,V6), P_outs-{F}(V2,V7), P_outc-{F}(V2,V8), P_or1-{F}(V2,V9), P_and1-{F}(V3,V10), P_h1-{F}(V2,V11), P_and2-{F}(V11,V1), P_or1-{F}(V11,V12), P_not1-{F}(V11,V13), fulladder-{F}(V14), P_h2-{F}(V14,V15), halfadder-{F}(V15), P_and2-{F}(V15,V0), P_or1-{F}(V14,V16), P_in1-{F}(V16,V17), zero-{F}(V17), halfadder-{F}(V18), P_and2-{F}(V18,V0), P_in1-{F}(V18,V19), one-{F}(V19), halfadder-{F}(V20), P_and2-{F}(V20,V1), P_in1-{F}(V20,V21), zero-{F}(V21), halfadder-{F}(V22), P_and2-{F}(V22,V1), P_not1-{F}(V22,V23), not_ok-{F}(V23), halfadder-{F}(V24), P_not1-{F}(V24,V23), P_and1-{F}(V24,V0) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5828: exists( #65, #5822 ), references = 2, size of lhs = 30:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), and_ok-{F}(V5), P_in2-{F}(V5,V3), P_in1-{F}(V5,V6), one-{F}(V6), P_out1-{F}(V5,V7), one-{F}(V8), halfadder-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V9), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), fulladder-{F}(V17), P_in1-{F}(V17,V8), P_h2-{F}(V17,V9), P_h1-{F}(V17,V18), P_outs-{F}(V18,V7), P_or1-{F}(V17,V19), P_in1-{F}(V19,V20), zero-{F}(V20) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5829: exists( #65, #5823 ), references = 2, size of lhs = 36:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), and_ok-{F}(V5), P_in2-{F}(V5,V3), P_in1-{F}(V5,V6), one-{F}(V6), P_out1-{F}(V5,V7), halfadder-{F}(V8), P_outs-{F}(V8,V9), P_and1-{F}(V8,V10), halfadder-{F}(V11), P_and1-{F}(V11,V10), P_outs-{F}(V11,V7), one-{F}(V12), halfadder-{F}(V13), P_f-{F}(V14), P_h2-{F}(V14,V13), P_in1-{F}(V14,V15), P_in2-{F}(V14,V16), P_inc-{F}(V14,V17), P_outs-{F}(V14,V18), P_outc-{F}(V14,V19), P_or1-{F}(V14,V20), fulladder-{F}(V21), P_in1-{F}(V21,V12), P_h2-{F}(V21,V13), P_h1-{F}(V21,V22), P_outs-{F}(V22,V9), P_or1-{F}(V21,V23), P_in1-{F}(V23,V24), zero-{F}(V24) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5830: exists( #65, #5824 ), references = 2, size of lhs = 30:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), and_ok-{F}(V5), P_in2-{F}(V5,V3), P_in1-{F}(V5,V6), one-{F}(V6), P_out1-{F}(V5,V7), halfadder-{F}(V8), P_f-{F}(V9), P_h2-{F}(V9,V8), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), P_in1-{F}(V8,V16), one-{F}(V16), fulladder-{F}(V17), P_h2-{F}(V17,V8), P_h1-{F}(V17,V18), P_outs-{F}(V18,V7), P_or1-{F}(V17,V19), P_in1-{F}(V19,V20), zero-{F}(V20) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5846: exists( #64, #5840 ), references = 1, size of lhs = 33:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), and_ok-{F}(V7), P_in2-{F}(V7,V6), P_in1-{F}(V7,V8), one-{F}(V8), P_out1-{F}(V7,V9), one-{F}(V10), halfadder-{F}(V11), P_f-{F}(V12), P_h2-{F}(V12,V11), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), fulladder-{F}(V19), P_in1-{F}(V19,V10), P_h2-{F}(V19,V11), P_h1-{F}(V19,V20), P_outs-{F}(V20,V9), P_or1-{F}(V19,V21), P_in1-{F}(V21,V22), zero-{F}(V22) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5847: exists( #64, #5841 ), references = 1, size of lhs = 39:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), and_ok-{F}(V7), P_in2-{F}(V7,V6), P_in1-{F}(V7,V8), one-{F}(V8), P_out1-{F}(V7,V9), halfadder-{F}(V10), P_outs-{F}(V10,V11), P_and1-{F}(V10,V12), halfadder-{F}(V13), P_and1-{F}(V13,V12), P_outs-{F}(V13,V9), one-{F}(V14), halfadder-{F}(V15), P_f-{F}(V16), P_h2-{F}(V16,V15), P_in1-{F}(V16,V17), P_in2-{F}(V16,V18), P_inc-{F}(V16,V19), P_outs-{F}(V16,V20), P_outc-{F}(V16,V21), P_or1-{F}(V16,V22), fulladder-{F}(V23), P_in1-{F}(V23,V14), P_h2-{F}(V23,V15), P_h1-{F}(V23,V24), P_outs-{F}(V24,V11), P_or1-{F}(V23,V25), P_in1-{F}(V25,V26), zero-{F}(V26) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5848: exists( #64, #5842 ), references = 1, size of lhs = 33:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), and_ok-{F}(V7), P_in2-{F}(V7,V6), P_in1-{F}(V7,V8), one-{F}(V8), P_out1-{F}(V7,V9), halfadder-{F}(V10), P_f-{F}(V11), P_h2-{F}(V11,V10), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), P_in1-{F}(V10,V18), one-{F}(V18), fulladder-{F}(V19), P_h2-{F}(V19,V10), P_h1-{F}(V19,V20), P_outs-{F}(V20,V9), P_or1-{F}(V19,V21), P_in1-{F}(V21,V22), zero-{F}(V22) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5855: exists( #65, #5849 ), references = 2, size of lhs = 34:
% 282.36/282.56 and_ok-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), halfadder-{F}(V2), P_and2-{F}(V2,V0), P_not1-{F}(V2,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), and_ok-{F}(V7), P_in2-{F}(V7,V6), P_in1-{F}(V7,V8), one-{F}(V8), P_out1-{F}(V7,V9), one-{F}(V10), halfadder-{F}(V11), P_f-{F}(V12), P_h2-{F}(V12,V11), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), fulladder-{F}(V19), P_in1-{F}(V19,V10), P_h2-{F}(V19,V11), P_h1-{F}(V19,V20), P_outs-{F}(V20,V9), P_or1-{F}(V19,V21), P_in1-{F}(V21,V22), zero-{F}(V22) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5856: exists( #65, #5850 ), references = 2, size of lhs = 40:
% 282.36/282.56 and_ok-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), halfadder-{F}(V2), P_and2-{F}(V2,V0), P_not1-{F}(V2,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), and_ok-{F}(V7), P_in2-{F}(V7,V6), P_in1-{F}(V7,V8), one-{F}(V8), P_out1-{F}(V7,V9), halfadder-{F}(V10), P_outs-{F}(V10,V11), P_and1-{F}(V10,V12), halfadder-{F}(V13), P_and1-{F}(V13,V12), P_outs-{F}(V13,V9), one-{F}(V14), halfadder-{F}(V15), P_f-{F}(V16), P_h2-{F}(V16,V15), P_in1-{F}(V16,V17), P_in2-{F}(V16,V18), P_inc-{F}(V16,V19), P_outs-{F}(V16,V20), P_outc-{F}(V16,V21), P_or1-{F}(V16,V22), fulladder-{F}(V23), P_in1-{F}(V23,V14), P_h2-{F}(V23,V15), P_h1-{F}(V23,V24), P_outs-{F}(V24,V11), P_or1-{F}(V23,V25), P_in1-{F}(V25,V26), zero-{F}(V26) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5857: exists( #65, #5851 ), references = 2, size of lhs = 34:
% 282.36/282.56 and_ok-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), halfadder-{F}(V2), P_and2-{F}(V2,V0), P_not1-{F}(V2,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), and_ok-{F}(V7), P_in2-{F}(V7,V6), P_in1-{F}(V7,V8), one-{F}(V8), P_out1-{F}(V7,V9), halfadder-{F}(V10), P_f-{F}(V11), P_h2-{F}(V11,V10), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), P_in1-{F}(V10,V18), one-{F}(V18), fulladder-{F}(V19), P_h2-{F}(V19,V10), P_h1-{F}(V19,V20), P_outs-{F}(V20,V9), P_or1-{F}(V19,V21), P_in1-{F}(V21,V22), zero-{F}(V22) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5867: exists( #64, #5861 ), references = 1, size of lhs = 36:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), and_ok-{F}(V8), P_in2-{F}(V8,V7), P_in1-{F}(V8,V9), one-{F}(V9), P_out1-{F}(V8,V10), one-{F}(V11), halfadder-{F}(V12), P_f-{F}(V13), P_h2-{F}(V13,V12), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15), P_inc-{F}(V13,V16), P_outs-{F}(V13,V17), P_outc-{F}(V13,V18), P_or1-{F}(V13,V19), fulladder-{F}(V20), P_in1-{F}(V20,V11), P_h2-{F}(V20,V12), P_h1-{F}(V20,V21), P_outs-{F}(V21,V10), P_or1-{F}(V20,V22), P_in1-{F}(V22,V23), zero-{F}(V23) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5868: exists( #64, #5862 ), references = 1, size of lhs = 42:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), and_ok-{F}(V8), P_in2-{F}(V8,V7), P_in1-{F}(V8,V9), one-{F}(V9), P_out1-{F}(V8,V10), halfadder-{F}(V11), P_outs-{F}(V11,V12), P_and1-{F}(V11,V13), halfadder-{F}(V14), P_and1-{F}(V14,V13), P_outs-{F}(V14,V10), one-{F}(V15), halfadder-{F}(V16), P_f-{F}(V17), P_h2-{F}(V17,V16), P_in1-{F}(V17,V18), P_in2-{F}(V17,V19), P_inc-{F}(V17,V20), P_outs-{F}(V17,V21), P_outc-{F}(V17,V22), P_or1-{F}(V17,V23), fulladder-{F}(V24), P_in1-{F}(V24,V15), P_h2-{F}(V24,V16), P_h1-{F}(V24,V25), P_outs-{F}(V25,V12), P_or1-{F}(V24,V26), P_in1-{F}(V26,V27), zero-{F}(V27) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5869: exists( #64, #5863 ), references = 1, size of lhs = 36:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), and_ok-{F}(V8), P_in2-{F}(V8,V7), P_in1-{F}(V8,V9), one-{F}(V9), P_out1-{F}(V8,V10), halfadder-{F}(V11), P_f-{F}(V12), P_h2-{F}(V12,V11), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), P_in1-{F}(V11,V19), one-{F}(V19), fulladder-{F}(V20), P_h2-{F}(V20,V11), P_h1-{F}(V20,V21), P_outs-{F}(V21,V10), P_or1-{F}(V20,V22), P_in1-{F}(V22,V23), zero-{F}(V23) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5873: exists( #66, #5864 ), references = 1, size of lhs = 34:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), and_ok-{F}(V6), P_in1-{F}(V6,V7), one-{F}(V7), P_out1-{F}(V6,V8), one-{F}(V9), halfadder-{F}(V10), P_f-{F}(V11), P_h2-{F}(V11,V10), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), fulladder-{F}(V18), P_in1-{F}(V18,V9), P_h2-{F}(V18,V10), P_h1-{F}(V18,V19), P_outs-{F}(V19,V8), P_or1-{F}(V18,V20), P_in1-{F}(V20,V21), zero-{F}(V21) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5874: exists( #66, #5865 ), references = 1, size of lhs = 40:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), and_ok-{F}(V6), P_in1-{F}(V6,V7), one-{F}(V7), P_out1-{F}(V6,V8), halfadder-{F}(V9), P_outs-{F}(V9,V10), P_and1-{F}(V9,V11), halfadder-{F}(V12), P_and1-{F}(V12,V11), P_outs-{F}(V12,V8), one-{F}(V13), halfadder-{F}(V14), P_f-{F}(V15), P_h2-{F}(V15,V14), P_in1-{F}(V15,V16), P_in2-{F}(V15,V17), P_inc-{F}(V15,V18), P_outs-{F}(V15,V19), P_outc-{F}(V15,V20), P_or1-{F}(V15,V21), fulladder-{F}(V22), P_in1-{F}(V22,V13), P_h2-{F}(V22,V14), P_h1-{F}(V22,V23), P_outs-{F}(V23,V10), P_or1-{F}(V22,V24), P_in1-{F}(V24,V25), zero-{F}(V25) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5875: exists( #66, #5866 ), references = 1, size of lhs = 34:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), and_ok-{F}(V6), P_in1-{F}(V6,V7), one-{F}(V7), P_out1-{F}(V6,V8), halfadder-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V9), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), P_in1-{F}(V9,V17), one-{F}(V17), fulladder-{F}(V18), P_h2-{F}(V18,V9), P_h1-{F}(V18,V19), P_outs-{F}(V19,V8), P_or1-{F}(V18,V20), P_in1-{F}(V20,V21), zero-{F}(V21) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5984: exists( #65, #5978 ), references = 2, size of lhs = 31:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), and_ok-{F}(V5), P_in2-{F}(V5,V3), P_in1-{F}(V5,V6), one-{F}(V6), P_out1-{F}(V5,V7), one-{F}(V8), halfadder-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V9), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), fulladder-{F}(V17), P_in1-{F}(V17,V8), P_h2-{F}(V17,V9), P_h1-{F}(V17,V18), P_outs-{F}(V18,V19), connection-{F}(V19,V7), P_or1-{F}(V17,V20), P_in1-{F}(V20,V21), zero-{F}(V21) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5985: exists( #65, #5979 ), references = 2, size of lhs = 37:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), and_ok-{F}(V5), P_in2-{F}(V5,V3), P_in1-{F}(V5,V6), one-{F}(V6), P_out1-{F}(V5,V7), halfadder-{F}(V8), P_outs-{F}(V8,V9), P_and1-{F}(V8,V10), halfadder-{F}(V11), P_and1-{F}(V11,V10), P_outs-{F}(V11,V12), connection-{F}(V12,V7), one-{F}(V13), halfadder-{F}(V14), P_f-{F}(V15), P_h2-{F}(V15,V14), P_in1-{F}(V15,V16), P_in2-{F}(V15,V17), P_inc-{F}(V15,V18), P_outs-{F}(V15,V19), P_outc-{F}(V15,V20), P_or1-{F}(V15,V21), fulladder-{F}(V22), P_in1-{F}(V22,V13), P_h2-{F}(V22,V14), P_h1-{F}(V22,V23), P_outs-{F}(V23,V9), P_or1-{F}(V22,V24), P_in1-{F}(V24,V25), zero-{F}(V25) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #5986: exists( #65, #5980 ), references = 2, size of lhs = 31:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), and_ok-{F}(V5), P_in2-{F}(V5,V3), P_in1-{F}(V5,V6), one-{F}(V6), P_out1-{F}(V5,V7), halfadder-{F}(V8), P_f-{F}(V9), P_h2-{F}(V9,V8), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), P_in1-{F}(V8,V16), one-{F}(V16), fulladder-{F}(V17), P_h2-{F}(V17,V8), P_h1-{F}(V17,V18), P_outs-{F}(V18,V19), connection-{F}(V19,V7), P_or1-{F}(V17,V20), P_in1-{F}(V20,V21), zero-{F}(V21) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6002: exists( #64, #5996 ), references = 1, size of lhs = 34:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), and_ok-{F}(V7), P_in2-{F}(V7,V6), P_in1-{F}(V7,V8), one-{F}(V8), P_out1-{F}(V7,V9), one-{F}(V10), halfadder-{F}(V11), P_f-{F}(V12), P_h2-{F}(V12,V11), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), fulladder-{F}(V19), P_in1-{F}(V19,V10), P_h2-{F}(V19,V11), P_h1-{F}(V19,V20), P_outs-{F}(V20,V21), connection-{F}(V21,V9), P_or1-{F}(V19,V22), P_in1-{F}(V22,V23), zero-{F}(V23) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6003: exists( #64, #5997 ), references = 1, size of lhs = 40:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), and_ok-{F}(V7), P_in2-{F}(V7,V6), P_in1-{F}(V7,V8), one-{F}(V8), P_out1-{F}(V7,V9), halfadder-{F}(V10), P_outs-{F}(V10,V11), P_and1-{F}(V10,V12), halfadder-{F}(V13), P_and1-{F}(V13,V12), P_outs-{F}(V13,V14), connection-{F}(V14,V9), one-{F}(V15), halfadder-{F}(V16), P_f-{F}(V17), P_h2-{F}(V17,V16), P_in1-{F}(V17,V18), P_in2-{F}(V17,V19), P_inc-{F}(V17,V20), P_outs-{F}(V17,V21), P_outc-{F}(V17,V22), P_or1-{F}(V17,V23), fulladder-{F}(V24), P_in1-{F}(V24,V15), P_h2-{F}(V24,V16), P_h1-{F}(V24,V25), P_outs-{F}(V25,V11), P_or1-{F}(V24,V26), P_in1-{F}(V26,V27), zero-{F}(V27) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6004: exists( #64, #5998 ), references = 1, size of lhs = 34:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), and_ok-{F}(V7), P_in2-{F}(V7,V6), P_in1-{F}(V7,V8), one-{F}(V8), P_out1-{F}(V7,V9), halfadder-{F}(V10), P_f-{F}(V11), P_h2-{F}(V11,V10), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), P_in1-{F}(V10,V18), one-{F}(V18), fulladder-{F}(V19), P_h2-{F}(V19,V10), P_h1-{F}(V19,V20), P_outs-{F}(V20,V21), connection-{F}(V21,V9), P_or1-{F}(V19,V22), P_in1-{F}(V22,V23), zero-{F}(V23) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6011: exists( #65, #6005 ), references = 2, size of lhs = 35:
% 282.36/282.56 and_ok-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), halfadder-{F}(V2), P_and2-{F}(V2,V0), P_not1-{F}(V2,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), and_ok-{F}(V7), P_in2-{F}(V7,V6), P_in1-{F}(V7,V8), one-{F}(V8), P_out1-{F}(V7,V9), one-{F}(V10), halfadder-{F}(V11), P_f-{F}(V12), P_h2-{F}(V12,V11), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), fulladder-{F}(V19), P_in1-{F}(V19,V10), P_h2-{F}(V19,V11), P_h1-{F}(V19,V20), P_outs-{F}(V20,V21), connection-{F}(V21,V9), P_or1-{F}(V19,V22), P_in1-{F}(V22,V23), zero-{F}(V23) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6012: exists( #65, #6006 ), references = 2, size of lhs = 41:
% 282.36/282.56 and_ok-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), halfadder-{F}(V2), P_and2-{F}(V2,V0), P_not1-{F}(V2,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), and_ok-{F}(V7), P_in2-{F}(V7,V6), P_in1-{F}(V7,V8), one-{F}(V8), P_out1-{F}(V7,V9), halfadder-{F}(V10), P_outs-{F}(V10,V11), P_and1-{F}(V10,V12), halfadder-{F}(V13), P_and1-{F}(V13,V12), P_outs-{F}(V13,V14), connection-{F}(V14,V9), one-{F}(V15), halfadder-{F}(V16), P_f-{F}(V17), P_h2-{F}(V17,V16), P_in1-{F}(V17,V18), P_in2-{F}(V17,V19), P_inc-{F}(V17,V20), P_outs-{F}(V17,V21), P_outc-{F}(V17,V22), P_or1-{F}(V17,V23), fulladder-{F}(V24), P_in1-{F}(V24,V15), P_h2-{F}(V24,V16), P_h1-{F}(V24,V25), P_outs-{F}(V25,V11), P_or1-{F}(V24,V26), P_in1-{F}(V26,V27), zero-{F}(V27) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6013: exists( #65, #6007 ), references = 2, size of lhs = 35:
% 282.36/282.56 and_ok-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), halfadder-{F}(V2), P_and2-{F}(V2,V0), P_not1-{F}(V2,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), and_ok-{F}(V7), P_in2-{F}(V7,V6), P_in1-{F}(V7,V8), one-{F}(V8), P_out1-{F}(V7,V9), halfadder-{F}(V10), P_f-{F}(V11), P_h2-{F}(V11,V10), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), P_in1-{F}(V10,V18), one-{F}(V18), fulladder-{F}(V19), P_h2-{F}(V19,V10), P_h1-{F}(V19,V20), P_outs-{F}(V20,V21), connection-{F}(V21,V9), P_or1-{F}(V19,V22), P_in1-{F}(V22,V23), zero-{F}(V23) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6023: exists( #64, #6017 ), references = 1, size of lhs = 37:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), and_ok-{F}(V8), P_in2-{F}(V8,V7), P_in1-{F}(V8,V9), one-{F}(V9), P_out1-{F}(V8,V10), one-{F}(V11), halfadder-{F}(V12), P_f-{F}(V13), P_h2-{F}(V13,V12), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15), P_inc-{F}(V13,V16), P_outs-{F}(V13,V17), P_outc-{F}(V13,V18), P_or1-{F}(V13,V19), fulladder-{F}(V20), P_in1-{F}(V20,V11), P_h2-{F}(V20,V12), P_h1-{F}(V20,V21), P_outs-{F}(V21,V22), connection-{F}(V22,V10), P_or1-{F}(V20,V23), P_in1-{F}(V23,V24), zero-{F}(V24) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6024: exists( #64, #6018 ), references = 1, size of lhs = 43:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), and_ok-{F}(V8), P_in2-{F}(V8,V7), P_in1-{F}(V8,V9), one-{F}(V9), P_out1-{F}(V8,V10), halfadder-{F}(V11), P_outs-{F}(V11,V12), P_and1-{F}(V11,V13), halfadder-{F}(V14), P_and1-{F}(V14,V13), P_outs-{F}(V14,V15), connection-{F}(V15,V10), one-{F}(V16), halfadder-{F}(V17), P_f-{F}(V18), P_h2-{F}(V18,V17), P_in1-{F}(V18,V19), P_in2-{F}(V18,V20), P_inc-{F}(V18,V21), P_outs-{F}(V18,V22), P_outc-{F}(V18,V23), P_or1-{F}(V18,V24), fulladder-{F}(V25), P_in1-{F}(V25,V16), P_h2-{F}(V25,V17), P_h1-{F}(V25,V26), P_outs-{F}(V26,V12), P_or1-{F}(V25,V27), P_in1-{F}(V27,V28), zero-{F}(V28) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6025: exists( #64, #6019 ), references = 1, size of lhs = 37:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), and_ok-{F}(V8), P_in2-{F}(V8,V7), P_in1-{F}(V8,V9), one-{F}(V9), P_out1-{F}(V8,V10), halfadder-{F}(V11), P_f-{F}(V12), P_h2-{F}(V12,V11), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), P_in1-{F}(V11,V19), one-{F}(V19), fulladder-{F}(V20), P_h2-{F}(V20,V11), P_h1-{F}(V20,V21), P_outs-{F}(V21,V22), connection-{F}(V22,V10), P_or1-{F}(V20,V23), P_in1-{F}(V23,V24), zero-{F}(V24) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6029: exists( #66, #6020 ), references = 1, size of lhs = 35:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), and_ok-{F}(V6), P_in1-{F}(V6,V7), one-{F}(V7), P_out1-{F}(V6,V8), one-{F}(V9), halfadder-{F}(V10), P_f-{F}(V11), P_h2-{F}(V11,V10), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), fulladder-{F}(V18), P_in1-{F}(V18,V9), P_h2-{F}(V18,V10), P_h1-{F}(V18,V19), P_outs-{F}(V19,V20), connection-{F}(V20,V8), P_or1-{F}(V18,V21), P_in1-{F}(V21,V22), zero-{F}(V22) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6030: exists( #66, #6021 ), references = 1, size of lhs = 41:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), and_ok-{F}(V6), P_in1-{F}(V6,V7), one-{F}(V7), P_out1-{F}(V6,V8), halfadder-{F}(V9), P_outs-{F}(V9,V10), P_and1-{F}(V9,V11), halfadder-{F}(V12), P_and1-{F}(V12,V11), P_outs-{F}(V12,V13), connection-{F}(V13,V8), one-{F}(V14), halfadder-{F}(V15), P_f-{F}(V16), P_h2-{F}(V16,V15), P_in1-{F}(V16,V17), P_in2-{F}(V16,V18), P_inc-{F}(V16,V19), P_outs-{F}(V16,V20), P_outc-{F}(V16,V21), P_or1-{F}(V16,V22), fulladder-{F}(V23), P_in1-{F}(V23,V14), P_h2-{F}(V23,V15), P_h1-{F}(V23,V24), P_outs-{F}(V24,V10), P_or1-{F}(V23,V25), P_in1-{F}(V25,V26), zero-{F}(V26) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6031: exists( #66, #6022 ), references = 1, size of lhs = 35:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), and_ok-{F}(V6), P_in1-{F}(V6,V7), one-{F}(V7), P_out1-{F}(V6,V8), halfadder-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V9), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), P_in1-{F}(V9,V17), one-{F}(V17), fulladder-{F}(V18), P_h2-{F}(V18,V9), P_h1-{F}(V18,V19), P_outs-{F}(V19,V20), connection-{F}(V20,V8), P_or1-{F}(V18,V21), P_in1-{F}(V21,V22), zero-{F}(V22) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6038: exists( #65, #6032 ), references = 2, size of lhs = 36:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), zero-{F}(V4), P_and2-{F}(V3,V5), and_ok-{F}(V5), halfadder-{F}(V6), P_and2-{F}(V6,V5), P_not1-{F}(V6,V7), not_ok-{F}(V7), halfadder-{F}(V8), P_not1-{F}(V8,V7), P_and1-{F}(V8,V2), P_in1-{F}(V2,V9), one-{F}(V9), one-{F}(V10), halfadder-{F}(V11), P_f-{F}(V12), P_h2-{F}(V12,V11), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), fulladder-{F}(V19), P_in1-{F}(V19,V10), P_h2-{F}(V19,V11), P_h1-{F}(V19,V20), P_outs-{F}(V20,V1), P_or1-{F}(V19,V21), P_in1-{F}(V21,V22), zero-{F}(V22) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6039: exists( #65, #6033 ), references = 1, size of lhs = 42:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), zero-{F}(V4), P_and2-{F}(V3,V5), and_ok-{F}(V5), halfadder-{F}(V6), P_and2-{F}(V6,V5), P_not1-{F}(V6,V7), not_ok-{F}(V7), halfadder-{F}(V8), P_not1-{F}(V8,V7), P_and1-{F}(V8,V2), P_in1-{F}(V2,V9), one-{F}(V9), halfadder-{F}(V10), P_outs-{F}(V10,V11), P_and1-{F}(V10,V12), halfadder-{F}(V13), P_and1-{F}(V13,V12), P_outs-{F}(V13,V1), one-{F}(V14), halfadder-{F}(V15), P_f-{F}(V16), P_h2-{F}(V16,V15), P_in1-{F}(V16,V17), P_in2-{F}(V16,V18), P_inc-{F}(V16,V19), P_outs-{F}(V16,V20), P_outc-{F}(V16,V21), P_or1-{F}(V16,V22), fulladder-{F}(V23), P_in1-{F}(V23,V14), P_h2-{F}(V23,V15), P_h1-{F}(V23,V24), P_outs-{F}(V24,V11), P_or1-{F}(V23,V25), P_in1-{F}(V25,V26), zero-{F}(V26) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6040: exists( #65, #6034 ), references = 1, size of lhs = 36:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), zero-{F}(V4), P_and2-{F}(V3,V5), and_ok-{F}(V5), halfadder-{F}(V6), P_and2-{F}(V6,V5), P_not1-{F}(V6,V7), not_ok-{F}(V7), halfadder-{F}(V8), P_not1-{F}(V8,V7), P_and1-{F}(V8,V2), P_in1-{F}(V2,V9), one-{F}(V9), halfadder-{F}(V10), P_f-{F}(V11), P_h2-{F}(V11,V10), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), P_in1-{F}(V10,V18), one-{F}(V18), fulladder-{F}(V19), P_h2-{F}(V19,V10), P_h1-{F}(V19,V20), P_outs-{F}(V20,V1), P_or1-{F}(V19,V21), P_in1-{F}(V21,V22), zero-{F}(V22) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6093: exists( #65, #6087 ), references = 1, size of lhs = 20:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), logic_or-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), zero-{F}(V3), halfadder-{F}(V4), P_or1-{F}(V4,V1), P_in2-{F}(V4,V5), one-{F}(V5), P_f-{F}(V6), P_in1-{F}(V6,V7), P_in2-{F}(V6,V8), P_inc-{F}(V6,V9), P_outs-{F}(V6,V10), P_outc-{F}(V6,V11), P_or1-{F}(V6,V12), P_h2-{F}(V6,V13), P_h1-{F}(V6,V14), P_or1-{F}(V14,V1) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6094: exists( #65, #6088 ), references = 1, size of lhs = 21:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), logic_or-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), zero-{F}(V3), halfadder-{F}(V4), P_or1-{F}(V4,V1), P_in2-{F}(V4,V5), one-{F}(V5), P_f-{F}(V6), P_in1-{F}(V6,V7), P_in2-{F}(V6,V8), P_inc-{F}(V6,V9), P_outs-{F}(V6,V10), P_outc-{F}(V6,V11), P_or1-{F}(V6,V12), P_h2-{F}(V6,V13), P_and1-{F}(V13,V14), P_h1-{F}(V6,V15), P_or1-{F}(V15,V1) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6095: exists( #65, #6089 ), references = 1, size of lhs = 22:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), logic_or-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), zero-{F}(V3), halfadder-{F}(V4), P_or1-{F}(V4,V1), P_in2-{F}(V4,V5), one-{F}(V5), P_f-{F}(V6), P_in1-{F}(V6,V7), P_in2-{F}(V6,V8), P_inc-{F}(V6,V9), P_outs-{F}(V6,V10), P_outc-{F}(V6,V11), P_or1-{F}(V6,V12), P_h2-{F}(V6,V13), P_and2-{F}(V13,V14), P_and1-{F}(V13,V15), P_h1-{F}(V6,V16), P_or1-{F}(V16,V1) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6202: exists( #66, #6196 ), references = 1, size of lhs = 24:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_or1-{F}(V0,V2), or_ok-{F}(V2), P_out1-{F}(V2,V3), one-{F}(V4), halfadder-{F}(V5), P_f-{F}(V6), P_h2-{F}(V6,V5), P_in1-{F}(V6,V7), P_in2-{F}(V6,V8), P_inc-{F}(V6,V9), P_outs-{F}(V6,V10), P_outc-{F}(V6,V11), P_or1-{F}(V6,V12), fulladder-{F}(V13), P_in1-{F}(V13,V4), P_h2-{F}(V13,V5), P_h1-{F}(V13,V14), P_outs-{F}(V14,V3), P_or1-{F}(V13,V15), P_in1-{F}(V15,V16), zero-{F}(V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6203: exists( #66, #6197 ), references = 1, size of lhs = 30:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_or1-{F}(V0,V2), or_ok-{F}(V2), P_out1-{F}(V2,V3), halfadder-{F}(V4), P_outs-{F}(V4,V5), P_and1-{F}(V4,V6), halfadder-{F}(V7), P_and1-{F}(V7,V6), P_outs-{F}(V7,V3), one-{F}(V8), halfadder-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V9), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), fulladder-{F}(V17), P_in1-{F}(V17,V8), P_h2-{F}(V17,V9), P_h1-{F}(V17,V18), P_outs-{F}(V18,V5), P_or1-{F}(V17,V19), P_in1-{F}(V19,V20), zero-{F}(V20) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6204: exists( #66, #6198 ), references = 1, size of lhs = 24:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_or1-{F}(V0,V2), or_ok-{F}(V2), P_out1-{F}(V2,V3), halfadder-{F}(V4), P_f-{F}(V5), P_h2-{F}(V5,V4), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), P_in1-{F}(V4,V12), one-{F}(V12), fulladder-{F}(V13), P_h2-{F}(V13,V4), P_h1-{F}(V13,V14), P_outs-{F}(V14,V3), P_or1-{F}(V13,V15), P_in1-{F}(V15,V16), zero-{F}(V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6244: exists( #66, #6238 ), references = 1, size of lhs = 25:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_or1-{F}(V0,V2), or_ok-{F}(V2), P_out1-{F}(V2,V3), connection-{F}(V3,V4), one-{F}(V5), halfadder-{F}(V6), P_f-{F}(V7), P_h2-{F}(V7,V6), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), fulladder-{F}(V14), P_in1-{F}(V14,V5), P_h2-{F}(V14,V6), P_h1-{F}(V14,V15), P_outs-{F}(V15,V4), P_or1-{F}(V14,V16), P_in1-{F}(V16,V17), zero-{F}(V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6245: exists( #66, #6239 ), references = 1, size of lhs = 31:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_or1-{F}(V0,V2), or_ok-{F}(V2), P_out1-{F}(V2,V3), connection-{F}(V3,V4), halfadder-{F}(V5), P_outs-{F}(V5,V6), P_and1-{F}(V5,V7), halfadder-{F}(V8), P_and1-{F}(V8,V7), P_outs-{F}(V8,V4), one-{F}(V9), halfadder-{F}(V10), P_f-{F}(V11), P_h2-{F}(V11,V10), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), fulladder-{F}(V18), P_in1-{F}(V18,V9), P_h2-{F}(V18,V10), P_h1-{F}(V18,V19), P_outs-{F}(V19,V6), P_or1-{F}(V18,V20), P_in1-{F}(V20,V21), zero-{F}(V21) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6246: exists( #66, #6240 ), references = 1, size of lhs = 42:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_or1-{F}(V0,V2), or_ok-{F}(V2), P_out1-{F}(V2,V3), connection-{F}(V3,V4), halfadder-{F}(V5), P_outs-{F}(V5,V6), P_and1-{F}(V5,V7), and_ok-{F}(V7), P_in1-{F}(V7,V4), halfadder-{F}(V8), P_in1-{F}(V8,V9), zero-{F}(V9), P_and2-{F}(V8,V10), and_ok-{F}(V10), halfadder-{F}(V11), P_and2-{F}(V11,V10), P_not1-{F}(V11,V12), not_ok-{F}(V12), halfadder-{F}(V13), P_not1-{F}(V13,V12), P_and1-{F}(V13,V7), one-{F}(V14), halfadder-{F}(V15), P_f-{F}(V16), P_h2-{F}(V16,V15), P_in1-{F}(V16,V17), P_in2-{F}(V16,V18), P_inc-{F}(V16,V19), P_outs-{F}(V16,V20), P_outc-{F}(V16,V21), P_or1-{F}(V16,V22), fulladder-{F}(V23), P_in1-{F}(V23,V14), P_h2-{F}(V23,V15), P_h1-{F}(V23,V24), P_outs-{F}(V24,V6), P_or1-{F}(V23,V25), P_in1-{F}(V25,V26), zero-{F}(V26) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6253: exists( #65, #6247 ), references = 1, size of lhs = 27:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), or_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), halfadder-{F}(V4), P_or1-{F}(V4,V1), P_in2-{F}(V4,V5), one-{F}(V5), one-{F}(V6), halfadder-{F}(V7), P_f-{F}(V8), P_h2-{F}(V8,V7), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14), fulladder-{F}(V15), P_in1-{F}(V15,V6), P_h2-{F}(V15,V7), P_h1-{F}(V15,V16), P_outs-{F}(V16,V3), P_or1-{F}(V15,V17), P_in1-{F}(V17,V18), zero-{F}(V18) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6254: exists( #65, #6248 ), references = 1, size of lhs = 33:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), or_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), halfadder-{F}(V4), P_or1-{F}(V4,V1), P_in2-{F}(V4,V5), one-{F}(V5), halfadder-{F}(V6), P_outs-{F}(V6,V7), P_and1-{F}(V6,V8), halfadder-{F}(V9), P_and1-{F}(V9,V8), P_outs-{F}(V9,V3), one-{F}(V10), halfadder-{F}(V11), P_f-{F}(V12), P_h2-{F}(V12,V11), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), fulladder-{F}(V19), P_in1-{F}(V19,V10), P_h2-{F}(V19,V11), P_h1-{F}(V19,V20), P_outs-{F}(V20,V7), P_or1-{F}(V19,V21), P_in1-{F}(V21,V22), zero-{F}(V22) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6255: exists( #65, #6249 ), references = 1, size of lhs = 44:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), or_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), halfadder-{F}(V4), P_or1-{F}(V4,V1), P_in2-{F}(V4,V5), one-{F}(V5), halfadder-{F}(V6), P_outs-{F}(V6,V7), P_and1-{F}(V6,V8), and_ok-{F}(V8), P_in1-{F}(V8,V3), halfadder-{F}(V9), P_in1-{F}(V9,V10), zero-{F}(V10), P_and2-{F}(V9,V11), and_ok-{F}(V11), halfadder-{F}(V12), P_and2-{F}(V12,V11), P_not1-{F}(V12,V13), not_ok-{F}(V13), halfadder-{F}(V14), P_not1-{F}(V14,V13), P_and1-{F}(V14,V8), one-{F}(V15), halfadder-{F}(V16), P_f-{F}(V17), P_h2-{F}(V17,V16), P_in1-{F}(V17,V18), P_in2-{F}(V17,V19), P_inc-{F}(V17,V20), P_outs-{F}(V17,V21), P_outc-{F}(V17,V22), P_or1-{F}(V17,V23), fulladder-{F}(V24), P_in1-{F}(V24,V15), P_h2-{F}(V24,V16), P_h1-{F}(V24,V25), P_outs-{F}(V25,V7), P_or1-{F}(V24,V26), P_in1-{F}(V26,V27), zero-{F}(V27) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6257: exists( #64, #6252 ), references = 1, size of lhs = 42:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), or_ok-{F}(V1), P_and1-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V1), P_in2-{F}(V3,V4), one-{F}(V4), halfadder-{F}(V5), P_and1-{F}(V5,V2), P_outs-{F}(V5,V6), halfadder-{F}(V7), P_in1-{F}(V7,V8), zero-{F}(V8), P_and2-{F}(V7,V9), and_ok-{F}(V9), halfadder-{F}(V10), P_and2-{F}(V10,V9), P_not1-{F}(V10,V11), not_ok-{F}(V11), halfadder-{F}(V12), P_not1-{F}(V12,V11), P_and1-{F}(V12,V2), one-{F}(V13), halfadder-{F}(V14), P_f-{F}(V15), P_h2-{F}(V15,V14), P_in1-{F}(V15,V16), P_in2-{F}(V15,V17), P_inc-{F}(V15,V18), P_outs-{F}(V15,V19), P_outc-{F}(V15,V20), P_or1-{F}(V15,V21), fulladder-{F}(V22), P_in1-{F}(V22,V13), P_h2-{F}(V22,V14), P_h1-{F}(V22,V23), P_outs-{F}(V23,V6), P_or1-{F}(V22,V24), P_in1-{F}(V24,V25), zero-{F}(V25) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6294: mergings( V11 == V22, V22 == V35, V10 == V21, V21 == V34, V3 == V14, V4 == V15, V5 == V16, V9 == V20, V7 == V18, V8 == V19, V12 == V23, V2 == V24, V6 == V17, V14 == V27, V15 == V28, V16 == V29, V20 == V33, V18 == V31, V19 == V32, V23 == V36, V13 == V39, V25 == V38, V24 == V37, V17 == V30, V27 == V52, V28 == V53, V29 == V54, V33 == V58, V31 == V56, V32 == V57, V0 == V51, V30 == V55; #6261 ), references = 1, size of lhs = 49:
% 282.36/282.56 logic_or-{F}(V0), logic_and-{F}(V1), logic_and-{F}(V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_or1-{F}(V3,V0), halfadder-{F}(V4), P_or1-{F}(V4,V0), P_in2-{F}(V4,V5), one-{F}(V5), halfadder-{F}(V6), P_and1-{F}(V6,V2), P_outs-{F}(V6,V7), halfadder-{F}(V8), P_and2-{F}(V8,V1), P_in1-{F}(V8,V9), zero-{F}(V9), halfadder-{F}(V10), P_and2-{F}(V10,V1), P_not1-{F}(V10,V11), not_ok-{F}(V11), halfadder-{F}(V12), P_not1-{F}(V12,V11), P_and1-{F}(V12,V2), one-{F}(V13), halfadder-{F}(V14), P_and2-{F}(V14,V15), P_and1-{F}(V14,V16), P_f-{F}(V17), P_h2-{F}(V17,V14), P_h1-{F}(V17,V18), P_and1-{F}(V18,V2), P_or1-{F}(V18,V0), P_and2-{F}(V18,V1), P_not1-{F}(V18,V19), P_in1-{F}(V17,V20), P_in2-{F}(V17,V21), P_inc-{F}(V17,V22), P_outs-{F}(V17,V23), P_outc-{F}(V17,V24), P_or1-{F}(V17,V25), fulladder-{F}(V26), P_in1-{F}(V26,V13), P_h2-{F}(V26,V14), P_h1-{F}(V26,V27), P_outs-{F}(V27,V7), P_or1-{F}(V26,V28), P_in1-{F}(V28,V29), zero-{F}(V29) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6326: mergings( V10 == V20, V20 == V32, V3 == V13, V4 == V14, V5 == V15, V9 == V19, V7 == V17, V8 == V18, V11 == V21, V2 == V22, V6 == V16, V13 == V25, V14 == V26, V15 == V27, V19 == V31, V17 == V29, V18 == V30, V21 == V33, V12 == V36, V23 == V35, V22 == V34, V16 == V28, V25 == V49, V26 == V50, V27 == V51, V31 == V55, V29 == V53, V30 == V54, V0 == V48, V28 == V52; #6295 ), references = 1, size of lhs = 48:
% 282.36/282.56 logic_or-{F}(V0), logic_and-{F}(V1), logic_and-{F}(V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_or1-{F}(V3,V0), halfadder-{F}(V4), P_or1-{F}(V4,V0), P_in2-{F}(V4,V5), one-{F}(V5), halfadder-{F}(V6), P_and1-{F}(V6,V2), P_outs-{F}(V6,V7), halfadder-{F}(V8), P_and2-{F}(V8,V1), P_in1-{F}(V8,V9), zero-{F}(V9), halfadder-{F}(V10), P_and2-{F}(V10,V1), P_not1-{F}(V10,V11), not_ok-{F}(V11), halfadder-{F}(V12), P_not1-{F}(V12,V11), P_and1-{F}(V12,V2), one-{F}(V13), halfadder-{F}(V14), P_and1-{F}(V14,V15), P_f-{F}(V16), P_h2-{F}(V16,V14), P_h1-{F}(V16,V17), P_and1-{F}(V17,V2), P_or1-{F}(V17,V0), P_and2-{F}(V17,V1), P_not1-{F}(V17,V18), P_in1-{F}(V16,V19), P_in2-{F}(V16,V20), P_inc-{F}(V16,V21), P_outs-{F}(V16,V22), P_outc-{F}(V16,V23), P_or1-{F}(V16,V24), fulladder-{F}(V25), P_in1-{F}(V25,V13), P_h2-{F}(V25,V14), P_h1-{F}(V25,V26), P_outs-{F}(V26,V7), P_or1-{F}(V25,V27), P_in1-{F}(V27,V28), zero-{F}(V28) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6356: mergings( V3 == V12, V4 == V13, V5 == V14, V9 == V18, V7 == V16, V8 == V17, V10 == V19, V2 == V20, V6 == V15, V12 == V23, V13 == V24, V14 == V25, V18 == V29, V16 == V27, V17 == V28, V19 == V30, V11 == V33, V21 == V32, V20 == V31, V15 == V26, V23 == V46, V24 == V47, V25 == V48, V29 == V52, V27 == V50, V28 == V51, V0 == V45, V26 == V49; #6327 ), references = 1, size of lhs = 47:
% 282.36/282.56 logic_or-{F}(V0), logic_and-{F}(V1), logic_and-{F}(V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_or1-{F}(V3,V0), halfadder-{F}(V4), P_or1-{F}(V4,V0), P_in2-{F}(V4,V5), one-{F}(V5), halfadder-{F}(V6), P_and1-{F}(V6,V2), P_outs-{F}(V6,V7), halfadder-{F}(V8), P_and2-{F}(V8,V1), P_in1-{F}(V8,V9), zero-{F}(V9), halfadder-{F}(V10), P_and2-{F}(V10,V1), P_not1-{F}(V10,V11), not_ok-{F}(V11), halfadder-{F}(V12), P_not1-{F}(V12,V11), P_and1-{F}(V12,V2), one-{F}(V13), halfadder-{F}(V14), P_f-{F}(V15), P_h2-{F}(V15,V14), P_h1-{F}(V15,V16), P_and1-{F}(V16,V2), P_or1-{F}(V16,V0), P_and2-{F}(V16,V1), P_not1-{F}(V16,V17), P_in1-{F}(V15,V18), P_in2-{F}(V15,V19), P_inc-{F}(V15,V20), P_outs-{F}(V15,V21), P_outc-{F}(V15,V22), P_or1-{F}(V15,V23), fulladder-{F}(V24), P_in1-{F}(V24,V13), P_h2-{F}(V24,V14), P_h1-{F}(V24,V25), P_outs-{F}(V25,V7), P_or1-{F}(V24,V26), P_in1-{F}(V26,V27), zero-{F}(V27) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6386: mergings( V3 == V13, V4 == V14, V5 == V15, V9 == V19, V7 == V17, V8 == V18, V11 == V20, V2 == V21, V6 == V16, V13 == V24, V14 == V25, V15 == V26, V19 == V30, V17 == V28, V18 == V29, V20 == V31, V12 == V34, V22 == V33, V21 == V32, V16 == V27, V24 == V45, V25 == V46, V26 == V47, V30 == V51, V28 == V49, V29 == V50, V10 == V44, V27 == V48; #6357 ), references = 1, size of lhs = 45:
% 282.36/282.56 logic_or-{F}(V0), logic_and-{F}(V1), logic_and-{F}(V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_or1-{F}(V3,V0), halfadder-{F}(V4), P_or1-{F}(V4,V0), P_in2-{F}(V4,V5), one-{F}(V5), halfadder-{F}(V6), P_and1-{F}(V6,V2), halfadder-{F}(V7), P_and2-{F}(V7,V1), P_in1-{F}(V7,V8), zero-{F}(V8), halfadder-{F}(V9), P_and2-{F}(V9,V1), P_not1-{F}(V9,V10), not_ok-{F}(V10), halfadder-{F}(V11), P_not1-{F}(V11,V10), P_and1-{F}(V11,V2), one-{F}(V12), halfadder-{F}(V13), P_f-{F}(V14), P_h2-{F}(V14,V13), P_h1-{F}(V14,V15), P_and1-{F}(V15,V2), P_or1-{F}(V15,V0), P_and2-{F}(V15,V1), P_not1-{F}(V15,V16), P_in1-{F}(V14,V17), P_in2-{F}(V14,V18), P_inc-{F}(V14,V19), P_outs-{F}(V14,V20), P_outc-{F}(V14,V21), P_or1-{F}(V14,V22), fulladder-{F}(V23), P_in1-{F}(V23,V12), P_h2-{F}(V23,V13), P_h1-{F}(V23,V6), P_or1-{F}(V23,V24), P_in1-{F}(V24,V25), zero-{F}(V25) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6413: mergings( V10 == V28, V18 == V27, V2 == V11, V3 == V12, V4 == V13, V8 == V17, V6 == V15, V7 == V16, V5 == V14, V11 == V20, V12 == V21, V13 == V22, V17 == V26, V15 == V24, V16 == V25, V14 == V23, V20 == V38, V21 == V39, V22 == V40, V26 == V44, V24 == V42, V25 == V43, V9 == V37, V23 == V41; #6388 ), references = 1, size of lhs = 39:
% 282.36/282.56 halfadder-{F}(V0), logic_and-{F}(V1), P_and2-{F}(V0,V1), logic_and-{F}(V2), P_and1-{F}(V0,V2), P_not1-{F}(V0,V3), P_in2-{F}(V0,V4), one-{F}(V4), halfadder-{F}(V5), P_and1-{F}(V5,V2), halfadder-{F}(V6), P_and2-{F}(V6,V1), P_in1-{F}(V6,V7), zero-{F}(V7), halfadder-{F}(V8), P_and2-{F}(V8,V1), P_not1-{F}(V8,V9), not_ok-{F}(V9), halfadder-{F}(V10), P_not1-{F}(V10,V9), P_and1-{F}(V10,V2), one-{F}(V11), halfadder-{F}(V12), P_f-{F}(V13), P_h1-{F}(V13,V0), P_h2-{F}(V13,V12), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15), P_inc-{F}(V13,V16), P_outs-{F}(V13,V17), P_outc-{F}(V13,V18), P_or1-{F}(V13,V19), fulladder-{F}(V20), P_in1-{F}(V20,V11), P_h2-{F}(V20,V12), P_h1-{F}(V20,V5), P_or1-{F}(V20,V21), P_in1-{F}(V21,V22), zero-{F}(V22) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6448: mergings( V18 == V34, V2 == V10, V3 == V11, V4 == V12, V8 == V16, V6 == V14, V7 == V15, V9 == V17, V5 == V13, V10 == V19, V11 == V20, V12 == V21, V16 == V25, V14 == V23, V15 == V24, V13 == V22, V19 == V27, V20 == V28, V21 == V29, V25 == V33, V23 == V31, V24 == V32, V22 == V30, V27 == V41, V28 == V42, V29 == V43, V33 == V47, V31 == V45, V32 == V46, V17 == V40, V30 == V44; #6416 ), references = 1, size of lhs = 31:
% 282.36/282.56 halfadder-{F}(V0), logic_and-{F}(V1), P_and2-{F}(V0,V1), logic_and-{F}(V2), P_and1-{F}(V0,V2), P_in2-{F}(V0,V3), one-{F}(V3), halfadder-{F}(V4), P_and1-{F}(V4,V2), halfadder-{F}(V5), P_and2-{F}(V5,V1), P_in1-{F}(V5,V6), zero-{F}(V6), one-{F}(V7), halfadder-{F}(V8), P_f-{F}(V9), P_h1-{F}(V9,V0), P_h2-{F}(V9,V8), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), fulladder-{F}(V16), P_in1-{F}(V16,V7), P_h2-{F}(V16,V8), P_h1-{F}(V16,V4), P_or1-{F}(V16,V17), P_in1-{F}(V17,V18), zero-{F}(V18) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6481: mergings( V2 == V10, V3 == V11, V4 == V12, V8 == V16, V6 == V14, V7 == V15, V9 == V17, V5 == V13, V10 == V18, V11 == V19, V12 == V20, V16 == V24, V14 == V22, V15 == V23, V13 == V21, V18 == V26, V19 == V27, V20 == V28, V24 == V32, V22 == V30, V23 == V31, V21 == V29, V26 == V38, V27 == V39, V28 == V40, V32 == V44, V30 == V42, V31 == V43, V17 == V37, V29 == V41; #6450 ), references = 1, size of lhs = 27:
% 282.36/282.56 halfadder-{F}(V0), logic_and-{F}(V1), P_and1-{F}(V0,V1), P_in2-{F}(V0,V2), one-{F}(V2), halfadder-{F}(V3), P_and1-{F}(V3,V1), P_in1-{F}(V0,V4), zero-{F}(V4), one-{F}(V5), halfadder-{F}(V6), P_f-{F}(V7), P_h1-{F}(V7,V0), P_h2-{F}(V7,V6), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), fulladder-{F}(V14), P_in1-{F}(V14,V5), P_h2-{F}(V14,V6), P_h1-{F}(V14,V3), P_or1-{F}(V14,V15), P_in1-{F}(V15,V16), zero-{F}(V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6514: mergings( V2 == V10, V3 == V11, V4 == V12, V8 == V16, V6 == V14, V7 == V15, V9 == V17, V5 == V13, V10 == V18, V11 == V19, V12 == V20, V16 == V24, V14 == V22, V15 == V23, V13 == V21, V18 == V25, V19 == V26, V20 == V27, V24 == V31, V22 == V29, V23 == V30, V21 == V28, V25 == V36, V26 == V37, V27 == V38, V31 == V42, V29 == V40, V30 == V41, V17 == V35, V28 == V39; #6483 ), references = 3, size of lhs = 23:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_in1-{F}(V0,V2), zero-{F}(V2), one-{F}(V3), halfadder-{F}(V4), P_f-{F}(V5), P_h1-{F}(V5,V0), P_h2-{F}(V5,V4), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), fulladder-{F}(V12), P_in1-{F}(V12,V3), P_h2-{F}(V12,V4), P_h1-{F}(V12,V0), P_or1-{F}(V12,V13), P_in1-{F}(V13,V14), zero-{F}(V14) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6529: mergings( V2 == V14; #6527 ), references = 3, size of lhs = 23:
% 282.36/282.56 one-{F}(V0), halfadder-{F}(V1), P_in1-{F}(V1,V2), zero-{F}(V2), one-{F}(V3), halfadder-{F}(V4), P_f-{F}(V5), P_h1-{F}(V5,V1), P_h2-{F}(V5,V4), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), fulladder-{F}(V12), P_inc-{F}(V12,V0), P_in1-{F}(V12,V3), P_h2-{F}(V12,V4), P_h1-{F}(V12,V1), P_or1-{F}(V12,V13), P_in1-{F}(V13,V14), zero-{F}(V14) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6534: mergings( V2 == V14; #6532 ), references = 3, size of lhs = 23:
% 282.36/282.56 zero-{F}(V0), halfadder-{F}(V1), one-{F}(V2), one-{F}(V3), halfadder-{F}(V4), P_f-{F}(V5), P_h1-{F}(V5,V1), P_h2-{F}(V5,V4), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), fulladder-{F}(V12), P_in2-{F}(V12,V0), P_inc-{F}(V12,V2), P_in1-{F}(V12,V3), P_h2-{F}(V12,V4), P_h1-{F}(V12,V1), P_or1-{F}(V12,V13), P_in1-{F}(V13,V14), zero-{F}(V14) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6544: mergings( V2 == V17, V0 == V18; #6541 ), references = 1, size of lhs = 25:
% 282.36/282.56 zero-{F}(V0), or_ok-{F}(V1), zero-{F}(V2), halfadder-{F}(V3), one-{F}(V4), one-{F}(V5), halfadder-{F}(V6), P_f-{F}(V7), P_h1-{F}(V7,V3), P_h2-{F}(V7,V6), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), fulladder-{F}(V14), P_outc-{F}(V14,V0), P_in2-{F}(V14,V2), P_inc-{F}(V14,V4), P_in1-{F}(V14,V5), P_h2-{F}(V14,V6), P_h1-{F}(V14,V3), P_or1-{F}(V14,V1), P_in1-{F}(V1,V15) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6547: mergings( V2 == V16; #6545 ), references = 1, size of lhs = 24:
% 282.36/282.56 zero-{F}(V0), or_ok-{F}(V1), zero-{F}(V2), halfadder-{F}(V3), one-{F}(V4), one-{F}(V5), halfadder-{F}(V6), P_f-{F}(V7), P_h1-{F}(V7,V3), P_h2-{F}(V7,V6), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), fulladder-{F}(V14), P_outc-{F}(V14,V0), P_in2-{F}(V14,V2), P_inc-{F}(V14,V4), P_in1-{F}(V14,V5), P_h2-{F}(V14,V6), P_h1-{F}(V14,V3), P_or1-{F}(V14,V1) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6550: mergings( V1 == V15; #6548 ), references = 1, size of lhs = 24:
% 282.36/282.56 logic_or-{F}(V0), zero-{F}(V1), zero-{F}(V2), halfadder-{F}(V3), one-{F}(V4), one-{F}(V5), halfadder-{F}(V6), P_f-{F}(V7), P_h1-{F}(V7,V3), P_h2-{F}(V7,V6), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), fulladder-{F}(V14), P_outc-{F}(V14,V1), P_in2-{F}(V14,V2), P_inc-{F}(V14,V4), P_in1-{F}(V14,V5), P_h2-{F}(V14,V6), P_h1-{F}(V14,V3), P_or1-{F}(V14,V0) | abnormal-{T}(V0)
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6574: mergings( V6 == V2; #6572 ), references = 1, size of lhs = 38:
% 282.36/282.56 zero-{F}(V0), logic_or-{F}(V1), logic_and-{F}(V2), logic_and-{F}(V3), P_out1-{F}(V3,V0), P_f-{F}(V4), P_h2-{F}(V4,V5), P_in1-{F}(V4,V6), P_in2-{F}(V4,V7), P_inc-{F}(V4,V8), P_outs-{F}(V4,V9), P_outc-{F}(V4,V10), P_or1-{F}(V4,V11), P_h1-{F}(V4,V12), P_and1-{F}(V12,V3), P_or1-{F}(V12,V1), P_and2-{F}(V12,V2), P_not1-{F}(V12,V13), halfadder-{F}(V14), P_and1-{F}(V14,V3), P_or1-{F}(V14,V1), halfadder-{F}(V15), P_or1-{F}(V15,V1), P_in2-{F}(V15,V16), one-{F}(V16), halfadder-{F}(V17), P_and1-{F}(V17,V3), halfadder-{F}(V18), P_and2-{F}(V18,V2), P_in1-{F}(V18,V19), zero-{F}(V19), halfadder-{F}(V20), P_and2-{F}(V20,V2), P_not1-{F}(V20,V21), not_ok-{F}(V21), halfadder-{F}(V22), P_not1-{F}(V22,V21), P_and1-{F}(V22,V3) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6578: mergings( V4 == V16; #6576 ), references = 1, size of lhs = 32:
% 282.36/282.56 zero-{F}(V0), logic_and-{F}(V1), logic_and-{F}(V2), P_out1-{F}(V2,V0), P_f-{F}(V3), P_h2-{F}(V3,V4), P_in1-{F}(V3,V5), P_in2-{F}(V3,V6), P_inc-{F}(V3,V7), P_outs-{F}(V3,V8), P_outc-{F}(V3,V9), P_or1-{F}(V3,V10), P_h1-{F}(V3,V11), P_and2-{F}(V11,V1), P_and1-{F}(V11,V2), halfadder-{F}(V11), P_not1-{F}(V11,V12), P_in2-{F}(V11,V13), one-{F}(V13), halfadder-{F}(V14), P_and1-{F}(V14,V2), halfadder-{F}(V15), P_and2-{F}(V15,V1), P_in1-{F}(V15,V16), zero-{F}(V16), halfadder-{F}(V17), P_and2-{F}(V17,V1), P_not1-{F}(V17,V18), not_ok-{F}(V18), halfadder-{F}(V19), P_not1-{F}(V19,V18), P_and1-{F}(V19,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6591: mergings( V12 == V23, V2 == V13, V3 == V15, V4 == V16, V8 == V20, V6 == V18, V7 == V19, V9 == V14, V5 == V17; #6581 ), references = 1, size of lhs = 24:
% 282.36/282.56 halfadder-{F}(V0), zero-{F}(V1), logic_and-{F}(V2), P_and2-{F}(V0,V2), logic_and-{F}(V3), P_and1-{F}(V0,V3), P_out1-{F}(V3,V1), P_f-{F}(V4), P_h1-{F}(V4,V0), P_h2-{F}(V4,V5), P_in1-{F}(V4,V6), P_in2-{F}(V4,V7), P_inc-{F}(V4,V8), P_outs-{F}(V4,V9), P_outc-{F}(V4,V10), P_or1-{F}(V4,V11), P_in2-{F}(V0,V12), one-{F}(V12), halfadder-{F}(V13), P_and1-{F}(V13,V3), halfadder-{F}(V14), P_and2-{F}(V14,V2), P_in1-{F}(V14,V15), zero-{F}(V15) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6603: mergings( V11 == V22, V2 == V12, V3 == V14, V4 == V15, V8 == V19, V6 == V17, V7 == V18, V9 == V13, V5 == V16; #6593 ), references = 1, size of lhs = 20:
% 282.36/282.56 halfadder-{F}(V0), zero-{F}(V1), logic_and-{F}(V2), P_and1-{F}(V0,V2), P_out1-{F}(V2,V1), P_f-{F}(V3), P_h1-{F}(V3,V0), P_h2-{F}(V3,V4), P_in1-{F}(V3,V5), P_in2-{F}(V3,V6), P_inc-{F}(V3,V7), P_outs-{F}(V3,V8), P_outc-{F}(V3,V9), P_or1-{F}(V3,V10), P_in2-{F}(V0,V11), one-{F}(V11), halfadder-{F}(V12), P_and1-{F}(V12,V2), P_in1-{F}(V0,V13), zero-{F}(V13) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6647: mergings( V2 == V9; #6643 ), references = 1, size of lhs = 23:
% 282.36/282.56 one-{F}(V0), halfadder-{F}(V1), P_and1-{F}(V1,V2), P_or1-{F}(V1,V3), P_out1-{F}(V3,V4), zero-{F}(V5), halfadder-{F}(V6), fulladder-{F}(V7), P_in1-{F}(V7,V0), P_h2-{F}(V7,V2), P_in2-{F}(V7,V5), P_h1-{F}(V7,V6), P_or1-{F}(V7,V8), P_in2-{F}(V8,V4), P_f-{F}(V9), P_h1-{F}(V9,V6), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), P_h2-{F}(V9,V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6649: mergings( V2 == V7; #6644 ), references = 1, size of lhs = 23:
% 282.36/282.56 one-{F}(V0), halfadder-{F}(V1), P_and1-{F}(V1,V2), P_or1-{F}(V1,V3), P_out1-{F}(V3,V4), fulladder-{F}(V5), P_in1-{F}(V5,V0), P_h2-{F}(V5,V2), P_h1-{F}(V5,V6), halfadder-{F}(V6), P_or1-{F}(V5,V7), P_in2-{F}(V7,V4), P_f-{F}(V8), P_h1-{F}(V8,V6), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14), P_h2-{F}(V8,V15), P_in1-{F}(V6,V16), zero-{F}(V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6651: mergings( V2 == V7; #6645 ), references = 1, size of lhs = 28:
% 282.36/282.56 one-{F}(V0), halfadder-{F}(V1), P_and1-{F}(V1,V2), P_or1-{F}(V1,V3), P_out1-{F}(V3,V4), fulladder-{F}(V5), P_in1-{F}(V5,V0), P_h2-{F}(V5,V2), P_h1-{F}(V5,V6), halfadder-{F}(V6), P_or1-{F}(V5,V7), P_in2-{F}(V7,V4), logic_and-{F}(V8), P_and2-{F}(V6,V8), P_f-{F}(V9), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), P_h2-{F}(V9,V16), P_h1-{F}(V9,V17), P_and2-{F}(V17,V8), halfadder-{F}(V18), P_and2-{F}(V18,V8), P_in1-{F}(V18,V19), zero-{F}(V19) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6719: mergings( V2 == V15; #6716 ), references = 1, size of lhs = 17:
% 282.36/282.56 not_ok-{F}(V0), logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_not1-{F}(V8,V9), P_and2-{F}(V8,V10), P_and1-{F}(V8,V11), P_h1-{F}(V1,V12), P_and2-{F}(V12,V0), P_in1-{F}(V0,V13), zero-{F}(V13) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6721: mergings( V2 == V16; #6717 ), references = 1, size of lhs = 18:
% 282.36/282.56 not_ok-{F}(V0), logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), P_h2-{F}(V1,V8), P_not1-{F}(V8,V9), P_and2-{F}(V8,V10), P_and1-{F}(V8,V11), P_h1-{F}(V1,V12), P_and2-{F}(V12,V0), P_not1-{F}(V12,V13), P_in1-{F}(V0,V14), zero-{F}(V14) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6728: exists( #64, #6724 ), references = 1, size of lhs = 19:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), not_ok-{F}(V2), logic_and-{F}(V2), P_f-{F}(V3), P_in1-{F}(V3,V4), P_in2-{F}(V3,V5), P_inc-{F}(V3,V6), P_outs-{F}(V3,V7), P_outc-{F}(V3,V8), P_or1-{F}(V3,V9), P_h2-{F}(V3,V10), P_not1-{F}(V10,V11), P_and2-{F}(V10,V12), P_and1-{F}(V10,V13), P_h1-{F}(V3,V14), P_and2-{F}(V14,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6729: exists( #64, #6725 ), references = 1, size of lhs = 20:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), not_ok-{F}(V2), logic_and-{F}(V2), P_f-{F}(V3), P_in1-{F}(V3,V4), P_in2-{F}(V3,V5), P_inc-{F}(V3,V6), P_outs-{F}(V3,V7), P_outc-{F}(V3,V8), P_or1-{F}(V3,V9), P_h2-{F}(V3,V10), P_not1-{F}(V10,V11), P_and2-{F}(V10,V12), P_and1-{F}(V10,V13), P_h1-{F}(V3,V14), P_and2-{F}(V14,V2), P_not1-{F}(V14,V15) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6732: exists( #69, #6726 ), references = 1, size of lhs = 18:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), not_ok-{F}(V2), logic_and-{F}(V2), P_f-{F}(V3), P_in1-{F}(V3,V4), P_in2-{F}(V3,V5), P_inc-{F}(V3,V6), P_outs-{F}(V3,V7), P_outc-{F}(V3,V8), P_or1-{F}(V3,V9), P_h2-{F}(V3,V10), P_and2-{F}(V10,V11), P_and1-{F}(V10,V12), P_h1-{F}(V3,V13), P_and2-{F}(V13,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6733: exists( #69, #6727 ), references = 1, size of lhs = 19:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), not_ok-{F}(V2), logic_and-{F}(V2), P_f-{F}(V3), P_in1-{F}(V3,V4), P_in2-{F}(V3,V5), P_inc-{F}(V3,V6), P_outs-{F}(V3,V7), P_outc-{F}(V3,V8), P_or1-{F}(V3,V9), P_h2-{F}(V3,V10), P_and2-{F}(V10,V11), P_and1-{F}(V10,V12), P_h1-{F}(V3,V13), P_and2-{F}(V13,V2), P_not1-{F}(V13,V14) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6736: exists( #68, #6730 ), references = 1, size of lhs = 17:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), not_ok-{F}(V2), logic_and-{F}(V2), P_f-{F}(V3), P_in1-{F}(V3,V4), P_in2-{F}(V3,V5), P_inc-{F}(V3,V6), P_outs-{F}(V3,V7), P_outc-{F}(V3,V8), P_or1-{F}(V3,V9), P_h2-{F}(V3,V10), P_and1-{F}(V10,V11), P_h1-{F}(V3,V12), P_and2-{F}(V12,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6737: exists( #68, #6731 ), references = 1, size of lhs = 18:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), not_ok-{F}(V2), logic_and-{F}(V2), P_f-{F}(V3), P_in1-{F}(V3,V4), P_in2-{F}(V3,V5), P_inc-{F}(V3,V6), P_outs-{F}(V3,V7), P_outc-{F}(V3,V8), P_or1-{F}(V3,V9), P_h2-{F}(V3,V10), P_and1-{F}(V10,V11), P_h1-{F}(V3,V12), P_and2-{F}(V12,V2), P_not1-{F}(V12,V13) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6740: exists( #67, #6734 ), references = 1, size of lhs = 16:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), not_ok-{F}(V2), logic_and-{F}(V2), P_f-{F}(V3), P_in1-{F}(V3,V4), P_in2-{F}(V3,V5), P_inc-{F}(V3,V6), P_outs-{F}(V3,V7), P_outc-{F}(V3,V8), P_or1-{F}(V3,V9), P_h2-{F}(V3,V10), P_h1-{F}(V3,V11), P_and2-{F}(V11,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6741: exists( #67, #6735 ), references = 1, size of lhs = 17:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), not_ok-{F}(V2), logic_and-{F}(V2), P_f-{F}(V3), P_in1-{F}(V3,V4), P_in2-{F}(V3,V5), P_inc-{F}(V3,V6), P_outs-{F}(V3,V7), P_outc-{F}(V3,V8), P_or1-{F}(V3,V9), P_h2-{F}(V3,V10), P_h1-{F}(V3,V11), P_and2-{F}(V11,V2), P_not1-{F}(V11,V12) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6833: mergings( V2 == V9, V3 == V10; #6828 ), references = 1, size of lhs = 22:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), one-{F}(V2), zero-{F}(V3), halfadder-{F}(V4), fulladder-{F}(V5), P_h2-{F}(V5,V0), P_in2-{F}(V5,V3), P_h1-{F}(V5,V4), P_or1-{F}(V5,V6), P_in1-{F}(V6,V7), P_in2-{F}(V6,V7), P_f-{F}(V8), P_h1-{F}(V8,V4), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14), P_h2-{F}(V8,V15) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6836: mergings( V2 == V7, V3 == V9; #6829 ), references = 1, size of lhs = 22:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), one-{F}(V2), fulladder-{F}(V3), P_h2-{F}(V3,V0), P_h1-{F}(V3,V4), halfadder-{F}(V4), P_or1-{F}(V3,V5), P_in1-{F}(V5,V6), P_in2-{F}(V5,V6), P_f-{F}(V7), P_h1-{F}(V7,V4), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), P_h2-{F}(V7,V14), P_in1-{F}(V4,V15), zero-{F}(V15) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6839: mergings( V2 == V7, V3 == V9; #6830 ), references = 1, size of lhs = 27:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), one-{F}(V2), fulladder-{F}(V3), P_h2-{F}(V3,V0), P_h1-{F}(V3,V4), halfadder-{F}(V4), P_or1-{F}(V3,V5), P_in1-{F}(V5,V6), P_in2-{F}(V5,V6), logic_and-{F}(V7), P_and2-{F}(V4,V7), P_f-{F}(V8), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14), P_h2-{F}(V8,V15), P_h1-{F}(V8,V16), P_and2-{F}(V16,V7), halfadder-{F}(V17), P_and2-{F}(V17,V7), P_in1-{F}(V17,V18), zero-{F}(V18) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6893: exists( #65, #6887 ), references = 2, size of lhs = 18:
% 282.36/282.56 and_ok-{F}(V0), logic_or-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), halfadder-{F}(V2), P_or1-{F}(V2,V0), P_in2-{F}(V2,V3), one-{F}(V3), P_f-{F}(V4), P_in1-{F}(V4,V5), P_in2-{F}(V4,V6), P_inc-{F}(V4,V7), P_outs-{F}(V4,V8), P_outc-{F}(V4,V9), P_or1-{F}(V4,V10), P_h2-{F}(V4,V11), P_h1-{F}(V4,V12), P_or1-{F}(V12,V0) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6894: exists( #65, #6888 ), references = 2, size of lhs = 19:
% 282.36/282.56 and_ok-{F}(V0), logic_or-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), halfadder-{F}(V2), P_or1-{F}(V2,V0), P_in2-{F}(V2,V3), one-{F}(V3), P_f-{F}(V4), P_in1-{F}(V4,V5), P_in2-{F}(V4,V6), P_inc-{F}(V4,V7), P_outs-{F}(V4,V8), P_outc-{F}(V4,V9), P_or1-{F}(V4,V10), P_h2-{F}(V4,V11), P_and1-{F}(V11,V12), P_h1-{F}(V4,V13), P_or1-{F}(V13,V0) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6895: exists( #65, #6889 ), references = 1, size of lhs = 20:
% 282.36/282.56 and_ok-{F}(V0), logic_or-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), halfadder-{F}(V2), P_or1-{F}(V2,V0), P_in2-{F}(V2,V3), one-{F}(V3), P_f-{F}(V4), P_in1-{F}(V4,V5), P_in2-{F}(V4,V6), P_inc-{F}(V4,V7), P_outs-{F}(V4,V8), P_outc-{F}(V4,V9), P_or1-{F}(V4,V10), P_h2-{F}(V4,V11), P_and2-{F}(V11,V12), P_and1-{F}(V11,V13), P_h1-{F}(V4,V14), P_or1-{F}(V14,V0) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6905: exists( #64, #6899 ), references = 1, size of lhs = 20:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), logic_or-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_in2-{F}(V3,V4), one-{F}(V4), P_f-{F}(V5), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), P_h2-{F}(V5,V12), P_h1-{F}(V5,V13), P_or1-{F}(V13,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6906: exists( #64, #6900 ), references = 1, size of lhs = 21:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), logic_or-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_in2-{F}(V3,V4), one-{F}(V4), P_f-{F}(V5), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), P_h2-{F}(V5,V12), P_and1-{F}(V12,V13), P_h1-{F}(V5,V14), P_or1-{F}(V14,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6907: exists( #64, #6901 ), references = 1, size of lhs = 22:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), logic_or-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_in2-{F}(V3,V4), one-{F}(V4), P_f-{F}(V5), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), P_h2-{F}(V5,V12), P_and2-{F}(V12,V13), P_and1-{F}(V12,V14), P_h1-{F}(V5,V15), P_or1-{F}(V15,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6924: mergings( V3 == V19, V4 == V20, V5 == V21, V9 == V25, V7 == V23, V8 == V24, V12 == V27, V13 == V2, V0 == V26, V6 == V22; #6911 ), references = 1, size of lhs = 24:
% 282.36/282.56 logic_and-{F}(V0), logic_or-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V0), P_in2-{F}(V3,V4), one-{F}(V4), P_f-{F}(V5), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), P_h2-{F}(V5,V12), P_and2-{F}(V12,V13), P_and1-{F}(V12,V14), P_h1-{F}(V5,V15), P_and2-{F}(V15,V0), P_or1-{F}(V15,V0), P_not1-{F}(V15,V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6936: mergings( V3 == V19, V4 == V20, V5 == V21, V9 == V25, V7 == V23, V8 == V24, V12 == V28, V13 == V2, V0 == V26, V11 == V27, V6 == V22; #6912 ), references = 1, size of lhs = 24:
% 282.36/282.56 logic_and-{F}(V0), logic_or-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V0), P_in2-{F}(V3,V4), one-{F}(V4), P_f-{F}(V5), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), P_h2-{F}(V5,V12), P_and2-{F}(V12,V13), P_and1-{F}(V12,V14), P_h1-{F}(V5,V15), P_and2-{F}(V15,V0), P_or1-{F}(V15,V0), P_not1-{F}(V15,V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6949: mergings( V3 == V19, V4 == V20, V5 == V21, V9 == V25, V7 == V23, V8 == V24, V12 == V29, V13 == V2, V0 == V26, V11 == V28, V10 == V27, V6 == V22; #6913 ), references = 1, size of lhs = 24:
% 282.36/282.56 logic_and-{F}(V0), logic_or-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V0), P_in2-{F}(V3,V4), one-{F}(V4), P_f-{F}(V5), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), P_h2-{F}(V5,V12), P_and2-{F}(V12,V13), P_and1-{F}(V12,V14), P_h1-{F}(V5,V15), P_and2-{F}(V15,V0), P_or1-{F}(V15,V0), P_not1-{F}(V15,V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6963: mergings( V3 == V18, V4 == V19, V5 == V20, V9 == V24, V7 == V22, V8 == V23, V11 == V26, V12 == V2, V0 == V25, V6 == V21; #6950 ), references = 1, size of lhs = 23:
% 282.36/282.56 logic_and-{F}(V0), logic_or-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V0), P_in2-{F}(V3,V4), one-{F}(V4), P_f-{F}(V5), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), P_h2-{F}(V5,V12), P_and1-{F}(V12,V13), P_h1-{F}(V5,V14), P_and2-{F}(V14,V0), P_or1-{F}(V14,V0), P_not1-{F}(V14,V15) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6975: mergings( V3 == V18, V4 == V19, V5 == V20, V9 == V24, V7 == V22, V8 == V23, V11 == V27, V12 == V2, V0 == V25, V10 == V26, V6 == V21; #6951 ), references = 1, size of lhs = 23:
% 282.36/282.56 logic_and-{F}(V0), logic_or-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V0), P_in2-{F}(V3,V4), one-{F}(V4), P_f-{F}(V5), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), P_h2-{F}(V5,V12), P_and1-{F}(V12,V13), P_h1-{F}(V5,V14), P_and2-{F}(V14,V0), P_or1-{F}(V14,V0), P_not1-{F}(V14,V15) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #6986: mergings( V10 == V25, V3 == V18, V4 == V19, V5 == V20, V9 == V24, V7 == V22, V8 == V23, V11 == V26, V12 == V2, V6 == V21; #6952 ), references = 1, size of lhs = 23:
% 282.36/282.56 logic_and-{F}(V0), logic_or-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V0), P_in2-{F}(V3,V4), one-{F}(V4), P_f-{F}(V5), P_h2-{F}(V5,V6), P_in1-{F}(V5,V7), P_in2-{F}(V5,V8), P_inc-{F}(V5,V9), P_outs-{F}(V5,V10), P_outc-{F}(V5,V11), P_or1-{F}(V5,V12), P_and1-{F}(V6,V13), P_h1-{F}(V5,V14), P_and2-{F}(V14,V0), P_or1-{F}(V14,V0), P_not1-{F}(V14,V15) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7000: mergings( V3 == V17, V4 == V18, V5 == V19, V9 == V23, V7 == V21, V8 == V22, V10 == V25, V11 == V2, V0 == V24, V6 == V20; #6987 ), references = 1, size of lhs = 22:
% 282.36/282.56 logic_and-{F}(V0), logic_or-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V0), P_in2-{F}(V3,V4), one-{F}(V4), P_f-{F}(V5), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), P_h2-{F}(V5,V12), P_h1-{F}(V5,V13), P_and2-{F}(V13,V0), P_or1-{F}(V13,V0), P_not1-{F}(V13,V14) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7010: mergings( V3 == V17, V4 == V18, V5 == V19, V9 == V23, V7 == V21, V8 == V22, V10 == V24, V11 == V2, V6 == V20; #6988 ), references = 1, size of lhs = 22:
% 282.36/282.56 logic_and-{F}(V0), logic_or-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V0), P_in2-{F}(V3,V4), one-{F}(V4), P_f-{F}(V5), P_h2-{F}(V5,V6), P_in1-{F}(V5,V7), P_in2-{F}(V5,V8), P_inc-{F}(V5,V9), P_outs-{F}(V5,V10), P_outc-{F}(V5,V11), P_or1-{F}(V5,V12), P_h1-{F}(V5,V13), P_and2-{F}(V13,V0), P_or1-{F}(V13,V0), P_not1-{F}(V13,V14) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7020: mergings( V3 == V17, V4 == V18, V5 == V19, V9 == V23, V7 == V21, V8 == V22, V10 == V24, V11 == V2, V6 == V20; #6989 ), references = 1, size of lhs = 22:
% 282.36/282.56 logic_and-{F}(V0), logic_or-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V0), P_in2-{F}(V3,V4), one-{F}(V4), P_f-{F}(V5), P_h2-{F}(V5,V6), P_in1-{F}(V5,V7), P_in2-{F}(V5,V8), P_inc-{F}(V5,V9), P_outs-{F}(V5,V10), P_outc-{F}(V5,V11), P_or1-{F}(V5,V12), P_h1-{F}(V5,V13), P_and2-{F}(V13,V0), P_or1-{F}(V13,V0), P_not1-{F}(V13,V14) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7094: exists( #65, #7088 ), references = 2, size of lhs = 29:
% 282.36/282.56 halfadder-{F}(V0), P_outc-{F}(V0,V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), P_in1-{F}(V2,V3), zero-{F}(V3), connection-{F}(V1,V4), zero-{F}(V5), halfadder-{F}(V6), one-{F}(V7), one-{F}(V8), halfadder-{F}(V9), P_f-{F}(V10), P_h1-{F}(V10,V6), P_h2-{F}(V10,V9), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), fulladder-{F}(V17), P_in2-{F}(V17,V5), P_inc-{F}(V17,V7), P_in1-{F}(V17,V8), P_h2-{F}(V17,V9), P_h1-{F}(V17,V6), P_or1-{F}(V17,V18), P_in1-{F}(V18,V4) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7095: exists( #65, #7089 ), references = 2, size of lhs = 29:
% 282.36/282.56 halfadder-{F}(V0), P_outc-{F}(V0,V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), P_in1-{F}(V2,V3), zero-{F}(V3), connection-{F}(V1,V4), one-{F}(V5), halfadder-{F}(V6), P_in1-{F}(V6,V7), zero-{F}(V7), one-{F}(V8), halfadder-{F}(V9), P_f-{F}(V10), P_h1-{F}(V10,V6), P_h2-{F}(V10,V9), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), fulladder-{F}(V17), P_inc-{F}(V17,V5), P_in1-{F}(V17,V8), P_h2-{F}(V17,V9), P_h1-{F}(V17,V6), P_or1-{F}(V17,V18), P_in1-{F}(V18,V4) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7096: exists( #65, #7090 ), references = 2, size of lhs = 29:
% 282.36/282.56 halfadder-{F}(V0), P_outc-{F}(V0,V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), P_in1-{F}(V2,V3), zero-{F}(V3), connection-{F}(V1,V4), halfadder-{F}(V5), P_in2-{F}(V5,V6), one-{F}(V6), P_in1-{F}(V5,V7), zero-{F}(V7), one-{F}(V8), halfadder-{F}(V9), P_f-{F}(V10), P_h1-{F}(V10,V5), P_h2-{F}(V10,V9), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), fulladder-{F}(V17), P_in1-{F}(V17,V8), P_h2-{F}(V17,V9), P_h1-{F}(V17,V5), P_or1-{F}(V17,V18), P_in1-{F}(V18,V4) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7106: exists( #64, #7100 ), references = 1, size of lhs = 31:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_outc-{F}(V3,V4), connection-{F}(V4,V5), zero-{F}(V6), halfadder-{F}(V7), one-{F}(V8), one-{F}(V9), halfadder-{F}(V10), P_f-{F}(V11), P_h1-{F}(V11,V7), P_h2-{F}(V11,V10), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), fulladder-{F}(V18), P_in2-{F}(V18,V6), P_inc-{F}(V18,V8), P_in1-{F}(V18,V9), P_h2-{F}(V18,V10), P_h1-{F}(V18,V7), P_or1-{F}(V18,V19), P_in1-{F}(V19,V5) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7107: exists( #64, #7101 ), references = 1, size of lhs = 31:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_outc-{F}(V3,V4), connection-{F}(V4,V5), one-{F}(V6), halfadder-{F}(V7), P_in1-{F}(V7,V8), zero-{F}(V8), one-{F}(V9), halfadder-{F}(V10), P_f-{F}(V11), P_h1-{F}(V11,V7), P_h2-{F}(V11,V10), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), fulladder-{F}(V18), P_inc-{F}(V18,V6), P_in1-{F}(V18,V9), P_h2-{F}(V18,V10), P_h1-{F}(V18,V7), P_or1-{F}(V18,V19), P_in1-{F}(V19,V5) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7108: exists( #64, #7102 ), references = 1, size of lhs = 31:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_outc-{F}(V3,V4), connection-{F}(V4,V5), halfadder-{F}(V6), P_in2-{F}(V6,V7), one-{F}(V7), P_in1-{F}(V6,V8), zero-{F}(V8), one-{F}(V9), halfadder-{F}(V10), P_f-{F}(V11), P_h1-{F}(V11,V6), P_h2-{F}(V11,V10), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), fulladder-{F}(V18), P_in1-{F}(V18,V9), P_h2-{F}(V18,V10), P_h1-{F}(V18,V6), P_or1-{F}(V18,V19), P_in1-{F}(V19,V5) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7124: mergings( V3 == V25, V4 == V26, V5 == V27, V9 == V31, V7 == V29, V8 == V30, V12 == V21, V0 == V24, V6 == V28; #7112 ), references = 1, size of lhs = 36:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_outc-{F}(V3,V4), connection-{F}(V4,V5), zero-{F}(V6), halfadder-{F}(V7), P_and2-{F}(V7,V0), P_or1-{F}(V7,V8), P_not1-{F}(V7,V9), one-{F}(V10), one-{F}(V11), halfadder-{F}(V12), P_and2-{F}(V12,V13), P_and1-{F}(V12,V14), P_f-{F}(V15), P_h1-{F}(V15,V7), P_h2-{F}(V15,V12), P_in1-{F}(V15,V16), P_in2-{F}(V15,V17), P_inc-{F}(V15,V18), P_outs-{F}(V15,V19), P_outc-{F}(V15,V20), P_or1-{F}(V15,V21), fulladder-{F}(V22), P_in2-{F}(V22,V6), P_inc-{F}(V22,V10), P_in1-{F}(V22,V11), P_h2-{F}(V22,V12), P_h1-{F}(V22,V7), P_or1-{F}(V22,V23), P_in1-{F}(V23,V5) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7134: mergings( V3 == V25, V4 == V26, V5 == V27, V9 == V31, V7 == V29, V8 == V30, V12 == V21, V0 == V24, V6 == V28; #7113 ), references = 1, size of lhs = 36:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_outc-{F}(V3,V4), connection-{F}(V4,V5), one-{F}(V6), halfadder-{F}(V7), P_and2-{F}(V7,V0), P_or1-{F}(V7,V8), P_not1-{F}(V7,V9), P_in1-{F}(V7,V10), zero-{F}(V10), one-{F}(V11), halfadder-{F}(V12), P_and2-{F}(V12,V13), P_and1-{F}(V12,V14), P_f-{F}(V15), P_h1-{F}(V15,V7), P_h2-{F}(V15,V12), P_in1-{F}(V15,V16), P_in2-{F}(V15,V17), P_inc-{F}(V15,V18), P_outs-{F}(V15,V19), P_outc-{F}(V15,V20), P_or1-{F}(V15,V21), fulladder-{F}(V22), P_inc-{F}(V22,V6), P_in1-{F}(V22,V11), P_h2-{F}(V22,V12), P_h1-{F}(V22,V7), P_or1-{F}(V22,V23), P_in1-{F}(V23,V5) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7144: mergings( V3 == V25, V4 == V26, V5 == V27, V9 == V31, V7 == V29, V8 == V30, V12 == V20, V0 == V24, V6 == V28; #7114 ), references = 1, size of lhs = 36:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_outc-{F}(V3,V4), connection-{F}(V4,V5), halfadder-{F}(V6), P_and2-{F}(V6,V0), P_or1-{F}(V6,V7), P_not1-{F}(V6,V8), P_in2-{F}(V6,V9), one-{F}(V9), P_in1-{F}(V6,V10), zero-{F}(V10), one-{F}(V11), halfadder-{F}(V12), P_and2-{F}(V12,V13), P_and1-{F}(V12,V14), P_f-{F}(V15), P_h1-{F}(V15,V6), P_h2-{F}(V15,V12), P_in1-{F}(V15,V16), P_in2-{F}(V15,V17), P_inc-{F}(V15,V18), P_outs-{F}(V15,V19), P_outc-{F}(V15,V20), P_or1-{F}(V15,V21), fulladder-{F}(V22), P_in1-{F}(V22,V11), P_h2-{F}(V22,V12), P_h1-{F}(V22,V6), P_or1-{F}(V22,V23), P_in1-{F}(V23,V5) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7157: mergings( V3 == V24, V4 == V25, V5 == V26, V9 == V30, V7 == V28, V8 == V29, V11 == V20, V0 == V23, V6 == V27; #7145 ), references = 1, size of lhs = 35:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_outc-{F}(V3,V4), connection-{F}(V4,V5), zero-{F}(V6), halfadder-{F}(V7), P_and2-{F}(V7,V0), P_or1-{F}(V7,V8), P_not1-{F}(V7,V9), one-{F}(V10), one-{F}(V11), halfadder-{F}(V12), P_and1-{F}(V12,V13), P_f-{F}(V14), P_h1-{F}(V14,V7), P_h2-{F}(V14,V12), P_in1-{F}(V14,V15), P_in2-{F}(V14,V16), P_inc-{F}(V14,V17), P_outs-{F}(V14,V18), P_outc-{F}(V14,V19), P_or1-{F}(V14,V20), fulladder-{F}(V21), P_in2-{F}(V21,V6), P_inc-{F}(V21,V10), P_in1-{F}(V21,V11), P_h2-{F}(V21,V12), P_h1-{F}(V21,V7), P_or1-{F}(V21,V22), P_in1-{F}(V22,V5) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7167: mergings( V3 == V24, V4 == V25, V5 == V26, V9 == V30, V7 == V28, V8 == V29, V11 == V20, V0 == V23, V6 == V27; #7146 ), references = 1, size of lhs = 35:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_outc-{F}(V3,V4), connection-{F}(V4,V5), one-{F}(V6), halfadder-{F}(V7), P_and2-{F}(V7,V0), P_or1-{F}(V7,V8), P_not1-{F}(V7,V9), P_in1-{F}(V7,V10), zero-{F}(V10), one-{F}(V11), halfadder-{F}(V12), P_and1-{F}(V12,V13), P_f-{F}(V14), P_h1-{F}(V14,V7), P_h2-{F}(V14,V12), P_in1-{F}(V14,V15), P_in2-{F}(V14,V16), P_inc-{F}(V14,V17), P_outs-{F}(V14,V18), P_outc-{F}(V14,V19), P_or1-{F}(V14,V20), fulladder-{F}(V21), P_inc-{F}(V21,V6), P_in1-{F}(V21,V11), P_h2-{F}(V21,V12), P_h1-{F}(V21,V7), P_or1-{F}(V21,V22), P_in1-{F}(V22,V5) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7177: mergings( V3 == V24, V4 == V25, V5 == V26, V9 == V30, V7 == V28, V8 == V29, V11 == V19, V0 == V23, V6 == V27; #7147 ), references = 1, size of lhs = 35:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_outc-{F}(V3,V4), connection-{F}(V4,V5), halfadder-{F}(V6), P_and2-{F}(V6,V0), P_or1-{F}(V6,V7), P_not1-{F}(V6,V8), P_in2-{F}(V6,V9), one-{F}(V9), P_in1-{F}(V6,V10), zero-{F}(V10), one-{F}(V11), halfadder-{F}(V12), P_and1-{F}(V12,V13), P_f-{F}(V14), P_h1-{F}(V14,V6), P_h2-{F}(V14,V12), P_in1-{F}(V14,V15), P_in2-{F}(V14,V16), P_inc-{F}(V14,V17), P_outs-{F}(V14,V18), P_outc-{F}(V14,V19), P_or1-{F}(V14,V20), fulladder-{F}(V21), P_in1-{F}(V21,V11), P_h2-{F}(V21,V12), P_h1-{F}(V21,V6), P_or1-{F}(V21,V22), P_in1-{F}(V22,V5) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7190: mergings( V3 == V23, V4 == V24, V5 == V25, V9 == V29, V7 == V27, V8 == V28, V10 == V19, V0 == V22, V6 == V26; #7178 ), references = 1, size of lhs = 34:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_outc-{F}(V3,V4), connection-{F}(V4,V5), zero-{F}(V6), halfadder-{F}(V7), P_and2-{F}(V7,V0), P_or1-{F}(V7,V8), P_not1-{F}(V7,V9), one-{F}(V10), one-{F}(V11), halfadder-{F}(V12), P_f-{F}(V13), P_h1-{F}(V13,V7), P_h2-{F}(V13,V12), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15), P_inc-{F}(V13,V16), P_outs-{F}(V13,V17), P_outc-{F}(V13,V18), P_or1-{F}(V13,V19), fulladder-{F}(V20), P_in2-{F}(V20,V6), P_inc-{F}(V20,V10), P_in1-{F}(V20,V11), P_h2-{F}(V20,V12), P_h1-{F}(V20,V7), P_or1-{F}(V20,V21), P_in1-{F}(V21,V5) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7200: mergings( V3 == V23, V4 == V24, V5 == V25, V9 == V29, V7 == V27, V8 == V28, V10 == V19, V0 == V22, V6 == V26; #7179 ), references = 1, size of lhs = 34:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_outc-{F}(V3,V4), connection-{F}(V4,V5), one-{F}(V6), halfadder-{F}(V7), P_and2-{F}(V7,V0), P_or1-{F}(V7,V8), P_not1-{F}(V7,V9), P_in1-{F}(V7,V10), zero-{F}(V10), one-{F}(V11), halfadder-{F}(V12), P_f-{F}(V13), P_h1-{F}(V13,V7), P_h2-{F}(V13,V12), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15), P_inc-{F}(V13,V16), P_outs-{F}(V13,V17), P_outc-{F}(V13,V18), P_or1-{F}(V13,V19), fulladder-{F}(V20), P_inc-{F}(V20,V6), P_in1-{F}(V20,V11), P_h2-{F}(V20,V12), P_h1-{F}(V20,V7), P_or1-{F}(V20,V21), P_in1-{F}(V21,V5) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7210: mergings( V3 == V23, V4 == V24, V5 == V25, V9 == V29, V7 == V27, V8 == V28, V10 == V18, V0 == V22, V6 == V26; #7180 ), references = 1, size of lhs = 34:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_outc-{F}(V3,V4), connection-{F}(V4,V5), halfadder-{F}(V6), P_and2-{F}(V6,V0), P_or1-{F}(V6,V7), P_not1-{F}(V6,V8), P_in2-{F}(V6,V9), one-{F}(V9), P_in1-{F}(V6,V10), zero-{F}(V10), one-{F}(V11), halfadder-{F}(V12), P_f-{F}(V13), P_h1-{F}(V13,V6), P_h2-{F}(V13,V12), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15), P_inc-{F}(V13,V16), P_outs-{F}(V13,V17), P_outc-{F}(V13,V18), P_or1-{F}(V13,V19), fulladder-{F}(V20), P_in1-{F}(V20,V11), P_h2-{F}(V20,V12), P_h1-{F}(V20,V6), P_or1-{F}(V20,V21), P_in1-{F}(V21,V5) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7229: mergings( V2 == V31, V3 == V32, V0 == V20, V6 == V24, V7 == V25, V8 == V26, V12 == V30, V10 == V28, V11 == V29, V14 == V20, V13 == V23, V9 == V27; #7214 ), references = 1, size of lhs = 31:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), zero-{F}(V3), halfadder-{F}(V4), P_and2-{F}(V4,V0), P_or1-{F}(V4,V5), P_not1-{F}(V4,V6), one-{F}(V7), one-{F}(V8), halfadder-{F}(V9), P_f-{F}(V10), P_h1-{F}(V10,V4), P_h2-{F}(V10,V9), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), fulladder-{F}(V17), P_in2-{F}(V17,V3), P_inc-{F}(V17,V7), P_in1-{F}(V17,V8), P_h2-{F}(V17,V9), P_h1-{F}(V17,V4), P_or1-{F}(V17,V18), P_in2-{F}(V18,V19), P_in1-{F}(V18,V19) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7242: mergings( V2 == V31, V3 == V32, V0 == V20, V6 == V24, V7 == V25, V8 == V26, V12 == V30, V10 == V28, V11 == V29, V14 == V20, V13 == V23, V9 == V27; #7215 ), references = 1, size of lhs = 31:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), one-{F}(V3), halfadder-{F}(V4), P_and2-{F}(V4,V0), P_or1-{F}(V4,V5), P_not1-{F}(V4,V6), P_in1-{F}(V4,V7), zero-{F}(V7), one-{F}(V8), halfadder-{F}(V9), P_f-{F}(V10), P_h1-{F}(V10,V4), P_h2-{F}(V10,V9), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), fulladder-{F}(V17), P_inc-{F}(V17,V3), P_in1-{F}(V17,V8), P_h2-{F}(V17,V9), P_h1-{F}(V17,V4), P_or1-{F}(V17,V18), P_in2-{F}(V18,V19), P_in1-{F}(V18,V19) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7255: mergings( V2 == V31, V3 == V32, V0 == V19, V6 == V24, V7 == V25, V8 == V26, V12 == V30, V10 == V28, V11 == V29, V14 == V19, V13 == V23, V9 == V27; #7216 ), references = 1, size of lhs = 31:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_or1-{F}(V3,V4), P_not1-{F}(V3,V5), P_in2-{F}(V3,V6), one-{F}(V6), P_in1-{F}(V3,V7), zero-{F}(V7), one-{F}(V8), halfadder-{F}(V9), P_f-{F}(V10), P_h1-{F}(V10,V3), P_h2-{F}(V10,V9), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), fulladder-{F}(V17), P_in1-{F}(V17,V8), P_h2-{F}(V17,V9), P_h1-{F}(V17,V3), P_or1-{F}(V17,V18), P_in2-{F}(V18,V19), P_in1-{F}(V18,V19) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7271: mergings( V2 == V30, V4 == V31, V3 == V19, V7 == V23, V8 == V24, V9 == V25, V13 == V29, V11 == V27, V12 == V28, V0 == V19, V14 == V22, V10 == V26; #7256 ), references = 1, size of lhs = 30:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), zero-{F}(V3), halfadder-{F}(V4), P_and2-{F}(V4,V0), P_not1-{F}(V4,V5), one-{F}(V6), one-{F}(V7), halfadder-{F}(V8), P_f-{F}(V9), P_h1-{F}(V9,V4), P_h2-{F}(V9,V8), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), fulladder-{F}(V16), P_in2-{F}(V16,V3), P_inc-{F}(V16,V6), P_in1-{F}(V16,V7), P_h2-{F}(V16,V8), P_h1-{F}(V16,V4), P_or1-{F}(V16,V17), P_in2-{F}(V17,V18), P_in1-{F}(V17,V18) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7284: mergings( V2 == V30, V4 == V31, V3 == V19, V7 == V23, V8 == V24, V9 == V25, V13 == V29, V11 == V27, V12 == V28, V0 == V19, V14 == V22, V10 == V26; #7257 ), references = 1, size of lhs = 30:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), one-{F}(V3), halfadder-{F}(V4), P_and2-{F}(V4,V0), P_not1-{F}(V4,V5), P_in1-{F}(V4,V6), zero-{F}(V6), one-{F}(V7), halfadder-{F}(V8), P_f-{F}(V9), P_h1-{F}(V9,V4), P_h2-{F}(V9,V8), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), fulladder-{F}(V16), P_inc-{F}(V16,V3), P_in1-{F}(V16,V7), P_h2-{F}(V16,V8), P_h1-{F}(V16,V4), P_or1-{F}(V16,V17), P_in2-{F}(V17,V18), P_in1-{F}(V17,V18) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7297: mergings( V2 == V30, V4 == V31, V3 == V18, V7 == V23, V8 == V24, V9 == V25, V13 == V29, V11 == V27, V12 == V28, V0 == V18, V14 == V22, V10 == V26; #7258 ), references = 1, size of lhs = 30:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_not1-{F}(V3,V4), P_in2-{F}(V3,V5), one-{F}(V5), P_in1-{F}(V3,V6), zero-{F}(V6), one-{F}(V7), halfadder-{F}(V8), P_f-{F}(V9), P_h1-{F}(V9,V3), P_h2-{F}(V9,V8), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), fulladder-{F}(V16), P_in1-{F}(V16,V7), P_h2-{F}(V16,V8), P_h1-{F}(V16,V3), P_or1-{F}(V16,V17), P_in2-{F}(V17,V18), P_in1-{F}(V17,V18) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7313: mergings( V2 == V29, V4 == V30, V3 == V18, V7 == V22, V8 == V23, V9 == V24, V13 == V28, V11 == V26, V12 == V27, V0 == V18, V14 == V21, V10 == V25; #7298 ), references = 1, size of lhs = 29:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), zero-{F}(V3), halfadder-{F}(V4), P_and2-{F}(V4,V0), one-{F}(V5), one-{F}(V6), halfadder-{F}(V7), P_f-{F}(V8), P_h1-{F}(V8,V4), P_h2-{F}(V8,V7), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14), fulladder-{F}(V15), P_in2-{F}(V15,V3), P_inc-{F}(V15,V5), P_in1-{F}(V15,V6), P_h2-{F}(V15,V7), P_h1-{F}(V15,V4), P_or1-{F}(V15,V16), P_in2-{F}(V16,V17), P_in1-{F}(V16,V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7326: mergings( V2 == V29, V4 == V30, V3 == V18, V7 == V22, V8 == V23, V9 == V24, V13 == V28, V11 == V26, V12 == V27, V0 == V18, V14 == V21, V10 == V25; #7299 ), references = 1, size of lhs = 29:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), one-{F}(V3), halfadder-{F}(V4), P_and2-{F}(V4,V0), P_in1-{F}(V4,V5), zero-{F}(V5), one-{F}(V6), halfadder-{F}(V7), P_f-{F}(V8), P_h1-{F}(V8,V4), P_h2-{F}(V8,V7), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14), fulladder-{F}(V15), P_inc-{F}(V15,V3), P_in1-{F}(V15,V6), P_h2-{F}(V15,V7), P_h1-{F}(V15,V4), P_or1-{F}(V15,V16), P_in2-{F}(V16,V17), P_in1-{F}(V16,V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7339: mergings( V2 == V29, V4 == V30, V3 == V17, V7 == V22, V8 == V23, V9 == V24, V13 == V28, V11 == V26, V12 == V27, V0 == V17, V14 == V21, V10 == V25; #7300 ), references = 1, size of lhs = 29:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_in2-{F}(V3,V4), one-{F}(V4), P_in1-{F}(V3,V5), zero-{F}(V5), one-{F}(V6), halfadder-{F}(V7), P_f-{F}(V8), P_h1-{F}(V8,V3), P_h2-{F}(V8,V7), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14), fulladder-{F}(V15), P_in1-{F}(V15,V6), P_h2-{F}(V15,V7), P_h1-{F}(V15,V3), P_or1-{F}(V15,V16), P_in2-{F}(V16,V17), P_in1-{F}(V16,V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7357: mergings( V2 == V26, V3 == V27, V0 == V15, V5 == V19, V6 == V20, V7 == V21, V11 == V25, V9 == V23, V10 == V24, V12 == V18, V8 == V22; #7343 ), references = 2, size of lhs = 25:
% 282.36/282.56 zero-{F}(V0), zero-{F}(V1), halfadder-{F}(V2), P_in1-{F}(V2,V0), one-{F}(V3), one-{F}(V4), halfadder-{F}(V5), P_f-{F}(V6), P_h1-{F}(V6,V2), P_h2-{F}(V6,V5), P_in1-{F}(V6,V7), P_in2-{F}(V6,V8), P_inc-{F}(V6,V9), P_outs-{F}(V6,V10), P_outc-{F}(V6,V11), P_or1-{F}(V6,V12), fulladder-{F}(V13), P_in2-{F}(V13,V1), P_inc-{F}(V13,V3), P_in1-{F}(V13,V4), P_h2-{F}(V13,V5), P_h1-{F}(V13,V2), P_or1-{F}(V13,V14), P_in2-{F}(V14,V15), P_in1-{F}(V14,V15) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7370: mergings( V2 == V26, V3 == V27, V0 == V15, V13 == V16, V5 == V19, V6 == V20, V7 == V21, V11 == V25, V9 == V23, V10 == V24, V12 == V18, V8 == V22; #7344 ), references = 2, size of lhs = 23:
% 282.36/282.56 one-{F}(V0), halfadder-{F}(V1), P_in1-{F}(V1,V2), zero-{F}(V2), one-{F}(V3), halfadder-{F}(V4), P_f-{F}(V5), P_h1-{F}(V5,V1), P_h2-{F}(V5,V4), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), fulladder-{F}(V12), P_inc-{F}(V12,V0), P_in1-{F}(V12,V3), P_h2-{F}(V12,V4), P_h1-{F}(V12,V1), P_or1-{F}(V12,V13), P_in2-{F}(V13,V14), P_in1-{F}(V13,V14) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7384: mergings( V2 == V14; #7381 ), references = 1, size of lhs = 23:
% 282.36/282.56 zero-{F}(V0), halfadder-{F}(V1), one-{F}(V2), one-{F}(V3), halfadder-{F}(V4), P_f-{F}(V5), P_h1-{F}(V5,V1), P_h2-{F}(V5,V4), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), fulladder-{F}(V12), P_in2-{F}(V12,V0), P_inc-{F}(V12,V2), P_in1-{F}(V12,V3), P_h2-{F}(V12,V4), P_h1-{F}(V12,V1), P_or1-{F}(V12,V13), P_in2-{F}(V13,V14), P_in1-{F}(V13,V14) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7387: mergings( V2 == V15, V3 == V4; #7382 ), references = 1, size of lhs = 23:
% 282.36/282.56 halfadder-{F}(V0), zero-{F}(V1), one-{F}(V2), one-{F}(V3), halfadder-{F}(V4), P_f-{F}(V5), P_h1-{F}(V5,V0), P_h2-{F}(V5,V4), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), fulladder-{F}(V12), P_in2-{F}(V12,V1), P_inc-{F}(V12,V2), P_in1-{F}(V12,V3), P_h2-{F}(V12,V4), P_h1-{F}(V12,V0), P_or1-{F}(V12,V13), P_in2-{F}(V13,V14), P_in1-{F}(V13,V14) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7437: exists( #64, #7430 ), references = 3, size of lhs = 24:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), one-{F}(V2), P_not1-{F}(V0,V3), logic_and-{F}(V4), P_f-{F}(V5), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), P_h2-{F}(V5,V12), P_h1-{F}(V5,V13), P_and2-{F}(V13,V4), P_not1-{F}(V13,V14), halfadder-{F}(V15), P_and2-{F}(V15,V4), P_in1-{F}(V15,V16), zero-{F}(V16), halfadder-{F}(V17), P_and2-{F}(V17,V4), P_not1-{F}(V17,V3) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7438: exists( #64, #7433 ), references = 3, size of lhs = 9:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and2-{F}(V3,V4), P_out1-{F}(V4,V5), one-{F}(V5) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7439: exists( #64, #7432 ), references = 1, size of lhs = 25:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), one-{F}(V2), P_not1-{F}(V0,V3), logic_and-{F}(V4), P_f-{F}(V5), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), P_h2-{F}(V5,V12), P_h1-{F}(V5,V13), P_and2-{F}(V13,V4), P_or1-{F}(V13,V14), P_not1-{F}(V13,V15), halfadder-{F}(V16), P_and2-{F}(V16,V4), P_in1-{F}(V16,V17), zero-{F}(V17), halfadder-{F}(V18), P_and2-{F}(V18,V4), P_not1-{F}(V18,V3) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7461: disj( #26, #22+#120 ), references = 1, size of lhs = 8:
% 282.36/282.56 logic_not-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_out1-{F}(V0,V2), P_f-{F}(V3), P_outs-{F}(V3,V2), P_in1-{F}(V3,V4), P_in2-{F}(V3,V5) | abnormal-{T}(V0)
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7462: disj( #26, #24+#4 ), references = 1, size of lhs = 5:
% 282.36/282.56 logic_not-{F}(V0), P_out1-{F}(V0,V1), one-{F}(V1), P_in1-{F}(V0,V2), one-{F}(V2) | abnormal-{T}(V0)
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7463: disj( #26, #24+#2424 ), references = 1, size of lhs = 18:
% 282.36/282.56 logic_not-{F}(V0), P_out1-{F}(V0,V1), one-{F}(V1), P_in1-{F}(V0,V2), halfadder-{F}(V3), P_and1-{F}(V3,V4), P_in1-{F}(V4,V2), P_in2-{F}(V3,V5), one-{F}(V5), P_f-{F}(V6), P_h1-{F}(V6,V3), P_in1-{F}(V6,V7), P_in2-{F}(V6,V8), P_inc-{F}(V6,V9), P_outs-{F}(V6,V10), P_outc-{F}(V6,V11), P_or1-{F}(V6,V12), P_h2-{F}(V6,V13) | abnormal-{T}(V0)
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7496: exists( #65, #7490 ), references = 2, size of lhs = 8:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), one-{F}(V3), P_in1-{F}(V1,V4), one-{F}(V4) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7497: exists( #65, #7491 ), references = 1, size of lhs = 13:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), one-{F}(V4), not_ok-{F}(V5), P_in1-{F}(V5,V3), halfadder-{F}(V6), P_not1-{F}(V6,V5), P_and1-{F}(V6,V7), P_in2-{F}(V7,V3) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7498: exists( #65, #7492 ), references = 2, size of lhs = 24:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), one-{F}(V4), fulladder-{F}(V5), P_h1-{F}(V5,V6), halfadder-{F}(V6), P_or1-{F}(V5,V7), P_in2-{F}(V7,V8), zero-{F}(V8), P_f-{F}(V9), P_h1-{F}(V9,V6), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), P_h2-{F}(V9,V16), P_and1-{F}(V6,V17), P_in2-{F}(V17,V3) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7505: exists( #64, #7501 ), references = 2, size of lhs = 11:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), one-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), one-{F}(V6) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7506: exists( #64, #7502 ), references = 1, size of lhs = 27:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), one-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), fulladder-{F}(V7), P_h1-{F}(V7,V8), halfadder-{F}(V8), P_or1-{F}(V7,V9), P_in2-{F}(V9,V10), zero-{F}(V10), P_f-{F}(V11), P_h1-{F}(V11,V8), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), P_h2-{F}(V11,V18), P_and1-{F}(V8,V19), P_in2-{F}(V19,V6) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7509: disj( #26, exists( #64, #7501 ) ), references = 1, size of lhs = 11:
% 282.36/282.56 logic_not-{F}(V0), halfadder-{F}(V1), P_not1-{F}(V1,V0), P_and2-{F}(V1,V2), P_out1-{F}(V2,V3), one-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V0), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), one-{F}(V6) | abnormal-{T}(V0)
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7510: disj( #26, exists( #64, #7502 ) ), references = 1, size of lhs = 27:
% 282.36/282.56 logic_not-{F}(V0), halfadder-{F}(V1), P_not1-{F}(V1,V0), P_and2-{F}(V1,V2), P_out1-{F}(V2,V3), one-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V0), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), fulladder-{F}(V7), P_h1-{F}(V7,V8), halfadder-{F}(V8), P_or1-{F}(V7,V9), P_in2-{F}(V9,V10), zero-{F}(V10), P_f-{F}(V11), P_h1-{F}(V11,V8), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), P_h2-{F}(V11,V18), P_and1-{F}(V8,V19), P_in2-{F}(V19,V6) | abnormal-{T}(V0)
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7514: exists( #69, #7512 ), references = 6, size of lhs = 16:
% 282.36/282.56 one-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V2), P_out1-{F}(V2,V0), P_and1-{F}(V1,V3), P_in2-{F}(V3,V4), one-{F}(V4), P_f-{F}(V5), P_h2-{F}(V5,V1), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), abnormal-{F}(V11) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7542: exists( #65, #7540 ), references = 1, size of lhs = 19:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), one-{F}(V3), halfadder-{F}(V4), P_and2-{F}(V4,V1), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), one-{F}(V6), P_f-{F}(V7), P_h2-{F}(V7,V4), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), abnormal-{F}(V13) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7558: exists( #65, #7552 ), references = 1, size of lhs = 19:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), one-{F}(V3), halfadder-{F}(V4), P_and2-{F}(V4,V1), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), one-{F}(V6), P_f-{F}(V7), P_h2-{F}(V7,V4), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), abnormal-{F}(V13) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7559: exists( #65, #7553 ), references = 1, size of lhs = 27:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), one-{F}(V3), halfadder-{F}(V4), P_and2-{F}(V4,V1), P_not1-{F}(V4,V5), logic_and-{F}(V6), P_f-{F}(V7), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), P_h2-{F}(V7,V14), P_h1-{F}(V7,V15), P_and2-{F}(V15,V6), P_not1-{F}(V15,V16), halfadder-{F}(V17), P_and2-{F}(V17,V6), P_in1-{F}(V17,V18), zero-{F}(V18), halfadder-{F}(V19), P_and2-{F}(V19,V6), P_not1-{F}(V19,V5) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7560: exists( #65, #7554 ), references = 1, size of lhs = 12:
% 282.36/282.56 halfadder-{F}(V0), P_or1-{F}(V0,V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), one-{F}(V3), halfadder-{F}(V4), P_in1-{F}(V4,V5), zero-{F}(V5), P_or1-{F}(V4,V6), halfadder-{F}(V7), P_not1-{F}(V7,V6), P_and2-{F}(V7,V1) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7570: exists( #65, #7564 ), references = 2, size of lhs = 18:
% 282.36/282.56 halfadder-{F}(V0), P_outc-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_and1-{F}(V3,V4), P_in2-{F}(V4,V5), one-{F}(V5), P_f-{F}(V6), P_h2-{F}(V6,V3), P_in1-{F}(V6,V7), P_in2-{F}(V6,V8), P_inc-{F}(V6,V9), P_outs-{F}(V6,V10), P_outc-{F}(V6,V11), P_or1-{F}(V6,V12), abnormal-{F}(V12) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7571: exists( #65, #7565 ), references = 1, size of lhs = 11:
% 282.36/282.56 halfadder-{F}(V0), P_outc-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), zero-{F}(V4), P_or1-{F}(V3,V5), halfadder-{F}(V6), P_not1-{F}(V6,V5), P_and2-{F}(V6,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7572: exists( #65, #7566 ), references = 1, size of lhs = 26:
% 282.36/282.56 halfadder-{F}(V0), P_outc-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), logic_and-{F}(V5), P_f-{F}(V6), P_in1-{F}(V6,V7), P_in2-{F}(V6,V8), P_inc-{F}(V6,V9), P_outs-{F}(V6,V10), P_outc-{F}(V6,V11), P_or1-{F}(V6,V12), P_h2-{F}(V6,V13), P_h1-{F}(V6,V14), P_and2-{F}(V14,V5), P_not1-{F}(V14,V15), halfadder-{F}(V16), P_and2-{F}(V16,V5), P_in1-{F}(V16,V17), zero-{F}(V17), halfadder-{F}(V18), P_and2-{F}(V18,V5), P_not1-{F}(V18,V4) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7591: exists( #65, #7589 ), references = 2, size of lhs = 12:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), and_ok-{F}(V1), P_not1-{F}(V0,V2), P_in1-{F}(V2,V3), zero-{F}(V3), halfadder-{F}(V4), P_and2-{F}(V4,V1), P_in2-{F}(V4,V5), one-{F}(V5), P_in1-{F}(V1,V6), one-{F}(V6) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7601: exists( #64, #7599 ), references = 2, size of lhs = 14:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), P_in1-{F}(V4,V5), zero-{F}(V5), halfadder-{F}(V6), P_and2-{F}(V6,V2), P_in2-{F}(V6,V7), one-{F}(V7) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7605: exists( #64, #7603 ), references = 1, size of lhs = 16:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), one-{F}(V4), P_and2-{F}(V3,V5), and_ok-{F}(V5), halfadder-{F}(V6), P_and2-{F}(V6,V5), P_not1-{F}(V6,V2), halfadder-{F}(V7), P_and2-{F}(V7,V5), P_in2-{F}(V7,V8), one-{F}(V8) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7643: exists( #66, #7639 ), references = 1, size of lhs = 23:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), P_in1-{F}(V2,V3), one-{F}(V3), P_out1-{F}(V2,V4), halfadder-{F}(V5), P_and2-{F}(V5,V6), P_out1-{F}(V6,V4), P_and1-{F}(V5,V7), P_in2-{F}(V7,V8), one-{F}(V8), P_f-{F}(V9), P_h2-{F}(V9,V5), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), abnormal-{F}(V15) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7644: exists( #66, #7640 ), references = 1, size of lhs = 25:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), P_in1-{F}(V2,V3), one-{F}(V3), P_out1-{F}(V2,V4), halfadder-{F}(V5), P_outc-{F}(V5,V4), P_and2-{F}(V5,V6), halfadder-{F}(V7), P_and2-{F}(V7,V6), P_and1-{F}(V7,V8), P_in2-{F}(V8,V9), one-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V7), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), abnormal-{F}(V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7646: exists( #65, #7641 ), references = 2, size of lhs = 21:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), P_in1-{F}(V2,V3), one-{F}(V3), halfadder-{F}(V4), P_and2-{F}(V4,V2), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), one-{F}(V6), P_f-{F}(V7), P_h2-{F}(V7,V4), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), abnormal-{F}(V13) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7650: exists( #64, #7648 ), references = 1, size of lhs = 23:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_in2-{F}(V3,V4), one-{F}(V4), halfadder-{F}(V5), P_and2-{F}(V5,V2), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), one-{F}(V7), P_f-{F}(V8), P_h2-{F}(V8,V5), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14), abnormal-{F}(V14) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7661: mergings( V3 == V17, V4 == V18, V5 == V19, V9 == V23, V7 == V21, V8 == V22, V0 == V14, V6 == V20; #7652 ), references = 1, size of lhs = 23:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), one-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_in2-{F}(V3,V4), one-{F}(V4), halfadder-{F}(V5), P_and2-{F}(V5,V0), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), one-{F}(V7), P_f-{F}(V8), P_h2-{F}(V8,V5), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14), abnormal-{F}(V14) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7671: mergings( V2 == V13, V3 == V14, V4 == V15, V8 == V19, V6 == V17, V7 == V18, V5 == V16; #7663 ), references = 3, size of lhs = 17:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_in2-{F}(V0,V2), one-{F}(V2), P_and1-{F}(V0,V3), P_in2-{F}(V3,V4), one-{F}(V4), P_f-{F}(V5), P_h2-{F}(V5,V0), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), abnormal-{F}(V11) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7685: disj( #26, input ), references = 2, size of lhs = 11:
% 282.36/282.56 logic_not-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), abnormal-{F}(V7), P_h2-{F}(V1,V8), P_not1-{F}(V8,V0) | not_ok-{T}(V0)
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7690: disj( #12, input ), references = 5, size of lhs = 13:
% 282.36/282.56 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), abnormal-{F}(V7), P_h2-{F}(V1,V8), P_and1-{F}(V8,V0), P_not1-{F}(V8,V9), P_and2-{F}(V8,V10) | and_ok-{T}(V0)
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7700: exists( #69, #7694 ), references = 1, size of lhs = 16:
% 282.36/282.56 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), abnormal-{F}(V7), P_h2-{F}(V1,V8), P_and1-{F}(V8,V0), P_and2-{F}(V8,V9), P_out1-{F}(V0,V10), one-{F}(V10), P_in2-{F}(V0,V11), zero-{F}(V11) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7706: mergings( V3 == V13, V4 == V14, V5 == V15, V7 == V16, V8 == V12; #7698 ), references = 1, size of lhs = 15:
% 282.36/282.56 logic_and-{F}(V0), abnormal-{F}(V1), P_out1-{F}(V0,V2), one-{F}(V2), P_in2-{F}(V0,V3), P_f-{F}(V4), P_or1-{F}(V4,V1), P_outc-{F}(V4,V3), P_inc-{F}(V4,V5), P_h2-{F}(V4,V6), P_and1-{F}(V6,V0), P_and2-{F}(V6,V7), P_in1-{F}(V4,V8), P_in2-{F}(V4,V9), P_outs-{F}(V4,V10) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7707: exists( #69, #7696 ), references = 1, size of lhs = 22:
% 282.36/282.56 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), abnormal-{F}(V7), P_h2-{F}(V1,V8), P_and1-{F}(V8,V0), P_and2-{F}(V8,V9), P_in2-{F}(V0,V10), zero-{F}(V10), P_out1-{F}(V0,V11), fulladder-{F}(V12), P_outs-{F}(V12,V13), one-{F}(V13), P_h2-{F}(V12,V14), halfadder-{F}(V14), P_and1-{F}(V14,V15), P_out1-{F}(V15,V11) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7711: exists( #68, #7697 ), references = 1, size of lhs = 15:
% 282.36/282.56 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), abnormal-{F}(V7), P_h2-{F}(V1,V8), P_and1-{F}(V8,V0), P_out1-{F}(V0,V9), one-{F}(V9), P_in2-{F}(V0,V10), zero-{F}(V10) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7717: mergings( V3 == V12, V4 == V13, V5 == V14, V7 == V15, V8 == V11; #7709 ), references = 1, size of lhs = 14:
% 282.36/282.56 logic_and-{F}(V0), abnormal-{F}(V1), P_out1-{F}(V0,V2), one-{F}(V2), P_in2-{F}(V0,V3), P_f-{F}(V4), P_or1-{F}(V4,V1), P_outc-{F}(V4,V3), P_inc-{F}(V4,V5), P_h2-{F}(V4,V6), P_and1-{F}(V6,V0), P_in1-{F}(V4,V7), P_in2-{F}(V4,V8), P_outs-{F}(V4,V9) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7718: exists( #68, #7699 ), references = 1, size of lhs = 21:
% 282.36/282.56 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), abnormal-{F}(V7), P_h2-{F}(V1,V8), P_and1-{F}(V8,V0), P_in2-{F}(V0,V9), zero-{F}(V9), P_out1-{F}(V0,V10), fulladder-{F}(V11), P_outs-{F}(V11,V12), one-{F}(V12), P_h2-{F}(V11,V13), halfadder-{F}(V13), P_and1-{F}(V13,V14), P_out1-{F}(V14,V10) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7760: exists( #65, #7756 ), references = 1, size of lhs = 7:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_and1-{F}(V0,V2), not_ok-{F}(V2), P_in1-{F}(V2,V3), one-{F}(V3) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7761: exists( #65, #7753 ), references = 3, size of lhs = 9:
% 282.36/282.56 not_ok-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), fulladder-{F}(V2), P_outs-{F}(V2,V3), one-{F}(V3), P_h2-{F}(V2,V4), halfadder-{F}(V4), P_and1-{F}(V4,V0) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7762: exists( #65, #7754 ), references = 2, size of lhs = 13:
% 282.36/282.56 not_ok-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), halfadder-{F}(V2), P_and2-{F}(V2,V0), P_not1-{F}(V2,V3), and_ok-{F}(V3), fulladder-{F}(V4), P_outs-{F}(V4,V5), one-{F}(V5), P_h2-{F}(V4,V6), halfadder-{F}(V6), P_and1-{F}(V6,V3) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7772: exists( #64, #7766 ), references = 1, size of lhs = 11:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), not_ok-{F}(V2), fulladder-{F}(V3), P_outs-{F}(V3,V4), one-{F}(V4), P_h2-{F}(V3,V5), halfadder-{F}(V5), P_and1-{F}(V5,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7773: exists( #64, #7767 ), references = 1, size of lhs = 15:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), and_ok-{F}(V4), fulladder-{F}(V5), P_outs-{F}(V5,V6), one-{F}(V6), P_h2-{F}(V5,V7), halfadder-{F}(V7), P_and1-{F}(V7,V4) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7813: exists( #66, #7807 ), references = 2, size of lhs = 12:
% 282.36/282.56 and_ok-{F}(V0), P_out1-{F}(V0,V1), one-{F}(V1), halfadder-{F}(V2), P_and2-{F}(V2,V3), P_out1-{F}(V3,V4), one-{F}(V4), P_not1-{F}(V2,V5), not_ok-{F}(V5), halfadder-{F}(V6), P_not1-{F}(V6,V5), P_and1-{F}(V6,V0) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7814: exists( #66, #7808 ), references = 2, size of lhs = 17:
% 282.36/282.56 and_ok-{F}(V0), P_out1-{F}(V0,V1), one-{F}(V1), one-{F}(V2), halfadder-{F}(V3), P_and1-{F}(V3,V0), P_and2-{F}(V3,V4), P_out1-{F}(V4,V2), P_f-{F}(V5), P_h2-{F}(V5,V3), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), abnormal-{F}(V11) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7815: exists( #66, #7809 ), references = 2, size of lhs = 18:
% 282.36/282.56 and_ok-{F}(V0), P_out1-{F}(V0,V1), one-{F}(V1), halfadder-{F}(V2), P_and1-{F}(V2,V0), P_in1-{F}(V2,V3), one-{F}(V3), P_in2-{F}(V2,V4), one-{F}(V4), P_f-{F}(V5), P_h2-{F}(V5,V2), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), abnormal-{F}(V11) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7825: exists( #65, #7819 ), references = 2, size of lhs = 12:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_and1-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7826: exists( #65, #7820 ), references = 2, size of lhs = 17:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_and1-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_and2-{F}(V3,V2), P_f-{F}(V4), P_h2-{F}(V4,V3), P_in1-{F}(V4,V5), P_in2-{F}(V4,V6), P_inc-{F}(V4,V7), P_outs-{F}(V4,V8), P_outc-{F}(V4,V9), P_or1-{F}(V4,V10), abnormal-{F}(V10) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7827: exists( #65, #7821 ), references = 2, size of lhs = 20:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_and1-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_in1-{F}(V3,V4), one-{F}(V4), P_in2-{F}(V3,V5), one-{F}(V5), P_f-{F}(V6), P_h2-{F}(V6,V3), P_in1-{F}(V6,V7), P_in2-{F}(V6,V8), P_inc-{F}(V6,V9), P_outs-{F}(V6,V10), P_outc-{F}(V6,V11), P_or1-{F}(V6,V12), abnormal-{F}(V12) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7837: exists( #71, #7831 ), references = 1, size of lhs = 14:
% 282.36/282.56 fulladder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_h2-{F}(V0,V2), halfadder-{F}(V2), P_and1-{F}(V2,V3), and_ok-{F}(V3), halfadder-{F}(V4), P_and2-{F}(V4,V3), P_not1-{F}(V4,V5), not_ok-{F}(V5), halfadder-{F}(V6), P_not1-{F}(V6,V5), P_and1-{F}(V6,V3) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7838: exists( #71, #7832 ), references = 1, size of lhs = 19:
% 282.36/282.56 fulladder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_h2-{F}(V0,V2), halfadder-{F}(V2), P_and1-{F}(V2,V3), and_ok-{F}(V3), halfadder-{F}(V4), P_and1-{F}(V4,V3), P_and2-{F}(V4,V3), P_f-{F}(V5), P_h2-{F}(V5,V4), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), abnormal-{F}(V11) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7839: exists( #71, #7833 ), references = 2, size of lhs = 22:
% 282.36/282.56 fulladder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_h2-{F}(V0,V2), halfadder-{F}(V2), P_and1-{F}(V2,V3), and_ok-{F}(V3), halfadder-{F}(V4), P_and1-{F}(V4,V3), P_in1-{F}(V4,V5), one-{F}(V5), P_in2-{F}(V4,V6), one-{F}(V6), P_f-{F}(V7), P_h2-{F}(V7,V4), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), abnormal-{F}(V13) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7855: mergings( V3 == V10, V4 == V11, V5 == V12, V9 == V16, V7 == V14, V8 == V15, V6 == V13; #7846 ), references = 1, size of lhs = 19:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_and1-{F}(V1,V0), P_f-{F}(V2), P_h2-{F}(V2,V1), P_in1-{F}(V2,V3), P_in2-{F}(V2,V4), P_inc-{F}(V2,V5), P_outs-{F}(V2,V6), P_outc-{F}(V2,V7), P_or1-{F}(V2,V8), abnormal-{F}(V8), fulladder-{F}(V9), P_outs-{F}(V9,V10), one-{F}(V10), P_h2-{F}(V9,V11), halfadder-{F}(V11), P_and1-{F}(V11,V0) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7864: mergings( V3 == V14, V4 == V15, V5 == V16, V9 == V20, V7 == V18, V8 == V19, V0 == V13, V6 == V17; #7845 ), references = 1, size of lhs = 19:
% 282.36/282.56 logic_and-{F}(V0), fulladder-{F}(V1), P_outs-{F}(V1,V2), one-{F}(V2), P_h2-{F}(V1,V3), halfadder-{F}(V3), P_and1-{F}(V3,V0), halfadder-{F}(V4), P_and1-{F}(V4,V0), P_and2-{F}(V4,V0), P_f-{F}(V5), P_h2-{F}(V5,V4), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), abnormal-{F}(V11) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7873: mergings( V3 == V16, V4 == V17, V5 == V18, V9 == V22, V7 == V20, V8 == V21, V0 == V13, V6 == V19; #7847 ), references = 1, size of lhs = 23:
% 282.36/282.56 logic_and-{F}(V0), fulladder-{F}(V1), P_outs-{F}(V1,V2), one-{F}(V2), P_h2-{F}(V1,V3), halfadder-{F}(V3), P_and1-{F}(V3,V0), halfadder-{F}(V4), P_and2-{F}(V4,V0), P_and1-{F}(V4,V0), P_in1-{F}(V4,V5), one-{F}(V5), P_in2-{F}(V4,V6), one-{F}(V6), P_f-{F}(V7), P_h2-{F}(V7,V4), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), abnormal-{F}(V13) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7884: mergings( V3 == V17, V4 == V18, V5 == V19, V9 == V23, V7 == V21, V8 == V22, V0 == V14, V6 == V20; #7875 ), references = 2, size of lhs = 23:
% 282.36/282.56 logic_and-{F}(V0), fulladder-{F}(V1), P_outs-{F}(V1,V2), one-{F}(V2), P_h2-{F}(V1,V3), halfadder-{F}(V3), P_and1-{F}(V3,V0), halfadder-{F}(V4), P_and1-{F}(V4,V0), P_and2-{F}(V4,V5), P_in1-{F}(V4,V6), one-{F}(V6), P_in2-{F}(V4,V7), one-{F}(V7), P_f-{F}(V8), P_h2-{F}(V8,V4), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14), abnormal-{F}(V14) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7894: mergings( V3 == V16, V4 == V17, V5 == V18, V9 == V22, V7 == V20, V8 == V21, V0 == V13, V6 == V19; #7885 ), references = 2, size of lhs = 22:
% 282.36/282.56 logic_and-{F}(V0), fulladder-{F}(V1), P_outs-{F}(V1,V2), one-{F}(V2), P_h2-{F}(V1,V3), halfadder-{F}(V3), P_and1-{F}(V3,V0), halfadder-{F}(V4), P_and1-{F}(V4,V0), P_in1-{F}(V4,V5), one-{F}(V5), P_in2-{F}(V4,V6), one-{F}(V6), P_f-{F}(V7), P_h2-{F}(V7,V4), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), abnormal-{F}(V13) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7904: mergings( V2 == V13, V3 == V14, V4 == V15, V8 == V19, V6 == V17, V7 == V18, V5 == V16; #7896 ), references = 4, size of lhs = 18:
% 282.36/282.56 halfadder-{F}(V0), fulladder-{F}(V1), P_h2-{F}(V1,V0), P_outs-{F}(V1,V2), one-{F}(V2), P_in1-{F}(V0,V3), one-{F}(V3), P_in2-{F}(V0,V4), one-{F}(V4), P_f-{F}(V5), P_h2-{F}(V5,V0), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), abnormal-{F}(V11) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7909: mergings( V2 == V5; #7907 ), references = 10, size of lhs = 19:
% 282.36/282.56 one-{F}(V0), halfadder-{F}(V1), fulladder-{F}(V2), P_h2-{F}(V2,V1), P_h1-{F}(V2,V3), P_outs-{F}(V3,V0), P_outs-{F}(V2,V4), one-{F}(V4), P_in1-{F}(V1,V5), one-{F}(V5), P_f-{F}(V6), P_h2-{F}(V6,V1), P_in1-{F}(V6,V7), P_in2-{F}(V6,V8), P_inc-{F}(V6,V9), P_outs-{F}(V6,V10), P_outc-{F}(V6,V11), P_or1-{F}(V6,V12), abnormal-{F}(V12) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7914: mergings( V2 == V5; #7912 ), references = 9, size of lhs = 19:
% 282.36/282.56 one-{F}(V0), halfadder-{F}(V1), one-{F}(V2), fulladder-{F}(V3), P_in1-{F}(V3,V0), P_h2-{F}(V3,V1), P_h1-{F}(V3,V4), P_outs-{F}(V4,V2), P_outs-{F}(V3,V5), one-{F}(V5), P_f-{F}(V6), P_h2-{F}(V6,V1), P_in1-{F}(V6,V7), P_in2-{F}(V6,V8), P_inc-{F}(V6,V9), P_outs-{F}(V6,V10), P_outc-{F}(V6,V11), P_or1-{F}(V6,V12), abnormal-{F}(V12) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7965: mergings( V2 == V8, V3 == V10, V0 == V7; #7959 ), references = 1, size of lhs = 20:
% 282.36/282.56 one-{F}(V0), halfadder-{F}(V1), P_and1-{F}(V1,V2), P_out1-{F}(V2,V3), fulladder-{F}(V4), P_in1-{F}(V4,V0), P_h2-{F}(V4,V1), P_h1-{F}(V4,V5), P_outs-{F}(V5,V3), P_outs-{F}(V4,V6), one-{F}(V6), P_f-{F}(V7), P_h2-{F}(V7,V1), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), abnormal-{F}(V13) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7969: mergings( V2 == V7, V3 == V9, V0 == V6; #7960 ), references = 1, size of lhs = 20:
% 282.36/282.56 halfadder-{F}(V0), P_and1-{F}(V0,V1), P_out1-{F}(V1,V2), fulladder-{F}(V3), P_h2-{F}(V3,V0), P_h1-{F}(V3,V4), P_outs-{F}(V4,V2), P_outs-{F}(V3,V5), one-{F}(V5), P_in1-{F}(V0,V6), one-{F}(V6), P_f-{F}(V7), P_h2-{F}(V7,V0), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), abnormal-{F}(V13) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #7970: exists( #71, #7958 ), references = 1, size of lhs = 22:
% 282.36/282.56 fulladder-{F}(V0), P_outs-{F}(V0,V1), one-{F}(V1), P_h2-{F}(V0,V2), halfadder-{F}(V2), P_and1-{F}(V2,V3), P_out1-{F}(V3,V4), halfadder-{F}(V5), P_in2-{F}(V5,V4), P_in1-{F}(V5,V6), one-{F}(V6), P_and1-{F}(V5,V7), P_in2-{F}(V7,V4), P_f-{F}(V8), P_h2-{F}(V8,V5), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14), abnormal-{F}(V14) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8034: exists( #65, #8028 ), references = 2, size of lhs = 25:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), one-{F}(V5), halfadder-{F}(V6), fulladder-{F}(V7), P_in1-{F}(V7,V5), P_h2-{F}(V7,V6), P_h1-{F}(V7,V8), P_outs-{F}(V8,V3), P_outs-{F}(V7,V9), one-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V6), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), abnormal-{F}(V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8035: exists( #65, #8029 ), references = 3, size of lhs = 24:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_in2-{F}(V5,V3), fulladder-{F}(V6), P_h2-{F}(V6,V5), P_outs-{F}(V6,V7), one-{F}(V7), P_in1-{F}(V5,V8), one-{F}(V8), P_f-{F}(V9), P_h2-{F}(V9,V5), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), abnormal-{F}(V15) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8036: exists( #65, #8030 ), references = 2, size of lhs = 25:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), fulladder-{F}(V6), P_h2-{F}(V6,V5), P_h1-{F}(V6,V7), P_outs-{F}(V7,V3), P_outs-{F}(V6,V8), one-{F}(V8), P_in1-{F}(V5,V9), one-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V5), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), abnormal-{F}(V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8049: exists( #64, #8043 ), references = 1, size of lhs = 27:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in2-{F}(V4,V5), one-{F}(V6), halfadder-{F}(V7), fulladder-{F}(V8), P_in1-{F}(V8,V6), P_h2-{F}(V8,V7), P_h1-{F}(V8,V9), P_outs-{F}(V9,V5), P_outs-{F}(V8,V10), one-{F}(V10), P_f-{F}(V11), P_h2-{F}(V11,V7), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), abnormal-{F}(V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8050: exists( #64, #8044 ), references = 1, size of lhs = 26:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in2-{F}(V4,V5), halfadder-{F}(V6), P_in2-{F}(V6,V5), fulladder-{F}(V7), P_h2-{F}(V7,V6), P_outs-{F}(V7,V8), one-{F}(V8), P_in1-{F}(V6,V9), one-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V6), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), abnormal-{F}(V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8051: exists( #64, #8045 ), references = 1, size of lhs = 27:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in2-{F}(V4,V5), halfadder-{F}(V6), fulladder-{F}(V7), P_h2-{F}(V7,V6), P_h1-{F}(V7,V8), P_outs-{F}(V8,V5), P_outs-{F}(V7,V9), one-{F}(V9), P_in1-{F}(V6,V10), one-{F}(V10), P_f-{F}(V11), P_h2-{F}(V11,V6), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), abnormal-{F}(V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8053: exists( #66, #8047 ), references = 2, size of lhs = 24:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), halfadder-{F}(V4), fulladder-{F}(V5), P_h2-{F}(V5,V4), P_outs-{F}(V5,V6), one-{F}(V6), P_in1-{F}(V4,V7), one-{F}(V7), P_f-{F}(V8), P_h2-{F}(V8,V4), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14), abnormal-{F}(V14) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8062: mergings( V2 == V8; #8060 ), references = 1, size of lhs = 24:
% 282.36/282.56 one-{F}(V0), halfadder-{F}(V1), halfadder-{F}(V2), P_in1-{F}(V2,V3), zero-{F}(V3), P_or1-{F}(V2,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V1), fulladder-{F}(V6), P_in1-{F}(V6,V0), P_h2-{F}(V6,V1), P_outs-{F}(V6,V7), one-{F}(V7), P_f-{F}(V8), P_h2-{F}(V8,V1), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14), abnormal-{F}(V14) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8099: exists( #64, #8097 ), references = 2, size of lhs = 27:
% 282.36/282.56 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), halfadder-{F}(V7), P_in2-{F}(V7,V6), fulladder-{F}(V8), P_h2-{F}(V8,V7), P_outs-{F}(V8,V9), one-{F}(V9), P_in1-{F}(V7,V10), one-{F}(V10), P_f-{F}(V11), P_h2-{F}(V11,V7), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), abnormal-{F}(V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8105: exists( #65, #8103 ), references = 2, size of lhs = 28:
% 282.36/282.56 and_ok-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), halfadder-{F}(V2), P_and2-{F}(V2,V0), P_not1-{F}(V2,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), halfadder-{F}(V7), P_in2-{F}(V7,V6), fulladder-{F}(V8), P_h2-{F}(V8,V7), P_outs-{F}(V8,V9), one-{F}(V9), P_in1-{F}(V7,V10), one-{F}(V10), P_f-{F}(V11), P_h2-{F}(V11,V7), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), abnormal-{F}(V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8109: exists( #64, #8107 ), references = 1, size of lhs = 30:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), halfadder-{F}(V8), P_in2-{F}(V8,V7), fulladder-{F}(V9), P_h2-{F}(V9,V8), P_outs-{F}(V9,V10), one-{F}(V10), P_in1-{F}(V8,V11), one-{F}(V11), P_f-{F}(V12), P_h2-{F}(V12,V8), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), abnormal-{F}(V18) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8120: mergings( V3 == V26, V4 == V27, V5 == V28, V9 == V32, V7 == V30, V8 == V31, V0 == V22, V6 == V29; #8111 ), references = 1, size of lhs = 36:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), halfadder-{F}(V8), P_in2-{F}(V8,V7), P_and2-{F}(V8,V9), P_and1-{F}(V8,V10), fulladder-{F}(V11), P_h2-{F}(V11,V8), P_outs-{F}(V11,V12), one-{F}(V12), P_in1-{F}(V8,V13), one-{F}(V13), P_f-{F}(V14), P_h2-{F}(V14,V8), P_h1-{F}(V14,V15), P_and2-{F}(V15,V0), P_or1-{F}(V15,V16), P_not1-{F}(V15,V17), P_in1-{F}(V14,V18), P_in2-{F}(V14,V19), P_inc-{F}(V14,V20), P_outs-{F}(V14,V21), P_outc-{F}(V14,V22), P_or1-{F}(V14,V23), abnormal-{F}(V23) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8130: mergings( V3 == V25, V4 == V26, V5 == V27, V9 == V31, V7 == V29, V8 == V30, V0 == V21, V6 == V28; #8121 ), references = 1, size of lhs = 35:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), halfadder-{F}(V8), P_in2-{F}(V8,V7), P_and1-{F}(V8,V9), fulladder-{F}(V10), P_h2-{F}(V10,V8), P_outs-{F}(V10,V11), one-{F}(V11), P_in1-{F}(V8,V12), one-{F}(V12), P_f-{F}(V13), P_h2-{F}(V13,V8), P_h1-{F}(V13,V14), P_and2-{F}(V14,V0), P_or1-{F}(V14,V15), P_not1-{F}(V14,V16), P_in1-{F}(V13,V17), P_in2-{F}(V13,V18), P_inc-{F}(V13,V19), P_outs-{F}(V13,V20), P_outc-{F}(V13,V21), P_or1-{F}(V13,V22), abnormal-{F}(V22) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8140: mergings( V3 == V24, V4 == V25, V5 == V26, V9 == V30, V7 == V28, V8 == V29, V0 == V20, V6 == V27; #8131 ), references = 1, size of lhs = 34:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), P_in2-{F}(V6,V7), halfadder-{F}(V8), P_in2-{F}(V8,V7), fulladder-{F}(V9), P_h2-{F}(V9,V8), P_outs-{F}(V9,V10), one-{F}(V10), P_in1-{F}(V8,V11), one-{F}(V11), P_f-{F}(V12), P_h2-{F}(V12,V8), P_h1-{F}(V12,V13), P_and2-{F}(V13,V0), P_or1-{F}(V13,V14), P_not1-{F}(V13,V15), P_in1-{F}(V12,V16), P_in2-{F}(V12,V17), P_inc-{F}(V12,V18), P_outs-{F}(V12,V19), P_outc-{F}(V12,V20), P_or1-{F}(V12,V21), abnormal-{F}(V21) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8150: mergings( V3 == V22, V4 == V23, V5 == V24, V9 == V28, V7 == V26, V8 == V27, V10 == V0, V6 == V25; #8141 ), references = 2, size of lhs = 32:
% 282.36/282.56 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V0), P_not1-{F}(V3,V4), not_ok-{F}(V4), halfadder-{F}(V5), P_not1-{F}(V5,V4), P_and1-{F}(V5,V6), halfadder-{F}(V6), fulladder-{F}(V7), P_h2-{F}(V7,V6), P_outs-{F}(V7,V8), one-{F}(V8), P_in1-{F}(V6,V9), one-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V6), P_h1-{F}(V10,V11), P_and2-{F}(V11,V0), P_or1-{F}(V11,V12), P_not1-{F}(V11,V13), P_in1-{F}(V10,V14), P_in2-{F}(V10,V15), P_inc-{F}(V10,V16), P_outs-{F}(V10,V17), P_outc-{F}(V10,V18), P_or1-{F}(V10,V19), abnormal-{F}(V19) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8155: mergings( V2 == V10; #8153 ), references = 1, size of lhs = 32:
% 282.36/282.56 one-{F}(V0), halfadder-{F}(V1), logic_and-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_in1-{F}(V3,V4), zero-{F}(V4), halfadder-{F}(V5), P_and2-{F}(V5,V2), P_not1-{F}(V5,V6), not_ok-{F}(V6), halfadder-{F}(V7), P_not1-{F}(V7,V6), P_and1-{F}(V7,V1), fulladder-{F}(V8), P_in1-{F}(V8,V0), P_h2-{F}(V8,V1), P_outs-{F}(V8,V9), one-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V1), P_h1-{F}(V10,V11), P_and2-{F}(V11,V2), P_or1-{F}(V11,V12), P_not1-{F}(V11,V13), P_in1-{F}(V10,V14), P_in2-{F}(V10,V15), P_inc-{F}(V10,V16), P_outs-{F}(V10,V17), P_outc-{F}(V10,V18), P_or1-{F}(V10,V19), abnormal-{F}(V19) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8158: mergings( V2 == V11; #8156 ), references = 1, size of lhs = 31:
% 282.36/282.56 one-{F}(V0), halfadder-{F}(V1), logic_and-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_in1-{F}(V3,V4), zero-{F}(V4), halfadder-{F}(V5), P_and2-{F}(V5,V2), P_not1-{F}(V5,V6), not_ok-{F}(V6), halfadder-{F}(V7), P_not1-{F}(V7,V6), P_and1-{F}(V7,V1), fulladder-{F}(V8), P_in1-{F}(V8,V0), P_h2-{F}(V8,V1), P_outs-{F}(V8,V9), one-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V1), P_h1-{F}(V10,V11), P_and2-{F}(V11,V2), P_not1-{F}(V11,V12), P_in1-{F}(V10,V13), P_in2-{F}(V10,V14), P_inc-{F}(V10,V15), P_outs-{F}(V10,V16), P_outc-{F}(V10,V17), P_or1-{F}(V10,V18), abnormal-{F}(V18) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8171: mergings( V10 == V16, V2 == V18, V3 == V19, V4 == V20, V8 == V24, V6 == V22, V7 == V23, V9 == V12, V5 == V21; #8161 ), references = 1, size of lhs = 25:
% 282.36/282.56 halfadder-{F}(V0), one-{F}(V1), halfadder-{F}(V2), P_and1-{F}(V0,V2), logic_and-{F}(V3), P_and2-{F}(V0,V3), halfadder-{F}(V4), P_and2-{F}(V4,V3), P_in1-{F}(V4,V5), zero-{F}(V5), fulladder-{F}(V6), P_in1-{F}(V6,V1), P_h2-{F}(V6,V2), P_outs-{F}(V6,V7), one-{F}(V7), P_f-{F}(V8), P_h2-{F}(V8,V2), P_h1-{F}(V8,V0), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14), abnormal-{F}(V14) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8183: mergings( V10 == V14, V2 == V16, V3 == V17, V4 == V18, V8 == V22, V6 == V20, V7 == V21, V9 == V12, V5 == V19; #8173 ), references = 1, size of lhs = 21:
% 282.36/282.56 halfadder-{F}(V0), one-{F}(V1), halfadder-{F}(V2), P_and1-{F}(V0,V2), P_in1-{F}(V0,V3), zero-{F}(V3), fulladder-{F}(V4), P_in1-{F}(V4,V1), P_h2-{F}(V4,V2), P_outs-{F}(V4,V5), one-{F}(V5), P_f-{F}(V6), P_h2-{F}(V6,V2), P_h1-{F}(V6,V0), P_in1-{F}(V6,V7), P_in2-{F}(V6,V8), P_inc-{F}(V6,V9), P_outs-{F}(V6,V10), P_outc-{F}(V6,V11), P_or1-{F}(V6,V12), abnormal-{F}(V12) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8271: exists( #64, #8267 ), references = 1, size of lhs = 11:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), fulladder-{F}(V3), P_outs-{F}(V3,V4), one-{F}(V4), P_h2-{F}(V3,V5), halfadder-{F}(V5), P_and1-{F}(V5,V2) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8321: exists( #65, #8316 ), references = 2, size of lhs = 25:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_outs-{F}(V3,V4), one-{F}(V4), halfadder-{F}(V5), fulladder-{F}(V6), P_h2-{F}(V6,V5), P_h1-{F}(V6,V7), P_outs-{F}(V7,V1), P_outs-{F}(V6,V8), one-{F}(V8), P_in1-{F}(V5,V9), one-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V5), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), abnormal-{F}(V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8322: exists( #65, #8317 ), references = 6, size of lhs = 25:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_outs-{F}(V3,V4), one-{F}(V4), one-{F}(V5), halfadder-{F}(V6), fulladder-{F}(V7), P_in1-{F}(V7,V5), P_h2-{F}(V7,V6), P_h1-{F}(V7,V8), P_outs-{F}(V8,V1), P_outs-{F}(V7,V9), one-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V6), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), abnormal-{F}(V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8333: mergings( V2 == V9, V3 == V11, V0 == V8; #8329 ), references = 1, size of lhs = 22:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), one-{F}(V3), halfadder-{F}(V4), P_and1-{F}(V4,V2), fulladder-{F}(V5), P_in1-{F}(V5,V3), P_h2-{F}(V5,V4), P_h1-{F}(V5,V6), P_outs-{F}(V6,V1), P_outs-{F}(V5,V7), one-{F}(V7), P_f-{F}(V8), P_h2-{F}(V8,V4), P_in1-{F}(V8,V9), P_in2-{F}(V8,V10), P_inc-{F}(V8,V11), P_outs-{F}(V8,V12), P_outc-{F}(V8,V13), P_or1-{F}(V8,V14), abnormal-{F}(V14) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8390: exists( #65, #8384 ), references = 2, size of lhs = 26:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), P_in1-{F}(V4,V5), one-{F}(V5), one-{F}(V6), halfadder-{F}(V7), fulladder-{F}(V8), P_in1-{F}(V8,V6), P_h2-{F}(V8,V7), P_h1-{F}(V8,V9), P_outs-{F}(V9,V1), P_outs-{F}(V8,V10), one-{F}(V10), P_f-{F}(V11), P_h2-{F}(V11,V7), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), abnormal-{F}(V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8391: exists( #65, #8385 ), references = 2, size of lhs = 32:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), P_in1-{F}(V4,V5), one-{F}(V5), halfadder-{F}(V6), P_outs-{F}(V6,V7), P_and1-{F}(V6,V8), halfadder-{F}(V9), P_and1-{F}(V9,V8), P_outs-{F}(V9,V1), one-{F}(V10), halfadder-{F}(V11), fulladder-{F}(V12), P_in1-{F}(V12,V10), P_h2-{F}(V12,V11), P_h1-{F}(V12,V13), P_outs-{F}(V13,V7), P_outs-{F}(V12,V14), one-{F}(V14), P_f-{F}(V15), P_h2-{F}(V15,V11), P_in1-{F}(V15,V16), P_in2-{F}(V15,V17), P_inc-{F}(V15,V18), P_outs-{F}(V15,V19), P_outc-{F}(V15,V20), P_or1-{F}(V15,V21), abnormal-{F}(V21) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8392: exists( #65, #8386 ), references = 2, size of lhs = 26:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V2), P_not1-{F}(V3,V4), P_in1-{F}(V4,V5), one-{F}(V5), halfadder-{F}(V6), fulladder-{F}(V7), P_h2-{F}(V7,V6), P_h1-{F}(V7,V8), P_outs-{F}(V8,V1), P_outs-{F}(V7,V9), one-{F}(V9), P_in1-{F}(V6,V10), one-{F}(V10), P_f-{F}(V11), P_h2-{F}(V11,V6), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), abnormal-{F}(V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8429: exists( #65, #8423 ), references = 3, size of lhs = 24:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), or_ok-{F}(V2), P_in1-{F}(V2,V3), one-{F}(V3), halfadder-{F}(V4), fulladder-{F}(V5), P_h2-{F}(V5,V4), P_h1-{F}(V5,V6), P_outs-{F}(V6,V1), P_outs-{F}(V5,V7), one-{F}(V7), P_in1-{F}(V4,V8), one-{F}(V8), P_f-{F}(V9), P_h2-{F}(V9,V4), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), abnormal-{F}(V15) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8430: exists( #65, #8424 ), references = 3, size of lhs = 24:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), or_ok-{F}(V2), P_in1-{F}(V2,V3), one-{F}(V3), one-{F}(V4), halfadder-{F}(V5), fulladder-{F}(V6), P_in1-{F}(V6,V4), P_h2-{F}(V6,V5), P_h1-{F}(V6,V7), P_outs-{F}(V7,V1), P_outs-{F}(V6,V8), one-{F}(V8), P_f-{F}(V9), P_h2-{F}(V9,V5), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), abnormal-{F}(V15) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8431: exists( #65, #8425 ), references = 3, size of lhs = 30:
% 282.36/282.56 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), or_ok-{F}(V2), P_in1-{F}(V2,V3), one-{F}(V3), halfadder-{F}(V4), P_outs-{F}(V4,V5), P_and1-{F}(V4,V6), halfadder-{F}(V7), P_and1-{F}(V7,V6), P_outs-{F}(V7,V1), halfadder-{F}(V8), fulladder-{F}(V9), P_h2-{F}(V9,V8), P_h1-{F}(V9,V10), P_outs-{F}(V10,V5), P_outs-{F}(V9,V11), one-{F}(V11), P_in1-{F}(V8,V12), one-{F}(V12), P_f-{F}(V13), P_h2-{F}(V13,V8), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15), P_inc-{F}(V13,V16), P_outs-{F}(V13,V17), P_outc-{F}(V13,V18), P_or1-{F}(V13,V19), abnormal-{F}(V19) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8447: exists( #64, #8441 ), references = 1, size of lhs = 26:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), or_ok-{F}(V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_outs-{F}(V3,V4), halfadder-{F}(V5), fulladder-{F}(V6), P_h2-{F}(V6,V5), P_h1-{F}(V6,V7), P_outs-{F}(V7,V4), P_outs-{F}(V6,V8), one-{F}(V8), P_in1-{F}(V5,V9), one-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V5), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), abnormal-{F}(V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8448: exists( #64, #8442 ), references = 1, size of lhs = 26:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), or_ok-{F}(V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_outs-{F}(V3,V4), one-{F}(V5), halfadder-{F}(V6), fulladder-{F}(V7), P_in1-{F}(V7,V5), P_h2-{F}(V7,V6), P_h1-{F}(V7,V8), P_outs-{F}(V8,V4), P_outs-{F}(V7,V9), one-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V6), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), abnormal-{F}(V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8449: exists( #64, #8443 ), references = 1, size of lhs = 32:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), or_ok-{F}(V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_outs-{F}(V3,V4), halfadder-{F}(V5), P_outs-{F}(V5,V6), P_and1-{F}(V5,V7), halfadder-{F}(V8), P_and1-{F}(V8,V7), P_outs-{F}(V8,V4), halfadder-{F}(V9), fulladder-{F}(V10), P_h2-{F}(V10,V9), P_h1-{F}(V10,V11), P_outs-{F}(V11,V6), P_outs-{F}(V10,V12), one-{F}(V12), P_in1-{F}(V9,V13), one-{F}(V13), P_f-{F}(V14), P_h2-{F}(V14,V9), P_in1-{F}(V14,V15), P_in2-{F}(V14,V16), P_inc-{F}(V14,V17), P_outs-{F}(V14,V18), P_outc-{F}(V14,V19), P_or1-{F}(V14,V20), abnormal-{F}(V20) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8513: exists( #65, #8507 ), references = 3, size of lhs = 25:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), fulladder-{F}(V6), P_h2-{F}(V6,V5), P_outs-{F}(V6,V7), one-{F}(V7), P_in1-{F}(V5,V8), one-{F}(V8), P_in2-{F}(V5,V9), connection-{F}(V9,V3), P_f-{F}(V10), P_h2-{F}(V10,V5), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), abnormal-{F}(V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8514: exists( #65, #8508 ), references = 2, size of lhs = 29:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), logic_and-{F}(V5), fulladder-{F}(V6), P_outs-{F}(V6,V7), one-{F}(V7), P_h2-{F}(V6,V8), halfadder-{F}(V8), P_and1-{F}(V8,V5), halfadder-{F}(V9), P_and1-{F}(V9,V5), P_in1-{F}(V9,V10), one-{F}(V10), P_in2-{F}(V9,V11), connection-{F}(V11,V3), P_f-{F}(V12), P_h2-{F}(V12,V9), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), abnormal-{F}(V18) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8515: exists( #65, #8509 ), references = 2, size of lhs = 30:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), logic_and-{F}(V5), fulladder-{F}(V6), P_outs-{F}(V6,V7), one-{F}(V7), P_h2-{F}(V6,V8), halfadder-{F}(V8), P_and1-{F}(V8,V5), halfadder-{F}(V9), P_and1-{F}(V9,V5), P_and2-{F}(V9,V10), P_in1-{F}(V9,V11), one-{F}(V11), P_in2-{F}(V9,V12), connection-{F}(V12,V3), P_f-{F}(V13), P_h2-{F}(V13,V9), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15), P_inc-{F}(V13,V16), P_outs-{F}(V13,V17), P_outc-{F}(V13,V18), P_or1-{F}(V13,V19), abnormal-{F}(V19) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8537: exists( #64, #8531 ), references = 1, size of lhs = 27:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in2-{F}(V4,V5), halfadder-{F}(V6), fulladder-{F}(V7), P_h2-{F}(V7,V6), P_outs-{F}(V7,V8), one-{F}(V8), P_in1-{F}(V6,V9), one-{F}(V9), P_in2-{F}(V6,V10), connection-{F}(V10,V5), P_f-{F}(V11), P_h2-{F}(V11,V6), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), abnormal-{F}(V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8538: exists( #64, #8532 ), references = 1, size of lhs = 31:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in2-{F}(V4,V5), logic_and-{F}(V6), fulladder-{F}(V7), P_outs-{F}(V7,V8), one-{F}(V8), P_h2-{F}(V7,V9), halfadder-{F}(V9), P_and1-{F}(V9,V6), halfadder-{F}(V10), P_and1-{F}(V10,V6), P_in1-{F}(V10,V11), one-{F}(V11), P_in2-{F}(V10,V12), connection-{F}(V12,V5), P_f-{F}(V13), P_h2-{F}(V13,V10), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15), P_inc-{F}(V13,V16), P_outs-{F}(V13,V17), P_outc-{F}(V13,V18), P_or1-{F}(V13,V19), abnormal-{F}(V19) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8539: exists( #64, #8533 ), references = 1, size of lhs = 32:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in2-{F}(V4,V5), logic_and-{F}(V6), fulladder-{F}(V7), P_outs-{F}(V7,V8), one-{F}(V8), P_h2-{F}(V7,V9), halfadder-{F}(V9), P_and1-{F}(V9,V6), halfadder-{F}(V10), P_and1-{F}(V10,V6), P_and2-{F}(V10,V11), P_in1-{F}(V10,V12), one-{F}(V12), P_in2-{F}(V10,V13), connection-{F}(V13,V5), P_f-{F}(V14), P_h2-{F}(V14,V10), P_in1-{F}(V14,V15), P_in2-{F}(V14,V16), P_inc-{F}(V14,V17), P_outs-{F}(V14,V18), P_outc-{F}(V14,V19), P_or1-{F}(V14,V20), abnormal-{F}(V20) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8546: exists( #66, #8540 ), references = 1, size of lhs = 28:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), P_and2-{F}(V0,V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), zero-{F}(V4), P_or1-{F}(V3,V5), not_ok-{F}(V5), halfadder-{F}(V6), P_not1-{F}(V6,V5), P_and1-{F}(V6,V2), halfadder-{F}(V7), P_in2-{F}(V7,V1), fulladder-{F}(V8), P_h2-{F}(V8,V7), P_outs-{F}(V8,V9), one-{F}(V9), P_in1-{F}(V7,V10), one-{F}(V10), P_f-{F}(V11), P_h2-{F}(V11,V7), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), abnormal-{F}(V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8547: exists( #66, #8541 ), references = 1, size of lhs = 32:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), P_and2-{F}(V0,V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), zero-{F}(V4), P_or1-{F}(V3,V5), not_ok-{F}(V5), halfadder-{F}(V6), P_not1-{F}(V6,V5), P_and1-{F}(V6,V2), logic_and-{F}(V7), fulladder-{F}(V8), P_outs-{F}(V8,V9), one-{F}(V9), P_h2-{F}(V8,V10), halfadder-{F}(V10), P_and1-{F}(V10,V7), halfadder-{F}(V11), P_and1-{F}(V11,V7), P_in2-{F}(V11,V1), P_in1-{F}(V11,V12), one-{F}(V12), P_f-{F}(V13), P_h2-{F}(V13,V11), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15), P_inc-{F}(V13,V16), P_outs-{F}(V13,V17), P_outc-{F}(V13,V18), P_or1-{F}(V13,V19), abnormal-{F}(V19) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8548: exists( #66, #8542 ), references = 1, size of lhs = 33:
% 282.36/282.56 halfadder-{F}(V0), P_in2-{F}(V0,V1), P_and2-{F}(V0,V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), zero-{F}(V4), P_or1-{F}(V3,V5), not_ok-{F}(V5), halfadder-{F}(V6), P_not1-{F}(V6,V5), P_and1-{F}(V6,V2), logic_and-{F}(V7), fulladder-{F}(V8), P_outs-{F}(V8,V9), one-{F}(V9), P_h2-{F}(V8,V10), halfadder-{F}(V10), P_and1-{F}(V10,V7), halfadder-{F}(V11), P_and1-{F}(V11,V7), P_in2-{F}(V11,V1), P_and2-{F}(V11,V12), P_in1-{F}(V11,V13), one-{F}(V13), P_f-{F}(V14), P_h2-{F}(V14,V11), P_in1-{F}(V14,V15), P_in2-{F}(V14,V16), P_inc-{F}(V14,V17), P_outs-{F}(V14,V18), P_outc-{F}(V14,V19), P_or1-{F}(V14,V20), abnormal-{F}(V20) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8589: exists( #64, #8583 ), references = 1, size of lhs = 26:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_or1-{F}(V0,V2), or_ok-{F}(V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_outs-{F}(V3,V4), halfadder-{F}(V5), fulladder-{F}(V6), P_h2-{F}(V6,V5), P_h1-{F}(V6,V7), P_outs-{F}(V7,V4), P_outs-{F}(V6,V8), one-{F}(V8), P_in1-{F}(V5,V9), one-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V5), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), abnormal-{F}(V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8590: exists( #64, #8584 ), references = 1, size of lhs = 26:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_or1-{F}(V0,V2), or_ok-{F}(V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_outs-{F}(V3,V4), one-{F}(V5), halfadder-{F}(V6), fulladder-{F}(V7), P_in1-{F}(V7,V5), P_h2-{F}(V7,V6), P_h1-{F}(V7,V8), P_outs-{F}(V8,V4), P_outs-{F}(V7,V9), one-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V6), P_in1-{F}(V10,V11), P_in2-{F}(V10,V12), P_inc-{F}(V10,V13), P_outs-{F}(V10,V14), P_outc-{F}(V10,V15), P_or1-{F}(V10,V16), abnormal-{F}(V16) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8591: exists( #64, #8585 ), references = 1, size of lhs = 32:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_or1-{F}(V0,V2), or_ok-{F}(V2), halfadder-{F}(V3), P_and1-{F}(V3,V2), P_outs-{F}(V3,V4), halfadder-{F}(V5), P_outs-{F}(V5,V6), P_and1-{F}(V5,V7), halfadder-{F}(V8), P_and1-{F}(V8,V7), P_outs-{F}(V8,V4), halfadder-{F}(V9), fulladder-{F}(V10), P_h2-{F}(V10,V9), P_h1-{F}(V10,V11), P_outs-{F}(V11,V6), P_outs-{F}(V10,V12), one-{F}(V12), P_in1-{F}(V9,V13), one-{F}(V13), P_f-{F}(V14), P_h2-{F}(V14,V9), P_in1-{F}(V14,V15), P_in2-{F}(V14,V16), P_inc-{F}(V14,V17), P_outs-{F}(V14,V18), P_outc-{F}(V14,V19), P_or1-{F}(V14,V20), abnormal-{F}(V20) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8657: exists( #65, #8651 ), references = 3, size of lhs = 26:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), one-{F}(V5), halfadder-{F}(V6), fulladder-{F}(V7), P_in1-{F}(V7,V5), P_h2-{F}(V7,V6), P_h1-{F}(V7,V8), P_outs-{F}(V8,V9), connection-{F}(V9,V3), P_outs-{F}(V7,V10), one-{F}(V10), P_f-{F}(V11), P_h2-{F}(V11,V6), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), abnormal-{F}(V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8658: exists( #65, #8652 ), references = 3, size of lhs = 32:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_outs-{F}(V5,V6), P_and1-{F}(V5,V7), halfadder-{F}(V8), P_and1-{F}(V8,V7), P_outs-{F}(V8,V9), connection-{F}(V9,V3), one-{F}(V10), halfadder-{F}(V11), fulladder-{F}(V12), P_in1-{F}(V12,V10), P_h2-{F}(V12,V11), P_h1-{F}(V12,V13), P_outs-{F}(V13,V6), P_outs-{F}(V12,V14), one-{F}(V14), P_f-{F}(V15), P_h2-{F}(V15,V11), P_in1-{F}(V15,V16), P_in2-{F}(V15,V17), P_inc-{F}(V15,V18), P_outs-{F}(V15,V19), P_outc-{F}(V15,V20), P_or1-{F}(V15,V21), abnormal-{F}(V21) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8659: exists( #65, #8653 ), references = 2, size of lhs = 26:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), fulladder-{F}(V6), P_h2-{F}(V6,V5), P_h1-{F}(V6,V7), P_outs-{F}(V7,V8), connection-{F}(V8,V3), P_outs-{F}(V6,V9), one-{F}(V9), P_in1-{F}(V5,V10), one-{F}(V10), P_f-{F}(V11), P_h2-{F}(V11,V5), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), abnormal-{F}(V17) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8672: exists( #64, #8666 ), references = 1, size of lhs = 28:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in2-{F}(V4,V5), one-{F}(V6), halfadder-{F}(V7), fulladder-{F}(V8), P_in1-{F}(V8,V6), P_h2-{F}(V8,V7), P_h1-{F}(V8,V9), P_outs-{F}(V9,V10), connection-{F}(V10,V5), P_outs-{F}(V8,V11), one-{F}(V11), P_f-{F}(V12), P_h2-{F}(V12,V7), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), abnormal-{F}(V18) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8673: exists( #64, #8667 ), references = 1, size of lhs = 34:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in2-{F}(V4,V5), halfadder-{F}(V6), P_outs-{F}(V6,V7), P_and1-{F}(V6,V8), halfadder-{F}(V9), P_and1-{F}(V9,V8), P_outs-{F}(V9,V10), connection-{F}(V10,V5), one-{F}(V11), halfadder-{F}(V12), fulladder-{F}(V13), P_in1-{F}(V13,V11), P_h2-{F}(V13,V12), P_h1-{F}(V13,V14), P_outs-{F}(V14,V7), P_outs-{F}(V13,V15), one-{F}(V15), P_f-{F}(V16), P_h2-{F}(V16,V12), P_in1-{F}(V16,V17), P_in2-{F}(V16,V18), P_inc-{F}(V16,V19), P_outs-{F}(V16,V20), P_outc-{F}(V16,V21), P_or1-{F}(V16,V22), abnormal-{F}(V22) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8674: exists( #64, #8668 ), references = 1, size of lhs = 28:
% 282.36/282.56 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in2-{F}(V4,V5), halfadder-{F}(V6), fulladder-{F}(V7), P_h2-{F}(V7,V6), P_h1-{F}(V7,V8), P_outs-{F}(V8,V9), connection-{F}(V9,V5), P_outs-{F}(V7,V10), one-{F}(V10), P_in1-{F}(V6,V11), one-{F}(V11), P_f-{F}(V12), P_h2-{F}(V12,V6), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), abnormal-{F}(V18) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8726: exists( #65, #8720 ), references = 3, size of lhs = 31:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), and_ok-{F}(V5), P_in2-{F}(V5,V3), P_in1-{F}(V5,V6), one-{F}(V6), P_out1-{F}(V5,V7), one-{F}(V8), halfadder-{F}(V9), fulladder-{F}(V10), P_in1-{F}(V10,V8), P_h2-{F}(V10,V9), P_h1-{F}(V10,V11), P_outs-{F}(V11,V12), connection-{F}(V12,V7), P_outs-{F}(V10,V13), one-{F}(V13), P_f-{F}(V14), P_h2-{F}(V14,V9), P_in1-{F}(V14,V15), P_in2-{F}(V14,V16), P_inc-{F}(V14,V17), P_outs-{F}(V14,V18), P_outc-{F}(V14,V19), P_or1-{F}(V14,V20), abnormal-{F}(V20) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.56
% 282.36/282.56 #8727: exists( #65, #8721 ), references = 3, size of lhs = 37:
% 282.36/282.56 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), and_ok-{F}(V5), P_in2-{F}(V5,V3), P_in1-{F}(V5,V6), one-{F}(V6), P_out1-{F}(V5,V7), halfadder-{F}(V8), P_outs-{F}(V8,V9), P_and1-{F}(V8,V10), halfadder-{F}(V11), P_and1-{F}(V11,V10), P_outs-{F}(V11,V12), connection-{F}(V12,V7), one-{F}(V13), halfadder-{F}(V14), fulladder-{F}(V15), P_in1-{F}(V15,V13), P_h2-{F}(V15,V14), P_h1-{F}(V15,V16), P_outs-{F}(V16,V9), P_outs-{F}(V15,V17), one-{F}(V17), P_f-{F}(V18), P_h2-{F}(V18,V14), P_in1-{F}(V18,V19), P_in2-{F}(V18,V20), P_inc-{F}(V18,V21), P_outs-{F}(V18,V22), P_outc-{F}(V18,V23), P_or1-{F}(V18,V24), abnormal-{F}(V24) | FALSE
% 282.36/282.56 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8728: exists( #65, #8722 ), references = 2, size of lhs = 31:
% 282.36/282.57 halfadder-{F}(V0), P_not1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in2-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), and_ok-{F}(V5), P_in2-{F}(V5,V3), P_in1-{F}(V5,V6), one-{F}(V6), P_out1-{F}(V5,V7), halfadder-{F}(V8), fulladder-{F}(V9), P_h2-{F}(V9,V8), P_h1-{F}(V9,V10), P_outs-{F}(V10,V11), connection-{F}(V11,V7), P_outs-{F}(V9,V12), one-{F}(V12), P_in1-{F}(V8,V13), one-{F}(V13), P_f-{F}(V14), P_h2-{F}(V14,V8), P_in1-{F}(V14,V15), P_in2-{F}(V14,V16), P_inc-{F}(V14,V17), P_outs-{F}(V14,V18), P_outc-{F}(V14,V19), P_or1-{F}(V14,V20), abnormal-{F}(V20) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8737: exists( #64, #8733 ), references = 1, size of lhs = 33:
% 282.36/282.57 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in2-{F}(V4,V5), and_ok-{F}(V6), P_in2-{F}(V6,V5), P_in1-{F}(V6,V7), one-{F}(V7), P_out1-{F}(V6,V8), one-{F}(V9), halfadder-{F}(V10), fulladder-{F}(V11), P_in1-{F}(V11,V9), P_h2-{F}(V11,V10), P_h1-{F}(V11,V12), P_outs-{F}(V12,V13), connection-{F}(V13,V8), P_outs-{F}(V11,V14), one-{F}(V14), P_f-{F}(V15), P_h2-{F}(V15,V10), P_in1-{F}(V15,V16), P_in2-{F}(V15,V17), P_inc-{F}(V15,V18), P_outs-{F}(V15,V19), P_outc-{F}(V15,V20), P_or1-{F}(V15,V21), abnormal-{F}(V21) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8738: exists( #64, #8734 ), references = 1, size of lhs = 39:
% 282.36/282.57 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in2-{F}(V4,V5), and_ok-{F}(V6), P_in2-{F}(V6,V5), P_in1-{F}(V6,V7), one-{F}(V7), P_out1-{F}(V6,V8), halfadder-{F}(V9), P_outs-{F}(V9,V10), P_and1-{F}(V9,V11), halfadder-{F}(V12), P_and1-{F}(V12,V11), P_outs-{F}(V12,V13), connection-{F}(V13,V8), one-{F}(V14), halfadder-{F}(V15), fulladder-{F}(V16), P_in1-{F}(V16,V14), P_h2-{F}(V16,V15), P_h1-{F}(V16,V17), P_outs-{F}(V17,V10), P_outs-{F}(V16,V18), one-{F}(V18), P_f-{F}(V19), P_h2-{F}(V19,V15), P_in1-{F}(V19,V20), P_in2-{F}(V19,V21), P_inc-{F}(V19,V22), P_outs-{F}(V19,V23), P_outc-{F}(V19,V24), P_or1-{F}(V19,V25), abnormal-{F}(V25) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8741: exists( #66, #8735 ), references = 2, size of lhs = 31:
% 282.36/282.57 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), and_ok-{F}(V4), P_in1-{F}(V4,V5), one-{F}(V5), P_out1-{F}(V4,V6), one-{F}(V7), halfadder-{F}(V8), fulladder-{F}(V9), P_in1-{F}(V9,V7), P_h2-{F}(V9,V8), P_h1-{F}(V9,V10), P_outs-{F}(V10,V11), connection-{F}(V11,V6), P_outs-{F}(V9,V12), one-{F}(V12), P_f-{F}(V13), P_h2-{F}(V13,V8), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15), P_inc-{F}(V13,V16), P_outs-{F}(V13,V17), P_outc-{F}(V13,V18), P_or1-{F}(V13,V19), abnormal-{F}(V19) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8742: exists( #66, #8736 ), references = 1, size of lhs = 37:
% 282.36/282.57 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and1-{F}(V3,V4), and_ok-{F}(V4), P_in1-{F}(V4,V5), one-{F}(V5), P_out1-{F}(V4,V6), halfadder-{F}(V7), P_outs-{F}(V7,V8), P_and1-{F}(V7,V9), halfadder-{F}(V10), P_and1-{F}(V10,V9), P_outs-{F}(V10,V11), connection-{F}(V11,V6), one-{F}(V12), halfadder-{F}(V13), fulladder-{F}(V14), P_in1-{F}(V14,V12), P_h2-{F}(V14,V13), P_h1-{F}(V14,V15), P_outs-{F}(V15,V8), P_outs-{F}(V14,V16), one-{F}(V16), P_f-{F}(V17), P_h2-{F}(V17,V13), P_in1-{F}(V17,V18), P_in2-{F}(V17,V19), P_inc-{F}(V17,V20), P_outs-{F}(V17,V21), P_outc-{F}(V17,V22), P_or1-{F}(V17,V23), abnormal-{F}(V23) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8747: exists( #65, #8743 ), references = 2, size of lhs = 32:
% 282.36/282.57 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), zero-{F}(V4), P_or1-{F}(V3,V5), not_ok-{F}(V5), halfadder-{F}(V6), P_not1-{F}(V6,V5), P_and1-{F}(V6,V2), P_in1-{F}(V2,V7), one-{F}(V7), one-{F}(V8), halfadder-{F}(V9), fulladder-{F}(V10), P_in1-{F}(V10,V8), P_h2-{F}(V10,V9), P_h1-{F}(V10,V11), P_outs-{F}(V11,V1), P_outs-{F}(V10,V12), one-{F}(V12), P_f-{F}(V13), P_h2-{F}(V13,V9), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15), P_inc-{F}(V13,V16), P_outs-{F}(V13,V17), P_outc-{F}(V13,V18), P_or1-{F}(V13,V19), abnormal-{F}(V19) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8748: exists( #65, #8744 ), references = 2, size of lhs = 38:
% 282.36/282.57 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_in1-{F}(V3,V4), zero-{F}(V4), P_or1-{F}(V3,V5), not_ok-{F}(V5), halfadder-{F}(V6), P_not1-{F}(V6,V5), P_and1-{F}(V6,V2), P_in1-{F}(V2,V7), one-{F}(V7), halfadder-{F}(V8), P_outs-{F}(V8,V9), P_and1-{F}(V8,V10), halfadder-{F}(V11), P_and1-{F}(V11,V10), P_outs-{F}(V11,V1), one-{F}(V12), halfadder-{F}(V13), fulladder-{F}(V14), P_in1-{F}(V14,V12), P_h2-{F}(V14,V13), P_h1-{F}(V14,V15), P_outs-{F}(V15,V9), P_outs-{F}(V14,V16), one-{F}(V16), P_f-{F}(V17), P_h2-{F}(V17,V13), P_in1-{F}(V17,V18), P_in2-{F}(V17,V19), P_inc-{F}(V17,V20), P_outs-{F}(V17,V21), P_outc-{F}(V17,V22), P_or1-{F}(V17,V23), abnormal-{F}(V23) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8779: exists( #65, #8773 ), references = 2, size of lhs = 38:
% 282.36/282.57 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_outs-{F}(V5,V6), P_and1-{F}(V5,V7), and_ok-{F}(V7), P_in1-{F}(V7,V3), halfadder-{F}(V8), P_in1-{F}(V8,V9), zero-{F}(V9), P_or1-{F}(V8,V10), not_ok-{F}(V10), halfadder-{F}(V11), P_not1-{F}(V11,V10), P_and1-{F}(V11,V7), one-{F}(V12), halfadder-{F}(V13), fulladder-{F}(V14), P_in1-{F}(V14,V12), P_h2-{F}(V14,V13), P_h1-{F}(V14,V15), P_outs-{F}(V15,V6), P_outs-{F}(V14,V16), one-{F}(V16), P_f-{F}(V17), P_h2-{F}(V17,V13), P_in1-{F}(V17,V18), P_in2-{F}(V17,V19), P_inc-{F}(V17,V20), P_outs-{F}(V17,V21), P_outc-{F}(V17,V22), P_or1-{F}(V17,V23), abnormal-{F}(V23) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8780: exists( #65, #8774 ), references = 2, size of lhs = 44:
% 282.36/282.57 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_outs-{F}(V5,V6), P_and1-{F}(V5,V7), and_ok-{F}(V7), P_in1-{F}(V7,V3), halfadder-{F}(V8), P_in1-{F}(V8,V9), zero-{F}(V9), P_or1-{F}(V8,V10), not_ok-{F}(V10), halfadder-{F}(V11), P_not1-{F}(V11,V10), P_and1-{F}(V11,V7), halfadder-{F}(V12), P_outs-{F}(V12,V13), P_and1-{F}(V12,V14), halfadder-{F}(V15), P_and1-{F}(V15,V14), P_outs-{F}(V15,V6), one-{F}(V16), halfadder-{F}(V17), fulladder-{F}(V18), P_in1-{F}(V18,V16), P_h2-{F}(V18,V17), P_h1-{F}(V18,V19), P_outs-{F}(V19,V13), P_outs-{F}(V18,V20), one-{F}(V20), P_f-{F}(V21), P_h2-{F}(V21,V17), P_in1-{F}(V21,V22), P_in2-{F}(V21,V23), P_inc-{F}(V21,V24), P_outs-{F}(V21,V25), P_outc-{F}(V21,V26), P_or1-{F}(V21,V27), abnormal-{F}(V27) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8781: exists( #65, #8775 ), references = 1, size of lhs = 37:
% 282.36/282.57 halfadder-{F}(V0), P_or1-{F}(V0,V1), not_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), P_in1-{F}(V1,V4), zero-{F}(V4), halfadder-{F}(V5), P_in1-{F}(V5,V6), zero-{F}(V6), P_or1-{F}(V5,V7), not_ok-{F}(V7), halfadder-{F}(V8), P_not1-{F}(V8,V7), P_and1-{F}(V8,V9), and_ok-{F}(V9), P_in1-{F}(V9,V3), P_out1-{F}(V9,V10), one-{F}(V11), halfadder-{F}(V12), fulladder-{F}(V13), P_in1-{F}(V13,V11), P_h2-{F}(V13,V12), P_h1-{F}(V13,V14), P_outs-{F}(V14,V15), connection-{F}(V15,V10), P_outs-{F}(V13,V16), one-{F}(V16), P_f-{F}(V17), P_h2-{F}(V17,V12), P_in1-{F}(V17,V18), P_in2-{F}(V17,V19), P_inc-{F}(V17,V20), P_outs-{F}(V17,V21), P_outc-{F}(V17,V22), P_or1-{F}(V17,V23), abnormal-{F}(V23) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8790: exists( #64, #8786 ), references = 1, size of lhs = 40:
% 282.36/282.57 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in1-{F}(V4,V5), halfadder-{F}(V6), P_outs-{F}(V6,V7), P_and1-{F}(V6,V8), and_ok-{F}(V8), P_in1-{F}(V8,V5), halfadder-{F}(V9), P_in1-{F}(V9,V10), zero-{F}(V10), P_or1-{F}(V9,V11), not_ok-{F}(V11), halfadder-{F}(V12), P_not1-{F}(V12,V11), P_and1-{F}(V12,V8), one-{F}(V13), halfadder-{F}(V14), fulladder-{F}(V15), P_in1-{F}(V15,V13), P_h2-{F}(V15,V14), P_h1-{F}(V15,V16), P_outs-{F}(V16,V7), P_outs-{F}(V15,V17), one-{F}(V17), P_f-{F}(V18), P_h2-{F}(V18,V14), P_in1-{F}(V18,V19), P_in2-{F}(V18,V20), P_inc-{F}(V18,V21), P_outs-{F}(V18,V22), P_outc-{F}(V18,V23), P_or1-{F}(V18,V24), abnormal-{F}(V24) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8791: exists( #64, #8787 ), references = 1, size of lhs = 46:
% 282.36/282.57 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), P_in1-{F}(V4,V5), halfadder-{F}(V6), P_outs-{F}(V6,V7), P_and1-{F}(V6,V8), and_ok-{F}(V8), P_in1-{F}(V8,V5), halfadder-{F}(V9), P_in1-{F}(V9,V10), zero-{F}(V10), P_or1-{F}(V9,V11), not_ok-{F}(V11), halfadder-{F}(V12), P_not1-{F}(V12,V11), P_and1-{F}(V12,V8), halfadder-{F}(V13), P_outs-{F}(V13,V14), P_and1-{F}(V13,V15), halfadder-{F}(V16), P_and1-{F}(V16,V15), P_outs-{F}(V16,V7), one-{F}(V17), halfadder-{F}(V18), fulladder-{F}(V19), P_in1-{F}(V19,V17), P_h2-{F}(V19,V18), P_h1-{F}(V19,V20), P_outs-{F}(V20,V14), P_outs-{F}(V19,V21), one-{F}(V21), P_f-{F}(V22), P_h2-{F}(V22,V18), P_in1-{F}(V22,V23), P_in2-{F}(V22,V24), P_inc-{F}(V22,V25), P_outs-{F}(V22,V26), P_outc-{F}(V22,V27), P_or1-{F}(V22,V28), abnormal-{F}(V28) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8794: exists( #64, #8788 ), references = 1, size of lhs = 38:
% 282.36/282.57 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), and_ok-{F}(V4), halfadder-{F}(V5), P_and1-{F}(V5,V4), P_outs-{F}(V5,V6), halfadder-{F}(V7), P_in1-{F}(V7,V8), zero-{F}(V8), P_or1-{F}(V7,V9), not_ok-{F}(V9), halfadder-{F}(V10), P_not1-{F}(V10,V9), P_and1-{F}(V10,V4), one-{F}(V11), halfadder-{F}(V12), fulladder-{F}(V13), P_in1-{F}(V13,V11), P_h2-{F}(V13,V12), P_h1-{F}(V13,V14), P_outs-{F}(V14,V6), P_outs-{F}(V13,V15), one-{F}(V15), P_f-{F}(V16), P_h2-{F}(V16,V12), P_in1-{F}(V16,V17), P_in2-{F}(V16,V18), P_inc-{F}(V16,V19), P_outs-{F}(V16,V20), P_outc-{F}(V16,V21), P_or1-{F}(V16,V22), abnormal-{F}(V22) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8795: exists( #64, #8789 ), references = 1, size of lhs = 44:
% 282.36/282.57 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), not_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_and1-{F}(V3,V4), and_ok-{F}(V4), halfadder-{F}(V5), P_and1-{F}(V5,V4), P_outs-{F}(V5,V6), halfadder-{F}(V7), P_in1-{F}(V7,V8), zero-{F}(V8), P_or1-{F}(V7,V9), not_ok-{F}(V9), halfadder-{F}(V10), P_not1-{F}(V10,V9), P_and1-{F}(V10,V4), halfadder-{F}(V11), P_outs-{F}(V11,V12), P_and1-{F}(V11,V13), halfadder-{F}(V14), P_and1-{F}(V14,V13), P_outs-{F}(V14,V6), one-{F}(V15), halfadder-{F}(V16), fulladder-{F}(V17), P_in1-{F}(V17,V15), P_h2-{F}(V17,V16), P_h1-{F}(V17,V18), P_outs-{F}(V18,V12), P_outs-{F}(V17,V19), one-{F}(V19), P_f-{F}(V20), P_h2-{F}(V20,V16), P_in1-{F}(V20,V21), P_in2-{F}(V20,V22), P_inc-{F}(V20,V23), P_outs-{F}(V20,V24), P_outc-{F}(V20,V25), P_or1-{F}(V20,V26), abnormal-{F}(V26) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8808: mergings( V3 == V31, V4 == V32, V5 == V33, V9 == V37, V7 == V35, V8 == V36, V0 == V27, V6 == V34; #8798 ), references = 1, size of lhs = 45:
% 282.36/282.57 logic_and-{F}(V0), halfadder-{F}(V1), P_in1-{F}(V1,V2), zero-{F}(V2), P_or1-{F}(V1,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_or1-{F}(V4,V3), P_and1-{F}(V4,V0), halfadder-{F}(V5), P_and1-{F}(V5,V0), P_outs-{F}(V5,V6), halfadder-{F}(V7), P_in1-{F}(V7,V8), zero-{F}(V8), P_or1-{F}(V7,V9), not_ok-{F}(V9), halfadder-{F}(V10), P_not1-{F}(V10,V9), P_and1-{F}(V10,V0), one-{F}(V11), halfadder-{F}(V12), P_and2-{F}(V12,V13), P_and1-{F}(V12,V14), fulladder-{F}(V15), P_in1-{F}(V15,V11), P_h2-{F}(V15,V12), P_h1-{F}(V15,V16), P_outs-{F}(V16,V6), P_outs-{F}(V15,V17), one-{F}(V17), P_f-{F}(V18), P_h2-{F}(V18,V12), P_h1-{F}(V18,V19), P_and1-{F}(V19,V0), P_or1-{F}(V19,V20), P_not1-{F}(V19,V21), P_and2-{F}(V19,V22), P_in1-{F}(V18,V23), P_in2-{F}(V18,V24), P_inc-{F}(V18,V25), P_outs-{F}(V18,V26), P_outc-{F}(V18,V27), P_or1-{F}(V18,V28), abnormal-{F}(V28) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8817: mergings( V3 == V35, V4 == V36, V5 == V37, V9 == V41, V7 == V39, V8 == V40, V0 == V31, V6 == V38; #8799 ), references = 1, size of lhs = 51:
% 282.36/282.57 logic_and-{F}(V0), halfadder-{F}(V1), P_in1-{F}(V1,V2), zero-{F}(V2), P_or1-{F}(V1,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_or1-{F}(V4,V3), P_and1-{F}(V4,V0), halfadder-{F}(V5), P_and1-{F}(V5,V0), P_outs-{F}(V5,V6), halfadder-{F}(V7), P_in1-{F}(V7,V8), zero-{F}(V8), P_or1-{F}(V7,V9), not_ok-{F}(V9), halfadder-{F}(V10), P_not1-{F}(V10,V9), P_and1-{F}(V10,V0), halfadder-{F}(V11), P_outs-{F}(V11,V12), P_and1-{F}(V11,V13), halfadder-{F}(V14), P_and1-{F}(V14,V13), P_outs-{F}(V14,V6), one-{F}(V15), halfadder-{F}(V16), P_and2-{F}(V16,V17), P_and1-{F}(V16,V18), fulladder-{F}(V19), P_in1-{F}(V19,V15), P_h2-{F}(V19,V16), P_h1-{F}(V19,V20), P_outs-{F}(V20,V12), P_outs-{F}(V19,V21), one-{F}(V21), P_f-{F}(V22), P_h2-{F}(V22,V16), P_h1-{F}(V22,V23), P_and1-{F}(V23,V0), P_or1-{F}(V23,V24), P_not1-{F}(V23,V25), P_and2-{F}(V23,V26), P_in1-{F}(V22,V27), P_in2-{F}(V22,V28), P_inc-{F}(V22,V29), P_outs-{F}(V22,V30), P_outc-{F}(V22,V31), P_or1-{F}(V22,V32), abnormal-{F}(V32) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8828: mergings( V3 == V30, V4 == V31, V5 == V32, V9 == V36, V7 == V34, V8 == V35, V0 == V26, V6 == V33; #8818 ), references = 1, size of lhs = 44:
% 282.36/282.57 logic_and-{F}(V0), halfadder-{F}(V1), P_in1-{F}(V1,V2), zero-{F}(V2), P_or1-{F}(V1,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_or1-{F}(V4,V3), P_and1-{F}(V4,V0), halfadder-{F}(V5), P_and1-{F}(V5,V0), P_outs-{F}(V5,V6), halfadder-{F}(V7), P_in1-{F}(V7,V8), zero-{F}(V8), P_or1-{F}(V7,V9), not_ok-{F}(V9), halfadder-{F}(V10), P_not1-{F}(V10,V9), P_and1-{F}(V10,V0), one-{F}(V11), halfadder-{F}(V12), P_and1-{F}(V12,V13), fulladder-{F}(V14), P_in1-{F}(V14,V11), P_h2-{F}(V14,V12), P_h1-{F}(V14,V15), P_outs-{F}(V15,V6), P_outs-{F}(V14,V16), one-{F}(V16), P_f-{F}(V17), P_h2-{F}(V17,V12), P_h1-{F}(V17,V18), P_and1-{F}(V18,V0), P_or1-{F}(V18,V19), P_not1-{F}(V18,V20), P_and2-{F}(V18,V21), P_in1-{F}(V17,V22), P_in2-{F}(V17,V23), P_inc-{F}(V17,V24), P_outs-{F}(V17,V25), P_outc-{F}(V17,V26), P_or1-{F}(V17,V27), abnormal-{F}(V27) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8837: mergings( V3 == V34, V4 == V35, V5 == V36, V9 == V40, V7 == V38, V8 == V39, V0 == V30, V6 == V37; #8819 ), references = 1, size of lhs = 50:
% 282.36/282.57 logic_and-{F}(V0), halfadder-{F}(V1), P_in1-{F}(V1,V2), zero-{F}(V2), P_or1-{F}(V1,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_or1-{F}(V4,V3), P_and1-{F}(V4,V0), halfadder-{F}(V5), P_and1-{F}(V5,V0), P_outs-{F}(V5,V6), halfadder-{F}(V7), P_in1-{F}(V7,V8), zero-{F}(V8), P_or1-{F}(V7,V9), not_ok-{F}(V9), halfadder-{F}(V10), P_not1-{F}(V10,V9), P_and1-{F}(V10,V0), halfadder-{F}(V11), P_outs-{F}(V11,V12), P_and1-{F}(V11,V13), halfadder-{F}(V14), P_and1-{F}(V14,V13), P_outs-{F}(V14,V6), one-{F}(V15), halfadder-{F}(V16), P_and1-{F}(V16,V17), fulladder-{F}(V18), P_in1-{F}(V18,V15), P_h2-{F}(V18,V16), P_h1-{F}(V18,V19), P_outs-{F}(V19,V12), P_outs-{F}(V18,V20), one-{F}(V20), P_f-{F}(V21), P_h2-{F}(V21,V16), P_h1-{F}(V21,V22), P_and1-{F}(V22,V0), P_or1-{F}(V22,V23), P_not1-{F}(V22,V24), P_and2-{F}(V22,V25), P_in1-{F}(V21,V26), P_in2-{F}(V21,V27), P_inc-{F}(V21,V28), P_outs-{F}(V21,V29), P_outc-{F}(V21,V30), P_or1-{F}(V21,V31), abnormal-{F}(V31) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8848: mergings( V3 == V29, V4 == V30, V5 == V31, V9 == V35, V7 == V33, V8 == V34, V0 == V25, V6 == V32; #8838 ), references = 1, size of lhs = 43:
% 282.36/282.57 logic_and-{F}(V0), halfadder-{F}(V1), P_in1-{F}(V1,V2), zero-{F}(V2), P_or1-{F}(V1,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_or1-{F}(V4,V3), P_and1-{F}(V4,V0), halfadder-{F}(V5), P_and1-{F}(V5,V0), P_outs-{F}(V5,V6), halfadder-{F}(V7), P_in1-{F}(V7,V8), zero-{F}(V8), P_or1-{F}(V7,V9), not_ok-{F}(V9), halfadder-{F}(V10), P_not1-{F}(V10,V9), P_and1-{F}(V10,V0), one-{F}(V11), halfadder-{F}(V12), fulladder-{F}(V13), P_in1-{F}(V13,V11), P_h2-{F}(V13,V12), P_h1-{F}(V13,V14), P_outs-{F}(V14,V6), P_outs-{F}(V13,V15), one-{F}(V15), P_f-{F}(V16), P_h2-{F}(V16,V12), P_h1-{F}(V16,V17), P_and1-{F}(V17,V0), P_or1-{F}(V17,V18), P_not1-{F}(V17,V19), P_and2-{F}(V17,V20), P_in1-{F}(V16,V21), P_in2-{F}(V16,V22), P_inc-{F}(V16,V23), P_outs-{F}(V16,V24), P_outc-{F}(V16,V25), P_or1-{F}(V16,V26), abnormal-{F}(V26) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8857: mergings( V3 == V33, V4 == V34, V5 == V35, V9 == V39, V7 == V37, V8 == V38, V0 == V29, V6 == V36; #8839 ), references = 1, size of lhs = 49:
% 282.36/282.57 logic_and-{F}(V0), halfadder-{F}(V1), P_in1-{F}(V1,V2), zero-{F}(V2), P_or1-{F}(V1,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_or1-{F}(V4,V3), P_and1-{F}(V4,V0), halfadder-{F}(V5), P_and1-{F}(V5,V0), P_outs-{F}(V5,V6), halfadder-{F}(V7), P_in1-{F}(V7,V8), zero-{F}(V8), P_or1-{F}(V7,V9), not_ok-{F}(V9), halfadder-{F}(V10), P_not1-{F}(V10,V9), P_and1-{F}(V10,V0), halfadder-{F}(V11), P_outs-{F}(V11,V12), P_and1-{F}(V11,V13), halfadder-{F}(V14), P_and1-{F}(V14,V13), P_outs-{F}(V14,V6), one-{F}(V15), halfadder-{F}(V16), fulladder-{F}(V17), P_in1-{F}(V17,V15), P_h2-{F}(V17,V16), P_h1-{F}(V17,V18), P_outs-{F}(V18,V12), P_outs-{F}(V17,V19), one-{F}(V19), P_f-{F}(V20), P_h2-{F}(V20,V16), P_h1-{F}(V20,V21), P_and1-{F}(V21,V0), P_or1-{F}(V21,V22), P_not1-{F}(V21,V23), P_and2-{F}(V21,V24), P_in1-{F}(V20,V25), P_in2-{F}(V20,V26), P_inc-{F}(V20,V27), P_outs-{F}(V20,V28), P_outc-{F}(V20,V29), P_or1-{F}(V20,V30), abnormal-{F}(V30) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8868: mergings( V3 == V27, V4 == V28, V5 == V29, V9 == V33, V7 == V31, V8 == V32, V10 == V24, V6 == V30; #8858 ), references = 1, size of lhs = 41:
% 282.36/282.57 logic_and-{F}(V0), halfadder-{F}(V1), P_in1-{F}(V1,V2), zero-{F}(V2), P_or1-{F}(V1,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_or1-{F}(V4,V3), P_and1-{F}(V4,V0), halfadder-{F}(V5), P_and1-{F}(V5,V0), halfadder-{F}(V6), P_in1-{F}(V6,V7), zero-{F}(V7), P_or1-{F}(V6,V8), not_ok-{F}(V8), halfadder-{F}(V9), P_not1-{F}(V9,V8), P_and1-{F}(V9,V0), one-{F}(V10), halfadder-{F}(V11), fulladder-{F}(V12), P_in1-{F}(V12,V10), P_h2-{F}(V12,V11), P_h1-{F}(V12,V5), P_outs-{F}(V12,V13), one-{F}(V13), P_f-{F}(V14), P_h2-{F}(V14,V11), P_h1-{F}(V14,V15), P_and1-{F}(V15,V0), P_or1-{F}(V15,V16), P_not1-{F}(V15,V17), P_and2-{F}(V15,V18), P_in1-{F}(V14,V19), P_in2-{F}(V14,V20), P_inc-{F}(V14,V21), P_outs-{F}(V14,V22), P_outc-{F}(V14,V23), P_or1-{F}(V14,V24), abnormal-{F}(V24) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8878: mergings( V2 == V23, V3 == V28, V4 == V29, V5 == V30, V9 == V34, V7 == V32, V8 == V33, V10 == V25, V6 == V31; #8859 ), references = 1, size of lhs = 41:
% 282.36/282.57 logic_and-{F}(V0), halfadder-{F}(V1), P_in1-{F}(V1,V2), zero-{F}(V2), P_or1-{F}(V1,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_or1-{F}(V4,V3), P_and1-{F}(V4,V0), halfadder-{F}(V5), P_in1-{F}(V5,V6), zero-{F}(V6), P_or1-{F}(V5,V7), not_ok-{F}(V7), halfadder-{F}(V8), P_not1-{F}(V8,V7), P_and1-{F}(V8,V0), halfadder-{F}(V9), P_and1-{F}(V9,V0), one-{F}(V10), halfadder-{F}(V11), fulladder-{F}(V12), P_in1-{F}(V12,V10), P_h2-{F}(V12,V11), P_h1-{F}(V12,V9), P_outs-{F}(V12,V13), one-{F}(V13), P_f-{F}(V14), P_h2-{F}(V14,V11), P_h1-{F}(V14,V15), P_and1-{F}(V15,V0), P_or1-{F}(V15,V16), P_not1-{F}(V15,V17), P_and2-{F}(V15,V18), P_in1-{F}(V14,V19), P_in2-{F}(V14,V20), P_inc-{F}(V14,V21), P_outs-{F}(V14,V22), P_outc-{F}(V14,V23), P_or1-{F}(V14,V24), abnormal-{F}(V24) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8929: exists( #64, #8923 ), references = 1, size of lhs = 28:
% 282.36/282.57 halfadder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), halfadder-{F}(V3), P_outs-{F}(V3,V4), P_and1-{F}(V3,V5), halfadder-{F}(V6), P_and2-{F}(V6,V5), P_not1-{F}(V6,V2), one-{F}(V7), halfadder-{F}(V8), fulladder-{F}(V9), P_in1-{F}(V9,V7), P_h2-{F}(V9,V8), P_h1-{F}(V9,V10), P_outs-{F}(V10,V4), P_outs-{F}(V9,V11), one-{F}(V11), P_f-{F}(V12), P_h2-{F}(V12,V8), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), abnormal-{F}(V18) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8930: exists( #64, #8924 ), references = 1, size of lhs = 28:
% 282.36/282.57 halfadder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), halfadder-{F}(V3), P_outs-{F}(V3,V4), P_and1-{F}(V3,V5), halfadder-{F}(V6), P_and2-{F}(V6,V5), P_not1-{F}(V6,V2), halfadder-{F}(V7), fulladder-{F}(V8), P_h2-{F}(V8,V7), P_h1-{F}(V8,V9), P_outs-{F}(V9,V4), P_outs-{F}(V8,V10), one-{F}(V10), P_in1-{F}(V7,V11), one-{F}(V11), P_f-{F}(V12), P_h2-{F}(V12,V7), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), abnormal-{F}(V18) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8931: exists( #64, #8925 ), references = 1, size of lhs = 34:
% 282.36/282.57 halfadder-{F}(V0), P_in1-{F}(V0,V1), one-{F}(V1), P_and2-{F}(V0,V2), halfadder-{F}(V3), P_outs-{F}(V3,V4), P_and1-{F}(V3,V5), halfadder-{F}(V6), P_and2-{F}(V6,V5), P_not1-{F}(V6,V2), halfadder-{F}(V7), P_outs-{F}(V7,V8), P_and1-{F}(V7,V9), halfadder-{F}(V10), P_and1-{F}(V10,V9), P_outs-{F}(V10,V4), one-{F}(V11), halfadder-{F}(V12), fulladder-{F}(V13), P_in1-{F}(V13,V11), P_h2-{F}(V13,V12), P_h1-{F}(V13,V14), P_outs-{F}(V14,V8), P_outs-{F}(V13,V15), one-{F}(V15), P_f-{F}(V16), P_h2-{F}(V16,V12), P_in1-{F}(V16,V17), P_in2-{F}(V16,V18), P_inc-{F}(V16,V19), P_outs-{F}(V16,V20), P_outc-{F}(V16,V21), P_or1-{F}(V16,V22), abnormal-{F}(V22) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8965: exists( #64, #8959 ), references = 1, size of lhs = 29:
% 282.36/282.57 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), one-{F}(V7), halfadder-{F}(V8), fulladder-{F}(V9), P_in1-{F}(V9,V7), P_h2-{F}(V9,V8), P_h1-{F}(V9,V10), P_outs-{F}(V10,V11), connection-{F}(V11,V6), P_outs-{F}(V9,V12), one-{F}(V12), P_f-{F}(V13), P_h2-{F}(V13,V8), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15), P_inc-{F}(V13,V16), P_outs-{F}(V13,V17), P_outc-{F}(V13,V18), P_or1-{F}(V13,V19), abnormal-{F}(V19) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8966: exists( #64, #8960 ), references = 1, size of lhs = 35:
% 282.36/282.57 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), halfadder-{F}(V7), P_outs-{F}(V7,V8), P_and1-{F}(V7,V9), halfadder-{F}(V10), P_and1-{F}(V10,V9), P_outs-{F}(V10,V11), connection-{F}(V11,V6), one-{F}(V12), halfadder-{F}(V13), fulladder-{F}(V14), P_in1-{F}(V14,V12), P_h2-{F}(V14,V13), P_h1-{F}(V14,V15), P_outs-{F}(V15,V8), P_outs-{F}(V14,V16), one-{F}(V16), P_f-{F}(V17), P_h2-{F}(V17,V13), P_in1-{F}(V17,V18), P_in2-{F}(V17,V19), P_inc-{F}(V17,V20), P_outs-{F}(V17,V21), P_outc-{F}(V17,V22), P_or1-{F}(V17,V23), abnormal-{F}(V23) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8967: exists( #64, #8961 ), references = 1, size of lhs = 28:
% 282.36/282.57 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), halfadder-{F}(V7), fulladder-{F}(V8), P_h2-{F}(V8,V7), P_outs-{F}(V8,V9), one-{F}(V9), P_in1-{F}(V7,V10), one-{F}(V10), P_in2-{F}(V7,V11), connection-{F}(V11,V6), P_f-{F}(V12), P_h2-{F}(V12,V7), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), abnormal-{F}(V18) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8974: exists( #66, #8968 ), references = 2, size of lhs = 30:
% 282.36/282.57 halfadder-{F}(V0), P_in2-{F}(V0,V1), P_and2-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V4), P_out1-{F}(V4,V5), zero-{F}(V5), P_not1-{F}(V3,V6), not_ok-{F}(V6), halfadder-{F}(V7), P_not1-{F}(V7,V6), P_and1-{F}(V7,V2), one-{F}(V8), halfadder-{F}(V9), fulladder-{F}(V10), P_in1-{F}(V10,V8), P_h2-{F}(V10,V9), P_h1-{F}(V10,V11), P_outs-{F}(V11,V1), P_outs-{F}(V10,V12), one-{F}(V12), P_f-{F}(V13), P_h2-{F}(V13,V9), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15), P_inc-{F}(V13,V16), P_outs-{F}(V13,V17), P_outc-{F}(V13,V18), P_or1-{F}(V13,V19), abnormal-{F}(V19) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8975: exists( #66, #8969 ), references = 2, size of lhs = 36:
% 282.36/282.57 halfadder-{F}(V0), P_in2-{F}(V0,V1), P_and2-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V4), P_out1-{F}(V4,V5), zero-{F}(V5), P_not1-{F}(V3,V6), not_ok-{F}(V6), halfadder-{F}(V7), P_not1-{F}(V7,V6), P_and1-{F}(V7,V2), halfadder-{F}(V8), P_outs-{F}(V8,V9), P_and1-{F}(V8,V10), halfadder-{F}(V11), P_and1-{F}(V11,V10), P_outs-{F}(V11,V1), one-{F}(V12), halfadder-{F}(V13), fulladder-{F}(V14), P_in1-{F}(V14,V12), P_h2-{F}(V14,V13), P_h1-{F}(V14,V15), P_outs-{F}(V15,V9), P_outs-{F}(V14,V16), one-{F}(V16), P_f-{F}(V17), P_h2-{F}(V17,V13), P_in1-{F}(V17,V18), P_in2-{F}(V17,V19), P_inc-{F}(V17,V20), P_outs-{F}(V17,V21), P_outc-{F}(V17,V22), P_or1-{F}(V17,V23), abnormal-{F}(V23) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8976: exists( #66, #8970 ), references = 2, size of lhs = 29:
% 282.36/282.57 halfadder-{F}(V0), P_in2-{F}(V0,V1), P_and2-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V4), P_out1-{F}(V4,V5), zero-{F}(V5), P_not1-{F}(V3,V6), not_ok-{F}(V6), halfadder-{F}(V7), P_not1-{F}(V7,V6), P_and1-{F}(V7,V2), halfadder-{F}(V8), P_in2-{F}(V8,V1), fulladder-{F}(V9), P_h2-{F}(V9,V8), P_outs-{F}(V9,V10), one-{F}(V10), P_in1-{F}(V8,V11), one-{F}(V11), P_f-{F}(V12), P_h2-{F}(V12,V8), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), abnormal-{F}(V18) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8986: exists( #65, #8980 ), references = 2, size of lhs = 31:
% 282.36/282.57 and_ok-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), halfadder-{F}(V2), P_in2-{F}(V2,V3), P_and2-{F}(V2,V4), halfadder-{F}(V5), P_and2-{F}(V5,V0), P_not1-{F}(V5,V6), not_ok-{F}(V6), halfadder-{F}(V7), P_not1-{F}(V7,V6), P_and1-{F}(V7,V4), one-{F}(V8), halfadder-{F}(V9), fulladder-{F}(V10), P_in1-{F}(V10,V8), P_h2-{F}(V10,V9), P_h1-{F}(V10,V11), P_outs-{F}(V11,V3), P_outs-{F}(V10,V12), one-{F}(V12), P_f-{F}(V13), P_h2-{F}(V13,V9), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15), P_inc-{F}(V13,V16), P_outs-{F}(V13,V17), P_outc-{F}(V13,V18), P_or1-{F}(V13,V19), abnormal-{F}(V19) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8987: exists( #65, #8981 ), references = 2, size of lhs = 37:
% 282.36/282.57 and_ok-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), halfadder-{F}(V2), P_in2-{F}(V2,V3), P_and2-{F}(V2,V4), halfadder-{F}(V5), P_and2-{F}(V5,V0), P_not1-{F}(V5,V6), not_ok-{F}(V6), halfadder-{F}(V7), P_not1-{F}(V7,V6), P_and1-{F}(V7,V4), halfadder-{F}(V8), P_outs-{F}(V8,V9), P_and1-{F}(V8,V10), halfadder-{F}(V11), P_and1-{F}(V11,V10), P_outs-{F}(V11,V3), one-{F}(V12), halfadder-{F}(V13), fulladder-{F}(V14), P_in1-{F}(V14,V12), P_h2-{F}(V14,V13), P_h1-{F}(V14,V15), P_outs-{F}(V15,V9), P_outs-{F}(V14,V16), one-{F}(V16), P_f-{F}(V17), P_h2-{F}(V17,V13), P_in1-{F}(V17,V18), P_in2-{F}(V17,V19), P_inc-{F}(V17,V20), P_outs-{F}(V17,V21), P_outc-{F}(V17,V22), P_or1-{F}(V17,V23), abnormal-{F}(V23) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #8988: exists( #65, #8982 ), references = 2, size of lhs = 30:
% 282.36/282.57 and_ok-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), halfadder-{F}(V2), P_in2-{F}(V2,V3), P_and2-{F}(V2,V4), halfadder-{F}(V5), P_and2-{F}(V5,V0), P_not1-{F}(V5,V6), not_ok-{F}(V6), halfadder-{F}(V7), P_not1-{F}(V7,V6), P_and1-{F}(V7,V4), halfadder-{F}(V8), P_in2-{F}(V8,V3), fulladder-{F}(V9), P_h2-{F}(V9,V8), P_outs-{F}(V9,V10), one-{F}(V10), P_in1-{F}(V8,V11), one-{F}(V11), P_f-{F}(V12), P_h2-{F}(V12,V8), P_in1-{F}(V12,V13), P_in2-{F}(V12,V14), P_inc-{F}(V12,V15), P_outs-{F}(V12,V16), P_outc-{F}(V12,V17), P_or1-{F}(V12,V18), abnormal-{F}(V18) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9016: exists( #64, #9010 ), references = 1, size of lhs = 33:
% 282.36/282.57 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_in2-{F}(V3,V4), P_and2-{F}(V3,V5), halfadder-{F}(V6), P_and2-{F}(V6,V2), P_not1-{F}(V6,V7), not_ok-{F}(V7), halfadder-{F}(V8), P_not1-{F}(V8,V7), P_and1-{F}(V8,V5), one-{F}(V9), halfadder-{F}(V10), fulladder-{F}(V11), P_in1-{F}(V11,V9), P_h2-{F}(V11,V10), P_h1-{F}(V11,V12), P_outs-{F}(V12,V4), P_outs-{F}(V11,V13), one-{F}(V13), P_f-{F}(V14), P_h2-{F}(V14,V10), P_in1-{F}(V14,V15), P_in2-{F}(V14,V16), P_inc-{F}(V14,V17), P_outs-{F}(V14,V18), P_outc-{F}(V14,V19), P_or1-{F}(V14,V20), abnormal-{F}(V20) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9017: exists( #64, #9011 ), references = 1, size of lhs = 39:
% 282.36/282.57 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_in2-{F}(V3,V4), P_and2-{F}(V3,V5), halfadder-{F}(V6), P_and2-{F}(V6,V2), P_not1-{F}(V6,V7), not_ok-{F}(V7), halfadder-{F}(V8), P_not1-{F}(V8,V7), P_and1-{F}(V8,V5), halfadder-{F}(V9), P_outs-{F}(V9,V10), P_and1-{F}(V9,V11), halfadder-{F}(V12), P_and1-{F}(V12,V11), P_outs-{F}(V12,V4), one-{F}(V13), halfadder-{F}(V14), fulladder-{F}(V15), P_in1-{F}(V15,V13), P_h2-{F}(V15,V14), P_h1-{F}(V15,V16), P_outs-{F}(V16,V10), P_outs-{F}(V15,V17), one-{F}(V17), P_f-{F}(V18), P_h2-{F}(V18,V14), P_in1-{F}(V18,V19), P_in2-{F}(V18,V20), P_inc-{F}(V18,V21), P_outs-{F}(V18,V22), P_outc-{F}(V18,V23), P_or1-{F}(V18,V24), abnormal-{F}(V24) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9018: exists( #64, #9012 ), references = 1, size of lhs = 32:
% 282.36/282.57 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_in2-{F}(V3,V4), P_and2-{F}(V3,V5), halfadder-{F}(V6), P_and2-{F}(V6,V2), P_not1-{F}(V6,V7), not_ok-{F}(V7), halfadder-{F}(V8), P_not1-{F}(V8,V7), P_and1-{F}(V8,V5), halfadder-{F}(V9), P_in2-{F}(V9,V4), fulladder-{F}(V10), P_h2-{F}(V10,V9), P_outs-{F}(V10,V11), one-{F}(V11), P_in1-{F}(V9,V12), one-{F}(V12), P_f-{F}(V13), P_h2-{F}(V13,V9), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15), P_inc-{F}(V13,V16), P_outs-{F}(V13,V17), P_outc-{F}(V13,V18), P_or1-{F}(V13,V19), abnormal-{F}(V19) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9033: mergings( V3 == V28, V4 == V29, V5 == V30, V9 == V34, V7 == V32, V8 == V33, V0 == V24, V6 == V31; #9022 ), references = 1, size of lhs = 39:
% 282.36/282.57 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_in2-{F}(V3,V4), P_and2-{F}(V3,V5), halfadder-{F}(V6), P_and2-{F}(V6,V0), P_not1-{F}(V6,V7), not_ok-{F}(V7), halfadder-{F}(V8), P_not1-{F}(V8,V7), P_and1-{F}(V8,V5), one-{F}(V9), halfadder-{F}(V10), P_and2-{F}(V10,V11), P_and1-{F}(V10,V12), fulladder-{F}(V13), P_in1-{F}(V13,V9), P_h2-{F}(V13,V10), P_h1-{F}(V13,V14), P_outs-{F}(V14,V4), P_outs-{F}(V13,V15), one-{F}(V15), P_f-{F}(V16), P_h2-{F}(V16,V10), P_h1-{F}(V16,V17), P_and2-{F}(V17,V0), P_or1-{F}(V17,V18), P_not1-{F}(V17,V19), P_in1-{F}(V16,V20), P_in2-{F}(V16,V21), P_inc-{F}(V16,V22), P_outs-{F}(V16,V23), P_outc-{F}(V16,V24), P_or1-{F}(V16,V25), abnormal-{F}(V25) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9042: mergings( V3 == V32, V4 == V33, V5 == V34, V9 == V38, V7 == V36, V8 == V37, V0 == V28, V6 == V35; #9023 ), references = 1, size of lhs = 45:
% 282.36/282.57 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_in2-{F}(V3,V4), P_and2-{F}(V3,V5), halfadder-{F}(V6), P_and2-{F}(V6,V0), P_not1-{F}(V6,V7), not_ok-{F}(V7), halfadder-{F}(V8), P_not1-{F}(V8,V7), P_and1-{F}(V8,V5), halfadder-{F}(V9), P_outs-{F}(V9,V10), P_and1-{F}(V9,V11), halfadder-{F}(V12), P_and1-{F}(V12,V11), P_outs-{F}(V12,V4), one-{F}(V13), halfadder-{F}(V14), P_and2-{F}(V14,V15), P_and1-{F}(V14,V16), fulladder-{F}(V17), P_in1-{F}(V17,V13), P_h2-{F}(V17,V14), P_h1-{F}(V17,V18), P_outs-{F}(V18,V10), P_outs-{F}(V17,V19), one-{F}(V19), P_f-{F}(V20), P_h2-{F}(V20,V14), P_h1-{F}(V20,V21), P_and2-{F}(V21,V0), P_or1-{F}(V21,V22), P_not1-{F}(V21,V23), P_in1-{F}(V20,V24), P_in2-{F}(V20,V25), P_inc-{F}(V20,V26), P_outs-{F}(V20,V27), P_outc-{F}(V20,V28), P_or1-{F}(V20,V29), abnormal-{F}(V29) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9051: mergings( V3 == V27, V4 == V28, V5 == V29, V9 == V33, V7 == V31, V8 == V32, V0 == V23, V6 == V30; #9024 ), references = 1, size of lhs = 38:
% 282.36/282.57 logic_and-{F}(V0), halfadder-{F}(V1), P_and2-{F}(V1,V0), P_in1-{F}(V1,V2), zero-{F}(V2), halfadder-{F}(V3), P_in2-{F}(V3,V4), P_and2-{F}(V3,V5), halfadder-{F}(V6), P_and2-{F}(V6,V0), P_not1-{F}(V6,V7), not_ok-{F}(V7), halfadder-{F}(V8), P_not1-{F}(V8,V7), P_and1-{F}(V8,V5), halfadder-{F}(V9), P_in2-{F}(V9,V4), P_and2-{F}(V9,V10), P_and1-{F}(V9,V11), fulladder-{F}(V12), P_h2-{F}(V12,V9), P_outs-{F}(V12,V13), one-{F}(V13), P_in1-{F}(V9,V14), one-{F}(V14), P_f-{F}(V15), P_h2-{F}(V15,V9), P_h1-{F}(V15,V16), P_and2-{F}(V16,V0), P_or1-{F}(V16,V17), P_not1-{F}(V16,V18), P_in1-{F}(V15,V19), P_in2-{F}(V15,V20), P_inc-{F}(V15,V21), P_outs-{F}(V15,V22), P_outc-{F}(V15,V23), P_or1-{F}(V15,V24), abnormal-{F}(V24) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9102: exists( #64, #9096 ), references = 1, size of lhs = 11:
% 282.36/282.57 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), and_ok-{F}(V2), fulladder-{F}(V3), P_outs-{F}(V3,V4), one-{F}(V4), P_h2-{F}(V3,V5), halfadder-{F}(V5), P_and1-{F}(V5,V2) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9103: exists( #64, #9097 ), references = 1, size of lhs = 20:
% 282.36/282.57 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), and_ok-{F}(V2), logic_or-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_in2-{F}(V3,V4), one-{F}(V4), P_f-{F}(V5), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), P_h2-{F}(V5,V12), P_h1-{F}(V5,V13), P_or1-{F}(V13,V2) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9104: exists( #64, #9098 ), references = 1, size of lhs = 21:
% 282.36/282.57 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), and_ok-{F}(V2), logic_or-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V2), P_in2-{F}(V3,V4), one-{F}(V4), P_f-{F}(V5), P_in1-{F}(V5,V6), P_in2-{F}(V5,V7), P_inc-{F}(V5,V8), P_outs-{F}(V5,V9), P_outc-{F}(V5,V10), P_or1-{F}(V5,V11), P_h2-{F}(V5,V12), P_and1-{F}(V12,V13), P_h1-{F}(V5,V14), P_or1-{F}(V14,V2) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9111: exists( #69, #9105 ), references = 1, size of lhs = 22:
% 282.36/282.57 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), abnormal-{F}(V7), P_h2-{F}(V1,V8), P_and1-{F}(V8,V0), P_and2-{F}(V8,V9), halfadder-{F}(V10), P_or1-{F}(V10,V0), P_in1-{F}(V10,V11), zero-{F}(V11), fulladder-{F}(V12), P_outs-{F}(V12,V13), one-{F}(V13), P_h2-{F}(V12,V14), halfadder-{F}(V14), P_and1-{F}(V14,V0) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9120: mergings( V3 == V15, V4 == V16, V5 == V17, V9 == V21, V7 == V19, V8 == V20, V0 == V22, V6 == V18; #9109 ), references = 1, size of lhs = 23:
% 282.36/282.57 logic_and-{F}(V0), logic_or-{F}(V0), abnormal-{F}(V1), halfadder-{F}(V2), P_or1-{F}(V2,V0), P_in1-{F}(V2,V3), zero-{F}(V3), halfadder-{F}(V4), P_or1-{F}(V4,V0), P_in2-{F}(V4,V5), one-{F}(V5), P_f-{F}(V6), P_or1-{F}(V6,V1), P_in1-{F}(V6,V7), P_in2-{F}(V6,V8), P_inc-{F}(V6,V9), P_outs-{F}(V6,V10), P_outc-{F}(V6,V11), P_h2-{F}(V6,V12), P_and1-{F}(V12,V0), P_and2-{F}(V12,V13), P_h1-{F}(V6,V14), P_or1-{F}(V14,V0) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9130: mergings( V3 == V15, V4 == V16, V5 == V17, V9 == V21, V7 == V19, V8 == V20, V0 == V22, V2 == V23, V6 == V18; #9110 ), references = 1, size of lhs = 23:
% 282.36/282.57 logic_and-{F}(V0), logic_or-{F}(V0), abnormal-{F}(V1), halfadder-{F}(V2), P_or1-{F}(V2,V0), P_in1-{F}(V2,V3), zero-{F}(V3), halfadder-{F}(V4), P_or1-{F}(V4,V0), P_in2-{F}(V4,V5), one-{F}(V5), P_f-{F}(V6), P_or1-{F}(V6,V1), P_in1-{F}(V6,V7), P_in2-{F}(V6,V8), P_inc-{F}(V6,V9), P_outs-{F}(V6,V10), P_outc-{F}(V6,V11), P_h2-{F}(V6,V12), P_and1-{F}(V12,V0), P_and2-{F}(V12,V13), P_h1-{F}(V6,V14), P_or1-{F}(V14,V0) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9134: exists( #68, #9108 ), references = 1, size of lhs = 21:
% 282.36/282.57 logic_and-{F}(V0), P_f-{F}(V1), P_in1-{F}(V1,V2), P_in2-{F}(V1,V3), P_inc-{F}(V1,V4), P_outs-{F}(V1,V5), P_outc-{F}(V1,V6), P_or1-{F}(V1,V7), abnormal-{F}(V7), P_h2-{F}(V1,V8), P_and1-{F}(V8,V0), halfadder-{F}(V9), P_or1-{F}(V9,V0), P_in1-{F}(V9,V10), zero-{F}(V10), fulladder-{F}(V11), P_outs-{F}(V11,V12), one-{F}(V12), P_h2-{F}(V11,V13), halfadder-{F}(V13), P_and1-{F}(V13,V0) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9143: mergings( V3 == V14, V4 == V15, V5 == V16, V9 == V20, V7 == V18, V8 == V19, V0 == V21, V6 == V17; #9132 ), references = 1, size of lhs = 22:
% 282.36/282.57 logic_and-{F}(V0), logic_or-{F}(V0), abnormal-{F}(V1), halfadder-{F}(V2), P_or1-{F}(V2,V0), P_in1-{F}(V2,V3), zero-{F}(V3), halfadder-{F}(V4), P_or1-{F}(V4,V0), P_in2-{F}(V4,V5), one-{F}(V5), P_f-{F}(V6), P_or1-{F}(V6,V1), P_in1-{F}(V6,V7), P_in2-{F}(V6,V8), P_inc-{F}(V6,V9), P_outs-{F}(V6,V10), P_outc-{F}(V6,V11), P_h2-{F}(V6,V12), P_and1-{F}(V12,V0), P_h1-{F}(V6,V13), P_or1-{F}(V13,V0) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9153: mergings( V3 == V14, V4 == V15, V5 == V16, V9 == V20, V7 == V18, V8 == V19, V0 == V21, V2 == V22, V6 == V17; #9133 ), references = 1, size of lhs = 22:
% 282.36/282.57 logic_and-{F}(V0), logic_or-{F}(V0), abnormal-{F}(V1), halfadder-{F}(V2), P_or1-{F}(V2,V0), P_in1-{F}(V2,V3), zero-{F}(V3), halfadder-{F}(V4), P_or1-{F}(V4,V0), P_in2-{F}(V4,V5), one-{F}(V5), P_f-{F}(V6), P_or1-{F}(V6,V1), P_in1-{F}(V6,V7), P_in2-{F}(V6,V8), P_inc-{F}(V6,V9), P_outs-{F}(V6,V10), P_outc-{F}(V6,V11), P_h2-{F}(V6,V12), P_and1-{F}(V12,V0), P_h1-{F}(V6,V13), P_or1-{F}(V13,V0) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9229: exists( #64, #9223 ), references = 1, size of lhs = 34:
% 282.36/282.57 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), and_ok-{F}(V7), P_in2-{F}(V7,V6), P_in1-{F}(V7,V8), one-{F}(V8), P_out1-{F}(V7,V9), one-{F}(V10), halfadder-{F}(V11), fulladder-{F}(V12), P_in1-{F}(V12,V10), P_h2-{F}(V12,V11), P_h1-{F}(V12,V13), P_outs-{F}(V13,V14), connection-{F}(V14,V9), P_outs-{F}(V12,V15), one-{F}(V15), P_f-{F}(V16), P_h2-{F}(V16,V11), P_in1-{F}(V16,V17), P_in2-{F}(V16,V18), P_inc-{F}(V16,V19), P_outs-{F}(V16,V20), P_outc-{F}(V16,V21), P_or1-{F}(V16,V22), abnormal-{F}(V22) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9230: exists( #64, #9224 ), references = 1, size of lhs = 40:
% 282.36/282.57 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), and_ok-{F}(V7), P_in2-{F}(V7,V6), P_in1-{F}(V7,V8), one-{F}(V8), P_out1-{F}(V7,V9), halfadder-{F}(V10), P_outs-{F}(V10,V11), P_and1-{F}(V10,V12), halfadder-{F}(V13), P_and1-{F}(V13,V12), P_outs-{F}(V13,V14), connection-{F}(V14,V9), one-{F}(V15), halfadder-{F}(V16), fulladder-{F}(V17), P_in1-{F}(V17,V15), P_h2-{F}(V17,V16), P_h1-{F}(V17,V18), P_outs-{F}(V18,V11), P_outs-{F}(V17,V19), one-{F}(V19), P_f-{F}(V20), P_h2-{F}(V20,V16), P_in1-{F}(V20,V21), P_in2-{F}(V20,V22), P_inc-{F}(V20,V23), P_outs-{F}(V20,V24), P_outc-{F}(V20,V25), P_or1-{F}(V20,V26), abnormal-{F}(V26) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9231: exists( #64, #9225 ), references = 1, size of lhs = 34:
% 282.36/282.57 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), P_in2-{F}(V5,V6), and_ok-{F}(V7), P_in2-{F}(V7,V6), P_in1-{F}(V7,V8), one-{F}(V8), P_out1-{F}(V7,V9), halfadder-{F}(V10), fulladder-{F}(V11), P_h2-{F}(V11,V10), P_h1-{F}(V11,V12), P_outs-{F}(V12,V13), connection-{F}(V13,V9), P_outs-{F}(V11,V14), one-{F}(V14), P_in1-{F}(V10,V15), one-{F}(V15), P_f-{F}(V16), P_h2-{F}(V16,V10), P_in1-{F}(V16,V17), P_in2-{F}(V16,V18), P_inc-{F}(V16,V19), P_outs-{F}(V16,V20), P_outc-{F}(V16,V21), P_or1-{F}(V16,V22), abnormal-{F}(V22) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9235: exists( #66, #9226 ), references = 2, size of lhs = 32:
% 282.36/282.57 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), and_ok-{F}(V5), P_in1-{F}(V5,V6), one-{F}(V6), P_out1-{F}(V5,V7), one-{F}(V8), halfadder-{F}(V9), fulladder-{F}(V10), P_in1-{F}(V10,V8), P_h2-{F}(V10,V9), P_h1-{F}(V10,V11), P_outs-{F}(V11,V12), connection-{F}(V12,V7), P_outs-{F}(V10,V13), one-{F}(V13), P_f-{F}(V14), P_h2-{F}(V14,V9), P_in1-{F}(V14,V15), P_in2-{F}(V14,V16), P_inc-{F}(V14,V17), P_outs-{F}(V14,V18), P_outc-{F}(V14,V19), P_or1-{F}(V14,V20), abnormal-{F}(V20) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9236: exists( #66, #9227 ), references = 2, size of lhs = 38:
% 282.36/282.57 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), and_ok-{F}(V5), P_in1-{F}(V5,V6), one-{F}(V6), P_out1-{F}(V5,V7), halfadder-{F}(V8), P_outs-{F}(V8,V9), P_and1-{F}(V8,V10), halfadder-{F}(V11), P_and1-{F}(V11,V10), P_outs-{F}(V11,V12), connection-{F}(V12,V7), one-{F}(V13), halfadder-{F}(V14), fulladder-{F}(V15), P_in1-{F}(V15,V13), P_h2-{F}(V15,V14), P_h1-{F}(V15,V16), P_outs-{F}(V16,V9), P_outs-{F}(V15,V17), one-{F}(V17), P_f-{F}(V18), P_h2-{F}(V18,V14), P_in1-{F}(V18,V19), P_in2-{F}(V18,V20), P_inc-{F}(V18,V21), P_outs-{F}(V18,V22), P_outc-{F}(V18,V23), P_or1-{F}(V18,V24), abnormal-{F}(V24) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9237: exists( #66, #9228 ), references = 2, size of lhs = 32:
% 282.36/282.57 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), zero-{F}(V2), P_not1-{F}(V0,V3), not_ok-{F}(V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and1-{F}(V4,V5), and_ok-{F}(V5), P_in1-{F}(V5,V6), one-{F}(V6), P_out1-{F}(V5,V7), halfadder-{F}(V8), fulladder-{F}(V9), P_h2-{F}(V9,V8), P_h1-{F}(V9,V10), P_outs-{F}(V10,V11), connection-{F}(V11,V7), P_outs-{F}(V9,V12), one-{F}(V12), P_in1-{F}(V8,V13), one-{F}(V13), P_f-{F}(V14), P_h2-{F}(V14,V8), P_in1-{F}(V14,V15), P_in2-{F}(V14,V16), P_inc-{F}(V14,V17), P_outs-{F}(V14,V18), P_outc-{F}(V14,V19), P_or1-{F}(V14,V20), abnormal-{F}(V20) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9244: exists( #65, #9238 ), references = 2, size of lhs = 33:
% 282.36/282.57 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V4), P_out1-{F}(V4,V5), zero-{F}(V5), P_not1-{F}(V3,V6), not_ok-{F}(V6), halfadder-{F}(V7), P_not1-{F}(V7,V6), P_and1-{F}(V7,V2), P_in1-{F}(V2,V8), one-{F}(V8), one-{F}(V9), halfadder-{F}(V10), fulladder-{F}(V11), P_in1-{F}(V11,V9), P_h2-{F}(V11,V10), P_h1-{F}(V11,V12), P_outs-{F}(V12,V1), P_outs-{F}(V11,V13), one-{F}(V13), P_f-{F}(V14), P_h2-{F}(V14,V10), P_in1-{F}(V14,V15), P_in2-{F}(V14,V16), P_inc-{F}(V14,V17), P_outs-{F}(V14,V18), P_outc-{F}(V14,V19), P_or1-{F}(V14,V20), abnormal-{F}(V20) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9245: exists( #65, #9239 ), references = 2, size of lhs = 39:
% 282.36/282.57 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V4), P_out1-{F}(V4,V5), zero-{F}(V5), P_not1-{F}(V3,V6), not_ok-{F}(V6), halfadder-{F}(V7), P_not1-{F}(V7,V6), P_and1-{F}(V7,V2), P_in1-{F}(V2,V8), one-{F}(V8), halfadder-{F}(V9), P_outs-{F}(V9,V10), P_and1-{F}(V9,V11), halfadder-{F}(V12), P_and1-{F}(V12,V11), P_outs-{F}(V12,V1), one-{F}(V13), halfadder-{F}(V14), fulladder-{F}(V15), P_in1-{F}(V15,V13), P_h2-{F}(V15,V14), P_h1-{F}(V15,V16), P_outs-{F}(V16,V10), P_outs-{F}(V15,V17), one-{F}(V17), P_f-{F}(V18), P_h2-{F}(V18,V14), P_in1-{F}(V18,V19), P_in2-{F}(V18,V20), P_inc-{F}(V18,V21), P_outs-{F}(V18,V22), P_outc-{F}(V18,V23), P_or1-{F}(V18,V24), abnormal-{F}(V24) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9246: exists( #65, #9240 ), references = 2, size of lhs = 33:
% 282.36/282.57 halfadder-{F}(V0), P_outs-{F}(V0,V1), P_and1-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V4), P_out1-{F}(V4,V5), zero-{F}(V5), P_not1-{F}(V3,V6), not_ok-{F}(V6), halfadder-{F}(V7), P_not1-{F}(V7,V6), P_and1-{F}(V7,V2), P_in1-{F}(V2,V8), one-{F}(V8), halfadder-{F}(V9), fulladder-{F}(V10), P_h2-{F}(V10,V9), P_h1-{F}(V10,V11), P_outs-{F}(V11,V1), P_outs-{F}(V10,V12), one-{F}(V12), P_in1-{F}(V9,V13), one-{F}(V13), P_f-{F}(V14), P_h2-{F}(V14,V9), P_in1-{F}(V14,V15), P_in2-{F}(V14,V16), P_inc-{F}(V14,V17), P_outs-{F}(V14,V18), P_outc-{F}(V14,V19), P_or1-{F}(V14,V20), abnormal-{F}(V20) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9285: exists( #64, #9279 ), references = 2, size of lhs = 46:
% 282.36/282.57 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), P_not1-{F}(V0,V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and2-{F}(V4,V5), P_out1-{F}(V5,V6), zero-{F}(V6), logic_or-{F}(V7), logic_and-{F}(V8), logic_and-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V11), P_in1-{F}(V10,V12), P_in2-{F}(V10,V13), P_inc-{F}(V10,V14), P_outs-{F}(V10,V15), P_outc-{F}(V10,V16), P_or1-{F}(V10,V17), P_h1-{F}(V10,V18), P_and1-{F}(V18,V9), P_or1-{F}(V18,V7), P_and2-{F}(V18,V8), P_not1-{F}(V18,V19), halfadder-{F}(V20), P_and1-{F}(V20,V9), P_or1-{F}(V20,V7), halfadder-{F}(V21), P_or1-{F}(V21,V7), P_in2-{F}(V21,V22), one-{F}(V22), halfadder-{F}(V23), P_and1-{F}(V23,V9), P_outs-{F}(V23,V2), halfadder-{F}(V24), P_and2-{F}(V24,V8), P_in1-{F}(V24,V25), zero-{F}(V25), halfadder-{F}(V26), P_and2-{F}(V26,V8), P_not1-{F}(V26,V27), not_ok-{F}(V27), halfadder-{F}(V28), P_not1-{F}(V28,V27), P_and1-{F}(V28,V9) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9286: exists( #64, #9280 ), references = 2, size of lhs = 33:
% 282.36/282.57 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), P_not1-{F}(V0,V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and2-{F}(V4,V5), P_out1-{F}(V5,V6), zero-{F}(V6), halfadder-{F}(V7), P_or1-{F}(V7,V8), or_ok-{F}(V8), P_and1-{F}(V7,V9), and_ok-{F}(V9), halfadder-{F}(V10), P_or1-{F}(V10,V8), P_in2-{F}(V10,V11), one-{F}(V11), halfadder-{F}(V12), P_and1-{F}(V12,V9), P_outs-{F}(V12,V2), halfadder-{F}(V13), P_in1-{F}(V13,V14), zero-{F}(V14), P_and2-{F}(V13,V15), and_ok-{F}(V15), halfadder-{F}(V16), P_and2-{F}(V16,V15), P_not1-{F}(V16,V17), not_ok-{F}(V17), halfadder-{F}(V18), P_not1-{F}(V18,V17), P_and1-{F}(V18,V9) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9287: exists( #64, #9281 ), references = 1, size of lhs = 47:
% 282.36/282.57 halfadder-{F}(V0), P_and2-{F}(V0,V1), P_out1-{F}(V1,V2), P_not1-{F}(V0,V3), halfadder-{F}(V4), P_not1-{F}(V4,V3), P_and2-{F}(V4,V5), P_out1-{F}(V5,V6), zero-{F}(V6), logic_or-{F}(V7), logic_and-{F}(V8), logic_and-{F}(V9), P_f-{F}(V10), P_h2-{F}(V10,V11), P_in1-{F}(V10,V12), P_in2-{F}(V10,V13), P_inc-{F}(V10,V14), P_outs-{F}(V10,V15), P_outc-{F}(V10,V16), P_or1-{F}(V10,V17), P_and1-{F}(V11,V18), P_h1-{F}(V10,V19), P_and1-{F}(V19,V9), P_or1-{F}(V19,V7), P_and2-{F}(V19,V8), P_not1-{F}(V19,V20), halfadder-{F}(V21), P_and1-{F}(V21,V9), P_or1-{F}(V21,V7), halfadder-{F}(V22), P_or1-{F}(V22,V7), P_in2-{F}(V22,V23), one-{F}(V23), halfadder-{F}(V24), P_and1-{F}(V24,V9), P_outs-{F}(V24,V2), halfadder-{F}(V25), P_and2-{F}(V25,V8), P_in1-{F}(V25,V26), zero-{F}(V26), halfadder-{F}(V27), P_and2-{F}(V27,V8), P_not1-{F}(V27,V28), not_ok-{F}(V28), halfadder-{F}(V29), P_not1-{F}(V29,V28), P_and1-{F}(V29,V9) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9292: exists( #65, #9289 ), references = 2, size of lhs = 34:
% 282.36/282.57 and_ok-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), halfadder-{F}(V2), P_and2-{F}(V2,V3), P_out1-{F}(V3,V4), P_not1-{F}(V2,V5), halfadder-{F}(V6), P_not1-{F}(V6,V5), P_and2-{F}(V6,V0), halfadder-{F}(V7), P_or1-{F}(V7,V8), or_ok-{F}(V8), P_and1-{F}(V7,V9), and_ok-{F}(V9), halfadder-{F}(V10), P_or1-{F}(V10,V8), P_in2-{F}(V10,V11), one-{F}(V11), halfadder-{F}(V12), P_and1-{F}(V12,V9), P_outs-{F}(V12,V4), halfadder-{F}(V13), P_in1-{F}(V13,V14), zero-{F}(V14), P_and2-{F}(V13,V15), and_ok-{F}(V15), halfadder-{F}(V16), P_and2-{F}(V16,V15), P_not1-{F}(V16,V17), not_ok-{F}(V17), halfadder-{F}(V18), P_not1-{F}(V18,V17), P_and1-{F}(V18,V9) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9308: exists( #64, #9306 ), references = 1, size of lhs = 36:
% 282.36/282.57 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V4), P_out1-{F}(V4,V5), P_not1-{F}(V3,V6), halfadder-{F}(V7), P_not1-{F}(V7,V6), P_and2-{F}(V7,V2), halfadder-{F}(V8), P_or1-{F}(V8,V9), or_ok-{F}(V9), P_and1-{F}(V8,V10), and_ok-{F}(V10), halfadder-{F}(V11), P_or1-{F}(V11,V9), P_in2-{F}(V11,V12), one-{F}(V12), halfadder-{F}(V13), P_and1-{F}(V13,V10), P_outs-{F}(V13,V5), halfadder-{F}(V14), P_in1-{F}(V14,V15), zero-{F}(V15), P_and2-{F}(V14,V16), and_ok-{F}(V16), halfadder-{F}(V17), P_and2-{F}(V17,V16), P_not1-{F}(V17,V18), not_ok-{F}(V18), halfadder-{F}(V19), P_not1-{F}(V19,V18), P_and1-{F}(V19,V10) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9348: exists( #64, #9342 ), references = 1, size of lhs = 45:
% 282.36/282.57 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and2-{F}(V3,V4), P_out1-{F}(V4,V5), logic_or-{F}(V6), logic_and-{F}(V7), logic_and-{F}(V8), P_f-{F}(V9), P_h2-{F}(V9,V10), P_in1-{F}(V9,V11), P_in2-{F}(V9,V12), P_inc-{F}(V9,V13), P_outs-{F}(V9,V14), P_outc-{F}(V9,V15), P_or1-{F}(V9,V16), P_h1-{F}(V9,V17), P_and1-{F}(V17,V8), P_or1-{F}(V17,V6), P_and2-{F}(V17,V7), P_not1-{F}(V17,V18), halfadder-{F}(V19), P_and1-{F}(V19,V8), P_or1-{F}(V19,V6), halfadder-{F}(V20), P_or1-{F}(V20,V6), P_in2-{F}(V20,V21), one-{F}(V21), halfadder-{F}(V22), P_and1-{F}(V22,V8), P_outs-{F}(V22,V5), halfadder-{F}(V23), P_and2-{F}(V23,V7), P_in1-{F}(V23,V24), zero-{F}(V24), halfadder-{F}(V25), P_and2-{F}(V25,V7), P_not1-{F}(V25,V26), not_ok-{F}(V26), halfadder-{F}(V27), P_not1-{F}(V27,V26), P_and1-{F}(V27,V8) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9349: exists( #64, #9343 ), references = 1, size of lhs = 53:
% 282.36/282.57 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and2-{F}(V3,V4), P_out1-{F}(V4,V5), halfadder-{F}(V6), P_and2-{F}(V6,V7), P_out1-{F}(V7,V8), P_not1-{F}(V6,V9), halfadder-{F}(V10), P_not1-{F}(V10,V9), P_and2-{F}(V10,V11), P_out1-{F}(V11,V5), logic_or-{F}(V12), logic_and-{F}(V13), logic_and-{F}(V14), P_f-{F}(V15), P_h2-{F}(V15,V16), P_in1-{F}(V15,V17), P_in2-{F}(V15,V18), P_inc-{F}(V15,V19), P_outs-{F}(V15,V20), P_outc-{F}(V15,V21), P_or1-{F}(V15,V22), P_h1-{F}(V15,V23), P_and1-{F}(V23,V14), P_or1-{F}(V23,V12), P_and2-{F}(V23,V13), P_not1-{F}(V23,V24), halfadder-{F}(V25), P_and1-{F}(V25,V14), P_or1-{F}(V25,V12), halfadder-{F}(V26), P_or1-{F}(V26,V12), P_in2-{F}(V26,V27), one-{F}(V27), halfadder-{F}(V28), P_and1-{F}(V28,V14), P_outs-{F}(V28,V8), halfadder-{F}(V29), P_and2-{F}(V29,V13), P_in1-{F}(V29,V30), zero-{F}(V30), halfadder-{F}(V31), P_and2-{F}(V31,V13), P_not1-{F}(V31,V32), not_ok-{F}(V32), halfadder-{F}(V33), P_not1-{F}(V33,V32), P_and1-{F}(V33,V14) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9350: exists( #64, #9344 ), references = 1, size of lhs = 32:
% 282.36/282.57 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_or1-{F}(V0,V2), halfadder-{F}(V3), P_not1-{F}(V3,V2), P_and2-{F}(V3,V4), P_out1-{F}(V4,V5), halfadder-{F}(V6), P_or1-{F}(V6,V7), or_ok-{F}(V7), P_and1-{F}(V6,V8), and_ok-{F}(V8), halfadder-{F}(V9), P_or1-{F}(V9,V7), P_in2-{F}(V9,V10), one-{F}(V10), halfadder-{F}(V11), P_and1-{F}(V11,V8), P_outs-{F}(V11,V5), halfadder-{F}(V12), P_in1-{F}(V12,V13), zero-{F}(V13), P_and2-{F}(V12,V14), and_ok-{F}(V14), halfadder-{F}(V15), P_and2-{F}(V15,V14), P_not1-{F}(V15,V16), not_ok-{F}(V16), halfadder-{F}(V17), P_not1-{F}(V17,V16), P_and1-{F}(V17,V8) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9469: exists( #66, #9463 ), references = 1, size of lhs = 24:
% 282.36/282.57 halfadder-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_or1-{F}(V0,V2), or_ok-{F}(V2), P_out1-{F}(V2,V3), one-{F}(V4), halfadder-{F}(V5), fulladder-{F}(V6), P_in1-{F}(V6,V4), P_h2-{F}(V6,V5), P_h1-{F}(V6,V7), P_outs-{F}(V7,V3), P_outs-{F}(V6,V8), one-{F}(V8), P_f-{F}(V9), P_h2-{F}(V9,V5), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), abnormal-{F}(V15) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9470: exists( #66, #9464 ), references = 1, size of lhs = 30:
% 282.36/282.57 halfadder-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_or1-{F}(V0,V2), or_ok-{F}(V2), P_out1-{F}(V2,V3), halfadder-{F}(V4), P_outs-{F}(V4,V5), P_and1-{F}(V4,V6), halfadder-{F}(V7), P_and1-{F}(V7,V6), P_outs-{F}(V7,V3), one-{F}(V8), halfadder-{F}(V9), fulladder-{F}(V10), P_in1-{F}(V10,V8), P_h2-{F}(V10,V9), P_h1-{F}(V10,V11), P_outs-{F}(V11,V5), P_outs-{F}(V10,V12), one-{F}(V12), P_f-{F}(V13), P_h2-{F}(V13,V9), P_in1-{F}(V13,V14), P_in2-{F}(V13,V15), P_inc-{F}(V13,V16), P_outs-{F}(V13,V17), P_outc-{F}(V13,V18), P_or1-{F}(V13,V19), abnormal-{F}(V19) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9471: exists( #66, #9465 ), references = 1, size of lhs = 24:
% 282.36/282.57 halfadder-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_or1-{F}(V0,V2), or_ok-{F}(V2), P_out1-{F}(V2,V3), halfadder-{F}(V4), fulladder-{F}(V5), P_h2-{F}(V5,V4), P_h1-{F}(V5,V6), P_outs-{F}(V6,V3), P_outs-{F}(V5,V7), one-{F}(V7), P_in1-{F}(V4,V8), one-{F}(V8), P_f-{F}(V9), P_h2-{F}(V9,V4), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), abnormal-{F}(V15) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9511: exists( #66, #9505 ), references = 1, size of lhs = 39:
% 282.36/282.57 halfadder-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_or1-{F}(V0,V2), or_ok-{F}(V2), P_out1-{F}(V2,V3), connection-{F}(V3,V4), halfadder-{F}(V5), P_outs-{F}(V5,V6), P_and1-{F}(V5,V7), and_ok-{F}(V7), P_in1-{F}(V7,V4), halfadder-{F}(V8), P_and2-{F}(V8,V9), P_out1-{F}(V9,V10), zero-{F}(V10), P_not1-{F}(V8,V11), not_ok-{F}(V11), halfadder-{F}(V12), P_not1-{F}(V12,V11), P_and1-{F}(V12,V7), one-{F}(V13), halfadder-{F}(V14), fulladder-{F}(V15), P_in1-{F}(V15,V13), P_h2-{F}(V15,V14), P_h1-{F}(V15,V16), P_outs-{F}(V16,V6), P_outs-{F}(V15,V17), one-{F}(V17), P_f-{F}(V18), P_h2-{F}(V18,V14), P_in1-{F}(V18,V19), P_in2-{F}(V18,V20), P_inc-{F}(V18,V21), P_outs-{F}(V18,V22), P_outc-{F}(V18,V23), P_or1-{F}(V18,V24), abnormal-{F}(V24) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9512: exists( #66, #9506 ), references = 1, size of lhs = 45:
% 282.36/282.57 halfadder-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_or1-{F}(V0,V2), or_ok-{F}(V2), P_out1-{F}(V2,V3), connection-{F}(V3,V4), halfadder-{F}(V5), P_outs-{F}(V5,V6), P_and1-{F}(V5,V7), and_ok-{F}(V7), P_in1-{F}(V7,V4), halfadder-{F}(V8), P_and2-{F}(V8,V9), P_out1-{F}(V9,V10), zero-{F}(V10), P_not1-{F}(V8,V11), not_ok-{F}(V11), halfadder-{F}(V12), P_not1-{F}(V12,V11), P_and1-{F}(V12,V7), halfadder-{F}(V13), P_outs-{F}(V13,V14), P_and1-{F}(V13,V15), halfadder-{F}(V16), P_and1-{F}(V16,V15), P_outs-{F}(V16,V6), one-{F}(V17), halfadder-{F}(V18), fulladder-{F}(V19), P_in1-{F}(V19,V17), P_h2-{F}(V19,V18), P_h1-{F}(V19,V20), P_outs-{F}(V20,V14), P_outs-{F}(V19,V21), one-{F}(V21), P_f-{F}(V22), P_h2-{F}(V22,V18), P_in1-{F}(V22,V23), P_in2-{F}(V22,V24), P_inc-{F}(V22,V25), P_outs-{F}(V22,V26), P_outc-{F}(V22,V27), P_or1-{F}(V22,V28), abnormal-{F}(V28) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9513: exists( #66, #9507 ), references = 1, size of lhs = 39:
% 282.36/282.57 halfadder-{F}(V0), P_in2-{F}(V0,V1), one-{F}(V1), P_or1-{F}(V0,V2), or_ok-{F}(V2), P_out1-{F}(V2,V3), connection-{F}(V3,V4), halfadder-{F}(V5), P_outs-{F}(V5,V6), P_and1-{F}(V5,V7), and_ok-{F}(V7), P_in1-{F}(V7,V4), halfadder-{F}(V8), P_and2-{F}(V8,V9), P_out1-{F}(V9,V10), zero-{F}(V10), P_not1-{F}(V8,V11), not_ok-{F}(V11), halfadder-{F}(V12), P_not1-{F}(V12,V11), P_and1-{F}(V12,V7), halfadder-{F}(V13), fulladder-{F}(V14), P_h2-{F}(V14,V13), P_h1-{F}(V14,V15), P_outs-{F}(V15,V6), P_outs-{F}(V14,V16), one-{F}(V16), P_in1-{F}(V13,V17), one-{F}(V17), P_f-{F}(V18), P_h2-{F}(V18,V13), P_in1-{F}(V18,V19), P_in2-{F}(V18,V20), P_inc-{F}(V18,V21), P_outs-{F}(V18,V22), P_outc-{F}(V18,V23), P_or1-{F}(V18,V24), abnormal-{F}(V24) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9520: exists( #65, #9514 ), references = 1, size of lhs = 41:
% 282.36/282.57 halfadder-{F}(V0), P_or1-{F}(V0,V1), or_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), halfadder-{F}(V4), P_or1-{F}(V4,V1), P_in2-{F}(V4,V5), one-{F}(V5), halfadder-{F}(V6), P_outs-{F}(V6,V7), P_and1-{F}(V6,V8), and_ok-{F}(V8), P_in1-{F}(V8,V3), halfadder-{F}(V9), P_and2-{F}(V9,V10), P_out1-{F}(V10,V11), zero-{F}(V11), P_not1-{F}(V9,V12), not_ok-{F}(V12), halfadder-{F}(V13), P_not1-{F}(V13,V12), P_and1-{F}(V13,V8), one-{F}(V14), halfadder-{F}(V15), fulladder-{F}(V16), P_in1-{F}(V16,V14), P_h2-{F}(V16,V15), P_h1-{F}(V16,V17), P_outs-{F}(V17,V7), P_outs-{F}(V16,V18), one-{F}(V18), P_f-{F}(V19), P_h2-{F}(V19,V15), P_in1-{F}(V19,V20), P_in2-{F}(V19,V21), P_inc-{F}(V19,V22), P_outs-{F}(V19,V23), P_outc-{F}(V19,V24), P_or1-{F}(V19,V25), abnormal-{F}(V25) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9521: exists( #65, #9515 ), references = 1, size of lhs = 47:
% 282.36/282.57 halfadder-{F}(V0), P_or1-{F}(V0,V1), or_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), halfadder-{F}(V4), P_or1-{F}(V4,V1), P_in2-{F}(V4,V5), one-{F}(V5), halfadder-{F}(V6), P_outs-{F}(V6,V7), P_and1-{F}(V6,V8), and_ok-{F}(V8), P_in1-{F}(V8,V3), halfadder-{F}(V9), P_and2-{F}(V9,V10), P_out1-{F}(V10,V11), zero-{F}(V11), P_not1-{F}(V9,V12), not_ok-{F}(V12), halfadder-{F}(V13), P_not1-{F}(V13,V12), P_and1-{F}(V13,V8), halfadder-{F}(V14), P_outs-{F}(V14,V15), P_and1-{F}(V14,V16), halfadder-{F}(V17), P_and1-{F}(V17,V16), P_outs-{F}(V17,V7), one-{F}(V18), halfadder-{F}(V19), fulladder-{F}(V20), P_in1-{F}(V20,V18), P_h2-{F}(V20,V19), P_h1-{F}(V20,V21), P_outs-{F}(V21,V15), P_outs-{F}(V20,V22), one-{F}(V22), P_f-{F}(V23), P_h2-{F}(V23,V19), P_in1-{F}(V23,V24), P_in2-{F}(V23,V25), P_inc-{F}(V23,V26), P_outs-{F}(V23,V27), P_outc-{F}(V23,V28), P_or1-{F}(V23,V29), abnormal-{F}(V29) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9522: exists( #65, #9516 ), references = 1, size of lhs = 41:
% 282.36/282.57 halfadder-{F}(V0), P_or1-{F}(V0,V1), or_ok-{F}(V1), P_and1-{F}(V0,V2), P_in1-{F}(V2,V3), halfadder-{F}(V4), P_or1-{F}(V4,V1), P_in2-{F}(V4,V5), one-{F}(V5), halfadder-{F}(V6), P_outs-{F}(V6,V7), P_and1-{F}(V6,V8), and_ok-{F}(V8), P_in1-{F}(V8,V3), halfadder-{F}(V9), P_and2-{F}(V9,V10), P_out1-{F}(V10,V11), zero-{F}(V11), P_not1-{F}(V9,V12), not_ok-{F}(V12), halfadder-{F}(V13), P_not1-{F}(V13,V12), P_and1-{F}(V13,V8), halfadder-{F}(V14), fulladder-{F}(V15), P_h2-{F}(V15,V14), P_h1-{F}(V15,V16), P_outs-{F}(V16,V7), P_outs-{F}(V15,V17), one-{F}(V17), P_in1-{F}(V14,V18), one-{F}(V18), P_f-{F}(V19), P_h2-{F}(V19,V14), P_in1-{F}(V19,V20), P_in2-{F}(V19,V21), P_inc-{F}(V19,V22), P_outs-{F}(V19,V23), P_outc-{F}(V19,V24), P_or1-{F}(V19,V25), abnormal-{F}(V25) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9526: exists( #64, #9517 ), references = 2, size of lhs = 39:
% 282.36/282.57 halfadder-{F}(V0), P_or1-{F}(V0,V1), or_ok-{F}(V1), P_and1-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V1), P_in2-{F}(V3,V4), one-{F}(V4), halfadder-{F}(V5), P_and1-{F}(V5,V2), P_outs-{F}(V5,V6), halfadder-{F}(V7), P_and2-{F}(V7,V8), P_out1-{F}(V8,V9), zero-{F}(V9), P_not1-{F}(V7,V10), not_ok-{F}(V10), halfadder-{F}(V11), P_not1-{F}(V11,V10), P_and1-{F}(V11,V2), one-{F}(V12), halfadder-{F}(V13), fulladder-{F}(V14), P_in1-{F}(V14,V12), P_h2-{F}(V14,V13), P_h1-{F}(V14,V15), P_outs-{F}(V15,V6), P_outs-{F}(V14,V16), one-{F}(V16), P_f-{F}(V17), P_h2-{F}(V17,V13), P_in1-{F}(V17,V18), P_in2-{F}(V17,V19), P_inc-{F}(V17,V20), P_outs-{F}(V17,V21), P_outc-{F}(V17,V22), P_or1-{F}(V17,V23), abnormal-{F}(V23) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9527: exists( #64, #9518 ), references = 2, size of lhs = 45:
% 282.36/282.57 halfadder-{F}(V0), P_or1-{F}(V0,V1), or_ok-{F}(V1), P_and1-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V1), P_in2-{F}(V3,V4), one-{F}(V4), halfadder-{F}(V5), P_and1-{F}(V5,V2), P_outs-{F}(V5,V6), halfadder-{F}(V7), P_and2-{F}(V7,V8), P_out1-{F}(V8,V9), zero-{F}(V9), P_not1-{F}(V7,V10), not_ok-{F}(V10), halfadder-{F}(V11), P_not1-{F}(V11,V10), P_and1-{F}(V11,V2), halfadder-{F}(V12), P_outs-{F}(V12,V13), P_and1-{F}(V12,V14), halfadder-{F}(V15), P_and1-{F}(V15,V14), P_outs-{F}(V15,V6), one-{F}(V16), halfadder-{F}(V17), fulladder-{F}(V18), P_in1-{F}(V18,V16), P_h2-{F}(V18,V17), P_h1-{F}(V18,V19), P_outs-{F}(V19,V13), P_outs-{F}(V18,V20), one-{F}(V20), P_f-{F}(V21), P_h2-{F}(V21,V17), P_in1-{F}(V21,V22), P_in2-{F}(V21,V23), P_inc-{F}(V21,V24), P_outs-{F}(V21,V25), P_outc-{F}(V21,V26), P_or1-{F}(V21,V27), abnormal-{F}(V27) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9528: exists( #64, #9519 ), references = 2, size of lhs = 39:
% 282.36/282.57 halfadder-{F}(V0), P_or1-{F}(V0,V1), or_ok-{F}(V1), P_and1-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V1), P_in2-{F}(V3,V4), one-{F}(V4), halfadder-{F}(V5), P_and1-{F}(V5,V2), P_outs-{F}(V5,V6), halfadder-{F}(V7), P_and2-{F}(V7,V8), P_out1-{F}(V8,V9), zero-{F}(V9), P_not1-{F}(V7,V10), not_ok-{F}(V10), halfadder-{F}(V11), P_not1-{F}(V11,V10), P_and1-{F}(V11,V2), halfadder-{F}(V12), fulladder-{F}(V13), P_h2-{F}(V13,V12), P_h1-{F}(V13,V14), P_outs-{F}(V14,V6), P_outs-{F}(V13,V15), one-{F}(V15), P_in1-{F}(V12,V16), one-{F}(V16), P_f-{F}(V17), P_h2-{F}(V17,V12), P_in1-{F}(V17,V18), P_in2-{F}(V17,V19), P_inc-{F}(V17,V20), P_outs-{F}(V17,V21), P_outc-{F}(V17,V22), P_or1-{F}(V17,V23), abnormal-{F}(V23) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9535: exists( #65, #9529 ), references = 2, size of lhs = 40:
% 282.36/282.57 and_ok-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), halfadder-{F}(V2), P_or1-{F}(V2,V3), or_ok-{F}(V3), P_and1-{F}(V2,V4), and_ok-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V3), P_in2-{F}(V5,V6), one-{F}(V6), halfadder-{F}(V7), P_and1-{F}(V7,V4), P_outs-{F}(V7,V8), halfadder-{F}(V9), P_and2-{F}(V9,V0), P_not1-{F}(V9,V10), not_ok-{F}(V10), halfadder-{F}(V11), P_not1-{F}(V11,V10), P_and1-{F}(V11,V4), one-{F}(V12), halfadder-{F}(V13), fulladder-{F}(V14), P_in1-{F}(V14,V12), P_h2-{F}(V14,V13), P_h1-{F}(V14,V15), P_outs-{F}(V15,V8), P_outs-{F}(V14,V16), one-{F}(V16), P_f-{F}(V17), P_h2-{F}(V17,V13), P_in1-{F}(V17,V18), P_in2-{F}(V17,V19), P_inc-{F}(V17,V20), P_outs-{F}(V17,V21), P_outc-{F}(V17,V22), P_or1-{F}(V17,V23), abnormal-{F}(V23) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9536: exists( #65, #9530 ), references = 2, size of lhs = 46:
% 282.36/282.57 and_ok-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), halfadder-{F}(V2), P_or1-{F}(V2,V3), or_ok-{F}(V3), P_and1-{F}(V2,V4), and_ok-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V3), P_in2-{F}(V5,V6), one-{F}(V6), halfadder-{F}(V7), P_and1-{F}(V7,V4), P_outs-{F}(V7,V8), halfadder-{F}(V9), P_and2-{F}(V9,V0), P_not1-{F}(V9,V10), not_ok-{F}(V10), halfadder-{F}(V11), P_not1-{F}(V11,V10), P_and1-{F}(V11,V4), halfadder-{F}(V12), P_outs-{F}(V12,V13), P_and1-{F}(V12,V14), halfadder-{F}(V15), P_and1-{F}(V15,V14), P_outs-{F}(V15,V8), one-{F}(V16), halfadder-{F}(V17), fulladder-{F}(V18), P_in1-{F}(V18,V16), P_h2-{F}(V18,V17), P_h1-{F}(V18,V19), P_outs-{F}(V19,V13), P_outs-{F}(V18,V20), one-{F}(V20), P_f-{F}(V21), P_h2-{F}(V21,V17), P_in1-{F}(V21,V22), P_in2-{F}(V21,V23), P_inc-{F}(V21,V24), P_outs-{F}(V21,V25), P_outc-{F}(V21,V26), P_or1-{F}(V21,V27), abnormal-{F}(V27) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9537: exists( #65, #9531 ), references = 2, size of lhs = 40:
% 282.36/282.57 and_ok-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), halfadder-{F}(V2), P_or1-{F}(V2,V3), or_ok-{F}(V3), P_and1-{F}(V2,V4), and_ok-{F}(V4), halfadder-{F}(V5), P_or1-{F}(V5,V3), P_in2-{F}(V5,V6), one-{F}(V6), halfadder-{F}(V7), P_and1-{F}(V7,V4), P_outs-{F}(V7,V8), halfadder-{F}(V9), P_and2-{F}(V9,V0), P_not1-{F}(V9,V10), not_ok-{F}(V10), halfadder-{F}(V11), P_not1-{F}(V11,V10), P_and1-{F}(V11,V4), halfadder-{F}(V12), fulladder-{F}(V13), P_h2-{F}(V13,V12), P_h1-{F}(V13,V14), P_outs-{F}(V14,V8), P_outs-{F}(V13,V15), one-{F}(V15), P_in1-{F}(V12,V16), one-{F}(V16), P_f-{F}(V17), P_h2-{F}(V17,V12), P_in1-{F}(V17,V18), P_in2-{F}(V17,V19), P_inc-{F}(V17,V20), P_outs-{F}(V17,V21), P_outc-{F}(V17,V22), P_or1-{F}(V17,V23), abnormal-{F}(V23) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9559: exists( #64, #9553 ), references = 1, size of lhs = 42:
% 282.36/282.57 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V4), or_ok-{F}(V4), P_and1-{F}(V3,V5), and_ok-{F}(V5), halfadder-{F}(V6), P_or1-{F}(V6,V4), P_in2-{F}(V6,V7), one-{F}(V7), halfadder-{F}(V8), P_and1-{F}(V8,V5), P_outs-{F}(V8,V9), halfadder-{F}(V10), P_and2-{F}(V10,V2), P_not1-{F}(V10,V11), not_ok-{F}(V11), halfadder-{F}(V12), P_not1-{F}(V12,V11), P_and1-{F}(V12,V5), one-{F}(V13), halfadder-{F}(V14), fulladder-{F}(V15), P_in1-{F}(V15,V13), P_h2-{F}(V15,V14), P_h1-{F}(V15,V16), P_outs-{F}(V16,V9), P_outs-{F}(V15,V17), one-{F}(V17), P_f-{F}(V18), P_h2-{F}(V18,V14), P_in1-{F}(V18,V19), P_in2-{F}(V18,V20), P_inc-{F}(V18,V21), P_outs-{F}(V18,V22), P_outc-{F}(V18,V23), P_or1-{F}(V18,V24), abnormal-{F}(V24) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9560: exists( #64, #9554 ), references = 1, size of lhs = 48:
% 282.36/282.57 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V4), or_ok-{F}(V4), P_and1-{F}(V3,V5), and_ok-{F}(V5), halfadder-{F}(V6), P_or1-{F}(V6,V4), P_in2-{F}(V6,V7), one-{F}(V7), halfadder-{F}(V8), P_and1-{F}(V8,V5), P_outs-{F}(V8,V9), halfadder-{F}(V10), P_and2-{F}(V10,V2), P_not1-{F}(V10,V11), not_ok-{F}(V11), halfadder-{F}(V12), P_not1-{F}(V12,V11), P_and1-{F}(V12,V5), halfadder-{F}(V13), P_outs-{F}(V13,V14), P_and1-{F}(V13,V15), halfadder-{F}(V16), P_and1-{F}(V16,V15), P_outs-{F}(V16,V9), one-{F}(V17), halfadder-{F}(V18), fulladder-{F}(V19), P_in1-{F}(V19,V17), P_h2-{F}(V19,V18), P_h1-{F}(V19,V20), P_outs-{F}(V20,V14), P_outs-{F}(V19,V21), one-{F}(V21), P_f-{F}(V22), P_h2-{F}(V22,V18), P_in1-{F}(V22,V23), P_in2-{F}(V22,V24), P_inc-{F}(V22,V25), P_outs-{F}(V22,V26), P_outc-{F}(V22,V27), P_or1-{F}(V22,V28), abnormal-{F}(V28) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9561: exists( #64, #9555 ), references = 1, size of lhs = 42:
% 282.36/282.57 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_and2-{F}(V0,V2), and_ok-{F}(V2), halfadder-{F}(V3), P_or1-{F}(V3,V4), or_ok-{F}(V4), P_and1-{F}(V3,V5), and_ok-{F}(V5), halfadder-{F}(V6), P_or1-{F}(V6,V4), P_in2-{F}(V6,V7), one-{F}(V7), halfadder-{F}(V8), P_and1-{F}(V8,V5), P_outs-{F}(V8,V9), halfadder-{F}(V10), P_and2-{F}(V10,V2), P_not1-{F}(V10,V11), not_ok-{F}(V11), halfadder-{F}(V12), P_not1-{F}(V12,V11), P_and1-{F}(V12,V5), halfadder-{F}(V13), fulladder-{F}(V14), P_h2-{F}(V14,V13), P_h1-{F}(V14,V15), P_outs-{F}(V15,V9), P_outs-{F}(V14,V16), one-{F}(V16), P_in1-{F}(V13,V17), one-{F}(V17), P_f-{F}(V18), P_h2-{F}(V18,V13), P_in1-{F}(V18,V19), P_in2-{F}(V18,V20), P_inc-{F}(V18,V21), P_outs-{F}(V18,V22), P_outc-{F}(V18,V23), P_or1-{F}(V18,V24), abnormal-{F}(V24) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9606: mergings( V11 == V22, V22 == V35, V10 == V21, V21 == V34, V3 == V14, V4 == V15, V5 == V16, V9 == V20, V7 == V18, V8 == V19, V12 == V23, V2 == V24, V6 == V17, V14 == V27, V15 == V28, V16 == V29, V20 == V33, V18 == V31, V19 == V32, V23 == V36, V13 == V39, V25 == V38, V24 == V37, V17 == V30, V27 == V55, V28 == V56, V29 == V57, V33 == V61, V31 == V59, V32 == V60, V0 == V51, V30 == V58; #9571 ), references = 1, size of lhs = 49:
% 282.36/282.57 logic_or-{F}(V0), logic_and-{F}(V1), logic_and-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V1), P_in1-{F}(V3,V4), zero-{F}(V4), halfadder-{F}(V5), P_and1-{F}(V5,V2), P_or1-{F}(V5,V0), halfadder-{F}(V6), P_or1-{F}(V6,V0), P_in2-{F}(V6,V7), one-{F}(V7), halfadder-{F}(V8), P_and1-{F}(V8,V2), P_outs-{F}(V8,V9), halfadder-{F}(V10), P_and2-{F}(V10,V1), P_not1-{F}(V10,V11), not_ok-{F}(V11), halfadder-{F}(V12), P_not1-{F}(V12,V11), P_and1-{F}(V12,V2), one-{F}(V13), halfadder-{F}(V14), P_and2-{F}(V14,V15), P_and1-{F}(V14,V16), fulladder-{F}(V17), P_in1-{F}(V17,V13), P_h2-{F}(V17,V14), P_h1-{F}(V17,V18), P_outs-{F}(V18,V9), P_outs-{F}(V17,V19), one-{F}(V19), P_f-{F}(V20), P_h2-{F}(V20,V14), P_h1-{F}(V20,V21), P_and1-{F}(V21,V2), P_or1-{F}(V21,V0), P_and2-{F}(V21,V1), P_not1-{F}(V21,V22), P_in1-{F}(V20,V23), P_in2-{F}(V20,V24), P_inc-{F}(V20,V25), P_outs-{F}(V20,V26), P_outc-{F}(V20,V27), P_or1-{F}(V20,V28), abnormal-{F}(V28) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9639: mergings( V11 == V22, V22 == V35, V10 == V21, V21 == V34, V3 == V14, V4 == V15, V5 == V16, V9 == V20, V7 == V18, V8 == V19, V12 == V23, V2 == V24, V6 == V17, V14 == V27, V15 == V28, V16 == V29, V20 == V33, V18 == V31, V19 == V32, V23 == V36, V13 == V39, V25 == V38, V24 == V37, V17 == V30, V27 == V59, V28 == V60, V29 == V61, V33 == V65, V31 == V63, V32 == V64, V0 == V55, V30 == V62; #9572 ), references = 1, size of lhs = 55:
% 282.36/282.57 logic_or-{F}(V0), logic_and-{F}(V1), logic_and-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V1), P_in1-{F}(V3,V4), zero-{F}(V4), halfadder-{F}(V5), P_and1-{F}(V5,V2), P_or1-{F}(V5,V0), halfadder-{F}(V6), P_or1-{F}(V6,V0), P_in2-{F}(V6,V7), one-{F}(V7), halfadder-{F}(V8), P_and1-{F}(V8,V2), P_outs-{F}(V8,V9), halfadder-{F}(V10), P_and2-{F}(V10,V1), P_not1-{F}(V10,V11), not_ok-{F}(V11), halfadder-{F}(V12), P_not1-{F}(V12,V11), P_and1-{F}(V12,V2), halfadder-{F}(V13), P_outs-{F}(V13,V14), P_and1-{F}(V13,V15), halfadder-{F}(V16), P_and1-{F}(V16,V15), P_outs-{F}(V16,V9), one-{F}(V17), halfadder-{F}(V18), P_and2-{F}(V18,V19), P_and1-{F}(V18,V20), fulladder-{F}(V21), P_in1-{F}(V21,V17), P_h2-{F}(V21,V18), P_h1-{F}(V21,V22), P_outs-{F}(V22,V14), P_outs-{F}(V21,V23), one-{F}(V23), P_f-{F}(V24), P_h2-{F}(V24,V18), P_h1-{F}(V24,V25), P_and1-{F}(V25,V2), P_or1-{F}(V25,V0), P_and2-{F}(V25,V1), P_not1-{F}(V25,V26), P_in1-{F}(V24,V27), P_in2-{F}(V24,V28), P_inc-{F}(V24,V29), P_outs-{F}(V24,V30), P_outc-{F}(V24,V31), P_or1-{F}(V24,V32), abnormal-{F}(V32) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9672: mergings( V11 == V22, V22 == V35, V10 == V21, V21 == V34, V3 == V14, V4 == V15, V5 == V16, V9 == V20, V7 == V18, V8 == V19, V12 == V23, V2 == V24, V6 == V17, V14 == V27, V15 == V28, V16 == V29, V20 == V33, V18 == V31, V19 == V32, V23 == V36, V13 == V39, V25 == V38, V24 == V37, V17 == V30, V27 == V55, V28 == V56, V29 == V57, V33 == V61, V31 == V59, V32 == V60, V0 == V50, V30 == V58; #9573 ), references = 1, size of lhs = 49:
% 282.36/282.57 logic_or-{F}(V0), logic_and-{F}(V1), logic_and-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V1), P_in1-{F}(V3,V4), zero-{F}(V4), halfadder-{F}(V5), P_and1-{F}(V5,V2), P_or1-{F}(V5,V0), halfadder-{F}(V6), P_or1-{F}(V6,V0), P_in2-{F}(V6,V7), one-{F}(V7), halfadder-{F}(V8), P_and1-{F}(V8,V2), P_outs-{F}(V8,V9), halfadder-{F}(V10), P_and2-{F}(V10,V1), P_not1-{F}(V10,V11), not_ok-{F}(V11), halfadder-{F}(V12), P_not1-{F}(V12,V11), P_and1-{F}(V12,V2), halfadder-{F}(V13), P_and2-{F}(V13,V14), P_and1-{F}(V13,V15), fulladder-{F}(V16), P_h2-{F}(V16,V13), P_h1-{F}(V16,V17), P_outs-{F}(V17,V9), P_outs-{F}(V16,V18), one-{F}(V18), P_in1-{F}(V13,V19), one-{F}(V19), P_f-{F}(V20), P_h2-{F}(V20,V13), P_h1-{F}(V20,V21), P_and1-{F}(V21,V2), P_or1-{F}(V21,V0), P_and2-{F}(V21,V1), P_not1-{F}(V21,V22), P_in1-{F}(V20,V23), P_in2-{F}(V20,V24), P_inc-{F}(V20,V25), P_outs-{F}(V20,V26), P_outc-{F}(V20,V27), P_or1-{F}(V20,V28), abnormal-{F}(V28) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9706: mergings( V10 == V20, V20 == V32, V3 == V13, V4 == V14, V5 == V15, V9 == V19, V7 == V17, V8 == V18, V11 == V21, V2 == V22, V6 == V16, V13 == V25, V14 == V26, V15 == V27, V19 == V31, V17 == V29, V18 == V30, V21 == V33, V12 == V36, V23 == V35, V22 == V34, V16 == V28, V25 == V52, V26 == V53, V27 == V54, V31 == V58, V29 == V56, V30 == V57, V0 == V48, V28 == V55; #9673 ), references = 1, size of lhs = 48:
% 282.36/282.57 logic_or-{F}(V0), logic_and-{F}(V1), logic_and-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V1), P_in1-{F}(V3,V4), zero-{F}(V4), halfadder-{F}(V5), P_and1-{F}(V5,V2), P_or1-{F}(V5,V0), halfadder-{F}(V6), P_or1-{F}(V6,V0), P_in2-{F}(V6,V7), one-{F}(V7), halfadder-{F}(V8), P_and1-{F}(V8,V2), P_outs-{F}(V8,V9), halfadder-{F}(V10), P_and2-{F}(V10,V1), P_not1-{F}(V10,V11), not_ok-{F}(V11), halfadder-{F}(V12), P_not1-{F}(V12,V11), P_and1-{F}(V12,V2), one-{F}(V13), halfadder-{F}(V14), P_and1-{F}(V14,V15), fulladder-{F}(V16), P_in1-{F}(V16,V13), P_h2-{F}(V16,V14), P_h1-{F}(V16,V17), P_outs-{F}(V17,V9), P_outs-{F}(V16,V18), one-{F}(V18), P_f-{F}(V19), P_h2-{F}(V19,V14), P_h1-{F}(V19,V20), P_and1-{F}(V20,V2), P_or1-{F}(V20,V0), P_and2-{F}(V20,V1), P_not1-{F}(V20,V21), P_in1-{F}(V19,V22), P_in2-{F}(V19,V23), P_inc-{F}(V19,V24), P_outs-{F}(V19,V25), P_outc-{F}(V19,V26), P_or1-{F}(V19,V27), abnormal-{F}(V27) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9737: mergings( V10 == V20, V20 == V32, V3 == V13, V4 == V14, V5 == V15, V9 == V19, V7 == V17, V8 == V18, V11 == V21, V2 == V22, V6 == V16, V13 == V25, V14 == V26, V15 == V27, V19 == V31, V17 == V29, V18 == V30, V21 == V33, V12 == V36, V23 == V35, V22 == V34, V16 == V28, V25 == V56, V26 == V57, V27 == V58, V31 == V62, V29 == V60, V30 == V61, V0 == V52, V28 == V59; #9674 ), references = 1, size of lhs = 54:
% 282.36/282.57 logic_or-{F}(V0), logic_and-{F}(V1), logic_and-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V1), P_in1-{F}(V3,V4), zero-{F}(V4), halfadder-{F}(V5), P_and1-{F}(V5,V2), P_or1-{F}(V5,V0), halfadder-{F}(V6), P_or1-{F}(V6,V0), P_in2-{F}(V6,V7), one-{F}(V7), halfadder-{F}(V8), P_and1-{F}(V8,V2), P_outs-{F}(V8,V9), halfadder-{F}(V10), P_and2-{F}(V10,V1), P_not1-{F}(V10,V11), not_ok-{F}(V11), halfadder-{F}(V12), P_not1-{F}(V12,V11), P_and1-{F}(V12,V2), halfadder-{F}(V13), P_outs-{F}(V13,V14), P_and1-{F}(V13,V15), halfadder-{F}(V16), P_and1-{F}(V16,V15), P_outs-{F}(V16,V9), one-{F}(V17), halfadder-{F}(V18), P_and1-{F}(V18,V19), fulladder-{F}(V20), P_in1-{F}(V20,V17), P_h2-{F}(V20,V18), P_h1-{F}(V20,V21), P_outs-{F}(V21,V14), P_outs-{F}(V20,V22), one-{F}(V22), P_f-{F}(V23), P_h2-{F}(V23,V18), P_h1-{F}(V23,V24), P_and1-{F}(V24,V2), P_or1-{F}(V24,V0), P_and2-{F}(V24,V1), P_not1-{F}(V24,V25), P_in1-{F}(V23,V26), P_in2-{F}(V23,V27), P_inc-{F}(V23,V28), P_outs-{F}(V23,V29), P_outc-{F}(V23,V30), P_or1-{F}(V23,V31), abnormal-{F}(V31) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9768: mergings( V10 == V20, V20 == V32, V3 == V13, V4 == V14, V5 == V15, V9 == V19, V7 == V17, V8 == V18, V11 == V21, V2 == V22, V6 == V16, V13 == V25, V14 == V26, V15 == V27, V19 == V31, V17 == V29, V18 == V30, V21 == V33, V12 == V36, V23 == V35, V22 == V34, V16 == V28, V25 == V52, V26 == V53, V27 == V54, V31 == V58, V29 == V56, V30 == V57, V0 == V47, V28 == V55; #9675 ), references = 1, size of lhs = 48:
% 282.36/282.57 logic_or-{F}(V0), logic_and-{F}(V1), logic_and-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V1), P_in1-{F}(V3,V4), zero-{F}(V4), halfadder-{F}(V5), P_and1-{F}(V5,V2), P_or1-{F}(V5,V0), halfadder-{F}(V6), P_or1-{F}(V6,V0), P_in2-{F}(V6,V7), one-{F}(V7), halfadder-{F}(V8), P_and1-{F}(V8,V2), P_outs-{F}(V8,V9), halfadder-{F}(V10), P_and2-{F}(V10,V1), P_not1-{F}(V10,V11), not_ok-{F}(V11), halfadder-{F}(V12), P_not1-{F}(V12,V11), P_and1-{F}(V12,V2), halfadder-{F}(V13), P_and1-{F}(V13,V14), fulladder-{F}(V15), P_h2-{F}(V15,V13), P_h1-{F}(V15,V16), P_outs-{F}(V16,V9), P_outs-{F}(V15,V17), one-{F}(V17), P_in1-{F}(V13,V18), one-{F}(V18), P_f-{F}(V19), P_h2-{F}(V19,V13), P_h1-{F}(V19,V20), P_and1-{F}(V20,V2), P_or1-{F}(V20,V0), P_and2-{F}(V20,V1), P_not1-{F}(V20,V21), P_in1-{F}(V19,V22), P_in2-{F}(V19,V23), P_inc-{F}(V19,V24), P_outs-{F}(V19,V25), P_outc-{F}(V19,V26), P_or1-{F}(V19,V27), abnormal-{F}(V27) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9800: mergings( V3 == V12, V4 == V13, V5 == V14, V9 == V18, V7 == V16, V8 == V17, V10 == V19, V2 == V20, V6 == V15, V12 == V23, V13 == V24, V14 == V25, V18 == V29, V16 == V27, V17 == V28, V19 == V30, V11 == V33, V21 == V32, V20 == V31, V15 == V26, V23 == V49, V24 == V50, V25 == V51, V29 == V55, V27 == V53, V28 == V54, V0 == V45, V26 == V52; #9769 ), references = 1, size of lhs = 47:
% 282.36/282.57 logic_or-{F}(V0), logic_and-{F}(V1), logic_and-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V1), P_in1-{F}(V3,V4), zero-{F}(V4), halfadder-{F}(V5), P_and1-{F}(V5,V2), P_or1-{F}(V5,V0), halfadder-{F}(V6), P_or1-{F}(V6,V0), P_in2-{F}(V6,V7), one-{F}(V7), halfadder-{F}(V8), P_and1-{F}(V8,V2), P_outs-{F}(V8,V9), halfadder-{F}(V10), P_and2-{F}(V10,V1), P_not1-{F}(V10,V11), not_ok-{F}(V11), halfadder-{F}(V12), P_not1-{F}(V12,V11), P_and1-{F}(V12,V2), one-{F}(V13), halfadder-{F}(V14), fulladder-{F}(V15), P_in1-{F}(V15,V13), P_h2-{F}(V15,V14), P_h1-{F}(V15,V16), P_outs-{F}(V16,V9), P_outs-{F}(V15,V17), one-{F}(V17), P_f-{F}(V18), P_h2-{F}(V18,V14), P_h1-{F}(V18,V19), P_and1-{F}(V19,V2), P_or1-{F}(V19,V0), P_and2-{F}(V19,V1), P_not1-{F}(V19,V20), P_in1-{F}(V18,V21), P_in2-{F}(V18,V22), P_inc-{F}(V18,V23), P_outs-{F}(V18,V24), P_outc-{F}(V18,V25), P_or1-{F}(V18,V26), abnormal-{F}(V26) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9829: mergings( V3 == V12, V4 == V13, V5 == V14, V9 == V18, V7 == V16, V8 == V17, V10 == V19, V2 == V20, V6 == V15, V12 == V23, V13 == V24, V14 == V25, V18 == V29, V16 == V27, V17 == V28, V19 == V30, V11 == V33, V21 == V32, V20 == V31, V15 == V26, V23 == V53, V24 == V54, V25 == V55, V29 == V59, V27 == V57, V28 == V58, V0 == V49, V26 == V56; #9770 ), references = 1, size of lhs = 53:
% 282.36/282.57 logic_or-{F}(V0), logic_and-{F}(V1), logic_and-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V1), P_in1-{F}(V3,V4), zero-{F}(V4), halfadder-{F}(V5), P_and1-{F}(V5,V2), P_or1-{F}(V5,V0), halfadder-{F}(V6), P_or1-{F}(V6,V0), P_in2-{F}(V6,V7), one-{F}(V7), halfadder-{F}(V8), P_and1-{F}(V8,V2), P_outs-{F}(V8,V9), halfadder-{F}(V10), P_and2-{F}(V10,V1), P_not1-{F}(V10,V11), not_ok-{F}(V11), halfadder-{F}(V12), P_not1-{F}(V12,V11), P_and1-{F}(V12,V2), halfadder-{F}(V13), P_outs-{F}(V13,V14), P_and1-{F}(V13,V15), halfadder-{F}(V16), P_and1-{F}(V16,V15), P_outs-{F}(V16,V9), one-{F}(V17), halfadder-{F}(V18), fulladder-{F}(V19), P_in1-{F}(V19,V17), P_h2-{F}(V19,V18), P_h1-{F}(V19,V20), P_outs-{F}(V20,V14), P_outs-{F}(V19,V21), one-{F}(V21), P_f-{F}(V22), P_h2-{F}(V22,V18), P_h1-{F}(V22,V23), P_and1-{F}(V23,V2), P_or1-{F}(V23,V0), P_and2-{F}(V23,V1), P_not1-{F}(V23,V24), P_in1-{F}(V22,V25), P_in2-{F}(V22,V26), P_inc-{F}(V22,V27), P_outs-{F}(V22,V28), P_outc-{F}(V22,V29), P_or1-{F}(V22,V30), abnormal-{F}(V30) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9860: mergings( V3 == V13, V4 == V14, V5 == V15, V9 == V19, V7 == V17, V8 == V18, V11 == V20, V2 == V21, V6 == V16, V13 == V24, V14 == V25, V15 == V26, V19 == V30, V17 == V28, V18 == V29, V20 == V31, V12 == V34, V22 == V33, V21 == V32, V16 == V27, V24 == V47, V25 == V48, V26 == V49, V30 == V53, V28 == V51, V29 == V52, V10 == V44, V27 == V50; #9830 ), references = 1, size of lhs = 45:
% 282.36/282.57 logic_or-{F}(V0), logic_and-{F}(V1), logic_and-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V1), P_in1-{F}(V3,V4), zero-{F}(V4), halfadder-{F}(V5), P_and1-{F}(V5,V2), P_or1-{F}(V5,V0), halfadder-{F}(V6), P_or1-{F}(V6,V0), P_in2-{F}(V6,V7), one-{F}(V7), halfadder-{F}(V8), P_and1-{F}(V8,V2), halfadder-{F}(V9), P_and2-{F}(V9,V1), P_not1-{F}(V9,V10), not_ok-{F}(V10), halfadder-{F}(V11), P_not1-{F}(V11,V10), P_and1-{F}(V11,V2), one-{F}(V12), halfadder-{F}(V13), fulladder-{F}(V14), P_in1-{F}(V14,V12), P_h2-{F}(V14,V13), P_h1-{F}(V14,V8), P_outs-{F}(V14,V15), one-{F}(V15), P_f-{F}(V16), P_h2-{F}(V16,V13), P_h1-{F}(V16,V17), P_and1-{F}(V17,V2), P_or1-{F}(V17,V0), P_and2-{F}(V17,V1), P_not1-{F}(V17,V18), P_in1-{F}(V16,V19), P_in2-{F}(V16,V20), P_inc-{F}(V16,V21), P_outs-{F}(V16,V22), P_outc-{F}(V16,V23), P_or1-{F}(V16,V24), abnormal-{F}(V24) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9890: mergings( V23 == V43, V3 == V13, V4 == V14, V5 == V15, V9 == V19, V7 == V17, V8 == V18, V11 == V20, V2 == V21, V6 == V16, V13 == V24, V14 == V25, V15 == V26, V19 == V30, V17 == V28, V18 == V29, V20 == V31, V12 == V34, V22 == V33, V21 == V32, V16 == V27, V24 == V48, V25 == V49, V26 == V50, V30 == V54, V28 == V52, V29 == V53, V10 == V45, V27 == V51; #9831 ), references = 1, size of lhs = 45:
% 282.36/282.57 logic_or-{F}(V0), logic_and-{F}(V1), logic_and-{F}(V2), halfadder-{F}(V3), P_and2-{F}(V3,V1), P_in1-{F}(V3,V4), zero-{F}(V4), halfadder-{F}(V5), P_and1-{F}(V5,V2), P_or1-{F}(V5,V0), halfadder-{F}(V6), P_or1-{F}(V6,V0), P_in2-{F}(V6,V7), one-{F}(V7), halfadder-{F}(V8), P_and2-{F}(V8,V1), P_not1-{F}(V8,V9), not_ok-{F}(V9), halfadder-{F}(V10), P_not1-{F}(V10,V9), P_and1-{F}(V10,V2), halfadder-{F}(V11), P_and1-{F}(V11,V2), one-{F}(V12), halfadder-{F}(V13), fulladder-{F}(V14), P_in1-{F}(V14,V12), P_h2-{F}(V14,V13), P_h1-{F}(V14,V11), P_outs-{F}(V14,V15), one-{F}(V15), P_f-{F}(V16), P_h2-{F}(V16,V13), P_h1-{F}(V16,V17), P_and1-{F}(V17,V2), P_or1-{F}(V17,V0), P_and2-{F}(V17,V1), P_not1-{F}(V17,V18), P_in1-{F}(V16,V19), P_in2-{F}(V16,V20), P_inc-{F}(V16,V21), P_outs-{F}(V16,V22), P_outc-{F}(V16,V23), P_or1-{F}(V16,V24), abnormal-{F}(V24) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9919: mergings( V10 == V28, V18 == V27, V2 == V11, V3 == V12, V4 == V13, V8 == V17, V6 == V15, V7 == V16, V5 == V14, V11 == V20, V12 == V21, V13 == V22, V17 == V26, V15 == V24, V16 == V25, V14 == V23, V20 == V40, V21 == V41, V22 == V42, V26 == V46, V24 == V44, V25 == V45, V9 == V37, V23 == V43; #9893 ), references = 1, size of lhs = 39:
% 282.36/282.57 halfadder-{F}(V0), logic_and-{F}(V1), P_and2-{F}(V0,V1), logic_and-{F}(V2), P_and1-{F}(V0,V2), P_not1-{F}(V0,V3), halfadder-{F}(V4), P_and2-{F}(V4,V1), P_in1-{F}(V4,V5), zero-{F}(V5), P_in2-{F}(V0,V6), one-{F}(V6), halfadder-{F}(V7), P_and1-{F}(V7,V2), halfadder-{F}(V8), P_and2-{F}(V8,V1), P_not1-{F}(V8,V9), not_ok-{F}(V9), halfadder-{F}(V10), P_not1-{F}(V10,V9), P_and1-{F}(V10,V2), one-{F}(V11), halfadder-{F}(V12), fulladder-{F}(V13), P_in1-{F}(V13,V11), P_h2-{F}(V13,V12), P_h1-{F}(V13,V7), P_outs-{F}(V13,V14), one-{F}(V14), P_f-{F}(V15), P_h1-{F}(V15,V0), P_h2-{F}(V15,V12), P_in1-{F}(V15,V16), P_in2-{F}(V15,V17), P_inc-{F}(V15,V18), P_outs-{F}(V15,V19), P_outc-{F}(V15,V20), P_or1-{F}(V15,V21), abnormal-{F}(V21) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9945: mergings( V19 == V36, V10 == V28, V18 == V27, V2 == V11, V3 == V12, V4 == V13, V8 == V17, V6 == V15, V7 == V16, V5 == V14, V11 == V20, V12 == V21, V13 == V22, V17 == V26, V15 == V24, V16 == V25, V14 == V23, V20 == V41, V21 == V42, V22 == V43, V26 == V47, V24 == V45, V25 == V46, V9 == V38, V23 == V44; #9894 ), references = 1, size of lhs = 39:
% 282.36/282.57 halfadder-{F}(V0), logic_and-{F}(V1), P_and2-{F}(V0,V1), logic_and-{F}(V2), P_and1-{F}(V0,V2), P_not1-{F}(V0,V3), halfadder-{F}(V4), P_and2-{F}(V4,V1), P_in1-{F}(V4,V5), zero-{F}(V5), P_in2-{F}(V0,V6), one-{F}(V6), halfadder-{F}(V7), P_and2-{F}(V7,V1), P_not1-{F}(V7,V8), not_ok-{F}(V8), halfadder-{F}(V9), P_not1-{F}(V9,V8), P_and1-{F}(V9,V2), halfadder-{F}(V10), P_and1-{F}(V10,V2), one-{F}(V11), halfadder-{F}(V12), fulladder-{F}(V13), P_in1-{F}(V13,V11), P_h2-{F}(V13,V12), P_h1-{F}(V13,V10), P_outs-{F}(V13,V14), one-{F}(V14), P_f-{F}(V15), P_h1-{F}(V15,V0), P_h2-{F}(V15,V12), P_in1-{F}(V15,V16), P_in2-{F}(V15,V17), P_inc-{F}(V15,V18), P_outs-{F}(V15,V19), P_outc-{F}(V15,V20), P_or1-{F}(V15,V21), abnormal-{F}(V21) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #9983: mergings( V18 == V34, V2 == V10, V3 == V11, V4 == V12, V8 == V16, V6 == V14, V7 == V15, V9 == V17, V5 == V13, V10 == V19, V11 == V20, V12 == V21, V16 == V25, V14 == V23, V15 == V24, V13 == V22, V19 == V27, V20 == V28, V21 == V29, V25 == V33, V23 == V31, V24 == V32, V22 == V30, V27 == V43, V28 == V44, V29 == V45, V33 == V49, V31 == V47, V32 == V48, V17 == V40, V30 == V46; #9950 ), references = 1, size of lhs = 31:
% 282.36/282.57 halfadder-{F}(V0), logic_and-{F}(V1), P_and2-{F}(V0,V1), logic_and-{F}(V2), P_and1-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V1), P_in1-{F}(V3,V4), zero-{F}(V4), P_in2-{F}(V0,V5), one-{F}(V5), halfadder-{F}(V6), P_and1-{F}(V6,V2), one-{F}(V7), halfadder-{F}(V8), fulladder-{F}(V9), P_in1-{F}(V9,V7), P_h2-{F}(V9,V8), P_h1-{F}(V9,V6), P_outs-{F}(V9,V10), one-{F}(V10), P_f-{F}(V11), P_h1-{F}(V11,V0), P_h2-{F}(V11,V8), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), abnormal-{F}(V17) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #10016: mergings( V26 == V39, V18 == V34, V2 == V10, V3 == V11, V4 == V12, V8 == V16, V6 == V14, V7 == V15, V9 == V17, V5 == V13, V10 == V19, V11 == V20, V12 == V21, V16 == V25, V14 == V23, V15 == V24, V13 == V22, V19 == V27, V20 == V28, V21 == V29, V25 == V33, V23 == V31, V24 == V32, V22 == V30, V27 == V44, V28 == V45, V29 == V46, V33 == V50, V31 == V48, V32 == V49, V17 == V41, V30 == V47; #9951 ), references = 1, size of lhs = 31:
% 282.36/282.57 halfadder-{F}(V0), logic_and-{F}(V1), P_and2-{F}(V0,V1), logic_and-{F}(V2), P_and1-{F}(V0,V2), halfadder-{F}(V3), P_and2-{F}(V3,V1), P_in1-{F}(V3,V4), zero-{F}(V4), P_in2-{F}(V0,V5), one-{F}(V5), halfadder-{F}(V6), P_and1-{F}(V6,V2), one-{F}(V7), halfadder-{F}(V8), fulladder-{F}(V9), P_in1-{F}(V9,V7), P_h2-{F}(V9,V8), P_h1-{F}(V9,V6), P_outs-{F}(V9,V10), one-{F}(V10), P_f-{F}(V11), P_h1-{F}(V11,V0), P_h2-{F}(V11,V8), P_in1-{F}(V11,V12), P_in2-{F}(V11,V13), P_inc-{F}(V11,V14), P_outs-{F}(V11,V15), P_outc-{F}(V11,V16), P_or1-{F}(V11,V17), abnormal-{F}(V17) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #10051: mergings( V2 == V10, V3 == V11, V4 == V12, V8 == V16, V6 == V14, V7 == V15, V9 == V17, V5 == V13, V10 == V18, V11 == V19, V12 == V20, V16 == V24, V14 == V22, V15 == V23, V13 == V21, V18 == V26, V19 == V27, V20 == V28, V24 == V32, V22 == V30, V23 == V31, V21 == V29, V26 == V40, V27 == V41, V28 == V42, V32 == V46, V30 == V44, V31 == V45, V17 == V37, V29 == V43; #10019 ), references = 1, size of lhs = 27:
% 282.36/282.57 halfadder-{F}(V0), logic_and-{F}(V1), P_and1-{F}(V0,V1), P_in1-{F}(V0,V2), zero-{F}(V2), P_in2-{F}(V0,V3), one-{F}(V3), halfadder-{F}(V4), P_and1-{F}(V4,V1), one-{F}(V5), halfadder-{F}(V6), fulladder-{F}(V7), P_in1-{F}(V7,V5), P_h2-{F}(V7,V6), P_h1-{F}(V7,V4), P_outs-{F}(V7,V8), one-{F}(V8), P_f-{F}(V9), P_h1-{F}(V9,V0), P_h2-{F}(V9,V6), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), abnormal-{F}(V15) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #10083: mergings( V25 == V36, V2 == V10, V3 == V11, V4 == V12, V8 == V16, V6 == V14, V7 == V15, V9 == V17, V5 == V13, V10 == V18, V11 == V19, V12 == V20, V16 == V24, V14 == V22, V15 == V23, V13 == V21, V18 == V26, V19 == V27, V20 == V28, V24 == V32, V22 == V30, V23 == V31, V21 == V29, V26 == V41, V27 == V42, V28 == V43, V32 == V47, V30 == V45, V31 == V46, V17 == V38, V29 == V44; #10020 ), references = 1, size of lhs = 27:
% 282.36/282.57 halfadder-{F}(V0), logic_and-{F}(V1), P_and1-{F}(V0,V1), P_in1-{F}(V0,V2), zero-{F}(V2), P_in2-{F}(V0,V3), one-{F}(V3), halfadder-{F}(V4), P_and1-{F}(V4,V1), one-{F}(V5), halfadder-{F}(V6), fulladder-{F}(V7), P_in1-{F}(V7,V5), P_h2-{F}(V7,V6), P_h1-{F}(V7,V4), P_outs-{F}(V7,V8), one-{F}(V8), P_f-{F}(V9), P_h1-{F}(V9,V0), P_h2-{F}(V9,V6), P_in1-{F}(V9,V10), P_in2-{F}(V9,V11), P_inc-{F}(V9,V12), P_outs-{F}(V9,V13), P_outc-{F}(V9,V14), P_or1-{F}(V9,V15), abnormal-{F}(V15) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #10118: mergings( V2 == V10, V3 == V11, V4 == V12, V8 == V16, V6 == V14, V7 == V15, V9 == V17, V5 == V13, V10 == V18, V11 == V19, V12 == V20, V16 == V24, V14 == V22, V15 == V23, V13 == V21, V18 == V25, V19 == V26, V20 == V27, V24 == V31, V22 == V29, V23 == V30, V21 == V28, V25 == V38, V26 == V39, V27 == V40, V31 == V44, V29 == V42, V30 == V43, V17 == V35, V28 == V41; #10086 ), references = 2, size of lhs = 23:
% 282.36/282.57 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_in2-{F}(V0,V2), one-{F}(V2), one-{F}(V3), halfadder-{F}(V4), fulladder-{F}(V5), P_in1-{F}(V5,V3), P_h2-{F}(V5,V4), P_h1-{F}(V5,V0), P_outs-{F}(V5,V6), one-{F}(V6), P_f-{F}(V7), P_h1-{F}(V7,V0), P_h2-{F}(V7,V4), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), abnormal-{F}(V13) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #10149: mergings( V2 == V10, V3 == V11, V4 == V12, V8 == V16, V6 == V14, V7 == V15, V9 == V17, V5 == V13, V10 == V18, V11 == V19, V12 == V20, V16 == V24, V14 == V22, V15 == V23, V13 == V21, V18 == V25, V19 == V26, V20 == V27, V24 == V31, V22 == V29, V23 == V30, V21 == V28, V25 == V38, V26 == V39, V27 == V40, V31 == V44, V29 == V42, V30 == V43, V17 == V35, V28 == V41; #10087 ), references = 2, size of lhs = 23:
% 282.36/282.57 halfadder-{F}(V0), P_in1-{F}(V0,V1), zero-{F}(V1), P_in2-{F}(V0,V2), one-{F}(V2), one-{F}(V3), halfadder-{F}(V4), fulladder-{F}(V5), P_in1-{F}(V5,V3), P_h2-{F}(V5,V4), P_h1-{F}(V5,V0), P_outs-{F}(V5,V6), one-{F}(V6), P_f-{F}(V7), P_h1-{F}(V7,V0), P_h2-{F}(V7,V4), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), abnormal-{F}(V13) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #10157: mergings( V2 == V7; #10154 ), references = 1, size of lhs = 23:
% 282.36/282.57 one-{F}(V0), halfadder-{F}(V1), P_in1-{F}(V1,V2), zero-{F}(V2), one-{F}(V3), halfadder-{F}(V4), fulladder-{F}(V5), P_inc-{F}(V5,V0), P_in1-{F}(V5,V3), P_h2-{F}(V5,V4), P_h1-{F}(V5,V1), P_outs-{F}(V5,V6), one-{F}(V6), P_f-{F}(V7), P_h1-{F}(V7,V1), P_h2-{F}(V7,V4), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), abnormal-{F}(V13) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #10159: mergings( V2 == V7; #10155 ), references = 1, size of lhs = 23:
% 282.36/282.57 one-{F}(V0), halfadder-{F}(V1), P_in1-{F}(V1,V2), zero-{F}(V2), one-{F}(V3), halfadder-{F}(V4), fulladder-{F}(V5), P_inc-{F}(V5,V0), P_in1-{F}(V5,V3), P_h2-{F}(V5,V4), P_h1-{F}(V5,V1), P_outs-{F}(V5,V6), one-{F}(V6), P_f-{F}(V7), P_h1-{F}(V7,V1), P_h2-{F}(V7,V4), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), abnormal-{F}(V13) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #10168: mergings( V2 == V4, V4 == V8; #10164 ), references = 1, size of lhs = 23:
% 282.36/282.57 zero-{F}(V0), halfadder-{F}(V1), one-{F}(V2), one-{F}(V3), halfadder-{F}(V4), fulladder-{F}(V5), P_in2-{F}(V5,V0), P_inc-{F}(V5,V2), P_in1-{F}(V5,V3), P_h2-{F}(V5,V4), P_h1-{F}(V5,V1), P_outs-{F}(V5,V6), one-{F}(V6), P_f-{F}(V7), P_h1-{F}(V7,V1), P_h2-{F}(V7,V4), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), abnormal-{F}(V13) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #10171: mergings( V2 == V4, V4 == V8; #10165 ), references = 1, size of lhs = 23:
% 282.36/282.57 zero-{F}(V0), halfadder-{F}(V1), one-{F}(V2), one-{F}(V3), halfadder-{F}(V4), fulladder-{F}(V5), P_in2-{F}(V5,V0), P_inc-{F}(V5,V2), P_in1-{F}(V5,V3), P_h2-{F}(V5,V4), P_h1-{F}(V5,V1), P_outs-{F}(V5,V6), one-{F}(V6), P_f-{F}(V7), P_h1-{F}(V7,V1), P_h2-{F}(V7,V4), P_in1-{F}(V7,V8), P_in2-{F}(V7,V9), P_inc-{F}(V7,V10), P_outs-{F}(V7,V11), P_outc-{F}(V7,V12), P_or1-{F}(V7,V13), abnormal-{F}(V13) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #10200: mergings( V8 == V19, V19 == V0, V0 == V24, V12 == V2, V2 == V4, V4 == V14, V14 == V22, V22 == V25, V20 == V10, V10 == V3, V3 == V5, V5 == V15, V15 == V26, V7 == V18, V16 == V6, V6 == V27, V9 == V17, V17 == V28, V11 == V21, V13 == V23; #10178 ), references = 1, size of lhs = 15:
% 282.36/282.57 logic_or-{F}(V0), zero-{F}(V1), zero-{F}(V2), halfadder-{F}(V3), P_f-{F}(V4), P_or1-{F}(V4,V0), fulladder-{F}(V4), P_h1-{F}(V4,V3), P_in2-{F}(V4,V2), P_outc-{F}(V4,V1), one-{F}(V5), P_in1-{F}(V4,V5), halfadder-{F}(V6), P_h2-{F}(V4,V6), P_outs-{F}(V4,V7) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #10221: mergings( V8 == V19, V19 == V0, V0 == V24, V12 == V2, V2 == V4, V4 == V14, V14 == V22, V22 == V25, V20 == V10, V10 == V3, V3 == V5, V5 == V15, V15 == V26, V7 == V18, V16 == V6, V6 == V27, V9 == V17, V17 == V28, V11 == V21, V13 == V23; #10179 ), references = 1, size of lhs = 15:
% 282.36/282.57 logic_or-{F}(V0), zero-{F}(V1), zero-{F}(V2), halfadder-{F}(V3), P_f-{F}(V4), P_or1-{F}(V4,V0), fulladder-{F}(V4), P_h1-{F}(V4,V3), P_in2-{F}(V4,V2), P_outc-{F}(V4,V1), one-{F}(V5), P_in1-{F}(V4,V5), halfadder-{F}(V6), P_h2-{F}(V4,V6), P_outs-{F}(V4,V7) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #10244: mergings( V3 == V8, V8 == V0, V7 == V11, V11 == V13, V13 == V16, V16 == V21, V21 == V22, V9 == V5, V5 == V12, V12 == V14, V14 == V17, V17 == V23, V2 == V20, V18 == V15, V15 == V24, V4 == V19, V19 == V25, V6 == V10; #10224 ), references = 1, size of lhs = 13:
% 282.36/282.57 logic_or-{F}(V0), zero-{F}(V1), zero-{F}(V2), halfadder-{F}(V3), P_f-{F}(V4), fulladder-{F}(V4), P_h1-{F}(V4,V3), P_or1-{F}(V4,V0), P_in2-{F}(V4,V2), P_outc-{F}(V4,V1), one-{F}(V5), P_in1-{F}(V4,V5), P_outs-{F}(V4,V6) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #10263: mergings( V3 == V8, V8 == V0, V7 == V11, V11 == V13, V13 == V16, V16 == V21, V21 == V22, V9 == V5, V5 == V12, V12 == V14, V14 == V17, V17 == V23, V2 == V20, V18 == V15, V15 == V24, V4 == V19, V19 == V25, V6 == V10; #10225 ), references = 1, size of lhs = 13:
% 282.36/282.57 logic_or-{F}(V0), zero-{F}(V1), zero-{F}(V2), halfadder-{F}(V3), P_f-{F}(V4), fulladder-{F}(V4), P_h1-{F}(V4,V3), P_or1-{F}(V4,V0), P_in2-{F}(V4,V2), P_outc-{F}(V4,V1), one-{F}(V5), P_in1-{F}(V4,V5), P_outs-{F}(V4,V6) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #10284: mergings( V3 == V0, V6 == V8, V8 == V10, V10 == V12, V12 == V17, V17 == V19, V7 == V5, V5 == V9, V9 == V11, V11 == V13, V13 == V20, V2 == V16, V14 == V18, V18 == V21, V4 == V15, V15 == V22; #10266 ), references = 2, size of lhs = 11:
% 282.36/282.57 logic_or-{F}(V0), zero-{F}(V1), zero-{F}(V2), P_f-{F}(V3), fulladder-{F}(V3), P_or1-{F}(V3,V0), P_in2-{F}(V3,V2), P_outc-{F}(V3,V1), one-{F}(V4), P_in1-{F}(V3,V4), P_outs-{F}(V3,V5) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #10301: mergings( V3 == V0, V6 == V8, V8 == V10, V10 == V12, V12 == V17, V17 == V19, V7 == V5, V5 == V9, V9 == V11, V11 == V13, V13 == V20, V2 == V16, V14 == V18, V18 == V21, V4 == V15, V15 == V22; #10267 ), references = 2, size of lhs = 11:
% 282.36/282.57 logic_or-{F}(V0), zero-{F}(V1), zero-{F}(V2), P_f-{F}(V3), fulladder-{F}(V3), P_or1-{F}(V3,V0), P_in2-{F}(V3,V2), P_outc-{F}(V3,V1), one-{F}(V4), P_in1-{F}(V3,V4), P_outs-{F}(V3,V5) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #10317: mergings( V0 == V8, V2 == V9, V3 == V7, V4 == V10; #10310 ), references = 1, size of lhs = 10:
% 282.36/282.57 logic_or-{F}(V0), zero-{F}(V1), P_f-{F}(V2), fulladder-{F}(V2), P_or1-{F}(V2,V0), P_in2-{F}(V2,V1), P_outc-{F}(V2,V3), one-{F}(V4), P_in1-{F}(V2,V4), P_outs-{F}(V2,V5) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #10322: mergings( V0 == V8, V2 == V9, V3 == V7, V4 == V10; #10311 ), references = 1, size of lhs = 10:
% 282.36/282.57 logic_or-{F}(V0), zero-{F}(V1), P_f-{F}(V2), fulladder-{F}(V2), P_or1-{F}(V2,V0), P_in2-{F}(V2,V1), P_outc-{F}(V2,V3), one-{F}(V4), P_in1-{F}(V2,V4), P_outs-{F}(V2,V5) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #10328: mergings( V2 == V7, V6 == V3, V4 == V8; #10323 ), references = 1, size of lhs = 9:
% 282.36/282.57 logic_or-{F}(V0), zero-{F}(V1), P_f-{F}(V2), fulladder-{F}(V2), P_or1-{F}(V2,V0), P_in2-{F}(V2,V1), one-{F}(V3), P_in1-{F}(V2,V3), P_outs-{F}(V2,V4) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #10332: mergings( V2 == V7, V6 == V3, V4 == V8; #10324 ), references = 1, size of lhs = 9:
% 282.36/282.57 logic_or-{F}(V0), zero-{F}(V1), P_f-{F}(V2), fulladder-{F}(V2), P_or1-{F}(V2,V0), P_in2-{F}(V2,V1), one-{F}(V3), P_in1-{F}(V2,V3), P_outs-{F}(V2,V4) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #10337: mergings( V4 == V6, V3 == V5; #10333 ), references = 1, size of lhs = 8:
% 282.36/282.57 logic_or-{F}(V0), zero-{F}(V1), P_f-{F}(V2), fulladder-{F}(V2), P_or1-{F}(V2,V0), P_in2-{F}(V2,V1), one-{F}(V3), P_in1-{F}(V2,V3) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #10340: mergings( V4 == V6, V3 == V5; #10334 ), references = 1, size of lhs = 8:
% 282.36/282.57 logic_or-{F}(V0), zero-{F}(V1), P_f-{F}(V2), fulladder-{F}(V2), P_or1-{F}(V2,V0), P_in2-{F}(V2,V1), one-{F}(V3), P_in1-{F}(V2,V3) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #10347: mergings( V3 == V5, V2 == V4; #10343 ), references = 1, size of lhs = 6:
% 282.36/282.57 zero-{F}(V0), P_f-{F}(V1), fulladder-{F}(V1), P_in2-{F}(V1,V0), one-{F}(V2), P_in1-{F}(V1,V2) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #10354: mergings( V2 == V3, V3 == V4; #10350 ), references = 1, size of lhs = 4:
% 282.36/282.57 P_f-{F}(V0), fulladder-{F}(V0), one-{F}(V1), P_in1-{F}(V0,V1) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #10359: exists( #64, #10355 ), references = 1, size of lhs = 2:
% 282.36/282.57 P_f-{F}(V0), fulladder-{F}(V0) | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 #10364: exists( #76, #10360 ), references = 1, size of lhs = 0:
% 282.36/282.57 FALSE | FALSE
% 282.36/282.57 (used 0 times, uses = {})
% 282.36/282.57
% 282.36/282.57 number of learnt formulas = 863
% 282.36/282.57
% 282.36/282.57
% 282.36/282.57 % SZS output end Refutation for /export/starexec/sandbox2/benchmark/theBenchmark.p
% 282.36/282.57
% 282.36/282.57 randbase = 1
%------------------------------------------------------------------------------