TSTP Solution File: ARI516_1 by cvc5---1.0.5
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%------------------------------------------------------------------------------
% File : cvc5---1.0.5
% Problem : ARI516_1 : TPTP v8.2.0. Released v5.0.0.
% Transfm : none
% Format : tptp:raw
% Command : do_cvc5 %s %d
% Computer : n023.cluster.edu
% Model : x86_64 x86_64
% CPU : Intel(R) Xeon(R) CPU E5-2620 v4 2.10GHz
% Memory : 8042.1875MB
% OS : Linux 3.10.0-693.el7.x86_64
% CPULimit : 300s
% WCLimit : 300s
% DateTime : Wed May 29 16:34:01 EDT 2024
% Result : Theorem 0.25s 0.54s
% Output : Proof 0.25s
% Verified :
% SZS Type : -
% Comments :
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%----WARNING: Could not form TPTP format derivation
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%----ORIGINAL SYSTEM OUTPUT
% 0.11/0.14 % Problem : ARI516_1 : TPTP v8.2.0. Released v5.0.0.
% 0.11/0.15 % Command : do_cvc5 %s %d
% 0.16/0.39 % Computer : n023.cluster.edu
% 0.16/0.39 % Model : x86_64 x86_64
% 0.16/0.39 % CPU : Intel(R) Xeon(R) CPU E5-2620 v4 @ 2.10GHz
% 0.16/0.39 % Memory : 8042.1875MB
% 0.16/0.39 % OS : Linux 3.10.0-693.el7.x86_64
% 0.16/0.39 % CPULimit : 300
% 0.16/0.39 % WCLimit : 300
% 0.16/0.39 % DateTime : Mon May 27 05:35:39 EDT 2024
% 0.16/0.39 % CPUTime :
% 0.25/0.52 %----Proving TF0_ARI
% 0.25/0.54 --- Run --finite-model-find --decision=internal at 15...
% 0.25/0.54 % SZS status Theorem for /export/starexec/sandbox2/tmp/tmp.H4LysuFel0/cvc5---1.0.5_5451.smt2
% 0.25/0.54 % SZS output start Proof for /export/starexec/sandbox2/tmp/tmp.H4LysuFel0/cvc5---1.0.5_5451.smt2
% 0.25/0.54 (assume a0 (not (> (to_real 4) (/ 16 5))))
% 0.25/0.54 (assume a1 true)
% 0.25/0.54 (step t1 (cl (not (= (not (> (to_real 4) (/ 16 5))) false)) (not (not (> (to_real 4) (/ 16 5)))) false) :rule equiv_pos2)
% 0.25/0.54 (step t2 (cl (= (> (to_real 4) (/ 16 5)) (not (<= (to_real 4) (/ 16 5))))) :rule all_simplify)
% 0.25/0.54 (step t3 (cl (= (to_real 4) 4.0)) :rule all_simplify)
% 0.25/0.54 (step t4 (cl (= (/ 16 5) (/ 16 5))) :rule refl)
% 0.25/0.54 (step t5 (cl (= (<= (to_real 4) (/ 16 5)) (<= 4.0 (/ 16 5)))) :rule cong :premises (t3 t4))
% 0.25/0.54 (step t6 (cl (= (<= 4.0 (/ 16 5)) false)) :rule all_simplify)
% 0.25/0.54 (step t7 (cl (= (<= (to_real 4) (/ 16 5)) false)) :rule trans :premises (t5 t6))
% 0.25/0.54 (step t8 (cl (= (not (<= (to_real 4) (/ 16 5))) (not false))) :rule cong :premises (t7))
% 0.25/0.54 (step t9 (cl (= (not false) true)) :rule all_simplify)
% 0.25/0.54 (step t10 (cl (= (not (<= (to_real 4) (/ 16 5))) true)) :rule trans :premises (t8 t9))
% 0.25/0.54 (step t11 (cl (= (> (to_real 4) (/ 16 5)) true)) :rule trans :premises (t2 t10))
% 0.25/0.54 (step t12 (cl (= (not (> (to_real 4) (/ 16 5))) (not true))) :rule cong :premises (t11))
% 0.25/0.54 (step t13 (cl (= (not true) false)) :rule all_simplify)
% 0.25/0.54 (step t14 (cl (= (not (> (to_real 4) (/ 16 5))) false)) :rule trans :premises (t12 t13))
% 0.25/0.54 (step t15 (cl false) :rule resolution :premises (t1 t14 a0))
% 0.25/0.54 (step t16 (cl (not false)) :rule false)
% 0.25/0.54 (step t17 (cl) :rule resolution :premises (t15 t16))
% 0.25/0.54
% 0.25/0.54 % SZS output end Proof for /export/starexec/sandbox2/tmp/tmp.H4LysuFel0/cvc5---1.0.5_5451.smt2
% 0.25/0.54 % cvc5---1.0.5 exiting
% 0.25/0.54 % cvc5---1.0.5 exiting
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