TSTP Solution File: ARI508_1 by cvc5---1.0.5
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%------------------------------------------------------------------------------
% File : cvc5---1.0.5
% Problem : ARI508_1 : TPTP v8.2.0. Released v5.0.0.
% Transfm : none
% Format : tptp:raw
% Command : do_cvc5 %s %d
% Computer : n017.cluster.edu
% Model : x86_64 x86_64
% CPU : Intel(R) Xeon(R) CPU E5-2620 v4 2.10GHz
% Memory : 8042.1875MB
% OS : Linux 3.10.0-693.el7.x86_64
% CPULimit : 300s
% WCLimit : 300s
% DateTime : Wed May 29 16:34:00 EDT 2024
% Result : Theorem 0.22s 0.53s
% Output : Proof 0.22s
% Verified :
% SZS Type : -
% Comments :
%------------------------------------------------------------------------------
%----WARNING: Could not form TPTP format derivation
%------------------------------------------------------------------------------
%----ORIGINAL SYSTEM OUTPUT
% 0.12/0.13 % Problem : ARI508_1 : TPTP v8.2.0. Released v5.0.0.
% 0.12/0.14 % Command : do_cvc5 %s %d
% 0.14/0.35 % Computer : n017.cluster.edu
% 0.14/0.35 % Model : x86_64 x86_64
% 0.14/0.35 % CPU : Intel(R) Xeon(R) CPU E5-2620 v4 @ 2.10GHz
% 0.14/0.35 % Memory : 8042.1875MB
% 0.14/0.35 % OS : Linux 3.10.0-693.el7.x86_64
% 0.14/0.35 % CPULimit : 300
% 0.14/0.35 % WCLimit : 300
% 0.14/0.35 % DateTime : Mon May 27 05:08:24 EDT 2024
% 0.14/0.36 % CPUTime :
% 0.22/0.50 %----Proving TF0_ARI
% 0.22/0.53 --- Run --finite-model-find --decision=internal at 15...
% 0.22/0.53 % SZS status Theorem for /export/starexec/sandbox/tmp/tmp.gkZL43WXAV/cvc5---1.0.5_21454.smt2
% 0.22/0.53 % SZS output start Proof for /export/starexec/sandbox/tmp/tmp.gkZL43WXAV/cvc5---1.0.5_21454.smt2
% 0.22/0.53 (assume a0 (not (< 2 (to_int (/ 7 2)))))
% 0.22/0.53 (assume a1 true)
% 0.22/0.53 (step t1 (cl (not (= (not (< 2 (to_int (/ 7 2)))) false)) (not (not (< 2 (to_int (/ 7 2))))) false) :rule equiv_pos2)
% 0.22/0.53 (step t2 (cl (= (< 2 (to_int (/ 7 2))) (not (>= 2 (to_int (/ 7 2)))))) :rule all_simplify)
% 0.22/0.53 (step t3 (cl (= 2 2)) :rule refl)
% 0.22/0.53 (step t4 (cl (= (to_int (/ 7 2)) 3)) :rule all_simplify)
% 0.22/0.53 (step t5 (cl (= (>= 2 (to_int (/ 7 2))) (>= 2 3))) :rule cong :premises (t3 t4))
% 0.22/0.53 (step t6 (cl (= (>= 2 3) false)) :rule all_simplify)
% 0.22/0.53 (step t7 (cl (= (>= 2 (to_int (/ 7 2))) false)) :rule trans :premises (t5 t6))
% 0.22/0.53 (step t8 (cl (= (not (>= 2 (to_int (/ 7 2)))) (not false))) :rule cong :premises (t7))
% 0.22/0.53 (step t9 (cl (= (not false) true)) :rule all_simplify)
% 0.22/0.53 (step t10 (cl (= (not (>= 2 (to_int (/ 7 2)))) true)) :rule trans :premises (t8 t9))
% 0.22/0.53 (step t11 (cl (= (< 2 (to_int (/ 7 2))) true)) :rule trans :premises (t2 t10))
% 0.22/0.53 (step t12 (cl (= (not (< 2 (to_int (/ 7 2)))) (not true))) :rule cong :premises (t11))
% 0.22/0.53 (step t13 (cl (= (not true) false)) :rule all_simplify)
% 0.22/0.53 (step t14 (cl (= (not (< 2 (to_int (/ 7 2)))) false)) :rule trans :premises (t12 t13))
% 0.22/0.53 (step t15 (cl false) :rule resolution :premises (t1 t14 a0))
% 0.22/0.53 (step t16 (cl (not false)) :rule false)
% 0.22/0.53 (step t17 (cl) :rule resolution :premises (t15 t16))
% 0.22/0.53
% 0.22/0.53 % SZS output end Proof for /export/starexec/sandbox/tmp/tmp.gkZL43WXAV/cvc5---1.0.5_21454.smt2
% 0.22/0.53 % cvc5---1.0.5 exiting
% 0.22/0.53 % cvc5---1.0.5 exiting
%------------------------------------------------------------------------------