TSTP Solution File: ARI384_1 by cvc5---1.0.5

View Problem - Process Solution

%------------------------------------------------------------------------------
% File     : cvc5---1.0.5
% Problem  : ARI384_1 : TPTP v8.2.0. Released v5.0.0.
% Transfm  : none
% Format   : tptp:raw
% Command  : do_cvc5 %s %d

% Computer : n005.cluster.edu
% Model    : x86_64 x86_64
% CPU      : Intel(R) Xeon(R) CPU E5-2620 v4 2.10GHz
% Memory   : 8042.1875MB
% OS       : Linux 3.10.0-693.el7.x86_64
% CPULimit : 300s
% WCLimit  : 300s
% DateTime : Wed May 29 16:33:45 EDT 2024

% Result   : Theorem 0.21s 0.52s
% Output   : Proof 0.21s
% Verified : 
% SZS Type : -

% Comments : 
%------------------------------------------------------------------------------
%----WARNING: Could not form TPTP format derivation
%------------------------------------------------------------------------------
%----ORIGINAL SYSTEM OUTPUT
% 0.10/0.13  % Problem    : ARI384_1 : TPTP v8.2.0. Released v5.0.0.
% 0.10/0.14  % Command    : do_cvc5 %s %d
% 0.14/0.35  % Computer : n005.cluster.edu
% 0.14/0.35  % Model    : x86_64 x86_64
% 0.14/0.35  % CPU      : Intel(R) Xeon(R) CPU E5-2620 v4 @ 2.10GHz
% 0.14/0.35  % Memory   : 8042.1875MB
% 0.14/0.35  % OS       : Linux 3.10.0-693.el7.x86_64
% 0.14/0.35  % CPULimit   : 300
% 0.14/0.35  % WCLimit    : 300
% 0.14/0.35  % DateTime   : Mon May 27 05:33:39 EDT 2024
% 0.14/0.35  % CPUTime    : 
% 0.21/0.50  %----Proving TF0_ARI
% 0.21/0.52  --- Run --finite-model-find --decision=internal at 15...
% 0.21/0.52  % SZS status Theorem for /export/starexec/sandbox2/tmp/tmp.M0VUg9i5rg/cvc5---1.0.5_32249.smt2
% 0.21/0.52  % SZS output start Proof for /export/starexec/sandbox2/tmp/tmp.M0VUg9i5rg/cvc5---1.0.5_32249.smt2
% 0.21/0.52  (assume a0 (not (exists ((X Real)) (> X (- 32500.0)))))
% 0.21/0.52  (assume a1 true)
% 0.21/0.52  (step t1 (cl (not (= (not (exists ((X Real)) (> X (- 32500.0)))) false)) (not (not (exists ((X Real)) (> X (- 32500.0))))) false) :rule equiv_pos2)
% 0.21/0.52  (anchor :step t2 :args ((X Real) (:= X X)))
% 0.21/0.52  (step t2.t1 (cl (= X X)) :rule refl)
% 0.21/0.52  (step t2.t2 (cl (= (> X (- 32500.0)) (not (<= X (- 32500.0))))) :rule all_simplify)
% 0.21/0.52  (step t2.t3 (cl (= X X)) :rule refl)
% 0.21/0.52  (step t2.t4 (cl (= (- 32500.0) (- 32500.0))) :rule all_simplify)
% 0.21/0.52  (step t2.t5 (cl (= (<= X (- 32500.0)) (<= X (- 32500.0)))) :rule cong :premises (t2.t3 t2.t4))
% 0.21/0.52  (step t2.t6 (cl (= (<= X (- 32500.0)) (>= (* (- 1) X) 32500))) :rule all_simplify)
% 0.21/0.52  (step t2.t7 (cl (= (<= X (- 32500.0)) (>= (* (- 1) X) 32500))) :rule trans :premises (t2.t5 t2.t6))
% 0.21/0.52  (step t2.t8 (cl (= (not (<= X (- 32500.0))) (not (>= (* (- 1) X) 32500)))) :rule cong :premises (t2.t7))
% 0.21/0.52  (step t2.t9 (cl (= (> X (- 32500.0)) (not (>= (* (- 1) X) 32500)))) :rule trans :premises (t2.t2 t2.t8))
% 0.21/0.52  (step t2 (cl (= (exists ((X Real)) (> X (- 32500.0))) (exists ((X Real)) (not (>= (* (- 1) X) 32500))))) :rule bind)
% 0.21/0.52  (step t3 (cl (= (exists ((X Real)) (not (>= (* (- 1) X) 32500))) (not (forall ((X Real)) (>= (* (- 1) X) 32500))))) :rule all_simplify)
% 0.21/0.52  (step t4 (cl (= (forall ((X Real)) (>= (* (- 1) X) 32500)) false)) :rule all_simplify)
% 0.21/0.52  (step t5 (cl (= (not (forall ((X Real)) (>= (* (- 1) X) 32500))) (not false))) :rule cong :premises (t4))
% 0.21/0.52  (step t6 (cl (= (not false) true)) :rule all_simplify)
% 0.21/0.52  (step t7 (cl (= (not (forall ((X Real)) (>= (* (- 1) X) 32500))) true)) :rule trans :premises (t5 t6))
% 0.21/0.52  (step t8 (cl (= (exists ((X Real)) (not (>= (* (- 1) X) 32500))) true)) :rule trans :premises (t3 t7))
% 0.21/0.52  (step t9 (cl (= (exists ((X Real)) (> X (- 32500.0))) true)) :rule trans :premises (t2 t8))
% 0.21/0.52  (step t10 (cl (= (not (exists ((X Real)) (> X (- 32500.0)))) (not true))) :rule cong :premises (t9))
% 0.21/0.52  (step t11 (cl (= (not true) false)) :rule all_simplify)
% 0.21/0.52  (step t12 (cl (= (not (exists ((X Real)) (> X (- 32500.0)))) false)) :rule trans :premises (t10 t11))
% 0.21/0.52  (step t13 (cl false) :rule resolution :premises (t1 t12 a0))
% 0.21/0.52  (step t14 (cl (not false)) :rule false)
% 0.21/0.52  (step t15 (cl) :rule resolution :premises (t13 t14))
% 0.21/0.52  
% 0.21/0.52  % SZS output end Proof for /export/starexec/sandbox2/tmp/tmp.M0VUg9i5rg/cvc5---1.0.5_32249.smt2
% 0.21/0.52  % cvc5---1.0.5 exiting
% 0.21/0.53  % cvc5---1.0.5 exiting
%------------------------------------------------------------------------------