TSTP Solution File: ARI115_1 by cvc5---1.0.5

View Problem - Process Solution

%------------------------------------------------------------------------------
% File     : cvc5---1.0.5
% Problem  : ARI115_1 : TPTP v8.2.0. Released v5.0.0.
% Transfm  : none
% Format   : tptp:raw
% Command  : do_cvc5 %s %d

% Computer : n002.cluster.edu
% Model    : x86_64 x86_64
% CPU      : Intel(R) Xeon(R) CPU E5-2620 v4 2.10GHz
% Memory   : 8042.1875MB
% OS       : Linux 3.10.0-693.el7.x86_64
% CPULimit : 300s
% WCLimit  : 300s
% DateTime : Wed May 29 16:33:14 EDT 2024

% Result   : Theorem 0.20s 0.52s
% Output   : Proof 0.20s
% Verified : 
% SZS Type : -

% Comments : 
%------------------------------------------------------------------------------
%----WARNING: Could not form TPTP format derivation
%------------------------------------------------------------------------------
%----ORIGINAL SYSTEM OUTPUT
% 0.06/0.13  % Problem    : ARI115_1 : TPTP v8.2.0. Released v5.0.0.
% 0.06/0.14  % Command    : do_cvc5 %s %d
% 0.13/0.35  % Computer : n002.cluster.edu
% 0.13/0.35  % Model    : x86_64 x86_64
% 0.13/0.35  % CPU      : Intel(R) Xeon(R) CPU E5-2620 v4 @ 2.10GHz
% 0.13/0.35  % Memory   : 8042.1875MB
% 0.13/0.35  % OS       : Linux 3.10.0-693.el7.x86_64
% 0.13/0.35  % CPULimit   : 300
% 0.13/0.35  % WCLimit    : 300
% 0.13/0.35  % DateTime   : Mon May 27 05:31:39 EDT 2024
% 0.13/0.35  % CPUTime    : 
% 0.20/0.50  %----Proving TF0_ARI
% 0.20/0.52  --- Run --finite-model-find --decision=internal at 15...
% 0.20/0.52  % SZS status Theorem for /export/starexec/sandbox/tmp/tmp.Pr3O3sIFOr/cvc5---1.0.5_29424.smt2
% 0.20/0.52  % SZS output start Proof for /export/starexec/sandbox/tmp/tmp.Pr3O3sIFOr/cvc5---1.0.5_29424.smt2
% 0.20/0.52  (assume a0 (not (exists ((X Int)) (= (* X (- 5)) 10))))
% 0.20/0.52  (assume a1 true)
% 0.20/0.52  (step t1 (cl (not (= (not (exists ((X Int)) (= (* X (- 5)) 10))) false)) (not (not (exists ((X Int)) (= (* X (- 5)) 10)))) false) :rule equiv_pos2)
% 0.20/0.52  (anchor :step t2 :args ((X Int) (:= X X)))
% 0.20/0.52  (step t2.t1 (cl (= X X)) :rule refl)
% 0.20/0.52  (step t2.t2 (cl (= (* X (- 5)) (* (- 5) X))) :rule all_simplify)
% 0.20/0.52  (step t2.t3 (cl (= 10 10)) :rule refl)
% 0.20/0.52  (step t2.t4 (cl (= (= (* X (- 5)) 10) (= (* (- 5) X) 10))) :rule cong :premises (t2.t2 t2.t3))
% 0.20/0.52  (step t2.t5 (cl (= (= (* (- 5) X) 10) (= X (- 2)))) :rule all_simplify)
% 0.20/0.52  (step t2.t6 (cl (= (= (* X (- 5)) 10) (= X (- 2)))) :rule trans :premises (t2.t4 t2.t5))
% 0.20/0.52  (step t2 (cl (= (exists ((X Int)) (= (* X (- 5)) 10)) (exists ((X Int)) (= X (- 2))))) :rule bind)
% 0.20/0.52  (step t3 (cl (= (exists ((X Int)) (= X (- 2))) (not (forall ((X Int)) (not (= X (- 2))))))) :rule all_simplify)
% 0.20/0.52  (step t4 (cl (= (forall ((X Int)) (not (= X (- 2)))) (not (= (- 2) (- 2))))) :rule all_simplify)
% 0.20/0.52  (step t5 (cl (= (= (- 2) (- 2)) true)) :rule all_simplify)
% 0.20/0.52  (step t6 (cl (= (not (= (- 2) (- 2))) (not true))) :rule cong :premises (t5))
% 0.20/0.52  (step t7 (cl (= (not true) false)) :rule all_simplify)
% 0.20/0.52  (step t8 (cl (= (not (= (- 2) (- 2))) false)) :rule trans :premises (t6 t7))
% 0.20/0.52  (step t9 (cl (= (forall ((X Int)) (not (= X (- 2)))) false)) :rule trans :premises (t4 t8))
% 0.20/0.52  (step t10 (cl (= (not (forall ((X Int)) (not (= X (- 2))))) (not false))) :rule cong :premises (t9))
% 0.20/0.52  (step t11 (cl (= (not false) true)) :rule all_simplify)
% 0.20/0.52  (step t12 (cl (= (not (forall ((X Int)) (not (= X (- 2))))) true)) :rule trans :premises (t10 t11))
% 0.20/0.52  (step t13 (cl (= (exists ((X Int)) (= X (- 2))) true)) :rule trans :premises (t3 t12))
% 0.20/0.52  (step t14 (cl (= (exists ((X Int)) (= (* X (- 5)) 10)) true)) :rule trans :premises (t2 t13))
% 0.20/0.52  (step t15 (cl (= (not (exists ((X Int)) (= (* X (- 5)) 10))) (not true))) :rule cong :premises (t14))
% 0.20/0.52  (step t16 (cl (= (not (exists ((X Int)) (= (* X (- 5)) 10))) false)) :rule trans :premises (t15 t7))
% 0.20/0.52  (step t17 (cl false) :rule resolution :premises (t1 t16 a0))
% 0.20/0.52  (step t18 (cl (not false)) :rule false)
% 0.20/0.52  (step t19 (cl) :rule resolution :premises (t17 t18))
% 0.20/0.52  
% 0.20/0.52  % SZS output end Proof for /export/starexec/sandbox/tmp/tmp.Pr3O3sIFOr/cvc5---1.0.5_29424.smt2
% 0.20/0.52  % cvc5---1.0.5 exiting
% 0.20/0.52  % cvc5---1.0.5 exiting
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