TSTP Solution File: ARI044_1 by cvc5---1.0.5
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%------------------------------------------------------------------------------
% File : cvc5---1.0.5
% Problem : ARI044_1 : TPTP v8.2.0. Released v5.0.0.
% Transfm : none
% Format : tptp:raw
% Command : do_cvc5 %s %d
% Computer : n025.cluster.edu
% Model : x86_64 x86_64
% CPU : Intel(R) Xeon(R) CPU E5-2620 v4 2.10GHz
% Memory : 8042.1875MB
% OS : Linux 3.10.0-693.el7.x86_64
% CPULimit : 300s
% WCLimit : 300s
% DateTime : Wed May 29 16:33:04 EDT 2024
% Result : Theorem 0.20s 0.52s
% Output : Proof 0.20s
% Verified :
% SZS Type : -
% Comments :
%------------------------------------------------------------------------------
%----WARNING: Could not form TPTP format derivation
%------------------------------------------------------------------------------
%----ORIGINAL SYSTEM OUTPUT
% 0.12/0.13 % Problem : ARI044_1 : TPTP v8.2.0. Released v5.0.0.
% 0.12/0.14 % Command : do_cvc5 %s %d
% 0.14/0.35 % Computer : n025.cluster.edu
% 0.14/0.35 % Model : x86_64 x86_64
% 0.14/0.35 % CPU : Intel(R) Xeon(R) CPU E5-2620 v4 @ 2.10GHz
% 0.14/0.35 % Memory : 8042.1875MB
% 0.14/0.35 % OS : Linux 3.10.0-693.el7.x86_64
% 0.14/0.35 % CPULimit : 300
% 0.14/0.35 % WCLimit : 300
% 0.14/0.35 % DateTime : Mon May 27 05:38:09 EDT 2024
% 0.14/0.35 % CPUTime :
% 0.20/0.49 %----Proving TF0_ARI
% 0.20/0.52 --- Run --finite-model-find --decision=internal at 15...
% 0.20/0.52 % SZS status Theorem for /export/starexec/sandbox2/tmp/tmp.HBUHpSL1vk/cvc5---1.0.5_2987.smt2
% 0.20/0.52 % SZS output start Proof for /export/starexec/sandbox2/tmp/tmp.HBUHpSL1vk/cvc5---1.0.5_2987.smt2
% 0.20/0.52 (assume a0 (not (exists ((X Int)) (>= X 15))))
% 0.20/0.52 (assume a1 true)
% 0.20/0.52 (step t1 (cl (not (= (not (exists ((X Int)) (>= X 15))) false)) (not (not (exists ((X Int)) (>= X 15)))) false) :rule equiv_pos2)
% 0.20/0.52 (step t2 (cl (= (exists ((X Int)) (>= X 15)) (not (forall ((X Int)) (not (>= X 15)))))) :rule all_simplify)
% 0.20/0.52 (step t3 (cl (= (forall ((X Int)) (not (>= X 15))) (not true))) :rule all_simplify)
% 0.20/0.52 (step t4 (cl (= (not true) false)) :rule all_simplify)
% 0.20/0.52 (step t5 (cl (= (forall ((X Int)) (not (>= X 15))) false)) :rule trans :premises (t3 t4))
% 0.20/0.52 (step t6 (cl (= (not (forall ((X Int)) (not (>= X 15)))) (not false))) :rule cong :premises (t5))
% 0.20/0.52 (step t7 (cl (= (not false) true)) :rule all_simplify)
% 0.20/0.52 (step t8 (cl (= (not (forall ((X Int)) (not (>= X 15)))) true)) :rule trans :premises (t6 t7))
% 0.20/0.52 (step t9 (cl (= (exists ((X Int)) (>= X 15)) true)) :rule trans :premises (t2 t8))
% 0.20/0.52 (step t10 (cl (= (not (exists ((X Int)) (>= X 15))) (not true))) :rule cong :premises (t9))
% 0.20/0.52 (step t11 (cl (= (not (exists ((X Int)) (>= X 15))) false)) :rule trans :premises (t10 t4))
% 0.20/0.52 (step t12 (cl false) :rule resolution :premises (t1 t11 a0))
% 0.20/0.52 (step t13 (cl (not false)) :rule false)
% 0.20/0.52 (step t14 (cl) :rule resolution :premises (t12 t13))
% 0.20/0.52
% 0.20/0.52 % SZS output end Proof for /export/starexec/sandbox2/tmp/tmp.HBUHpSL1vk/cvc5---1.0.5_2987.smt2
% 0.20/0.52 % cvc5---1.0.5 exiting
% 0.20/0.52 % cvc5---1.0.5 exiting
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