%------------------------------------------------------------------------------
% File     : cvc5---1.0.5
% Problem  : ARI038_1 : TPTP v8.2.0. Released v5.0.0.
% Transfm  : none
% Format   : tptp:raw
% Command  : do_cvc5 %s %d

% Computer : n017.cluster.edu
% Model    : x86_64 x86_64
% CPU      : Intel(R) Xeon(R) CPU E5-2620 v4 2.10GHz
% Memory   : 8042.1875MB
% OS       : Linux 3.10.0-693.el7.x86_64
% CPULimit : 300s
% WCLimit  : 300s
% DateTime : Wed May 29 16:33:03 EDT 2024

% Result   : Theorem 0.24s 0.53s
% Output   : Proof 0.24s
% Verified : 
% SZS Type : -

% Comments : 
%------------------------------------------------------------------------------
%----WARNING: Could not form TPTP format derivation
%------------------------------------------------------------------------------
%----ORIGINAL SYSTEM OUTPUT
% 0.12/0.14  % Problem    : ARI038_1 : TPTP v8.2.0. Released v5.0.0.
% 0.12/0.16  % Command    : do_cvc5 %s %d
% 0.15/0.39  % Computer : n017.cluster.edu
% 0.15/0.39  % Model    : x86_64 x86_64
% 0.15/0.39  % CPU      : Intel(R) Xeon(R) CPU E5-2620 v4 @ 2.10GHz
% 0.15/0.39  % Memory   : 8042.1875MB
% 0.15/0.39  % OS       : Linux 3.10.0-693.el7.x86_64
% 0.15/0.39  % CPULimit   : 300
% 0.15/0.39  % WCLimit    : 300
% 0.15/0.39  % DateTime   : Mon May 27 05:29:24 EDT 2024
% 0.15/0.39  % CPUTime    : 
% 0.24/0.51  %----Proving TF0_ARI
% 0.24/0.53  --- Run --finite-model-find --decision=internal at 15...
% 0.24/0.53  % SZS status Theorem for /export/starexec/sandbox2/tmp/tmp.dKqroDB9pL/cvc5---1.0.5_19501.smt2
% 0.24/0.53  % SZS output start Proof for /export/starexec/sandbox2/tmp/tmp.dKqroDB9pL/cvc5---1.0.5_19501.smt2
% 0.24/0.53  (assume a0 (not (exists ((X Int)) (> X 0))))
% 0.24/0.53  (assume a1 true)
% 0.24/0.53  (step t1 (cl (not (= (not (exists ((X Int)) (> X 0))) false)) (not (not (exists ((X Int)) (> X 0)))) false) :rule equiv_pos2)
% 0.24/0.53  (anchor :step t2 :args ((X Int) (:= X X)))
% 0.24/0.53  (step t2.t1 (cl (= X X)) :rule refl)
% 0.24/0.53  (step t2.t2 (cl (= (> X 0) (not (<= X 0)))) :rule all_simplify)
% 0.24/0.53  (step t2.t3 (cl (= (<= X 0) (not (>= X 1)))) :rule all_simplify)
% 0.24/0.53  (step t2.t4 (cl (= (not (<= X 0)) (not (not (>= X 1))))) :rule cong :premises (t2.t3))
% 0.24/0.53  (step t2.t5 (cl (= (not (not (>= X 1))) (>= X 1))) :rule all_simplify)
% 0.24/0.53  (step t2.t6 (cl (= (not (<= X 0)) (>= X 1))) :rule trans :premises (t2.t4 t2.t5))
% 0.24/0.53  (step t2.t7 (cl (= (> X 0) (>= X 1))) :rule trans :premises (t2.t2 t2.t6))
% 0.24/0.53  (step t2 (cl (= (exists ((X Int)) (> X 0)) (exists ((X Int)) (>= X 1)))) :rule bind)
% 0.24/0.53  (step t3 (cl (= (exists ((X Int)) (>= X 1)) (not (forall ((X Int)) (not (>= X 1)))))) :rule all_simplify)
% 0.24/0.53  (step t4 (cl (= (forall ((X Int)) (not (>= X 1))) (not true))) :rule all_simplify)
% 0.24/0.53  (step t5 (cl (= (not true) false)) :rule all_simplify)
% 0.24/0.53  (step t6 (cl (= (forall ((X Int)) (not (>= X 1))) false)) :rule trans :premises (t4 t5))
% 0.24/0.53  (step t7 (cl (= (not (forall ((X Int)) (not (>= X 1)))) (not false))) :rule cong :premises (t6))
% 0.24/0.53  (step t8 (cl (= (not false) true)) :rule all_simplify)
% 0.24/0.53  (step t9 (cl (= (not (forall ((X Int)) (not (>= X 1)))) true)) :rule trans :premises (t7 t8))
% 0.24/0.53  (step t10 (cl (= (exists ((X Int)) (>= X 1)) true)) :rule trans :premises (t3 t9))
% 0.24/0.53  (step t11 (cl (= (exists ((X Int)) (> X 0)) true)) :rule trans :premises (t2 t10))
% 0.24/0.53  (step t12 (cl (= (not (exists ((X Int)) (> X 0))) (not true))) :rule cong :premises (t11))
% 0.24/0.53  (step t13 (cl (= (not (exists ((X Int)) (> X 0))) false)) :rule trans :premises (t12 t5))
% 0.24/0.53  (step t14 (cl false) :rule resolution :premises (t1 t13 a0))
% 0.24/0.53  (step t15 (cl (not false)) :rule false)
% 0.24/0.53  (step t16 (cl) :rule resolution :premises (t14 t15))
% 0.24/0.53  
% 0.24/0.53  % SZS output end Proof for /export/starexec/sandbox2/tmp/tmp.dKqroDB9pL/cvc5---1.0.5_19501.smt2
% 0.24/0.53  % cvc5---1.0.5 exiting
% 0.24/0.53  % cvc5---1.0.5 exiting
%------------------------------------------------------------------------------